summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx6dl-mamoj.dts
blob: 6b2d29138bedee1482198c9b3ff88b03910428fc (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 BTicino
 * Copyright (C) 2018 Amarula Solutions B.V.
 */

/dts-v1/;

#include "imx6dl.dtsi"

/ {
	model = "BTicino i.MX6DL Mamoj board";
	compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "mii";
	status = "okay";
};

&i2c3 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	pfuze100: pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			/* CPU vdd_arm core */
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* SOC vdd_soc */
			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* I/O power GEN_3V3 */
			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* DDR memory */
			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* DDR memory */
			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			/* not used */
			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			/* not used */
			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			/* PMIC vsnvs. EX boot mode */
			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			/* not used */
			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			/* not used */
			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			/* not used */
			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			/* 1v8 general power */
			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			/* 2v8 general power IMX6 */
			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			/* 3v3 Ethernet */
			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	non-removable;
	keep-power-in-suspend;
	status = "okay";
};

&iomuxc {
	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b1
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	0x1b0b0
			MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_GPIO_19__ENET_TX_ER		0x1b0b0
			MX6QDL_PAD_GPIO_18__ENET_RX_CLK		0x1b0b1
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	0x1b0b0
			MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3      0x1b0b0
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
			MX6QDL_PAD_KEY_COL3__ENET_CRS		0x1b0b0
			MX6QDL_PAD_KEY_ROW1__ENET_COL		0x1b0b0
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
			MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_7__I2C4_SCL	0x4001b8b1
			MX6QDL_PAD_GPIO_8__I2C4_SDA	0x4001b8b1
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
		>;
	};
};