summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/yosemite.dts
blob: 64923245f0e5adb8d481a62a49f95f709b8ed048 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
/*
 * Device Tree Source for AMCC Yosemite
 *
 * Copyright 2008 IBM Corp.
 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/dts-v1/;

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "amcc,yosemite";
	compatible = "amcc,yosemite";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
		serial2 = &UART2;
		serial3 = &UART3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440EP";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by zImage */
			timebase-frequency = <0>; /* Filled in by zImage */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440ep","ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440ep","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	SDR0: sdr {
		compatible = "ibm,sdr-440ep";
		dcr-reg = <0x00e 0x002>;
	};

	CPR0: cpr {
		compatible = "ibm,cpr-440ep";
		dcr-reg = <0x00c 0x002>;
	};

	plb {
		compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by zImage */

		SDRAM0: sdram {
			compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
			dcr-reg = <0x010 0x002>;
		};

		DMA0: dma {
			compatible = "ibm,dma-440ep", "ibm,dma-440gp";
			dcr-reg = <0x100 0x027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <4>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
		};

		POB0: opb {
			compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			/* Bamboo is oddball in the 44x world and doesn't use the ERPN
			 * bits.
			 */
			ranges = <0x00000000 0x00000000 0x00000000 0x80000000
			          0x80000000 0x00000000 0x80000000 0x80000000>;
			interrupt-parent = <&UIC1>;
			interrupts = <0x7 0x4>;
			clock-frequency = <0>; /* Filled in by zImage */

			EBC0: ebc {
				compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by zImage */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;
			};

			UART0: serial@ef600300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600300 0x00000008>;
				virtual-reg = <0xef600300>;
				clock-frequency = <0>; /* Filled in by zImage */
				current-speed = <115200>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x0 0x4>;
			};

			UART1: serial@ef600400 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600400 0x00000008>;
				virtual-reg = <0xef600400>;
				clock-frequency = <0>;
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1 0x4>;
			};

			UART2: serial@ef600500 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600500 0x00000008>;
				virtual-reg = <0xef600500>;
				clock-frequency = <0>;
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x3 0x4>;
				status = "disabled";
			};

			UART3: serial@ef600600 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600600 0x00000008>;
				virtual-reg = <0xef600600>;
				clock-frequency = <0>;
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x4 0x4>;
				status = "disabled";
			};

			IIC0: i2c@ef600700 {
				compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
				reg = <0xef600700 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@ef600800 {
				compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
				reg = <0xef600800 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x7 0x4>;
			};

			spi@ef600900 {
				compatible = "amcc,spi-440ep";
				reg = <0xef600900 0x00000006>;
				interrupts = <0x8 0x4>;
				interrupt-parent = <&UIC0>;
			};

			ZMII0: emac-zmii@ef600d00 {
				compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
				reg = <0xef600d00 0x0000000c>;
			};

			EMAC0: ethernet@ef600e00 {
				device_type = "network";
				compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <0x1c 0x4 0x1d 0x4>;
				reg = <0xef600e00 0x00000070>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <0 1>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <1500>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
			};

			EMAC1: ethernet@ef600f00 {
				device_type = "network";
				compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <0x1e 0x4 0x1f 0x4>;
				reg = <0xef600f00 0x00000070>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <2 3>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <1500>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
			};

			usb@ef601000 {
				compatible = "ohci-be";
				reg = <0xef601000 0x00000080>;
				interrupts = <0x8 0x4 0x9 0x4>;
				interrupt-parent = < &UIC1 >;
			};
		};

		PCI0: pci@ec000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
			primary;
			reg = <0x00000000 0xeec00000 0x00000008	/* Config space access */
			       0x00000000 0xeed00000 0x00000004	/* IACK */
			       0x00000000 0xeed00000 0x00000004	/* Special cycle */
			       0x00000000 0xef400000 0x00000040>;	/* Internal registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed. Chip supports a second
			 * IO range but we don't use it for now
			 */
			ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
				  0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;

			interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
			interrupt-map = <
				/* IDSEL 12 */
				0x6000 0x0 0x0 0x0 &UIC0 0x19 0x8
			>;
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@ef600300";
	};
};