blob: df6ddbc52d7f65337e0a60d2d1d7106998ffeb1d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2023 Intel Corporation
*/
#ifndef _XE_PCI_TYPES_H_
#define _XE_PCI_TYPES_H_
#include <linux/types.h>
struct xe_graphics_desc {
const char *name;
u8 ver;
u8 rel;
u8 dma_mask_size; /* available DMA address bits */
u8 va_bits;
u8 vm_max_level;
u8 vram_flags;
u64 hw_engine_mask; /* hardware engines provided by graphics IP */
u8 max_remote_tiles:2;
u8 has_asid:1;
u8 has_flat_ccs:1;
u8 has_link_copy_engine:1;
u8 has_range_tlb_invalidation:1;
u8 supports_usm:1;
};
struct xe_media_desc {
const char *name;
u8 ver;
u8 rel;
u64 hw_engine_mask; /* hardware engines provided by media IP */
};
struct gmdid_map {
unsigned int ver;
const void *ip;
};
#endif
|