diff options
| author | Xiang Liu <xiang.liu@amd.com> | 2025-03-21 20:47:23 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-03-26 17:44:27 -0400 |
| commit | f3f05a0ec584855c53f2d95024e23259f3ee101d (patch) | |
| tree | b5ff3f79915614f0b1721332d92fb312263da20a /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | 704bc361e3a4ead1c0eb40acc255b636b788dc89 (diff) | |
| download | linux-f3f05a0ec584855c53f2d95024e23259f3ee101d.tar.gz linux-f3f05a0ec584855c53f2d95024e23259f3ee101d.tar.bz2 linux-f3f05a0ec584855c53f2d95024e23259f3ee101d.zip | |
drm/amdgpu: Use correct gfx deferred error count
In the case of parsing GFX deferred error from SMU corrected error
channel, the error count should be set to 1 instead of parsing from
MISC0 register, which is 0.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions