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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-11 19:24:18 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-15 00:14:00 +0200 |
| commit | 092706786e1143fa947f7387600d275113a4043c (patch) | |
| tree | 75cca23570927ffa86887700ae8ac867174c39e6 /drivers/gpu/drm/i915/display/intel_drrs.c | |
| parent | c25300f0797be30dd63d74fcc38b5238a2844932 (diff) | |
| download | linux-092706786e1143fa947f7387600d275113a4043c.tar.gz linux-092706786e1143fa947f7387600d275113a4043c.tar.bz2 linux-092706786e1143fa947f7387600d275113a4043c.zip | |
drm/i915: Introduce intel_panel_{fixed,downclock}_mode()
Abstract away the details on where we store the fixed/downclock
modes, and also how we select them. Will be useful for static
DRRS (aka. allowing the user to select the refresh rate for the
panel).
We pass in the user requested mode to intel_panel_fixed_mode()
so that in the future it may try to match the refresh rate.
And intel_panel_downclock_mode() gets passed the adjusted_mode
we actually chose to use so that it may find a suitable lower
resresh rate variant.
v2: Hook it up for all encoders
s/fixed_mode/adjusted_mode/ in intel_panel_downclock_mode() (Jani)
Elaborate on the choice or arguments for the functions (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220311172428.14685-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_drrs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_drrs.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c index 4afbc903f169..2a58bf4cb6cd 100644 --- a/drivers/gpu/drm/i915/display/intel_drrs.c +++ b/drivers/gpu/drm/i915/display/intel_drrs.c @@ -48,7 +48,8 @@ */ static bool can_enable_drrs(struct intel_connector *connector, - const struct intel_crtc_state *pipe_config) + const struct intel_crtc_state *pipe_config, + const struct drm_display_mode *downclock_mode) { const struct drm_i915_private *i915 = to_i915(connector->base.dev); @@ -64,7 +65,7 @@ static bool can_enable_drrs(struct intel_connector *connector, if (pipe_config->has_psr) return false; - return connector->panel.downclock_mode && + return downclock_mode && i915->vbt.drrs_type == DRRS_TYPE_SEAMLESS; } @@ -75,9 +76,11 @@ intel_drrs_compute_config(struct intel_dp *intel_dp, { struct intel_connector *connector = intel_dp->attached_connector; struct drm_i915_private *i915 = to_i915(connector->base.dev); + const struct drm_display_mode *downclock_mode = + intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode); int pixel_clock; - if (!can_enable_drrs(connector, pipe_config)) { + if (!can_enable_drrs(connector, pipe_config, downclock_mode)) { if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder)) intel_zero_m_n(&pipe_config->dp_m2_n2); return; @@ -88,7 +91,7 @@ intel_drrs_compute_config(struct intel_dp *intel_dp, pipe_config->has_drrs = true; - pixel_clock = connector->panel.downclock_mode->clock; + pixel_clock = downclock_mode->clock; if (pipe_config->splitter.enable) pixel_clock /= pipe_config->splitter.link_count; |