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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-01-28 12:37:46 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-02-01 11:17:38 +0200 |
| commit | 0adc41de818c1a051c18732db57b9ee95b30898e (patch) | |
| tree | cd9e6f70a1941ebb662a75438918d9ae2c62932e /drivers/gpu/drm/i915/display/intel_drrs.c | |
| parent | 5cd0664483c1be4a71bcf4ec643f5d3c782e0319 (diff) | |
| download | linux-0adc41de818c1a051c18732db57b9ee95b30898e.tar.gz linux-0adc41de818c1a051c18732db57b9ee95b30898e.tar.bz2 linux-0adc41de818c1a051c18732db57b9ee95b30898e.zip | |
drm/i915: Pass crtc+cpu_transcoder to intel_cpu_transcoder_set_m_n()
Instead of passing in the whole crtc state let's pass in just
the bits of state we need. This will help with the DRRS code
which shouldn't really be accessing the atomic state stuff directly
as it gets called outside the normal atomic flows.
v2: Fix set_m1_n1 vs. set_m2_n2 fumble for i9xx (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_drrs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_drrs.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c index a911066c7809..53f014b4436b 100644 --- a/drivers/gpu/drm/i915/display/intel_drrs.c +++ b/drivers/gpu/drm/i915/display/intel_drrs.c @@ -115,7 +115,10 @@ static void intel_drrs_set_refresh_rate_m_n(const struct intel_crtc_state *crtc_state, enum drrs_refresh_rate_type refresh_type) { - intel_cpu_transcoder_set_m1_n1(crtc_state, refresh_type == DRRS_LOW_RR ? + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + intel_cpu_transcoder_set_m1_n1(crtc, crtc_state->cpu_transcoder, + refresh_type == DRRS_LOW_RR ? &crtc_state->dp_m2_n2 : &crtc_state->dp_m_n); } |