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| author | Jani Nikula <jani.nikula@intel.com> | 2021-08-13 14:51:50 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-08-13 22:32:16 +0300 |
| commit | 3b4da8315addfe4661f3c25ea8a83097d965c67a (patch) | |
| tree | 656fe903f5d051f4f1a49dba056d604ac3833524 /drivers/gpu/drm/i915/display/intel_snps_phy.h | |
| parent | 0707570248b8b13008d0fca7cc4f6e1848f0d64f (diff) | |
| download | linux-3b4da8315addfe4661f3c25ea8a83097d965c67a.tar.gz linux-3b4da8315addfe4661f3c25ea8a83097d965c67a.tar.bz2 linux-3b4da8315addfe4661f3c25ea8a83097d965c67a.zip | |
drm/i915/dg2: use existing mechanisms for SNPS PHY translations
We use encoder->get_buf_trans() in many places, for example
intel_ddi_dp_voltage_max(), and the hook was set to some old platform's
function for DG2 SNPS PHY. Convert SNPS PHY to use the same translation
mechanisms as everything else.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210813115151.19290-2-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_snps_phy.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_snps_phy.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h index 6261ff88ef5c..a68547a6fee5 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.h +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h @@ -30,6 +30,7 @@ int intel_mpllb_calc_port_clock(struct intel_encoder *encoder, int intel_snps_phy_check_hdmi_link_rate(int clock); void intel_snps_phy_ddi_vswing_sequence(struct intel_encoder *encoder, - u32 level); + const struct intel_crtc_state *crtc_state, + int level); #endif /* __INTEL_SNPS_PHY_H__ */ |