| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW | Jisheng Zhang | 2024-01-09 | 1 | -0/+15 |
| * | riscv: mm: stub extable related functions/macros for !MMU | Jisheng Zhang | 2023-06-14 | 1 | -0/+6 |
| * | riscv: extable: add a dedicated uaccess handler | Jisheng Zhang | 2022-01-05 | 1 | -0/+23 |
| * | riscv: extable: add `type` and `data` fields | Jisheng Zhang | 2022-01-05 | 1 | -8/+17 |
| * | riscv: extable: consolidate definitions | Jisheng Zhang | 2022-01-05 | 1 | -0/+33 |
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