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path:
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/
drivers
/
clk
/
renesas
/
r8a7795-cpg-mssr.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: renesas: r8a7795: Constify r8a7795_*_clks
Marek Vasut
2023-09-26
1
-2
/
+2
*
clk: renesas: rcar-gen3: Add ADG clocks
Kuninori Morimoto
2023-08-15
1
-0
/
+1
*
clk: renesas: r8a7795: Add 3DGE and ZG support
Geert Uytterhoeven
2023-07-27
1
-0
/
+2
*
clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
Wolfram Sang
2023-02-10
1
-116
/
+10
*
clk: renesas: Move RPC core clocks
Geert Uytterhoeven
2022-04-13
1
-5
/
+4
*
clk: renesas: rcar-gen3: Add SDnH clock
Wolfram Sang
2021-11-19
1
-4
/
+8
*
clk: renesas: r8a779[56]x: Add MLP clocks
Andrey Gusakov
2021-10-15
1
-0
/
+1
*
clk: renesas: r8a7795: Add TMU clocks
Niklas Söderlund
2021-03-12
1
-0
/
+6
*
clk: renesas: rcar-gen3: Mark RWDT clocks as critical
Ulrich Hecht
2020-06-22
1
-1
/
+1
*
clk: renesas: r8a7795: Add RPC clocks
Dirk Behme
2020-02-10
1
-0
/
+8
*
clk: renesas: r8a7795: Add CMM clocks
Jacopo Mondi
2019-06-18
1
-0
/
+4
*
clk: renesas: r8a779{5|6|65}: Add TPU clock
Cao Van Dong
2019-05-21
1
-0
/
+1
*
clk: renesas: rcar-gen3: Rename DRIF clocks
Takeshi Kihara
2019-04-02
1
-9
/
+9
*
clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC
Takeshi Kihara
2019-04-02
1
-2
/
+2
*
clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC
Takeshi Kihara
2019-04-02
1
-2
/
+2
*
clk: renesas: rcar-gen3: Correct parent clock of HS-USB
Kazuya Mizuguchi
2019-04-02
1
-2
/
+2
*
clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI
Kazuya Mizuguchi
2019-04-02
1
-4
/
+4
*
clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2
Simon Horman
2019-04-02
1
-1
/
+1
*
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset
Simon Horman
2019-04-02
1
-2
/
+2
*
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor
Takeshi Kihara
2019-04-02
1
-2
/
+3
*
clk: renesas: r8a7795: Add CPEX clock
Geert Uytterhoeven
2018-12-04
1
-0
/
+1
*
Merge branch 'clk-renesas' into clk-next
Stephen Boyd
2018-10-18
1
-33
/
+34
|
\
|
*
clk: renesas: r8a7795: Add OSC EXTAL predivider configuration
Geert Uytterhoeven
2018-08-27
1
-33
/
+33
|
*
clk: renesas: rcar-gen3: Rename rint to .r
Geert Uytterhoeven
2018-08-27
1
-1
/
+2
*
|
clk: renesas: use SPDX identifier for Renesas drivers
Wolfram Sang
2018-08-30
1
-4
/
+1
|
/
*
clk: renesas: r8a7795: Add CCREE clock
Gilad Ben-Yossef
2018-06-19
1
-0
/
+1
*
clk: renesas: r8a7795: Add CR clock
Geert Uytterhoeven
2018-06-19
1
-0
/
+1
*
clk: renesas: r8a7795: Add Z2 clock
Takeshi Kihara
2018-02-12
1
-0
/
+1
*
clk: renesas: r8a7795: Add Z clock
Takeshi Kihara
2018-02-12
1
-0
/
+1
*
clk: renesas: r8a7795: Correct parent clock of INTC-AP
Geert Uytterhoeven
2017-10-16
1
-1
/
+2
*
clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3
Geert Uytterhoeven
2017-08-16
1
-17
/
+17
*
clk: renesas: r8a7795: Correct pwm, gpio, and i2c parent clocks on ES2.0
Geert Uytterhoeven
2017-05-15
1
-13
/
+26
*
clk: renesas: r8a7795: Add HS-USB ch3 clock
Takeshi Kihara
2017-05-15
1
-0
/
+1
*
clk: renesas: r8a7795: Add USB-DMAC ch3 clock
Takeshi Kihara
2017-05-15
1
-0
/
+2
*
clk: renesas: r8a7795: Add EHCI/OHCI ch3 clock
Takeshi Kihara
2017-05-15
1
-0
/
+1
*
clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
Geert Uytterhoeven
2017-03-30
1
-50
/
+151
*
clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
Geert Uytterhoeven
2017-03-21
1
-1
/
+1
*
clk: renesas: r8a7795: Reformat core clock table
Geert Uytterhoeven
2017-03-21
1
-10
/
+10
*
clk: renesas: r8a7795: Correct name of watchdog clock
Geert Uytterhoeven
2017-03-21
1
-1
/
+1
*
clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACs
Geert Uytterhoeven
2017-03-21
1
-2
/
+2
*
clk: renesas: r8a7795: Add IMR clocks
Sergei Shtylyov
2017-03-06
1
-0
/
+4
*
clk: renesas: r8a7795: Add IIC-DVFS clock
Keita Kobayashi
2017-01-27
1
-0
/
+1
*
clk: renesas: r8a7795: Fix HDMI parent clock
Takeshi Kihara
2016-11-07
1
-1
/
+1
*
clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driver
Geert Uytterhoeven
2016-11-02
1
-1
/
+7
*
Merge tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/k...
Stephen Boyd
2016-09-14
1
-0
/
+4
|
\
|
*
clk: renesas: r8a7795: Add CMT clocks
Bui Duc Phuc
2016-09-12
1
-0
/
+4
*
|
clk: renesas: r8a7795: Fix SD clocks
Yoshihiro Shimoda
2016-08-11
1
-4
/
+5
|
/
*
clk: renesas: r8a7795: Add THS/TSC clock
Khiem Nguyen
2016-06-21
1
-0
/
+1
*
clk: renesas: r8a7795: Add DRIF clock
Ramesh Shanmugasundaram
2016-06-21
1
-0
/
+8
*
clk: renesas: r8a7795: Correct lvds clock parent
Geert Uytterhoeven
2016-06-21
1
-1
/
+1
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