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path:
root
/
drivers
/
clk
/
renesas
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
clk: renesas: rcar-gen3: Extend SDnH divider table
Dirk Behme
2023-10-05
1
-1
/
+14
*
clk: renesas: r8a7795: Constify r8a7795_*_clks
Marek Vasut
2023-09-26
1
-2
/
+2
*
clk: renesas: r9a06g032: Name anonymous structs
Ralph Siemsen
2023-09-18
1
-30
/
+33
*
clk: renesas: r9a06g032: Fix kerneldoc warning
Ralph Siemsen
2023-09-18
1
-0
/
+1
*
clk: renesas: rzg2l: Use u32 for flag and mux_flags
Claudiu Beznea
2023-09-18
1
-2
/
+2
*
clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
Claudiu Beznea
2023-09-18
1
-5
/
+5
*
clk: renesas: rzg2l: Simplify the logic in rzg2l_mod_clock_endisable()
Claudiu Beznea
2023-09-18
1
-3
/
+2
*
clk: renesas: rzg2l: Use core->name for clock name
Claudiu Beznea
2023-09-18
1
-1
/
+1
*
clk: renesas: r9a06g032: Use for_each_compatible_node()
Yang Yingliang
2023-09-11
1
-3
/
+2
*
-
.
Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'c...
Stephen Boyd
2023-08-30
17
-19
/
+73
|
\
\
|
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*
clk: Explicitly include correct DT includes
Rob Herring
2023-07-19
3
-4
/
+1
|
|
/
|
/
|
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*
clk: renesas: rcar-gen3: Add ADG clocks
Kuninori Morimoto
2023-08-15
9
-1
/
+9
|
*
clk: renesas: r8a77965: Add 3DGE and ZG support
Geert Uytterhoeven
2023-07-27
1
-0
/
+2
|
*
clk: renesas: r8a7796: Add 3DGE and ZG support
Geert Uytterhoeven
2023-07-27
1
-0
/
+2
|
*
clk: renesas: r8a7795: Add 3DGE and ZG support
Geert Uytterhoeven
2023-07-27
1
-0
/
+2
|
*
clk: renesas: emev2: Remove obsolete clkdev registration
Geert Uytterhoeven
2023-07-27
1
-3
/
+0
|
*
clk: renesas: r9a07g043: Add MTU3a clock and reset entry
Biju Das
2023-07-25
1
-0
/
+3
|
*
clk: renesas: rzg2l: Simplify .determine_rate()
Christophe JAILLET
2023-07-11
1
-7
/
+1
|
*
clk: renesas: r9a09g011: Add CSI related clocks
Fabrizio Castro
2023-07-10
1
-0
/
+15
|
*
clk: renesas: r8a774b1: Add 3DGE and ZG support
Adam Ford
2023-07-10
1
-0
/
+2
|
*
clk: renesas: r8a774e1: Add 3DGE and ZG support
Adam Ford
2023-07-10
1
-0
/
+2
|
*
clk: renesas: r8a774a1: Add 3DGE and ZG support
Adam Ford
2023-07-10
1
-0
/
+2
|
*
clk: renesas: rcar-gen3: Add support for ZG clock
Adam Ford
2023-07-10
2
-4
/
+32
|
/
*
-
.
Merge branches 'clk-renesas', 'clk-determine-rate', 'clk-allwinner', 'clk-sam...
Stephen Boyd
2023-06-26
6
-49
/
+27
|
\
\
|
|
*
clk: renesas: r9a06g032: Add a determine_rate hook
Maxime Ripard
2023-06-08
1
-0
/
+1
|
|
/
|
/
|
|
*
clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic()
Geert Uytterhoeven
2023-06-05
1
-11
/
+5
|
*
clk: renesas: mstp: Convert to readl_poll_timeout_atomic()
Geert Uytterhoeven
2023-06-05
1
-11
/
+7
|
*
clk: renesas: cpg-mssr: Convert to readl_poll_timeout_atomic()
Geert Uytterhoeven
2023-06-05
1
-20
/
+11
|
*
clk: renesas: rzg2l: Fix CPG_SIPLL5_CLK1 register write
Biju Das
2023-05-23
2
-7
/
+2
|
*
clk: renesas: r8a779a0: Add PWM clock
Wolfram Sang
2023-05-08
1
-0
/
+1
|
/
*
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2023-04-29
7
-204
/
+591
|
\
|
*
clk: renesas: r8a77980: Add I2C5 clock
Nikita Yushchenko
2023-03-30
1
-0
/
+1
|
*
clk: renesas: Convert to platform remove callback returning void
Uwe Kleine-König
2023-03-16
1
-4
/
+2
|
*
clk: renesas: r9a06g032: Improve clock tables
Ralph Siemsen
2023-03-10
1
-153
/
+407
|
*
clk: renesas: r9a06g032: Document structs
Ralph Siemsen
2023-03-10
1
-1
/
+49
|
*
clk: renesas: r9a06g032: Drop unused fields
Ralph Siemsen
2023-03-10
1
-5
/
+10
|
*
clk: renesas: r9a06g032: Improve readability
Ralph Siemsen
2023-03-10
1
-41
/
+80
|
*
clk: renesas: r8a77980: Add Z2 clock
Geert Uytterhoeven
2023-03-10
1
-0
/
+1
|
*
clk: renesas: r8a77970: Add Z2 clock
Geert Uytterhoeven
2023-03-10
1
-0
/
+1
|
*
clk: renesas: r8a77995: Fix VIN parent clock
Geert Uytterhoeven
2023-03-06
1
-1
/
+1
|
*
clk: renesas: r8a77980: Add VIN clocks
Niklas Söderlund
2023-03-06
1
-0
/
+16
|
*
clk: renesas: r8a779g0: Add VIN clocks
Niklas Söderlund
2023-03-06
1
-0
/
+16
|
*
clk: renesas: r8a779g0: Add ISPCS clocks
Niklas Söderlund
2023-03-06
1
-0
/
+2
|
*
clk: renesas: r8a779g0: Add CSI-2 clocks
Niklas Söderlund
2023-03-06
1
-0
/
+3
|
*
clk: renesas: r8a779g0: Add thermal clock
Geert Uytterhoeven
2023-03-06
1
-0
/
+1
|
*
clk: renesas: r8a779g0: Add Audio clocks
Kuninori Morimoto
2023-03-06
1
-0
/
+2
|
*
clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H
Takeshi Kihara
2023-03-06
1
-4
/
+4
*
|
clk: renesas: remove MODULE_LICENSE in non-modules
Nick Alcock
2023-04-13
2
-2
/
+0
|
/
*
clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
Wolfram Sang
2023-02-10
5
-173
/
+13
*
clk: renesas: r8a779g0: Add CAN-FD clocks
Geert Uytterhoeven
2023-01-26
1
-0
/
+2
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