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path: root/drivers/gpu/drm/i915/display/intel_display_power.h
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* drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza2020-04-171-0/+1
* drm/i915: Add i915_lpsp_status debugfs attributeAnshuman Gupta2020-04-171-0/+2
* drm/i915: Power well id for ICL PG3Anshuman Gupta2020-04-171-1/+1
* drm/i915/tgl: Allow DC5/DC6 entry while PG2 is activeMatt Roper2020-02-261-0/+1
* drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy2020-02-051-0/+5
* drm/i915: fix comment for POWER_DOMAIN_TRANSCODER_VDSC_PW2Jani Nikula2019-12-231-1/+1
* drm/i915/tgl: Switch between dc3co and dc5 based on display idlenessAnshuman Gupta2019-10-081-0/+2
* drm/i915/tgl: Enable DC3CO state in "DC Off" power wellAnshuman Gupta2019-10-081-0/+1
* drm/i915: Align power domain names with port namesImre Deak2019-08-281-26/+14
* drm/i915: Move i915_power_well_id out of i915_reg.hDaniele Ceraolo Spurio2019-08-161-0/+21
* drm/i915: abstract display suspend/resume operationsRodrigo Vivi2019-08-071-12/+5
* drm/i915: Propagate "_remove" function name suffix downJanusz Krzysztofik2019-07-121-1/+1
* drm/i915/tgl: Add power well to support 4th pipeMika Kahola2019-07-111-0/+3
* drm/i915/tgl: Add power well supportImre Deak2019-07-111-1/+25
* drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder AJosé Roberto de Souza2019-07-111-1/+2
* drm/i915/ehl: Add support for DPLL4 (v10)Vivek Kasireddy2019-07-051-0/+1
* drm/i915: move modesetting core code under display/Jani Nikula2019-06-171-0/+288