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| author | Chuanhong Guo <gch981213@gmail.com> | 2019-07-13 17:59:03 +0800 |
|---|---|---|
| committer | Chuanhong Guo <gch981213@gmail.com> | 2019-07-16 09:50:16 +0800 |
| commit | fae125781eefcbc60e233c39b39a3c62120ae194 (patch) | |
| tree | d844fdde0c99faf5f2b07894ae417b26ca1a25ed /target/linux/ath79/image/generic.mk | |
| parent | 4a06d62f0e638a5edfc859bd8f3a58ab59f9790e (diff) | |
| download | openwrt-fae125781eefcbc60e233c39b39a3c62120ae194.tar.gz openwrt-fae125781eefcbc60e233c39b39a3c62120ae194.tar.bz2 openwrt-fae125781eefcbc60e233c39b39a3c62120ae194.zip | |
ramips: mtk-mmc: mt76x8: check ESD_MODE before applying AGPIO_CFG
Since mt76x8an ver1 eco2, SDXC pins can be switched to the
following pinmap:
sd_d1 -> PAD_I2S_SDI
sd_d0 -> PAD_I2S_WS
sd_cmd -> PAD_I2S_CLK
sd_d3 -> PAD_I2C_SCLK
sd_d2 -> PAD_I2C_SD
sd_clk -> PAD_GPIO0
sd_wp -> PAD_TXD1
sd_cd -> PAD_RXD1
To use this pinmap, one would need to set ESD_MODE bit (bit 15)
to 1 in GPIO1_MODE and switch other used pads into GPIO mode.
In this mode, we don't need to switch ethernet pins to digital
pad.
Check ESD_MODE bit before applying AGPIO_CFG and use rt_sysc_m32
to set it.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/ath79/image/generic.mk')
0 files changed, 0 insertions, 0 deletions