diff options
Diffstat (limited to 'target/linux/generic/backport-6.1')
78 files changed, 3556 insertions, 1005 deletions
diff --git a/target/linux/generic/backport-6.1/301-v6.9-kernel.h-removed-REPEAT_BYTE-from-kernel.h.patch b/target/linux/generic/backport-6.1/301-v6.9-kernel.h-removed-REPEAT_BYTE-from-kernel.h.patch new file mode 100644 index 0000000000..239adff1af --- /dev/null +++ b/target/linux/generic/backport-6.1/301-v6.9-kernel.h-removed-REPEAT_BYTE-from-kernel.h.patch @@ -0,0 +1,161 @@ +From 66a5c40f60f5d88ad8d47ba6a4ba05892853fa1f Mon Sep 17 00:00:00 2001 +From: Tanzir Hasan <tanzirh@google.com> +Date: Tue, 26 Dec 2023 18:00:00 +0000 +Subject: [PATCH] kernel.h: removed REPEAT_BYTE from kernel.h + +This patch creates wordpart.h and includes it in asm/word-at-a-time.h +for all architectures. WORD_AT_A_TIME_CONSTANTS depends on kernel.h +because of REPEAT_BYTE. Moving this to another header and including it +where necessary allows us to not include the bloated kernel.h. Making +this implicit dependency on REPEAT_BYTE explicit allows for later +improvements in the lib/string.c inclusion list. + +Suggested-by: Al Viro <viro@zeniv.linux.org.uk> +Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> +Signed-off-by: Tanzir Hasan <tanzirh@google.com> +Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> +Link: https://lore.kernel.org/r/20231226-libstringheader-v6-1-80aa08c7652c@google.com +Signed-off-by: Kees Cook <keescook@chromium.org> +--- + arch/arm/include/asm/word-at-a-time.h | 3 ++- + arch/arm64/include/asm/word-at-a-time.h | 3 ++- + arch/powerpc/include/asm/word-at-a-time.h | 4 ++-- + arch/riscv/include/asm/word-at-a-time.h | 3 ++- + arch/s390/include/asm/word-at-a-time.h | 3 ++- + arch/sh/include/asm/word-at-a-time.h | 2 ++ + arch/x86/include/asm/word-at-a-time.h | 3 ++- + arch/x86/kvm/mmu/mmu.c | 1 + + fs/namei.c | 2 +- + include/asm-generic/word-at-a-time.h | 3 ++- + include/linux/kernel.h | 8 -------- + include/linux/wordpart.h | 13 +++++++++++++ + 12 files changed, 31 insertions(+), 17 deletions(-) + create mode 100644 include/linux/wordpart.h + +--- a/arch/arm/include/asm/word-at-a-time.h ++++ b/arch/arm/include/asm/word-at-a-time.h +@@ -8,7 +8,8 @@ + * Little-endian word-at-a-time zero byte handling. + * Heavily based on the x86 algorithm. + */ +-#include <linux/kernel.h> ++#include <linux/bitops.h> ++#include <linux/wordpart.h> + + struct word_at_a_time { + const unsigned long one_bits, high_bits; +--- a/arch/arm64/include/asm/word-at-a-time.h ++++ b/arch/arm64/include/asm/word-at-a-time.h +@@ -9,7 +9,8 @@ + + #ifndef __AARCH64EB__ + +-#include <linux/kernel.h> ++#include <linux/bitops.h> ++#include <linux/wordpart.h> + + struct word_at_a_time { + const unsigned long one_bits, high_bits; +--- a/arch/powerpc/include/asm/word-at-a-time.h ++++ b/arch/powerpc/include/asm/word-at-a-time.h +@@ -4,8 +4,8 @@ + /* + * Word-at-a-time interfaces for PowerPC. + */ +- +-#include <linux/kernel.h> ++#include <linux/bitops.h> ++#include <linux/wordpart.h> + #include <asm/asm-compat.h> + #include <asm/extable.h> + +--- a/arch/sh/include/asm/word-at-a-time.h ++++ b/arch/sh/include/asm/word-at-a-time.h +@@ -5,6 +5,8 @@ + #ifdef CONFIG_CPU_BIG_ENDIAN + # include <asm-generic/word-at-a-time.h> + #else ++#include <linux/bitops.h> ++#include <linux/wordpart.h> + /* + * Little-endian version cribbed from x86. + */ +--- a/arch/x86/include/asm/word-at-a-time.h ++++ b/arch/x86/include/asm/word-at-a-time.h +@@ -2,7 +2,8 @@ + #ifndef _ASM_WORD_AT_A_TIME_H + #define _ASM_WORD_AT_A_TIME_H + +-#include <linux/kernel.h> ++#include <linux/bitops.h> ++#include <linux/wordpart.h> + + /* + * This is largely generic for little-endian machines, but the +--- a/arch/x86/kvm/mmu/mmu.c ++++ b/arch/x86/kvm/mmu/mmu.c +@@ -44,6 +44,7 @@ + #include <linux/kern_levels.h> + #include <linux/kstrtox.h> + #include <linux/kthread.h> ++#include <linux/wordpart.h> + + #include <asm/page.h> + #include <asm/memtype.h> +--- a/fs/namei.c ++++ b/fs/namei.c +@@ -17,8 +17,8 @@ + + #include <linux/init.h> + #include <linux/export.h> +-#include <linux/kernel.h> + #include <linux/slab.h> ++#include <linux/wordpart.h> + #include <linux/fs.h> + #include <linux/namei.h> + #include <linux/pagemap.h> +--- a/include/asm-generic/word-at-a-time.h ++++ b/include/asm-generic/word-at-a-time.h +@@ -2,7 +2,8 @@ + #ifndef _ASM_WORD_AT_A_TIME_H + #define _ASM_WORD_AT_A_TIME_H + +-#include <linux/kernel.h> ++#include <linux/bitops.h> ++#include <linux/wordpart.h> + #include <asm/byteorder.h> + + #ifdef __BIG_ENDIAN +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -36,14 +36,6 @@ + + #define STACK_MAGIC 0xdeadbeef + +-/** +- * REPEAT_BYTE - repeat the value @x multiple times as an unsigned long value +- * @x: value to repeat +- * +- * NOTE: @x is not checked for > 0xff; larger values produce odd results. +- */ +-#define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) +- + /* generic data direction definitions */ + #define READ 0 + #define WRITE 1 +--- /dev/null ++++ b/include/linux/wordpart.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++#ifndef _LINUX_WORDPART_H ++#define _LINUX_WORDPART_H ++/** ++ * REPEAT_BYTE - repeat the value @x multiple times as an unsigned long value ++ * @x: value to repeat ++ * ++ * NOTE: @x is not checked for > 0xff; larger values produce odd results. ++ */ ++#define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) ++ ++#endif // _LINUX_WORDPART_H diff --git a/target/linux/generic/backport-6.1/302-v6.9-kernel.h-Move-upper_-_bits-and-lower_-_bits-to-wordp.patch b/target/linux/generic/backport-6.1/302-v6.9-kernel.h-Move-upper_-_bits-and-lower_-_bits-to-wordp.patch new file mode 100644 index 0000000000..9bbd515852 --- /dev/null +++ b/target/linux/generic/backport-6.1/302-v6.9-kernel.h-Move-upper_-_bits-and-lower_-_bits-to-wordp.patch @@ -0,0 +1,107 @@ +From adeb04362d74188c1e22ccb824b15a0a7b3de2f4 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Date: Wed, 14 Feb 2024 19:26:32 +0200 +Subject: [PATCH] kernel.h: Move upper_*_bits() and lower_*_bits() to + wordpart.h + +The wordpart.h header is collecting APIs related to the handling +parts of the word (usually in byte granularity). The upper_*_bits() +and lower_*_bits() are good candidates to be moved to there. + +This helps to clean up header dependency hell with regard to kernel.h +as the latter gathers completely unrelated stuff together and slows +down compilation (especially when it's included into other header). + +Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Link: https://lore.kernel.org/r/20240214172752.3605073-1-andriy.shevchenko@linux.intel.com +Reviewed-by: Randy Dunlap <rdunlap@infradead.org> +Signed-off-by: Kees Cook <keescook@chromium.org> +--- + include/linux/kernel.h | 30 ++---------------------------- + include/linux/wordpart.h | 29 +++++++++++++++++++++++++++++ + 2 files changed, 31 insertions(+), 28 deletions(-) + +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -30,6 +30,8 @@ + #include <linux/build_bug.h> + #include <linux/static_call_types.h> + #include <linux/instruction_pointer.h> ++#include <linux/wordpart.h> ++ + #include <asm/byteorder.h> + + #include <uapi/linux/kernel.h> +@@ -55,34 +57,6 @@ + } \ + ) + +-/** +- * upper_32_bits - return bits 32-63 of a number +- * @n: the number we're accessing +- * +- * A basic shift-right of a 64- or 32-bit quantity. Use this to suppress +- * the "right shift count >= width of type" warning when that quantity is +- * 32-bits. +- */ +-#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) +- +-/** +- * lower_32_bits - return bits 0-31 of a number +- * @n: the number we're accessing +- */ +-#define lower_32_bits(n) ((u32)((n) & 0xffffffff)) +- +-/** +- * upper_16_bits - return bits 16-31 of a number +- * @n: the number we're accessing +- */ +-#define upper_16_bits(n) ((u16)((n) >> 16)) +- +-/** +- * lower_16_bits - return bits 0-15 of a number +- * @n: the number we're accessing +- */ +-#define lower_16_bits(n) ((u16)((n) & 0xffff)) +- + struct completion; + struct user; + +--- a/include/linux/wordpart.h ++++ b/include/linux/wordpart.h +@@ -2,6 +2,35 @@ + + #ifndef _LINUX_WORDPART_H + #define _LINUX_WORDPART_H ++ ++/** ++ * upper_32_bits - return bits 32-63 of a number ++ * @n: the number we're accessing ++ * ++ * A basic shift-right of a 64- or 32-bit quantity. Use this to suppress ++ * the "right shift count >= width of type" warning when that quantity is ++ * 32-bits. ++ */ ++#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) ++ ++/** ++ * lower_32_bits - return bits 0-31 of a number ++ * @n: the number we're accessing ++ */ ++#define lower_32_bits(n) ((u32)((n) & 0xffffffff)) ++ ++/** ++ * upper_16_bits - return bits 16-31 of a number ++ * @n: the number we're accessing ++ */ ++#define upper_16_bits(n) ((u16)((n) >> 16)) ++ ++/** ++ * lower_16_bits - return bits 0-15 of a number ++ * @n: the number we're accessing ++ */ ++#define lower_16_bits(n) ((u16)((n) & 0xffff)) ++ + /** + * REPEAT_BYTE - repeat the value @x multiple times as an unsigned long value + * @x: value to repeat diff --git a/target/linux/generic/backport-6.1/600-v6.9-01-net-gro-parse-ipv6-ext-headers-without-frag0-invalid.patch b/target/linux/generic/backport-6.1/600-v6.9-01-net-gro-parse-ipv6-ext-headers-without-frag0-invalid.patch new file mode 100644 index 0000000000..6dbec3c752 --- /dev/null +++ b/target/linux/generic/backport-6.1/600-v6.9-01-net-gro-parse-ipv6-ext-headers-without-frag0-invalid.patch @@ -0,0 +1,107 @@ +From: Richard Gobert <richardbgobert@gmail.com> +Date: Wed, 3 Jan 2024 15:44:21 +0100 +Subject: [PATCH] net: gro: parse ipv6 ext headers without frag0 invalidation + +The existing code always pulls the IPv6 header and sets the transport +offset initially. Then optionally again pulls any extension headers in +ipv6_gso_pull_exthdrs and sets the transport offset again on return from +that call. skb->data is set at the start of the first extension header +before calling ipv6_gso_pull_exthdrs, and must disable the frag0 +optimization because that function uses pskb_may_pull/pskb_pull instead of +skb_gro_ helpers. It sets the GRO offset to the TCP header with +skb_gro_pull and sets the transport header. Then returns skb->data to its +position before this block. + +This commit introduces a new helper function - ipv6_gro_pull_exthdrs - +which is used in ipv6_gro_receive to pull ipv6 ext headers instead of +ipv6_gso_pull_exthdrs. Thus, there is no modification of skb->data, all +operations use skb_gro_* helpers, and the frag0 fast path can be taken for +IPv6 packets with ext headers. + +Signed-off-by: Richard Gobert <richardbgobert@gmail.com> +Reviewed-by: Willem de Bruijn <willemb@google.com> +Reviewed-by: David Ahern <dsahern@kernel.org> +Reviewed-by: Eric Dumazet <edumazet@google.com> +Link: https://lore.kernel.org/r/504130f6-b56c-4dcc-882c-97942c59f5b7@gmail.com +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +--- + +--- a/net/ipv6/ip6_offload.c ++++ b/net/ipv6/ip6_offload.c +@@ -36,6 +36,40 @@ + INDIRECT_CALL_L4(cb, f2, f1, head, skb); \ + }) + ++static int ipv6_gro_pull_exthdrs(struct sk_buff *skb, int off, int proto) ++{ ++ const struct net_offload *ops = NULL; ++ struct ipv6_opt_hdr *opth; ++ ++ for (;;) { ++ int len; ++ ++ ops = rcu_dereference(inet6_offloads[proto]); ++ ++ if (unlikely(!ops)) ++ break; ++ ++ if (!(ops->flags & INET6_PROTO_GSO_EXTHDR)) ++ break; ++ ++ opth = skb_gro_header(skb, off + sizeof(*opth), off); ++ if (unlikely(!opth)) ++ break; ++ ++ len = ipv6_optlen(opth); ++ ++ opth = skb_gro_header(skb, off + len, off); ++ if (unlikely(!opth)) ++ break; ++ proto = opth->nexthdr; ++ ++ off += len; ++ } ++ ++ skb_gro_pull(skb, off - skb_network_offset(skb)); ++ return proto; ++} ++ + static int ipv6_gso_pull_exthdrs(struct sk_buff *skb, int proto) + { + const struct net_offload *ops = NULL; +@@ -224,28 +258,25 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * + goto out; + + skb_set_network_header(skb, off); +- skb_gro_pull(skb, sizeof(*iph)); +- skb_set_transport_header(skb, skb_gro_offset(skb)); + +- flush += ntohs(iph->payload_len) != skb_gro_len(skb); ++ flush += ntohs(iph->payload_len) != skb->len - hlen; + + proto = iph->nexthdr; + ops = rcu_dereference(inet6_offloads[proto]); + if (!ops || !ops->callbacks.gro_receive) { +- pskb_pull(skb, skb_gro_offset(skb)); +- skb_gro_frag0_invalidate(skb); +- proto = ipv6_gso_pull_exthdrs(skb, proto); +- skb_gro_pull(skb, -skb_transport_offset(skb)); +- skb_reset_transport_header(skb); +- __skb_push(skb, skb_gro_offset(skb)); ++ proto = ipv6_gro_pull_exthdrs(skb, hlen, proto); + + ops = rcu_dereference(inet6_offloads[proto]); + if (!ops || !ops->callbacks.gro_receive) + goto out; + +- iph = ipv6_hdr(skb); ++ iph = skb_gro_network_header(skb); ++ } else { ++ skb_gro_pull(skb, sizeof(*iph)); + } + ++ skb_set_transport_header(skb, skb_gro_offset(skb)); ++ + NAPI_GRO_CB(skb)->proto = proto; + + flush--; diff --git a/target/linux/generic/backport-6.1/766-v6.10-net-dsa-allow-DSA-switch-drivers-to-provide-their-ow.patch b/target/linux/generic/backport-6.1/766-v6.10-net-dsa-allow-DSA-switch-drivers-to-provide-their-ow.patch index 51250ac97a..0119925ab0 100644 --- a/target/linux/generic/backport-6.1/766-v6.10-net-dsa-allow-DSA-switch-drivers-to-provide-their-ow.patch +++ b/target/linux/generic/backport-6.1/766-v6.10-net-dsa-allow-DSA-switch-drivers-to-provide-their-ow.patch @@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c -@@ -1736,6 +1736,15 @@ static int dsa_switch_probe(struct dsa_s +@@ -1758,6 +1758,15 @@ static int dsa_switch_probe(struct dsa_s if (!ds->num_ports) return -EINVAL; diff --git a/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch b/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch index f662a76368..e0319fd355 100644 --- a/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch +++ b/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch @@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3010,9 +3010,6 @@ static void mt753x_phylink_get_caps(stru +@@ -3198,9 +3198,6 @@ static void mt753x_phylink_get_caps(stru config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; diff --git a/target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch b/target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch index 36ff3549e9..2697f2e563 100644 --- a/target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch +++ b/target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch @@ -44,7 +44,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> #include <linux/phylink.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> -@@ -2651,128 +2652,11 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2839,128 +2840,11 @@ static int mt7531_rgmii_setup(struct mt7 return 0; } @@ -173,7 +173,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static int mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) -@@ -2795,11 +2679,11 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2983,11 +2867,11 @@ mt7531_mac_config(struct dsa_switch *ds, phydev = dp->slave->phydev; return mt7531_rgmii_setup(priv, port, interface, phydev); case PHY_INTERFACE_MODE_SGMII: @@ -187,7 +187,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> default: return -EINVAL; } -@@ -2824,11 +2708,11 @@ mt753x_phylink_mac_select_pcs(struct dsa +@@ -3012,11 +2896,11 @@ mt753x_phylink_mac_select_pcs(struct dsa switch (interface) { case PHY_INTERFACE_MODE_TRGMII: @@ -201,7 +201,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> default: return NULL; } -@@ -3066,86 +2950,6 @@ static void mt7530_pcs_get_state(struct +@@ -3254,86 +3138,6 @@ static void mt7530_pcs_get_state(struct state->pause |= MLO_PAUSE_TX; } @@ -288,7 +288,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, const unsigned long *advertising, -@@ -3165,18 +2969,57 @@ static const struct phylink_pcs_ops mt75 +@@ -3353,18 +3157,57 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -352,7 +352,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> int i, ret; /* Initialise the PCS devices */ -@@ -3184,8 +3027,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3372,8 +3215,6 @@ mt753x_setup(struct dsa_switch *ds) priv->pcs[i].pcs.ops = priv->info->pcs_ops; priv->pcs[i].priv = priv; priv->pcs[i].port = i; @@ -361,7 +361,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } ret = priv->info->sw_setup(ds); -@@ -3200,6 +3041,16 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3388,6 +3229,16 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -378,7 +378,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> return ret; } -@@ -3291,7 +3142,7 @@ static const struct mt753x_info mt753x_t +@@ -3480,7 +3331,7 @@ static const struct mt753x_info mt753x_t }, [ID_MT7531] = { .id = ID_MT7531, @@ -387,7 +387,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .sw_setup = mt7531_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, -@@ -3399,7 +3250,7 @@ static void +@@ -3588,7 +3439,7 @@ static void mt7530_remove(struct mdio_device *mdiodev) { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); @@ -396,7 +396,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> if (!priv) return; -@@ -3418,6 +3269,10 @@ mt7530_remove(struct mdio_device *mdiode +@@ -3607,6 +3458,10 @@ mt7530_remove(struct mdio_device *mdiode mt7530_free_irq(priv); dsa_unregister_switch(priv->ds); @@ -409,7 +409,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -391,47 +391,8 @@ enum mt7530_vlan_port_acc_frm { +@@ -401,47 +401,8 @@ enum mt7530_vlan_port_acc_frm { CCR_TX_OCT_CNT_BAD) /* MT7531 SGMII register group */ @@ -459,7 +459,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> /* Register for system reset */ #define MT7530_SYS_CTRL 0x7000 -@@ -730,13 +691,13 @@ struct mt7530_fdb { +@@ -741,13 +702,13 @@ struct mt7530_fdb { * @pm: The matrix used to show all connections with the port. * @pvid: The VLAN specified is to be considered a PVID at ingress. Any * untagged frames will be assigned to the related VLAN. diff --git a/target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch b/target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch index ed24c452e2..1bf19a813e 100644 --- a/target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch +++ b/target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch @@ -18,7 +18,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3001,26 +3001,56 @@ static const struct regmap_bus mt7531_re +@@ -3189,26 +3189,56 @@ static const struct regmap_bus mt7531_re .reg_update_bits = mt7530_regmap_update_bits, }; @@ -88,7 +88,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> int i, ret; /* Initialise the PCS devices */ -@@ -3042,15 +3072,11 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3230,15 +3260,11 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); diff --git a/target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch b/target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch index 0298ebd274..bd28b4be76 100644 --- a/target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch +++ b/target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2974,7 +2974,7 @@ static int mt7530_regmap_read(void *cont +@@ -3162,7 +3162,7 @@ static int mt7530_regmap_read(void *cont { struct mt7530_priv *priv = context; @@ -28,7 +28,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return 0; }; -@@ -2982,23 +2982,25 @@ static int mt7530_regmap_write(void *con +@@ -3170,23 +3170,25 @@ static int mt7530_regmap_write(void *con { struct mt7530_priv *priv = context; @@ -62,7 +62,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> }; static int -@@ -3024,6 +3026,9 @@ mt7531_create_sgmii(struct mt7530_priv * +@@ -3212,6 +3214,9 @@ mt7531_create_sgmii(struct mt7530_priv * mt7531_pcs_config[i]->reg_stride = 4; mt7531_pcs_config[i]->reg_base = MT7531_SGMII_REG_BASE(5 + i); mt7531_pcs_config[i]->max_register = 0x17c; diff --git a/target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch b/target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch index e5625f67de..42c225d91c 100644 --- a/target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch +++ b/target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch @@ -133,7 +133,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> } static void -@@ -2970,22 +2991,6 @@ static const struct phylink_pcs_ops mt75 +@@ -3158,22 +3179,6 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -156,7 +156,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> static void mt7530_mdio_regmap_lock(void *mdio_lock) { -@@ -2998,7 +3003,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc +@@ -3186,7 +3191,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc mutex_unlock(mdio_lock); } @@ -165,7 +165,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> .reg_write = mt7530_regmap_write, .reg_read = mt7530_regmap_read, }; -@@ -3031,7 +3036,7 @@ mt7531_create_sgmii(struct mt7530_priv * +@@ -3219,7 +3224,7 @@ mt7531_create_sgmii(struct mt7530_priv * mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock; regmap = devm_regmap_init(priv->dev, @@ -174,7 +174,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> mt7531_pcs_config[i]); if (IS_ERR(regmap)) { ret = PTR_ERR(regmap); -@@ -3196,6 +3201,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match) +@@ -3385,6 +3390,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match) static int mt7530_probe(struct mdio_device *mdiodev) { @@ -182,7 +182,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> struct mt7530_priv *priv; struct device_node *dn; -@@ -3275,6 +3281,21 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3464,6 +3470,21 @@ mt7530_probe(struct mdio_device *mdiodev mutex_init(&priv->reg_mutex); dev_set_drvdata(&mdiodev->dev, priv); @@ -206,7 +206,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -774,6 +774,7 @@ struct mt753x_info { +@@ -785,6 +785,7 @@ struct mt753x_info { * @dev: The device pointer * @ds: The pointer to the dsa core structure * @bus: The bus used for the device and built-in PHY @@ -214,7 +214,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> * @rstc: The pointer to reset control used by MCM * @core_pwr: The power supplied into the core * @io_pwr: The power supplied into the I/O -@@ -794,6 +795,7 @@ struct mt7530_priv { +@@ -805,6 +806,7 @@ struct mt7530_priv { struct device *dev; struct dsa_switch *ds; struct mii_bus *bus; diff --git a/target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch b/target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch index ca1f38f9c2..9cd817c056 100644 --- a/target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch +++ b/target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch @@ -18,7 +18,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3082,12 +3082,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3270,12 +3270,6 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -31,7 +31,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return ret; } -@@ -3204,6 +3198,7 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3393,6 +3387,7 @@ mt7530_probe(struct mdio_device *mdiodev static struct regmap_config *regmap_config; struct mt7530_priv *priv; struct device_node *dn; @@ -39,7 +39,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> dn = mdiodev->dev.of_node; -@@ -3296,6 +3291,12 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3485,6 +3480,12 @@ mt7530_probe(struct mdio_device *mdiodev if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap); diff --git a/target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch b/target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch index 813e976810..4f77078eef 100644 --- a/target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch +++ b/target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch @@ -114,7 +114,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> } static void -@@ -645,14 +649,13 @@ static int +@@ -659,14 +663,13 @@ static int mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad, int regnum) { @@ -130,7 +130,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); -@@ -685,7 +688,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr +@@ -699,7 +702,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr ret = val & MT7531_MDIO_RW_DATA_MASK; out: @@ -139,7 +139,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return ret; } -@@ -694,14 +697,13 @@ static int +@@ -708,14 +711,13 @@ static int mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad, int regnum, u32 data) { @@ -155,7 +155,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); -@@ -733,7 +735,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p +@@ -747,7 +749,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p } out: @@ -164,7 +164,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return ret; } -@@ -741,14 +743,13 @@ out: +@@ -755,14 +757,13 @@ out: static int mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum) { @@ -180,7 +180,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); -@@ -771,7 +772,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr +@@ -785,7 +786,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr ret = val & MT7531_MDIO_RW_DATA_MASK; out: @@ -189,7 +189,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return ret; } -@@ -780,14 +781,13 @@ static int +@@ -794,14 +795,13 @@ static int mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, u16 data) { @@ -205,7 +205,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg, !(reg & MT7531_PHY_ACS_ST), 20, 100000); -@@ -809,7 +809,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p +@@ -823,7 +823,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p } out: @@ -214,7 +214,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return ret; } -@@ -1161,7 +1161,6 @@ static int +@@ -1343,7 +1343,6 @@ static int mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) { struct mt7530_priv *priv = ds->priv; @@ -222,7 +222,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> int length; u32 val; -@@ -1172,7 +1171,7 @@ mt7530_port_change_mtu(struct dsa_switch +@@ -1354,7 +1353,7 @@ mt7530_port_change_mtu(struct dsa_switch if (!dsa_is_cpu_port(ds, port)) return 0; @@ -231,7 +231,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> val = mt7530_mii_read(priv, MT7530_GMACCR); val &= ~MAX_RX_PKT_LEN_MASK; -@@ -1193,7 +1192,7 @@ mt7530_port_change_mtu(struct dsa_switch +@@ -1375,7 +1374,7 @@ mt7530_port_change_mtu(struct dsa_switch mt7530_mii_write(priv, MT7530_GMACCR, val); @@ -240,7 +240,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> return 0; } -@@ -1994,10 +1993,10 @@ mt7530_irq_thread_fn(int irq, void *dev_ +@@ -2176,10 +2175,10 @@ mt7530_irq_thread_fn(int irq, void *dev_ u32 val; int p; @@ -253,7 +253,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> for (p = 0; p < MT7530_NUM_PHYS; p++) { if (BIT(p) & val) { -@@ -2033,7 +2032,7 @@ mt7530_irq_bus_lock(struct irq_data *d) +@@ -2215,7 +2214,7 @@ mt7530_irq_bus_lock(struct irq_data *d) { struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); @@ -262,7 +262,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> } static void -@@ -2042,7 +2041,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da +@@ -2224,7 +2223,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable); diff --git a/target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch b/target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch index 177f6af780..9cb0b2dd61 100644 --- a/target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch +++ b/target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch @@ -21,7 +21,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -950,6 +950,24 @@ mt7530_set_ageing_time(struct dsa_switch +@@ -964,6 +964,24 @@ mt7530_set_ageing_time(struct dsa_switch return 0; } @@ -48,7 +48,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> struct mt7530_priv *priv = ds->priv; --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -709,24 +709,6 @@ enum p5_interface_select { +@@ -720,24 +720,6 @@ enum p5_interface_select { P5_INTF_SEL_GMAC5_SGMII, }; diff --git a/target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch b/target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch index 8950caaaef..a6af682826 100644 --- a/target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch +++ b/target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3210,44 +3210,21 @@ static const struct of_device_id mt7530_ +@@ -3399,44 +3399,21 @@ static const struct of_device_id mt7530_ MODULE_DEVICE_TABLE(of, mt7530_of_match); static int @@ -67,7 +67,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> if (!priv->info) return -EINVAL; -@@ -3261,23 +3238,53 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3450,23 +3427,53 @@ mt7530_probe(struct mdio_device *mdiodev return -EINVAL; priv->id = priv->info->id; @@ -131,7 +131,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> priv->reset = devm_gpiod_get_optional(&mdiodev->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(priv->reset)) { -@@ -3286,12 +3293,15 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3475,12 +3482,15 @@ mt7530_probe(struct mdio_device *mdiodev } } diff --git a/target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch b/target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch index 24eadb589e..4192753e89 100644 --- a/target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch +++ b/target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3328,6 +3328,17 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3517,6 +3517,17 @@ mt7530_probe(struct mdio_device *mdiodev } static void @@ -35,7 +35,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> mt7530_remove(struct mdio_device *mdiodev) { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); -@@ -3346,15 +3357,10 @@ mt7530_remove(struct mdio_device *mdiode +@@ -3535,15 +3546,10 @@ mt7530_remove(struct mdio_device *mdiode dev_err(priv->dev, "Failed to disable io pwr: %d\n", ret); diff --git a/target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch b/target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch index a6bb7d9e7b..72a499381f 100644 --- a/target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch +++ b/target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch @@ -420,7 +420,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> static u32 mt7530_mii_read(struct mt7530_priv *priv, u32 reg) { -@@ -3008,72 +2959,6 @@ static const struct phylink_pcs_ops mt75 +@@ -3196,72 +3147,6 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -493,7 +493,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> static int mt753x_setup(struct dsa_switch *ds) { -@@ -3132,7 +3017,7 @@ static int mt753x_set_mac_eee(struct dsa +@@ -3320,7 +3205,7 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -501,8 +501,8 @@ Signed-off-by: David S. Miller <davem@davemloft.net> +const struct dsa_switch_ops mt7530_switch_ops = { .get_tag_protocol = mtk_get_tag_protocol, .setup = mt753x_setup, - .get_strings = mt7530_get_strings, -@@ -3166,8 +3051,9 @@ static const struct dsa_switch_ops mt753 + .preferred_default_local_cpu_port = mt753x_preferred_default_local_cpu_port, +@@ -3355,8 +3240,9 @@ static const struct dsa_switch_ops mt753 .get_mac_eee = mt753x_get_mac_eee, .set_mac_eee = mt753x_set_mac_eee, }; @@ -513,7 +513,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> [ID_MT7621] = { .id = ID_MT7621, .pcs_ops = &mt7530_pcs_ops, -@@ -3200,16 +3086,9 @@ static const struct mt753x_info mt753x_t +@@ -3389,16 +3275,9 @@ static const struct mt753x_info mt753x_t .mac_port_config = mt7531_mac_config, }, }; @@ -532,7 +532,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> mt7530_probe_common(struct mt7530_priv *priv) { struct device *dev = priv->dev; -@@ -3246,88 +3125,9 @@ mt7530_probe_common(struct mt7530_priv * +@@ -3435,88 +3314,9 @@ mt7530_probe_common(struct mt7530_priv * return 0; } @@ -623,7 +623,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> mt7530_remove_common(struct mt7530_priv *priv) { if (priv->irq) -@@ -3337,55 +3137,7 @@ mt7530_remove_common(struct mt7530_priv +@@ -3526,55 +3326,7 @@ mt7530_remove_common(struct mt7530_priv mutex_destroy(&priv->reg_mutex); } @@ -682,7 +682,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch"); --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -834,4 +834,10 @@ static inline void INIT_MT7530_DUMMY_POL +@@ -845,4 +845,10 @@ static inline void INIT_MT7530_DUMMY_POL p->reg = reg; } diff --git a/target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch b/target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch index 9bc3f54c23..f5573fc6c4 100644 --- a/target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch +++ b/target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch @@ -184,7 +184,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> +MODULE_LICENSE("GPL"); --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2041,6 +2041,47 @@ static const struct irq_domain_ops mt753 +@@ -2223,6 +2223,47 @@ static const struct irq_domain_ops mt753 }; static void @@ -232,7 +232,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> mt7530_setup_mdio_irq(struct mt7530_priv *priv) { struct dsa_switch *ds = priv->ds; -@@ -2074,8 +2115,15 @@ mt7530_setup_irq(struct mt7530_priv *pri +@@ -2256,8 +2297,15 @@ mt7530_setup_irq(struct mt7530_priv *pri return priv->irq ? : -EINVAL; } @@ -250,7 +250,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> if (!priv->irq_domain) { dev_err(dev, "failed to create IRQ domain\n"); return -ENOMEM; -@@ -2574,6 +2622,25 @@ static void mt7531_mac_port_get_caps(str +@@ -2762,6 +2810,25 @@ static void mt7531_mac_port_get_caps(str } } @@ -276,7 +276,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> static int mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) { -@@ -2650,6 +2717,17 @@ static bool mt753x_is_mac_port(u32 port) +@@ -2838,6 +2905,17 @@ static bool mt753x_is_mac_port(u32 port) } static int @@ -294,7 +294,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2719,7 +2797,8 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2907,7 +2985,8 @@ mt753x_phylink_mac_config(struct dsa_swi switch (port) { case 0 ... 4: /* Internal phy */ @@ -304,7 +304,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> goto unsupported; break; case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ -@@ -2797,7 +2876,8 @@ static void mt753x_phylink_mac_link_up(s +@@ -2985,7 +3064,8 @@ static void mt753x_phylink_mac_link_up(s /* MT753x MAC works in 1G full duplex mode for all up-clocked * variants. */ @@ -314,7 +314,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> (phy_interface_mode_is_8023z(interface))) { speed = SPEED_1000; duplex = DUPLEX_FULL; -@@ -2877,6 +2957,21 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3065,6 +3145,21 @@ mt7531_cpu_port_config(struct dsa_switch return 0; } @@ -336,7 +336,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { -@@ -3019,6 +3114,27 @@ static int mt753x_set_mac_eee(struct dsa +@@ -3207,6 +3302,27 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -364,7 +364,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> const struct dsa_switch_ops mt7530_switch_ops = { .get_tag_protocol = mtk_get_tag_protocol, .setup = mt753x_setup, -@@ -3087,6 +3203,17 @@ const struct mt753x_info mt753x_table[] +@@ -3276,6 +3392,17 @@ const struct mt753x_info mt753x_table[] .mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_config = mt7531_mac_config, }, @@ -392,9 +392,9 @@ Signed-off-by: David S. Miller <davem@davemloft.net> }; #define NUM_TRGMII_CTRL 5 -@@ -54,11 +55,11 @@ enum mt753x_id { - #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) +@@ -59,11 +60,11 @@ enum mt753x_id { #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) + #define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) -#define MT753X_MIRROR_REG(id) (((id) == ID_MT7531) ? \ +#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ @@ -407,7 +407,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> MT7531_MIRROR_MASK : MIRROR_MASK) /* Registers for BPDU and PAE frame control*/ -@@ -322,9 +323,8 @@ enum mt7530_vlan_port_acc_frm { +@@ -332,9 +333,8 @@ enum mt7530_vlan_port_acc_frm { MT7531_FORCE_DPX | \ MT7531_FORCE_RX_FC | \ MT7531_FORCE_TX_FC) diff --git a/target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch b/target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch index ef2d07ab79..40209b0305 100644 --- a/target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch +++ b/target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch @@ -73,7 +73,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3081,6 +3081,12 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3269,6 +3269,12 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -88,7 +88,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -768,10 +768,10 @@ struct mt753x_info { +@@ -779,10 +779,10 @@ struct mt753x_info { * registers * @p6_interface Holding the current port 6 interface * @p5_intf_sel: Holding the current port 5 interface select @@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> */ struct mt7530_priv { struct device *dev; -@@ -790,7 +790,6 @@ struct mt7530_priv { +@@ -801,7 +801,6 @@ struct mt7530_priv { unsigned int p5_intf_sel; u8 mirror_rx; u8 mirror_tx; @@ -108,7 +108,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> struct mt7530_port ports[MT7530_NUM_PORTS]; struct mt753x_pcs pcs[MT7530_NUM_PORTS]; /* protect among processes for registers access*/ -@@ -798,6 +797,7 @@ struct mt7530_priv { +@@ -809,6 +808,7 @@ struct mt7530_priv { int irq; struct irq_domain *irq_domain; u32 irq_enable; diff --git a/target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch b/target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch deleted file mode 100644 index 068fb38a4e..0000000000 --- a/target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 4b11e3eb0eb7245a0d22a5dc4161c54eea42910c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> -Date: Sat, 17 Jun 2023 09:26:44 +0300 -Subject: [PATCH 16/48] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU -frames (further restricted by PCR_MATRIX). - -Currently the driver sets the first CPU port as the single port in this bit -mask, which works fine regardless of whether the device tree defines port -5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's -logic of picking the first CPU port as the CPU port that all user ports are -affine to, by default. - -An upcoming change would like to influence DSA's selection of the default -CPU port to no longer be the first one, and in that case, this logic needs -adaptation. - -Since there is no observed leakage or duplication of frames if all CPU -ports are defined in this bit mask, simply include them all. - -Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk> -Suggested-by: Vladimir Oltean <olteanv@gmail.com> -Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> -Reviewed-by: Vladimir Oltean <olteanv@gmail.com> -Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> -Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/mt7530.c | 15 +++++++-------- - drivers/net/dsa/mt7530.h | 1 + - 2 files changed, 8 insertions(+), 8 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1069,6 +1069,13 @@ mt753x_cpu_port_enable(struct dsa_switch - if (priv->id == ID_MT7530 || priv->id == ID_MT7621) - mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); - -+ /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on -+ * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that -+ * is affine to the inbound user port. -+ */ -+ if (priv->id == ID_MT7531 || priv->id == ID_MT7988) -+ mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port))); -+ - /* CPU port gets connected to all user ports of - * the switch. - */ -@@ -2411,16 +2418,8 @@ static int - mt7531_setup_common(struct dsa_switch *ds) - { - struct mt7530_priv *priv = ds->priv; -- struct dsa_port *cpu_dp; - int ret, i; - -- /* BPDU to CPU port */ -- dsa_switch_for_each_cpu_port(cpu_dp, ds) { -- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, -- BIT(cpu_dp->index)); -- break; -- } -- - mt753x_trap_frames(priv); - - /* Enable and reset MIB counters */ ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -54,6 +54,7 @@ enum mt753x_id { - #define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK) - #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) - #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) -+#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) - - #define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ - MT7531_CFC : MT7530_MFC) diff --git a/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch b/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch index bbf6d9b16f..78e332b1c2 100644 --- a/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch +++ b/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch @@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3036,7 +3036,7 @@ static void mt7530_pcs_get_state(struct +@@ -3225,7 +3225,7 @@ static void mt7530_pcs_get_state(struct state->pause |= MLO_PAUSE_TX; } @@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> phy_interface_t interface, const unsigned long *advertising, bool permit_pause_to_mac) -@@ -3064,6 +3064,7 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3253,6 +3253,7 @@ mt753x_setup(struct dsa_switch *ds) /* Initialise the PCS devices */ for (i = 0; i < priv->ds->num_ports; i++) { priv->pcs[i].pcs.ops = priv->info->pcs_ops; diff --git a/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch b/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch index e9a36eea41..d69ee7f104 100644 --- a/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch +++ b/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch @@ -24,7 +24,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2851,15 +2851,6 @@ static void mt753x_phylink_mac_link_down +@@ -3040,15 +3040,6 @@ static void mt753x_phylink_mac_link_down mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); } @@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface, -@@ -2948,8 +2939,6 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3137,8 +3128,6 @@ mt7531_cpu_port_config(struct dsa_switch return ret; mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPU_PORT_SETTING(priv->id)); diff --git a/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch b/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch index e8fec3f6a1..8af6820270 100644 --- a/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch +++ b/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch @@ -28,7 +28,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -829,8 +829,7 @@ mt7530_get_strings(struct dsa_switch *ds +@@ -843,8 +843,7 @@ mt7530_get_strings(struct dsa_switch *ds return; for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++) diff --git a/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch b/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch index 8b374679ca..4c6c057739 100644 --- a/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch +++ b/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch @@ -46,7 +46,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2175,24 +2175,40 @@ mt7530_free_irq_common(struct mt7530_pri +@@ -2350,24 +2350,40 @@ mt7530_free_irq_common(struct mt7530_pri static void mt7530_free_irq(struct mt7530_priv *priv) { @@ -92,7 +92,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> bus->priv = priv; bus->name = KBUILD_MODNAME "-mii"; snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); -@@ -2201,16 +2217,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr +@@ -2376,16 +2392,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr bus->parent = dev; bus->phy_mask = ~ds->phys_mii_mask; diff --git a/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch b/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch index 381902472c..0b141b4a3f 100644 --- a/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch +++ b/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch @@ -22,7 +22,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2883,8 +2883,7 @@ static void mt753x_phylink_mac_link_up(s +@@ -3072,8 +3072,7 @@ static void mt753x_phylink_mac_link_up(s /* MT753x MAC works in 1G full duplex mode for all up-clocked * variants. */ diff --git a/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch b/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch index c3f55f8106..44d8e07c12 100644 --- a/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch +++ b/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch @@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1064,10 +1064,6 @@ mt753x_cpu_port_enable(struct dsa_switch +@@ -1239,10 +1239,6 @@ mt753x_cpu_port_enable(struct dsa_switch mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port))); @@ -46,10 +46,10 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> - if (priv->id == ID_MT7530 || priv->id == ID_MT7621) - mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); - - /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on - * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that - * is affine to the inbound user port. -@@ -3125,6 +3121,36 @@ static int mt753x_set_mac_eee(struct dsa + /* Add the CPU port to the CPU port bitmap for MT7531. Trapped frames + * will be forwarded to the CPU port that is affine to the inbound user + * port. +@@ -3314,6 +3310,36 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -86,7 +86,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { return 0; -@@ -3179,6 +3205,7 @@ const struct dsa_switch_ops mt7530_switc +@@ -3369,6 +3395,7 @@ const struct dsa_switch_ops mt7530_switc .phylink_mac_link_up = mt753x_phylink_mac_link_up, .get_mac_eee = mt753x_get_mac_eee, .set_mac_eee = mt753x_set_mac_eee, @@ -96,7 +96,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -41,8 +41,8 @@ enum mt753x_id { +@@ -45,8 +45,8 @@ enum mt753x_id { #define UNU_FFP(x) (((x) & 0xff) << 8) #define UNU_FFP_MASK UNU_FFP(~0) #define CPU_EN BIT(7) @@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> #define MIRROR_EN BIT(3) #define MIRROR_PORT(x) ((x) & 0x7) #define MIRROR_MASK 0x7 -@@ -773,6 +773,7 @@ struct mt753x_info { +@@ -783,6 +783,7 @@ struct mt753x_info { * @irq_domain: IRQ domain of the switch irq_chip * @irq_enable: IRQ enable bits, synced to SYS_INT_EN * @create_sgmii: Pointer to function creating SGMII PCS instance(s) @@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> */ struct mt7530_priv { struct device *dev; -@@ -799,6 +800,7 @@ struct mt7530_priv { +@@ -809,6 +810,7 @@ struct mt7530_priv { struct irq_domain *irq_domain; u32 irq_enable; int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); diff --git a/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch b/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch index 35abed6b03..3454948b86 100644 --- a/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch +++ b/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch @@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -703,7 +703,7 @@ struct mt7530_port { +@@ -713,7 +713,7 @@ struct mt7530_port { /* Port 5 interface select definitions */ enum p5_interface_select { @@ -34,7 +34,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P4, P5_INTF_SEL_GMAC5, -@@ -789,7 +789,7 @@ struct mt7530_priv { +@@ -799,7 +799,7 @@ struct mt7530_priv { bool mcm; phy_interface_t p6_interface; phy_interface_t p5_interface; diff --git a/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch b/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch index 03329f8ba8..357579e2bd 100644 --- a/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch +++ b/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch @@ -65,7 +65,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> GFP_KERNEL); --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -473,15 +473,6 @@ mt7530_pad_clk_setup(struct dsa_switch * +@@ -487,15 +487,6 @@ mt7530_pad_clk_setup(struct dsa_switch * return 0; } @@ -81,7 +81,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static int mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { -@@ -496,9 +487,6 @@ mt7531_pll_setup(struct mt7530_priv *pri +@@ -510,9 +501,6 @@ mt7531_pll_setup(struct mt7530_priv *pri u32 xtal; u32 val; @@ -91,7 +91,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> val = mt7530_read(priv, MT7531_CREV); top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR); hwstrap = mt7530_read(priv, MT7531_HWTRAP); -@@ -913,8 +901,6 @@ static const char *p5_intf_modes(unsigne +@@ -927,8 +915,6 @@ static const char *p5_intf_modes(unsigne return "PHY P4"; case P5_INTF_SEL_GMAC5: return "GMAC5"; @@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> default: return "unknown"; } -@@ -2515,6 +2501,12 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2697,6 +2683,12 @@ mt7531_setup(struct dsa_switch *ds) return -ENODEV; } @@ -113,7 +113,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> /* all MACs must be forced link-down before sw reset */ for (i = 0; i < MT7530_NUM_PORTS; i++) mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); -@@ -2524,21 +2516,18 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2706,21 +2698,18 @@ mt7531_setup(struct dsa_switch *ds) SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); @@ -141,7 +141,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); -@@ -2598,11 +2587,6 @@ static void mt7530_mac_port_get_caps(str +@@ -2787,11 +2776,6 @@ static void mt7530_mac_port_get_caps(str } } @@ -153,7 +153,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { -@@ -2615,7 +2599,7 @@ static void mt7531_mac_port_get_caps(str +@@ -2804,7 +2788,7 @@ static void mt7531_mac_port_get_caps(str break; case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ @@ -162,7 +162,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> phy_interface_set_rgmii(config->supported_interfaces); break; } -@@ -2682,7 +2666,7 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2871,7 +2855,7 @@ static int mt7531_rgmii_setup(struct mt7 { u32 val; @@ -171,7 +171,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> dev_err(priv->dev, "RGMII mode is not available for port %d\n", port); return -EINVAL; -@@ -2925,7 +2909,7 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3114,7 +3098,7 @@ mt7531_cpu_port_config(struct dsa_switch switch (port) { case 5: @@ -180,7 +180,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> interface = PHY_INTERFACE_MODE_RGMII; else interface = PHY_INTERFACE_MODE_2500BASEX; -@@ -3083,7 +3067,7 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3272,7 +3256,7 @@ mt753x_setup(struct dsa_switch *ds) mt7530_free_irq_common(priv); if (priv->create_sgmii) { @@ -191,7 +191,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -707,7 +707,6 @@ enum p5_interface_select { +@@ -717,7 +717,6 @@ enum p5_interface_select { P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P4, P5_INTF_SEL_GMAC5, @@ -199,7 +199,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> }; struct mt7530_priv; -@@ -769,6 +768,8 @@ struct mt753x_info { +@@ -779,6 +778,8 @@ struct mt753x_info { * registers * @p6_interface Holding the current port 6 interface * @p5_intf_sel: Holding the current port 5 interface select @@ -208,7 +208,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> * @irq: IRQ number of the switch * @irq_domain: IRQ domain of the switch irq_chip * @irq_enable: IRQ enable bits, synced to SYS_INT_EN -@@ -790,6 +791,7 @@ struct mt7530_priv { +@@ -800,6 +801,7 @@ struct mt7530_priv { phy_interface_t p6_interface; phy_interface_t p5_interface; enum p5_interface_select p5_intf_sel; @@ -216,7 +216,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> u8 mirror_rx; u8 mirror_tx; struct mt7530_port ports[MT7530_NUM_PORTS]; -@@ -799,7 +801,7 @@ struct mt7530_priv { +@@ -809,7 +811,7 @@ struct mt7530_priv { int irq; struct irq_domain *irq_domain; u32 irq_enable; diff --git a/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch b/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch index 1489c4f2f3..46dbd53ede 100644 --- a/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch +++ b/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch @@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2565,12 +2565,14 @@ static void mt7530_mac_port_get_caps(str +@@ -2754,12 +2754,14 @@ static void mt7530_mac_port_get_caps(str struct phylink_config *config) { switch (port) { @@ -54,7 +54,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> phy_interface_set_rgmii(config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); -@@ -2578,7 +2580,8 @@ static void mt7530_mac_port_get_caps(str +@@ -2767,7 +2769,8 @@ static void mt7530_mac_port_get_caps(str config->supported_interfaces); break; @@ -64,7 +64,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> __set_bit(PHY_INTERFACE_MODE_RGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_TRGMII, -@@ -2593,19 +2596,24 @@ static void mt7531_mac_port_get_caps(str +@@ -2782,19 +2785,24 @@ static void mt7531_mac_port_get_caps(str struct mt7530_priv *priv = ds->priv; switch (port) { @@ -92,7 +92,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_1000BASEX, -@@ -2624,11 +2632,13 @@ static void mt7988_mac_port_get_caps(str +@@ -2813,11 +2821,13 @@ static void mt7988_mac_port_get_caps(str phy_interface_zero(config->supported_interfaces); switch (port) { @@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> case 6: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); -@@ -2792,12 +2802,12 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2981,12 +2991,12 @@ mt753x_phylink_mac_config(struct dsa_swi u32 mcr_cur, mcr_new; switch (port) { @@ -122,7 +122,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> if (priv->p5_interface == state->interface) break; -@@ -2807,7 +2817,7 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2996,7 +3006,7 @@ mt753x_phylink_mac_config(struct dsa_swi if (priv->p5_intf_sel != P5_DISABLED) priv->p5_interface = state->interface; break; diff --git a/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch b/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch index 6fbf259735..43f629b243 100644 --- a/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch +++ b/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch @@ -52,7 +52,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2353,16 +2353,15 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2532,16 +2532,15 @@ mt7530_setup(struct dsa_switch *ds) return ret; /* Setup port 5 */ @@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) -@@ -2393,6 +2392,8 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2572,6 +2571,8 @@ mt7530_setup(struct dsa_switch *ds) of_node_put(phy_node); break; } @@ -84,7 +84,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } #ifdef CONFIG_GPIOLIB -@@ -2403,8 +2404,6 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2582,8 +2583,6 @@ mt7530_setup(struct dsa_switch *ds) } #endif /* CONFIG_GPIOLIB */ diff --git a/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch b/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch index 94692d948f..385d587729 100644 --- a/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch +++ b/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch @@ -31,7 +31,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -971,8 +971,6 @@ static void mt7530_setup_port5(struct ds +@@ -985,8 +985,6 @@ static void mt7530_setup_port5(struct ds dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); diff --git a/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch b/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch index c121eb4a35..b4c0b75c49 100644 --- a/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch +++ b/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch @@ -30,7 +30,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -935,9 +935,6 @@ static void mt7530_setup_port5(struct ds +@@ -949,9 +949,6 @@ static void mt7530_setup_port5(struct ds /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ val &= ~MHWTRAP_P5_DIS; break; @@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> default: dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", priv->p5_intf_sel); -@@ -2358,8 +2355,6 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2537,8 +2534,6 @@ mt7530_setup(struct dsa_switch *ds) * Set priv->p5_intf_sel to the appropriate value if PHY muxing * is detected. */ @@ -49,7 +49,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) -@@ -2391,7 +2386,9 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2570,7 +2565,9 @@ mt7530_setup(struct dsa_switch *ds) break; } diff --git a/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch b/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch index 9b610e0bdb..89527e2b39 100644 --- a/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch +++ b/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch @@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -936,9 +936,7 @@ static void mt7530_setup_port5(struct ds +@@ -950,9 +950,7 @@ static void mt7530_setup_port5(struct ds val &= ~MHWTRAP_P5_DIS; break; default: @@ -48,7 +48,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } /* Setup RGMII settings */ -@@ -968,7 +966,6 @@ static void mt7530_setup_port5(struct ds +@@ -982,7 +980,6 @@ static void mt7530_setup_port5(struct ds dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); diff --git a/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch b/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch index dba1cb734e..0dc4baf0c7 100644 --- a/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch +++ b/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch @@ -24,7 +24,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -408,13 +408,6 @@ mt7530_pad_clk_setup(struct dsa_switch * +@@ -422,13 +422,6 @@ mt7530_pad_clk_setup(struct dsa_switch * xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; @@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> switch (interface) { case PHY_INTERFACE_MODE_RGMII: trgint = 0; -@@ -2286,6 +2279,12 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2461,6 +2454,12 @@ mt7530_setup(struct dsa_switch *ds) return -ENODEV; } diff --git a/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch b/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch index 90f8e095ef..46e1b50f24 100644 --- a/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch +++ b/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch @@ -38,7 +38,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -404,65 +404,54 @@ static int +@@ -418,65 +418,54 @@ static int mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv = ds->priv; diff --git a/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch b/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch index 93eccc8637..7d78b7df70 100644 --- a/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch +++ b/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch @@ -47,7 +47,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -400,8 +400,8 @@ static void mt7530_pll_setup(struct mt75 +@@ -414,8 +414,8 @@ mt753x_preferred_default_local_cpu_port( } /* Setup port 6 interface mode and TRGMII TX circuit */ @@ -58,7 +58,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> { struct mt7530_priv *priv = ds->priv; u32 ncpo1, ssc_delta, xtal; -@@ -412,7 +412,7 @@ mt7530_pad_clk_setup(struct dsa_switch * +@@ -426,7 +426,7 @@ mt7530_pad_clk_setup(struct dsa_switch * if (interface == PHY_INTERFACE_MODE_RGMII) { mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(0)); @@ -67,7 +67,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); -@@ -451,7 +451,11 @@ mt7530_pad_clk_setup(struct dsa_switch * +@@ -465,7 +465,11 @@ mt7530_pad_clk_setup(struct dsa_switch * /* Enable the MT7530 TRGMII clocks */ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); @@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> return 0; } -@@ -2640,11 +2644,10 @@ mt7530_mac_config(struct dsa_switch *ds, +@@ -2829,11 +2833,10 @@ mt7530_mac_config(struct dsa_switch *ds, { struct mt7530_priv *priv = ds->priv; diff --git a/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch b/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch index a423c0899c..725830e769 100644 --- a/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch +++ b/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch @@ -28,7 +28,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -453,18 +453,6 @@ mt7530_setup_port6(struct dsa_switch *ds +@@ -467,18 +467,6 @@ mt7530_setup_port6(struct dsa_switch *ds core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); } @@ -47,7 +47,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static void mt7531_pll_setup(struct mt7530_priv *priv) { -@@ -2631,14 +2619,6 @@ static void mt7988_mac_port_get_caps(str +@@ -2820,14 +2808,6 @@ static void mt7988_mac_port_get_caps(str } static int @@ -62,7 +62,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2803,8 +2783,6 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2992,8 +2972,6 @@ mt753x_phylink_mac_config(struct dsa_swi if (priv->p6_interface == state->interface) break; @@ -71,7 +71,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; -@@ -3127,11 +3105,6 @@ mt753x_conduit_state_change(struct dsa_s +@@ -3316,11 +3294,6 @@ mt753x_conduit_state_change(struct dsa_s mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); } @@ -83,7 +83,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> static int mt7988_setup(struct dsa_switch *ds) { struct mt7530_priv *priv = ds->priv; -@@ -3192,7 +3165,6 @@ const struct mt753x_info mt753x_table[] +@@ -3382,7 +3355,6 @@ const struct mt753x_info mt753x_table[] .sw_setup = mt7530_setup, .phy_read = mt7530_phy_read, .phy_write = mt7530_phy_write, @@ -91,7 +91,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .mac_port_get_caps = mt7530_mac_port_get_caps, .mac_port_config = mt7530_mac_config, }, -@@ -3202,7 +3174,6 @@ const struct mt753x_info mt753x_table[] +@@ -3392,7 +3364,6 @@ const struct mt753x_info mt753x_table[] .sw_setup = mt7530_setup, .phy_read = mt7530_phy_read, .phy_write = mt7530_phy_write, @@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .mac_port_get_caps = mt7530_mac_port_get_caps, .mac_port_config = mt7530_mac_config, }, -@@ -3212,7 +3183,6 @@ const struct mt753x_info mt753x_table[] +@@ -3402,7 +3373,6 @@ const struct mt753x_info mt753x_table[] .sw_setup = mt7531_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, @@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .cpu_port_config = mt7531_cpu_port_config, .mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_config = mt7531_mac_config, -@@ -3223,7 +3193,6 @@ const struct mt753x_info mt753x_table[] +@@ -3413,7 +3383,6 @@ const struct mt753x_info mt753x_table[] .sw_setup = mt7988_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, @@ -115,7 +115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .cpu_port_config = mt7988_cpu_port_config, .mac_port_get_caps = mt7988_mac_port_get_caps, .mac_port_config = mt7988_mac_config, -@@ -3253,9 +3222,8 @@ mt7530_probe_common(struct mt7530_priv * +@@ -3443,9 +3412,8 @@ mt7530_probe_common(struct mt7530_priv * /* Sanity check if these required device operations are filled * properly. */ @@ -129,7 +129,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -722,8 +722,6 @@ struct mt753x_pcs { +@@ -732,8 +732,6 @@ struct mt753x_pcs { * @sw_setup: Holding the handler to a device initialization * @phy_read: Holding the way reading PHY port * @phy_write: Holding the way writing PHY port @@ -138,7 +138,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> * @phy_mode_supported: Check if the PHY type is being supported on a certain * port * @mac_port_validate: Holding the way to set addition validate type for a -@@ -739,7 +737,6 @@ struct mt753x_info { +@@ -749,7 +747,6 @@ struct mt753x_info { int (*sw_setup)(struct dsa_switch *ds); int (*phy_read)(struct mt7530_priv *priv, int port, int regnum); int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); diff --git a/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch b/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch index 3667dbf54a..606c48234c 100644 --- a/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch +++ b/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch @@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2604,7 +2604,7 @@ static void mt7988_mac_port_get_caps(str +@@ -2793,7 +2793,7 @@ static void mt7988_mac_port_get_caps(str switch (port) { /* Ports which are connected to switch PHYs. There is no MII pinout. */ diff --git a/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch b/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch index 48433705f6..e2f1f23435 100644 --- a/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch +++ b/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch @@ -27,7 +27,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2600,8 +2600,6 @@ static void mt7531_mac_port_get_caps(str +@@ -2789,8 +2789,6 @@ static void mt7531_mac_port_get_caps(str static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { diff --git a/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch b/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch index b707de87ed..be6fe39f38 100644 --- a/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch +++ b/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch @@ -33,7 +33,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2683,17 +2683,6 @@ static bool mt753x_is_mac_port(u32 port) +@@ -2872,17 +2872,6 @@ static bool mt753x_is_mac_port(u32 port) } static int @@ -51,7 +51,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2733,6 +2722,9 @@ mt753x_mac_config(struct dsa_switch *ds, +@@ -2922,6 +2911,9 @@ mt753x_mac_config(struct dsa_switch *ds, { struct mt7530_priv *priv = ds->priv; @@ -61,7 +61,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> return priv->info->mac_port_config(ds, port, mode, state->interface); } -@@ -3193,7 +3185,6 @@ const struct mt753x_info mt753x_table[] +@@ -3383,7 +3375,6 @@ const struct mt753x_info mt753x_table[] .phy_write = mt7531_ind_phy_write, .cpu_port_config = mt7988_cpu_port_config, .mac_port_get_caps = mt7988_mac_port_get_caps, @@ -69,7 +69,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> }, }; EXPORT_SYMBOL_GPL(mt753x_table); -@@ -3221,8 +3212,7 @@ mt7530_probe_common(struct mt7530_priv * +@@ -3411,8 +3402,7 @@ mt7530_probe_common(struct mt7530_priv * * properly. */ if (!priv->info->sw_setup || !priv->info->phy_read || diff --git a/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch b/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch index 5dfb8bddbb..b8473ed128 100644 --- a/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch +++ b/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch @@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2084,7 +2084,7 @@ mt7530_setup_irq(struct mt7530_priv *pri +@@ -2259,7 +2259,7 @@ mt7530_setup_irq(struct mt7530_priv *pri } /* This register must be set for MT7530 to properly fire interrupts */ diff --git a/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch b/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch index 565f16a47f..216a781087 100644 --- a/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch +++ b/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch @@ -22,7 +22,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2478,14 +2478,12 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2660,14 +2660,12 @@ mt7531_setup(struct dsa_switch *ds) val = mt7530_read(priv, MT7531_TOP_SIG_SR); priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); diff --git a/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch b/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch index d636e2d564..f920a6604d 100644 --- a/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch +++ b/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch @@ -36,7 +36,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2614,7 +2614,7 @@ static void mt7988_mac_port_get_caps(str +@@ -2803,7 +2803,7 @@ static void mt7988_mac_port_get_caps(str } } @@ -45,7 +45,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2624,22 +2624,14 @@ mt7530_mac_config(struct dsa_switch *ds, +@@ -2813,22 +2813,14 @@ mt7530_mac_config(struct dsa_switch *ds, mt7530_setup_port5(priv->ds, interface); else if (port == 6) mt7530_setup_port6(priv->ds, interface); @@ -71,7 +71,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> val = mt7530_read(priv, MT7531_CLKGEN_CTRL); val |= GP_CLK_EN; val &= ~GP_MODE_MASK; -@@ -2667,20 +2659,14 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2856,20 +2848,14 @@ static int mt7531_rgmii_setup(struct mt7 case PHY_INTERFACE_MODE_RGMII_ID: break; default: @@ -95,7 +95,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2688,42 +2674,21 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2877,42 +2863,21 @@ mt7531_mac_config(struct dsa_switch *ds, struct phy_device *phydev; struct dsa_port *dp; @@ -143,7 +143,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> } static struct phylink_pcs * -@@ -2752,17 +2717,11 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2941,17 +2906,11 @@ mt753x_phylink_mac_config(struct dsa_swi u32 mcr_cur, mcr_new; switch (port) { @@ -162,7 +162,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> if (priv->p5_intf_sel != P5_DISABLED) priv->p5_interface = state->interface; -@@ -2771,16 +2730,10 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2960,16 +2919,10 @@ mt753x_phylink_mac_config(struct dsa_swi if (priv->p6_interface == state->interface) break; @@ -180,7 +180,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> } mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); -@@ -2863,7 +2816,6 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3052,7 +3005,6 @@ mt7531_cpu_port_config(struct dsa_switch struct mt7530_priv *priv = ds->priv; phy_interface_t interface; int speed; @@ -188,7 +188,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> switch (port) { case 5: -@@ -2888,9 +2840,8 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3077,9 +3029,8 @@ mt7531_cpu_port_config(struct dsa_switch else speed = SPEED_1000; @@ -202,7 +202,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -743,9 +743,9 @@ struct mt753x_info { +@@ -753,9 +753,9 @@ struct mt753x_info { void (*mac_port_validate)(struct dsa_switch *ds, int port, phy_interface_t interface, unsigned long *supported); diff --git a/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch b/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch index 60b369c8f8..eb0a5706ec 100644 --- a/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch +++ b/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch @@ -57,8 +57,8 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -995,18 +995,10 @@ mt753x_trap_frames(struct mt7530_priv *p - MT753X_BPDU_CPU_ONLY); +@@ -1170,18 +1170,10 @@ mt753x_trap_frames(struct mt7530_priv *p + MT753X_BPDU_CPU_ONLY); } -static int @@ -77,7 +77,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> /* Enable Mediatek header mode on the cpu port */ mt7530_write(priv, MT7530_PVC_P(port), -@@ -1032,8 +1024,6 @@ mt753x_cpu_port_enable(struct dsa_switch +@@ -1207,8 +1199,6 @@ mt753x_cpu_port_enable(struct dsa_switch /* Set to fallback mode for independent VLAN learning */ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, MT7530_PORT_FALLBACK_MODE); @@ -86,16 +86,16 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> } static int -@@ -2288,8 +2278,6 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2461,8 +2451,6 @@ mt7530_setup(struct dsa_switch *ds) val |= MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); - priv->p6_interface = PHY_INTERFACE_MODE_NA; - - mt753x_trap_frames(priv); + if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ) + mt7530_pll_setup(priv); - /* Enable and reset MIB counters */ -@@ -2304,9 +2292,7 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2480,9 +2468,7 @@ mt7530_setup(struct dsa_switch *ds) mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); if (dsa_is_cpu_port(ds, i)) { @@ -106,7 +106,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> } else { mt7530_port_disable(ds, i); -@@ -2410,9 +2396,7 @@ mt7531_setup_common(struct dsa_switch *d +@@ -2589,9 +2575,7 @@ mt7531_setup_common(struct dsa_switch *d mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); if (dsa_is_cpu_port(ds, i)) { @@ -117,7 +117,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> } else { mt7530_port_disable(ds, i); -@@ -2501,10 +2485,6 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2683,10 +2667,6 @@ mt7531_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); @@ -125,10 +125,10 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> - priv->p5_interface = PHY_INTERFACE_MODE_NA; - priv->p6_interface = PHY_INTERFACE_MODE_NA; - - /* Enable PHY core PLL, since phy_device has not yet been created - * provided for phy_[read,write]_mmd_indirect is called, we provide - * our own mt7531_ind_mmd_phy_[read,write] to complete this -@@ -2716,26 +2696,9 @@ mt753x_phylink_mac_config(struct dsa_swi + /* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since + * phy_device has not yet been created provided for + * phy_[read,write]_mmd_indirect is called, we provide our own +@@ -2905,26 +2885,9 @@ mt753x_phylink_mac_config(struct dsa_swi struct mt7530_priv *priv = ds->priv; u32 mcr_cur, mcr_new; @@ -156,7 +156,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); mcr_new = mcr_cur; mcr_new &= ~PMCR_LINK_SETTINGS_MASK; -@@ -2771,17 +2734,10 @@ static void mt753x_phylink_mac_link_up(s +@@ -2960,17 +2923,10 @@ static void mt753x_phylink_mac_link_up(s mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; @@ -176,7 +176,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mcr |= PMCR_FORCE_SPEED_1000; break; case SPEED_100: -@@ -2799,6 +2755,7 @@ static void mt753x_phylink_mac_link_up(s +@@ -2988,6 +2944,7 @@ static void mt753x_phylink_mac_link_up(s if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) { switch (speed) { case SPEED_1000: @@ -184,7 +184,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mcr |= PMCR_FORCE_EEE1G; break; case SPEED_100: -@@ -2810,61 +2767,6 @@ static void mt753x_phylink_mac_link_up(s +@@ -2999,61 +2956,6 @@ static void mt753x_phylink_mac_link_up(s mt7530_set(priv, MT7530_PMCR_P(port), mcr); } @@ -246,7 +246,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { -@@ -3122,7 +3024,6 @@ const struct mt753x_info mt753x_table[] +@@ -3312,7 +3214,6 @@ const struct mt753x_info mt753x_table[] .sw_setup = mt7531_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, @@ -254,7 +254,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> .mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_config = mt7531_mac_config, }, -@@ -3132,7 +3033,6 @@ const struct mt753x_info mt753x_table[] +@@ -3322,7 +3223,6 @@ const struct mt753x_info mt753x_table[] .sw_setup = mt7988_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, @@ -264,7 +264,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> }; --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -331,13 +331,6 @@ enum mt7530_vlan_port_acc_frm { +@@ -340,13 +340,6 @@ enum mt7530_vlan_port_acc_frm { PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ PMCR_FORCE_FDX | PMCR_FORCE_LNK | \ PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100) @@ -278,7 +278,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> #define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) #define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24) -@@ -737,7 +730,6 @@ struct mt753x_info { +@@ -747,7 +740,6 @@ struct mt753x_info { int (*sw_setup)(struct dsa_switch *ds); int (*phy_read)(struct mt7530_priv *priv, int port, int regnum); int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); @@ -286,7 +286,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); void (*mac_port_validate)(struct dsa_switch *ds, int port, -@@ -763,7 +755,6 @@ struct mt753x_info { +@@ -773,7 +765,6 @@ struct mt753x_info { * @ports: Holding the state among ports * @reg_mutex: The lock for protecting among process accessing * registers @@ -294,7 +294,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> * @p5_intf_sel: Holding the current port 5 interface select * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch * has got SGMII -@@ -785,8 +776,6 @@ struct mt7530_priv { +@@ -795,8 +786,6 @@ struct mt7530_priv { const struct mt753x_info *info; unsigned int id; bool mcm; diff --git a/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch b/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch index f14634c17a..c83a627808 100644 --- a/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch +++ b/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch @@ -18,7 +18,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2661,16 +2661,6 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2850,16 +2850,6 @@ mt7531_mac_config(struct dsa_switch *ds, } } @@ -35,7 +35,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> static struct phylink_pcs * mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port, phy_interface_t interface) -@@ -2696,8 +2686,8 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2885,8 +2875,8 @@ mt753x_phylink_mac_config(struct dsa_swi struct mt7530_priv *priv = ds->priv; u32 mcr_cur, mcr_new; diff --git a/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch b/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch index 2fa17d4558..84ee7416bf 100644 --- a/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch +++ b/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch @@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2845,17 +2845,9 @@ static int +@@ -3034,17 +3034,9 @@ static int mt753x_setup(struct dsa_switch *ds) { struct mt7530_priv *priv = ds->priv; @@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> if (ret) return ret; -@@ -2867,6 +2859,14 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3056,6 +3048,14 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); diff --git a/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch b/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch index d7c8180c8a..814a9d06e7 100644 --- a/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch +++ b/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch @@ -24,7 +24,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1047,7 +1047,6 @@ mt7530_port_enable(struct dsa_switch *ds +@@ -1222,7 +1222,6 @@ mt7530_port_enable(struct dsa_switch *ds priv->ports[port].enable = true; mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, priv->ports[port].pm); @@ -32,7 +32,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mutex_unlock(&priv->reg_mutex); -@@ -1067,7 +1066,6 @@ mt7530_port_disable(struct dsa_switch *d +@@ -1242,7 +1241,6 @@ mt7530_port_disable(struct dsa_switch *d priv->ports[port].enable = false; mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, PCR_MATRIX_CLR); @@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> mutex_unlock(&priv->reg_mutex); } -@@ -2284,6 +2282,12 @@ mt7530_setup(struct dsa_switch *ds) +@@ -2460,6 +2458,12 @@ mt7530_setup(struct dsa_switch *ds) mt7530_mib_reset(ds); for (i = 0; i < MT7530_NUM_PORTS; i++) { @@ -53,7 +53,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> /* Disable forwarding by default on all ports */ mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, PCR_MATRIX_CLR); -@@ -2386,6 +2390,12 @@ mt7531_setup_common(struct dsa_switch *d +@@ -2565,6 +2569,12 @@ mt7531_setup_common(struct dsa_switch *d UNU_FFP_MASK); for (i = 0; i < MT7530_NUM_PORTS; i++) { diff --git a/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch b/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch index d29b183be1..d9f91a932a 100644 --- a/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch +++ b/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch @@ -45,7 +45,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2694,23 +2694,13 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2883,23 +2883,13 @@ mt753x_phylink_mac_config(struct dsa_swi const struct phylink_link_state *state) { struct mt7530_priv *priv = ds->priv; @@ -72,7 +72,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port, --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -324,8 +324,6 @@ enum mt7530_vlan_port_acc_frm { +@@ -333,8 +333,6 @@ enum mt7530_vlan_port_acc_frm { MT7531_FORCE_DPX | \ MT7531_FORCE_RX_FC | \ MT7531_FORCE_TX_FC) diff --git a/target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch b/target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch deleted file mode 100644 index e00615d540..0000000000 --- a/target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch +++ /dev/null @@ -1,74 +0,0 @@ -From cfa7c85f92cd3814ad9748eb1ab25658c7f7cc67 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> -Date: Wed, 20 Mar 2024 23:45:30 +0300 -Subject: [PATCH 48/48] net: dsa: mt7530: fix improper frames on all 25MHz and - 40MHz XTAL MT7530 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The MT7530 switch after reset initialises with a core clock frequency that -works with a 25MHz XTAL connected to it. For 40MHz XTAL, the core clock -frequency must be set to 500MHz. - -The mt7530_pll_setup() function is responsible of setting the core clock -frequency. Currently, it runs on MT7530 with 25MHz and 40MHz XTAL. This -causes MT7530 switch with 25MHz XTAL to egress and ingress frames -improperly. - -Introduce a check to run it only on MT7530 with 40MHz XTAL. - -The core clock frequency is set by writing to a switch PHY's register. -Access to the PHY's register is done via the MDIO bus the switch is also -on. Therefore, it works only when the switch makes switch PHYs listen on -the MDIO bus the switch is on. This is controlled either by the state of -the ESW_P1_LED_1 pin after reset deassertion or modifying bit 5 of the -modifiable trap register. - -When ESW_P1_LED_1 is pulled high, PHY indirect access is used. That means -accessing PHY registers via the PHY indirect access control register of the -switch. - -When ESW_P1_LED_1 is pulled low, PHY direct access is used. That means -accessing PHY registers via the MDIO bus the switch is on. - -For MT7530 switch with 40MHz XTAL on a board with ESW_P1_LED_1 pulled high, -the core clock frequency won't be set to 500MHz, causing the switch to -egress and ingress frames improperly. - -Run mt7530_pll_setup() after PHY direct access is set on the modifiable -trap register. - -With these two changes, all MT7530 switches with 25MHz and 40MHz, and -P1_LED_1 pulled high or low, will egress and ingress frames properly. - -Link: https://github.com/BPI-SINOVOIP/BPI-R2-bsp/blob/4a5dd143f2172ec97a2872fa29c7c4cd520f45b5/linux-mt/drivers/net/ethernet/mediatek/gsw_mt7623.c#L1039 -Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") -Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> -Link: https://lore.kernel.org/r/20240320-for-net-mt7530-fix-25mhz-xtal-with-direct-phy-access-v1-1-d92f605f1160@arinc9.com -Signed-off-by: Paolo Abeni <pabeni@redhat.com> ---- - drivers/net/dsa/mt7530.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2259,8 +2259,6 @@ mt7530_setup(struct dsa_switch *ds) - SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | - SYS_CTRL_REG_RST); - -- mt7530_pll_setup(priv); -- - /* Lower Tx driving for TRGMII path */ - for (i = 0; i < NUM_TRGMII_CTRL; i++) - mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), -@@ -2276,6 +2274,9 @@ mt7530_setup(struct dsa_switch *ds) - val |= MHWTRAP_MANUAL; - mt7530_write(priv, MT7530_MHWTRAP, val); - -+ if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ) -+ mt7530_pll_setup(priv); -+ - mt753x_trap_frames(priv); - - /* Enable and reset MIB counters */ diff --git a/target/linux/generic/backport-6.1/790-47-v6.10-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch b/target/linux/generic/backport-6.1/790-47-v6.10-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch deleted file mode 100644 index dc202a55e6..0000000000 --- a/target/linux/generic/backport-6.1/790-47-v6.10-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch +++ /dev/null @@ -1,92 +0,0 @@ -From ef972fc9f5743da589ce9546dd565d6c56e679b8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> -Date: Mon, 8 Apr 2024 10:08:53 +0300 -Subject: [PATCH 1/2] net: dsa: mt7530: fix enabling EEE on MT7531 switch on - all boards -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") -brought EEE support but did not enable EEE on MT7531 switch MACs. EEE is -enabled on MT7531 switch MACs by pulling the LAN2LED0 pin low on the board -(bootstrapping), unsetting the EEE_DIS bit on the trap register, or setting -the internal EEE switch bit on the CORE_PLL_GROUP4 register. Thanks to -SkyLake Huang (黃啟澤) from MediaTek for providing information on the -internal EEE switch bit. - -There are existing boards that were not designed to pull the pin low. -Because of that, the EEE status currently depends on the board design. - -The EEE_DIS bit on the trap pertains to the LAN2LED0 pin which is usually -used to control an LED. Once the bit is unset, the pin will be low. That -will make the active low LED turn on. The pin is controlled by the switch -PHY. It seems that the PHY controls the pin in the way that it inverts the -pin state. That means depending on the wiring of the LED connected to -LAN2LED0 on the board, the LED may be on without an active link. - -To not cause this unwanted behaviour whilst enabling EEE on all boards, set -the internal EEE switch bit on the CORE_PLL_GROUP4 register. - -My testing on MT7531 shows a certain amount of traffic loss when EEE is -enabled. That said, I haven't come across a board that enables EEE. So -enable EEE on the switch MACs but disable EEE advertisement on the switch -PHYs. This way, we don't change the behaviour of the majority of the boards -that have this switch. The mediatek-ge PHY driver already disables EEE -advertisement on the switch PHYs but my testing shows that it is somehow -enabled afterwards. Disabling EEE advertisement before the PHY driver -initialises keeps it off. - -With this change, EEE can now be enabled using ethtool. - -Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") -Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> -Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> ---- - drivers/net/dsa/mt7530.c | 17 ++++++++++++----- - drivers/net/dsa/mt7530.h | 1 + - 2 files changed, 13 insertions(+), 5 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2496,18 +2496,25 @@ mt7531_setup(struct dsa_switch *ds) - mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, - MT7531_GPIO0_INTERRUPT); - -- /* Enable PHY core PLL, since phy_device has not yet been created -- * provided for phy_[read,write]_mmd_indirect is called, we provide -- * our own mt7531_ind_mmd_phy_[read,write] to complete this -- * function. -+ /* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since -+ * phy_device has not yet been created provided for -+ * phy_[read,write]_mmd_indirect is called, we provide our own -+ * mt7531_ind_mmd_phy_[read,write] to complete this function. - */ - val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR, - MDIO_MMD_VEND2, CORE_PLL_GROUP4); -- val |= MT7531_PHY_PLL_BYPASS_MODE; -+ val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE; - val &= ~MT7531_PHY_PLL_OFF; - mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2, - CORE_PLL_GROUP4, val); - -+ /* Disable EEE advertisement on the switch PHYs. */ -+ for (i = MT753X_CTRL_PHY_ADDR; -+ i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) { -+ mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV, -+ 0); -+ } -+ - mt7531_setup_common(ds); - - /* Setup VLAN ID 0 for VLAN-unaware bridges */ ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -616,6 +616,7 @@ enum mt7531_clk_skew { - #define RG_SYSPLL_DDSFBK_EN BIT(12) - #define RG_SYSPLL_BIAS_EN BIT(11) - #define RG_SYSPLL_BIAS_LPF_EN BIT(10) -+#define MT7531_RG_SYSPLL_DMY2 BIT(6) - #define MT7531_PHY_PLL_OFF BIT(5) - #define MT7531_PHY_PLL_BYPASS_MODE BIT(4) - diff --git a/target/linux/generic/backport-6.1/790-48-STABLE-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch b/target/linux/generic/backport-6.1/790-48-STABLE-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch deleted file mode 100644 index 4d70e774a4..0000000000 --- a/target/linux/generic/backport-6.1/790-48-STABLE-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch +++ /dev/null @@ -1,483 +0,0 @@ -From b7427d66cb3d6dca5165de5f7d80d59f08c2795b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> -Date: Tue, 9 Apr 2024 18:01:14 +0300 -Subject: [PATCH 2/2] net: dsa: mt7530: trap link-local frames regardless of ST - Port State -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer -(DLL) of the Open Systems Interconnection basic reference model (OSI/RM) -are described; the medium access control (MAC) and logical link control -(LLC) sublayers. The MAC sublayer is the one facing the physical layer. - -In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A -Bridge component comprises a MAC Relay Entity for interconnecting the Ports -of the Bridge, at least two Ports, and higher layer entities with at least -a Spanning Tree Protocol Entity included. - -Each Bridge Port also functions as an end station and shall provide the MAC -Service to an LLC Entity. Each instance of the MAC Service is provided to a -distinct LLC Entity that supports protocol identification, multiplexing, -and demultiplexing, for protocol data unit (PDU) transmission and reception -by one or more higher layer entities. - -It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC -Entity associated with each Bridge Port is modeled as being directly -connected to the attached Local Area Network (LAN). - -On the switch with CPU port architecture, CPU port functions as Management -Port, and the Management Port functionality is provided by software which -functions as an end station. Software is connected to an IEEE 802 LAN that -is wholly contained within the system that incorporates the Bridge. -Software provides access to the LLC Entity associated with each Bridge Port -by the value of the source port field on the special tag on the frame -received by software. - -We call frames that carry control information to determine the active -topology and current extent of each Virtual Local Area Network (VLAN), -i.e., spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN -Registration Protocol Data Units (MVRPDUs), and frames from other link -constrained protocols, such as Extensible Authentication Protocol over LAN -(EAPOL) and Link Layer Discovery Protocol (LLDP), link-local frames. They -are not forwarded by a Bridge. Permanently configured entries in the -filtering database (FDB) ensure that such frames are discarded by the -Forwarding Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in -detail: - -Each of the reserved MAC addresses specified in Table 8-1 -(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be -permanently configured in the FDB in C-VLAN components and ERs. - -Each of the reserved MAC addresses specified in Table 8-2 -(01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently -configured in the FDB in S-VLAN components. - -Each of the reserved MAC addresses specified in Table 8-3 -(01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB -in TPMR components. - -The FDB entries for reserved MAC addresses shall specify filtering for all -Bridge Ports and all VIDs. Management shall not provide the capability to -modify or remove entries for reserved MAC addresses. - -The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of -propagation of PDUs within a Bridged Network, as follows: - - The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that - no conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN) - component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward. - PDUs transmitted using this destination address, or any other addresses - that appear in Table 8-1, Table 8-2, and Table 8-3 - (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can - therefore travel no further than those stations that can be reached via a - single individual LAN from the originating station. - - The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an - address that no conformant S-VLAN component, C-VLAN component, or MAC - Bridge can forward; however, this address is relayed by a TPMR component. - PDUs using this destination address, or any of the other addresses that - appear in both Table 8-1 and Table 8-2 but not in Table 8-3 - (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed - by any TPMRs but will propagate no further than the nearest S-VLAN - component, C-VLAN component, or MAC Bridge. - - The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an - address that no conformant C-VLAN component, MAC Bridge can forward; - however, it is relayed by TPMR components and S-VLAN components. PDUs - using this destination address, or any of the other addresses that appear - in Table 8-1 but not in either Table 8-2 or Table 8-3 - (01-80-C2-00-00-[00,0B,0C,0D,0F]), will be relayed by TPMR components and - S-VLAN components but will propagate no further than the nearest C-VLAN - component or MAC Bridge. - -Because the LLC Entity associated with each Bridge Port is provided via CPU -port, we must not filter these frames but forward them to CPU port. - -In a Bridge, the transmission Port is majorly decided by ingress and egress -rules, FDB, and spanning tree Port State functions of the Forwarding -Process. For link-local frames, only CPU port should be designated as -destination port in the FDB, and the other functions of the Forwarding -Process must not interfere with the decision of the transmission Port. We -call this process trapping frames to CPU port. - -Therefore, on the switch with CPU port architecture, link-local frames must -be trapped to CPU port, and certain link-local frames received by a Port of -a Bridge comprising a TPMR component or an S-VLAN component must be -excluded from it. - -A Bridge of the switch with CPU port architecture cannot comprise a -Two-Port MAC Relay (TPMR) component as a TPMR component supports only a -subset of the functionality of a MAC Bridge. A Bridge comprising two Ports -(Management Port doesn't count) of this architecture will either function -as a standard MAC Bridge or a standard VLAN Bridge. - -Therefore, a Bridge of this architecture can only comprise S-VLAN -components, C-VLAN components, or MAC Bridge components. Since there's no -TPMR component, we don't need to relay PDUs using the destination addresses -specified on the Nearest non-TPMR section, and the proportion of the -Nearest Customer Bridge section where they must be relayed by TPMR -components. - -One option to trap link-local frames to CPU port is to add static FDB -entries with CPU port designated as destination port. However, because that -Independent VLAN Learning (IVL) is being used on every VID, each entry only -applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC -Bridge component or a C-VLAN component, there would have to be 16 times -4096 entries. This switch intellectual property can only hold a maximum of -2048 entries. Using this option, there also isn't a mechanism to prevent -link-local frames from being discarded when the spanning tree Port State of -the reception Port is discarding. - -The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4 -registers. Whilst this applies to every VID, it doesn't contain all of the -reserved MAC addresses without affecting the remaining Standard Group MAC -Addresses. The REV_UN frame tag utilised using the RGAC4 register covers -the remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination -addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF -destination addresses which may be relayed by MAC Bridges or VLAN Bridges. -The latter option provides better but not complete conformance. - -This switch intellectual property also does not provide a mechanism to trap -link-local frames with specific destination addresses to CPU port by -Bridge, to conform to the filtering rules for the distinct Bridge -components. - -Therefore, regardless of the type of the Bridge component, link-local -frames with these destination addresses will be trapped to CPU port: - -01-80-C2-00-00-[00,01,02,03,0E] - -In a Bridge comprising a MAC Bridge component or a C-VLAN component: - - Link-local frames with these destination addresses won't be trapped to - CPU port which won't conform to IEEE Std 802.1Q-2022: - - 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] - -In a Bridge comprising an S-VLAN component: - - Link-local frames with these destination addresses will be trapped to CPU - port which won't conform to IEEE Std 802.1Q-2022: - - 01-80-C2-00-00-00 - - Link-local frames with these destination addresses won't be trapped to - CPU port which won't conform to IEEE Std 802.1Q-2022: - - 01-80-C2-00-00-[04,05,06,07,08,09,0A] - -Currently on this switch intellectual property, if the spanning tree Port -State of the reception Port is discarding, link-local frames will be -discarded. - -To trap link-local frames regardless of the spanning tree Port State, make -the switch regard them as Bridge Protocol Data Units (BPDUs). This switch -intellectual property only lets the frames regarded as BPDUs bypass the -spanning tree Port State function of the Forwarding Process. - -With this change, the only remaining interference is the ingress rules. -When the reception Port has no PVID assigned on software, VLAN-untagged -frames won't be allowed in. There doesn't seem to be a mechanism on the -switch intellectual property to have link-local frames bypass this function -of the Forwarding Process. - -Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") -Reviewed-by: Daniel Golle <daniel@makrotopia.org> -Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> ---- - drivers/net/dsa/mt7530.c | 229 +++++++++++++++++++++++++++++++++------ - drivers/net/dsa/mt7530.h | 5 + - 2 files changed, 200 insertions(+), 34 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -943,20 +943,173 @@ static void mt7530_setup_port5(struct ds - mutex_unlock(&priv->reg_mutex); - } - --/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std -- * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA -- * must only be propagated to C-VLAN and MAC Bridge components. That means -- * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports, -- * these frames are supposed to be processed by the CPU (software). So we make -- * the switch only forward them to the CPU port. And if received from a CPU -- * port, forward to a single port. The software is responsible of making the -- * switch conform to the latter by setting a single port as destination port on -- * the special tag. -- * -- * This switch intellectual property cannot conform to this part of the standard -- * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC -- * DAs, it also includes :22-FF which the scope of propagation is not supposed -- * to be restricted for these MAC DAs. -+/* In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer (DLL) -+ * of the Open Systems Interconnection basic reference model (OSI/RM) are -+ * described; the medium access control (MAC) and logical link control (LLC) -+ * sublayers. The MAC sublayer is the one facing the physical layer. -+ * -+ * In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A -+ * Bridge component comprises a MAC Relay Entity for interconnecting the Ports -+ * of the Bridge, at least two Ports, and higher layer entities with at least a -+ * Spanning Tree Protocol Entity included. -+ * -+ * Each Bridge Port also functions as an end station and shall provide the MAC -+ * Service to an LLC Entity. Each instance of the MAC Service is provided to a -+ * distinct LLC Entity that supports protocol identification, multiplexing, and -+ * demultiplexing, for protocol data unit (PDU) transmission and reception by -+ * one or more higher layer entities. -+ * -+ * It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC -+ * Entity associated with each Bridge Port is modeled as being directly -+ * connected to the attached Local Area Network (LAN). -+ * -+ * On the switch with CPU port architecture, CPU port functions as Management -+ * Port, and the Management Port functionality is provided by software which -+ * functions as an end station. Software is connected to an IEEE 802 LAN that is -+ * wholly contained within the system that incorporates the Bridge. Software -+ * provides access to the LLC Entity associated with each Bridge Port by the -+ * value of the source port field on the special tag on the frame received by -+ * software. -+ * -+ * We call frames that carry control information to determine the active -+ * topology and current extent of each Virtual Local Area Network (VLAN), i.e., -+ * spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN Registration -+ * Protocol Data Units (MVRPDUs), and frames from other link constrained -+ * protocols, such as Extensible Authentication Protocol over LAN (EAPOL) and -+ * Link Layer Discovery Protocol (LLDP), link-local frames. They are not -+ * forwarded by a Bridge. Permanently configured entries in the filtering -+ * database (FDB) ensure that such frames are discarded by the Forwarding -+ * Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in detail: -+ * -+ * Each of the reserved MAC addresses specified in Table 8-1 -+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be -+ * permanently configured in the FDB in C-VLAN components and ERs. -+ * -+ * Each of the reserved MAC addresses specified in Table 8-2 -+ * (01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently -+ * configured in the FDB in S-VLAN components. -+ * -+ * Each of the reserved MAC addresses specified in Table 8-3 -+ * (01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB in -+ * TPMR components. -+ * -+ * The FDB entries for reserved MAC addresses shall specify filtering for all -+ * Bridge Ports and all VIDs. Management shall not provide the capability to -+ * modify or remove entries for reserved MAC addresses. -+ * -+ * The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of -+ * propagation of PDUs within a Bridged Network, as follows: -+ * -+ * The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that no -+ * conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN) -+ * component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward. -+ * PDUs transmitted using this destination address, or any other addresses -+ * that appear in Table 8-1, Table 8-2, and Table 8-3 -+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can -+ * therefore travel no further than those stations that can be reached via a -+ * single individual LAN from the originating station. -+ * -+ * The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an -+ * address that no conformant S-VLAN component, C-VLAN component, or MAC -+ * Bridge can forward; however, this address is relayed by a TPMR component. -+ * PDUs using this destination address, or any of the other addresses that -+ * appear in both Table 8-1 and Table 8-2 but not in Table 8-3 -+ * (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed by -+ * any TPMRs but will propagate no further than the nearest S-VLAN component, -+ * C-VLAN component, or MAC Bridge. -+ * -+ * The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an address -+ * that no conformant C-VLAN component, MAC Bridge can forward; however, it is -+ * relayed by TPMR components and S-VLAN components. PDUs using this -+ * destination address, or any of the other addresses that appear in Table 8-1 -+ * but not in either Table 8-2 or Table 8-3 (01-80-C2-00-00-[00,0B,0C,0D,0F]), -+ * will be relayed by TPMR components and S-VLAN components but will propagate -+ * no further than the nearest C-VLAN component or MAC Bridge. -+ * -+ * Because the LLC Entity associated with each Bridge Port is provided via CPU -+ * port, we must not filter these frames but forward them to CPU port. -+ * -+ * In a Bridge, the transmission Port is majorly decided by ingress and egress -+ * rules, FDB, and spanning tree Port State functions of the Forwarding Process. -+ * For link-local frames, only CPU port should be designated as destination port -+ * in the FDB, and the other functions of the Forwarding Process must not -+ * interfere with the decision of the transmission Port. We call this process -+ * trapping frames to CPU port. -+ * -+ * Therefore, on the switch with CPU port architecture, link-local frames must -+ * be trapped to CPU port, and certain link-local frames received by a Port of a -+ * Bridge comprising a TPMR component or an S-VLAN component must be excluded -+ * from it. -+ * -+ * A Bridge of the switch with CPU port architecture cannot comprise a Two-Port -+ * MAC Relay (TPMR) component as a TPMR component supports only a subset of the -+ * functionality of a MAC Bridge. A Bridge comprising two Ports (Management Port -+ * doesn't count) of this architecture will either function as a standard MAC -+ * Bridge or a standard VLAN Bridge. -+ * -+ * Therefore, a Bridge of this architecture can only comprise S-VLAN components, -+ * C-VLAN components, or MAC Bridge components. Since there's no TPMR component, -+ * we don't need to relay PDUs using the destination addresses specified on the -+ * Nearest non-TPMR section, and the proportion of the Nearest Customer Bridge -+ * section where they must be relayed by TPMR components. -+ * -+ * One option to trap link-local frames to CPU port is to add static FDB entries -+ * with CPU port designated as destination port. However, because that -+ * Independent VLAN Learning (IVL) is being used on every VID, each entry only -+ * applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC -+ * Bridge component or a C-VLAN component, there would have to be 16 times 4096 -+ * entries. This switch intellectual property can only hold a maximum of 2048 -+ * entries. Using this option, there also isn't a mechanism to prevent -+ * link-local frames from being discarded when the spanning tree Port State of -+ * the reception Port is discarding. -+ * -+ * The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4 -+ * registers. Whilst this applies to every VID, it doesn't contain all of the -+ * reserved MAC addresses without affecting the remaining Standard Group MAC -+ * Addresses. The REV_UN frame tag utilised using the RGAC4 register covers the -+ * remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination -+ * addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF -+ * destination addresses which may be relayed by MAC Bridges or VLAN Bridges. -+ * The latter option provides better but not complete conformance. -+ * -+ * This switch intellectual property also does not provide a mechanism to trap -+ * link-local frames with specific destination addresses to CPU port by Bridge, -+ * to conform to the filtering rules for the distinct Bridge components. -+ * -+ * Therefore, regardless of the type of the Bridge component, link-local frames -+ * with these destination addresses will be trapped to CPU port: -+ * -+ * 01-80-C2-00-00-[00,01,02,03,0E] -+ * -+ * In a Bridge comprising a MAC Bridge component or a C-VLAN component: -+ * -+ * Link-local frames with these destination addresses won't be trapped to CPU -+ * port which won't conform to IEEE Std 802.1Q-2022: -+ * -+ * 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] -+ * -+ * In a Bridge comprising an S-VLAN component: -+ * -+ * Link-local frames with these destination addresses will be trapped to CPU -+ * port which won't conform to IEEE Std 802.1Q-2022: -+ * -+ * 01-80-C2-00-00-00 -+ * -+ * Link-local frames with these destination addresses won't be trapped to CPU -+ * port which won't conform to IEEE Std 802.1Q-2022: -+ * -+ * 01-80-C2-00-00-[04,05,06,07,08,09,0A] -+ * -+ * To trap link-local frames to CPU port as conformant as this switch -+ * intellectual property can allow, link-local frames are made to be regarded as -+ * Bridge Protocol Data Units (BPDUs). This is because this switch intellectual -+ * property only lets the frames regarded as BPDUs bypass the spanning tree Port -+ * State function of the Forwarding Process. -+ * -+ * The only remaining interference is the ingress rules. When the reception Port -+ * has no PVID assigned on software, VLAN-untagged frames won't be allowed in. -+ * There doesn't seem to be a mechanism on the switch intellectual property to -+ * have link-local frames bypass this function of the Forwarding Process. - */ - static void - mt753x_trap_frames(struct mt7530_priv *priv) -@@ -964,35 +1117,43 @@ mt753x_trap_frames(struct mt7530_priv *p - /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them - * VLAN-untagged. - */ -- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK | -- MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | -- MT753X_BPDU_PORT_FW_MASK, -- MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | -- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -- MT753X_BPDU_CPU_ONLY); -+ mt7530_rmw(priv, MT753X_BPC, -+ MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK | -+ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | -+ MT753X_BPDU_PORT_FW_MASK, -+ MT753X_PAE_BPDU_FR | -+ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -+ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | -+ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -+ MT753X_BPDU_CPU_ONLY); - - /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress - * them VLAN-untagged. - */ -- mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK | -- MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK | -- MT753X_R01_PORT_FW_MASK, -- MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -- MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | -- MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -- MT753X_BPDU_CPU_ONLY); -+ mt7530_rmw(priv, MT753X_RGAC1, -+ MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK | -+ MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR | -+ MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK, -+ MT753X_R02_BPDU_FR | -+ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -+ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | -+ MT753X_R01_BPDU_FR | -+ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -+ MT753X_BPDU_CPU_ONLY); - - /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress - * them VLAN-untagged. - */ -- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK | -- MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK | -- MT753X_R03_PORT_FW_MASK, -- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | -- MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -- MT753X_BPDU_CPU_ONLY); -+ mt7530_rmw(priv, MT753X_RGAC2, -+ MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK | -+ MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR | -+ MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK, -+ MT753X_R0E_BPDU_FR | -+ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -+ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | -+ MT753X_R03_BPDU_FR | -+ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | -+ MT753X_BPDU_CPU_ONLY); - } - - static void ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -65,6 +65,7 @@ enum mt753x_id { - - /* Registers for BPDU and PAE frame control*/ - #define MT753X_BPC 0x24 -+#define MT753X_PAE_BPDU_FR BIT(25) - #define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22) - #define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x) - #define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16) -@@ -75,20 +76,24 @@ enum mt753x_id { - - /* Register for :01 and :02 MAC DA frame control */ - #define MT753X_RGAC1 0x28 -+#define MT753X_R02_BPDU_FR BIT(25) - #define MT753X_R02_EG_TAG_MASK GENMASK(24, 22) - #define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x) - #define MT753X_R02_PORT_FW_MASK GENMASK(18, 16) - #define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x) -+#define MT753X_R01_BPDU_FR BIT(9) - #define MT753X_R01_EG_TAG_MASK GENMASK(8, 6) - #define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x) - #define MT753X_R01_PORT_FW_MASK GENMASK(2, 0) - - /* Register for :03 and :0E MAC DA frame control */ - #define MT753X_RGAC2 0x2c -+#define MT753X_R0E_BPDU_FR BIT(25) - #define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22) - #define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x) - #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) - #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) -+#define MT753X_R03_BPDU_FR BIT(9) - #define MT753X_R03_EG_TAG_MASK GENMASK(8, 6) - #define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x) - #define MT753X_R03_PORT_FW_MASK GENMASK(2, 0) diff --git a/target/linux/generic/backport-6.1/790-49-v6.10-net-dsa-mt7530-provide-own-phylink-MAC-operations.patc b/target/linux/generic/backport-6.1/790-49-v6.10-net-dsa-mt7530-provide-own-phylink-MAC-operations.patch index ca2657d57d..8962e560f7 100644 --- a/target/linux/generic/backport-6.1/790-49-v6.10-net-dsa-mt7530-provide-own-phylink-MAC-operations.patc +++ b/target/linux/generic/backport-6.1/790-49-v6.10-net-dsa-mt7530-provide-own-phylink-MAC-operations.patch @@ -19,7 +19,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2841,28 +2841,34 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2861,28 +2861,34 @@ mt7531_mac_config(struct dsa_switch *ds, } static struct phylink_pcs * @@ -60,7 +60,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> if ((port == 5 || port == 6) && priv->info->mac_port_config) priv->info->mac_port_config(ds, port, mode, state->interface); -@@ -2872,23 +2878,25 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2892,23 +2898,25 @@ mt753x_phylink_mac_config(struct dsa_swi mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY); } @@ -92,7 +92,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> u32 mcr; mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; -@@ -2923,7 +2931,7 @@ static void mt753x_phylink_mac_link_up(s +@@ -2943,7 +2951,7 @@ static void mt753x_phylink_mac_link_up(s } } @@ -101,7 +101,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> } static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, -@@ -3148,16 +3156,19 @@ const struct dsa_switch_ops mt7530_switc +@@ -3169,16 +3177,19 @@ const struct dsa_switch_ops mt7530_switc .port_mirror_add = mt753x_port_mirror_add, .port_mirror_del = mt753x_port_mirror_del, .phylink_get_caps = mt753x_phylink_get_caps, @@ -125,7 +125,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> const struct mt753x_info mt753x_table[] = { [ID_MT7621] = { .id = ID_MT7621, -@@ -3227,6 +3238,7 @@ mt7530_probe_common(struct mt7530_priv * +@@ -3248,6 +3259,7 @@ mt7530_probe_common(struct mt7530_priv * priv->dev = dev; priv->ds->priv = priv; priv->ds->ops = &mt7530_switch_ops; diff --git a/target/linux/generic/backport-6.1/790-50-v6.10-net-dsa-mt7530-fix-mirroring-frames-received-on-loca.patch b/target/linux/generic/backport-6.1/790-50-v6.10-net-dsa-mt7530-fix-mirroring-frames-received-on-loca.patch deleted file mode 100644 index 7640a9cb41..0000000000 --- a/target/linux/generic/backport-6.1/790-50-v6.10-net-dsa-mt7530-fix-mirroring-frames-received-on-loca.patch +++ /dev/null @@ -1,70 +0,0 @@ -From d4097ddef078a113643a6dcde01e99741f852adb Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> -Date: Sat, 13 Apr 2024 16:01:39 +0300 -Subject: [PATCH 2/5] net: dsa: mt7530: fix mirroring frames received on local - port -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This switch intellectual property provides a bit on the ARL global control -register which controls allowing mirroring frames which are received on the -local port (monitor port). This bit is unset after reset. - -This ability must be enabled to fully support the port mirroring feature on -this switch intellectual property. - -Therefore, this patch fixes the traffic not being reflected on a port, -which would be configured like below: - - tc qdisc add dev swp0 clsact - - tc filter add dev swp0 ingress matchall skip_sw \ - action mirred egress mirror dev swp0 - -As a side note, this configuration provides the hairpinning feature for a -single port. - -Fixes: 37feab6076aa ("net: dsa: mt7530: add support for port mirroring") -Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/mt7530.c | 6 ++++++ - drivers/net/dsa/mt7530.h | 4 ++++ - 2 files changed, 10 insertions(+) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2471,6 +2471,9 @@ mt7530_setup(struct dsa_switch *ds) - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); - } - -+ /* Allow mirroring frames received on the local port (monitor port). */ -+ mt7530_set(priv, MT753X_AGC, LOCAL_EN); -+ - /* Setup VLAN ID 0 for VLAN-unaware bridges */ - ret = mt7530_setup_vlan0(priv); - if (ret) -@@ -2582,6 +2585,9 @@ mt7531_setup_common(struct dsa_switch *d - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); - } - -+ /* Allow mirroring frames received on the local port (monitor port). */ -+ mt7530_set(priv, MT753X_AGC, LOCAL_EN); -+ - /* Flush the FDB table */ - ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); - if (ret < 0) ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -32,6 +32,10 @@ enum mt753x_id { - #define SYSC_REG_RSTCTRL 0x34 - #define RESET_MCM BIT(2) - -+/* Register for ARL global control */ -+#define MT753X_AGC 0xc -+#define LOCAL_EN BIT(7) -+ - /* Registers to mac forward control for unknown frames */ - #define MT7530_MFC 0x10 - #define BC_FFP(x) (((x) & 0xff) << 24) diff --git a/target/linux/generic/backport-6.1/790-51-v6.10-net-dsa-mt7530-fix-port-mirroring-for-MT7988-SoC-swi.patch b/target/linux/generic/backport-6.1/790-51-v6.10-net-dsa-mt7530-fix-port-mirroring-for-MT7988-SoC-swi.patch index 304ea21adc..cd5b7b287d 100644 --- a/target/linux/generic/backport-6.1/790-51-v6.10-net-dsa-mt7530-fix-port-mirroring-for-MT7988-SoC-swi.patch +++ b/target/linux/generic/backport-6.1/790-51-v6.10-net-dsa-mt7530-fix-port-mirroring-for-MT7988-SoC-swi.patch @@ -26,7 +26,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net> --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1876,14 +1876,16 @@ mt7530_port_vlan_del(struct dsa_switch * +@@ -1890,14 +1890,16 @@ mt7530_port_vlan_del(struct dsa_switch * static int mt753x_mirror_port_get(unsigned int id, u32 val) { diff --git a/target/linux/generic/backport-6.1/790-52-v6.10-net-dsa-mt7530-mdio-read-PHY-address-of-switch-from-.patch b/target/linux/generic/backport-6.1/790-52-v6.10-net-dsa-mt7530-mdio-read-PHY-address-of-switch-from-.patch index 6b6a255e26..e9c8f955c9 100644 --- a/target/linux/generic/backport-6.1/790-52-v6.10-net-dsa-mt7530-mdio-read-PHY-address-of-switch-from-.patch +++ b/target/linux/generic/backport-6.1/790-52-v6.10-net-dsa-mt7530-mdio-read-PHY-address-of-switch-from-.patch @@ -184,7 +184,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com> err: if (ret < 0) dev_err(&bus->dev, -@@ -2670,16 +2678,19 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2684,16 +2692,19 @@ mt7531_setup(struct dsa_switch *ds) * phy_[read,write]_mmd_indirect is called, we provide our own * mt7531_ind_mmd_phy_[read,write] to complete this function. */ diff --git a/target/linux/generic/backport-6.1/790-54-v6.10-net-dsa-mt7530-disable-EEE-abilities-on-failure-on-M.patch b/target/linux/generic/backport-6.1/790-54-v6.10-net-dsa-mt7530-disable-EEE-abilities-on-failure-on-M.patch new file mode 100644 index 0000000000..44cf60cf14 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-54-v6.10-net-dsa-mt7530-disable-EEE-abilities-on-failure-on-M.patch @@ -0,0 +1,88 @@ +From 856e8954a0a88d1a4d2b43e9002b9249131a156f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:08 +0300 +Subject: [PATCH 01/15] net: dsa: mt7530: disable EEE abilities on failure on + MT7531 and MT7988 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 bits let the +PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits determine the 1G/100 EEE +abilities of the MAC. If MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 are +unset, the abilities are left to be determined by PHY auto polling. + +The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") +made it so that the PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits are set on +mt753x_phylink_mac_link_up(). But it did not set the MT7531_FORCE_EEE1G and +MT7531_FORCE_EEE100 bits. Because of this, the EEE abilities will be +determined by PHY auto polling, regardless of the result of phy_init_eee(). + +Define these bits and add them to the MT7531_FORCE_MODE mask which is set +in mt7531_setup_common(). With this, there won't be any EEE abilities set +when phy_init_eee() returns a negative value. + +Thanks to Russell for explaining when phy_init_eee() could return a +negative value below. + +Looking at phy_init_eee(), it could return a negative value when: + +1. phydev->drv is NULL +2. if genphy_c45_eee_is_active() returns negative +3. if genphy_c45_eee_is_active() returns zero, it returns -EPROTONOSUPPORT +4. if phy_set_bits_mmd() fails (e.g. communication error with the PHY) + +If we then look at genphy_c45_eee_is_active(), then: + +genphy_c45_read_eee_adv() and genphy_c45_read_eee_lpa() propagate their +non-zero return values, otherwise this function returns zero or positive +integer. + +If we then look at genphy_c45_read_eee_adv(), then a failure of +phy_read_mmd() would cause a negative value to be returned. + +Looking at genphy_c45_read_eee_lpa(), the same is true. + +So, it can be summarised as: + +- phydev->drv is NULL +- there is a communication error accessing the PHY +- EEE is not active + +otherwise, it returns zero on success. + +If one wishes to determine whether an error occurred vs EEE not being +supported through negotiation for the negotiated speed, if it returns +-EPROTONOSUPPORT in the latter case. Other error codes mean either the +driver has been unloaded or communication error. + +In conclusion, determining the EEE abilities by PHY auto polling shouldn't +result in having any EEE abilities enabled, when one of the last two +situations in the summary happens. And it seems that if phydev->drv is +NULL, there would be bigger problems with the device than a broken link. So +this is not a bugfix. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.h | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -328,11 +328,15 @@ enum mt7530_vlan_port_acc_frm { + #define MT7531_FORCE_DPX BIT(29) + #define MT7531_FORCE_RX_FC BIT(28) + #define MT7531_FORCE_TX_FC BIT(27) ++#define MT7531_FORCE_EEE100 BIT(26) ++#define MT7531_FORCE_EEE1G BIT(25) + #define MT7531_FORCE_MODE (MT7531_FORCE_LNK | \ + MT7531_FORCE_SPD | \ + MT7531_FORCE_DPX | \ + MT7531_FORCE_RX_FC | \ +- MT7531_FORCE_TX_FC) ++ MT7531_FORCE_TX_FC | \ ++ MT7531_FORCE_EEE100 | \ ++ MT7531_FORCE_EEE1G) + #define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \ + PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \ + PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ diff --git a/target/linux/generic/backport-6.1/790-55-v6.10-net-dsa-mt7530-refactor-MT7530_PMCR_P.patch b/target/linux/generic/backport-6.1/790-55-v6.10-net-dsa-mt7530-refactor-MT7530_PMCR_P.patch new file mode 100644 index 0000000000..158e5f8c00 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-55-v6.10-net-dsa-mt7530-refactor-MT7530_PMCR_P.patch @@ -0,0 +1,200 @@ +From 712ad00d2f43814c81a7abfcbc339690a05fb6a0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:09 +0300 +Subject: [PATCH 02/15] net: dsa: mt7530: refactor MT7530_PMCR_P() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7530_PMCR_P() registers are on MT7530, MT7531, and the switch on the +MT7988 SoC. Rename the definition for them to MT753X_PMCR_P(). Bit 15 is +for MT7530 only. Add MT7530 prefix to the definition for bit 15. + +Use GENMASK and FIELD_PREP for PMCR_IFG_XMIT(). + +Rename PMCR_TX_EN and PMCR_RX_EN to PMCR_MAC_TX_EN and PMCR_MAC_TX_EN to +follow the naming on the "MT7621 Giga Switch Programming Guide v0.3", +"MT7531 Reference Manual for Development Board v1.0", and "MT7988A Wi-Fi 7 +Generation Router Platform: Datasheet (Open Version) v0.1" documents. + +These documents show that PMCR_RX_FC_EN is at bit 5. Correct this along +with renaming it to PMCR_FORCE_RX_FC_EN, and the same for PMCR_TX_FC_EN. + +Remove PMCR_SPEED_MASK which doesn't have a use. + +Rename the force mode definitions for MT7531 to FORCE_MODE. Add MASK at the +end for the mask that includes all force mode definitions. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 24 ++++++++--------- + drivers/net/dsa/mt7530.h | 58 +++++++++++++++++++++------------------- + 2 files changed, 42 insertions(+), 40 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -903,7 +903,7 @@ static void mt7530_setup_port5(struct ds + val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS; + + /* Setup the MAC by default for the cpu port */ +- mt7530_write(priv, MT7530_PMCR_P(5), 0x56300); ++ mt7530_write(priv, MT753X_PMCR_P(5), 0x56300); + break; + case P5_INTF_SEL_GMAC5: + /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ +@@ -2449,8 +2449,8 @@ mt7530_setup(struct dsa_switch *ds) + /* Clear link settings and enable force mode to force link down + * on all ports until they're enabled later. + */ +- mt7530_rmw(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | +- PMCR_FORCE_MODE, PMCR_FORCE_MODE); ++ mt7530_rmw(priv, MT753X_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | ++ MT7530_FORCE_MODE, MT7530_FORCE_MODE); + + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, +@@ -2560,8 +2560,8 @@ mt7531_setup_common(struct dsa_switch *d + /* Clear link settings and enable force mode to force link down + * on all ports until they're enabled later. + */ +- mt7530_rmw(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | +- MT7531_FORCE_MODE, MT7531_FORCE_MODE); ++ mt7530_rmw(priv, MT753X_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | ++ MT7531_FORCE_MODE_MASK, MT7531_FORCE_MODE_MASK); + + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, +@@ -2644,7 +2644,7 @@ mt7531_setup(struct dsa_switch *ds) + + /* Force link down on all ports before internal reset */ + for (i = 0; i < MT7530_NUM_PORTS; i++) +- mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); ++ mt7530_write(priv, MT753X_PMCR_P(i), MT7531_FORCE_MODE_LNK); + + /* Reset the switch through internal reset */ + mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); +@@ -2886,7 +2886,7 @@ mt753x_phylink_mac_config(struct phylink + + /* Are we connected to external phy */ + if (port == 5 && dsa_is_user_port(ds, 5)) +- mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY); ++ mt7530_set(priv, MT753X_PMCR_P(port), PMCR_EXT_PHY); + } + + static void mt753x_phylink_mac_link_down(struct phylink_config *config, +@@ -2896,7 +2896,7 @@ static void mt753x_phylink_mac_link_down + struct dsa_port *dp = dsa_phylink_to_port(config); + struct mt7530_priv *priv = dp->ds->priv; + +- mt7530_clear(priv, MT7530_PMCR_P(dp->index), PMCR_LINK_SETTINGS_MASK); ++ mt7530_clear(priv, MT753X_PMCR_P(dp->index), PMCR_LINK_SETTINGS_MASK); + } + + static void mt753x_phylink_mac_link_up(struct phylink_config *config, +@@ -2910,7 +2910,7 @@ static void mt753x_phylink_mac_link_up(s + struct mt7530_priv *priv = dp->ds->priv; + u32 mcr; + +- mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; ++ mcr = PMCR_MAC_RX_EN | PMCR_MAC_TX_EN | PMCR_FORCE_LNK; + + switch (speed) { + case SPEED_1000: +@@ -2925,9 +2925,9 @@ static void mt753x_phylink_mac_link_up(s + if (duplex == DUPLEX_FULL) { + mcr |= PMCR_FORCE_FDX; + if (tx_pause) +- mcr |= PMCR_TX_FC_EN; ++ mcr |= PMCR_FORCE_TX_FC_EN; + if (rx_pause) +- mcr |= PMCR_RX_FC_EN; ++ mcr |= PMCR_FORCE_RX_FC_EN; + } + + if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) { +@@ -2942,7 +2942,7 @@ static void mt753x_phylink_mac_link_up(s + } + } + +- mt7530_set(priv, MT7530_PMCR_P(dp->index), mcr); ++ mt7530_set(priv, MT753X_PMCR_P(dp->index), mcr); + } + + static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -304,44 +304,46 @@ enum mt7530_vlan_port_acc_frm { + #define G0_PORT_VID_DEF G0_PORT_VID(0) + + /* Register for port MAC control register */ +-#define MT7530_PMCR_P(x) (0x3000 + ((x) * 0x100)) +-#define PMCR_IFG_XMIT(x) (((x) & 0x3) << 18) ++#define MT753X_PMCR_P(x) (0x3000 + ((x) * 0x100)) ++#define PMCR_IFG_XMIT_MASK GENMASK(19, 18) ++#define PMCR_IFG_XMIT(x) FIELD_PREP(PMCR_IFG_XMIT_MASK, x) + #define PMCR_EXT_PHY BIT(17) + #define PMCR_MAC_MODE BIT(16) +-#define PMCR_FORCE_MODE BIT(15) +-#define PMCR_TX_EN BIT(14) +-#define PMCR_RX_EN BIT(13) ++#define MT7530_FORCE_MODE BIT(15) ++#define PMCR_MAC_TX_EN BIT(14) ++#define PMCR_MAC_RX_EN BIT(13) + #define PMCR_BACKOFF_EN BIT(9) + #define PMCR_BACKPR_EN BIT(8) + #define PMCR_FORCE_EEE1G BIT(7) + #define PMCR_FORCE_EEE100 BIT(6) +-#define PMCR_TX_FC_EN BIT(5) +-#define PMCR_RX_FC_EN BIT(4) ++#define PMCR_FORCE_RX_FC_EN BIT(5) ++#define PMCR_FORCE_TX_FC_EN BIT(4) + #define PMCR_FORCE_SPEED_1000 BIT(3) + #define PMCR_FORCE_SPEED_100 BIT(2) + #define PMCR_FORCE_FDX BIT(1) + #define PMCR_FORCE_LNK BIT(0) +-#define PMCR_SPEED_MASK (PMCR_FORCE_SPEED_100 | \ +- PMCR_FORCE_SPEED_1000) +-#define MT7531_FORCE_LNK BIT(31) +-#define MT7531_FORCE_SPD BIT(30) +-#define MT7531_FORCE_DPX BIT(29) +-#define MT7531_FORCE_RX_FC BIT(28) +-#define MT7531_FORCE_TX_FC BIT(27) +-#define MT7531_FORCE_EEE100 BIT(26) +-#define MT7531_FORCE_EEE1G BIT(25) +-#define MT7531_FORCE_MODE (MT7531_FORCE_LNK | \ +- MT7531_FORCE_SPD | \ +- MT7531_FORCE_DPX | \ +- MT7531_FORCE_RX_FC | \ +- MT7531_FORCE_TX_FC | \ +- MT7531_FORCE_EEE100 | \ +- MT7531_FORCE_EEE1G) +-#define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \ +- PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \ +- PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ +- PMCR_FORCE_FDX | PMCR_FORCE_LNK | \ +- PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100) ++#define MT7531_FORCE_MODE_LNK BIT(31) ++#define MT7531_FORCE_MODE_SPD BIT(30) ++#define MT7531_FORCE_MODE_DPX BIT(29) ++#define MT7531_FORCE_MODE_RX_FC BIT(28) ++#define MT7531_FORCE_MODE_TX_FC BIT(27) ++#define MT7531_FORCE_MODE_EEE100 BIT(26) ++#define MT7531_FORCE_MODE_EEE1G BIT(25) ++#define MT7531_FORCE_MODE_MASK (MT7531_FORCE_MODE_LNK | \ ++ MT7531_FORCE_MODE_SPD | \ ++ MT7531_FORCE_MODE_DPX | \ ++ MT7531_FORCE_MODE_RX_FC | \ ++ MT7531_FORCE_MODE_TX_FC | \ ++ MT7531_FORCE_MODE_EEE100 | \ ++ MT7531_FORCE_MODE_EEE1G) ++#define PMCR_LINK_SETTINGS_MASK (PMCR_MAC_TX_EN | PMCR_MAC_RX_EN | \ ++ PMCR_FORCE_EEE1G | \ ++ PMCR_FORCE_EEE100 | \ ++ PMCR_FORCE_RX_FC_EN | \ ++ PMCR_FORCE_TX_FC_EN | \ ++ PMCR_FORCE_SPEED_1000 | \ ++ PMCR_FORCE_SPEED_100 | \ ++ PMCR_FORCE_FDX | PMCR_FORCE_LNK) + + #define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) + #define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24) diff --git a/target/linux/generic/backport-6.1/790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch b/target/linux/generic/backport-6.1/790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch new file mode 100644 index 0000000000..9a0ce7c36c --- /dev/null +++ b/target/linux/generic/backport-6.1/790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch @@ -0,0 +1,185 @@ +From 875ec5b67ab88e969b171e6e9ea803e3ed759614 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:10 +0300 +Subject: [PATCH 03/15] net: dsa: mt7530: rename p5_intf_sel and use only for + MT7530 switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The p5_intf_sel pointer is used to store the information of whether PHY +muxing is used or not. PHY muxing is a feature specific to port 5 of the +MT7530 switch. Do not use it for other switch models. + +Rename the pointer to p5_mode to store the mode the port is being used in. +Rename the p5_interface_select enum to mt7530_p5_mode, the string +representation to mt7530_p5_mode_str, and the enum elements. + +If PHY muxing is not detected, the default mode, GMAC5, will be used. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 62 +++++++++++++++++----------------------- + drivers/net/dsa/mt7530.h | 15 +++++----- + 2 files changed, 33 insertions(+), 44 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -864,19 +864,15 @@ mt7530_set_ageing_time(struct dsa_switch + return 0; + } + +-static const char *p5_intf_modes(unsigned int p5_interface) ++static const char *mt7530_p5_mode_str(unsigned int mode) + { +- switch (p5_interface) { +- case P5_DISABLED: +- return "DISABLED"; +- case P5_INTF_SEL_PHY_P0: +- return "PHY P0"; +- case P5_INTF_SEL_PHY_P4: +- return "PHY P4"; +- case P5_INTF_SEL_GMAC5: +- return "GMAC5"; ++ switch (mode) { ++ case MUX_PHY_P0: ++ return "MUX PHY P0"; ++ case MUX_PHY_P4: ++ return "MUX PHY P4"; + default: +- return "unknown"; ++ return "GMAC5"; + } + } + +@@ -893,23 +889,23 @@ static void mt7530_setup_port5(struct ds + val |= MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; + val &= ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL; + +- switch (priv->p5_intf_sel) { +- case P5_INTF_SEL_PHY_P0: +- /* MT7530_P5_MODE_GPHY_P0: 2nd GMAC -> P5 -> P0 */ ++ switch (priv->p5_mode) { ++ /* MUX_PHY_P0: P0 -> P5 -> SoC MAC */ ++ case MUX_PHY_P0: + val |= MHWTRAP_PHY0_SEL; + fallthrough; +- case P5_INTF_SEL_PHY_P4: +- /* MT7530_P5_MODE_GPHY_P4: 2nd GMAC -> P5 -> P4 */ ++ ++ /* MUX_PHY_P4: P4 -> P5 -> SoC MAC */ ++ case MUX_PHY_P4: + val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS; + + /* Setup the MAC by default for the cpu port */ + mt7530_write(priv, MT753X_PMCR_P(5), 0x56300); + break; +- case P5_INTF_SEL_GMAC5: +- /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ +- val &= ~MHWTRAP_P5_DIS; +- break; ++ ++ /* GMAC5: P5 -> SoC MAC or external PHY */ + default: ++ val &= ~MHWTRAP_P5_DIS; + break; + } + +@@ -937,8 +933,8 @@ static void mt7530_setup_port5(struct ds + + mt7530_write(priv, MT7530_MHWTRAP, val); + +- dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", +- val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); ++ dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, mode=%s, phy-mode=%s\n", val, ++ mt7530_p5_mode_str(priv->p5_mode), phy_modes(interface)); + + mutex_unlock(&priv->reg_mutex); + } +@@ -2481,13 +2477,11 @@ mt7530_setup(struct dsa_switch *ds) + if (ret) + return ret; + +- /* Setup port 5 */ +- if (!dsa_is_unused_port(ds, 5)) { +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5; +- } else { ++ /* Check for PHY muxing on port 5 */ ++ if (dsa_is_unused_port(ds, 5)) { + /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. +- * Set priv->p5_intf_sel to the appropriate value if PHY muxing +- * is detected. ++ * Set priv->p5_mode to the appropriate value if PHY muxing is ++ * detected. + */ + for_each_child_of_node(dn, mac_np) { + if (!of_device_is_compatible(mac_np, +@@ -2511,17 +2505,16 @@ mt7530_setup(struct dsa_switch *ds) + } + id = of_mdio_parse_addr(ds->dev, phy_node); + if (id == 0) +- priv->p5_intf_sel = P5_INTF_SEL_PHY_P0; ++ priv->p5_mode = MUX_PHY_P0; + if (id == 4) +- priv->p5_intf_sel = P5_INTF_SEL_PHY_P4; ++ priv->p5_mode = MUX_PHY_P4; + } + of_node_put(mac_np); + of_node_put(phy_node); + break; + } + +- if (priv->p5_intf_sel == P5_INTF_SEL_PHY_P0 || +- priv->p5_intf_sel == P5_INTF_SEL_PHY_P4) ++ if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4) + mt7530_setup_port5(ds, interface); + } + +@@ -2659,9 +2652,6 @@ mt7531_setup(struct dsa_switch *ds) + MT7531_EXT_P_MDIO_12); + } + +- if (!dsa_is_unused_port(ds, 5)) +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5; +- + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -708,12 +708,11 @@ struct mt7530_port { + struct phylink_pcs *sgmii_pcs; + }; + +-/* Port 5 interface select definitions */ +-enum p5_interface_select { +- P5_DISABLED, +- P5_INTF_SEL_PHY_P0, +- P5_INTF_SEL_PHY_P4, +- P5_INTF_SEL_GMAC5, ++/* Port 5 mode definitions of the MT7530 switch */ ++enum mt7530_p5_mode { ++ GMAC5, ++ MUX_PHY_P0, ++ MUX_PHY_P4, + }; + + struct mt7530_priv; +@@ -769,7 +768,7 @@ struct mt753x_info { + * @ports: Holding the state among ports + * @reg_mutex: The lock for protecting among process accessing + * registers +- * @p5_intf_sel: Holding the current port 5 interface select ++ * @p5_mode: Holding the current mode of port 5 of the MT7530 switch + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch + * has got SGMII + * @irq: IRQ number of the switch +@@ -791,7 +790,7 @@ struct mt7530_priv { + const struct mt753x_info *info; + unsigned int id; + bool mcm; +- enum p5_interface_select p5_intf_sel; ++ enum mt7530_p5_mode p5_mode; + bool p5_sgmii; + u8 mirror_rx; + u8 mirror_tx; diff --git a/target/linux/generic/backport-6.1/790-57-v6.10-net-dsa-mt7530-rename-mt753x_bpdu_port_fw-enum-to-mt.patch b/target/linux/generic/backport-6.1/790-57-v6.10-net-dsa-mt7530-rename-mt753x_bpdu_port_fw-enum-to-mt.patch new file mode 100644 index 0000000000..c8ffd5f07c --- /dev/null +++ b/target/linux/generic/backport-6.1/790-57-v6.10-net-dsa-mt7530-rename-mt753x_bpdu_port_fw-enum-to-mt.patch @@ -0,0 +1,169 @@ +From 83fe3df057e641cd0e88425e579d7a5a370ca430 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:11 +0300 +Subject: [PATCH 04/15] net: dsa: mt7530: rename mt753x_bpdu_port_fw enum to + mt753x_to_cpu_fw +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The mt753x_bpdu_port_fw enum is globally used for manipulating the process +of deciding the forwardable ports, specifically concerning the CPU port(s). +Therefore, rename it and the values in it to mt753x_to_cpu_fw. + +Change FOLLOW_MFC to SYSTEM_DEFAULT to be on par with the switch documents. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 44 ++++++++++------------- + drivers/net/dsa/mt7530.h | 76 ++++++++++++++++++++-------------------- + 2 files changed, 56 insertions(+), 64 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1114,42 +1114,34 @@ mt753x_trap_frames(struct mt7530_priv *p + * VLAN-untagged. + */ + mt7530_rmw(priv, MT753X_BPC, +- MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK | +- MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | +- MT753X_BPDU_PORT_FW_MASK, +- MT753X_PAE_BPDU_FR | +- MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ PAE_BPDU_FR | PAE_EG_TAG_MASK | PAE_PORT_FW_MASK | ++ BPDU_EG_TAG_MASK | BPDU_PORT_FW_MASK, ++ PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ PAE_PORT_FW(TO_CPU_FW_CPU_ONLY) | ++ BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ TO_CPU_FW_CPU_ONLY); + + /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress + * them VLAN-untagged. + */ + mt7530_rmw(priv, MT753X_RGAC1, +- MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK | +- MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR | +- MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK, +- MT753X_R02_BPDU_FR | +- MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_R01_BPDU_FR | +- MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ R02_BPDU_FR | R02_EG_TAG_MASK | R02_PORT_FW_MASK | ++ R01_BPDU_FR | R01_EG_TAG_MASK | R01_PORT_FW_MASK, ++ R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ R02_PORT_FW(TO_CPU_FW_CPU_ONLY) | R01_BPDU_FR | ++ R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ TO_CPU_FW_CPU_ONLY); + + /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress + * them VLAN-untagged. + */ + mt7530_rmw(priv, MT753X_RGAC2, +- MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK | +- MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR | +- MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK, +- MT753X_R0E_BPDU_FR | +- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_R03_BPDU_FR | +- MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ R0E_BPDU_FR | R0E_EG_TAG_MASK | R0E_PORT_FW_MASK | ++ R03_BPDU_FR | R03_EG_TAG_MASK | R03_PORT_FW_MASK, ++ R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ R0E_PORT_FW(TO_CPU_FW_CPU_ONLY) | R03_BPDU_FR | ++ R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ TO_CPU_FW_CPU_ONLY); + } + + static void +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -67,47 +67,47 @@ enum mt753x_id { + #define MT753X_MIRROR_MASK(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ + MT7531_MIRROR_MASK : MIRROR_MASK) + +-/* Registers for BPDU and PAE frame control*/ ++/* Register for BPDU and PAE frame control */ + #define MT753X_BPC 0x24 +-#define MT753X_PAE_BPDU_FR BIT(25) +-#define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22) +-#define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x) +-#define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16) +-#define MT753X_PAE_PORT_FW(x) FIELD_PREP(MT753X_PAE_PORT_FW_MASK, x) +-#define MT753X_BPDU_EG_TAG_MASK GENMASK(8, 6) +-#define MT753X_BPDU_EG_TAG(x) FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x) +-#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0) ++#define PAE_BPDU_FR BIT(25) ++#define PAE_EG_TAG_MASK GENMASK(24, 22) ++#define PAE_EG_TAG(x) FIELD_PREP(PAE_EG_TAG_MASK, x) ++#define PAE_PORT_FW_MASK GENMASK(18, 16) ++#define PAE_PORT_FW(x) FIELD_PREP(PAE_PORT_FW_MASK, x) ++#define BPDU_EG_TAG_MASK GENMASK(8, 6) ++#define BPDU_EG_TAG(x) FIELD_PREP(BPDU_EG_TAG_MASK, x) ++#define BPDU_PORT_FW_MASK GENMASK(2, 0) + +-/* Register for :01 and :02 MAC DA frame control */ ++/* Register for 01-80-C2-00-00-[01,02] MAC DA frame control */ + #define MT753X_RGAC1 0x28 +-#define MT753X_R02_BPDU_FR BIT(25) +-#define MT753X_R02_EG_TAG_MASK GENMASK(24, 22) +-#define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x) +-#define MT753X_R02_PORT_FW_MASK GENMASK(18, 16) +-#define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x) +-#define MT753X_R01_BPDU_FR BIT(9) +-#define MT753X_R01_EG_TAG_MASK GENMASK(8, 6) +-#define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x) +-#define MT753X_R01_PORT_FW_MASK GENMASK(2, 0) ++#define R02_BPDU_FR BIT(25) ++#define R02_EG_TAG_MASK GENMASK(24, 22) ++#define R02_EG_TAG(x) FIELD_PREP(R02_EG_TAG_MASK, x) ++#define R02_PORT_FW_MASK GENMASK(18, 16) ++#define R02_PORT_FW(x) FIELD_PREP(R02_PORT_FW_MASK, x) ++#define R01_BPDU_FR BIT(9) ++#define R01_EG_TAG_MASK GENMASK(8, 6) ++#define R01_EG_TAG(x) FIELD_PREP(R01_EG_TAG_MASK, x) ++#define R01_PORT_FW_MASK GENMASK(2, 0) + +-/* Register for :03 and :0E MAC DA frame control */ ++/* Register for 01-80-C2-00-00-[03,0E] MAC DA frame control */ + #define MT753X_RGAC2 0x2c +-#define MT753X_R0E_BPDU_FR BIT(25) +-#define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22) +-#define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x) +-#define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) +-#define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) +-#define MT753X_R03_BPDU_FR BIT(9) +-#define MT753X_R03_EG_TAG_MASK GENMASK(8, 6) +-#define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x) +-#define MT753X_R03_PORT_FW_MASK GENMASK(2, 0) ++#define R0E_BPDU_FR BIT(25) ++#define R0E_EG_TAG_MASK GENMASK(24, 22) ++#define R0E_EG_TAG(x) FIELD_PREP(R0E_EG_TAG_MASK, x) ++#define R0E_PORT_FW_MASK GENMASK(18, 16) ++#define R0E_PORT_FW(x) FIELD_PREP(R0E_PORT_FW_MASK, x) ++#define R03_BPDU_FR BIT(9) ++#define R03_EG_TAG_MASK GENMASK(8, 6) ++#define R03_EG_TAG(x) FIELD_PREP(R03_EG_TAG_MASK, x) ++#define R03_PORT_FW_MASK GENMASK(2, 0) + +-enum mt753x_bpdu_port_fw { +- MT753X_BPDU_FOLLOW_MFC, +- MT753X_BPDU_CPU_EXCLUDE = 4, +- MT753X_BPDU_CPU_INCLUDE = 5, +- MT753X_BPDU_CPU_ONLY = 6, +- MT753X_BPDU_DROP = 7, ++enum mt753x_to_cpu_fw { ++ TO_CPU_FW_SYSTEM_DEFAULT, ++ TO_CPU_FW_CPU_EXCLUDE = 4, ++ TO_CPU_FW_CPU_INCLUDE = 5, ++ TO_CPU_FW_CPU_ONLY = 6, ++ TO_CPU_FW_DROP = 7, + }; + + /* Registers for address table access */ diff --git a/target/linux/generic/backport-6.1/790-58-v6.10-net-dsa-mt7530-refactor-MT7530_MFC-and-MT7531_CFC-ad.patch b/target/linux/generic/backport-6.1/790-58-v6.10-net-dsa-mt7530-refactor-MT7530_MFC-and-MT7531_CFC-ad.patch new file mode 100644 index 0000000000..c977fe46cd --- /dev/null +++ b/target/linux/generic/backport-6.1/790-58-v6.10-net-dsa-mt7530-refactor-MT7530_MFC-and-MT7531_CFC-ad.patch @@ -0,0 +1,201 @@ +From 1dbc1bdc2869e6d2929235c70d64e393aa5a5fa2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:12 +0300 +Subject: [PATCH 05/15] net: dsa: mt7530: refactor MT7530_MFC and MT7531_CFC, + add MT7531_QRY_FFP +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7530_MFC register is on MT7530, MT7531, and the switch on the MT7988 +SoC. Rename it to MT753X_MFC. Bit 7 to 0 differs between MT7530 and +MT7531/MT7988. Add MT7530 prefix to these definitions, and define the +IGMP/MLD Query Frame Flooding Ports mask for MT7531. + +Rename the cases of MIRROR_MASK to MIRROR_PORT_MASK. + +Move mt753x_mirror_port_get() and mt753x_port_mirror_set() to mt7530.h as +macros. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 38 ++++++++-------------- + drivers/net/dsa/mt7530.h | 69 +++++++++++++++++++++++++--------------- + 2 files changed, 57 insertions(+), 50 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1154,7 +1154,7 @@ mt753x_cpu_port_enable(struct dsa_switch + PORT_SPEC_TAG); + + /* Enable flooding on the CPU port */ +- mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | ++ mt7530_set(priv, MT753X_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | + UNU_FFP(BIT(port))); + + /* Add the CPU port to the CPU port bitmap for MT7531. Trapped frames +@@ -1318,15 +1318,15 @@ mt7530_port_bridge_flags(struct dsa_swit + flags.val & BR_LEARNING ? 0 : SA_DIS); + + if (flags.mask & BR_FLOOD) +- mt7530_rmw(priv, MT7530_MFC, UNU_FFP(BIT(port)), ++ mt7530_rmw(priv, MT753X_MFC, UNU_FFP(BIT(port)), + flags.val & BR_FLOOD ? UNU_FFP(BIT(port)) : 0); + + if (flags.mask & BR_MCAST_FLOOD) +- mt7530_rmw(priv, MT7530_MFC, UNM_FFP(BIT(port)), ++ mt7530_rmw(priv, MT753X_MFC, UNM_FFP(BIT(port)), + flags.val & BR_MCAST_FLOOD ? UNM_FFP(BIT(port)) : 0); + + if (flags.mask & BR_BCAST_FLOOD) +- mt7530_rmw(priv, MT7530_MFC, BC_FFP(BIT(port)), ++ mt7530_rmw(priv, MT753X_MFC, BC_FFP(BIT(port)), + flags.val & BR_BCAST_FLOOD ? BC_FFP(BIT(port)) : 0); + + return 0; +@@ -1862,20 +1862,6 @@ mt7530_port_vlan_del(struct dsa_switch * + return 0; + } + +-static int mt753x_mirror_port_get(unsigned int id, u32 val) +-{ +- return (id == ID_MT7531 || id == ID_MT7988) ? +- MT7531_MIRROR_PORT_GET(val) : +- MIRROR_PORT(val); +-} +- +-static int mt753x_mirror_port_set(unsigned int id, u32 val) +-{ +- return (id == ID_MT7531 || id == ID_MT7988) ? +- MT7531_MIRROR_PORT_SET(val) : +- MIRROR_PORT(val); +-} +- + static int mt753x_port_mirror_add(struct dsa_switch *ds, int port, + struct dsa_mall_mirror_tc_entry *mirror, + bool ingress, struct netlink_ext_ack *extack) +@@ -1891,14 +1877,14 @@ static int mt753x_port_mirror_add(struct + val = mt7530_read(priv, MT753X_MIRROR_REG(priv->id)); + + /* MT7530 only supports one monitor port */ +- monitor_port = mt753x_mirror_port_get(priv->id, val); ++ monitor_port = MT753X_MIRROR_PORT_GET(priv->id, val); + if (val & MT753X_MIRROR_EN(priv->id) && + monitor_port != mirror->to_local_port) + return -EEXIST; + + val |= MT753X_MIRROR_EN(priv->id); +- val &= ~MT753X_MIRROR_MASK(priv->id); +- val |= mt753x_mirror_port_set(priv->id, mirror->to_local_port); ++ val &= ~MT753X_MIRROR_PORT_MASK(priv->id); ++ val |= MT753X_MIRROR_PORT_SET(priv->id, mirror->to_local_port); + mt7530_write(priv, MT753X_MIRROR_REG(priv->id), val); + + val = mt7530_read(priv, MT7530_PCR_P(port)); +@@ -2538,7 +2524,7 @@ mt7531_setup_common(struct dsa_switch *d + mt7530_mib_reset(ds); + + /* Disable flooding on all ports */ +- mt7530_clear(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | ++ mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK | + UNU_FFP_MASK); + + for (i = 0; i < MT7530_NUM_PORTS; i++) { +@@ -3100,10 +3086,12 @@ mt753x_conduit_state_change(struct dsa_s + else + priv->active_cpu_ports &= ~mask; + +- if (priv->active_cpu_ports) +- val = CPU_EN | CPU_PORT(__ffs(priv->active_cpu_ports)); ++ if (priv->active_cpu_ports) { ++ val = MT7530_CPU_EN | ++ MT7530_CPU_PORT(__ffs(priv->active_cpu_ports)); ++ } + +- mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); ++ mt7530_rmw(priv, MT753X_MFC, MT7530_CPU_EN | MT7530_CPU_PORT_MASK, val); + } + + static int mt7988_setup(struct dsa_switch *ds) +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -36,36 +36,55 @@ enum mt753x_id { + #define MT753X_AGC 0xc + #define LOCAL_EN BIT(7) + +-/* Registers to mac forward control for unknown frames */ +-#define MT7530_MFC 0x10 +-#define BC_FFP(x) (((x) & 0xff) << 24) +-#define BC_FFP_MASK BC_FFP(~0) +-#define UNM_FFP(x) (((x) & 0xff) << 16) +-#define UNM_FFP_MASK UNM_FFP(~0) +-#define UNU_FFP(x) (((x) & 0xff) << 8) +-#define UNU_FFP_MASK UNU_FFP(~0) +-#define CPU_EN BIT(7) +-#define CPU_PORT_MASK GENMASK(6, 4) +-#define CPU_PORT(x) FIELD_PREP(CPU_PORT_MASK, x) +-#define MIRROR_EN BIT(3) +-#define MIRROR_PORT(x) ((x) & 0x7) +-#define MIRROR_MASK 0x7 ++/* Register for MAC forward control */ ++#define MT753X_MFC 0x10 ++#define BC_FFP_MASK GENMASK(31, 24) ++#define BC_FFP(x) FIELD_PREP(BC_FFP_MASK, x) ++#define UNM_FFP_MASK GENMASK(23, 16) ++#define UNM_FFP(x) FIELD_PREP(UNM_FFP_MASK, x) ++#define UNU_FFP_MASK GENMASK(15, 8) ++#define UNU_FFP(x) FIELD_PREP(UNU_FFP_MASK, x) ++#define MT7530_CPU_EN BIT(7) ++#define MT7530_CPU_PORT_MASK GENMASK(6, 4) ++#define MT7530_CPU_PORT(x) FIELD_PREP(MT7530_CPU_PORT_MASK, x) ++#define MT7530_MIRROR_EN BIT(3) ++#define MT7530_MIRROR_PORT_MASK GENMASK(2, 0) ++#define MT7530_MIRROR_PORT_GET(x) FIELD_GET(MT7530_MIRROR_PORT_MASK, x) ++#define MT7530_MIRROR_PORT_SET(x) FIELD_PREP(MT7530_MIRROR_PORT_MASK, x) ++#define MT7531_QRY_FFP_MASK GENMASK(7, 0) ++#define MT7531_QRY_FFP(x) FIELD_PREP(MT7531_QRY_FFP_MASK, x) + +-/* Registers for CPU forward control */ ++/* Register for CPU forward control */ + #define MT7531_CFC 0x4 + #define MT7531_MIRROR_EN BIT(19) +-#define MT7531_MIRROR_MASK (MIRROR_MASK << 16) +-#define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK) +-#define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) ++#define MT7531_MIRROR_PORT_MASK GENMASK(18, 16) ++#define MT7531_MIRROR_PORT_GET(x) FIELD_GET(MT7531_MIRROR_PORT_MASK, x) ++#define MT7531_MIRROR_PORT_SET(x) FIELD_PREP(MT7531_MIRROR_PORT_MASK, x) + #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) + #define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) + +-#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ +- MT7531_CFC : MT7530_MFC) +-#define MT753X_MIRROR_EN(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ +- MT7531_MIRROR_EN : MIRROR_EN) +-#define MT753X_MIRROR_MASK(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ +- MT7531_MIRROR_MASK : MIRROR_MASK) ++#define MT753X_MIRROR_REG(id) ((id == ID_MT7531 || \ ++ id == ID_MT7988) ? \ ++ MT7531_CFC : MT753X_MFC) ++ ++#define MT753X_MIRROR_EN(id) ((id == ID_MT7531 || \ ++ id == ID_MT7988) ? \ ++ MT7531_MIRROR_EN : MT7530_MIRROR_EN) ++ ++#define MT753X_MIRROR_PORT_MASK(id) ((id == ID_MT7531 || \ ++ id == ID_MT7988) ? \ ++ MT7531_MIRROR_PORT_MASK : \ ++ MT7530_MIRROR_PORT_MASK) ++ ++#define MT753X_MIRROR_PORT_GET(id, val) ((id == ID_MT7531 || \ ++ id == ID_MT7988) ? \ ++ MT7531_MIRROR_PORT_GET(val) : \ ++ MT7530_MIRROR_PORT_GET(val)) ++ ++#define MT753X_MIRROR_PORT_SET(id, val) ((id == ID_MT7531 || \ ++ id == ID_MT7988) ? \ ++ MT7531_MIRROR_PORT_SET(val) : \ ++ MT7530_MIRROR_PORT_SET(val)) + + /* Register for BPDU and PAE frame control */ + #define MT753X_BPC 0x24 diff --git a/target/linux/generic/backport-6.1/790-59-v6.10-net-dsa-mt7530-refactor-MT7530_HWTRAP-and-MT7530_MHW.patch b/target/linux/generic/backport-6.1/790-59-v6.10-net-dsa-mt7530-refactor-MT7530_HWTRAP-and-MT7530_MHW.patch new file mode 100644 index 0000000000..3c487d21f6 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-59-v6.10-net-dsa-mt7530-refactor-MT7530_HWTRAP-and-MT7530_MHW.patch @@ -0,0 +1,257 @@ +From 3ccf67597d35c06a7319e407b1c42f78a7966779 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:13 +0300 +Subject: [PATCH 06/15] net: dsa: mt7530: refactor MT7530_HWTRAP and + MT7530_MHWTRAP +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7530_HWTRAP and MT7530_MHWTRAP registers are on MT7530 and MT7531. +It's called hardware trap on MT7530, software trap on MT7531. That's +because some bits of the trap on MT7530 cannot be modified by software +whilst all bits of the trap on MT7531 can. Rename the definitions for them +to MT753X_TRAP and MT753X_MTRAP. Add MT7530 and MT7531 prefixes to the +definitions specific to the switch model. + +Remove the extra parentheses from MT7530_XTAL_40MHZ and MT7530_XTAL_20MHZ. + +Rename MHWTRAP_PHY0_SEL, MHWTRAP_MANUAL, and MHWTRAP_PHY_ACCESS to be on +par with the "MT7621 Giga Switch Programming Guide v0.3" document. + +Make an enumaration for the XTAL frequency. Set the data type of the xtal +variable on mt7531_pll_setup() to it. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 59 ++++++++++++++++++++-------------------- + drivers/net/dsa/mt7530.h | 50 ++++++++++++++++------------------ + 2 files changed, 54 insertions(+), 55 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -417,23 +417,23 @@ mt7530_setup_port6(struct dsa_switch *ds + + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); + +- xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; ++ xtal = mt7530_read(priv, MT753X_MTRAP) & MT7530_XTAL_MASK; + +- if (xtal == HWTRAP_XTAL_25MHZ) ++ if (xtal == MT7530_XTAL_25MHZ) + ssc_delta = 0x57; + else + ssc_delta = 0x87; + + if (priv->id == ID_MT7621) { + /* PLL frequency: 125MHz: 1.0GBit */ +- if (xtal == HWTRAP_XTAL_40MHZ) ++ if (xtal == MT7530_XTAL_40MHZ) + ncpo1 = 0x0640; +- if (xtal == HWTRAP_XTAL_25MHZ) ++ if (xtal == MT7530_XTAL_25MHZ) + ncpo1 = 0x0a00; + } else { /* PLL frequency: 250MHz: 2.0Gbit */ +- if (xtal == HWTRAP_XTAL_40MHZ) ++ if (xtal == MT7530_XTAL_40MHZ) + ncpo1 = 0x0c80; +- if (xtal == HWTRAP_XTAL_25MHZ) ++ if (xtal == MT7530_XTAL_25MHZ) + ncpo1 = 0x1400; + } + +@@ -456,19 +456,20 @@ mt7530_setup_port6(struct dsa_switch *ds + static void + mt7531_pll_setup(struct mt7530_priv *priv) + { ++ enum mt7531_xtal_fsel xtal; + u32 top_sig; + u32 hwstrap; +- u32 xtal; + u32 val; + + val = mt7530_read(priv, MT7531_CREV); + top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR); +- hwstrap = mt7530_read(priv, MT7531_HWTRAP); ++ hwstrap = mt7530_read(priv, MT753X_TRAP); + if ((val & CHIP_REV_M) > 0) +- xtal = (top_sig & PAD_MCM_SMI_EN) ? HWTRAP_XTAL_FSEL_40MHZ : +- HWTRAP_XTAL_FSEL_25MHZ; ++ xtal = (top_sig & PAD_MCM_SMI_EN) ? MT7531_XTAL_FSEL_40MHZ : ++ MT7531_XTAL_FSEL_25MHZ; + else +- xtal = hwstrap & HWTRAP_XTAL_FSEL_MASK; ++ xtal = (hwstrap & MT7531_XTAL25) ? MT7531_XTAL_FSEL_25MHZ : ++ MT7531_XTAL_FSEL_40MHZ; + + /* Step 1 : Disable MT7531 COREPLL */ + val = mt7530_read(priv, MT7531_PLLGP_EN); +@@ -497,13 +498,13 @@ mt7531_pll_setup(struct mt7530_priv *pri + usleep_range(25, 35); + + switch (xtal) { +- case HWTRAP_XTAL_FSEL_25MHZ: ++ case MT7531_XTAL_FSEL_25MHZ: + val = mt7530_read(priv, MT7531_PLLGP_CR0); + val &= ~RG_COREPLL_SDM_PCW_M; + val |= 0x140000 << RG_COREPLL_SDM_PCW_S; + mt7530_write(priv, MT7531_PLLGP_CR0, val); + break; +- case HWTRAP_XTAL_FSEL_40MHZ: ++ case MT7531_XTAL_FSEL_40MHZ: + val = mt7530_read(priv, MT7531_PLLGP_CR0); + val &= ~RG_COREPLL_SDM_PCW_M; + val |= 0x190000 << RG_COREPLL_SDM_PCW_S; +@@ -884,20 +885,20 @@ static void mt7530_setup_port5(struct ds + + mutex_lock(&priv->reg_mutex); + +- val = mt7530_read(priv, MT7530_MHWTRAP); ++ val = mt7530_read(priv, MT753X_MTRAP); + +- val |= MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; +- val &= ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL; ++ val |= MT7530_CHG_TRAP | MT7530_P5_MAC_SEL | MT7530_P5_DIS; ++ val &= ~MT7530_P5_RGMII_MODE & ~MT7530_P5_PHY0_SEL; + + switch (priv->p5_mode) { + /* MUX_PHY_P0: P0 -> P5 -> SoC MAC */ + case MUX_PHY_P0: +- val |= MHWTRAP_PHY0_SEL; ++ val |= MT7530_P5_PHY0_SEL; + fallthrough; + + /* MUX_PHY_P4: P4 -> P5 -> SoC MAC */ + case MUX_PHY_P4: +- val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS; ++ val &= ~MT7530_P5_MAC_SEL & ~MT7530_P5_DIS; + + /* Setup the MAC by default for the cpu port */ + mt7530_write(priv, MT753X_PMCR_P(5), 0x56300); +@@ -905,13 +906,13 @@ static void mt7530_setup_port5(struct ds + + /* GMAC5: P5 -> SoC MAC or external PHY */ + default: +- val &= ~MHWTRAP_P5_DIS; ++ val &= ~MT7530_P5_DIS; + break; + } + + /* Setup RGMII settings */ + if (phy_interface_mode_is_rgmii(interface)) { +- val |= MHWTRAP_P5_RGMII_MODE; ++ val |= MT7530_P5_RGMII_MODE; + + /* P5 RGMII RX Clock Control: delay setting for 1000M */ + mt7530_write(priv, MT7530_P5RGMIIRXCR, CSR_RGMII_EDGE_ALIGN); +@@ -931,7 +932,7 @@ static void mt7530_setup_port5(struct ds + P5_IO_CLK_DRV(1) | P5_IO_DATA_DRV(1)); + } + +- mt7530_write(priv, MT7530_MHWTRAP, val); ++ mt7530_write(priv, MT753X_MTRAP, val); + + dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, mode=%s, phy-mode=%s\n", val, + mt7530_p5_mode_str(priv->p5_mode), phy_modes(interface)); +@@ -2370,7 +2371,7 @@ mt7530_setup(struct dsa_switch *ds) + } + + /* Waiting for MT7530 got to stable */ +- INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_HWTRAP); ++ INIT_MT7530_DUMMY_POLL(&p, priv, MT753X_TRAP); + ret = readx_poll_timeout(_mt7530_read, &p, val, val != 0, + 20, 1000000); + if (ret < 0) { +@@ -2385,7 +2386,7 @@ mt7530_setup(struct dsa_switch *ds) + return -ENODEV; + } + +- if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_20MHZ) { ++ if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_20MHZ) { + dev_err(priv->dev, + "MT7530 with a 20MHz XTAL is not supported!\n"); + return -EINVAL; +@@ -2406,12 +2407,12 @@ mt7530_setup(struct dsa_switch *ds) + RD_TAP_MASK, RD_TAP(16)); + + /* Enable port 6 */ +- val = mt7530_read(priv, MT7530_MHWTRAP); +- val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; +- val |= MHWTRAP_MANUAL; +- mt7530_write(priv, MT7530_MHWTRAP, val); ++ val = mt7530_read(priv, MT753X_MTRAP); ++ val &= ~MT7530_P6_DIS & ~MT7530_PHY_INDIRECT_ACCESS; ++ val |= MT7530_CHG_TRAP; ++ mt7530_write(priv, MT753X_MTRAP, val); + +- if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ) ++ if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ) + mt7530_pll_setup(priv); + + mt753x_trap_frames(priv); +@@ -2591,7 +2592,7 @@ mt7531_setup(struct dsa_switch *ds) + } + + /* Waiting for MT7530 got to stable */ +- INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_HWTRAP); ++ INIT_MT7530_DUMMY_POLL(&p, priv, MT753X_TRAP); + ret = readx_poll_timeout(_mt7530_read, &p, val, val != 0, + 20, 1000000); + if (ret < 0) { +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -495,32 +495,30 @@ enum mt7531_clk_skew { + MT7531_CLK_SKEW_REVERSE = 3, + }; + +-/* Register for hw trap status */ +-#define MT7530_HWTRAP 0x7800 +-#define HWTRAP_XTAL_MASK (BIT(10) | BIT(9)) +-#define HWTRAP_XTAL_25MHZ (BIT(10) | BIT(9)) +-#define HWTRAP_XTAL_40MHZ (BIT(10)) +-#define HWTRAP_XTAL_20MHZ (BIT(9)) ++/* Register for trap status */ ++#define MT753X_TRAP 0x7800 ++#define MT7530_XTAL_MASK (BIT(10) | BIT(9)) ++#define MT7530_XTAL_25MHZ (BIT(10) | BIT(9)) ++#define MT7530_XTAL_40MHZ BIT(10) ++#define MT7530_XTAL_20MHZ BIT(9) ++#define MT7531_XTAL25 BIT(7) + +-#define MT7531_HWTRAP 0x7800 +-#define HWTRAP_XTAL_FSEL_MASK BIT(7) +-#define HWTRAP_XTAL_FSEL_25MHZ BIT(7) +-#define HWTRAP_XTAL_FSEL_40MHZ 0 +-/* Unique fields of (M)HWSTRAP for MT7531 */ +-#define XTAL_FSEL_S 7 +-#define XTAL_FSEL_M BIT(7) +-#define PHY_EN BIT(6) +-#define CHG_STRAP BIT(8) ++/* Register for trap modification */ ++#define MT753X_MTRAP 0x7804 ++#define MT7530_P5_PHY0_SEL BIT(20) ++#define MT7530_CHG_TRAP BIT(16) ++#define MT7530_P5_MAC_SEL BIT(13) ++#define MT7530_P6_DIS BIT(8) ++#define MT7530_P5_RGMII_MODE BIT(7) ++#define MT7530_P5_DIS BIT(6) ++#define MT7530_PHY_INDIRECT_ACCESS BIT(5) ++#define MT7531_CHG_STRAP BIT(8) ++#define MT7531_PHY_EN BIT(6) + +-/* Register for hw trap modification */ +-#define MT7530_MHWTRAP 0x7804 +-#define MHWTRAP_PHY0_SEL BIT(20) +-#define MHWTRAP_MANUAL BIT(16) +-#define MHWTRAP_P5_MAC_SEL BIT(13) +-#define MHWTRAP_P6_DIS BIT(8) +-#define MHWTRAP_P5_RGMII_MODE BIT(7) +-#define MHWTRAP_P5_DIS BIT(6) +-#define MHWTRAP_PHY_ACCESS BIT(5) ++enum mt7531_xtal_fsel { ++ MT7531_XTAL_FSEL_25MHZ, ++ MT7531_XTAL_FSEL_40MHZ, ++}; + + /* Register for TOP signal control */ + #define MT7530_TOP_SIG_CTRL 0x7808 diff --git a/target/linux/generic/backport-6.1/790-60-v6.10-net-dsa-mt7530-move-MT753X_MTRAP-operations-for-MT75.patch b/target/linux/generic/backport-6.1/790-60-v6.10-net-dsa-mt7530-move-MT753X_MTRAP-operations-for-MT75.patch new file mode 100644 index 0000000000..cfc38f81d0 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-60-v6.10-net-dsa-mt7530-move-MT753X_MTRAP-operations-for-MT75.patch @@ -0,0 +1,117 @@ +From 2982f395c9a513b168f1e685588f70013cba2f5f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:14 +0300 +Subject: [PATCH 07/15] net: dsa: mt7530: move MT753X_MTRAP operations for + MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On MT7530, the media-independent interfaces of port 5 and 6 are controlled +by the MT7530_P5_DIS and MT7530_P6_DIS bits of the hardware trap. Deal with +these bits only when the relevant port is being enabled or disabled. This +ensures that these ports will be disabled when they are not in use. + +Do not set MT7530_CHG_TRAP on mt7530_setup_port5() as that's already being +done on mt7530_setup(). + +Instead of globally setting MT7530_P5_MAC_SEL, clear it, then set it only +on the appropriate case. + +If PHY muxing is detected, clear MT7530_P5_DIS before calling +mt7530_setup_port5(). + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 38 +++++++++++++++++++++++++++----------- + 1 file changed, 27 insertions(+), 11 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -887,8 +887,7 @@ static void mt7530_setup_port5(struct ds + + val = mt7530_read(priv, MT753X_MTRAP); + +- val |= MT7530_CHG_TRAP | MT7530_P5_MAC_SEL | MT7530_P5_DIS; +- val &= ~MT7530_P5_RGMII_MODE & ~MT7530_P5_PHY0_SEL; ++ val &= ~MT7530_P5_PHY0_SEL & ~MT7530_P5_MAC_SEL & ~MT7530_P5_RGMII_MODE; + + switch (priv->p5_mode) { + /* MUX_PHY_P0: P0 -> P5 -> SoC MAC */ +@@ -898,15 +897,13 @@ static void mt7530_setup_port5(struct ds + + /* MUX_PHY_P4: P4 -> P5 -> SoC MAC */ + case MUX_PHY_P4: +- val &= ~MT7530_P5_MAC_SEL & ~MT7530_P5_DIS; +- + /* Setup the MAC by default for the cpu port */ + mt7530_write(priv, MT753X_PMCR_P(5), 0x56300); + break; + + /* GMAC5: P5 -> SoC MAC or external PHY */ + default: +- val &= ~MT7530_P5_DIS; ++ val |= MT7530_P5_MAC_SEL; + break; + } + +@@ -1200,6 +1197,14 @@ mt7530_port_enable(struct dsa_switch *ds + + mutex_unlock(&priv->reg_mutex); + ++ if (priv->id != ID_MT7530 && priv->id != ID_MT7621) ++ return 0; ++ ++ if (port == 5) ++ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS); ++ else if (port == 6) ++ mt7530_clear(priv, MT753X_MTRAP, MT7530_P6_DIS); ++ + return 0; + } + +@@ -1218,6 +1223,14 @@ mt7530_port_disable(struct dsa_switch *d + PCR_MATRIX_CLR); + + mutex_unlock(&priv->reg_mutex); ++ ++ if (priv->id != ID_MT7530 && priv->id != ID_MT7621) ++ return; ++ ++ if (port == 5) ++ mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS); ++ else if (port == 6) ++ mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS); + } + + static int +@@ -2406,11 +2419,11 @@ mt7530_setup(struct dsa_switch *ds) + mt7530_rmw(priv, MT7530_TRGMII_RD(i), + RD_TAP_MASK, RD_TAP(16)); + +- /* Enable port 6 */ +- val = mt7530_read(priv, MT753X_MTRAP); +- val &= ~MT7530_P6_DIS & ~MT7530_PHY_INDIRECT_ACCESS; +- val |= MT7530_CHG_TRAP; +- mt7530_write(priv, MT753X_MTRAP, val); ++ /* Allow modifying the trap and directly access PHY registers via the ++ * MDIO bus the switch is on. ++ */ ++ mt7530_rmw(priv, MT753X_MTRAP, MT7530_CHG_TRAP | ++ MT7530_PHY_INDIRECT_ACCESS, MT7530_CHG_TRAP); + + if ((val & MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ) + mt7530_pll_setup(priv); +@@ -2493,8 +2506,11 @@ mt7530_setup(struct dsa_switch *ds) + break; + } + +- if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4) ++ if (priv->p5_mode == MUX_PHY_P0 || ++ priv->p5_mode == MUX_PHY_P4) { ++ mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS); + mt7530_setup_port5(ds, interface); ++ } + } + + #ifdef CONFIG_GPIOLIB diff --git a/target/linux/generic/backport-6.1/790-61-v6.10-net-dsa-mt7530-return-mt7530_setup_mdio-mt7531_setup.patch b/target/linux/generic/backport-6.1/790-61-v6.10-net-dsa-mt7530-return-mt7530_setup_mdio-mt7531_setup.patch new file mode 100644 index 0000000000..178ac8022f --- /dev/null +++ b/target/linux/generic/backport-6.1/790-61-v6.10-net-dsa-mt7530-return-mt7530_setup_mdio-mt7531_setup.patch @@ -0,0 +1,39 @@ +From 1f5669efca65564c7533704917f79003c6b36c9c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:15 +0300 +Subject: [PATCH 08/15] net: dsa: mt7530: return mt7530_setup_mdio & + mt7531_setup_common on error +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The mt7530_setup_mdio() and mt7531_setup_common() functions should be +checked for errors. Return if the functions return a non-zero value. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2672,7 +2672,9 @@ mt7531_setup(struct dsa_switch *ds) + 0); + } + +- mt7531_setup_common(ds); ++ ret = mt7531_setup_common(ds); ++ if (ret) ++ return ret; + + /* Setup VLAN ID 0 for VLAN-unaware bridges */ + ret = mt7530_setup_vlan0(priv); +@@ -3031,6 +3033,8 @@ mt753x_setup(struct dsa_switch *ds) + ret = mt7530_setup_mdio(priv); + if (ret && priv->irq) + mt7530_free_irq_common(priv); ++ if (ret) ++ return ret; + + /* Initialise the PCS devices */ + for (i = 0; i < priv->ds->num_ports; i++) { diff --git a/target/linux/generic/backport-6.1/790-62-v6.10-net-dsa-mt7530-define-MAC-speed-capabilities-per-swi.patch b/target/linux/generic/backport-6.1/790-62-v6.10-net-dsa-mt7530-define-MAC-speed-capabilities-per-swi.patch new file mode 100644 index 0000000000..af8edf5a42 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-62-v6.10-net-dsa-mt7530-define-MAC-speed-capabilities-per-swi.patch @@ -0,0 +1,75 @@ +From 6cc2d4ccd77509df74b7b8ef46bbc6ba0a571318 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:16 +0300 +Subject: [PATCH 09/15] net: dsa: mt7530: define MAC speed capabilities per + switch model +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +With the support of the MT7988 SoC switch, the MAC speed capabilities +defined on mt753x_phylink_get_caps() won't apply to all switch models +anymore. Move them to more appropriate locations instead of overwriting +config->mac_capabilities. + +Remove the comment on mt753x_phylink_get_caps() as it's become invalid with +the support of MT7531 and MT7988 SoC switch. + +Add break to case 6 of mt7988_mac_port_get_caps() to be explicit. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2690,6 +2690,8 @@ mt7531_setup(struct dsa_switch *ds) + static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { ++ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD; ++ + switch (port) { + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 4: +@@ -2721,6 +2723,8 @@ static void mt7531_mac_port_get_caps(str + { + struct mt7530_priv *priv = ds->priv; + ++ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD; ++ + switch (port) { + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 4: +@@ -2760,14 +2764,17 @@ static void mt7988_mac_port_get_caps(str + case 0 ... 3: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); ++ ++ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD; + break; + + /* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */ + case 6: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); +- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | +- MAC_10000FD; ++ ++ config->mac_capabilities |= MAC_10000FD; ++ break; + } + } + +@@ -2937,9 +2944,7 @@ static void mt753x_phylink_get_caps(stru + { + struct mt7530_priv *priv = ds->priv; + +- /* This switch only supports full-duplex at 1Gbps */ +- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | +- MAC_10 | MAC_100 | MAC_1000FD; ++ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE; + + /* This driver does not make use of the speed, duplex, pause or the + * advertisement in its mac_config, so it is safe to mark this driver diff --git a/target/linux/generic/backport-6.1/790-63-v6.10-net-dsa-mt7530-get-rid-of-function-sanity-check.patch b/target/linux/generic/backport-6.1/790-63-v6.10-net-dsa-mt7530-get-rid-of-function-sanity-check.patch new file mode 100644 index 0000000000..3825952dc3 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-63-v6.10-net-dsa-mt7530-get-rid-of-function-sanity-check.patch @@ -0,0 +1,33 @@ +From dd0f15fc877c10567699190bce0f55e96f4ad6b5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:17 +0300 +Subject: [PATCH 10/15] net: dsa: mt7530: get rid of function sanity check +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Get rid of checking whether functions are filled properly. priv->info which +is an mt753x_info structure is filled and checked for before this check. +It's unnecessary checking whether it's filled properly. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -3235,13 +3235,6 @@ mt7530_probe_common(struct mt7530_priv * + if (!priv->info) + return -EINVAL; + +- /* Sanity check if these required device operations are filled +- * properly. +- */ +- if (!priv->info->sw_setup || !priv->info->phy_read || +- !priv->info->phy_write || !priv->info->mac_port_get_caps) +- return -EINVAL; +- + priv->id = priv->info->id; + priv->dev = dev; + priv->ds->priv = priv; diff --git a/target/linux/generic/backport-6.1/790-64-v6.10-net-dsa-mt7530-refactor-MT7530_PMEEECR_P.patch b/target/linux/generic/backport-6.1/790-64-v6.10-net-dsa-mt7530-refactor-MT7530_PMEEECR_P.patch new file mode 100644 index 0000000000..df47458014 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-64-v6.10-net-dsa-mt7530-refactor-MT7530_PMEEECR_P.patch @@ -0,0 +1,71 @@ +From 2dff9759602b069f97ccc939e15a47ca051b2983 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:18 +0300 +Subject: [PATCH 11/15] net: dsa: mt7530: refactor MT7530_PMEEECR_P() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7530_PMEEECR_P() register is on MT7530, MT7531, and the switch on the +MT7988 SoC. Rename the definition for them to MT753X_PMEEECR_P(). Use the +FIELD_PREP and FIELD_GET macros. Rename GET_LPI_THRESH() and +SET_LPI_THRESH() to LPI_THRESH_GET() and LPI_THRESH_SET(). + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 8 ++++---- + drivers/net/dsa/mt7530.h | 13 +++++++------ + 2 files changed, 11 insertions(+), 10 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -3062,10 +3062,10 @@ static int mt753x_get_mac_eee(struct dsa + struct ethtool_eee *e) + { + struct mt7530_priv *priv = ds->priv; +- u32 eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port)); ++ u32 eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port)); + + e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN); +- e->tx_lpi_timer = GET_LPI_THRESH(eeecr); ++ e->tx_lpi_timer = LPI_THRESH_GET(eeecr); + + return 0; + } +@@ -3079,11 +3079,11 @@ static int mt753x_set_mac_eee(struct dsa + if (e->tx_lpi_timer > 0xFFF) + return -EINVAL; + +- set = SET_LPI_THRESH(e->tx_lpi_timer); ++ set = LPI_THRESH_SET(e->tx_lpi_timer); + if (!e->tx_lpi_enabled) + /* Force LPI Mode without a delay */ + set |= LPI_MODE_EN; +- mt7530_rmw(priv, MT7530_PMEEECR_P(port), mask, set); ++ mt7530_rmw(priv, MT753X_PMEEECR_P(port), mask, set); + + return 0; + } +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -364,13 +364,14 @@ enum mt7530_vlan_port_acc_frm { + PMCR_FORCE_SPEED_100 | \ + PMCR_FORCE_FDX | PMCR_FORCE_LNK) + +-#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) +-#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24) +-#define WAKEUP_TIME_100(x) (((x) & 0xFF) << 16) ++#define MT753X_PMEEECR_P(x) (0x3004 + (x) * 0x100) ++#define WAKEUP_TIME_1000_MASK GENMASK(31, 24) ++#define WAKEUP_TIME_1000(x) FIELD_PREP(WAKEUP_TIME_1000_MASK, x) ++#define WAKEUP_TIME_100_MASK GENMASK(23, 16) ++#define WAKEUP_TIME_100(x) FIELD_PREP(WAKEUP_TIME_100_MASK, x) + #define LPI_THRESH_MASK GENMASK(15, 4) +-#define LPI_THRESH_SHT 4 +-#define SET_LPI_THRESH(x) (((x) << LPI_THRESH_SHT) & LPI_THRESH_MASK) +-#define GET_LPI_THRESH(x) (((x) & LPI_THRESH_MASK) >> LPI_THRESH_SHT) ++#define LPI_THRESH_GET(x) FIELD_GET(LPI_THRESH_MASK, x) ++#define LPI_THRESH_SET(x) FIELD_PREP(LPI_THRESH_MASK, x) + #define LPI_MODE_EN BIT(0) + + #define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100) diff --git a/target/linux/generic/backport-6.1/790-65-v6.10-net-dsa-mt7530-get-rid-of-mac_port_validate-member-o.patch b/target/linux/generic/backport-6.1/790-65-v6.10-net-dsa-mt7530-get-rid-of-mac_port_validate-member-o.patch new file mode 100644 index 0000000000..7ce2d4c04e --- /dev/null +++ b/target/linux/generic/backport-6.1/790-65-v6.10-net-dsa-mt7530-get-rid-of-mac_port_validate-member-o.patch @@ -0,0 +1,46 @@ +From 21d67c2fabfe40baf33202d3287b67b6c16f8382 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:19 +0300 +Subject: [PATCH 12/15] net: dsa: mt7530: get rid of mac_port_validate member + of mt753x_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The mac_port_validate member of the mt753x_info structure is not being +used, remove it. Improve the member description section in the process. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.h | 10 +++------- + 1 file changed, 3 insertions(+), 7 deletions(-) + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -743,13 +743,12 @@ struct mt753x_pcs { + + /* struct mt753x_info - This is the main data structure for holding the specific + * part for each supported device ++ * @id: Holding the identifier to a switch model ++ * @pcs_ops: Holding the pointer to the MAC PCS operations structure + * @sw_setup: Holding the handler to a device initialization + * @phy_read: Holding the way reading PHY port + * @phy_write: Holding the way writing PHY port +- * @phy_mode_supported: Check if the PHY type is being supported on a certain +- * port +- * @mac_port_validate: Holding the way to set addition validate type for a +- * certan MAC port ++ * @mac_port_get_caps: Holding the handler that provides MAC capabilities + * @mac_port_config: Holding the way setting up the PHY attribute to a + * certain MAC port + */ +@@ -763,9 +762,6 @@ struct mt753x_info { + int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); + void (*mac_port_get_caps)(struct dsa_switch *ds, int port, + struct phylink_config *config); +- void (*mac_port_validate)(struct dsa_switch *ds, int port, +- phy_interface_t interface, +- unsigned long *supported); + void (*mac_port_config)(struct dsa_switch *ds, int port, + unsigned int mode, + phy_interface_t interface); diff --git a/target/linux/generic/backport-6.1/790-66-v6.10-net-dsa-mt7530-use-priv-ds-num_ports-instead-of-MT75.patch b/target/linux/generic/backport-6.1/790-66-v6.10-net-dsa-mt7530-use-priv-ds-num_ports-instead-of-MT75.patch new file mode 100644 index 0000000000..e9512421c2 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-66-v6.10-net-dsa-mt7530-use-priv-ds-num_ports-instead-of-MT75.patch @@ -0,0 +1,57 @@ +From 6efc8ae3eb0363328f479191a0cf0dc12a16e090 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:20 +0300 +Subject: [PATCH 13/15] net: dsa: mt7530: use priv->ds->num_ports instead of + MT7530_NUM_PORTS +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use priv->ds->num_ports on all for loops which configure the switch +registers. In the future, the value of MT7530_NUM_PORTS will depend on +priv->id. Therefore, this change prepares the subdriver for a simpler +implementation. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1418,7 +1418,7 @@ mt7530_port_set_vlan_unaware(struct dsa_ + mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, + G0_PORT_VID_DEF); + +- for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ for (i = 0; i < priv->ds->num_ports; i++) { + if (dsa_is_user_port(ds, i) && + dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) { + all_user_ports_removed = false; +@@ -2433,7 +2433,7 @@ mt7530_setup(struct dsa_switch *ds) + /* Enable and reset MIB counters */ + mt7530_mib_reset(ds); + +- for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ for (i = 0; i < priv->ds->num_ports; i++) { + /* Clear link settings and enable force mode to force link down + * on all ports until they're enabled later. + */ +@@ -2544,7 +2544,7 @@ mt7531_setup_common(struct dsa_switch *d + mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK | + UNU_FFP_MASK); + +- for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ for (i = 0; i < priv->ds->num_ports; i++) { + /* Clear link settings and enable force mode to force link down + * on all ports until they're enabled later. + */ +@@ -2631,7 +2631,7 @@ mt7531_setup(struct dsa_switch *ds) + priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); + + /* Force link down on all ports before internal reset */ +- for (i = 0; i < MT7530_NUM_PORTS; i++) ++ for (i = 0; i < priv->ds->num_ports; i++) + mt7530_write(priv, MT753X_PMCR_P(i), MT7531_FORCE_MODE_LNK); + + /* Reset the switch through internal reset */ diff --git a/target/linux/generic/backport-6.1/790-67-v6.10-net-dsa-mt7530-do-not-pass-port-variable-to-mt7531_r.patch b/target/linux/generic/backport-6.1/790-67-v6.10-net-dsa-mt7530-do-not-pass-port-variable-to-mt7531_r.patch new file mode 100644 index 0000000000..3b3330bdce --- /dev/null +++ b/target/linux/generic/backport-6.1/790-67-v6.10-net-dsa-mt7530-do-not-pass-port-variable-to-mt7531_r.patch @@ -0,0 +1,37 @@ +From 4794c12e3aefe05dd0063c2b6b0101854b143bac Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:21 +0300 +Subject: [PATCH 14/15] net: dsa: mt7530: do not pass port variable to + mt7531_rgmii_setup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The mt7531_rgmii_setup() function does not use the port variable, do not +pass the variable to it. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2790,7 +2790,7 @@ mt7530_mac_config(struct dsa_switch *ds, + mt7530_setup_port6(priv->ds, interface); + } + +-static void mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, ++static void mt7531_rgmii_setup(struct mt7530_priv *priv, + phy_interface_t interface, + struct phy_device *phydev) + { +@@ -2841,7 +2841,7 @@ mt7531_mac_config(struct dsa_switch *ds, + if (phy_interface_mode_is_rgmii(interface)) { + dp = dsa_to_port(ds, port); + phydev = dp->slave->phydev; +- mt7531_rgmii_setup(priv, port, interface, phydev); ++ mt7531_rgmii_setup(priv, interface, phydev); + } + } + diff --git a/target/linux/generic/backport-6.1/790-68-v6.10-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch b/target/linux/generic/backport-6.1/790-68-v6.10-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch new file mode 100644 index 0000000000..6d28e5b5f9 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-68-v6.10-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch @@ -0,0 +1,33 @@ +From c45832fe783f468aaaace09ae95a30cbf0acf724 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Mon, 22 Apr 2024 10:15:22 +0300 +Subject: [PATCH 15/15] net: dsa: mt7530: explain exposing MDIO bus of MT7531AE + better +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on MT7531AE. +Therefore, the GPIO 11-12 pins are set to function as MDC and MDIO to +expose the MDIO bus of the switch. Replace the comment with a better +explanation. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +--- + drivers/net/dsa/mt7530.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2640,7 +2640,10 @@ mt7531_setup(struct dsa_switch *ds) + if (!priv->p5_sgmii) { + mt7531_pll_setup(priv); + } else { +- /* Let ds->slave_mii_bus be able to access external phy. */ ++ /* Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on ++ * MT7531AE. Set the GPIO 11-12 pins to function as MDC and MDIO ++ * to expose the MDIO bus of the switch. ++ */ + mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK, + MT7531_EXT_P_MDC_11); + mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK, diff --git a/target/linux/generic/backport-6.1/790-69-v6.10-net-dsa-mt7530-do-not-set-MT7530_P5_DIS-when-PHY-.patch b/target/linux/generic/backport-6.1/790-69-v6.10-net-dsa-mt7530-do-not-set-MT7530_P5_DIS-when-PHY-.patch new file mode 100644 index 0000000000..29079e03c5 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-69-v6.10-net-dsa-mt7530-do-not-set-MT7530_P5_DIS-when-PHY-.patch @@ -0,0 +1,45 @@ +From 16e6592cd5c5bd74d8890973489f60176c692614 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Sun, 28 Apr 2024 12:19:58 +0300 +Subject: [PATCH] net: dsa: mt7530: do not set MT7530_P5_DIS when PHY muxing is + being used +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +DSA initalises the ds->num_ports amount of ports in +dsa_switch_touch_ports(). When the PHY muxing feature is in use, port 5 +won't be defined in the device tree. Because of this, the type member of +the dsa_port structure for this port will be assigned DSA_PORT_TYPE_UNUSED. +The dsa_port_setup() function calls ds->ops->port_disable() when the port +type is DSA_PORT_TYPE_UNUSED. + +The MT7530_P5_DIS bit is unset in mt7530_setup() when PHY muxing is being +used. mt7530_port_disable() which is assigned to ds->ops->port_disable() is +called afterwards. Currently, mt7530_port_disable() sets MT7530_P5_DIS +which breaks network connectivity when PHY muxing is being used. + +Therefore, do not set MT7530_P5_DIS when PHY muxing is being used. + +Fixes: 377174c5760c ("net: dsa: mt7530: move MT753X_MTRAP operations for MT7530") +Reported-by: Daniel Golle <daniel@makrotopia.org> +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +Reviewed-by: Andrew Lunn <andrew@lunn.ch> +Link: https://lore.kernel.org/r/20240428-for-netnext-mt7530-do-not-disable-port5-when-phy-muxing-v2-1-bb7c37d293f8@arinc9.com +Signed-off-by: Paolo Abeni <pabeni@redhat.com> +--- + drivers/net/dsa/mt7530.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1227,7 +1227,8 @@ mt7530_port_disable(struct dsa_switch *d + if (priv->id != ID_MT7530 && priv->id != ID_MT7621) + return; + +- if (port == 5) ++ /* Do not set MT7530_P5_DIS when port 5 is being used for PHY muxing. */ ++ if (port == 5 && priv->p5_mode == GMAC5) + mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS); + else if (port == 6) + mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS); diff --git a/target/linux/generic/backport-6.1/790-70-v6.10-796-net-dsa-mt7530-detect-PHY-muxing-when-PHY-is-defined.patch b/target/linux/generic/backport-6.1/790-70-v6.10-796-net-dsa-mt7530-detect-PHY-muxing-when-PHY-is-defined.patch new file mode 100644 index 0000000000..69bbb8e229 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-70-v6.10-796-net-dsa-mt7530-detect-PHY-muxing-when-PHY-is-defined.patch @@ -0,0 +1,45 @@ +From d8dcf5bd6d0eace9f7c1daa14b63b3925b09d033 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com> +Date: Tue, 30 Apr 2024 08:01:33 +0300 +Subject: [PATCH] net: dsa: mt7530: detect PHY muxing when PHY is defined on + switch MDIO bus +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Currently, the MT7530 DSA subdriver configures the MT7530 switch to provide +direct access to switch PHYs, meaning, the switch PHYs listen on the MDIO +bus the switch listens on. The PHY muxing feature makes use of this. + +This is problematic as the PHY may be attached before the switch is +initialised, in which case, the PHY will fail to be attached. + +Since commit 91374ba537bd ("net: dsa: mt7530: support OF-based registration +of switch MDIO bus"), we can describe the switch PHYs on the MDIO bus of +the switch on the device tree. Extend the check to detect PHY muxing when +the PHY is defined on the MDIO bus of the switch on the device tree. + +When the PHY is described this way, the switch will be initialised first, +then the switch MDIO bus will be registered. Only after these steps, the +PHY will be attached. + +Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> +Reviewed-by: Daniel Golle <daniel@makrotopia.org> +Link: https://lore.kernel.org/r/20240430-b4-for-netnext-mt7530-use-switch-mdio-bus-for-phy-muxing-v2-1-9104d886d0db@arinc9.com +Signed-off-by: Paolo Abeni <pabeni@redhat.com> +--- + drivers/net/dsa/mt7530.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2489,7 +2489,8 @@ mt7530_setup(struct dsa_switch *ds) + if (!phy_node) + continue; + +- if (phy_node->parent == priv->dev->of_node->parent) { ++ if (phy_node->parent == priv->dev->of_node->parent || ++ phy_node->parent->parent == priv->dev->of_node) { + ret = of_get_phy_mode(mac_np, &interface); + if (ret && ret != -ENODEV) { + of_node_put(mac_np); diff --git a/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch b/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch new file mode 100644 index 0000000000..40e857de04 --- /dev/null +++ b/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch @@ -0,0 +1,89 @@ +From b3f1a164c7f742503dc7159011f7ad6b092b660e Mon Sep 17 00:00:00 2001 +From: Greg Ungerer <gerg@kernel.org> +Date: Fri, 24 Nov 2023 14:15:28 +1000 +Subject: [PATCH] net: dsa: mv88e6xxx: fix marvell 6350 switch probing + +As of commit de5c9bf40c45 ("net: phylink: require supported_interfaces to +be filled") Marvell 88e6350 switches fail to be probed: + + ... + mv88e6085 d0072004.mdio-mii:11: switch 0x3710 detected: Marvell 88E6350, revision 2 + mv88e6085 d0072004.mdio-mii:11: phylink: error: empty supported_interfaces + error creating PHYLINK: -22 + mv88e6085: probe of d0072004.mdio-mii:11 failed with error -22 + ... + +The problem stems from the use of mv88e6185_phylink_get_caps() to get +the device capabilities. Create a new dedicated phylink_get_caps for the +6351 family (which the 6350 is one of) to properly support their set of +capabilities. + +According to chip.h the 6351 switch family includes the 6171, 6175, 6350 +and 6351 switches, so update each of these to use the correct +phylink_get_caps. + +Fixes: de5c9bf40c45 ("net: phylink: require supported_interfaces to be filled") +Signed-off-by: Greg Ungerer <gerg@kernel.org> +Reviewed-by: Andrew Lunn <andrew@lunn.ch> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + drivers/net/dsa/mv88e6xxx/chip.c | 20 ++++++++++++++++---- + 1 file changed, 16 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -652,6 +652,18 @@ static void mv88e6250_phylink_get_caps(s + config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100; + } + ++static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, ++ struct phylink_config *config) ++{ ++ unsigned long *supported = config->supported_interfaces; ++ ++ /* Translate the default cmode */ ++ mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); ++ ++ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | ++ MAC_1000FD; ++} ++ + static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip) + { + u16 reg, val; +@@ -4489,7 +4501,7 @@ static const struct mv88e6xxx_ops mv88e6 + .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, + .stu_getnext = mv88e6352_g1_stu_getnext, + .stu_loadpurge = mv88e6352_g1_stu_loadpurge, +- .phylink_get_caps = mv88e6185_phylink_get_caps, ++ .phylink_get_caps = mv88e6351_phylink_get_caps, + }; + + static const struct mv88e6xxx_ops mv88e6172_ops = { +@@ -4590,7 +4602,7 @@ static const struct mv88e6xxx_ops mv88e6 + .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, + .stu_getnext = mv88e6352_g1_stu_getnext, + .stu_loadpurge = mv88e6352_g1_stu_loadpurge, +- .phylink_get_caps = mv88e6185_phylink_get_caps, ++ .phylink_get_caps = mv88e6351_phylink_get_caps, + }; + + static const struct mv88e6xxx_ops mv88e6176_ops = { +@@ -5247,7 +5259,7 @@ static const struct mv88e6xxx_ops mv88e6 + .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, + .stu_getnext = mv88e6352_g1_stu_getnext, + .stu_loadpurge = mv88e6352_g1_stu_loadpurge, +- .phylink_get_caps = mv88e6185_phylink_get_caps, ++ .phylink_get_caps = mv88e6351_phylink_get_caps, + }; + + static const struct mv88e6xxx_ops mv88e6351_ops = { +@@ -5293,7 +5305,7 @@ static const struct mv88e6xxx_ops mv88e6 + .stu_loadpurge = mv88e6352_g1_stu_loadpurge, + .avb_ops = &mv88e6352_avb_ops, + .ptp_ops = &mv88e6352_ptp_ops, +- .phylink_get_caps = mv88e6185_phylink_get_caps, ++ .phylink_get_caps = mv88e6351_phylink_get_caps, + }; + + static const struct mv88e6xxx_ops mv88e6352_ops = { diff --git a/target/linux/generic/backport-6.1/798-v6.10-net-phy-air_en8811h-Add-the-Airoha-EN8811H-PHY-drive.patch b/target/linux/generic/backport-6.1/798-v6.10-net-phy-air_en8811h-Add-the-Airoha-EN8811H-PHY-drive.patch new file mode 100644 index 0000000000..7f963b3cf6 --- /dev/null +++ b/target/linux/generic/backport-6.1/798-v6.10-net-phy-air_en8811h-Add-the-Airoha-EN8811H-PHY-drive.patch @@ -0,0 +1,1140 @@ +From 71e79430117d56c409c5ea485a263bc0d8083390 Mon Sep 17 00:00:00 2001 +From: Eric Woudstra <ericwouds@gmail.com> +Date: Tue, 26 Mar 2024 17:23:05 +0100 +Subject: [PATCH] net: phy: air_en8811h: Add the Airoha EN8811H PHY driver + +Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The phy supports +100/1000/2500 Mbps with auto negotiation only. + +The driver uses two firmware files, for which updated versions are added to +linux-firmware already. + +Note: At phy-address + 8 there is another device on the mdio bus, that +belongs to the EN881H. While the original driver writes to it, Airoha +has confirmed this is not needed. Therefore, communication with this +device is not included in this driver. + +Signed-off-by: Eric Woudstra <ericwouds@gmail.com> +Reviewed-by: Andrew Lunn <andrew@lunn.ch> +Link: https://lore.kernel.org/r/20240326162305.303598-3-ericwouds@gmail.com +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +--- + drivers/net/phy/Kconfig | 5 + + drivers/net/phy/Makefile | 1 + + drivers/net/phy/air_en8811h.c | 1086 +++++++++++++++++++++++++++++++++ + 3 files changed, 1092 insertions(+) + create mode 100644 drivers/net/phy/air_en8811h.c + +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -63,6 +63,11 @@ config SFP + + comment "MII PHY device drivers" + ++config AIR_EN8811H_PHY ++ tristate "Airoha EN8811H 2.5 Gigabit PHY" ++ help ++ Currently supports the Airoha EN8811H PHY. ++ + config AMD_PHY + tristate "AMD PHYs" + help +--- a/drivers/net/phy/Makefile ++++ b/drivers/net/phy/Makefile +@@ -32,6 +32,7 @@ obj-y += $(sfp-obj-y) $(sfp-obj-m) + + obj-$(CONFIG_ADIN_PHY) += adin.o + obj-$(CONFIG_ADIN1100_PHY) += adin1100.o ++obj-$(CONFIG_AIR_EN8811H_PHY) += air_en8811h.o + obj-$(CONFIG_AMD_PHY) += amd.o + obj-$(CONFIG_AQUANTIA_PHY) += aquantia/ + obj-$(CONFIG_AX88796B_PHY) += ax88796b.o +--- /dev/null ++++ b/drivers/net/phy/air_en8811h.c +@@ -0,0 +1,1086 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Driver for the Airoha EN8811H 2.5 Gigabit PHY. ++ * ++ * Limitations of the EN8811H: ++ * - Only full duplex supported ++ * - Forced speed (AN off) is not supported by hardware (100Mbps) ++ * ++ * Source originated from airoha's en8811h.c and en8811h.h v1.2.1 ++ * ++ * Copyright (C) 2023 Airoha Technology Corp. ++ */ ++ ++#include <linux/phy.h> ++#include <linux/firmware.h> ++#include <linux/property.h> ++#include <linux/wordpart.h> ++#include <asm/unaligned.h> ++ ++#define EN8811H_PHY_ID 0x03a2a411 ++ ++#define EN8811H_MD32_DM "airoha/EthMD32.dm.bin" ++#define EN8811H_MD32_DSP "airoha/EthMD32.DSP.bin" ++ ++#define AIR_FW_ADDR_DM 0x00000000 ++#define AIR_FW_ADDR_DSP 0x00100000 ++ ++/* MII Registers */ ++#define AIR_AUX_CTRL_STATUS 0x1d ++#define AIR_AUX_CTRL_STATUS_SPEED_MASK GENMASK(4, 2) ++#define AIR_AUX_CTRL_STATUS_SPEED_100 0x4 ++#define AIR_AUX_CTRL_STATUS_SPEED_1000 0x8 ++#define AIR_AUX_CTRL_STATUS_SPEED_2500 0xc ++ ++#define AIR_EXT_PAGE_ACCESS 0x1f ++#define AIR_PHY_PAGE_STANDARD 0x0000 ++#define AIR_PHY_PAGE_EXTENDED_4 0x0004 ++ ++/* MII Registers Page 4*/ ++#define AIR_BPBUS_MODE 0x10 ++#define AIR_BPBUS_MODE_ADDR_FIXED 0x0000 ++#define AIR_BPBUS_MODE_ADDR_INCR BIT(15) ++#define AIR_BPBUS_WR_ADDR_HIGH 0x11 ++#define AIR_BPBUS_WR_ADDR_LOW 0x12 ++#define AIR_BPBUS_WR_DATA_HIGH 0x13 ++#define AIR_BPBUS_WR_DATA_LOW 0x14 ++#define AIR_BPBUS_RD_ADDR_HIGH 0x15 ++#define AIR_BPBUS_RD_ADDR_LOW 0x16 ++#define AIR_BPBUS_RD_DATA_HIGH 0x17 ++#define AIR_BPBUS_RD_DATA_LOW 0x18 ++ ++/* Registers on MDIO_MMD_VEND1 */ ++#define EN8811H_PHY_FW_STATUS 0x8009 ++#define EN8811H_PHY_READY 0x02 ++ ++#define AIR_PHY_MCU_CMD_1 0x800c ++#define AIR_PHY_MCU_CMD_1_MODE1 0x0 ++#define AIR_PHY_MCU_CMD_2 0x800d ++#define AIR_PHY_MCU_CMD_2_MODE1 0x0 ++#define AIR_PHY_MCU_CMD_3 0x800e ++#define AIR_PHY_MCU_CMD_3_MODE1 0x1101 ++#define AIR_PHY_MCU_CMD_3_DOCMD 0x1100 ++#define AIR_PHY_MCU_CMD_4 0x800f ++#define AIR_PHY_MCU_CMD_4_MODE1 0x0002 ++#define AIR_PHY_MCU_CMD_4_INTCLR 0x00e4 ++ ++/* Registers on MDIO_MMD_VEND2 */ ++#define AIR_PHY_LED_BCR 0x021 ++#define AIR_PHY_LED_BCR_MODE_MASK GENMASK(1, 0) ++#define AIR_PHY_LED_BCR_TIME_TEST BIT(2) ++#define AIR_PHY_LED_BCR_CLK_EN BIT(3) ++#define AIR_PHY_LED_BCR_EXT_CTRL BIT(15) ++ ++#define AIR_PHY_LED_DUR_ON 0x022 ++ ++#define AIR_PHY_LED_DUR_BLINK 0x023 ++ ++#define AIR_PHY_LED_ON(i) (0x024 + ((i) * 2)) ++#define AIR_PHY_LED_ON_MASK (GENMASK(6, 0) | BIT(8)) ++#define AIR_PHY_LED_ON_LINK1000 BIT(0) ++#define AIR_PHY_LED_ON_LINK100 BIT(1) ++#define AIR_PHY_LED_ON_LINK10 BIT(2) ++#define AIR_PHY_LED_ON_LINKDOWN BIT(3) ++#define AIR_PHY_LED_ON_FDX BIT(4) /* Full duplex */ ++#define AIR_PHY_LED_ON_HDX BIT(5) /* Half duplex */ ++#define AIR_PHY_LED_ON_FORCE_ON BIT(6) ++#define AIR_PHY_LED_ON_LINK2500 BIT(8) ++#define AIR_PHY_LED_ON_POLARITY BIT(14) ++#define AIR_PHY_LED_ON_ENABLE BIT(15) ++ ++#define AIR_PHY_LED_BLINK(i) (0x025 + ((i) * 2)) ++#define AIR_PHY_LED_BLINK_1000TX BIT(0) ++#define AIR_PHY_LED_BLINK_1000RX BIT(1) ++#define AIR_PHY_LED_BLINK_100TX BIT(2) ++#define AIR_PHY_LED_BLINK_100RX BIT(3) ++#define AIR_PHY_LED_BLINK_10TX BIT(4) ++#define AIR_PHY_LED_BLINK_10RX BIT(5) ++#define AIR_PHY_LED_BLINK_COLLISION BIT(6) ++#define AIR_PHY_LED_BLINK_RX_CRC_ERR BIT(7) ++#define AIR_PHY_LED_BLINK_RX_IDLE_ERR BIT(8) ++#define AIR_PHY_LED_BLINK_FORCE_BLINK BIT(9) ++#define AIR_PHY_LED_BLINK_2500TX BIT(10) ++#define AIR_PHY_LED_BLINK_2500RX BIT(11) ++ ++/* Registers on BUCKPBUS */ ++#define EN8811H_2P5G_LPA 0x3b30 ++#define EN8811H_2P5G_LPA_2P5G BIT(0) ++ ++#define EN8811H_FW_VERSION 0x3b3c ++ ++#define EN8811H_POLARITY 0xca0f8 ++#define EN8811H_POLARITY_TX_NORMAL BIT(0) ++#define EN8811H_POLARITY_RX_REVERSE BIT(1) ++ ++#define EN8811H_GPIO_OUTPUT 0xcf8b8 ++#define EN8811H_GPIO_OUTPUT_345 (BIT(3) | BIT(4) | BIT(5)) ++ ++#define EN8811H_FW_CTRL_1 0x0f0018 ++#define EN8811H_FW_CTRL_1_START 0x0 ++#define EN8811H_FW_CTRL_1_FINISH 0x1 ++#define EN8811H_FW_CTRL_2 0x800000 ++#define EN8811H_FW_CTRL_2_LOADING BIT(11) ++ ++/* Led definitions */ ++#define EN8811H_LED_COUNT 3 ++ ++/* Default LED setup: ++ * GPIO5 <-> LED0 On: Link detected, blink Rx/Tx ++ * GPIO4 <-> LED1 On: Link detected at 2500 or 1000 Mbps ++ * GPIO3 <-> LED2 On: Link detected at 2500 or 100 Mbps ++ */ ++#define AIR_DEFAULT_TRIGGER_LED0 (BIT(TRIGGER_NETDEV_LINK) | \ ++ BIT(TRIGGER_NETDEV_RX) | \ ++ BIT(TRIGGER_NETDEV_TX)) ++#define AIR_DEFAULT_TRIGGER_LED1 (BIT(TRIGGER_NETDEV_LINK_2500) | \ ++ BIT(TRIGGER_NETDEV_LINK_1000)) ++#define AIR_DEFAULT_TRIGGER_LED2 (BIT(TRIGGER_NETDEV_LINK_2500) | \ ++ BIT(TRIGGER_NETDEV_LINK_100)) ++ ++struct led { ++ unsigned long rules; ++ unsigned long state; ++}; ++ ++struct en8811h_priv { ++ u32 firmware_version; ++ bool mcu_needs_restart; ++ struct led led[EN8811H_LED_COUNT]; ++}; ++ ++enum { ++ AIR_PHY_LED_STATE_FORCE_ON, ++ AIR_PHY_LED_STATE_FORCE_BLINK, ++}; ++ ++enum { ++ AIR_PHY_LED_DUR_BLINK_32MS, ++ AIR_PHY_LED_DUR_BLINK_64MS, ++ AIR_PHY_LED_DUR_BLINK_128MS, ++ AIR_PHY_LED_DUR_BLINK_256MS, ++ AIR_PHY_LED_DUR_BLINK_512MS, ++ AIR_PHY_LED_DUR_BLINK_1024MS, ++}; ++ ++enum { ++ AIR_LED_DISABLE, ++ AIR_LED_ENABLE, ++}; ++ ++enum { ++ AIR_ACTIVE_LOW, ++ AIR_ACTIVE_HIGH, ++}; ++ ++enum { ++ AIR_LED_MODE_DISABLE, ++ AIR_LED_MODE_USER_DEFINE, ++}; ++ ++#define AIR_PHY_LED_DUR_UNIT 1024 ++#define AIR_PHY_LED_DUR (AIR_PHY_LED_DUR_UNIT << AIR_PHY_LED_DUR_BLINK_64MS) ++ ++static const unsigned long en8811h_led_trig = BIT(TRIGGER_NETDEV_FULL_DUPLEX) | ++ BIT(TRIGGER_NETDEV_LINK) | ++ BIT(TRIGGER_NETDEV_LINK_10) | ++ BIT(TRIGGER_NETDEV_LINK_100) | ++ BIT(TRIGGER_NETDEV_LINK_1000) | ++ BIT(TRIGGER_NETDEV_LINK_2500) | ++ BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX); ++ ++static int air_phy_read_page(struct phy_device *phydev) ++{ ++ return __phy_read(phydev, AIR_EXT_PAGE_ACCESS); ++} ++ ++static int air_phy_write_page(struct phy_device *phydev, int page) ++{ ++ return __phy_write(phydev, AIR_EXT_PAGE_ACCESS, page); ++} ++ ++static int __air_buckpbus_reg_write(struct phy_device *phydev, ++ u32 pbus_address, u32 pbus_data) ++{ ++ int ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH, ++ upper_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW, ++ lower_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH, ++ upper_16_bits(pbus_data)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW, ++ lower_16_bits(pbus_data)); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int air_buckpbus_reg_write(struct phy_device *phydev, ++ u32 pbus_address, u32 pbus_data) ++{ ++ int saved_page; ++ int ret = 0; ++ ++ saved_page = phy_select_page(phydev, AIR_PHY_PAGE_EXTENDED_4); ++ ++ if (saved_page >= 0) { ++ ret = __air_buckpbus_reg_write(phydev, pbus_address, ++ pbus_data); ++ if (ret < 0) ++ phydev_err(phydev, "%s 0x%08x failed: %d\n", __func__, ++ pbus_address, ret); ++ } ++ ++ return phy_restore_page(phydev, saved_page, ret); ++} ++ ++static int __air_buckpbus_reg_read(struct phy_device *phydev, ++ u32 pbus_address, u32 *pbus_data) ++{ ++ int pbus_data_low, pbus_data_high; ++ int ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_HIGH, ++ upper_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_LOW, ++ lower_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ pbus_data_high = __phy_read(phydev, AIR_BPBUS_RD_DATA_HIGH); ++ if (pbus_data_high < 0) ++ return ret; ++ ++ pbus_data_low = __phy_read(phydev, AIR_BPBUS_RD_DATA_LOW); ++ if (pbus_data_low < 0) ++ return ret; ++ ++ *pbus_data = pbus_data_low | (pbus_data_high << 16); ++ return 0; ++} ++ ++static int air_buckpbus_reg_read(struct phy_device *phydev, ++ u32 pbus_address, u32 *pbus_data) ++{ ++ int saved_page; ++ int ret = 0; ++ ++ saved_page = phy_select_page(phydev, AIR_PHY_PAGE_EXTENDED_4); ++ ++ if (saved_page >= 0) { ++ ret = __air_buckpbus_reg_read(phydev, pbus_address, pbus_data); ++ if (ret < 0) ++ phydev_err(phydev, "%s 0x%08x failed: %d\n", __func__, ++ pbus_address, ret); ++ } ++ ++ return phy_restore_page(phydev, saved_page, ret); ++} ++ ++static int __air_buckpbus_reg_modify(struct phy_device *phydev, ++ u32 pbus_address, u32 mask, u32 set) ++{ ++ int pbus_data_low, pbus_data_high; ++ u32 pbus_data_old, pbus_data_new; ++ int ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_HIGH, ++ upper_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_LOW, ++ lower_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ pbus_data_high = __phy_read(phydev, AIR_BPBUS_RD_DATA_HIGH); ++ if (pbus_data_high < 0) ++ return ret; ++ ++ pbus_data_low = __phy_read(phydev, AIR_BPBUS_RD_DATA_LOW); ++ if (pbus_data_low < 0) ++ return ret; ++ ++ pbus_data_old = pbus_data_low | (pbus_data_high << 16); ++ pbus_data_new = (pbus_data_old & ~mask) | set; ++ if (pbus_data_new == pbus_data_old) ++ return 0; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH, ++ upper_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW, ++ lower_16_bits(pbus_address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH, ++ upper_16_bits(pbus_data_new)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW, ++ lower_16_bits(pbus_data_new)); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int air_buckpbus_reg_modify(struct phy_device *phydev, ++ u32 pbus_address, u32 mask, u32 set) ++{ ++ int saved_page; ++ int ret = 0; ++ ++ saved_page = phy_select_page(phydev, AIR_PHY_PAGE_EXTENDED_4); ++ ++ if (saved_page >= 0) { ++ ret = __air_buckpbus_reg_modify(phydev, pbus_address, mask, ++ set); ++ if (ret < 0) ++ phydev_err(phydev, "%s 0x%08x failed: %d\n", __func__, ++ pbus_address, ret); ++ } ++ ++ return phy_restore_page(phydev, saved_page, ret); ++} ++ ++static int __air_write_buf(struct phy_device *phydev, u32 address, ++ const struct firmware *fw) ++{ ++ unsigned int offset; ++ int ret; ++ u16 val; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_INCR); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH, ++ upper_16_bits(address)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW, ++ lower_16_bits(address)); ++ if (ret < 0) ++ return ret; ++ ++ for (offset = 0; offset < fw->size; offset += 4) { ++ val = get_unaligned_le16(&fw->data[offset + 2]); ++ ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH, val); ++ if (ret < 0) ++ return ret; ++ ++ val = get_unaligned_le16(&fw->data[offset]); ++ ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW, val); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int air_write_buf(struct phy_device *phydev, u32 address, ++ const struct firmware *fw) ++{ ++ int saved_page; ++ int ret = 0; ++ ++ saved_page = phy_select_page(phydev, AIR_PHY_PAGE_EXTENDED_4); ++ ++ if (saved_page >= 0) { ++ ret = __air_write_buf(phydev, address, fw); ++ if (ret < 0) ++ phydev_err(phydev, "%s 0x%08x failed: %d\n", __func__, ++ address, ret); ++ } ++ ++ return phy_restore_page(phydev, saved_page, ret); ++} ++ ++static int en8811h_wait_mcu_ready(struct phy_device *phydev) ++{ ++ int ret, reg_value; ++ ++ /* Because of mdio-lock, may have to wait for multiple loads */ ++ ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ++ EN8811H_PHY_FW_STATUS, reg_value, ++ reg_value == EN8811H_PHY_READY, ++ 20000, 7500000, true); ++ if (ret) { ++ phydev_err(phydev, "MCU not ready: 0x%x\n", reg_value); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ ++static int en8811h_load_firmware(struct phy_device *phydev) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ struct device *dev = &phydev->mdio.dev; ++ const struct firmware *fw1, *fw2; ++ int ret; ++ ++ ret = request_firmware_direct(&fw1, EN8811H_MD32_DM, dev); ++ if (ret < 0) ++ return ret; ++ ++ ret = request_firmware_direct(&fw2, EN8811H_MD32_DSP, dev); ++ if (ret < 0) ++ goto en8811h_load_firmware_rel1; ++ ++ ret = air_buckpbus_reg_write(phydev, EN8811H_FW_CTRL_1, ++ EN8811H_FW_CTRL_1_START); ++ if (ret < 0) ++ goto en8811h_load_firmware_out; ++ ++ ret = air_buckpbus_reg_modify(phydev, EN8811H_FW_CTRL_2, ++ EN8811H_FW_CTRL_2_LOADING, ++ EN8811H_FW_CTRL_2_LOADING); ++ if (ret < 0) ++ goto en8811h_load_firmware_out; ++ ++ ret = air_write_buf(phydev, AIR_FW_ADDR_DM, fw1); ++ if (ret < 0) ++ goto en8811h_load_firmware_out; ++ ++ ret = air_write_buf(phydev, AIR_FW_ADDR_DSP, fw2); ++ if (ret < 0) ++ goto en8811h_load_firmware_out; ++ ++ ret = air_buckpbus_reg_modify(phydev, EN8811H_FW_CTRL_2, ++ EN8811H_FW_CTRL_2_LOADING, 0); ++ if (ret < 0) ++ goto en8811h_load_firmware_out; ++ ++ ret = air_buckpbus_reg_write(phydev, EN8811H_FW_CTRL_1, ++ EN8811H_FW_CTRL_1_FINISH); ++ if (ret < 0) ++ goto en8811h_load_firmware_out; ++ ++ ret = en8811h_wait_mcu_ready(phydev); ++ ++ air_buckpbus_reg_read(phydev, EN8811H_FW_VERSION, ++ &priv->firmware_version); ++ phydev_info(phydev, "MD32 firmware version: %08x\n", ++ priv->firmware_version); ++ ++en8811h_load_firmware_out: ++ release_firmware(fw2); ++ ++en8811h_load_firmware_rel1: ++ release_firmware(fw1); ++ ++ if (ret < 0) ++ phydev_err(phydev, "Load firmware failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static int en8811h_restart_mcu(struct phy_device *phydev) ++{ ++ int ret; ++ ++ ret = air_buckpbus_reg_write(phydev, EN8811H_FW_CTRL_1, ++ EN8811H_FW_CTRL_1_START); ++ if (ret < 0) ++ return ret; ++ ++ ret = air_buckpbus_reg_write(phydev, EN8811H_FW_CTRL_1, ++ EN8811H_FW_CTRL_1_FINISH); ++ if (ret < 0) ++ return ret; ++ ++ return en8811h_wait_mcu_ready(phydev); ++} ++ ++static int air_hw_led_on_set(struct phy_device *phydev, u8 index, bool on) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ bool changed; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ if (on) ++ changed = !test_and_set_bit(AIR_PHY_LED_STATE_FORCE_ON, ++ &priv->led[index].state); ++ else ++ changed = !!test_and_clear_bit(AIR_PHY_LED_STATE_FORCE_ON, ++ &priv->led[index].state); ++ ++ changed |= (priv->led[index].rules != 0); ++ ++ if (changed) ++ return phy_modify_mmd(phydev, MDIO_MMD_VEND2, ++ AIR_PHY_LED_ON(index), ++ AIR_PHY_LED_ON_MASK, ++ on ? AIR_PHY_LED_ON_FORCE_ON : 0); ++ ++ return 0; ++} ++ ++static int air_hw_led_blink_set(struct phy_device *phydev, u8 index, ++ bool blinking) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ bool changed; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ if (blinking) ++ changed = !test_and_set_bit(AIR_PHY_LED_STATE_FORCE_BLINK, ++ &priv->led[index].state); ++ else ++ changed = !!test_and_clear_bit(AIR_PHY_LED_STATE_FORCE_BLINK, ++ &priv->led[index].state); ++ ++ changed |= (priv->led[index].rules != 0); ++ ++ if (changed) ++ return phy_write_mmd(phydev, MDIO_MMD_VEND2, ++ AIR_PHY_LED_BLINK(index), ++ blinking ? ++ AIR_PHY_LED_BLINK_FORCE_BLINK : 0); ++ else ++ return 0; ++} ++ ++static int air_led_blink_set(struct phy_device *phydev, u8 index, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ bool blinking = false; ++ int err; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ if (delay_on && delay_off && (*delay_on > 0) && (*delay_off > 0)) { ++ blinking = true; ++ *delay_on = 50; ++ *delay_off = 50; ++ } ++ ++ err = air_hw_led_blink_set(phydev, index, blinking); ++ if (err) ++ return err; ++ ++ /* led-blink set, so switch led-on off */ ++ err = air_hw_led_on_set(phydev, index, false); ++ if (err) ++ return err; ++ ++ /* hw-control is off*/ ++ if (!!test_bit(AIR_PHY_LED_STATE_FORCE_BLINK, &priv->led[index].state)) ++ priv->led[index].rules = 0; ++ ++ return 0; ++} ++ ++static int air_led_brightness_set(struct phy_device *phydev, u8 index, ++ enum led_brightness value) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ int err; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ /* led-on set, so switch led-blink off */ ++ err = air_hw_led_blink_set(phydev, index, false); ++ if (err) ++ return err; ++ ++ err = air_hw_led_on_set(phydev, index, (value != LED_OFF)); ++ if (err) ++ return err; ++ ++ /* hw-control is off */ ++ if (!!test_bit(AIR_PHY_LED_STATE_FORCE_ON, &priv->led[index].state)) ++ priv->led[index].rules = 0; ++ ++ return 0; ++} ++ ++static int air_led_hw_control_get(struct phy_device *phydev, u8 index, ++ unsigned long *rules) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ *rules = priv->led[index].rules; ++ ++ return 0; ++}; ++ ++static int air_led_hw_control_set(struct phy_device *phydev, u8 index, ++ unsigned long rules) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ u16 on = 0, blink = 0; ++ int ret; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ priv->led[index].rules = rules; ++ ++ if (rules & BIT(TRIGGER_NETDEV_FULL_DUPLEX)) ++ on |= AIR_PHY_LED_ON_FDX; ++ ++ if (rules & (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK))) ++ on |= AIR_PHY_LED_ON_LINK10; ++ ++ if (rules & (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK))) ++ on |= AIR_PHY_LED_ON_LINK100; ++ ++ if (rules & (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK))) ++ on |= AIR_PHY_LED_ON_LINK1000; ++ ++ if (rules & (BIT(TRIGGER_NETDEV_LINK_2500) | BIT(TRIGGER_NETDEV_LINK))) ++ on |= AIR_PHY_LED_ON_LINK2500; ++ ++ if (rules & BIT(TRIGGER_NETDEV_RX)) { ++ blink |= AIR_PHY_LED_BLINK_10RX | ++ AIR_PHY_LED_BLINK_100RX | ++ AIR_PHY_LED_BLINK_1000RX | ++ AIR_PHY_LED_BLINK_2500RX; ++ } ++ ++ if (rules & BIT(TRIGGER_NETDEV_TX)) { ++ blink |= AIR_PHY_LED_BLINK_10TX | ++ AIR_PHY_LED_BLINK_100TX | ++ AIR_PHY_LED_BLINK_1000TX | ++ AIR_PHY_LED_BLINK_2500TX; ++ } ++ ++ if (blink || on) { ++ /* switch hw-control on, so led-on and led-blink are off */ ++ clear_bit(AIR_PHY_LED_STATE_FORCE_ON, ++ &priv->led[index].state); ++ clear_bit(AIR_PHY_LED_STATE_FORCE_BLINK, ++ &priv->led[index].state); ++ } else { ++ priv->led[index].rules = 0; ++ } ++ ++ ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_ON(index), ++ AIR_PHY_LED_ON_MASK, on); ++ ++ if (ret < 0) ++ return ret; ++ ++ return phy_write_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_BLINK(index), ++ blink); ++}; ++ ++static int air_led_init(struct phy_device *phydev, u8 index, u8 state, u8 pol) ++{ ++ int val = 0; ++ int err; ++ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ if (state == AIR_LED_ENABLE) ++ val |= AIR_PHY_LED_ON_ENABLE; ++ else ++ val &= ~AIR_PHY_LED_ON_ENABLE; ++ ++ if (pol == AIR_ACTIVE_HIGH) ++ val |= AIR_PHY_LED_ON_POLARITY; ++ else ++ val &= ~AIR_PHY_LED_ON_POLARITY; ++ ++ err = phy_modify_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_ON(index), ++ AIR_PHY_LED_ON_ENABLE | ++ AIR_PHY_LED_ON_POLARITY, val); ++ ++ if (err < 0) ++ return err; ++ ++ return 0; ++} ++ ++static int air_leds_init(struct phy_device *phydev, int num, int dur, int mode) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ int ret, i; ++ ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_DUR_BLINK, ++ dur); ++ if (ret < 0) ++ return ret; ++ ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_DUR_ON, ++ dur >> 1); ++ if (ret < 0) ++ return ret; ++ ++ switch (mode) { ++ case AIR_LED_MODE_DISABLE: ++ ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_BCR, ++ AIR_PHY_LED_BCR_EXT_CTRL | ++ AIR_PHY_LED_BCR_MODE_MASK, 0); ++ if (ret < 0) ++ return ret; ++ break; ++ case AIR_LED_MODE_USER_DEFINE: ++ ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, AIR_PHY_LED_BCR, ++ AIR_PHY_LED_BCR_EXT_CTRL | ++ AIR_PHY_LED_BCR_CLK_EN, ++ AIR_PHY_LED_BCR_EXT_CTRL | ++ AIR_PHY_LED_BCR_CLK_EN); ++ if (ret < 0) ++ return ret; ++ break; ++ default: ++ phydev_err(phydev, "LED mode %d is not supported\n", mode); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < num; ++i) { ++ ret = air_led_init(phydev, i, AIR_LED_ENABLE, AIR_ACTIVE_HIGH); ++ if (ret < 0) { ++ phydev_err(phydev, "LED%d init failed: %d\n", i, ret); ++ return ret; ++ } ++ air_led_hw_control_set(phydev, i, priv->led[i].rules); ++ } ++ ++ return 0; ++} ++ ++static int en8811h_led_hw_is_supported(struct phy_device *phydev, u8 index, ++ unsigned long rules) ++{ ++ if (index >= EN8811H_LED_COUNT) ++ return -EINVAL; ++ ++ /* All combinations of the supported triggers are allowed */ ++ if (rules & ~en8811h_led_trig) ++ return -EOPNOTSUPP; ++ ++ return 0; ++}; ++ ++static int en8811h_probe(struct phy_device *phydev) ++{ ++ struct en8811h_priv *priv; ++ int ret; ++ ++ priv = devm_kzalloc(&phydev->mdio.dev, sizeof(struct en8811h_priv), ++ GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ phydev->priv = priv; ++ ++ ret = en8811h_load_firmware(phydev); ++ if (ret < 0) ++ return ret; ++ ++ /* mcu has just restarted after firmware load */ ++ priv->mcu_needs_restart = false; ++ ++ priv->led[0].rules = AIR_DEFAULT_TRIGGER_LED0; ++ priv->led[1].rules = AIR_DEFAULT_TRIGGER_LED1; ++ priv->led[2].rules = AIR_DEFAULT_TRIGGER_LED2; ++ ++ /* MDIO_DEVS1/2 empty, so set mmds_present bits here */ ++ phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_AN; ++ ++ ret = air_leds_init(phydev, EN8811H_LED_COUNT, AIR_PHY_LED_DUR, ++ AIR_LED_MODE_DISABLE); ++ if (ret < 0) { ++ phydev_err(phydev, "Failed to disable leds: %d\n", ret); ++ return ret; ++ } ++ ++ /* Configure led gpio pins as output */ ++ ret = air_buckpbus_reg_modify(phydev, EN8811H_GPIO_OUTPUT, ++ EN8811H_GPIO_OUTPUT_345, ++ EN8811H_GPIO_OUTPUT_345); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int en8811h_config_init(struct phy_device *phydev) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ struct device *dev = &phydev->mdio.dev; ++ u32 pbus_value; ++ int ret; ++ ++ /* If restart happened in .probe(), no need to restart now */ ++ if (priv->mcu_needs_restart) { ++ ret = en8811h_restart_mcu(phydev); ++ if (ret < 0) ++ return ret; ++ } else { ++ /* Next calls to .config_init() mcu needs to restart */ ++ priv->mcu_needs_restart = true; ++ } ++ ++ /* Select mode 1, the only mode supported. ++ * Configures the SerDes for 2500Base-X with rate adaptation ++ */ ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AIR_PHY_MCU_CMD_1, ++ AIR_PHY_MCU_CMD_1_MODE1); ++ if (ret < 0) ++ return ret; ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AIR_PHY_MCU_CMD_2, ++ AIR_PHY_MCU_CMD_2_MODE1); ++ if (ret < 0) ++ return ret; ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AIR_PHY_MCU_CMD_3, ++ AIR_PHY_MCU_CMD_3_MODE1); ++ if (ret < 0) ++ return ret; ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AIR_PHY_MCU_CMD_4, ++ AIR_PHY_MCU_CMD_4_MODE1); ++ if (ret < 0) ++ return ret; ++ ++ /* Serdes polarity */ ++ pbus_value = 0; ++ if (device_property_read_bool(dev, "airoha,pnswap-rx")) ++ pbus_value |= EN8811H_POLARITY_RX_REVERSE; ++ else ++ pbus_value &= ~EN8811H_POLARITY_RX_REVERSE; ++ if (device_property_read_bool(dev, "airoha,pnswap-tx")) ++ pbus_value &= ~EN8811H_POLARITY_TX_NORMAL; ++ else ++ pbus_value |= EN8811H_POLARITY_TX_NORMAL; ++ ret = air_buckpbus_reg_modify(phydev, EN8811H_POLARITY, ++ EN8811H_POLARITY_RX_REVERSE | ++ EN8811H_POLARITY_TX_NORMAL, pbus_value); ++ if (ret < 0) ++ return ret; ++ ++ ret = air_leds_init(phydev, EN8811H_LED_COUNT, AIR_PHY_LED_DUR, ++ AIR_LED_MODE_USER_DEFINE); ++ if (ret < 0) { ++ phydev_err(phydev, "Failed to initialize leds: %d\n", ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int en8811h_get_features(struct phy_device *phydev) ++{ ++ linkmode_set_bit_array(phy_basic_ports_array, ++ ARRAY_SIZE(phy_basic_ports_array), ++ phydev->supported); ++ ++ return genphy_c45_pma_read_abilities(phydev); ++} ++ ++static int en8811h_get_rate_matching(struct phy_device *phydev, ++ phy_interface_t iface) ++{ ++ return RATE_MATCH_PAUSE; ++} ++ ++static int en8811h_config_aneg(struct phy_device *phydev) ++{ ++ bool changed = false; ++ int ret; ++ u32 adv; ++ ++ if (phydev->autoneg == AUTONEG_DISABLE) { ++ phydev_warn(phydev, "Disabling autoneg is not supported\n"); ++ return -EINVAL; ++ } ++ ++ adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising); ++ ++ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, ++ MDIO_AN_10GBT_CTRL_ADV2_5G, adv); ++ if (ret < 0) ++ return ret; ++ if (ret > 0) ++ changed = true; ++ ++ return __genphy_config_aneg(phydev, changed); ++} ++ ++static int en8811h_read_status(struct phy_device *phydev) ++{ ++ struct en8811h_priv *priv = phydev->priv; ++ u32 pbus_value; ++ int ret, val; ++ ++ ret = genphy_update_link(phydev); ++ if (ret) ++ return ret; ++ ++ phydev->master_slave_get = MASTER_SLAVE_CFG_UNSUPPORTED; ++ phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED; ++ phydev->speed = SPEED_UNKNOWN; ++ phydev->duplex = DUPLEX_UNKNOWN; ++ phydev->pause = 0; ++ phydev->asym_pause = 0; ++ phydev->rate_matching = RATE_MATCH_PAUSE; ++ ++ ret = genphy_read_master_slave(phydev); ++ if (ret < 0) ++ return ret; ++ ++ ret = genphy_read_lpa(phydev); ++ if (ret < 0) ++ return ret; ++ ++ /* Get link partner 2.5GBASE-T ability from vendor register */ ++ ret = air_buckpbus_reg_read(phydev, EN8811H_2P5G_LPA, &pbus_value); ++ if (ret < 0) ++ return ret; ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ phydev->lp_advertising, ++ pbus_value & EN8811H_2P5G_LPA_2P5G); ++ ++ if (phydev->autoneg_complete) ++ phy_resolve_aneg_pause(phydev); ++ ++ if (!phydev->link) ++ return 0; ++ ++ /* Get real speed from vendor register */ ++ val = phy_read(phydev, AIR_AUX_CTRL_STATUS); ++ if (val < 0) ++ return val; ++ switch (val & AIR_AUX_CTRL_STATUS_SPEED_MASK) { ++ case AIR_AUX_CTRL_STATUS_SPEED_2500: ++ phydev->speed = SPEED_2500; ++ break; ++ case AIR_AUX_CTRL_STATUS_SPEED_1000: ++ phydev->speed = SPEED_1000; ++ break; ++ case AIR_AUX_CTRL_STATUS_SPEED_100: ++ phydev->speed = SPEED_100; ++ break; ++ } ++ ++ /* Firmware before version 24011202 has no vendor register 2P5G_LPA. ++ * Assume link partner advertised it if connected at 2500Mbps. ++ */ ++ if (priv->firmware_version < 0x24011202) { ++ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, ++ phydev->lp_advertising, ++ phydev->speed == SPEED_2500); ++ } ++ ++ /* Only supports full duplex */ ++ phydev->duplex = DUPLEX_FULL; ++ ++ return 0; ++} ++ ++static int en8811h_clear_intr(struct phy_device *phydev) ++{ ++ int ret; ++ ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AIR_PHY_MCU_CMD_3, ++ AIR_PHY_MCU_CMD_3_DOCMD); ++ if (ret < 0) ++ return ret; ++ ++ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AIR_PHY_MCU_CMD_4, ++ AIR_PHY_MCU_CMD_4_INTCLR); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static irqreturn_t en8811h_handle_interrupt(struct phy_device *phydev) ++{ ++ int ret; ++ ++ ret = en8811h_clear_intr(phydev); ++ if (ret < 0) { ++ phy_error(phydev); ++ return IRQ_NONE; ++ } ++ ++ phy_trigger_machine(phydev); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct phy_driver en8811h_driver[] = { ++{ ++ PHY_ID_MATCH_MODEL(EN8811H_PHY_ID), ++ .name = "Airoha EN8811H", ++ .probe = en8811h_probe, ++ .get_features = en8811h_get_features, ++ .config_init = en8811h_config_init, ++ .get_rate_matching = en8811h_get_rate_matching, ++ .config_aneg = en8811h_config_aneg, ++ .read_status = en8811h_read_status, ++ .config_intr = en8811h_clear_intr, ++ .handle_interrupt = en8811h_handle_interrupt, ++ .led_hw_is_supported = en8811h_led_hw_is_supported, ++ .read_page = air_phy_read_page, ++ .write_page = air_phy_write_page, ++ .led_blink_set = air_led_blink_set, ++ .led_brightness_set = air_led_brightness_set, ++ .led_hw_control_set = air_led_hw_control_set, ++ .led_hw_control_get = air_led_hw_control_get, ++} }; ++ ++module_phy_driver(en8811h_driver); ++ ++static struct mdio_device_id __maybe_unused en8811h_tbl[] = { ++ { PHY_ID_MATCH_MODEL(EN8811H_PHY_ID) }, ++ { } ++}; ++ ++MODULE_DEVICE_TABLE(mdio, en8811h_tbl); ++MODULE_FIRMWARE(EN8811H_MD32_DM); ++MODULE_FIRMWARE(EN8811H_MD32_DSP); ++ ++MODULE_DESCRIPTION("Airoha EN8811H PHY drivers"); ++MODULE_AUTHOR("Airoha"); ++MODULE_AUTHOR("Eric Woudstra <ericwouds@gmail.com>"); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/generic/backport-6.1/799-v6.10-net-phy-air_en8811h-fix-some-error-codes.patch b/target/linux/generic/backport-6.1/799-v6.10-net-phy-air_en8811h-fix-some-error-codes.patch new file mode 100644 index 0000000000..1bd0eefe77 --- /dev/null +++ b/target/linux/generic/backport-6.1/799-v6.10-net-phy-air_en8811h-fix-some-error-codes.patch @@ -0,0 +1,47 @@ +From 87c33315af380ca12a2e59ac94edad4fe0481b4c Mon Sep 17 00:00:00 2001 +From: Dan Carpenter <dan.carpenter@linaro.org> +Date: Fri, 5 Apr 2024 13:08:59 +0300 +Subject: [PATCH] net: phy: air_en8811h: fix some error codes + +These error paths accidentally return "ret" which is zero/success +instead of the correct error code. + +Fixes: 71e79430117d ("net: phy: air_en8811h: Add the Airoha EN8811H PHY driver") +Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> +Reviewed-by: Simon Horman <horms@kernel.org> +Link: https://lore.kernel.org/r/7ef2e230-dfb7-4a77-8973-9e5be1a99fc2@moroto.mountain +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +--- + drivers/net/phy/air_en8811h.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/net/phy/air_en8811h.c ++++ b/drivers/net/phy/air_en8811h.c +@@ -272,11 +272,11 @@ static int __air_buckpbus_reg_read(struc + + pbus_data_high = __phy_read(phydev, AIR_BPBUS_RD_DATA_HIGH); + if (pbus_data_high < 0) +- return ret; ++ return pbus_data_high; + + pbus_data_low = __phy_read(phydev, AIR_BPBUS_RD_DATA_LOW); + if (pbus_data_low < 0) +- return ret; ++ return pbus_data_low; + + *pbus_data = pbus_data_low | (pbus_data_high << 16); + return 0; +@@ -323,11 +323,11 @@ static int __air_buckpbus_reg_modify(str + + pbus_data_high = __phy_read(phydev, AIR_BPBUS_RD_DATA_HIGH); + if (pbus_data_high < 0) +- return ret; ++ return pbus_data_high; + + pbus_data_low = __phy_read(phydev, AIR_BPBUS_RD_DATA_LOW); + if (pbus_data_low < 0) +- return ret; ++ return pbus_data_low; + + pbus_data_old = pbus_data_low | (pbus_data_high << 16); + pbus_data_new = (pbus_data_old & ~mask) | set; diff --git a/target/linux/generic/backport-6.1/807-v6.5-01-net-dsa-mv88e6xxx-pass-directly-chip-structure-to-mv.patch b/target/linux/generic/backport-6.1/807-v6.5-01-net-dsa-mv88e6xxx-pass-directly-chip-structure-to-mv.patch index 58777cd280..8c062dc3b4 100644 --- a/target/linux/generic/backport-6.1/807-v6.5-01-net-dsa-mv88e6xxx-pass-directly-chip-structure-to-mv.patch +++ b/target/linux/generic/backport-6.1/807-v6.5-01-net-dsa-mv88e6xxx-pass-directly-chip-structure-to-mv.patch @@ -44,7 +44,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); } else { if (cmode < ARRAY_SIZE(mv88e6185_phy_interface_modes) && -@@ -839,7 +837,7 @@ static void mv88e6xxx_get_caps(struct ds +@@ -851,7 +849,7 @@ static void mv88e6xxx_get_caps(struct ds chip->info->ops->phylink_get_caps(chip, port, config); mv88e6xxx_reg_unlock(chip); @@ -53,7 +53,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); /* Internal ports with no phy-mode need GMII for PHYLIB */ -@@ -860,7 +858,7 @@ static void mv88e6xxx_mac_config(struct +@@ -872,7 +870,7 @@ static void mv88e6xxx_mac_config(struct mv88e6xxx_reg_lock(chip); diff --git a/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch b/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch index 12ea3ebda0..b50cb08454 100644 --- a/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch +++ b/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch @@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -5944,7 +5944,8 @@ static const struct mv88e6xxx_info mv88e +@@ -5956,7 +5956,8 @@ static const struct mv88e6xxx_info mv88e .name = "Marvell 88E6191X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ @@ -30,7 +30,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .max_vid = 8191, .max_sid = 63, .port_base_addr = 0x0, -@@ -5967,7 +5968,8 @@ static const struct mv88e6xxx_info mv88e +@@ -5979,7 +5980,8 @@ static const struct mv88e6xxx_info mv88e .name = "Marvell 88E6193X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ @@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> .max_vid = 8191, .max_sid = 63, .port_base_addr = 0x0, -@@ -6286,7 +6288,8 @@ static const struct mv88e6xxx_info mv88e +@@ -6298,7 +6300,8 @@ static const struct mv88e6xxx_info mv88e .name = "Marvell 88E6393X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ diff --git a/target/linux/generic/backport-6.1/807-v6.5-05-net-dsa-mv88e6xxx-pass-mv88e6xxx_chip-structure-to-p.patch b/target/linux/generic/backport-6.1/807-v6.5-05-net-dsa-mv88e6xxx-pass-mv88e6xxx_chip-structure-to-p.patch index 72dfcee82c..d027bd3a8b 100644 --- a/target/linux/generic/backport-6.1/807-v6.5-05-net-dsa-mv88e6xxx-pass-mv88e6xxx_chip-structure-to-p.patch +++ b/target/linux/generic/backport-6.1/807-v6.5-05-net-dsa-mv88e6xxx-pass-mv88e6xxx_chip-structure-to-p.patch @@ -24,7 +24,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -3328,7 +3328,7 @@ static int mv88e6xxx_setup_port(struct m +@@ -3340,7 +3340,7 @@ static int mv88e6xxx_setup_port(struct m caps = pl_config.mac_capabilities; if (chip->info->ops->port_max_speed_mode) diff --git a/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch b/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch index dc6d5497f2..220fec68c3 100644 --- a/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch +++ b/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch @@ -26,7 +26,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -797,6 +797,8 @@ static void mv88e6393x_phylink_get_caps( +@@ -809,6 +809,8 @@ static void mv88e6393x_phylink_get_caps( unsigned long *supported = config->supported_interfaces; bool is_6191x = chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X; @@ -35,7 +35,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); -@@ -811,13 +813,17 @@ static void mv88e6393x_phylink_get_caps( +@@ -823,13 +825,17 @@ static void mv88e6393x_phylink_get_caps( /* 6191X supports >1G modes only on port 10 */ if (!is_6191x || port == 10) { __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported); @@ -58,7 +58,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org> } } -@@ -6231,6 +6237,32 @@ static const struct mv88e6xxx_info mv88e +@@ -6243,6 +6249,32 @@ static const struct mv88e6xxx_info mv88e .ptp_support = true, .ops = &mv88e6352_ops, }, diff --git a/target/linux/generic/backport-6.1/832-v6.7-net-phy-amd-Support-the-Altima-AMI101L.patch b/target/linux/generic/backport-6.1/832-v6.7-net-phy-amd-Support-the-Altima-AMI101L.patch index 2969462838..e8e73c1e5f 100644 --- a/target/linux/generic/backport-6.1/832-v6.7-net-phy-amd-Support-the-Altima-AMI101L.patch +++ b/target/linux/generic/backport-6.1/832-v6.7-net-phy-amd-Support-the-Altima-AMI101L.patch @@ -16,8 +16,8 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -72,9 +72,9 @@ config SFP - comment "MII PHY device drivers" +@@ -77,9 +77,9 @@ config AIR_EN8811H_PHY + Currently supports the Airoha EN8811H PHY. config AMD_PHY - tristate "AMD PHYs" |