diff options
Diffstat (limited to 'target/linux/qualcommax/files/arch/arm64')
13 files changed, 1099 insertions, 12 deletions
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts index d935e19ad2..5d3123f75e 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts @@ -57,26 +57,26 @@ led_status_amber: status-amber { color = <LED_COLOR_ID_AMBER>; function = LED_FUNCTION_STATUS; - gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; }; led_status_blue: status-blue { color = <LED_COLOR_ID_BLUE>; function = LED_FUNCTION_STATUS; - gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>; }; led_status_red: status-red { color = <LED_COLOR_ID_RED>; function = LED_FUNCTION_STATUS; - gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; }; }; fan: gpio-fan { #cooling-cells = <2>; compatible = "gpio-fan"; - gpio = <&tlmm 29 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; gpio-fan,speed-map = <0 0>, <1 1>; }; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts index d55904a24a..f8fe6b42f8 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts @@ -54,13 +54,13 @@ led_wlan2g { label = "green:wlan2g"; - gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; linux,default-trigger = "phy1radio"; }; led_wlan5g { label = "green:wlan5g"; - gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; linux,default-trigger = "phy0radio"; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts index 3ca92a7a8f..866ed5e9c3 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts @@ -51,7 +51,7 @@ led_power: power { function = LED_FUNCTION_POWER; color = <LED_COLOR_ID_WHITE>; - gpio = <&tlmm 56 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; }; }; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax880.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax880.dts index 5364daad45..23e89a9ae4 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax880.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax880.dts @@ -193,6 +193,7 @@ }; partition@480000 { + compatible = "u-boot,env"; label = "0:appsblenv"; reg = <0x480000 0x10000>; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-mx8500.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-mx8500.dts new file mode 100644 index 0000000000..70f4438ab0 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-mx8500.dts @@ -0,0 +1,523 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "ipq8074.dtsi" +#include "ipq8074-hk-cpu.dtsi" +#include "ipq8074-ess.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Linksys MX8500"; + compatible = "linksys,mx8500", "qcom,ipq8074"; + + aliases { + serial0 = &blsp1_uart5; + serial1 = &blsp1_uart3; + led-boot = &led_system_blue; + led-running = &led_system_blue; + led-failsafe = &led_system_red; + led-upgrade = &led_system_green; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro"; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + bt_pwr { + gpio-export,name = "bt_pwr"; + gpio-export,output = <1>; + gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset-button { + label = "reset"; + gpios = <&tlmm 67 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + + wps-button { + label = "wps"; + gpios = <&tlmm 64 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + }; +}; + +&tlmm { + button_pins: button-state { + pins = "gpio64", "gpio67"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio_pins: mdio-state { + mdc-pins { + pins = "gpio68"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio-pins { + pins = "gpio69"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; +}; + +&blsp1_uart3 { + status = "okay"; +}; + +&blsp1_uart5 { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + status = "okay"; + + /* + * Bootloader will find the NAND DT node by the compatible and + * then "fixup" it by adding the partitions from the SMEM table + * using the legacy bindings thus making it impossible for us + * to change the partition table or utilize NVMEM for calibration. + * So add a dummy partitions node that bootloader will populate + * and set it as disabled so the kernel ignores it instead of + * printing warnings due to the broken way bootloader adds the + * partitions. + */ + partitions { + status = "disabled"; + }; + + nand@0 { + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "0:mibib"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "0:bootconfig"; + reg = <0x200000 0x80000>; + read-only; + }; + + partition@280000 { + label = "0:bootconfig1"; + reg = <0x280000 0x80000>; + read-only; + }; + + partition@300000 { + label = "0:qsee"; + reg = <0x300000 0x300000>; + read-only; + }; + + partition@600000 { + label = "0:qsee_1"; + reg = <0x600000 0x300000>; + read-only; + }; + + partition@900000 { + label = "0:devcfg"; + reg = <0x900000 0x80000>; + read-only; + }; + + partition@980000 { + label = "0:devcfg_1"; + reg = <0x980000 0x80000>; + read-only; + }; + + partition@a00000 { + label = "0:apdp"; + reg = <0xa00000 0x80000>; + read-only; + }; + + partition@a80000 { + label = "0:apdp_1"; + reg = <0xa80000 0x80000>; + read-only; + }; + + partition@b00000 { + label = "0:rpm"; + reg = <0xb00000 0x80000>; + read-only; + }; + + partition@b80000 { + label = "0:rpm_1"; + reg = <0xb80000 0x80000>; + read-only; + }; + + partition@c00000 { + label = "0:cdt"; + reg = <0xc00000 0x80000>; + read-only; + }; + + partition@c80000 { + label = "0:cdt_1"; + reg = <0xc80000 0x80000>; + read-only; + }; + + partition@d00000 { + label = "0:appsblenv"; + reg = <0xd00000 0x80000>; + }; + + partition@d80000 { + label = "0:appsbl"; + reg = <0xd80000 0x100000>; + read-only; + }; + + partition@e80000 { + label = "0:appsbl_1"; + reg = <0xe80000 0x100000>; + read-only; + }; + + partition@f80000 { + label = "0:art"; + reg = <0xf80000 0x80000>; + read-only; + }; + + partition@1000000 { + label = "u_env"; + reg = <0x1000000 0x40000>; + }; + + partition@1040000 { + label = "s_env"; + reg = <0x1040000 0x20000>; + }; + + partition@1060000 { + label = "devinfo"; + reg = <0x1060000 0x20000>; + read-only; + }; + + partition@1080000 { + label = "kernel"; + reg = <0x1080000 0x9600000>; + }; + + partition@1680000 { + label = "rootfs"; + reg = <0x1680000 0x9000000>; + }; + + partition@a680000 { + label = "alt_kernel"; + reg = <0xa680000 0x9600000>; + }; + + partition@ac80000 { + label = "alt_rootfs"; + reg = <0xac80000 0x9000000>; + }; + + partition@13c80000 { + label = "sysdiag"; + reg = <0x13c80000 0x200000>; + read-only; + }; + + partition@13e80000 { + label = "0:ethphyfw"; + reg = <0x13e80000 0x100000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + aqr_fw: firmware@0 { + /* Skip the QCOM MBN Header of 40 bytes */ + reg = <0x28 0x60002>; + }; + }; + }; + + partition@13f80000 { + label = "syscfg"; + reg = <0x13f80000 0xb180000>; + read-only; + }; + + partition@1f100000 { + label = "app_data"; + reg = <0x1f100000 0x500000>; + read-only; + }; + + partition@1f600000 { + label = "0:wififw"; + reg = <0x1f600000 0xa00000>; + read-only; + }; + }; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + led-controller@62 { + compatible = "nxp,pca9633"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x62>; + nxp,hw-blink; + + led_system_red: led@0 { + reg = <0>; + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_STATUS; + }; + + led_system_green: led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + }; + + led_system_blue: led@2 { + reg = <2>; + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_STATUS; + }; + }; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; + + ethernet-phy-package@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,qca8075-package"; + reg = <0>; + + qcom,package-mode = "qsgmii"; + + qca8075_0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + qca8075_1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + + qca8075_2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; + + qca8075_3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + }; + }; + + aqr114c: ethernet-phy@8 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>; + firmware-name = "marvell/AQR-G4_v5.6.5-AQR_WNC_SAQA-L2_GT_ID45287_VER24005.cld"; + nvmem-cells = <&aqr_fw>; + nvmem-cell-names = "firmware"; + }; +}; + +&switch { + status = "okay"; + + switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */ + switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */ + switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/ + switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/ + + qcom,port_phyinfo { + port@1 { + port_id = <1>; + phy_address = <0>; + }; + + port@2 { + port_id = <2>; + phy_address = <1>; + }; + + port@3 { + port_id = <3>; + phy_address = <2>; + }; + + port@4 { + port_id = <4>; + phy_address = <3>; + }; + + port@6 { + port_id = <6>; + phy_address = <8>; + compatible = "ethernet-phy-ieee802.3-c45"; + ethernet-phy-ieee802.3-c45; + }; + }; +}; + +&edma { + status = "okay"; +}; + +&dp1 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&qca8075_0>; + label = "lan1"; +}; + +&dp2 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&qca8075_1>; + label = "lan2"; +}; + +&dp3 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&qca8075_2>; + label = "lan3"; +}; + +&dp4 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&qca8075_3>; + label = "lan4"; +}; + +&dp6_syn { + status = "okay"; + phy-mode = "usxgmii"; + phy-handle = <&aqr114c>; + label = "wan"; +}; + +&ssphy_0 { + status = "okay"; +}; + +&qusb_phy_0 { + status = "okay"; +}; + +&usb_0 { + status = "okay"; +}; + +&pcie_qmp0 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 61 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + status = "okay"; + + /* ath11k has no DT compatible for PCI cards */ + compatible = "pci17cb,1104"; + reg = <0x00010000 0 0 0 0>; + + qcom,ath11k-calibration-variant = "Linksys-MX8500"; + }; + }; +}; + +&wifi { + status = "okay"; + + qcom,ath11k-calibration-variant = "Linksys-MX8500"; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts index 01ac1c5fd6..fbb652a097 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts @@ -136,6 +136,7 @@ compatible = "ethernet-phy-id004d.d101"; reg = <28>; reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>; + reset-deassert-us = <10000>; }; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts index ceb719d813..f410f79495 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts @@ -15,6 +15,8 @@ aliases { serial0 = &blsp1_uart5; ethernet0 = &dp6; + label-mac-device = &dp6; + led-boot = &led_system_blue; led-failsafe = &led_system_red; led-running = &led_system_green; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts index c352b72567..814a7cb2bd 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts @@ -154,13 +154,11 @@ partition@60000 { label = "0:bootconfig"; reg = <0x60000 0x20000>; - read-only; }; partition@80000 { label = "0:bootconfig1"; reg = <0x80000 0x20000>; - read-only; }; partition@a0000 { diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts index ceb47f14fd..36e315cc80 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts @@ -289,9 +289,8 @@ status = "okay"; g761@3e { - compatible = "gmt,g763"; + compatible = "gmt,g761"; reg = <0x3e>; - clocks =<&sleep_clk>; fan_gear_mode = <0>; fan_start = <1>; pwm_polarity = <0>; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxk80.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxk80.dtsi new file mode 100644 index 0000000000..7f8b813749 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxk80.dtsi @@ -0,0 +1,541 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2021, Flole <flole@flole.de> + * Copyright (c) 2023, Andrew Smith <gul.code@outlook.com> + */ + +/dts-v1/; + +#include "ipq8074.dtsi" +#include "ipq8074-ess.dtsi" +#include "ipq8074-hk-cpu.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> + +/ { + aliases { + serial0 = &blsp1_uart5; + led-boot = &led_front_blue; + led-failsafe = &led_front_red; + led-running = &led_front_green; + led-upgrade = &led_front_white; + label-mac-device = &dp2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " ubi.mtd=rootfs root=/dev/ubiblock0_0"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + + wps { + label = "wps"; + gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_front_blue: front-blue { + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_BLUE>; + }; + + led_front_green: front-green { + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 29 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + }; + + led_front_red: front-red { + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + }; + + led_front_white: front-white { + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_WHITE>; + }; + + led_power_green: power-green { + function = LED_FUNCTION_POWER; + gpios = <&tlmm 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + }; + + led_power_red: power-red { + function = LED_FUNCTION_POWER; + gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + panic-indicator; + }; + }; +}; + +&tlmm { + mdio_pins: mdio-pins { + mdc { + pins = "gpio68"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio { + pins = "gpio69"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + leds_pins: leds_pinmux { + led_power_green { + pins = "gpio21"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_power_red { + pins = "gpio22"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_white { + pins = "gpio26"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_green { + pins = "gpio29"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_red { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_blue { + pins = "gpio33"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + }; +}; + +&blsp1_uart5 { + status = "okay"; +}; + +&blsp1_i2c2 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + tlc59208f@27 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,tlc59108"; + reg = <0x27>; + + led@0 { + label = "rgb:led0"; + reg = <0>; + linux,default-trigger = "default-off"; + }; + + led@1 { + label = "rgb:led1"; + reg = <1>; + linux,default-trigger = "default-off"; + }; + + led@2 { + label = "rgb:led2"; + reg = <2>; + linux,default-trigger = "default-off"; + }; + + led@3 { + label = "rgb:led3"; + reg = <3>; + linux,default-trigger = "default-off"; + }; + }; +}; + +&prng { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + status = "okay"; + + /* + * Bootloader will find the NAND DT node by the compatible and + * then "fixup" it by adding the partitions from the SMEM table + * using the legacy bindings thus making it impossible for us + * to change the partition table or utilize NVMEM for calibration. + * So add a dummy partitions node that bootloader will populate + * and set it as disabled so the kernel ignores it instead of + * printing warnings due to the broken way bootloader adds the + * partitions. + */ + partitions { + status = "disabled"; + }; + + nand@0 { + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x00 0x100000>; + read-only; + }; + + partition@100000 { + label = "0:mibib"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "0:bootconfig"; + reg = <0x200000 0x80000>; + read-only; + }; + + partition@280000 { + label = "0:bootconfig_1"; + reg = <0x280000 0x80000>; + read-only; + }; + + partition@300000 { + label = "0:qsee"; + reg = <0x300000 0x300000>; + read-only; + }; + + partition@600000 { + label = "0:qsee_1"; + reg = <0x600000 0x300000>; + read-only; + }; + + partition@900000 { + label = "0:devcfg"; + reg = <0x900000 0x80000>; + read-only; + }; + + partition@980000 { + label = "0:devcfg_1"; + reg = <0x980000 0x80000>; + read-only; + }; + + partition@a00000 { + label = "0:apdp"; + reg = <0xa00000 0x80000>; + read-only; + }; + + partition@a80000 { + label = "0:apdp_1"; + reg = <0xa80000 0x80000>; + read-only; + }; + + partition@b00000 { + label = "0:rpm"; + reg = <0xb00000 0x80000>; + read-only; + }; + + partition@b80000 { + label = "0:rpm_1"; + reg = <0xb80000 0x80000>; + read-only; + }; + + partition@c00000 { + label = "0:cdt"; + reg = <0xc00000 0x80000>; + read-only; + }; + + partition@c80000 { + label = "0:cdt_1"; + reg = <0xc80000 0x80000>; + read-only; + }; + + partition@d00000 { + label = "0:appsblenv"; + reg = <0xd00000 0x80000>; + }; + + partition@d80000 { + label = "0:appsbl"; + reg = <0xd80000 0x100000>; + read-only; + }; + + partition@e80000 { + label = "0:appsbl_1"; + reg = <0xe80000 0x100000>; + read-only; + }; + + partition@f80000 { + label = "0:art"; + reg = <0xf80000 0x80000>; + read-only; + }; + + partition@1000000 { + label = "0:art.bak"; + reg = <0x1000000 0x80000>; + read-only; + }; + + partition@1080000 { + label = "config"; + reg = <0x1080000 0x100000>; + }; + + partition@1180000 { + label = "boarddata1"; + reg = <0x1180000 0x100000>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boarddata1_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_boarddata1_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; + }; + + partition@1280000 { + label = "boarddata2"; + reg = <0x1280000 0x100000>; + }; + + partition@1380000 { + label = "pot"; + reg = <0x1380000 0x100000>; + read-only; + }; + + partition@1480000 { + label = "dnidata"; + reg = <0x1480000 0x500000>; + read-only; + }; + + partition@1980000 { + label = "kernel"; + reg = <0x1980000 0x620000>; + }; + + partition@1fa0000 { + label = "rootfs"; + reg = <0x1fa0000 0x66e0000>; + }; + + partition@8680000 { + label = "kernel2"; + reg = <0x8680000 0x620000>; + read-only; + }; + + partition@8ca0000 { + label = "rootfs2"; + reg = <0x8ca0000 0x66e0000>; + read-only; + }; + }; + }; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; + + ethernet-phy-package@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + compatible = "qcom,qca8075-package"; + + qca8075_1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + + qca8075_2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; + + qca8075_3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + }; + + qca8075_4: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <4>; + }; + }; + + qca8081_28: ethernet-phy@28 { + compatible = "ethernet-phy-id004d.d101"; + reg = <28>; + reset-deassert-us = <10000>; + reset-gpios = <&tlmm 25 GPIO_ACTIVE_LOW>; + }; +}; + +&switch { + status = "okay"; + + switch_lan_bmp = <(ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */ + switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */ + switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/ + switch_mac_mode2 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance2*/ + + qcom,port_phyinfo { + port@2 { + port_id = <2>; + phy_address = <1>; + }; + port@3 { + port_id = <3>; + phy_address = <2>; + }; + port@4 { + port_id = <4>; + phy_address = <3>; + }; + port@5 { + port_id = <5>; + phy_address = <4>; + }; + port@6 { + port_id = <6>; + phy_address = <28>; + port_mac_sel = "QGMAC_PORT"; + }; + }; +}; + +&edma { + status = "okay"; +}; + +&dp2 { + status = "okay"; + phy-handle = <&qca8075_1>; + label = "lan2"; + nvmem-cells = <&macaddr_boarddata1_0>; + nvmem-cell-names = "mac-address"; +}; + +&dp3 { + status = "okay"; + phy-handle = <&qca8075_2>; + label = "lan3"; + nvmem-cells = <&macaddr_boarddata1_0>; + nvmem-cell-names = "mac-address"; +}; + +&dp4 { + status = "okay"; + phy-handle = <&qca8075_3>; + label = "lan4"; + nvmem-cells = <&macaddr_boarddata1_0>; + nvmem-cell-names = "mac-address"; +}; + +&dp5 { + status = "okay"; + phy-handle = <&qca8075_4>; + label = "lan5"; + nvmem-cells = <&macaddr_boarddata1_0>; + nvmem-cell-names = "mac-address"; +}; + +&dp6 { + status = "okay"; + phy-handle = <&qca8081_28>; + label = "wan"; + nvmem-cells = <&macaddr_boarddata1_6>; + nvmem-cell-names = "mac-address"; +}; + +&wifi { + status = "okay"; + + qcom,ath11k-calibration-variant = "Netgear-SXK80"; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxr80.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxr80.dts new file mode 100644 index 0000000000..d90e75da30 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxr80.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2021, Flole <flole@flole.de> */ + +/dts-v1/; + +#include "ipq8074-sxk80.dtsi" + +/ { + model = "Netgear SXR80"; + compatible = "netgear,sxr80", "qcom,ipq8074"; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxs80.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxs80.dts new file mode 100644 index 0000000000..0d7240cf07 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-sxs80.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2021, Flole <flole@flole.de> */ + +/dts-v1/; + +#include "ipq8074-sxk80.dtsi" + +/ { + model = "Netgear SXS80"; + compatible = "netgear,sxs80", "qcom,ipq8074"; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts index d8237e81dd..347bb6e8ab 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts @@ -131,7 +131,7 @@ regulator-name = "vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&tlmm 64 GPIO_ACTIVE_HIGH>; + gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; }; |