diff options
Diffstat (limited to 'target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts')
| -rw-r--r-- | target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts | 201 |
1 files changed, 201 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts b/target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts new file mode 100644 index 0000000000..1a12005c92 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "mt7620a.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + compatible = "wavlink,wl-wn531g3", "ralink,mt7620a-soc"; + model = "Wavlink WL-WN531G3"; + + aliases { + led-boot = &led_status_blue; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_red; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + + turbo { + label = "turbo"; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + linux,code = <BTN_1>; + }; + + wps { + label = "wps"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + + touchlink { + label = "touchlink"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + linux,code = <BTN_0>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_blue: led_status_blue { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_BLUE>; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + }; + + led_status_red: led_status_red { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_28: macaddr@28 { + reg = <0x28 0x6>; + }; + + macaddr_factory_2e: macaddr@2e { + reg = <0x2e 0x6>; + }; + + eeprom_radio_0: eeprom@0 { + reg = <0x0 0x200>; + }; + + eeprom_radio_8000: eeprom@8000 { + reg = <0x8000 0x200>; + }; + }; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0x7b0000>; + }; + }; + }; +}; + +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins>, <&rgmii2_pins>, <&mdio_pins>; + + nvmem-cells = <&macaddr_factory_28>; + nvmem-cell-names = "mac-address"; + + mediatek,portmap = "llllw"; + + port@4 { + status = "okay"; + phy-handle = <&phy4>; + phy-mode = "rgmii"; + + nvmem-cells = <&macaddr_factory_2e>; + nvmem-cell-names = "mac-address"; + }; + + port@5 { + status = "okay"; + phy-handle = <&phy5>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + phy5: ethernet-phy@5 { + reg = <5>; + phy-mode = "rgmii"; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + mt76@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_radio_8000>; + nvmem-cell-names = "eeprom"; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&gsw { + mediatek,port4-gmac; +}; + +&wmac { + nvmem-cells = <&eeprom_radio_0>; + nvmem-cell-names = "eeprom"; +}; + +&state_default { + gpio { + groups = "i2c", "uartf"; + function = "gpio"; + }; +}; |