974 files changed, 46968 insertions, 36110 deletions

diff --git a/config/Config-kernel.in b/config/Config-kernel.in
index ddf81d67da..73b26b631a 100644
--- a/config/Config-kernel.in
+++ b/config/Config-kernel.in
@@ -546,6 +546,10 @@ config KERNEL_BPF_EVENTS
 	  for sending data from BPF programs to user-space for post-processing
 	  or logging.
 
+config KERNEL_PROBE_EVENTS_BTF_ARGS
+	bool "Support BTF function arguments for probe events"
+	depends on KERNEL_DEBUG_INFO_BTF && KERNEL_KPROBE_EVENTS && LINUX_6_6
+
 config KERNEL_BPF_KPROBE_OVERRIDE
 	bool
 	depends on KERNEL_KPROBES
@@ -1234,6 +1238,12 @@ if KERNEL_IP_PNP
 
 endif
 
+config KERNEL_BTRFS_FS
+	bool "Compile the kernel with built-in BTRFS support"
+	help
+	  Say Y here if you want to make the kernel to be able to boot off a
+	  BTRFS partition.
+
 menu "Filesystem ACL and attr support options"
 	config USE_FS_ACL_ATTR
 		bool "Use filesystem ACL and attr support by default"
diff --git a/include/host-build.mk b/include/host-build.mk
index 246f248e26..4dfa055db9 100644
--- a/include/host-build.mk
+++ b/include/host-build.mk
@@ -45,6 +45,15 @@ define Host/Prepare
   $(call Host/Prepare/Default)
 endef
 
+define Host/Gnulib/Prepare
+  $(STAGING_DIR_HOST)/bin/gnulib-tool \
+	--local-dir=$(STAGING_DIR_HOST)/share/gnulib \
+	--source-base=$(PKG_GNULIB_BASE) \
+	$(PKG_GNULIB_ARGS) \
+	$(PKG_GNULIB_MODS) \
+  ;
+endef
+
 HOST_CONFIGURE_VARS = \
 	CC="$(HOSTCC)" \
 	CFLAGS="$(HOST_CFLAGS)" \
@@ -102,19 +111,25 @@ define Host/Configure
   $(call Host/Configure/Default)
 endef
 
+HOST_MAKE_PATH ?= .
+
 define Host/Compile/Default
 	+$(HOST_MAKE_VARS) \
-	$(MAKE) $(HOST_JOBS) -C $(HOST_BUILD_DIR) \
+	$(MAKE) $(HOST_JOBS) -C $(HOST_BUILD_DIR)/$(HOST_MAKE_PATH) \
 		$(HOST_MAKE_FLAGS) \
 		$(1)
 endef
 
 define Host/Compile
-  $(call Host/Compile/Default)
+  $(call Host/Compile/Default,$(if $(PKG_SUBDIRS),SUBDIRS='$$$$(wildcard $(PKG_SUBDIRS))'))
+endef
+
+define Host/Gnulib/Compile
+  $(call Host/Compile/Default,SUBDIRS='$$$$(wildcard $(PKG_GNULIB_BASE))')
 endef
 
 define Host/Install/Default
-	$(call Host/Compile/Default,install)
+  $(call Host/Compile/Default,$(if $(PKG_SUBDIRS),SUBDIRS='$$$$(wildcard $(PKG_SUBDIRS))') install)
 endef
 
 define Host/Install
diff --git a/include/image-commands.mk b/include/image-commands.mk
index 04213a3be8..cb899a2f30 100644
--- a/include/image-commands.mk
+++ b/include/image-commands.mk
@@ -701,6 +701,23 @@ define Build/uImage
 	mv $@.new $@
 endef
 
+define Build/multiImage
+	$(if $(UIMAGE_TIME),SOURCE_DATE_EPOCH="$(UIMAGE_TIME)") \
+	mkimage \
+		-A $(LINUX_KARCH) \
+		-O linux \
+		-T multi \
+		-C $(word 1,$(1)) \
+		-a $(KERNEL_LOADADDR) \
+		-e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
+		-n '$(if $(UIMAGE_NAME),$(UIMAGE_NAME),$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION))' \
+		$(if $(UIMAGE_MAGIC),-M $(UIMAGE_MAGIC)) \
+		-d $@:$(word 2,$(1)):$(word 3,$(1)) \
+		$(wordlist 4,$(words $(1)),$(1)) \
+		$@.new
+	mv $@.new $@
+endef
+
 define Build/xor-image
 	$(STAGING_DIR_HOST)/bin/xorimage -i $@ -o $@.xor $(1)
 	mv $@.xor $@
diff --git a/include/image.mk b/include/image.mk
index be0682c44e..fdd2ee9ef2 100644
--- a/include/image.mk
+++ b/include/image.mk
@@ -538,7 +538,7 @@ define Device/Build/initramfs
     $(KDIR)/$$(KERNEL_INITRAMFS_NAME).$$(ROOTFS_ID/$(1)):: image_prepare target-dir-$$(ROOTFS_ID/$(1))
 	$(call Kernel/CompileImage/Initramfs,$(KDIR)/target-dir-$$(ROOTFS_ID/$(1)),.$$(ROOTFS_ID/$(1)))
   endif
-  $(1)-images: $$(if $$(KERNEL_INITRAMFS),$(BIN_DIR)/$$(KERNEL_INITRAMFS_IMAGE))
+  $(1)-initramfs-images: $$(if $$(KERNEL_INITRAMFS),$(BIN_DIR)/$$(KERNEL_INITRAMFS_IMAGE))
   $(BIN_DIR)/$$(KERNEL_INITRAMFS_IMAGE): $(KDIR)/tmp/$$(KERNEL_INITRAMFS_IMAGE)
 	cp $$^ $$@
 
@@ -671,7 +671,7 @@ define Device/Build/image
   ifndef IB
     $$(ROOTFS/$(1)/$(3)): $(if $(TARGET_PER_DEVICE_ROOTFS),target-dir-$$(ROOTFS_ID/$(3)))
   endif
-  $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2)): $$(KDIR_KERNEL_IMAGE) $$(ROOTFS/$(1)/$(3))
+  $(KDIR)/tmp/$(call DEVICE_IMG_NAME,$(1),$(2)): $$(KDIR_KERNEL_IMAGE) $$(ROOTFS/$(1)/$(3)) $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),$(if $(IB),,$(3)-initramfs-images))
 	@rm -f $$@
 	[ -f $$(word 1,$$^) -a -f $$(word 2,$$^) ]
 	$$(call concat_cmd,$(if $(IMAGE/$(2)/$(1)),$(IMAGE/$(2)/$(1)),$(IMAGE/$(2))))
@@ -730,7 +730,7 @@ define Device/Build/artifact
 	  $(BUILD_DIR)/json_info_files/$(DEVICE_IMG_PREFIX)-$(1).json, \
 	  $(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1))
   $(eval $(call Device/Export,$(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1)))
-  $(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1): $$(KDIR_KERNEL_IMAGE) $(2)-images
+  $(KDIR)/tmp/$(DEVICE_IMG_PREFIX)-$(1): $$(KDIR_KERNEL_IMAGE) $(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),$(if $(IB),,$(2)-initramfs-images)) $(2)-images
 	@rm -f $$@
 	$$(call concat_cmd,$(ARTIFACT/$(1)))
 
diff --git a/include/kernel-6.1 b/include/kernel-6.1
index e8acd5ca1f..d2746a37e3 100644
--- a/include/kernel-6.1
+++ b/include/kernel-6.1
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.1 = .96
-LINUX_KERNEL_HASH-6.1.96 = 3e77c9069de5e7ab02ff9c2dcfe77dab193613fc1de21071901b4153374862a9
+LINUX_VERSION-6.1 = .104
+LINUX_KERNEL_HASH-6.1.104 = 5cfa326492241397e15c3601ccd3c9dfb72436674f364b470e9d1d5642759976
diff --git a/include/kernel-6.6 b/include/kernel-6.6
index bb8c01bfbf..3b0f9cbf1c 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .36
-LINUX_KERNEL_HASH-6.6.36 = b9676828b737e8fb8eaa5198303d35d35e8df019550be153c8a42c99afe0cdd5
+LINUX_VERSION-6.6 = .45
+LINUX_KERNEL_HASH-6.6.45 = 121bed240767e4a0959c1609e78eeaaf3e0620d9d1a5ed1f6e36bdf609c4f179
diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
index 84d686cafc..f6997ecf9e 100644
--- a/include/kernel-defaults.mk
+++ b/include/kernel-defaults.mk
@@ -136,14 +136,16 @@ ifeq ($(LINUX_KARCH),x86_64)
 IMAGES_DIR:=../../x86/boot
 endif
 
+# $1: image suffix
+# $2: Per Device Rootfs ID
 define Kernel/CopyImage
-	cmp -s $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug || { \
-		$(KERNEL_CROSS)objcopy -O binary $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(LINUX_KERNEL)$(1); \
-		$(KERNEL_CROSS)objcopy $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).elf; \
-		$(CP) $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug; \
+	cmp -s $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug$(2) || { \
+		$(KERNEL_CROSS)objcopy -O binary $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(LINUX_KERNEL)$(1)$(2); \
+		$(KERNEL_CROSS)objcopy $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).elf$(2); \
+		$(CP) $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug$(2); \
 		$(foreach k, \
 			$(if $(KERNEL_IMAGES),$(KERNEL_IMAGES),$(filter-out vmlinux dtbs,$(KERNELNAME))), \
-			$(CP) $(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/$(IMAGES_DIR)/$(k) $(KERNEL_BUILD_DIR)/$(k)$(1); \
+			$(CP) $(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/$(IMAGES_DIR)/$(k) $(KERNEL_BUILD_DIR)/$(k)$(1)$(2); \
 		) \
 	}
 endef
@@ -164,6 +166,8 @@ endef
 ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
 # $1: Custom TARGET_DIR. If omitted TARGET_DIR is used.
 # $2: If defined Generate Per Rootfs Kernel Directory and use it
+# For Separate Initramf with $2 declared, skip kernel compile, it has
+# already been done previously on generic image build
 define Kernel/CompileImage/Initramfs
 	$(if $(2),$(call Kernel/PrepareConfigPerRootfs,$(LINUX_DIR)$(2)))
 	$(call Kernel/Configure/Initramfs,$(if $(1),$(1),$(TARGET_DIR)),$(LINUX_DIR)$(2))
@@ -183,12 +187,13 @@ endif
 	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),$(STAGING_DIR_HOST)/bin/lzop -9 -f $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio)
 	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_XZ),$(STAGING_DIR_HOST)/bin/xz -T$(if $(filter 1,$(NPROC)),2,0) -9 -fz --check=crc32 $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio)
 	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_ZSTD),$(STAGING_DIR_HOST)/bin/zstd -T0 -f -o $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio.zstd $(if $(2),$(LINUX_DIR)$(2),$(KERNEL_BUILD_DIR))/initrd.cpio)
-	$(call Kernel/CopyImage,-initramfs$(2))
+	$(if $(2),,$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all))
+	$(call Kernel/CopyImage,-initramfs,$(2))
 else
 	+$(call locked,$(if $(2),$(CP) $(LINUX_DIR)$(2)/.config* $(LINUX_DIR) && touch $(LINUX_DIR)/.config && )\
 		rm -rf $(LINUX_DIR)/usr/initramfs_data.cpio* $(LINUX_DIR)/.config.prev && \
 		$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all) && \
-		{ $(call Kernel/CopyImage,-initramfs$(2)) },gen-initramfs)
+		{ $(call Kernel/CopyImage,-initramfs,$(2)) },gen-initramfs)
 endif
 endef
 else
diff --git a/include/package-defaults.mk b/include/package-defaults.mk
index 37de9f0ccb..6a401dde2c 100644
--- a/include/package-defaults.mk
+++ b/include/package-defaults.mk
@@ -151,6 +151,7 @@ define Build/Install/Default
 	$(MAKE_VARS) \
 	$(MAKE) -C $(PKG_BUILD_DIR)/$(MAKE_PATH) \
 		$(MAKE_INSTALL_FLAGS) \
+		$(if $(PKG_SUBDIRS),SUBDIRS='$$$$(wildcard $(PKG_SUBDIRS))') \
 		$(if $(1), $(1), install);
 endef
 
diff --git a/include/package.mk b/include/package.mk
index 8ee78415df..7fbecf98dc 100644
--- a/include/package.mk
+++ b/include/package.mk
@@ -343,7 +343,7 @@ endef
 
 Build/Prepare=$(call Build/Prepare/Default,)
 Build/Configure=$(call Build/Configure/Default,)
-Build/Compile=$(call Build/Compile/Default,)
+Build/Compile=$(call Build/Compile/Default,$(if $(PKG_SUBDIRS),SUBDIRS='$$$$(wildcard $(PKG_SUBDIRS))'))
 Build/Install=$(if $(PKG_INSTALL),$(call Build/Install/Default,))
 Build/Dist=$(call Build/Dist/Default,)
 Build/DistCheck=$(call Build/DistCheck/Default,)
diff --git a/include/site/linux b/include/site/linux
index b193d25c45..1dadd60bf3 100644
--- a/include/site/linux
+++ b/include/site/linux
@@ -37,7 +37,7 @@ ac_cv_func_rindex=yes
 ac_cv_func_setlocale=yes
 ac_cv_func_setgrent_void=yes
 ac_cv_func_setpgrp_void=yes
-ac_cv_func_setresuid=no
+ac_cv_func_setresuid=yes
 ac_cv_func_setvbuf_reversed=no
 ac_cv_func_stat_empty_string_bug=no
 ac_cv_func_stat_ignores_trailing_slash=no
@@ -66,9 +66,12 @@ ac_cv_sctp=no
 ac_cv_sys_restartable_syscalls=yes
 ac_cv_time_r_type=POSIX
 ac_cv_type_suseconds_t=yes
+ac_cv_size_t=yes
+ac_cv_ssize_t=yes
 ac_cv_uchar=no
 ac_cv_uint=yes
 ac_cv_uint64_t=yes
+ac_cv_uintptr_t=yes
 ac_cv_ulong=yes
 ac_cv_ushort=yes
 ac_cv_va_copy=C99
diff --git a/include/target.mk b/include/target.mk
index c9ff3cbb7c..d13902ad6e 100644
--- a/include/target.mk
+++ b/include/target.mk
@@ -6,25 +6,6 @@
 ifneq ($(__target_inc),1)
 __target_inc=1
 
-ifneq ($(DUMP),)
-  # Parse generic config that might be set before a .config is generated to modify the
-  # default package configuration
-  # Keep DYNAMIC_DEF_PKG_CONF in sync with toplevel.mk to reflect the same configs
-  DYNAMIC_DEF_PKG_CONF := CONFIG_USE_APK CONFIG_SELINUX CONFIG_SMALL_FLASH CONFIG_SECCOMP
-  ifneq ($(wildcard $(TOPDIR)/.config),)
-    $(foreach config, $(DYNAMIC_DEF_PKG_CONF), \
-      $(eval $(config) := $(shell grep "$(config)=y" $(TOPDIR)/.config 2>/dev/null)) \
-    )
-  # Init config that are enabled by default. Dependency are checked matching the one in
-  # the config.
-  else
-    ifeq ($(filter $(BOARD), uml),)
-    ifneq ($(filter $(ARCH), aarch64 arm armeb mips mipsel mips64 mips64el i386 powerpc x86_64),)
-      CONFIG_SECCOMP := y
-    endif
-    endif
-  endif
-endif
 
 # default device type
 DEVICE_TYPE?=router
@@ -46,28 +27,6 @@ DEFAULT_PACKAGES:=\
 	urandom-seed \
 	urngd
 
-ifneq ($(CONFIG_USE_APK),)
-DEFAULT_PACKAGES+=apk-mbedtls
-else
-DEFAULT_PACKAGES+=opkg
-endif
-
-ifneq ($(CONFIG_SELINUX),)
-DEFAULT_PACKAGES+=busybox-selinux procd-selinux
-else
-DEFAULT_PACKAGES+=busybox procd
-endif
-
-# include ujail on systems with enough storage
-ifeq ($(CONFIG_SMALL_FLASH),)
-DEFAULT_PACKAGES+=procd-ujail
-endif
-
-# include seccomp ld-preload hooks if kernel supports it
-ifneq ($(CONFIG_SECCOMP),)
-DEFAULT_PACKAGES+=procd-seccomp
-endif
-
 # For the basic set
 DEFAULT_PACKAGES.basic:=
 # For nas targets
@@ -118,6 +77,47 @@ else
   endif
 endif
 
+ifneq ($(DUMP),)
+  # Parse generic config that might be set before a .config is generated to modify the
+  # default package configuration
+  # Keep DYNAMIC_DEF_PKG_CONF in sync with toplevel.mk to reflect the same configs
+  DYNAMIC_DEF_PKG_CONF := CONFIG_USE_APK CONFIG_SELINUX CONFIG_SMALL_FLASH CONFIG_SECCOMP
+  $(foreach config, $(DYNAMIC_DEF_PKG_CONF), \
+    $(eval $(config) := $(shell grep "$(config)=y" $(TOPDIR)/.config 2>/dev/null)) \
+  )
+  # The config options that are enabled by default and where other default
+  # packages depends on needs to be set if they are missing in the .config.
+  ifeq ($(shell grep "CONFIG_SECCOMP" $(TOPDIR)/.config 2>/dev/null),)
+    ifeq ($(filter $(BOARD), uml),)
+    ifneq ($(filter $(ARCH), aarch64 arm armeb mips mipsel mips64 mips64el i386 powerpc x86_64),)
+      CONFIG_SECCOMP := y
+    endif
+    endif
+  endif
+endif
+
+ifneq ($(CONFIG_USE_APK),)
+DEFAULT_PACKAGES+=apk-mbedtls
+else
+DEFAULT_PACKAGES+=opkg
+endif
+
+ifneq ($(CONFIG_SELINUX),)
+DEFAULT_PACKAGES+=busybox-selinux procd-selinux
+else
+DEFAULT_PACKAGES+=busybox procd
+endif
+
+# include ujail on systems with enough storage
+ifeq ($(CONFIG_SMALL_FLASH),)
+DEFAULT_PACKAGES+=procd-ujail
+endif
+
+# include seccomp ld-preload hooks if kernel supports it
+ifneq ($(CONFIG_SECCOMP),)
+DEFAULT_PACKAGES+=procd-seccomp
+endif
+
 # Add device specific packages (here below to allow device type set from subtarget)
 DEFAULT_PACKAGES += $(DEFAULT_PACKAGES.$(DEVICE_TYPE))
 
diff --git a/package/Makefile b/package/Makefile
index 9e3bb52b65..9de36b13c9 100644
--- a/package/Makefile
+++ b/package/Makefile
@@ -85,6 +85,10 @@ ifneq ($(CONFIG_USE_APK),)
 else
   $(curdir)/compile: $(curdir)/system/opkg/host/compile
 endif
+else
+ifneq ($(CONFIG_USE_APK),)
+  $(curdir)/compile: $(BUILD_KEY_APK_SEC) $(BUILD_KEY_APK_PUB)
+endif
 endif
 
 $(curdir)/install: $(TMP_DIR)/.build $(curdir)/merge $(curdir)/merge-index
diff --git a/package/base-files/files/bin/ipcalc.sh b/package/base-files/files/bin/ipcalc.sh
index ae7a5c9598..871a49ed6e 100755
--- a/package/base-files/files/bin/ipcalc.sh
+++ b/package/base-files/files/bin/ipcalc.sh
@@ -96,6 +96,7 @@ echo "COUNT=$count"
 
 # if there's no range, we're done
 [ $# -eq 0 ] && exit 0
+[ -z "$1$2" ] && exit 0
 
 if [ "$prefix" -le 30 ]; then
     lower=$((network + 1))
diff --git a/package/base-files/files/lib/preinit/10_indicate_failsafe b/package/base-files/files/lib/preinit/10_indicate_failsafe
index 7bf5e029e4..8c950bff74 100644
--- a/package/base-files/files/lib/preinit/10_indicate_failsafe
+++ b/package/base-files/files/lib/preinit/10_indicate_failsafe
@@ -9,9 +9,14 @@ indicate_failsafe_led () {
 
 indicate_failsafe() {
 	[ "$pi_preinit_no_failsafe" = "y" ] && return
-	echo "- failsafe -"
+	local consoles="$(cat /sys/class/tty/console/active)"
+	[ -n "$consoles" ] || consoles=console
+	for console in $consoles; do
+		[ -c "/dev/$console" ] && echo "- failsafe -" >"/dev/$console"
+	done
 	preinit_net_echo "Entering Failsafe!\n"
 	indicate_failsafe_led
+	echo OpenWrt-failsafe > /proc/sys/kernel/hostname
 }
 
 boot_hook_add failsafe indicate_failsafe
diff --git a/package/base-files/files/lib/preinit/30_failsafe_wait b/package/base-files/files/lib/preinit/30_failsafe_wait
index 9ab2e8bd4d..c792089ece 100644
--- a/package/base-files/files/lib/preinit/30_failsafe_wait
+++ b/package/base-files/files/lib/preinit/30_failsafe_wait
@@ -40,7 +40,7 @@ fs_wait_for_key () {
 		rm -f $keypress_wait
 	} &
 
-	local consoles="$(sed -e 's/ /\n/g' /proc/cmdline | grep '^console=' | sed -e 's/^console=//' -e 's/,.*//')"
+	local consoles="$(cat /sys/class/tty/console/active)"
 	[ -n "$consoles" ] || consoles=console
 	for console in $consoles; do
 		[ -c "/dev/$console" ] || continue
@@ -78,6 +78,9 @@ fs_wait_for_key () {
 	keypressed=1
 	[ "$(cat $keypress_true)" = "true" ] && keypressed=0
 
+	trap - INT
+	trap - USR1
+
 	rm -f $keypress_true
 	rm -f $keypress_wait
 	rm -f $keypress_sec
diff --git a/package/base-files/files/lib/preinit/99_10_failsafe_login b/package/base-files/files/lib/preinit/99_10_failsafe_login
index 6f4af3f28b..f72a35ed53 100644
--- a/package/base-files/files/lib/preinit/99_10_failsafe_login
+++ b/package/base-files/files/lib/preinit/99_10_failsafe_login
@@ -2,14 +2,22 @@
 # Copyright (C) 2010 Vertical Communications
 
 failsafe_shell() {
-	local consoles="$(sed -e 's/ /\n/g' /proc/cmdline | grep '^console=' | sed -e 's/^console=//' -e 's/,.*//')"
+	local consoles="$(cat /sys/class/tty/console/active)"
 	[ -n "$consoles" ] || consoles=console
 	for console in $consoles; do
-		[ -c "/dev/$console" ] && while true; do
-			ash --login <"/dev/$console" >"/dev/$console" 2>"/dev/$console"
-			sleep 1
-		done &
+		case "$console" in
+			console|tty[0-9]*)
+				term=${TERM:-linux}
+				;;
+			*)
+				term=vt102
+				;;
+		esac
+		# Running asynchronously via the shell's & would ignore SIGINT,
+		# breaking ^C. Use start-stop-daemon instead.
+		[ -c "/dev/$console" ] && start-stop-daemon -Sb -p /dev/null -- env -i ash -c "while true; do setsid -c env -i USER=root LOGNAME=root SHELL=/bin/ash TERM="$term" ash --login <\"/dev/$console\" >\"/dev/$console\" 2>\"/dev/$console\"; sleep 1; done"
 	done
+
 }
 
 boot_hook_add failsafe failsafe_shell
diff --git a/package/base-files/files/lib/upgrade/common.sh b/package/base-files/files/lib/upgrade/common.sh
index ef8d01e168..af1182cb16 100644
--- a/package/base-files/files/lib/upgrade/common.sh
+++ b/package/base-files/files/lib/upgrade/common.sh
@@ -165,23 +165,6 @@ part_magic_fat() {
 	[ "$magic" = "FAT" ] || [ "$magic_fat32" = "FAT32" ]
 }
 
-fitblk_get_bootdev() {
-	[ -e /sys/firmware/devicetree/base/chosen/rootdisk ] || return
-
-	local rootdisk="$(cat /sys/firmware/devicetree/base/chosen/rootdisk)"
-	local handle bootdev
-	for handle in /sys/class/block/*/of_node/phandle /sys/class/block/*/device/of_node/phandle; do
-		[ ! -e "$handle" ] && continue
-		if [ "$rootdisk" = "$(cat $handle)" ]; then
-			bootdev="${handle%/of_node/phandle}"
-			bootdev="${bootdev%/device}"
-			bootdev="${bootdev#/sys/class/block/}"
-			echo "$bootdev"
-			break
-		fi
-	done
-}
-
 export_bootdevice() {
 	local cmdline uuid blockdev uevent line class
 	local MAJOR MINOR DEVNAME DEVTYPE
@@ -213,7 +196,6 @@ export_bootdevice() {
 			done
 		;;
 		/dev/*)
-			[ "$rootpart" = "/dev/fit0" ] && rootpart="$(fitblk_get_bootdev)"
 			uevent="/sys/class/block/${rootpart##*/}/../uevent"
 		;;
 		0x[a-f0-9][a-f0-9][a-f0-9] | 0x[a-f0-9][a-f0-9][a-f0-9][a-f0-9] | \
diff --git a/package/base-files/files/lib/upgrade/nand.sh b/package/base-files/files/lib/upgrade/nand.sh
index 0a6fd8432d..9fa3cd2ddd 100644
--- a/package/base-files/files/lib/upgrade/nand.sh
+++ b/package/base-files/files/lib/upgrade/nand.sh
@@ -57,11 +57,11 @@ nand_find_ubi() {
 }
 
 nand_get_magic_long() {
-	(${3}cat "$1" | dd bs=4 "skip=${2:-0}" count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
+	($2 < "$1" | dd bs=4 "skip=${3:-0}" count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
 }
 
 get_magic_long_tar() {
-	(tar xO${3}f "$1" "$2" | dd bs=4 count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
+	($2 < "$1" | tar xOf - "$3" | dd bs=4 count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null
 }
 
 identify() {
@@ -73,7 +73,7 @@ identify_tar() {
 }
 
 identify_if_gzip() {
-	if [ "$(identify "$1")" = gzip ]; then echo -n z; fi
+	if [ "$(identify "$1" "cat")" = gzip ]; then echo -n z; fi
 }
 
 nand_restore_config() {
@@ -259,64 +259,64 @@ nand_upgrade_prepare_ubi() {
 # Write the UBI image to MTD ubi partition
 nand_upgrade_ubinized() {
 	local ubi_file="$1"
-	local gz="$2"
+	local cmd="$2"
 
-	local ubi_length=$( (${gz}cat "$ubi_file" | wc -c) 2> /dev/null)
+	local ubi_length=$( ($cmd < "$ubi_file" | wc -c) 2> /dev/null)
 
 	nand_detach_ubi "$CI_UBIPART" || return 1
 
 	local mtdnum="$( find_mtd_index "$CI_UBIPART" )"
-	${gz}cat "$ubi_file" | ubiformat "/dev/mtd$mtdnum" -S "$ubi_length" -y -f - && ubiattach -m "$mtdnum"
+	$cmd < "$ubi_file" | ubiformat "/dev/mtd$mtdnum" -S "$ubi_length" -y -f - && ubiattach -m "$mtdnum"
 }
 
 # Write the UBIFS image to UBI rootfs volume
 nand_upgrade_ubifs() {
 	local ubifs_file="$1"
-	local gz="$2"
+	local cmd="$2"
 
-	local ubifs_length=$( (${gz}cat "$ubifs_file" | wc -c) 2> /dev/null)
+	local ubifs_length=$( ($cmd < "$ubifs_file" | wc -c) 2> /dev/null)
 
 	nand_upgrade_prepare_ubi "$ubifs_length" "ubifs" "" "" || return 1
 
 	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
 	local root_ubivol="$(nand_find_volume $ubidev "$CI_ROOTPART")"
-	${gz}cat "$ubifs_file" | ubiupdatevol /dev/$root_ubivol -s "$ubifs_length" -
+	$cmd < "$ubifs_file" | ubiupdatevol /dev/$root_ubivol -s "$ubifs_length" -
 }
 
 # Write the FIT image to UBI kernel volume
 nand_upgrade_fit() {
 	local fit_file="$1"
-	local gz="$2"
+	local cmd="$2"
 
-	local fit_length=$( (${gz}cat "$fit_file" | wc -c) 2> /dev/null)
+	local fit_length=$( ($cmd < "$fit_file" | wc -c) 2> /dev/null)
 
 	nand_upgrade_prepare_ubi "" "" "$fit_length" "1" || return 1
 
 	local fit_ubidev="$(nand_find_ubi "$CI_UBIPART")"
 	local fit_ubivol="$(nand_find_volume $fit_ubidev "$CI_KERNPART")"
-	${gz}cat "$fit_file" | ubiupdatevol /dev/$fit_ubivol -s "$fit_length" -
+	$cmd < "$fit_file" | ubiupdatevol /dev/$fit_ubivol -s "$fit_length" -
 }
 
 # Write images in the TAR file to MTD partitions and/or UBI volumes as required
 nand_upgrade_tar() {
 	local tar_file="$1"
-	local gz="$2"
+	local cmd="$2"
 	local jffs2_markers="${CI_JFFS2_CLEAN_MARKERS:-0}"
 
 	# WARNING: This fails if tar contains more than one 'sysupgrade-*' directory.
-	local board_dir="$(tar t${gz}f "$tar_file" | grep -m 1 '^sysupgrade-.*/$')"
+	local board_dir="$($cmd < "$tar_file" | tar tf - | grep -m 1 '^sysupgrade-.*/$')"
 	board_dir="${board_dir%/}"
 
 	local kernel_mtd kernel_length
 	if [ "$CI_KERNPART" != "none" ]; then
 		kernel_mtd="$(find_mtd_index "$CI_KERNPART")"
-		kernel_length=$( (tar xO${gz}f "$tar_file" "$board_dir/kernel" | wc -c) 2> /dev/null)
+		kernel_length=$( ($cmd < "$tar_file" | tar xOf - "$board_dir/kernel" | wc -c) 2> /dev/null)
 		[ "$kernel_length" = 0 ] && kernel_length=
 	fi
-	local rootfs_length=$( (tar xO${gz}f "$tar_file" "$board_dir/root" | wc -c) 2> /dev/null)
+	local rootfs_length=$( ($cmd < "$tar_file" | tar xOf - "$board_dir/root" | wc -c) 2> /dev/null)
 	[ "$rootfs_length" = 0 ] && rootfs_length=
 	local rootfs_type
-	[ "$rootfs_length" ] && rootfs_type="$(identify_tar "$tar_file" "$board_dir/root" "$gz")"
+	[ "$rootfs_length" ] && rootfs_type="$(identify_tar "$tar_file" "$cmd" "$board_dir/root")"
 
 	local ubi_kernel_length
 	if [ "$kernel_length" ]; then
@@ -337,23 +337,23 @@ nand_upgrade_tar() {
 	if [ "$rootfs_length" ]; then
 		local ubidev="$( nand_find_ubi "${CI_ROOT_UBIPART:-$CI_UBIPART}" )"
 		local root_ubivol="$( nand_find_volume $ubidev "$CI_ROOTPART" )"
-		tar xO${gz}f "$tar_file" "$board_dir/root" | \
+		$cmd < "$tar_file" | tar xOf - "$board_dir/root" | \
 			ubiupdatevol /dev/$root_ubivol -s "$rootfs_length" -
 	fi
 	if [ "$kernel_length" ]; then
 		if [ "$kernel_mtd" ]; then
 			if [ "$jffs2_markers" = 1 ]; then
 				flash_erase -j "/dev/mtd${kernel_mtd}" 0 0
-				tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
+				$cmd < "$tar_file" | tar xOf - "$board_dir/kernel" | \
 					nandwrite "/dev/mtd${kernel_mtd}" -
 			else
-				tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
+				$cmd < "$tar_file" | tar xOf - "$board_dir/kernel" | \
 					mtd write - "$CI_KERNPART"
 			fi
 		else
 			local ubidev="$( nand_find_ubi "${CI_KERN_UBIPART:-$CI_UBIPART}" )"
 			local kern_ubivol="$( nand_find_volume $ubidev "$CI_KERNPART" )"
-			tar xO${gz}f "$tar_file" "$board_dir/kernel" | \
+			$cmd < "$tar_file" | tar xOf - "$board_dir/kernel" | \
 				ubiupdatevol /dev/$kern_ubivol -s "$kernel_length" -
 		fi
 	fi
@@ -363,9 +363,9 @@ nand_upgrade_tar() {
 
 nand_verify_if_gzip_file() {
 	local file="$1"
-	local gz="$2"
+	local cmd="$2"
 
-	if [ "$gz" = z ]; then
+	if [ "$cmd" = zcat ]; then
 		echo "verifying compressed sysupgrade file integrity"
 		if ! gzip -t "$file"; then
 			echo "corrupted compressed sysupgrade file"
@@ -376,10 +376,10 @@ nand_verify_if_gzip_file() {
 
 nand_verify_tar_file() {
 	local file="$1"
-	local gz="$2"
+	local cmd="$2"
 
 	echo "verifying sysupgrade tar file integrity"
-	if ! tar xO${gz}f "$file" > /dev/null; then
+	if ! $cmd < "$file" | tar xOf - > /dev/null; then
 		echo "corrupted sysupgrade tar file"
 		return 1
 	fi
@@ -387,28 +387,30 @@ nand_verify_tar_file() {
 
 nand_do_flash_file() {
 	local file="$1"
+	local cmd="$2"
+	local file_type
 
-	local gz="$(identify_if_gzip "$file")"
-	local file_type="$(identify "$file" "" "$gz")"
+	[ -z "$cmd" ] && cmd="$(identify_if_gzip "$file")cat"
+	file_type="$(identify "$file" "$cmd" "")"
 
 	[ ! "$(find_mtd_index "$CI_UBIPART")" ] && CI_UBIPART=rootfs
 
 	case "$file_type" in
 		"fit")
-			nand_verify_if_gzip_file "$file" "$gz" || return 1
-			nand_upgrade_fit "$file" "$gz"
+			nand_verify_if_gzip_file "$file" "$cmd" || return 1
+			nand_upgrade_fit "$file" "$cmd"
 			;;
 		"ubi")
-			nand_verify_if_gzip_file "$file" "$gz" || return 1
-			nand_upgrade_ubinized "$file" "$gz"
+			nand_verify_if_gzip_file "$file" "$cmd" || return 1
+			nand_upgrade_ubinized "$file" "$cmd"
 			;;
 		"ubifs")
-			nand_verify_if_gzip_file "$file" "$gz" || return 1
-			nand_upgrade_ubifs "$file" "$gz"
+			nand_verify_if_gzip_file "$file" "$cmd" || return 1
+			nand_upgrade_ubifs "$file" "$cmd"
 			;;
 		*)
-			nand_verify_tar_file "$file" "$gz" || return 1
-			nand_upgrade_tar "$file" "$gz"
+			nand_verify_tar_file "$file" "$cmd" || return 1
+			nand_upgrade_tar "$file" "$cmd"
 			;;
 	esac
 }
@@ -419,11 +421,26 @@ nand_do_restore_config() {
 }
 
 # Recognize type of passed file and start the upgrade process
+#
+# Supported firmware containers:
+# 1. Raw file
+# 2. Gzip
+# 3. Custom (requires passing extracting command)
+#
+# Supported data formats:
+# 1. Tar with kernel/rootfs
+# 2. UBI image (built using "ubinized")
+# 3. UBIFS image (to update UBI volume with)
+# 4. FIT image (to update UBI volume with)
+#
+# $(1): firmware file path
+# $(2): (optional) pipe command to extract firmware
 nand_do_upgrade() {
 	local file="$1"
+	local cmd="$2"
 
 	sync
-	nand_do_flash_file "$file" && nand_do_upgrade_success
+	nand_do_flash_file "$file" "$cmd" && nand_do_upgrade_success
 	nand_do_upgrade_failed
 }
 
@@ -460,18 +477,18 @@ nand_do_platform_check() {
 	local board_name="$1"
 	local file="$2"
 
-	local gz="$(identify_if_gzip "$file")"
-	local file_type="$(identify "$file" "" "$gz")"
-	local control_length=$( (tar xO${gz}f "$file" "sysupgrade-${board_name//,/_}/CONTROL" | wc -c) 2> /dev/null)
+	local cmd="$(identify_if_gzip "$file")cat"
+	local file_type="$(identify "$file" "$cmd" "")"
+	local control_length=$( ($cmd < "$file" | tar xOf - "sysupgrade-${board_name//,/_}/CONTROL" | wc -c) 2> /dev/null)
 
 	if [ "$control_length" = 0 ]; then
-		control_length=$( (tar xO${gz}f "$file" "sysupgrade-${board_name//_/,}/CONTROL" | wc -c) 2> /dev/null)
+		control_length=$( ($cmd < "$file" | tar xOf - "sysupgrade-${board_name//_/,}/CONTROL" | wc -c) 2> /dev/null)
 	fi
 
 	if [ "$control_length" != 0 ]; then
-		nand_verify_tar_file "$file" "$gz" || return 1
+		nand_verify_tar_file "$file" "$cmd" || return 1
 	else
-		nand_verify_if_gzip_file "$file" "$gz" || return 1
+		nand_verify_if_gzip_file "$file" "$cmd" || return 1
 		if [ "$file_type" != "fit" -a "$file_type" != "ubi" -a "$file_type" != "ubifs" ]; then
 			echo "invalid sysupgrade file"
 			return 1
diff --git a/package/base-files/files/usr/libexec/login.sh b/package/base-files/files/usr/libexec/login.sh
index 1fff39c6a0..e2f898e850 100755
--- a/package/base-files/files/usr/libexec/login.sh
+++ b/package/base-files/files/usr/libexec/login.sh
@@ -1,5 +1,17 @@
 #!/bin/sh
 
-[ "$(uci -q get system.@system[0].ttylogin)" = 1 ] || exec /bin/ash --login
+[ -t 0 ] && {
+	tty_dev=$(readlink /proc/self/fd/0)
+	case "$tty_dev" in
+		/dev/console|/dev/tty[0-9]*)
+			export TERM=${TERM:-linux}
+			;;
+		/dev/*)
+			export TERM=vt102
+			;;
+	esac
+}
+
+[ "$(uci -q get system.@system[0].ttylogin)" = 1 ] || exec /bin/login -f root
 
 exec /bin/login
diff --git a/package/boot/arm-trusted-firmware-mediatek/Makefile b/package/boot/arm-trusted-firmware-mediatek/Makefile
index d8eef07f5e..3f70f33784 100644
--- a/package/boot/arm-trusted-firmware-mediatek/Makefile
+++ b/package/boot/arm-trusted-firmware-mediatek/Makefile
@@ -9,7 +9,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=arm-trusted-firmware-mediatek
-PKG_RELEASE:=2
+PKG_RELEASE:=3
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git
@@ -52,6 +52,27 @@ define Trusted-Firmware-A/mt7622-nor-2ddr
   DDR3_FLYBY:=1
 endef
 
+define Trusted-Firmware-A/mt7622-ram-1ddr
+  NAME:=MediaTek MT7622 (RAM, 1x DDR3)
+  BOOT_DEVICE:=ram
+  BUILD_SUBTARGET:=mt7622
+  PLAT:=mt7622
+  RAM_BOOT_UART_DL:=1
+  HIDDEN:=
+  DEFAULT:=TARGET_mediatek_mt7622
+endef
+
+define Trusted-Firmware-A/mt7622-ram-2ddr
+  NAME:=MediaTek MT7622 (RAM, 2x DDR3)
+  BOOT_DEVICE:=ram
+  BUILD_SUBTARGET:=mt7622
+  PLAT:=mt7622
+  DDR3_FLYBY:=1
+  RAM_BOOT_UART_DL:=1
+  HIDDEN:=
+  DEFAULT:=TARGET_mediatek_mt7622
+endef
+
 define Trusted-Firmware-A/mt7622-snand-1ddr
   NAME:=MediaTek MT7622 (SPI-NAND, 1x DDR3)
   BUILD_SUBTARGET:=mt7622
@@ -483,6 +504,8 @@ endef
 TFA_TARGETS:= \
 	mt7622-nor-1ddr \
 	mt7622-nor-2ddr \
+	mt7622-ram-1ddr \
+	mt7622-ram-2ddr \
 	mt7622-snand-1ddr \
 	mt7622-snand-ubi-1ddr \
 	mt7622-snand-2ddr \
@@ -547,12 +570,14 @@ TFA_MAKE_FLAGS += \
 	$(if $(RAM_BOOT_UART_DL),RAM_BOOT_UART_DL=1) \
 	$(if $(USE_UBI),UBI=1 $(if $(findstring mt7622,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x80000)) \
 	$(if $(USE_UBI),UBI=1 $(if $(findstring mt7981,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x100000)) \
-	all
+	$(if $(RAM_BOOT_UART_DL),bl2,all)
 
 define Package/trusted-firmware-a-ram/install
 	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
 	$(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/bl2.bin $(BIN_DIR)/$(BUILD_VARIANT)-bl2.bin
 endef
+Package/trusted-firmware-a-mt7622-ram-1ddr/install = $(Package/trusted-firmware-a-ram/install)
+Package/trusted-firmware-a-mt7622-ram-2ddr/install = $(Package/trusted-firmware-a-ram/install)
 Package/trusted-firmware-a-mt7981-ram-ddr3/install = $(Package/trusted-firmware-a-ram/install)
 Package/trusted-firmware-a-mt7981-ram-ddr4/install = $(Package/trusted-firmware-a-ram/install)
 Package/trusted-firmware-a-mt7986-ram-ddr3/install = $(Package/trusted-firmware-a-ram/install)
diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-fix-return-code-when-reading.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-fix-return-code-when-reading.patch
new file mode 100644
index 0000000000..857ecd0595
--- /dev/null
+++ b/package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-fix-return-code-when-reading.patch
@@ -0,0 +1,27 @@
+From 94802b344195d3574701ca6ab5122f6b7615a6eb Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sun, 11 Aug 2024 23:12:33 +0100
+Subject: [PATCH] mediatek: snfi: fix return code when reading
+
+Return 0 on succesful read, which may contain correctable bitflips.
+
+Fixes: #10
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ plat/mediatek/apsoc_common/bl2/bl2_dev_snfi_init.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/plat/mediatek/apsoc_common/bl2/bl2_dev_snfi_init.c
++++ b/plat/mediatek/apsoc_common/bl2/bl2_dev_snfi_init.c
+@@ -29,8 +29,10 @@ static int snfi_mtd_read_page(struct nan
+ 	int ret;
+ 
+ 	ret = mtk_snand_read_page(snf, addr, (void *)buffer, NULL, false);
+-	if (ret == -EBADMSG)
++	if (ret > 0) {
++		NOTICE("corrected %d bitflips while reading page %u\n", ret, page);
+ 		ret = 0;
++	}
+ 
+ 	return ret;
+ }
diff --git a/package/boot/imx-bootlets/Makefile b/package/boot/imx-bootlets/Makefile
index 742c8a3bd0..de976c249a 100644
--- a/package/boot/imx-bootlets/Makefile
+++ b/package/boot/imx-bootlets/Makefile
@@ -13,6 +13,8 @@ PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=http://trabant.uid0.hu/openwrt/
 PKG_HASH:=09ecd81a64db5166a235932146faf08d0689bfc7ac04ac9fcc3a5bd809fba74a
 
+PKG_FLAGS:=nonshared
+
 include $(INCLUDE_DIR)/package.mk
 
 define Package/imx-bootlets
diff --git a/package/boot/kobs-ng/Makefile b/package/boot/kobs-ng/Makefile
index 68e6ff170c..261cd92eab 100644
--- a/package/boot/kobs-ng/Makefile
+++ b/package/boot/kobs-ng/Makefile
@@ -18,6 +18,7 @@ PKG_BUILD_DIR:=$(BUILD_DIR)/imx-kobs-$(PKG_VERSION)
 
 PKG_LICENSE:=GPLv2
 PKG_LICENSE_FILES:=COPYING
+PKG_FLAGS:=nonshared
 
 include $(INCLUDE_DIR)/package.mk
 
diff --git a/package/boot/rkbin/Makefile b/package/boot/rkbin/Makefile
index 4eacff042c..d895c06547 100644
--- a/package/boot/rkbin/Makefile
+++ b/package/boot/rkbin/Makefile
@@ -25,6 +25,19 @@ define Trusted-Firmware-A/Default
   BUILD_TARGET:=rockchip
 endef
 
+define Trusted-Firmware-A/rk3308
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk33/rk3308_bl31_v2.26.elf
+  TPL:=rk33/rk3308_ddr_589MHz_uart2_m1_v2.07.bin
+endef
+
+define Trusted-Firmware-A/rk3308-rock-pi-s
+  NAME:=Radxa ROCK Pi S
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk33/rk3308_bl31_v2.26.elf
+  TPL:=rk33/rk3308_ddr_589MHz_uart0_m0_v2.07.bin
+endef
+
 define Trusted-Firmware-A/rk3566
   BUILD_SUBTARGET:=armv8
   ATF:=rk35/rk3568_bl31_v1.44.elf
@@ -37,9 +50,58 @@ define Trusted-Firmware-A/rk3568
   TPL:=rk35/rk3568_ddr_1560MHz_v1.21.bin
 endef
 
+define Trusted-Firmware-A/rk3568-e25
+  NAME:=Radxa E25 board
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk35/rk3568_bl31_v1.44.elf
+  TPL:=rk35/rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
+endef
+
+define Trusted-Firmware-A/rk3588
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk35/rk3588_bl31_v1.45.elf
+  TPL:=rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
+endef
+
 TFA_TARGETS:= \
+	rk3308 \
+	rk3308-rock-pi-s \
 	rk3566 \
-	rk3568
+	rk3568 \
+	rk3568-e25 \
+	rk3588
+
+ifeq ($(BUILD_VARIANT),rk3308-rock-pi-s)
+  TPL_FILE:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
+  define Download/rk3308-tpl-rock-pi-s
+    FILE:=$(TPL_FILE)
+    URL:=https://github.com/radxa/rkbin/raw/5696fab20dcac57c1458f72dc7604ba60e553adf/bin/rk33/
+    HASH:=8a1a42df23cccb86a2dabc14a5c0e9227d64a51b9b83e9968ef5af3b30787f7d
+  endef
+
+  define Build/Prepare
+	$(eval $(call Download,rk3308-tpl-rock-pi-s))
+	$(call Build/Prepare/Default)
+
+	$(CP) $(DL_DIR)/$(TPL_FILE) $(PKG_BUILD_DIR)/bin/rk33/
+  endef
+endif
+
+ifeq ($(BUILD_VARIANT),rk3568-e25)
+  TPL_FILE:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
+  define Download/rk3568-tpl-e25
+    FILE:=$(TPL_FILE)
+    URL:=https://github.com/radxa/rkbin/raw/5696fab20dcac57c1458f72dc7604ba60e553adf/bin/rk35/
+    HASH:=1815f9649dc5661a3ef184b052da39286e51453a66f6ff53cc3e345d65dfabd4
+  endef
+
+  define Build/Prepare
+	$(eval $(call Download,rk3568-tpl-e25))
+	$(call Build/Prepare/Default)
+
+	$(CP) $(DL_DIR)/$(TPL_FILE) $(PKG_BUILD_DIR)/bin/rk35/
+  endef
+endif
 
 define Build/Compile
 endef
diff --git a/package/boot/uboot-ath79/Makefile b/package/boot/uboot-ath79/Makefile
new file mode 100644
index 0000000000..d19f561576
--- /dev/null
+++ b/package/boot/uboot-ath79/Makefile
@@ -0,0 +1,39 @@
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_VERSION:=2024.07
+PKG_HASH:=f591da9ab90ef3d6b3d173766d0ddff90c4ed7330680897486117df390d83c8f
+
+UBOOT_USE_INTREE_DTC:=1
+
+include $(INCLUDE_DIR)/u-boot.mk
+include $(INCLUDE_DIR)/package.mk
+include $(INCLUDE_DIR)/host-build.mk
+
+define U-Boot/Default
+  BUILD_TARGET:=ath79
+  BUILD_SUBTARGET:=generic
+  UBOOT_IMAGE:=u-boot.bin
+  UBOOT_CONFIG:=ap121
+  HIDDEN:=1
+endef
+
+define U-Boot/ar9344_nec_aterm
+  NAME:=NEC Aterm series (AR9344)
+  BUILD_SUBTARGET:= tiny
+  BUILD_DEVICES:=nec_wg600hp nec_wr8750n nec_wr9500n
+  UBOOT_CONFIG:=nec_ar9344_aterm
+endef
+
+UBOOT_TARGETS := ar9344_nec_aterm
+
+# don't stage files to bindir, let target/linux/ath79/image/*.mk do that
+define Package/u-boot/install
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)
+endef
+
+$(eval $(call BuildPackage/U-Boot))
diff --git a/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch b/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch
new file mode 100644
index 0000000000..833a7425b7
--- /dev/null
+++ b/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch
@@ -0,0 +1,287 @@
+From 80a7688c478a6a372083c29ff0b1826db4dae5b2 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Wed, 24 Apr 2024 23:54:46 +0900
+Subject: [PATCH] ath79: add support for NEC AR9344 Aterm series
+
+---
+ arch/mips/dts/Makefile                |  1 +
+ arch/mips/dts/nec,ar9344-aterm.dts    | 35 +++++++++++++++
+ arch/mips/mach-ath79/Kconfig          |  5 +++
+ board/nec/ar9344_aterm/Kconfig        | 30 +++++++++++++
+ board/nec/ar9344_aterm/Makefile       |  3 ++
+ board/nec/ar9344_aterm/ar9344_aterm.c | 59 ++++++++++++++++++++++++++
+ configs/nec_ar9344_aterm_defconfig    | 61 +++++++++++++++++++++++++++
+ include/configs/nec_ar9344_aterm.h    | 28 ++++++++++++
+ 8 files changed, 222 insertions(+)
+ create mode 100644 arch/mips/dts/nec,ar9344-aterm.dts
+ create mode 100644 board/nec/ar9344_aterm/Kconfig
+ create mode 100644 board/nec/ar9344_aterm/Makefile
+ create mode 100644 board/nec/ar9344_aterm/ar9344_aterm.c
+ create mode 100644 configs/nec_ar9344_aterm_defconfig
+ create mode 100644 include/configs/nec_ar9344_aterm.h
+
+--- a/arch/mips/dts/Makefile
++++ b/arch/mips/dts/Makefile
+@@ -24,6 +24,7 @@ dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY
+ dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb
+ dtb-$(CONFIG_TARGET_OCTEON_EBB7304) += mrvl,octeon-ebb7304.dtb
+ dtb-$(CONFIG_TARGET_OCTEON_NIC23) += mrvl,octeon-nic23.dtb
++dtb-$(CONFIG_BOARD_NEC_AR9344_ATERM) += nec,ar9344-aterm.dtb
+ dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
+ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
+ dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
+--- /dev/null
++++ b/arch/mips/dts/nec,ar9344-aterm.dts
+@@ -0,0 +1,35 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2024 INAGAKI Hiroshi <musashino.open@gmail.com>
++ */
++
++/dts-v1/;
++#include "ar934x.dtsi"
++
++/ {
++	model = "NEC Aterm series (AR9344)";
++	compatible = "nec,ar9344-aterm", "qca,ar934x";
++
++	aliases {
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:9600n8";
++	};
++};
++
++&uart0 {
++	clock-frequency = <40000000>;
++	status = "okay";
++};
++
++&xtal {
++	clock-frequency = <40000000>;
++};
++
++/* delete unused nodes to reduce dtb size */
++/delete-node/ &ehci0;
++/delete-node/ &gmac0;
++/delete-node/ &gmac1;
++/delete-node/ &spi0;
+--- a/arch/mips/mach-ath79/Kconfig
++++ b/arch/mips/mach-ath79/Kconfig
+@@ -58,6 +58,10 @@ config TARGET_AP152
+ 	bool "AP152 Reference Board"
+ 	select SOC_QCA956X
+ 
++config BOARD_NEC_AR9344_ATERM
++	bool "NEC Aterm series Boards (AR9344)"
++	select SOC_AR934X
++
+ config BOARD_TPLINK_WDR4300
+ 	bool "TP-Link WDR4300 Board"
+ 	select SOC_AR934X
+@@ -67,6 +71,7 @@ endchoice
+ source "board/qca/ap121/Kconfig"
+ source "board/qca/ap143/Kconfig"
+ source "board/qca/ap152/Kconfig"
++source "board/nec/ar9344_aterm/Kconfig"
+ source "board/tplink/wdr4300/Kconfig"
+ 
+ endmenu
+--- /dev/null
++++ b/board/nec/ar9344_aterm/Kconfig
+@@ -0,0 +1,30 @@
++if BOARD_NEC_AR9344_ATERM
++
++config SYS_VENDOR
++	default "nec"
++
++config SYS_SOC
++	default "ath79"
++
++config SYS_BOARD
++	default "ar9344_aterm"
++
++config SYS_CONFIG_NAME
++	default "nec_ar9344_aterm"
++
++config TEXT_BASE
++	default 0x9f000000
++
++config SYS_DCACHE_SIZE
++	default 32768
++
++config SYS_DCACHE_LINE_SIZE
++	default 32
++
++config SYS_ICACHE_SIZE
++	default 65536
++
++config SYS_ICACHE_LINE_SIZE
++	default 32
++
++endif
+--- /dev/null
++++ b/board/nec/ar9344_aterm/Makefile
+@@ -0,0 +1,3 @@
++# SPDX-License-Identifier: GPL-2.0+
++
++obj-y	= ar9344_aterm.o
+--- /dev/null
++++ b/board/nec/ar9344_aterm/ar9344_aterm.c
+@@ -0,0 +1,59 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2024 INAGAKI Hiroshi <musashino.open@gmail.com>
++ */
++
++#include <init.h>
++#include <asm/io.h>
++#include <asm/addrspace.h>
++#include <asm/types.h>
++#include <mach/ath79.h>
++#include <mach/ar71xx_regs.h>
++#include <mach/ddr.h>
++#include <debug_uart.h>
++
++static void aterm_pinmux_config(void)
++{
++	void __iomem *regs;
++
++	regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
++			   MAP_NOCACHE);
++
++	/* Disable JTAG */
++	writel(0x2, regs + AR934X_GPIO_REG_FUNC);
++
++	/* Configure default GPIO OE/SET regs */
++	writel(0x3db1f, regs + AR71XX_GPIO_REG_OE);
++	writel(0x142000, regs + AR71XX_GPIO_REG_SET);
++
++	/* Configure pin multiplexing */
++	writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0);
++	writel(0x0b0a0900, regs + AR934X_GPIO_REG_OUT_FUNC1);
++	writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2);
++	writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3);
++	writel(0x2f2e0000, regs + AR934X_GPIO_REG_OUT_FUNC4);
++	writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5);
++}
++
++#ifdef CONFIG_DEBUG_UART_BOARD_INIT
++void board_debug_uart_init(void)
++{
++	aterm_pinmux_config();
++}
++#endif
++
++#ifdef CONFIG_BOARD_EARLY_INIT_F
++int board_early_init_f(void)
++{
++#ifndef CONFIG_DEBUG_UART_BOARD_INIT
++	aterm_pinmux_config();
++#endif
++
++#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
++	ar934x_pll_init(560, 480, 240);
++	ar934x_ddr_init(560, 480, 240);
++#endif
++
++	return 0;
++}
++#endif
+--- /dev/null
++++ b/configs/nec_ar9344_aterm_defconfig
+@@ -0,0 +1,61 @@
++CONFIG_MIPS=y
++CONFIG_SYS_MALLOC_LEN=0x40000
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff
++CONFIG_ENV_SIZE=0x1000
++CONFIG_DEFAULT_DEVICE_TREE="nec,ar9344-aterm"
++CONFIG_SYS_LOAD_ADDR=0x83000000
++CONFIG_ARCH_ATH79=y
++CONFIG_BOARD_NEC_AR9344_ATERM=y
++CONFIG_SYS_MIPS_TIMER_FREQ=280000000
++CONFIG_MIPS_RELOCATION_TABLE_SIZE=0x4000
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_TIMESTAMP=y
++CONFIG_BOOTDELAY=3
++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
++CONFIG_USE_BOOTARGS=y
++CONFIG_BOOTARGS="console=ttyS0,115200"
++CONFIG_USE_BOOTCOMMAND=y
++CONFIG_BOOTCOMMAND="bootm 0x9f040000"
++# CONFIG_DISPLAY_BOARDINFO is not set
++CONFIG_BOARD_EARLY_INIT_F=y
++CONFIG_SYS_MALLOC_BOOTPARAMS=y
++# CONFIG_CMDLINE_EDITING is not set
++# CONFIG_AUTO_COMPLETE is not set
++# CONFIG_SYS_LONGHELP is not set
++CONFIG_SYS_MAXARGS=32
++# CONFIG_SYS_XTRACE is not set
++# CONFIG_CMD_BDI is not set
++# CONFIG_CMD_CONSOLE is not set
++# CONFIG_BOOTM_PLAN9 is not set
++# CONFIG_BOOTM_RTEMS is not set
++# CONFIG_BOOTM_VXWORKS is not set
++# CONFIG_CMD_ELF is not set
++# CONFIG_CMD_FDT is not set
++# CONFIG_CMD_RUN is not set
++# CONFIG_CMD_XIMG is not set
++# CONFIG_CMD_EXPORTENV is not set
++# CONFIG_CMD_IMPORTENV is not set
++# CONFIG_CMD_EDITENV is not set
++# CONFIG_CMD_SAVEENV is not set
++# CONFIG_CMD_ENV_EXISTS is not set
++# CONFIG_CMD_CRC32 is not set
++# CONFIG_CMD_DM is not set
++# CONFIG_CMD_LOADS is not set
++# CONFIG_CMD_ECHO is not set
++# CONFIG_CMD_ITEST is not set
++# CONFIG_CMD_SOURCE is not set
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_CMD_SLEEP is not set
++# CONFIG_ISO_PARTITION is not set
++# CONFIG_OF_TAG_MIGRATE is not set
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++# CONFIG_NET is not set
++CONFIG_CLK=y
++# CONFIG_GPIO is not set
++# CONFIG_I2C is not set
++# CONFIG_INPUT is not set
++# CONFIG_POWER is not set
++CONFIG_DM_SERIAL=y
++CONFIG_SYS_NS16550=y
++# CONFIG_GZIP is not set
+--- /dev/null
++++ b/include/configs/nec_ar9344_aterm.h
+@@ -0,0 +1,28 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * Copyright (C) 2024 INAGAKI Hiroshi <musashino.open@gmail.com>
++ */
++
++#ifndef __NEC_AR9344_ATERM_H
++#define __NEC_AR9344_ATERM_H
++
++#define CFG_SYS_SDRAM_BASE		0x80000000
++
++#define CFG_SYS_INIT_RAM_ADDR	0xbd000000
++#define CFG_SYS_INIT_RAM_SIZE	0x8000
++
++/*
++ * Serial Port
++ */
++#define CFG_SYS_NS16550_CLK		40000000
++
++/*
++ * Command
++ */
++/* Miscellaneous configurable options */
++
++/*
++ * Diagnostics
++ */
++
++#endif  /* __NEC_AR9344_ATERM_H */
diff --git a/package/boot/uboot-envtools/files/ath79 b/package/boot/uboot-envtools/files/ath79
index 099aebcfa2..55fcec2661 100644
--- a/package/boot/uboot-envtools/files/ath79
+++ b/package/boot/uboot-envtools/files/ath79
@@ -118,7 +118,8 @@ domywifi,dw33d)
 glinet,gl-ar150)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x8000" "0x10000"
 	;;
-huawei,ap5030dn)
+huawei,ap5030dn|\
+huawei,ap6010dn)
 	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x20000" "0x20000"
 	;;
 netgear,wndr3700|\
diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic
index 0e30c489c9..b567481215 100644
--- a/package/boot/uboot-envtools/files/mediatek_filogic
+++ b/package/boot/uboot-envtools/files/mediatek_filogic
@@ -33,6 +33,22 @@ ubootenv_add_ubi_default() {
 }
 
 case "$board" in
+abt,asr3000|\
+h3c,magic-nx30-pro|\
+jcg,q30-pro|\
+netcore,n60|\
+nokia,ea0326gmp|\
+qihoo,360t7|\
+tplink,tl-xdr4288|\
+tplink,tl-xdr6086|\
+tplink,tl-xdr6088|\
+tplink,tl-xtr8488|\
+xiaomi,mi-router-ax3000t-ubootmod|\
+xiaomi,mi-router-wr30u-ubootmod|\
+xiaomi,redmi-router-ax6000-ubootmod|\
+zyxel,ex5601-t0-ubootmod)
+	ubootenv_add_ubi_default
+	;;
 asus,rt-ax59u)
 	ubootenv_add_uci_config "/dev/mtd0" "0x100000" "0x20000" "0x20000"
 	;;
@@ -40,32 +56,23 @@ bananapi,bpi-r3|\
 bananapi,bpi-r3-mini|\
 bananapi,bpi-r4|\
 bananapi,bpi-r4-poe|\
+cmcc,rax3000m|\
 jdcloud,re-cp-03)
-	. /lib/upgrade/common.sh
-
-	bootdev="$(fitblk_get_bootdev)"
-	case "$bootdev" in
-	ubi*)
+	. /lib/upgrade/fit.sh
+	export_fitblk_bootdev
+	case "$CI_METHOD" in
+	ubi)
 		ubootenv_add_ubi_default
 		;;
-	mmc*)
-		ubootenv_add_mmc_default "${bootdev%%p[0-9]*}"
+	emmc)
+		bootdev=${EMMC_KERN_DEV%%p[0-9]*}
+		ubootenv_add_mmc_default "${bootdev#/dev/}"
 		;;
-	mtd*)
+	default)
 		ubootenv_add_nor_default
 		;;
 	esac
 	;;
-cmcc,rax3000m)
-	case "$(cmdline_get_var root)" in
-	/dev/mmc*)
-		ubootenv_add_mmc_default
-		;;
-	*)
-		ubootenv_add_ubi_default
-		;;
-	esac
-	;;
 comfast,cf-e393ax)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x80000"
 	;;
@@ -79,20 +86,6 @@ zbtlink,zbt-z8103ax)
 dlink,aquila-pro-ai-m30-a1)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x40000"
 	;;
-h3c,magic-nx30-pro|\
-jcg,q30-pro|\
-netcore,n60|\
-nokia,ea0326gmp|\
-qihoo,360t7|\
-tplink,tl-xdr4288|\
-tplink,tl-xdr6086|\
-tplink,tl-xdr6088|\
-xiaomi,mi-router-ax3000t-ubootmod|\
-xiaomi,mi-router-wr30u-ubootmod|\
-xiaomi,redmi-router-ax6000-ubootmod|\
-zyxel,ex5601-t0-ubootmod)
-	ubootenv_add_ubi_default
-	;;
 glinet,gl-mt2500|\
 glinet,gl-mt6000)
 	local envdev=$(find_mmc_part "u-boot-env")
diff --git a/package/boot/uboot-envtools/files/mediatek_mt7622 b/package/boot/uboot-envtools/files/mediatek_mt7622
index 6698e06ee3..020c800e58 100644
--- a/package/boot/uboot-envtools/files/mediatek_mt7622
+++ b/package/boot/uboot-envtools/files/mediatek_mt7622
@@ -31,17 +31,16 @@ dlink,eagle-pro-ai-m32-a1|\
 dlink,eagle-pro-ai-r32-a1)
 	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x2000" "0x2000"
 	;;
+bananapi,bpi-r64|\
 linksys,e8450-ubi)
-	ubootenv_add_ubi_default
-	;;
-bananapi,bpi-r64)
-	. /lib/upgrade/common.sh
-	bootdev="$(fitblk_get_bootdev)"
-	case "$bootdev" in
-	mmc*)
-		ubootenv_add_mmc_default "${bootdev%p[0-9]*}"
+	. /lib/upgrade/fit.sh
+	export_fitblk_bootdev
+	case "$CI_METHOD" in
+	emmc)
+		bootdev=${EMMC_KERN_DEV%%p[0-9]*}
+		ubootenv_add_mmc_default "${bootdev#/dev/}"
 		;;
-	ubi*)
+	ubi)
 		ubootenv_add_ubi_default
 		;;
 	esac
@@ -57,7 +56,8 @@ ubnt,unifi-6-lr-v2-ubootmod|\
 ubnt,unifi-6-lr-v3-ubootmod)
 	ubootenv_add_uci_config "/dev/mtd$(find_mtd_index "u-boot-env")" "0x0" "0x4000" "0x1000"
 	;;
-ubnt,unifi-6-lr-v2)
+ubnt,unifi-6-lr-v2|\
+ubnt,unifi-6-lr-v3)
 	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x1000" "0x1000" "1"
 	;;
 xiaomi,redmi-router-ax6s)
diff --git a/package/boot/uboot-envtools/files/mediatek_mt7629 b/package/boot/uboot-envtools/files/mediatek_mt7629
index 313fb6a448..ce09caffab 100644
--- a/package/boot/uboot-envtools/files/mediatek_mt7629
+++ b/package/boot/uboot-envtools/files/mediatek_mt7629
@@ -16,6 +16,9 @@ iptime,a6004mx|\
 netgear,ex6250-v2)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000"
 	;;
+linksys,ea7500-v3)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000"
+	;;
 esac
 
 config_load ubootenv
diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq60xx b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
index 749b053aab..853037b776 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq60xx
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
@@ -9,7 +9,8 @@ board=$(board_name)
 
 case "$board" in
 8devices,mango-dvk|\
-8devices,mango-dvk-sfp)
+8devices,mango-dvk-sfp|\
+cambiumnetworks,xe3-4)
 	idx="$(find_mtd_index 0:APPSBLENV)"
 	[ -n "$idx" ] && \
 		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000"
diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq807x b/package/boot/uboot-envtools/files/qualcommax_ipq807x
index 4ae0de4e26..852e05f29a 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq807x
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq807x
@@ -58,6 +58,7 @@ prpl,haze)
 	[ -n "$mmcpart" ] && \
 		ubootenv_add_uci_config "$mmcpart" "0x0" "0x40000" "0x400" "0x100"
 	;;
+asus,rt-ax89x|\
 qnap,301w)
 	idx="$(find_mtd_index 0:appsblenv)"
 	[ -n "$idx" ] && \
diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips
index 3deb46c295..cca394a03b 100644
--- a/package/boot/uboot-envtools/files/ramips
+++ b/package/boot/uboot-envtools/files/ramips
@@ -146,6 +146,10 @@ xiaomi,mi-router-cr6608|\
 xiaomi,mi-router-cr6609)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x20000"
 	;;
+netgear,wax214v2)
+	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
+	ubootenv_add_uci_sys_config "/dev/mtd1" "0x20000" "0x8000" "0x20000"
+	;;
 esac
 
 config_load ubootenv
diff --git a/package/boot/uboot-envtools/files/rockchip_armv8 b/package/boot/uboot-envtools/files/rockchip_armv8
new file mode 100644
index 0000000000..075776a1ff
--- /dev/null
+++ b/package/boot/uboot-envtools/files/rockchip_armv8
@@ -0,0 +1,23 @@
+#
+# Copyright (C) 2024 OpenWrt.org
+#
+[ -e /etc/config/ubootenv ] && exit 0
+
+touch /etc/config/ubootenv
+
+. /lib/uboot-envtools.sh
+. /lib/functions.sh
+
+board=$(board_name)
+
+case "$board" in
+xunlong,orangepi-r1-plus|\
+xunlong,orangepi-r1-plus-lts)
+	ubootenv_add_uci_config "/dev/mmcblk0" "0x3f8000" "0x8000"
+	;;
+esac
+
+config_load ubootenv
+config_foreach ubootenv_add_app_config
+
+exit 0
diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile
index 8827bcf8c2..b3b11a0f7c 100644
--- a/package/boot/uboot-mediatek/Makefile
+++ b/package/boot/uboot-mediatek/Makefile
@@ -1,8 +1,8 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2024.01
-PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
+PKG_VERSION:=2024.07
+PKG_HASH:=f591da9ab90ef3d6b3d173766d0ddff90c4ed7330680897486117df390d83c8f
 PKG_BUILD_DEPENDS:=!(TARGET_ramips||TARGET_mediatek_mt7623):arm-trusted-firmware-tools/host
 
 UBOOT_USE_INTREE_DTC:=1
@@ -219,6 +219,18 @@ define U-Boot/mt7629_rfb
   UBOOT_CONFIG:=mt7629_rfb
 endef
 
+define U-Boot/mt7981_abt_asr3000
+  NAME:=ABT ASR3000
+  BUILD_SUBTARGET:=filogic
+  BUILD_DEVICES:=abt_asr3000
+  UBOOT_CONFIG:=mt7981_abt_asr3000
+  UBOOT_IMAGE:=u-boot.fip
+  BL2_BOOTDEV:=spim-nand
+  BL2_SOC:=mt7981
+  BL2_DDRTYPE:=ddr3
+  DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
+endef
+
 define U-Boot/mt7981_cmcc_rax3000m-emmc
   NAME:=CMCC RAX3000M
   BUILD_SUBTARGET:=filogic
@@ -557,6 +569,18 @@ define U-Boot/mt7986_tplink_tl-xdr6088
   DEPENDS:=+trusted-firmware-a-mt7986-spim-nand-ddr3
 endef
 
+define U-Boot/mt7986_tplink_tl-xtr8488
+  NAME:=TP-LINK TL-XTR8488
+  BUILD_SUBTARGET:=filogic
+  BUILD_DEVICES:=tplink_tl-xtr8488
+  UBOOT_CONFIG:=mt7986_tplink_tl-xtr8488
+  UBOOT_IMAGE:=u-boot.fip
+  BL2_BOOTDEV:=spim-nand
+  BL2_SOC:=mt7986
+  BL2_DDRTYPE:=ddr4
+  DEPENDS:=+trusted-firmware-a-mt7986-spim-nand-ddr4
+endef
+
 define U-Boot/mt7986_xiaomi_redmi-router-ax6000
   NAME:=Xiaomi Redmi AX6000
   BUILD_SUBTARGET:=filogic
@@ -734,6 +758,7 @@ UBOOT_TARGETS := \
 	mt7628_rfb \
 	mt7628_ravpower_rp-wd009 \
 	mt7629_rfb \
+	mt7981_abt_asr3000 \
 	mt7981_cmcc_rax3000m-emmc \
 	mt7981_cmcc_rax3000m-nand \
 	mt7981_h3c_magic-nx30-pro \
@@ -761,6 +786,7 @@ UBOOT_TARGETS := \
 	mt7986_tplink_tl-xdr4288 \
 	mt7986_tplink_tl-xdr6086 \
 	mt7986_tplink_tl-xdr6088 \
+	mt7986_tplink_tl-xtr8488 \
 	mt7986_xiaomi_redmi-router-ax6000 \
 	mt7986_zyxel_ex5601-t0 \
 	mt7986_rfb \
@@ -776,6 +802,10 @@ UBOOT_TARGETS := \
 	mt7988_rfb-emmc \
 	mt7988_rfb-sd
 
+UBOOT_CUSTOMIZE_CONFIG := \
+	--disable TOOLS_KWBIMAGE \
+	--disable TOOLS_LIBCRYPTO
+
 ifdef CONFIG_TARGET_mediatek
 UBOOT_MAKE_FLAGS += $(UBOOT_IMAGE:.fip=.bin)
 endif
diff --git a/package/boot/uboot-mediatek/patches/100-04-env-add-support-for-generic-MTD-device.patch b/package/boot/uboot-mediatek/patches/100-04-env-add-support-for-generic-MTD-device.patch
index 9b02b4dc63..2f070005d6 100644
--- a/package/boot/uboot-mediatek/patches/100-04-env-add-support-for-generic-MTD-device.patch
+++ b/package/boot/uboot-mediatek/patches/100-04-env-add-support-for-generic-MTD-device.patch
@@ -370,7 +370,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +};
 --- a/include/env_internal.h
 +++ b/include/env_internal.h
-@@ -109,6 +109,7 @@ enum env_location {
+@@ -108,6 +108,7 @@ enum env_location {
  	ENVL_FAT,
  	ENVL_FLASH,
  	ENVL_MMC,
diff --git a/package/boot/uboot-mediatek/patches/100-06-mtd-add-core-facility-code-of-NMBM.patch b/package/boot/uboot-mediatek/patches/100-06-mtd-add-core-facility-code-of-NMBM.patch
index 23634e6425..997d07867b 100644
--- a/package/boot/uboot-mediatek/patches/100-06-mtd-add-core-facility-code-of-NMBM.patch
+++ b/package/boot/uboot-mediatek/patches/100-06-mtd-add-core-facility-code-of-NMBM.patch
@@ -31,12 +31,14 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/Kconfig
 +++ b/drivers/mtd/Kconfig
-@@ -274,4 +274,6 @@ source "drivers/mtd/ubi/Kconfig"
+@@ -274,6 +274,8 @@ source "drivers/mtd/ubi/Kconfig"
  
  source "drivers/mtd/nvmxip/Kconfig"
  
 +source "drivers/mtd/nmbm/Kconfig"
 +
+ endif
+ 
  endmenu
 --- a/drivers/mtd/Makefile
 +++ b/drivers/mtd/Makefile
diff --git a/package/boot/uboot-mediatek/patches/100-08-common-board_r-add-support-to-initialize-NMBM-after-.patch b/package/boot/uboot-mediatek/patches/100-08-common-board_r-add-support-to-initialize-NMBM-after-.patch
index da4dce917b..6a7912e64a 100644
--- a/package/boot/uboot-mediatek/patches/100-08-common-board_r-add-support-to-initialize-NMBM-after-.patch
+++ b/package/boot/uboot-mediatek/patches/100-08-common-board_r-add-support-to-initialize-NMBM-after-.patch
@@ -34,7 +34,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  #if defined(CONFIG_CMD_ONENAND)
  /* go init the NAND */
  static int initr_onenand(void)
-@@ -675,6 +689,9 @@ static init_fnc_t init_sequence_r[] = {
+@@ -664,6 +678,9 @@ static init_fnc_t init_sequence_r[] = {
  #ifdef CONFIG_CMD_ONENAND
  	initr_onenand,
  #endif
diff --git a/package/boot/uboot-mediatek/patches/100-09-cmd-add-nmbm-command.patch b/package/boot/uboot-mediatek/patches/100-09-cmd-add-nmbm-command.patch
index 4eb2bc9ccf..cd41581006 100644
--- a/package/boot/uboot-mediatek/patches/100-09-cmd-add-nmbm-command.patch
+++ b/package/boot/uboot-mediatek/patches/100-09-cmd-add-nmbm-command.patch
@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
-@@ -1392,6 +1392,12 @@ config CMD_NAND_TORTURE
+@@ -1450,6 +1450,12 @@ config CMD_NAND_TORTURE
  
  endif # CMD_NAND
  
@@ -36,8 +36,8 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  obj-$(CONFIG_CMD_NAND) += nand.o
 +obj-$(CONFIG_CMD_NMBM) += nmbm.o
  obj-$(CONFIG_CMD_NET) += net.o
+ obj-$(CONFIG_ENV_SUPPORT) += nvedit.o
  obj-$(CONFIG_CMD_NVEDIT_EFI) += nvedit_efi.o
- obj-$(CONFIG_CMD_ONENAND) += onenand.o
 --- /dev/null
 +++ b/cmd/nmbm.c
 @@ -0,0 +1,327 @@
diff --git a/package/boot/uboot-mediatek/patches/100-10-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch b/package/boot/uboot-mediatek/patches/100-10-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch
index c6358f3287..34f7fba960 100644
--- a/package/boot/uboot-mediatek/patches/100-10-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch
+++ b/package/boot/uboot-mediatek/patches/100-10-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch
@@ -20,7 +20,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
 
 --- a/cmd/mtd.c
 +++ b/cmd/mtd.c
-@@ -504,6 +504,42 @@ out_put_mtd:
+@@ -722,6 +722,42 @@ out_put_mtd:
  	return CMD_RET_SUCCESS;
  }
  
@@ -63,15 +63,15 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
  #ifdef CONFIG_AUTO_COMPLETE
  static int mtd_name_complete(int argc, char *const argv[], char last_char,
  			     int maxv, char *cmdv[])
-@@ -551,6 +587,7 @@ U_BOOT_LONGHELP(mtd,
+@@ -769,6 +805,7 @@ U_BOOT_LONGHELP(mtd,
  	"\n"
  	"Specific functions:\n"
  	"mtd bad                               <name>\n"
 +	"mtd markbad                           <name> <off>\n"
- 	"\n"
- 	"With:\n"
- 	"\t<name>: NAND partition/chip name (or corresponding DM device name or OF path)\n"
-@@ -575,4 +612,6 @@ U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils"
+ #if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+ 	"mtd otpread                           <name> [u|f] <off> <size>\n"
+ 	"mtd otpwrite                          <name> <off> <hex string>\n"
+@@ -809,4 +846,6 @@ U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils"
  		U_BOOT_SUBCMD_MKENT_COMPLETE(erase, 4, 0, do_mtd_erase,
  					     mtd_name_complete),
  		U_BOOT_SUBCMD_MKENT_COMPLETE(bad, 2, 1, do_mtd_bad,
diff --git a/package/boot/uboot-mediatek/patches/100-11-env-add-support-for-NMBM-upper-MTD-layer.patch b/package/boot/uboot-mediatek/patches/100-11-env-add-support-for-NMBM-upper-MTD-layer.patch
index dbb1e2e59d..0930ace26a 100644
--- a/package/boot/uboot-mediatek/patches/100-11-env-add-support-for-NMBM-upper-MTD-layer.patch
+++ b/package/boot/uboot-mediatek/patches/100-11-env-add-support-for-NMBM-upper-MTD-layer.patch
@@ -240,7 +240,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +};
 --- a/include/env_internal.h
 +++ b/include/env_internal.h
-@@ -111,6 +111,7 @@ enum env_location {
+@@ -110,6 +110,7 @@ enum env_location {
  	ENVL_MMC,
  	ENVL_MTD,
  	ENVL_NAND,
diff --git a/package/boot/uboot-mediatek/patches/100-13-cmd-add-a-new-command-for-NAND-flash-debugging.patch b/package/boot/uboot-mediatek/patches/100-13-cmd-add-a-new-command-for-NAND-flash-debugging.patch
index e6e12ae24c..97cb1088a0 100644
--- a/package/boot/uboot-mediatek/patches/100-13-cmd-add-a-new-command-for-NAND-flash-debugging.patch
+++ b/package/boot/uboot-mediatek/patches/100-13-cmd-add-a-new-command-for-NAND-flash-debugging.patch
@@ -26,7 +26,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
-@@ -1392,6 +1392,14 @@ config CMD_NAND_TORTURE
+@@ -1450,6 +1450,14 @@ config CMD_NAND_TORTURE
  
  endif # CMD_NAND
  
@@ -50,7 +50,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +obj-$(CONFIG_CMD_NAND_EXT) += nand-ext.o
  obj-$(CONFIG_CMD_NMBM) += nmbm.o
  obj-$(CONFIG_CMD_NET) += net.o
- obj-$(CONFIG_CMD_NVEDIT_EFI) += nvedit_efi.o
+ obj-$(CONFIG_ENV_SUPPORT) += nvedit.o
 --- /dev/null
 +++ b/cmd/nand-ext.c
 @@ -0,0 +1,1062 @@
diff --git a/package/boot/uboot-mediatek/patches/100-14-mtd-spi-nor-add-support-to-read-flash-unique-ID.patch b/package/boot/uboot-mediatek/patches/100-14-mtd-spi-nor-add-support-to-read-flash-unique-ID.patch
index da09cd9c08..8db02ddf6a 100644
--- a/package/boot/uboot-mediatek/patches/100-14-mtd-spi-nor-add-support-to-read-flash-unique-ID.patch
+++ b/package/boot/uboot-mediatek/patches/100-14-mtd-spi-nor-add-support-to-read-flash-unique-ID.patch
@@ -13,7 +13,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/spi/spi-nor-core.c
 +++ b/drivers/mtd/spi/spi-nor-core.c
-@@ -2854,6 +2854,100 @@ static int spi_nor_init_params(struct sp
+@@ -2908,6 +2908,100 @@ static int spi_nor_init_params(struct sp
  	return 0;
  }
  
@@ -114,7 +114,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  static int spi_nor_hwcaps2cmd(u32 hwcaps, const int table[][2], size_t size)
  {
  	size_t i;
-@@ -4051,6 +4145,7 @@ int spi_nor_scan(struct spi_nor *nor)
+@@ -4027,6 +4121,7 @@ int spi_nor_scan(struct spi_nor *nor)
  	nor->write = spi_nor_write_data;
  	nor->read_reg = spi_nor_read_reg;
  	nor->write_reg = spi_nor_write_reg;
@@ -132,7 +132,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  #define SNOR_MFR_CYPRESS	0x34
  
  /*
-@@ -571,6 +572,7 @@ struct spi_nor {
+@@ -567,6 +568,7 @@ struct spi_nor {
  	void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
  	int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
  	int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
diff --git a/package/boot/uboot-mediatek/patches/100-15-cmd-sf-add-support-to-read-flash-unique-ID.patch b/package/boot/uboot-mediatek/patches/100-15-cmd-sf-add-support-to-read-flash-unique-ID.patch
index f7cbd8d052..dcf6b47f62 100644
--- a/package/boot/uboot-mediatek/patches/100-15-cmd-sf-add-support-to-read-flash-unique-ID.patch
+++ b/package/boot/uboot-mediatek/patches/100-15-cmd-sf-add-support-to-read-flash-unique-ID.patch
@@ -12,7 +12,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/cmd/sf.c
 +++ b/cmd/sf.c
-@@ -412,6 +412,14 @@ static int do_spi_protect(int argc, char
+@@ -413,6 +413,14 @@ static int do_spi_protect(int argc, char
  	return ret == 0 ? 0 : 1;
  }
  
@@ -27,7 +27,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  enum {
  	STAGE_ERASE,
  	STAGE_CHECK,
-@@ -606,6 +614,8 @@ static int do_spi_flash(struct cmd_tbl *
+@@ -607,6 +615,8 @@ static int do_spi_flash(struct cmd_tbl *
  		ret = do_spi_flash_erase(argc, argv);
  	else if (IS_ENABLED(CONFIG_SPI_FLASH_LOCK) && strcmp(cmd, "protect") == 0)
  		ret = do_spi_protect(argc, argv);
@@ -36,7 +36,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	else if (IS_ENABLED(CONFIG_CMD_SF_TEST) && !strcmp(cmd, "test"))
  		ret = do_spi_flash_test(argc, argv);
  	else
-@@ -636,6 +646,7 @@ U_BOOT_LONGHELP(sf,
+@@ -637,6 +647,7 @@ U_BOOT_LONGHELP(sf,
  #ifdef CONFIG_CMD_SF_TEST
  	"\nsf test offset len		- run a very basic destructive test"
  #endif
diff --git a/package/boot/uboot-mediatek/patches/100-16-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch b/package/boot/uboot-mediatek/patches/100-16-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch
index 0438895fdb..701acddd78 100644
--- a/package/boot/uboot-mediatek/patches/100-16-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch
+++ b/package/boot/uboot-mediatek/patches/100-16-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch
@@ -94,10 +94,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	if (default_str)
 @@ -369,9 +393,9 @@ static struct bootmenu_data *bootmenu_cr
  
- 		/* Add Quit entry if entering U-Boot console is disabled */
+ 		/* Add Quit entry if exiting bootmenu is disabled */
  		if (!IS_ENABLED(CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE))
--			entry->title = strdup("U-Boot console");
-+			entry->title = strdup("0. U-Boot console");
+-			entry->title = strdup("Exit");
++			entry->title = strdup("0. Exit");
  		else
 -			entry->title = strdup("Quit");
 +			entry->title = strdup("0. Quit");
@@ -301,7 +301,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
  		switch (key) {
  		case BKEY_UP:
-@@ -1838,7 +1838,7 @@ char *eficonfig_choice_change_boot_order
+@@ -1839,7 +1839,7 @@ char *eficonfig_choice_change_boot_order
  
  	cli_ch_init(cch);
  	while (1) {
@@ -312,7 +312,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		case BKEY_PLUS:
 --- a/boot/bootflow_menu.c
 +++ b/boot/bootflow_menu.c
-@@ -235,7 +235,7 @@ int bootflow_menu_run(struct bootstd_pri
+@@ -234,7 +234,7 @@ int bootflow_menu_run(struct bootstd_pri
  
  		key = 0;
  		if (ichar) {
diff --git a/package/boot/uboot-mediatek/patches/100-17-common-spl-spl_nand-enable-CONFIG_SYS_NAND_U_BOOT_OF.patch b/package/boot/uboot-mediatek/patches/100-17-common-spl-spl_nand-enable-CONFIG_SYS_NAND_U_BOOT_OF.patch
index f017ce92ad..c65a118b89 100644
--- a/package/boot/uboot-mediatek/patches/100-17-common-spl-spl_nand-enable-CONFIG_SYS_NAND_U_BOOT_OF.patch
+++ b/package/boot/uboot-mediatek/patches/100-17-common-spl-spl_nand-enable-CONFIG_SYS_NAND_U_BOOT_OF.patch
@@ -14,7 +14,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/common/spl/spl_nand.c
 +++ b/common/spl/spl_nand.c
-@@ -17,7 +17,11 @@
+@@ -19,7 +19,11 @@
  
  uint32_t __weak spl_nand_get_uboot_raw_page(void)
  {
diff --git a/package/boot/uboot-mediatek/patches/100-18-board-mt7629-add-support-for-booting-from-SPI-NAND.patch b/package/boot/uboot-mediatek/patches/100-18-board-mt7629-add-support-for-booting-from-SPI-NAND.patch
index ef20c2dfb6..bc5f68cd1e 100644
--- a/package/boot/uboot-mediatek/patches/100-18-board-mt7629-add-support-for-booting-from-SPI-NAND.patch
+++ b/package/boot/uboot-mediatek/patches/100-18-board-mt7629-add-support-for-booting-from-SPI-NAND.patch
@@ -89,7 +89,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		reg = <0x11014000 0x1000>;
 --- a/arch/arm/mach-mediatek/Kconfig
 +++ b/arch/arm/mach-mediatek/Kconfig
-@@ -144,9 +144,11 @@ config SYS_CONFIG_NAME
+@@ -147,9 +147,11 @@ config SYS_CONFIG_NAME
  
  config MTK_BROM_HEADER_INFO
  	string
diff --git a/package/boot/uboot-mediatek/patches/100-19-board-mt7622-use-new-spi-nand-driver.patch b/package/boot/uboot-mediatek/patches/100-19-board-mt7622-use-new-spi-nand-driver.patch
index 6202ddf3b0..547212c740 100644
--- a/package/boot/uboot-mediatek/patches/100-19-board-mt7622-use-new-spi-nand-driver.patch
+++ b/package/boot/uboot-mediatek/patches/100-19-board-mt7622-use-new-spi-nand-driver.patch
@@ -55,19 +55,18 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		reg = <0x11014000 0x1000>;
 --- a/configs/mt7622_rfb_defconfig
 +++ b/configs/mt7622_rfb_defconfig
-@@ -22,6 +22,7 @@ CONFIG_SYS_MAXARGS=8
- CONFIG_SYS_PBSIZE=1049
+@@ -22,6 +22,7 @@ CONFIG_SYS_PROMPT="MT7622> "
+ CONFIG_SYS_MAXARGS=8
  CONFIG_CMD_BOOTMENU=y
  CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
  CONFIG_CMD_PCI=y
  CONFIG_CMD_SF_TEST=y
  CONFIG_CMD_PING=y
-@@ -41,6 +42,10 @@ CONFIG_SYSCON=y
- CONFIG_CLK=y
+@@ -42,6 +43,9 @@ CONFIG_CLK=y
  CONFIG_MMC_HS200_SUPPORT=y
  CONFIG_MMC_MTK=y
-+CONFIG_MTD=y
+ CONFIG_MTD=y
 +CONFIG_DM_MTD=y
 +CONFIG_MTK_SPI_NAND=y
 +CONFIG_MTK_SPI_NAND_MTD=y
diff --git a/package/boot/uboot-mediatek/patches/100-20-board-mt7981-add-reference-board-using-new-spi-nand-.patch b/package/boot/uboot-mediatek/patches/100-20-board-mt7981-add-reference-board-using-new-spi-nand-.patch
index 9dc1a57722..caedea7315 100644
--- a/package/boot/uboot-mediatek/patches/100-20-board-mt7981-add-reference-board-using-new-spi-nand-.patch
+++ b/package/boot/uboot-mediatek/patches/100-20-board-mt7981-add-reference-board-using-new-spi-nand-.patch
@@ -18,7 +18,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1425,6 +1425,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1225,6 +1225,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7623n-bananapi-bpi-r2.dtb \
  	mt7629-rfb.dtb \
  	mt7981-rfb.dtb \
diff --git a/package/boot/uboot-mediatek/patches/100-21-mtd-spi-nor-add-more-flash-ids.patch b/package/boot/uboot-mediatek/patches/100-21-mtd-spi-nor-add-more-flash-ids.patch
index 15e943b1c0..adcaadf654 100644
--- a/package/boot/uboot-mediatek/patches/100-21-mtd-spi-nor-add-more-flash-ids.patch
+++ b/package/boot/uboot-mediatek/patches/100-21-mtd-spi-nor-add-more-flash-ids.patch
@@ -13,7 +13,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/spi/spi-nor-core.c
 +++ b/drivers/mtd/spi/spi-nor-core.c
-@@ -674,6 +674,7 @@ static int set_4byte(struct spi_nor *nor
+@@ -698,6 +698,7 @@ static int set_4byte(struct spi_nor *nor
  	case SNOR_MFR_ISSI:
  	case SNOR_MFR_MACRONIX:
  	case SNOR_MFR_WINBOND:
@@ -23,7 +23,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  
 --- a/drivers/mtd/spi/spi-nor-ids.c
 +++ b/drivers/mtd/spi/spi-nor-ids.c
-@@ -83,7 +83,8 @@ const struct flash_info spi_nor_ids[] =
+@@ -84,7 +84,8 @@ const struct flash_info spi_nor_ids[] =
  	{ INFO("en25q32b",   0x1c3016, 0, 64 * 1024,   64, 0) },
  	{ INFO("en25q64",    0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
  	{ INFO("en25q128b",  0x1c3018, 0, 64 * 1024,  256, 0) },
@@ -33,7 +33,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	{ INFO("en25s64",    0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
  #endif
  #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
-@@ -149,6 +150,11 @@ const struct flash_info spi_nor_ids[] =
+@@ -150,6 +151,11 @@ const struct flash_info spi_nor_ids[] =
  	{INFO("gd55x02g", 0xc8481C, 0, 64 * 1024, 4096,	SECT_4K |
  	SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
  	{
@@ -45,7 +45,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
  			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-@@ -474,6 +480,16 @@ const struct flash_info spi_nor_ids[] =
+@@ -489,6 +495,16 @@ const struct flash_info spi_nor_ids[] =
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
  	},
  	{
@@ -62,7 +62,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  		INFO("w25q128jw", 0xef8018, 0, 64 * 1024, 256,
  			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-@@ -523,6 +539,11 @@ const struct flash_info spi_nor_ids[] =
+@@ -548,6 +564,11 @@ const struct flash_info spi_nor_ids[] =
  			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
  	},
  	{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
diff --git a/package/boot/uboot-mediatek/patches/100-22-mtd-spi-nand-backport-from-upstream-kernel.patch b/package/boot/uboot-mediatek/patches/100-22-mtd-spi-nand-backport-from-upstream-kernel.patch
index 20489d8726..ddfb7577ef 100644
--- a/package/boot/uboot-mediatek/patches/100-22-mtd-spi-nand-backport-from-upstream-kernel.patch
+++ b/package/boot/uboot-mediatek/patches/100-22-mtd-spi-nand-backport-from-upstream-kernel.patch
@@ -22,11 +22,12 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/nand/spi/Makefile
 +++ b/drivers/mtd/nand/spi/Makefile
-@@ -1,4 +1,4 @@
+@@ -1,5 +1,5 @@
  # SPDX-License-Identifier: GPL-2.0
  
--spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
-+spinand-objs := core.o etron.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
+-spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
++spinand-objs := core.o esmt.o etron.o gigadevice.o macronix.o micron.o paragon.o
+ spinand-objs += toshiba.o winbond.o xtx.o
  obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
 --- a/drivers/mtd/nand/spi/core.c
 +++ b/drivers/mtd/nand/spi/core.c
@@ -539,7 +540,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  static int winbond_spinand_init(struct spinand_device *spinand)
 --- a/include/linux/mtd/spinand.h
 +++ b/include/linux/mtd/spinand.h
-@@ -245,6 +245,7 @@ struct spinand_manufacturer {
+@@ -244,6 +244,7 @@ struct spinand_manufacturer {
  };
  
  /* SPI NAND manufacturers */
diff --git a/package/boot/uboot-mediatek/patches/100-23-mmc-mtk-sd-add-support-to-display-verbose-error-log.patch b/package/boot/uboot-mediatek/patches/100-23-mmc-mtk-sd-add-support-to-display-verbose-error-log.patch
index 5c90e24ebf..d33ab0b284 100644
--- a/package/boot/uboot-mediatek/patches/100-23-mmc-mtk-sd-add-support-to-display-verbose-error-log.patch
+++ b/package/boot/uboot-mediatek/patches/100-23-mmc-mtk-sd-add-support-to-display-verbose-error-log.patch
@@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mmc/Kconfig
 +++ b/drivers/mmc/Kconfig
-@@ -815,6 +815,14 @@ config MMC_MTK
+@@ -855,6 +855,14 @@ config MMC_MTK
  	  This is needed if support for any SD/SDIO/MMC devices is required.
  	  If unsure, say N.
  
@@ -32,7 +32,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  config FSL_SDHC_V2_3
 --- a/drivers/mmc/Makefile
 +++ b/drivers/mmc/Makefile
-@@ -82,3 +82,7 @@ obj-$(CONFIG_RENESAS_SDHI)		+= tmio-comm
+@@ -83,3 +83,7 @@ obj-$(CONFIG_RENESAS_SDHI)		+= tmio-comm
  obj-$(CONFIG_MMC_BCM2835)		+= bcm2835_sdhost.o
  obj-$(CONFIG_MMC_MTK)			+= mtk-sd.o
  obj-$(CONFIG_MMC_SDHCI_F_SDH30)		+= f_sdh30.o
diff --git a/package/boot/uboot-mediatek/patches/100-24-cmd-ubi-make-volume-find-create-remove-APIs-public.patch b/package/boot/uboot-mediatek/patches/100-24-cmd-ubi-make-volume-find-create-remove-APIs-public.patch
index ed74eab1e4..3362e0e57d 100644
--- a/package/boot/uboot-mediatek/patches/100-24-cmd-ubi-make-volume-find-create-remove-APIs-public.patch
+++ b/package/boot/uboot-mediatek/patches/100-24-cmd-ubi-make-volume-find-create-remove-APIs-public.patch
@@ -45,7 +45,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  	struct ubi_volume *vol;
 --- a/include/ubi_uboot.h
 +++ b/include/ubi_uboot.h
-@@ -51,6 +51,10 @@ extern void ubi_exit(void);
+@@ -50,6 +50,10 @@ extern void ubi_exit(void);
  extern int ubi_part(char *part_name, const char *vid_header_offset);
  extern int ubi_volume_write(char *volume, void *buf, size_t size);
  extern int ubi_volume_read(char *volume, char *buf, size_t size);
diff --git a/package/boot/uboot-mediatek/patches/103-mt7988-enable-pstore.patch b/package/boot/uboot-mediatek/patches/103-mt7988-enable-pstore.patch
index 747aa2e5da..1f339d4b5b 100644
--- a/package/boot/uboot-mediatek/patches/103-mt7988-enable-pstore.patch
+++ b/package/boot/uboot-mediatek/patches/103-mt7988-enable-pstore.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm/dts/mt7988.dtsi
 +++ b/arch/arm/dts/mt7988.dtsi
-@@ -62,6 +62,30 @@
+@@ -63,6 +63,30 @@
  		#clock-cells = <0>;
  	};
  
diff --git a/package/boot/uboot-mediatek/patches/105-configs-add-usefull-stuff-to-mt7988-rfb.patch b/package/boot/uboot-mediatek/patches/105-configs-add-usefull-stuff-to-mt7988-rfb.patch
index 535af4fa09..6040aaa0c4 100644
--- a/package/boot/uboot-mediatek/patches/105-configs-add-usefull-stuff-to-mt7988-rfb.patch
+++ b/package/boot/uboot-mediatek/patches/105-configs-add-usefull-stuff-to-mt7988-rfb.patch
@@ -1,6 +1,6 @@
 --- a/configs/mt7988_sd_rfb_defconfig
 +++ b/configs/mt7988_sd_rfb_defconfig
-@@ -11,6 +11,24 @@ CONFIG_DEBUG_UART_BASE=0x11000000
+@@ -11,6 +11,23 @@ CONFIG_DEBUG_UART_BASE=0x11000000
  CONFIG_DEBUG_UART_CLOCK=40000000
  CONFIG_SYS_LOAD_ADDR=0x46000000
  CONFIG_DEBUG_UART=y
@@ -19,13 +19,12 @@
 +CONFIG_LED_GPIO=y
 +CONFIG_SPI_BOOT=y
 +CONFIG_SD_BOOT=y
-+CONFIG_NAND_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
  # CONFIG_AUTOBOOT is not set
  CONFIG_DEFAULT_FDT_FILE="mt7988-sd-rfb"
- CONFIG_LOGLEVEL=7
-@@ -22,15 +40,118 @@ CONFIG_SYS_PBSIZE=1049
+ CONFIG_SYS_CBSIZE=512
+@@ -22,15 +39,118 @@ CONFIG_SYS_PROMPT="MT7988> "
  # CONFIG_BOOTM_PLAN9 is not set
  # CONFIG_BOOTM_RTEMS is not set
  # CONFIG_BOOTM_VXWORKS is not set
@@ -145,7 +144,7 @@
  CONFIG_DOS_PARTITION=y
  CONFIG_EFI_PARTITION=y
  CONFIG_PARTITION_TYPE_GUID=y
-@@ -46,6 +167,9 @@ CONFIG_PROT_TCP=y
+@@ -46,6 +166,9 @@ CONFIG_PROT_TCP=y
  CONFIG_REGMAP=y
  CONFIG_SYSCON=y
  CONFIG_CLK=y
@@ -157,7 +156,7 @@
  CONFIG_MTD=y
 --- a/configs/mt7988_rfb_defconfig
 +++ b/configs/mt7988_rfb_defconfig
-@@ -11,7 +11,24 @@ CONFIG_DEBUG_UART_BASE=0x11000000
+@@ -11,7 +11,23 @@ CONFIG_DEBUG_UART_BASE=0x11000000
  CONFIG_DEBUG_UART_CLOCK=40000000
  CONFIG_SYS_LOAD_ADDR=0x46000000
  CONFIG_DEBUG_UART=y
@@ -177,13 +176,12 @@
 +CONFIG_LED_GPIO=y
 +CONFIG_SPI_BOOT=y
 +CONFIG_SD_BOOT=y
-+CONFIG_NAND_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
  CONFIG_DEFAULT_FDT_FILE="mt7988-rfb"
- CONFIG_LOGLEVEL=7
- CONFIG_LOG=y
-@@ -22,15 +39,120 @@ CONFIG_SYS_PBSIZE=1049
+ CONFIG_SYS_CBSIZE=512
+ CONFIG_SYS_PBSIZE=1049
+@@ -22,15 +38,120 @@ CONFIG_SYS_PROMPT="MT7988> "
  # CONFIG_BOOTM_PLAN9 is not set
  # CONFIG_BOOTM_RTEMS is not set
  # CONFIG_BOOTM_VXWORKS is not set
@@ -305,7 +303,7 @@
  CONFIG_DOS_PARTITION=y
  CONFIG_EFI_PARTITION=y
  CONFIG_PARTITION_TYPE_GUID=y
-@@ -46,6 +168,9 @@ CONFIG_PROT_TCP=y
+@@ -46,6 +167,9 @@ CONFIG_PROT_TCP=y
  CONFIG_REGMAP=y
  CONFIG_SYSCON=y
  CONFIG_CLK=y
diff --git a/package/boot/uboot-mediatek/patches/107-configs-add-useful-options-to-mt7981-rfb.patch b/package/boot/uboot-mediatek/patches/107-configs-add-useful-options-to-mt7981-rfb.patch
index bd4c6b55f0..b33ba4bdee 100644
--- a/package/boot/uboot-mediatek/patches/107-configs-add-useful-options-to-mt7981-rfb.patch
+++ b/package/boot/uboot-mediatek/patches/107-configs-add-useful-options-to-mt7981-rfb.patch
@@ -22,9 +22,9 @@
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
  CONFIG_DEFAULT_FDT_FILE="mt7981-emmc-rfb"
- CONFIG_LOGLEVEL=7
- CONFIG_LOG=y
-@@ -24,9 +39,23 @@ CONFIG_SYS_PBSIZE=1049
+ CONFIG_SYS_CBSIZE=512
+ CONFIG_SYS_PBSIZE=1049
+@@ -24,9 +39,23 @@ CONFIG_SYS_PROMPT="MT7981> "
  # CONFIG_BOOTM_PLAN9 is not set
  # CONFIG_BOOTM_RTEMS is not set
  # CONFIG_BOOTM_VXWORKS is not set
@@ -110,9 +110,9 @@
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
  CONFIG_DEFAULT_FDT_FILE="mt7981-rfb"
- CONFIG_LOGLEVEL=7
- CONFIG_LOG=y
-@@ -22,23 +38,74 @@ CONFIG_SYS_PBSIZE=1049
+ CONFIG_SYS_CBSIZE=512
+ CONFIG_SYS_PBSIZE=1049
+@@ -22,23 +38,74 @@ CONFIG_SYS_PROMPT="MT7981> "
  # CONFIG_BOOTM_PLAN9 is not set
  # CONFIG_BOOTM_RTEMS is not set
  # CONFIG_BOOTM_VXWORKS is not set
@@ -213,9 +213,9 @@
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
  CONFIG_DEFAULT_FDT_FILE="mt7981-sd-rfb"
- CONFIG_LOGLEVEL=7
- CONFIG_LOG=y
-@@ -24,9 +39,23 @@ CONFIG_SYS_PBSIZE=1049
+ CONFIG_SYS_CBSIZE=512
+ CONFIG_SYS_PBSIZE=1049
+@@ -24,9 +39,23 @@ CONFIG_SYS_PROMPT="MT7981> "
  # CONFIG_BOOTM_PLAN9 is not set
  # CONFIG_BOOTM_RTEMS is not set
  # CONFIG_BOOTM_VXWORKS is not set
diff --git a/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch b/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch
deleted file mode 100644
index 3bf033f814..0000000000
--- a/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/tools/Makefile
-+++ b/tools/Makefile
-@@ -116,7 +116,6 @@ dumpimage-mkimage-objs := aisimage.o \
- 			imximage.o \
- 			imx8image.o \
- 			imx8mimage.o \
--			kwbimage.o \
- 			generated/lib/md5.o \
- 			lpc32xximage.o \
- 			mxsimage.o \
diff --git a/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch b/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch
index 9a9224963d..5aadeaca0c 100644
--- a/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch
+++ b/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch
@@ -1,6 +1,6 @@
 --- a/Makefile
 +++ b/Makefile
-@@ -1083,7 +1083,7 @@ quiet_cmd_pad_cat = CAT     $@
+@@ -1085,7 +1085,7 @@ quiet_cmd_pad_cat = CAT     $@
  cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; }
  
  quiet_cmd_lzma = LZMA    $@
diff --git a/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch b/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch
index 86a424e8b7..d04a61432e 100644
--- a/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch
+++ b/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch
@@ -1,6 +1,6 @@
 --- a/tools/image-host.c
 +++ b/tools/image-host.c
-@@ -1137,6 +1137,7 @@ static int fit_config_add_verification_d
+@@ -1162,6 +1162,7 @@ static int fit_config_add_verification_d
   * 2) get public key (X509_get_pubkey)
   * 3) provide der format (d2i_RSAPublicKey)
   */
@@ -8,7 +8,7 @@
  static int read_pub_key(const char *keydir, const void *name,
  			unsigned char **pubkey, int *pubkey_len)
  {
-@@ -1190,6 +1191,13 @@ err_cert:
+@@ -1215,6 +1216,13 @@ err_cert:
  	fclose(f);
  	return ret;
  }
diff --git a/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch b/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch
index 28175e02e8..d10391e8c6 100644
--- a/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch
+++ b/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch
@@ -1,6 +1,6 @@
 --- a/cmd/bootm.c
 +++ b/cmd/bootm.c
-@@ -245,6 +245,67 @@ U_BOOT_CMD(
+@@ -262,6 +262,67 @@ U_BOOT_CMD(
  /* iminfo - print header info for a requested image */
  /*******************************************************************/
  #if defined(CONFIG_CMD_IMI)
@@ -120,7 +120,7 @@
  		   int arch, int ph_type, int bootstage_id,
 --- a/include/image.h
 +++ b/include/image.h
-@@ -1049,6 +1049,7 @@ int fit_parse_subimage(const char *spec,
+@@ -1123,6 +1123,7 @@ int fit_parse_subimage(const char *spec,
  		ulong *addr, const char **image_name);
  
  int fit_get_subimage_count(const void *fit, int images_noffset);
diff --git a/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch b/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch
index 7bf87ef7b5..6f5f5539ab 100644
--- a/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch
+++ b/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch
@@ -1,6 +1,6 @@
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
-@@ -622,6 +622,12 @@ config CMD_ENV_EXISTS
+@@ -676,6 +676,12 @@ config CMD_ENV_EXISTS
  	  Check if a variable is defined in the environment for use in
  	  shell scripting.
  
@@ -15,7 +15,7 @@
  	help
 --- a/cmd/nvedit.c
 +++ b/cmd/nvedit.c
-@@ -385,6 +385,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in
+@@ -273,6 +273,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in
  }
  #endif
  
@@ -69,14 +69,14 @@
 +	unmap_sysmem(buf);
 +
 +	/* Continue calling setenv code */
-+	return _do_env_set(flag, 3, local_args, H_INTERACTIVE);
++	return env_do_env_set(flag, 3, local_args, H_INTERACTIVE);
 +}
 +#endif
 +
  #if defined(CONFIG_CMD_ENV_CALLBACK)
  static int print_static_binding(const char *var_name, const char *callback_name,
  				void *priv)
-@@ -1201,6 +1255,9 @@ static struct cmd_tbl cmd_env_sub[] = {
+@@ -1089,6 +1143,9 @@ static struct cmd_tbl cmd_env_sub[] = {
  	U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""),
  #endif
  	U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""),
@@ -86,7 +86,7 @@
  #if defined(CONFIG_CMD_RUN)
  	U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""),
  #endif
-@@ -1284,6 +1341,9 @@ U_BOOT_LONGHELP(env,
+@@ -1172,6 +1229,9 @@ U_BOOT_LONGHELP(env,
  #if defined(CONFIG_CMD_NVEDIT_EFI)
  	"env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n"
  #endif
@@ -96,7 +96,7 @@
  #if defined(CONFIG_CMD_RUN)
  	"env run var [...] - run commands in an environment variable\n"
  #endif
-@@ -1392,6 +1452,17 @@ U_BOOT_CMD(
+@@ -1280,6 +1340,17 @@ U_BOOT_CMD(
  );
  #endif
  
diff --git a/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch b/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch
index f087bec72a..6755f614a9 100644
--- a/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch
+++ b/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch
@@ -16,7 +16,7 @@ Reviewed-by: Tom Rini <trini@konsulko.com>
 
 --- a/boot/image-fdt.c
 +++ b/boot/image-fdt.c
-@@ -637,6 +637,12 @@ int image_setup_libfdt(struct bootm_head
+@@ -618,6 +618,12 @@ int image_setup_libfdt(struct bootm_head
  					images->fit_uname_cfg,
  					strlen(images->fit_uname_cfg) + 1, 1);
  
diff --git a/package/boot/uboot-mediatek/patches/301-mt7622-generic-reset-button-ignore-env.patch b/package/boot/uboot-mediatek/patches/301-mt7622-generic-reset-button-ignore-env.patch
index 65990156c2..47c92a85bd 100644
--- a/package/boot/uboot-mediatek/patches/301-mt7622-generic-reset-button-ignore-env.patch
+++ b/package/boot/uboot-mediatek/patches/301-mt7622-generic-reset-button-ignore-env.patch
@@ -43,7 +43,7 @@
  }
 --- a/arch/arm/mach-mediatek/Kconfig
 +++ b/arch/arm/mach-mediatek/Kconfig
-@@ -151,4 +151,11 @@ config MTK_BROM_HEADER_INFO
+@@ -154,4 +154,11 @@ config MTK_BROM_HEADER_INFO
  
  source "board/mediatek/mt7629/Kconfig"
  
diff --git a/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch b/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch
index ab3424e6b5..c7d82012d8 100644
--- a/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch
+++ b/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch
@@ -1,6 +1,6 @@
 --- a/configs/mt7623n_bpir2_defconfig
 +++ b/configs/mt7623n_bpir2_defconfig
-@@ -7,34 +7,106 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
+@@ -7,52 +7,98 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
  CONFIG_NR_DRAM_BANKS=1
  CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
  CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
@@ -8,134 +8,106 @@
 +CONFIG_ENV_SIZE=0x10000
  CONFIG_ENV_OFFSET=0x100000
  CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
++CONFIG_OF_LIBFDT_OVERLAY=y
  CONFIG_TARGET_MT7623=y
++CONFIG_RESET_BUTTON_LABEL="factory"
  CONFIG_SYS_LOAD_ADDR=0x84000000
++CONFIG_PCI=y
++CONFIG_AHCI=y
  CONFIG_FIT=y
  CONFIG_FIT_VERBOSE=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
-+CONFIG_LOGLEVEL=7
-+CONFIG_LOG=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_AUTOBOOT_KEYED=y
-+CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_BOARD_LATE_INIT=y
 +# CONFIG_BOOTSTD is not set
-+# CONFIG_BOOT_DEFAULTS is not set
+ CONFIG_SYS_BOOTM_LEN=0x4000000
  CONFIG_DISTRO_DEFAULTS=y
  CONFIG_BOOTDELAY=3
-+CONFIG_BOOTP_SEND_HOSTNAME=y
++CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AUTOBOOT_MENU_SHOW=y
++CONFIG_OF_SYSTEM_SETUP=y
  CONFIG_DEFAULT_FDT_FILE="mt7623n-bananapi-bpi-r2.dtb"
+ CONFIG_SYS_PBSIZE=1049
++CONFIG_LOGLEVEL=7
  CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r2_env"
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_RESET_BUTTON_LABEL="factory"
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_CMD_ENV_FLAGS=y
++CONFIG_LOG=y
  # CONFIG_DISPLAY_BOARDINFO is not set
 -CONFIG_SYS_PROMPT="U-Boot> "
-+CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_BOARD_LATE_INIT=y
 +CONFIG_SYS_PROMPT="MT7623> "
  CONFIG_SYS_MAXARGS=8
- CONFIG_SYS_PBSIZE=1049
- CONFIG_SYS_BOOTM_LEN=0x4000000
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
  CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
-+CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
  # CONFIG_CMD_ELF is not set
  # CONFIG_CMD_XIMG is not set
++CONFIG_CMD_ASKENV=y
++CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
  CONFIG_CMD_GPIO=y
 -CONFIG_CMD_GPT=y
-+# CONFIG_CMD_GPT is not set
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MBR=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_READ=y
 -# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_SF_TEST=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_PXE=y
-+CONFIG_CMD_TFTPBOOT=y
++CONFIG_CMD_SATA=y
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
 +CONFIG_CMD_RARP=y
-+CONFIG_CMD_SATA=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
++CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_CACHE=y
 +CONFIG_CMD_UUID=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PCI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_FS_UUID=y
  CONFIG_ENV_OVERWRITE=y
  CONFIG_ENV_IS_IN_MMC=y
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r2_env"
++CONFIG_VERSION_VARIABLE=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
  CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
  CONFIG_USE_IPADDR=y
  CONFIG_IPADDR="192.168.1.1"
  CONFIG_USE_SERVERIP=y
-@@ -46,6 +118,12 @@ CONFIG_CLK=y
+ CONFIG_SERVERIP="192.168.1.2"
+ CONFIG_REGMAP=y
+ CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
+ CONFIG_CLK=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
+ # CONFIG_MMC_QUIRKS is not set
  CONFIG_SUPPORT_EMMC_BOOT=y
  CONFIG_MMC_HS400_SUPPORT=y
  CONFIG_MMC_MTK=y
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PHY=y
-+CONFIG_PINCONF=y
  CONFIG_PHY_FIXED=y
  CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
  CONFIG_PINCTRL=y
-@@ -55,10 +133,13 @@ CONFIG_POWER_DOMAIN=y
+ CONFIG_PINCONF=y
+ CONFIG_PINCTRL_MT7623=y
+ CONFIG_POWER_DOMAIN=y
  CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_SCSI=y
  CONFIG_DM_SERIAL=y
  CONFIG_MTK_SERIAL=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
  CONFIG_SYSRESET=y
- CONFIG_SYSRESET_WATCHDOG=y
+@@ -60,5 +106,6 @@ CONFIG_SYSRESET_WATCHDOG=y
  CONFIG_TIMER=y
  CONFIG_MTK_TIMER=y
-+CONFIG_VERSION_VARIABLE=y
  CONFIG_WDT_MTK=y
++CONFIG_RANDOM_UUID=y
  CONFIG_LZMA=y
  # CONFIG_EFI_GRUB_ARM32_WORKAROUND is not set
 --- /dev/null
diff --git a/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch b/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch
index 58c62dc3ef..1fb0ae9c9e 100644
--- a/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch
+++ b/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch
@@ -1,6 +1,6 @@
 --- a/configs/mt7623a_unielec_u7623_02_defconfig
 +++ b/configs/mt7623a_unielec_u7623_02_defconfig
-@@ -7,33 +7,109 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
+@@ -7,51 +7,97 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
  CONFIG_NR_DRAM_BANKS=1
  CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
  CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
@@ -8,136 +8,105 @@
 +CONFIG_ENV_SIZE=0x10000
  CONFIG_ENV_OFFSET=0x100000
  CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc"
++CONFIG_OF_LIBFDT_OVERLAY=y
  CONFIG_TARGET_MT7623=y
++CONFIG_RESET_BUTTON_LABEL="factory"
  CONFIG_SYS_LOAD_ADDR=0x84000000
++CONFIG_PCI=y
++CONFIG_AHCI=y
  CONFIG_FIT=y
  CONFIG_FIT_VERBOSE=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
-+CONFIG_LOGLEVEL=7
-+CONFIG_LOG=y
-+CONFIG_AUTOBOOT_KEYED=y
-+CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_BOARD_LATE_INIT=y
 +# CONFIG_BOOTSTD is not set
-+# CONFIG_BOOT_DEFAULTS is not set
+ CONFIG_SYS_BOOTM_LEN=0x4000000
  CONFIG_DISTRO_DEFAULTS=y
  CONFIG_BOOTDELAY=3
-+CONFIG_BOOTP_SEND_HOSTNAME=y
++CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AUTOBOOT_MENU_SHOW=y
  CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
+ CONFIG_SYS_PBSIZE=1049
++CONFIG_LOGLEVEL=7
  CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-+CONFIG_DEFAULT_ENV_FILE="unielec_u7623-02_env"
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_RESET_BUTTON_LABEL="factory"
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_CMD_ENV_FLAGS=y
++CONFIG_LOG=y
  # CONFIG_DISPLAY_BOARDINFO is not set
 -CONFIG_SYS_PROMPT="U-Boot> "
-+CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_BOARD_LATE_INIT=y
 +CONFIG_SYS_PROMPT="MT7623> "
  CONFIG_SYS_MAXARGS=8
- CONFIG_SYS_PBSIZE=1049
- CONFIG_SYS_BOOTM_LEN=0x4000000
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
  CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BOOTZ=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
-+CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
  # CONFIG_CMD_ELF is not set
  # CONFIG_CMD_XIMG is not set
++CONFIG_CMD_ASKENV=y
++CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
  CONFIG_CMD_GPIO=y
 -CONFIG_CMD_GPT=y
-+# CONFIG_CMD_GPT is not set
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MBR=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_READ=y
 -# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_SF_TEST=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_PXE=y
-+CONFIG_CMD_TFTPBOOT=y
++CONFIG_CMD_SATA=y
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
 +CONFIG_CMD_RARP=y
-+CONFIG_CMD_SATA=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
++CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_CACHE=y
 +CONFIG_CMD_UUID=y
-+CONFIG_CMD_READ=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PCI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_ENV_OVERWRITE=y
  CONFIG_ENV_IS_IN_MMC=y
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_SYS_MMC_ENV_DEV=0
-+CONFIG_ENV_OVERWRITE=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="unielec_u7623-02_env"
++CONFIG_VERSION_VARIABLE=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
  CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
  CONFIG_USE_IPADDR=y
  CONFIG_IPADDR="192.168.1.1"
  CONFIG_USE_SERVERIP=y
-@@ -45,6 +121,11 @@ CONFIG_CLK=y
+ CONFIG_SERVERIP="192.168.1.2"
+ CONFIG_REGMAP=y
+ CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
+ CONFIG_CLK=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
+ # CONFIG_MMC_QUIRKS is not set
  CONFIG_SUPPORT_EMMC_BOOT=y
  CONFIG_MMC_HS400_SUPPORT=y
  CONFIG_MMC_MTK=y
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PHY=y
  CONFIG_PHY_FIXED=y
  CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
  CONFIG_PINCTRL=y
-@@ -54,9 +135,12 @@ CONFIG_POWER_DOMAIN=y
+ CONFIG_PINCONF=y
+ CONFIG_PINCTRL_MT7623=y
+ CONFIG_POWER_DOMAIN=y
  CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_SCSI=y
  CONFIG_DM_SERIAL=y
  CONFIG_MTK_SERIAL=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
  CONFIG_SYSRESET=y
- CONFIG_SYSRESET_WATCHDOG=y
+@@ -59,4 +105,5 @@ CONFIG_SYSRESET_WATCHDOG=y
  CONFIG_TIMER=y
  CONFIG_MTK_TIMER=y
-+CONFIG_VERSION_VARIABLE=y
  CONFIG_WDT_MTK=y
++CONFIG_RANDOM_UUID=y
  CONFIG_LZMA=y
 --- /dev/null
 +++ b/unielec_u7623-02_env
diff --git a/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch b/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch
index 6ee8729674..25ebd5b582 100644
--- a/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch
+++ b/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch
@@ -1,170 +1,136 @@
 --- /dev/null
 +++ b/configs/mt7622_bananapi_bpi-r64-sdmmc_defconfig
-@@ -0,0 +1,164 @@
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7622=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_DEBUG_UART_BASE=0x11002000
-+CONFIG_DEBUG_UART_CLOCK=25000000
++CONFIG_ENV_SIZE=0x80000
++CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-bananapi-bpi-r64"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
++CONFIG_DEBUG_UART_BASE=0x11002000
++CONFIG_DEBUG_UART_CLOCK=25000000
++CONFIG_ENV_OFFSET_REDUND=0x480000
++CONFIG_SYS_LOAD_ADDR=0x40080000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r64-sdmmc_env"
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7622-bananapi-bpi-r64.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7622-bananapi-bpi-r64.dtb"
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7622> "
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_UBI=y
-+CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
++CONFIG_CMD_CACHE=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_UBI=y
++CONFIG_CMD_UBI_RENAME=y
++CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_MMC_ENV_DEV=1
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x480000
-+CONFIG_ENV_SIZE=0x80000
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r64-sdmmc_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTK_SPI_NAND=y
++CONFIG_MTK_SPI_NAND_MTD=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/bananapi_bpi-r64-sdmmc_env
 @@ -0,0 +1,81 @@
@@ -251,159 +217,126 @@
 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
 --- /dev/null
 +++ b/configs/mt7622_bananapi_bpi-r64-emmc_defconfig
-@@ -0,0 +1,152 @@
+@@ -0,0 +1,119 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7622=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_DEBUG_UART_BASE=0x11002000
-+CONFIG_DEBUG_UART_CLOCK=25000000
++CONFIG_ENV_SIZE=0x80000
++CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-bananapi-bpi-r64"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
++CONFIG_DEBUG_UART_BASE=0x11002000
++CONFIG_DEBUG_UART_CLOCK=25000000
++CONFIG_ENV_OFFSET_REDUND=0x480000
++CONFIG_SYS_LOAD_ADDR=0x40080000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r64-emmc_env"
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mt7622-bananapi-bpi-r64"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mt7622-bananapi-bpi-r64"
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7622> "
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
++CONFIG_CMD_CACHE=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_MMC_ENV_DEV=0
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x480000
-+CONFIG_ENV_SIZE=0x80000
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r64-emmc_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
++CONFIG_PHY_FIXED=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_DM_PCI=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=0
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
++CONFIG_LZO=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/bananapi_bpi-r64-emmc_env
 @@ -0,0 +1,56 @@
@@ -465,152 +398,115 @@
 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
 --- /dev/null
 +++ b/configs/mt7622_bananapi_bpi-r64-snand_defconfig
-@@ -0,0 +1,145 @@
+@@ -0,0 +1,108 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_DEBUG_UART_BASE=0x11002000
-+CONFIG_DEBUG_UART_CLOCK=25000000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-bananapi-bpi-r64"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
++CONFIG_DEBUG_UART_BASE=0x11002000
++CONFIG_DEBUG_UART_CLOCK=25000000
++CONFIG_SYS_LOAD_ADDR=0x40080000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r64-snand_env"
++CONFIG_FIT=y
 +CONFIG_DISTRO_DEFAULTS=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7622-bananapi-bpi-r64.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7622-bananapi-bpi-r64.dtb"
++CONFIG_BOARD_LATE_INIT=y
 +CONFIG_SYS_PROMPT="MT7622> "
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_EFIDEBUG=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_PXE=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
++CONFIG_CMD_USB=y
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_UBI=y
-+CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
++CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_USB=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_EFIDEBUG=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_UBI=y
++CONFIG_CMD_UBI_RENAME=y
 +CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r64-snand_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.3"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_MTK=y
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTK_SPI_NAND=y
++CONFIG_MTK_SPI_NAND_MTD=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_MTK=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.3"
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/bananapi_bpi-r64-snand_env
 @@ -0,0 +1,56 @@
@@ -663,8 +559,8 @@
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
 +ubi_write_fip=run ubi_remove_rootfs ; ubi check fip && ubi remove fip ; ubi create fip 0x200000 static ; ubi write $loadaddr fip 0x200000
-+ubi_write_production=ubi check fit && env exists replacevol && ubi remove fit ; if ubi check fit ; then else run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize ; fi
-+ubi_write_recovery=ubi check recovery && env exists replacevol && ubi remove recovery ; if ubi check recovery ; then else run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize ; fi
++ubi_write_production=ubi check fit && env exists replacevol && ubi remove fit ; if ubi check fit ; then else run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize ; fi
++ubi_write_recovery=ubi check recovery && env exists replacevol && ubi remove recovery ; if ubi check recovery ; then else run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize ; fi
 +_create_env=ubi create ubootenv 0x1f000 dynamic ; ubi create ubootenv2 0x1f000 dynamic
 +_init_env=setenv _init_env ; if ubi check ubootenv && ubi check ubootenv2 ; then else run _create_env ; fi ; setenv _create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
diff --git a/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch b/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch
index ca8fb32bea..a4cb75b277 100644
--- a/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch
+++ b/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch
@@ -1,146 +1,118 @@
 --- /dev/null
 +++ b/configs/mt7622_linksys_e8450_defconfig
-@@ -0,0 +1,140 @@
+@@ -0,0 +1,112 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7622=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BOOTP_SEND_HOSTNAME=y
-+CONFIG_DEFAULT_ENV_FILE="linksys_e8450_env"
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_DEFAULT_DEVICE_TREE="mt7622-linksys-e8450-ubi"
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=25000000
-+CONFIG_DEFAULT_DEVICE_TREE="mt7622-linksys-e8450-ubi"
++CONFIG_SYS_LOAD_ADDR=0x40080000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mt7622-linksys-e8450"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mt7622-linksys-e8450"
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7622> "
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_MTDPARTS=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_UBI=y
-+CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_USB=y
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_CMD_UBI=y
++CONFIG_CMD_UBI_RENAME=y
 +CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="linksys_e8450_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_MTD=y
 +CONFIG_DM_MTD=y
-+CONFIG_DM_GPIO=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
++CONFIG_MTK_SPI_NAND=y
++CONFIG_MTK_SPI_NAND_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/arch/arm/dts/mt7622-linksys-e8450-ubi.dts
 @@ -0,0 +1,214 @@
@@ -360,7 +332,7 @@
 +};
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1422,6 +1422,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1222,6 +1222,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7622-rfb.dtb \
  	mt7623a-unielec-u7623-02-emmc.dtb \
  	mt7622-bananapi-bpi-r64.dtb \
diff --git a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch
index bbd05fe41f..3a743384af 100644
--- a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch
+++ b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch
@@ -1,452 +1,350 @@
 --- /dev/null
 +++ b/configs/mt7622_ubnt_unifi-6-lr-v1_defconfig
-@@ -0,0 +1,147 @@
+@@ -0,0 +1,113 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7622=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
-+CONFIG_ENV_IS_IN_MTD=y
-+CONFIG_ENV_MTD_NAME="nor0"
-+CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_ENV_SIZE=0x4000
 +CONFIG_ENV_OFFSET=0xc0000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_BOARD_LATE_INIT=y
++CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
-+CONFIG_BOOTP_SEND_HOSTNAME=y
-+CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=25000000
-+CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
++CONFIG_SYS_LOAD_ADDR=0x40080000
 +CONFIG_DEBUG_UART=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_FIT=y
++# CONFIG_LEGACY_IMAGE_FORMAT is not set
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
++CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7622> "
-+# CONFIG_LEGACY_IMAGE_FORMAT is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
 +# CONFIG_BOOTM_VXWORKS is not set
-+# CONFIG_EFI is not set
-+# CONFIG_EFI_LOADER is not set
 +CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_BOOTEFI is not set
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
 +# CONFIG_CMD_ELF is not set
-+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++# CONFIG_CMD_UNLZ4 is not set
 +CONFIG_CMD_GPIO=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_MTDPARTS=y
-+# CONFIG_CMD_PCI is not set
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
-+# CONFIG_CMD_UNLZ4 is not set
-+CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_MDIO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+# CONFIG_DM_MMC is not set
-+CONFIG_DM_SERIAL=y
-+CONFIG_DM_SPI=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_HUSH_PARSER=y
-+# CONFIG_PARTITION_UUIDS is not set
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
++CONFIG_ENV_IS_IN_MTD=y
++CONFIG_ENV_MTD_NAME="nor0"
++CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+# CONFIG_LED is not set
-+# CONFIG_LZ4 is not set
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
-+CONFIG_PHY=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_PHYLIB_10G=y
-+CONFIG_PHY_AQUANTIA=y
++CONFIG_GPIO_HOG=y
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_EON=y
++CONFIG_SPI_FLASH_GIGADEVICE=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_SST=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_SPI_FLASH_XMC=y
++CONFIG_SPI_FLASH_MTD=y
 +CONFIG_PHY_ADDR_ENABLE=y
 +CONFIG_PHY_ADDR=8
++CONFIG_PHY_AQUANTIA=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_MDIO=y
++CONFIG_DM_ETH_PHY=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_MTD=y
-+# CONFIG_MMC is not set
++CONFIG_PHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
++CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
-+CONFIG_MTK_SNFI_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SNOR=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_HEXDUMP=y
++CONFIG_MTK_SNFI_SPI=y
 +CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_SPI_FLASH=y
-+CONFIG_SPI_FLASH_BAR=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_UNLOCK_ALL=y
-+CONFIG_SPI_FLASH_EON=y
-+CONFIG_SPI_FLASH_GIGADEVICE=y
-+CONFIG_SPI_FLASH_MACRONIX=y
-+CONFIG_SPI_FLASH_SPANSION=y
-+CONFIG_SPI_FLASH_STMICRO=y
-+CONFIG_SPI_FLASH_SST=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+CONFIG_SPI_FLASH_XMC=y
-+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/configs/mt7622_ubnt_unifi-6-lr-v2_defconfig
-@@ -0,0 +1,147 @@
+@@ -0,0 +1,113 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7622=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
-+CONFIG_ENV_IS_IN_MTD=y
-+CONFIG_ENV_MTD_NAME="nor0"
-+CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_ENV_SIZE=0x4000
 +CONFIG_ENV_OFFSET=0xc0000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_BOARD_LATE_INIT=y
++CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
-+CONFIG_BOOTP_SEND_HOSTNAME=y
-+CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr-v2_env"
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=25000000
-+CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
++CONFIG_SYS_LOAD_ADDR=0x40080000
 +CONFIG_DEBUG_UART=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_FIT=y
++# CONFIG_LEGACY_IMAGE_FORMAT is not set
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
++CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7622> "
-+# CONFIG_LEGACY_IMAGE_FORMAT is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
 +# CONFIG_BOOTM_VXWORKS is not set
-+# CONFIG_EFI is not set
-+# CONFIG_EFI_LOADER is not set
 +CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_BOOTEFI is not set
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
 +# CONFIG_CMD_ELF is not set
-+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++# CONFIG_CMD_UNLZ4 is not set
 +CONFIG_CMD_GPIO=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_MTDPARTS=y
-+# CONFIG_CMD_PCI is not set
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
-+# CONFIG_CMD_UNLZ4 is not set
-+CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_MDIO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+# CONFIG_DM_MMC is not set
-+CONFIG_DM_SERIAL=y
-+CONFIG_DM_SPI=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_HUSH_PARSER=y
-+# CONFIG_PARTITION_UUIDS is not set
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
++CONFIG_ENV_IS_IN_MTD=y
++CONFIG_ENV_MTD_NAME="nor0"
++CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+# CONFIG_LED is not set
-+# CONFIG_LZ4 is not set
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr-v2_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
-+CONFIG_PHY=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_PHYLIB_10G=y
-+CONFIG_PHY_AQUANTIA=y
++CONFIG_GPIO_HOG=y
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_EON=y
++CONFIG_SPI_FLASH_GIGADEVICE=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_SST=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_SPI_FLASH_XMC=y
++CONFIG_SPI_FLASH_MTD=y
 +CONFIG_PHY_ADDR_ENABLE=y
 +CONFIG_PHY_ADDR=8
++CONFIG_PHY_AQUANTIA=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_MDIO=y
++CONFIG_DM_ETH_PHY=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_MTD=y
-+# CONFIG_MMC is not set
++CONFIG_PHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
++CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
-+CONFIG_MTK_SNFI_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SNOR=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_HEXDUMP=y
++CONFIG_MTK_SNFI_SPI=y
 +CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_SPI_FLASH=y
-+CONFIG_SPI_FLASH_BAR=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_UNLOCK_ALL=y
-+CONFIG_SPI_FLASH_EON=y
-+CONFIG_SPI_FLASH_GIGADEVICE=y
-+CONFIG_SPI_FLASH_MACRONIX=y
-+CONFIG_SPI_FLASH_SPANSION=y
-+CONFIG_SPI_FLASH_STMICRO=y
-+CONFIG_SPI_FLASH_SST=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+CONFIG_SPI_FLASH_XMC=y
-+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/configs/mt7622_ubnt_unifi-6-lr-v3_defconfig
-@@ -0,0 +1,146 @@
+@@ -0,0 +1,112 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7622=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_LOAD_ADDR=0x40080000
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
-+CONFIG_ENV_IS_IN_MTD=y
-+CONFIG_ENV_MTD_NAME="nor0"
-+CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_ENV_SIZE=0x4000
 +CONFIG_ENV_OFFSET=0xc0000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_BOARD_LATE_INIT=y
++CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr-v3"
 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
-+CONFIG_BOOTP_SEND_HOSTNAME=y
-+CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=25000000
-+CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr-v3"
++CONFIG_SYS_LOAD_ADDR=0x40080000
 +CONFIG_DEBUG_UART=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_FIT=y
++# CONFIG_LEGACY_IMAGE_FORMAT is not set
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
++CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr-v3"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr-v3"
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7622> "
-+# CONFIG_LEGACY_IMAGE_FORMAT is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
 +# CONFIG_BOOTM_VXWORKS is not set
-+# CONFIG_EFI is not set
-+# CONFIG_EFI_LOADER is not set
 +CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_BOOTEFI is not set
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CDP=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
 +# CONFIG_CMD_ELF is not set
-+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++# CONFIG_CMD_UNLZ4 is not set
 +CONFIG_CMD_GPIO=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_MTDPARTS=y
-+# CONFIG_CMD_PCI is not set
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
-+# CONFIG_CMD_UNLZ4 is not set
-+CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_MDIO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+# CONFIG_DM_MMC is not set
-+CONFIG_DM_SERIAL=y
-+CONFIG_DM_SPI=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_HUSH_PARSER=y
-+# CONFIG_PARTITION_UUIDS is not set
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_MTDPARTS=y
++CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
++CONFIG_ENV_IS_IN_MTD=y
++CONFIG_ENV_MTD_NAME="nor0"
++CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+# CONFIG_LED is not set
-+# CONFIG_LZ4 is not set
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
-+CONFIG_PHY=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_PHY_REALTEK=y
++CONFIG_GPIO_HOG=y
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_EON=y
++CONFIG_SPI_FLASH_GIGADEVICE=y
++CONFIG_SPI_FLASH_MACRONIX=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_SST=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_SPI_FLASH_XMC=y
++CONFIG_SPI_FLASH_MTD=y
 +CONFIG_PHY_ADDR_ENABLE=y
-+CONFIG_PHY_ADDR=0
++CONFIG_PHY_REALTEK=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_MDIO=y
++CONFIG_DM_ETH_PHY=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_MTD=y
-+# CONFIG_MMC is not set
++CONFIG_PHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
++CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
-+CONFIG_MTK_SNFI_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SNOR=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_HEXDUMP=y
++CONFIG_MTK_SNFI_SPI=y
 +CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_SPI_FLASH=y
-+CONFIG_SPI_FLASH_BAR=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_UNLOCK_ALL=y
-+CONFIG_SPI_FLASH_EON=y
-+CONFIG_SPI_FLASH_GIGADEVICE=y
-+CONFIG_SPI_FLASH_MACRONIX=y
-+CONFIG_SPI_FLASH_SPANSION=y
-+CONFIG_SPI_FLASH_STMICRO=y
-+CONFIG_SPI_FLASH_SST=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+CONFIG_SPI_FLASH_XMC=y
-+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
++CONFIG_HEXDUMP=y
 --- /dev/null
 +++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr.dts
 @@ -0,0 +1,193 @@
@@ -841,7 +739,7 @@
 +};
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1423,6 +1423,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1223,6 +1223,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7623a-unielec-u7623-02-emmc.dtb \
  	mt7622-bananapi-bpi-r64.dtb \
  	mt7622-linksys-e8450-ubi.dtb \
@@ -1040,7 +938,7 @@
  #ifdef CONFIG_MMC
  static int initr_mmc(void)
  {
-@@ -692,6 +707,9 @@ static init_fnc_t init_sequence_r[] = {
+@@ -681,6 +696,9 @@ static init_fnc_t init_sequence_r[] = {
  #ifdef CONFIG_NMBM_MTD
  	initr_nmbm,
  #endif
diff --git a/package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch b/package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch
index 4ee87ce3d2..046c0a6bb9 100644
--- a/package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch
+++ b/package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch
@@ -125,31 +125,28 @@ Subject: [PATCH] add support for RAVPower RP-WD009
 +}
 --- /dev/null
 +++ b/configs/ravpower-rp-wd009-ram_defconfig
-@@ -0,0 +1,71 @@
+@@ -0,0 +1,61 @@
 +CONFIG_MIPS=y
-+CONFIG_SYS_LOAD_ADDR=0x80010000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_MEMTEST_START=0x80100000
-+CONFIG_SYS_MEMTEST_END=0x80400000
++CONFIG_DEFAULT_DEVICE_TREE="ravpower-rp-wd009"
++CONFIG_SYS_LOAD_ADDR=0x80010000
 +CONFIG_ARCH_MTMIPS=y
 +CONFIG_SOC_MT7628=y
++CONFIG_BOARD_RAVPOWER_RP_WD009=y
++CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 +CONFIG_MIPS_BOOT_FDT=y
-+CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_FIT=y
 +CONFIG_OF_STDOUT_VIA_ALIAS=y
 +CONFIG_USE_BOOTCOMMAND=y
 +CONFIG_BOOTCOMMAND="sf probe && mtd read firmware 82000000 && bootm 82000000"
 +CONFIG_USE_PREBOOT=y
++CONFIG_SYS_CBSIZE=512
 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_BOARD_RAVPOWER_RP_WD009=y
-+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
-+CONFIG_SYS_BOOTPARAMS_LEN=0x20000
 +CONFIG_HUSH_PARSER=y
 +CONFIG_CMD_LICENSE=y
 +# CONFIG_CMD_ELF is not set
 +# CONFIG_CMD_XIMG is not set
 +CONFIG_CMD_MEMINFO=y
-+# CONFIG_CMD_FLASH is not set
 +CONFIG_CMD_GPIO=y
 +# CONFIG_CMD_LOADS is not set
 +CONFIG_CMD_MTD=y
@@ -161,18 +158,18 @@ Subject: [PATCH] add support for RAVPower RP-WD009
 +CONFIG_CMD_TIME=y
 +CONFIG_CMD_UUID=y
 +CONFIG_CMD_MTDPARTS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
 +CONFIG_MTDPARTS_DEFAULT="spi0.0:192k(factory-uboot),64k(config),64k(factory),1536k(loader),64k(params),64k(user_backup),64k(user),14272k(firmware),64k(mode)"
-+CONFIG_DEFAULT_DEVICE_TREE="ravpower-rp-wd009"
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +# CONFIG_DM_DEVICE_REMOVE is not set
-+CONFIG_HAVE_BLOCK_DEVICE=y
 +CONFIG_LED=y
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
-+CONFIG_MTD=y
 +CONFIG_DM_MTD=y
 +CONFIG_SPI_FLASH_GIGADEVICE=y
 +CONFIG_SPI_FLASH_MACRONIX=y
@@ -181,22 +178,15 @@ Subject: [PATCH] add support for RAVPower RP-WD009
 +CONFIG_SPI_FLASH_WINBOND=y
 +CONFIG_SPI_FLASH_XMC=y
 +CONFIG_SPI_FLASH_MTD=y
-+CONFIG_MTD_UBI_BEB_LIMIT=22
 +CONFIG_MT7628_ETH=y
 +CONFIG_PHY=y
++CONFIG_BAUDRATE=57600
 +CONFIG_SPI=y
 +CONFIG_MT7621_SPI=y
 +CONFIG_SYSRESET_SYSCON=y
 +CONFIG_WDT=y
 +CONFIG_WDT_MT7621=y
 +CONFIG_LZMA=y
-+CONFIG_BAUDRATE=57600
-+CONFIG_SYS_MAXARGS=64
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/include/configs/ravpower-rp-wd009.h
 @@ -0,0 +1,17 @@
@@ -234,7 +224,7 @@ Subject: [PATCH] add support for RAVPower RP-WD009
  config BOARD_VOCORE2
  	bool "VoCore2"
  	select SPL_SERIAL
-@@ -53,6 +61,7 @@ config SYS_CONFIG_NAME
+@@ -52,6 +60,7 @@ config SYS_CONFIG_NAME
  	default "mt7628" if BOARD_MT7628_RFB
  
  source "board/gardena/smart-gateway-mt7688/Kconfig"
diff --git a/package/boot/uboot-mediatek/patches/421-zbtlink_zbt-wg3526-16m.patch b/package/boot/uboot-mediatek/patches/421-zbtlink_zbt-wg3526-16m.patch
index b9b241a51d..547849d369 100644
--- a/package/boot/uboot-mediatek/patches/421-zbtlink_zbt-wg3526-16m.patch
+++ b/package/boot/uboot-mediatek/patches/421-zbtlink_zbt-wg3526-16m.patch
@@ -1,126 +1,88 @@
 --- /dev/null
 +++ b/configs/mt7621_zbtlink_zbt-wg3526-16m_defconfig
-@@ -0,0 +1,138 @@
+@@ -0,0 +1,97 @@
 +CONFIG_MIPS=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_SYS_MALLOC_LEN=0x100000
 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_ENV_SIZE=0x1000
-+CONFIG_ENV_IS_IN_MTD=y
-+CONFIG_ENV_MTD_NAME="nor0"
-+CONFIG_ENV_SIZE_REDUND=0x10000
++CONFIG_SF_DEFAULT_SPEED=20000000
 +CONFIG_ENV_SIZE=0x10000
 +CONFIG_ENV_OFFSET=0x30000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_RESET_BUTTON_SETTLE_DELAY=400
-+CONFIG_BOOTP_SEND_HOSTNAME=y
-+# CONFIG_BOOTSTD is not set
-+CONFIG_DEFAULT_ENV_FILE="zbtlink_zbt-wg3526-16m_env"
 +CONFIG_DEFAULT_DEVICE_TREE="zbtlink,zbt-wg3526"
-+CONFIG_SPL_BSS_MAX_SIZE=0x80000
-+CONFIG_SPL_BSS_START_ADDR=0x80140000
 +CONFIG_SPL_SERIAL=y
++CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
++CONFIG_SPL_BSS_START_ADDR=0x80140000
++CONFIG_SPL_BSS_MAX_SIZE=0x80000
 +CONFIG_SPL=y
 +CONFIG_DEBUG_UART_BASE=0xbe000c00
 +CONFIG_DEBUG_UART_CLOCK=50000000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_SYS_LOAD_ADDR=0x83000000
-+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 +CONFIG_ARCH_MTMIPS=y
 +CONFIG_SOC_MT7621=y
++CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 +# CONFIG_MIPS_CACHE_SETUP is not set
 +# CONFIG_MIPS_CACHE_DISABLE is not set
 +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
 +CONFIG_MIPS_BOOT_FDT=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_FIT=y
++# CONFIG_BOOTSTD is not set
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+# CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set
-+CONFIG_HUSH_PARSER=y
-+CONFIG_LOGLEVEL=6
-+# CONFIG_LOG is not set
-+# CONFIG_SYS_LONGHELP is not set
 +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
++CONFIG_LOGLEVEL=6
 +CONFIG_SYS_CONSOLE_INFO_QUIET=y
 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 +CONFIG_SPL_NOR_SUPPORT=y
 +CONFIG_TPL=y
 +# CONFIG_TPL_FRAMEWORK is not set
-+CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_HUSH_PARSER=y
++# CONFIG_SYS_LONGHELP is not set
++# CONFIG_SYS_XTRACE is not set
++# CONFIG_CMD_BOOTD is not set
 +# CONFIG_BOOTM_NETBSD is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
 +# CONFIG_BOOTM_VXWORKS is not set
-+# CONFIG_EFI is not set
-+# CONFIG_EFI_LOADER is not set
 +CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_BOOTEFI is not set
-+# CONFIG_CMD_BOOTD is not set
-+# CONFIG_CMD_BOOTP is not set
-+CONFIG_CMD_BOOTM=y
-+# CONFIG_CMD_BOOTDEV is not set
-+# CONFIG_CMD_BOOTFLOW is not set
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_ECHO=y
 +# CONFIG_CMD_ELF is not set
-+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_CMD_GPIO=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_MTDPART=y
-+# CONFIG_CMD_PCI is not set
 +CONFIG_CMD_SF_TEST=y
++# CONFIG_CMD_BOOTP is not set
 +CONFIG_CMD_PING=y
-+CONFIG_CMD_TFTPBOOT=y
-+# CONFIG_CMD_UNLZ4 is not set
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SOURCE=y
++CONFIG_CMD_HASH=y
 +CONFIG_DOS_PARTITION=y
 +# CONFIG_SPL_DOS_PARTITION is not set
 +# CONFIG_ISO_PARTITION is not set
-+# CONFIG_EFI_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_PARTITION_TYPE_GUID=y
++CONFIG_ENV_IS_IN_MTD=y
++CONFIG_ENV_MTD_NAME="nor0"
++CONFIG_ENV_SIZE_REDUND=0x10000
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+# CONFIG_NET_RANDOM_ETHADDR is not set
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="zbtlink_zbt-wg3526-16m_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
++CONFIG_BOOTP_SEND_HOSTNAME=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_GPIO_HOG=y
 +# CONFIG_I2C is not set
 +# CONFIG_INPUT is not set
 +CONFIG_MMC=y
 +# CONFIG_MMC_QUIRKS is not set
 +# CONFIG_MMC_HW_PARTITIONING is not set
 +CONFIG_MMC_MTK=y
-+CONFIG_MTD=y
 +CONFIG_DM_MTD=y
-+CONFIG_SF_DEFAULT_SPEED=20000000
-+# CONFIG_SPI_FLASH_BAR is not set
-+# CONFIG_SPI_FLASH_EON is not set
-+# CONFIG_SPI_FLASH_GIGADEVICE is not set
-+# CONFIG_SPI_FLASH_ISSI is not set
-+# CONFIG_SPI_FLASH_MACRONIX is not set
-+# CONFIG_SPI_FLASH_SPANSION is not set
-+# CONFIG_SPI_FLASH_STMICRO is not set
 +CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_XMC is not set
-+# CONFIG_SPI_FLASH_XTX is not set
 +CONFIG_SPI_FLASH_MTD=y
 +CONFIG_MEDIATEK_ETH=y
 +CONFIG_PHY=y
@@ -130,15 +92,12 @@
 +CONFIG_MT7621_SPI=y
 +CONFIG_SYSRESET=y
 +CONFIG_SYSRESET_RESETCTL=y
-+# CONFIG_SYS_XTRACE is not set
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_VERSION_VARIABLE=y
 +CONFIG_WDT=y
 +CONFIG_WDT_MT7621=y
 +# CONFIG_BINMAN_FDT is not set
 +CONFIG_LZMA=y
-+CONFIG_SPL_LZMA=y
 +# CONFIG_GZIP is not set
++CONFIG_SPL_LZMA=y
 --- /dev/null
 +++ b/zbtlink_zbt-wg3526-16m_env
 @@ -0,0 +1,36 @@
diff --git a/package/boot/uboot-mediatek/patches/429-add-netcore-n60.patch b/package/boot/uboot-mediatek/patches/429-add-netcore-n60.patch
index 2304fcd5ce..2164bf6d5c 100644
--- a/package/boot/uboot-mediatek/patches/429-add-netcore-n60.patch
+++ b/package/boot/uboot-mediatek/patches/429-add-netcore-n60.patch
@@ -1,188 +1,136 @@
 --- /dev/null
 +++ b/configs/mt7986_netcore_n60_defconfig
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-netcore-n60"
-+CONFIG_DEFAULT_ENV_FILE="netcore_n60_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-netcore-n60.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-netcore-n60.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="netcore_n60_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-netcore-n60.dts
 @@ -0,0 +1,185 @@
@@ -418,14 +366,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +ethaddr_factory=mtd read factory 0x40080000 0x1fe000 0x1000 && env readmem -b ethaddr 0x40080f20 0x6 ; setenv ethaddr_factory
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
diff --git a/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch b/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch
index cbcda89119..17f628f852 100644
--- a/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch
+++ b/package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch
@@ -1,800 +1,566 @@
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-emmc_defconfig
-@@ -0,0 +1,197 @@
+@@ -0,0 +1,139 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_emmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-emmc.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-emmc.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_emmc_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-nor_defconfig
-@@ -0,0 +1,193 @@
+@@ -0,0 +1,139 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x20000
++CONFIG_ENV_OFFSET=0x0
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_nor_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-emmc.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-emmc.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
 +CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
++CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_PXE=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7622=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_MTD=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_MTD_NAME="u-boot-env"
-+CONFIG_ENV_OFFSET=0x0
-+CONFIG_ENV_OFFSET_REDUND=0x20000
-+CONFIG_ENV_SIZE=0x20000
 +CONFIG_ENV_SIZE_REDUND=0x20000
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_nor_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTK_SPI_NAND=y
++CONFIG_MTK_SPI_NAND_MTD=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
++CONFIG_PINCTRL_MT7622=y
 +CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
 +CONFIG_DM_REGULATOR=y
 +CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+#CONFIG_MTD_SPI_NAND=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_LZO=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-sd_defconfig
-@@ -0,0 +1,197 @@
+@@ -0,0 +1,139 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-sd"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_sdmmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-sd.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-sd.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_sdmmc_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-snand_defconfig
-@@ -0,0 +1,198 @@
+@@ -0,0 +1,134 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_snand_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-emmc.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-emmc.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7622=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3_snand_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
++CONFIG_PINCTRL_MT7622=y
 +CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
 +CONFIG_DM_REGULATOR=y
 +CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+#CONFIG_DM_SPI_FLASH=y
-+#CONFIG_SPI_FLASH_MTD=y
-+#CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+#CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/bananapi_bpi-r3_sdmmc_env
 @@ -0,0 +1,81 @@
diff --git a/package/boot/uboot-mediatek/patches/431-add-xiaomi_redmi-ax6000.patch b/package/boot/uboot-mediatek/patches/431-add-xiaomi_redmi-ax6000.patch
index 88b2c63632..a1663bcb62 100644
--- a/package/boot/uboot-mediatek/patches/431-add-xiaomi_redmi-ax6000.patch
+++ b/package/boot/uboot-mediatek/patches/431-add-xiaomi_redmi-ax6000.patch
@@ -1,165 +1,91 @@
---- /dev/null
 +++ b/configs/mt7986_xiaomi_redmi-ax6000_defconfig
-@@ -0,0 +1,179 @@
+@@ -0,0 +1,104 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-xiaomi_redmi-ax6000"
-+CONFIG_DEFAULT_ENV_FILE="xiaomi_redmi-ax6000_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-xiaomi_redmi-ax6000.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+# CONFIG_LED is not set
-+# CONFIG_LED_BLINK is not set
-+# CONFIG_LED_GPIO is not set
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-xiaomi_redmi-ax6000.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+# CONFIG_CMD_EXT4 is not set
-+# CONFIG_CMD_FAT is not set
-+CONFIG_CMD_FDT=y
-+# CONFIG_CMD_FS_GENERIC is not set
-+# CONFIG_CMD_FS_UUID is not set
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
-+# CONFIG_CMD_GPT is not set
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+# CONFIG_CMD_LED is not set
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+# CONFIG_CMD_PCI is not set
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+# CONFIG_CMD_PWM is not set
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+# CONFIG_CMD_USB is not set
-+# CONFIG_CMD_FLASH is not set
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+# CONFIG_DM_USB is not set
-+# CONFIG_DM_PWM is not set
-+# CONFIG_PWM_MTK is not set
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+# CONFIG_DM_SCSI is not set
-+# CONFIG_AHCI is not set
-+CONFIG_PHY=y
-+# CONFIG_PHY_MTK_TPHY is not set
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+# CONFIG_PCI is not set
-+# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+# CONFIG_DM_PCI is not set
-+# CONFIG_PCIE_MEDIATEK is not set
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+# CONFIG_PINCTRL_MT7622 is not set
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_SPI=y
-+# CONFIG_I2C is not set
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+# CONFIG_USB is not set
-+# CONFIG_USB_HOST is not set
-+# CONFIG_USB_XHCI_HCD is not set
-+# CONFIG_USB_XHCI_MTK is not set
-+# CONFIG_USB_STORAGE is not set
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="xiaomi_redmi-ax6000_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++# CONFIG_I2C is not set
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7986=y
@@ -167,19 +93,17 @@
 +CONFIG_MTK_POWER_DOMAIN=y
 +CONFIG_DM_REGULATOR=y
 +CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_RAM=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_RANDOM_UUID=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-xiaomi_redmi-ax6000.dts
 @@ -0,0 +1,161 @@
@@ -390,7 +314,7 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr $part_fit && iminfo $loadaddr && run ubi_prepare_rootfs
diff --git a/package/boot/uboot-mediatek/patches/432-add-tplink-xdr608x.patch b/package/boot/uboot-mediatek/patches/432-add-tplink-xdr608x.patch
index 365f280947..76de156433 100644
--- a/package/boot/uboot-mediatek/patches/432-add-tplink-xdr608x.patch
+++ b/package/boot/uboot-mediatek/patches/432-add-tplink-xdr608x.patch
@@ -1,558 +1,402 @@
 --- /dev/null
 +++ b/configs/mt7986_tplink_tl-xdr4288_defconfig
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-tplink-tl-xdr608x"
-+CONFIG_DEFAULT_ENV_FILE="tplink_tl-xdr4288_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xdr608x.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xdr608x.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="tplink_tl-xdr4288_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986_tplink_tl-xdr6086_defconfig
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-tplink-tl-xdr608x"
-+CONFIG_DEFAULT_ENV_FILE="tplink_tl-xdr6086_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xdr608x.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xdr608x.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="tplink_tl-xdr6086_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986_tplink_tl-xdr6088_defconfig
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-tplink-tl-xdr608x"
-+CONFIG_DEFAULT_ENV_FILE="tplink_tl-xdr6088_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xdr608x.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xdr608x.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="tplink_tl-xdr6088_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-tplink-tl-xdr608x.dts
 @@ -0,0 +1,196 @@
@@ -800,14 +644,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
@@ -860,14 +704,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
@@ -920,14 +764,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch b/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch
index 4f98c95893..26118cf857 100644
--- a/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch
+++ b/package/boot/uboot-mediatek/patches/433-add-qihoo_360t7.patch
@@ -1,181 +1,131 @@
 --- /dev/null
 +++ b/configs/mt7981_qihoo-360t7_defconfig
-@@ -0,0 +1,175 @@
+@@ -0,0 +1,125 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981_qihoo-360t7"
-+CONFIG_DEFAULT_ENV_FILE="qihoo-360t7_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_qihoo-360t7.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_qihoo-360t7.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="qihoo-360t7_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7981=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981_qihoo-360t7.dts
 @@ -0,0 +1,185 @@
@@ -411,14 +361,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/434-add-xiaomi_mi-router-wr30u.patch b/package/boot/uboot-mediatek/patches/434-add-xiaomi_mi-router-wr30u.patch
index 2bd1afe7a8..e96af0bc1d 100644
--- a/package/boot/uboot-mediatek/patches/434-add-xiaomi_mi-router-wr30u.patch
+++ b/package/boot/uboot-mediatek/patches/434-add-xiaomi_mi-router-wr30u.patch
@@ -1,181 +1,131 @@
 --- /dev/null
 +++ b/configs/mt7981_xiaomi_mi-router-wr30u_defconfig
-@@ -0,0 +1,175 @@
+@@ -0,0 +1,125 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981_xiaomi_mi-router-wr30u"
-+CONFIG_DEFAULT_ENV_FILE="xiaomi_mi-router-wr30u_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_xiaomi_mi-router-wr30u.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_xiaomi_mi-router-wr30u.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="xiaomi_mi-router-wr30u_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7981=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981_xiaomi_mi-router-wr30u.dts
 @@ -0,0 +1,221 @@
@@ -447,14 +397,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/435-add-h3c_magic-nx30-pro.patch b/package/boot/uboot-mediatek/patches/435-add-h3c_magic-nx30-pro.patch
index d5a149b903..1392aa5647 100644
--- a/package/boot/uboot-mediatek/patches/435-add-h3c_magic-nx30-pro.patch
+++ b/package/boot/uboot-mediatek/patches/435-add-h3c_magic-nx30-pro.patch
@@ -1,181 +1,131 @@
 --- /dev/null
 +++ b/configs/mt7981_h3c_magic-nx30-pro_defconfig
-@@ -0,0 +1,175 @@
+@@ -0,0 +1,125 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981_h3c_magic-nx30-pro"
-+CONFIG_DEFAULT_ENV_FILE="h3c_magic-nx30-pro_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_h3c_magic-nx30-pro.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_h3c_magic-nx30-pro.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="h3c_magic-nx30-pro_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7981=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981_h3c_magic-nx30-pro.dts
 @@ -0,0 +1,205 @@
@@ -431,14 +381,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch
index e0a059eb7b..d87d77a018 100644
--- a/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch
+++ b/package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch
@@ -138,7 +138,7 @@
 +};
 --- /dev/null
 +++ b/configs/mt7986a_glinet_gl-mt6000_defconfig
-@@ -0,0 +1,105 @@
+@@ -0,0 +1,106 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -149,7 +149,6 @@
 +CONFIG_ENV_SIZE=0x80000
 +CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-glinet-gl-mt6000"
-+CONFIG_SYS_PROMPT="MT7986> "
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7986=y
 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
@@ -167,8 +166,10 @@
 +CONFIG_LOG=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7986> "
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
diff --git a/package/boot/uboot-mediatek/patches/437-add-cmcc_rax3000m.patch b/package/boot/uboot-mediatek/patches/437-add-cmcc_rax3000m.patch
index 26e0e30a99..f056cbf377 100644
--- a/package/boot/uboot-mediatek/patches/437-add-cmcc_rax3000m.patch
+++ b/package/boot/uboot-mediatek/patches/437-add-cmcc_rax3000m.patch
@@ -1,359 +1,259 @@
 --- /dev/null
 +++ b/configs/mt7981_cmcc_rax3000m-emmc_defconfig
-@@ -0,0 +1,175 @@
+@@ -0,0 +1,125 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-rax3000m-emmc"
-+CONFIG_DEFAULT_ENV_FILE="cmcc_rax3000m-emmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000m-emmc.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000m-emmc.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
 +CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
++CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_PXE=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="cmcc_rax3000m-emmc_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
++CONFIG_PHY_FIXED=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_DM_PCI=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7981=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_LZO=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_CMD_SF=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7981_cmcc_rax3000m-nand_defconfig
-@@ -0,0 +1,175 @@
+@@ -0,0 +1,125 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-rax3000m-nand"
-+CONFIG_DEFAULT_ENV_FILE="cmcc_rax3000m-nand_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000m-nand.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000m-nand.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="cmcc_rax3000m-nand_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7981=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981-cmcc-rax3000m.dtsi
 @@ -0,0 +1,85 @@
@@ -585,7 +485,7 @@
 +serverip=192.168.1.254
 +loadaddr=0x46000000
 +console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
-+bootargs=root=/dev/mmcblk0p65
++bootargs=root=/dev/fit0 rootwait
 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi
 +bootconf=config-1#mt7981b-cmcc-rax3000m-emmc
 +bootdelay=0
@@ -683,14 +583,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch b/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch
index 639cae174e..f577858b10 100644
--- a/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch
+++ b/package/boot/uboot-mediatek/patches/438-add-jcg_q30-pro.patch
@@ -1,181 +1,131 @@
 --- /dev/null
 +++ b/configs/mt7981_jcg_q30-pro_defconfig
-@@ -0,0 +1,175 @@
+@@ -0,0 +1,125 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981_jcg_q30-pro"
-+CONFIG_DEFAULT_ENV_FILE="jcg_q30-pro_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_jcg_q30-pro.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_jcg_q30-pro.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="jcg_q30-pro_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7981=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981_jcg_q30-pro.dts
 @@ -0,0 +1,179 @@
@@ -405,14 +355,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +ethaddr_factory=mtd read factory 0x40080000 0xa0000 0x800 && env readmem -b ethaddr 0x4008002a 0x6 ; setenv ethaddr_factory
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
diff --git a/package/boot/uboot-mediatek/patches/439-add-zyxel_ex5601-t0.patch b/package/boot/uboot-mediatek/patches/439-add-zyxel_ex5601-t0.patch
index 7f0564fd49..b131df79c8 100644
--- a/package/boot/uboot-mediatek/patches/439-add-zyxel_ex5601-t0.patch
+++ b/package/boot/uboot-mediatek/patches/439-add-zyxel_ex5601-t0.patch
@@ -1,192 +1,136 @@
 --- /dev/null
 +++ b/configs/mt7986_zyxel_ex5601-t0_defconfig
-@@ -0,0 +1,186 @@
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-zyxel_ex5601-t0"
-+CONFIG_DEFAULT_ENV_FILE="zyxel_ex5601-t0_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-zyxel_ex5601-t0.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-zyxel_ex5601-t0.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="EX5601> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+# CONFIG_CMD_FLASH is not set
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="zyxel_ex5601-t0_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++# CONFIG_I2C is not set
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+# CONFIG_DM_PCI is not set
-+# CONFIG_PCIE_MEDIATEK is not set
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
-+# CONFIG_I2C is not set
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-zyxel_ex5601-t0.dts
 @@ -0,0 +1,181 @@
@@ -417,7 +361,7 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr $part_fit && iminfo $loadaddr && run ubi_prepare_rootfs
diff --git a/package/boot/uboot-mediatek/patches/440-add-xiaomi_mi-router-ax3000t.patch b/package/boot/uboot-mediatek/patches/440-add-xiaomi_mi-router-ax3000t.patch
index 9b50166a94..35267bb6d5 100644
--- a/package/boot/uboot-mediatek/patches/440-add-xiaomi_mi-router-ax3000t.patch
+++ b/package/boot/uboot-mediatek/patches/440-add-xiaomi_mi-router-ax3000t.patch
@@ -1,169 +1,113 @@
 --- /dev/null
 +++ b/configs/mt7981_xiaomi_mi-router-ax3000t_defconfig
-@@ -0,0 +1,163 @@
+@@ -0,0 +1,107 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981_xiaomi_mi-router-ax3000t"
-+CONFIG_DEFAULT_ENV_FILE="xiaomi_mi-router-ax3000t_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_xiaomi_mi-router-ax3000t.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981_xiaomi_mi-router-ax3000t.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+# CONFIG_CMD_EXT4 is not set
-+# CONFIG_CMD_FAT is not set
-+CONFIG_CMD_FDT=y
-+# CONFIG_CMD_FS_GENERIC is not set
-+# CONFIG_CMD_FS_UUID is not set
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+# CONFIG_CMD_PCI is not set
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_PART=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+# CONFIG_CMD_PWM is not set
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+# CONFIG_CMD_USB is not set
-+# CONFIG_CMD_FLASH is not set
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+# CONFIG_DM_USB is not set
-+# CONFIG_DM_PWM is not set
-+# CONFIG_PWM_MTK is not set
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="xiaomi_mi-router-ax3000t_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+# CONFIG_DM_SCSI is not set
-+# CONFIG_AHCI is not set
-+CONFIG_PHY=y
-+# CONFIG_PHY_MTK_TPHY is not set
-+CONFIG_PHY_FIXED=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+# CONFIG_PCI is not set
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+# CONFIG_DM_PCI is not set
-+# CONFIG_PCIE_MEDIATEK is not set
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
++CONFIG_PHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+# CONFIG_USB is not set
-+# CONFIG_USB_HOST is not set
-+# CONFIG_USB_XHCI_HCD is not set
-+# CONFIG_USB_XHCI_MTK is not set
-+# CONFIG_USB_STORAGE is not set
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981_xiaomi_mi-router-ax3000t.dts
 @@ -0,0 +1,187 @@
@@ -400,14 +344,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/441-add-jdcloud_re-cp-03.patch b/package/boot/uboot-mediatek/patches/441-add-jdcloud_re-cp-03.patch
index dc8dfe0140..1da0553f23 100644
--- a/package/boot/uboot-mediatek/patches/441-add-jdcloud_re-cp-03.patch
+++ b/package/boot/uboot-mediatek/patches/441-add-jdcloud_re-cp-03.patch
@@ -11,7 +11,6 @@
 +CONFIG_ENV_SIZE=0x40000
 +CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-jdcloud_re-cp-03"
-+CONFIG_SYS_PROMPT="MT7986> "
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7986=y
 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
@@ -30,8 +29,10 @@
 +CONFIG_LOG=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7986> "
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
@@ -107,7 +108,6 @@
 +CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
 +CONFIG_SCSI=y
-+CONFIG_DM_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_ZSTD=y
diff --git a/package/boot/uboot-mediatek/patches/442-add-bpi-r3-mini.patch b/package/boot/uboot-mediatek/patches/442-add-bpi-r3-mini.patch
index 5409f7fa0d..95c9bec731 100644
--- a/package/boot/uboot-mediatek/patches/442-add-bpi-r3-mini.patch
+++ b/package/boot/uboot-mediatek/patches/442-add-bpi-r3-mini.patch
@@ -1,415 +1,294 @@
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-mini-emmc_defconfig
-@@ -0,0 +1,203 @@
+@@ -0,0 +1,146 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3-mini_emmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-mini.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-mini.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
-+CONFIG_CMD_MDIO=y
-+CONFIG_CMD_MII=y
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
++CONFIG_CMD_MII=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MDIO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3-mini_emmc_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_PHY_ETHERNET_ID=y
-+CONFIG_PHY_FIXED=y
++CONFIG_AHCI_PCI=y
 +CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_DM_ETH_PHY=y
-+CONFIG_MEDIATEK_ETH=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_AIROHA=y
 +CONFIG_PHY_AIROHA_EN8811H=y
 +CONFIG_PHY_AIROHA_FW_IN_MMC=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
++CONFIG_PHY_ETHERNET_ID=y
++CONFIG_PHY_FIXED=y
++CONFIG_DM_MDIO=y
++CONFIG_DM_ETH_PHY=y
++CONFIG_MEDIATEK_ETH=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7986a_bpi-r3-mini-snand_defconfig
-@@ -0,0 +1,203 @@
+@@ -0,0 +1,139 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7986=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3-mini_snand_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-mini.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-mini.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7986> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
-+CONFIG_CMD_MDIO=y
-+CONFIG_CMD_MII=y
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
++CONFIG_CMD_MII=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3-mini_snand_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
 +CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_DM_MDIO=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_BOOT=y
++CONFIG_MMC_HS200_SUPPORT=y
++CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_MTD_UBI_FASTMAP=y
++CONFIG_PHY_AIROHA=y
++CONFIG_PHY_AIROHA_EN8811H=y
 +CONFIG_PHY_ETHERNET_ID=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
++CONFIG_DM_MDIO=y
 +CONFIG_DM_ETH_PHY=y
 +CONFIG_MEDIATEK_ETH=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
 +CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
 +CONFIG_RAM=y
++CONFIG_SCSI=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
++CONFIG_MTK_SPIM=y
 +CONFIG_USB=y
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_MTK=y
 +CONFIG_USB_STORAGE=y
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_REGMAP=y
-+CONFIG_SYSCON=y
-+CONFIG_CLK=y
-+CONFIG_SUPPORT_EMMC_BOOT=y
-+CONFIG_MMC_HS200_SUPPORT=y
-+CONFIG_MMC_MTK=y
-+CONFIG_MEDIATEK_ETH=y
-+CONFIG_PHY_AIROHA=y
-+CONFIG_PHY_AIROHA_EN8811H=y
-+CONFIG_PHY_AIROHA_FW_IN_UBI=y
-+CONFIG_PINCTRL=y
-+CONFIG_PINCONF=y
-+CONFIG_PINCTRL_MT7986=y
-+CONFIG_POWER_DOMAIN=y
-+CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
++CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+#CONFIG_DM_SPI_FLASH=y
-+#CONFIG_SPI_FLASH_MTD=y
-+#CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+#CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
 --- /dev/null
 +++ b/bananapi_bpi-r3-mini_snand_env
 @@ -0,0 +1,61 @@
diff --git a/package/boot/uboot-mediatek/patches/443-add-nokia_ea0326gmp.patch b/package/boot/uboot-mediatek/patches/443-add-nokia_ea0326gmp.patch
index 0b72e1ee98..f802007fd9 100644
--- a/package/boot/uboot-mediatek/patches/443-add-nokia_ea0326gmp.patch
+++ b/package/boot/uboot-mediatek/patches/443-add-nokia_ea0326gmp.patch
@@ -1,169 +1,113 @@
 --- /dev/null
 +++ b/configs/mt7981_nokia_ea0326gmp_defconfig
-@@ -0,0 +1,163 @@
+@@ -0,0 +1,107 @@
 +CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
-+CONFIG_TARGET_MT7981=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
-+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981-nokia-ea0326gmp"
-+CONFIG_DEFAULT_ENV_FILE="nokia_ea0326gmp_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-nokia-ea0326gmp.dtb"
 +CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+CONFIG_DEBUG_UART=y
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-nokia-ea0326gmp.dtb"
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_PROMPT="MT7981> "
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+# CONFIG_CMD_EXT4 is not set
-+# CONFIG_CMD_FAT is not set
-+CONFIG_CMD_FDT=y
-+# CONFIG_CMD_FS_GENERIC is not set
-+# CONFIG_CMD_FS_UUID is not set
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MTD=y
-+# CONFIG_CMD_PCI is not set
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_PART=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+# CONFIG_CMD_PWM is not set
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+# CONFIG_CMD_USB is not set
-+# CONFIG_CMD_FLASH is not set
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+# CONFIG_DM_USB is not set
-+# CONFIG_DM_PWM is not set
-+# CONFIG_PWM_MTK is not set
-+CONFIG_HUSH_PARSER=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="nokia_ea0326gmp_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
++CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
-+CONFIG_DM_GPIO=y
-+# CONFIG_DM_SCSI is not set
-+# CONFIG_AHCI is not set
-+CONFIG_PHY=y
-+# CONFIG_PHY_MTK_TPHY is not set
-+CONFIG_PHY_FIXED=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_DM_ETH=y
-+CONFIG_MEDIATEK_ETH=y
-+# CONFIG_PCI is not set
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +# CONFIG_MMC is not set
-+# CONFIG_DM_MMC is not set
 +CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
 +CONFIG_MTD_UBI_FASTMAP=y
-+# CONFIG_DM_PCI is not set
-+# CONFIG_PCIE_MEDIATEK is not set
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
++CONFIG_PHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
 +CONFIG_RAM=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
++CONFIG_MTK_SPIM=y
 +CONFIG_ZSTD=y
 +CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+# CONFIG_USB is not set
-+# CONFIG_USB_HOST is not set
-+# CONFIG_USB_XHCI_HCD is not set
-+# CONFIG_USB_XHCI_MTK is not set
-+# CONFIG_USB_STORAGE is not set
-+CONFIG_OF_EMBED=y
-+CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_IS_IN_UBI=y
-+CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
-+CONFIG_ENV_UBI_VOLUME="ubootenv"
-+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+CONFIG_NET_RANDOM_ETHADDR=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
-+CONFIG_MTK_SPIM=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/arch/arm/dts/mt7981-nokia-ea0326gmp.dts
 @@ -0,0 +1,186 @@
@@ -399,14 +343,14 @@
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 0 || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 1 || run ubi_format
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
-+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic 3 && ubi write $loadaddr recovery $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
diff --git a/package/boot/uboot-mediatek/patches/444-add-abt_asr3000.patch b/package/boot/uboot-mediatek/patches/444-add-abt_asr3000.patch
new file mode 100644
index 0000000000..162e502f1a
--- /dev/null
+++ b/package/boot/uboot-mediatek/patches/444-add-abt_asr3000.patch
@@ -0,0 +1,347 @@
+--- /dev/null
++++ b/configs/mt7981_abt_asr3000_defconfig
+@@ -0,0 +1,107 @@
++CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
++CONFIG_POSITION_INDEPENDENT=y
++CONFIG_ARCH_MEDIATEK=y
++CONFIG_TEXT_BASE=0x41e00000
++CONFIG_SYS_MALLOC_F_LEN=0x4000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_DEFAULT_DEVICE_TREE="mt7981-abt-asr3000"
++CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
++CONFIG_DEBUG_UART_BASE=0x11002000
++CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_SYS_LOAD_ADDR=0x46000000
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AUTOBOOT_MENU_SHOW=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-abt-asr3000.dtb"
++CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
++CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7981> "
++CONFIG_CMD_CPU=y
++CONFIG_CMD_LICENSE=y
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
++CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
++CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_PXE=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_UBI=y
++CONFIG_CMD_UBI_RENAME=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="abt_asr3000_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
++CONFIG_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_MTD_UBI_FASTMAP=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
++CONFIG_PHY=y
++CONFIG_PINCTRL=y
++CONFIG_PINCONF=y
++CONFIG_PINCTRL_MT7981=y
++CONFIG_POWER_DOMAIN=y
++CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_RAM=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
++CONFIG_MTK_SPIM=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
++CONFIG_LMB_MAX_REGIONS=64
+--- /dev/null
++++ b/arch/arm/dts/mt7981-abt-asr3000.dts
+@@ -0,0 +1,176 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++
++/dts-v1/;
++#include "mt7981.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/linux-event-codes.h>
++
++/ {
++	#address-cells = <1>;
++	#size-cells = <1>;
++	model = "ABT ASR3000";
++	compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
++
++	chosen {
++		stdout-path = &uart0;
++		tick-timer = &timer0;
++	};
++
++	memory@40000000 {
++		device_type = "memory";
++		reg = <0x40000000 0x10000000>;
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++
++
++		button-reset {
++			label = "reset";
++			linux,code = <KEY_RESTART>;
++			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
++		};
++
++		button-wps {
++			label = "mesh";
++			linux,code = <BTN_9>;
++			linux,input-type = <EV_SW>;
++			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	gpio-leds {
++		compatible = "gpio-leds";
++
++		led-0 {
++			label = "red:wan";
++			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++
++		led-1 {
++			label = "green:wan";
++			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++
++		mesh_led: led-2 {
++			label = "green:mesh";
++			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++		};
++
++		led-3 {
++			label = "green:wlan2g";
++			gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++
++		led-4 {
++			label = "green:wlan5g";
++			gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++	};
++};
++
++&eth {
++	status = "okay";
++	mediatek,gmac-id = <0>;
++	phy-mode = "2500base-x";
++	mediatek,switch = "mt7531";
++	reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
++
++	fixed-link {
++		speed = <2500>;
++		full-duplex;
++	};
++};
++
++&pinctrl {
++	spi_flash_pins: spi0-pins-func-1 {
++		mux {
++			function = "flash";
++			groups = "spi0", "spi0_wp_hold";
++		};
++
++		conf-pu {
++			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
++			drive-strength = <MTK_DRIVE_8mA>;
++			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
++		};
++
++		conf-pd {
++			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
++			drive-strength = <MTK_DRIVE_8mA>;
++			bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
++		};
++	};
++};
++
++&spi0 {
++	#address-cells = <1>;
++	#size-cells = <0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi_flash_pins>;
++	status = "okay";
++	must_tx;
++	enhance_timing;
++	dma_ext;
++	ipm_design;
++	support_quad;
++	tick_dly = <2>;
++	sample_sel = <0>;
++
++	spi_nand@0 {
++		compatible = "spi-nand";
++		reg = <0>;
++		spi-max-frequency = <52000000>;
++
++		partitions {
++			compatible = "fixed-partitions";
++			#address-cells = <1>;
++			#size-cells = <1>;
++
++			partition@0 {
++				label = "bl2";
++				reg = <0x0 0x100000>;
++			};
++
++			partition@100000 {
++				label = "u-boot-env";
++				reg = <0x100000 0x80000>;
++			};
++
++			partition@180000 {
++				label = "art";
++				reg = <0x180000 0x100000>;
++			};
++
++			partition@280000 {
++				label = "factory";
++				reg = <0x280000 0x100000>;
++			};
++
++			partition@380000 {
++				label = "fip";
++				reg = <0x380000 0x200000>;
++			};
++
++			partition@580000 {
++				label = "ubi";
++				reg = <0x580000 0x7a80000>;
++				compatible = "linux,ubi";
++			};
++		};
++	};
++};
++
++&uart0 {
++	mediatek,force-highspeed;
++	status = "okay";
++};
++
++&watchdog {
++	status = "disabled";
++};
+--- /dev/null
++++ b/abt_asr3000_env
+@@ -0,0 +1,55 @@
++ipaddr=192.168.1.1
++serverip=192.168.1.254
++loadaddr=0x46000000
++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
++bootargs=root=/dev/fit0 rootwait
++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
++bootconf=config-1
++bootdelay=0
++bootfile=openwrt-mediatek-filogic-abt_asr3000-initramfs-recovery.itb
++bootfile_bl2=openwrt-mediatek-filogic-abt_asr3000-preloader.bin
++bootfile_fip=openwrt-mediatek-filogic-abt_asr3000-bl31-uboot.fip
++bootfile_upg=openwrt-mediatek-filogic-abt_asr3000-squashfs-sysupgrade.itb
++bootled_pwr=green:mesh
++bootled_rec=green:mesh
++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
++bootmenu_default=0
++bootmenu_delay=0
++bootmenu_title=      ( ( ( OpenWrt ) ) )
++bootmenu_0=Initialize environment.=run _firstboot
++bootmenu_0d=Run default boot command.=run boot_default
++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
++bootmenu_8=Reboot.=reset
++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
diff --git a/package/boot/uboot-mediatek/patches/450-add-bpi-r4.patch b/package/boot/uboot-mediatek/patches/450-add-bpi-r4.patch
index 0a69e74e02..1b1ac9262f 100644
--- a/package/boot/uboot-mediatek/patches/450-add-bpi-r4.patch
+++ b/package/boot/uboot-mediatek/patches/450-add-bpi-r4.patch
@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7988a_bananapi_bpi-r4-emmc_defconfig
-@@ -0,0 +1,180 @@
+@@ -0,0 +1,140 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -8,182 +8,142 @@
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_PROMPT="MT7988> "
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
++CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
++CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7988=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11000000
 +CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x50000000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4_emmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7988> "
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4_emmc_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7988=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7988a_bananapi_bpi-r4-sdmmc_defconfig
-@@ -0,0 +1,180 @@
+@@ -0,0 +1,140 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -191,182 +151,142 @@
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_PROMPT="MT7988> "
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
++CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-sd"
++CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7988=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11000000
 +CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x50000000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-sd"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4_sdmmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-sd.dtb"
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-sd.dtb"
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7988> "
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4_sdmmc_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7988=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7988a_bananapi_bpi-r4-snand_defconfig
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,140 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -374,181 +294,139 @@
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_PROMPT="MT7988> "
++CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
++CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7988=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11000000
 +CONFIG_DEBUG_UART_CLOCK=40000000
 +CONFIG_SYS_LOAD_ADDR=0x50000000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4_snand_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7988> "
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PINCTRL_MT7988=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4_snand_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7988=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/bananapi_bpi-r4_sdmmc_env
 @@ -0,0 +1,66 @@
@@ -602,7 +480,7 @@
 +sdmmc_write_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol
 +sdmmc_write_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol
 +snand_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr 0x0 0x80000 && mtd write bl2 $loadaddr 0x80000 0x80000 && mtd write bl2 $loadaddr 0x100000 0x80000 && mtd write bl2 $loadaddr 0x180000 0x80000
-+ubi_create_env=ubi create ubootenv 0x100000 dynamic 1 ; ubi create ubootenv2 0x100000 dynamic 2
++ubi_create_env=ubi create ubootenv 0x100000 dynamic ; ubi create ubootenv2 0x100000 dynamic
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi
 +ubi_init=run ubi_format && run ubi_init_bl && run ubi_create_env && run ubi_init_openwrt && run ubi_init_emmc_install
 +ubi_init_openwrt=run sdmmc_read_recovery && iminfo $loadaddr && run ubi_write_recovery ; run sdmmc_read_production && iminfo $loadaddr && run ubi_write_production
@@ -666,7 +544,7 @@
 +part_recovery=recovery
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +snand_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr 0x0 0x80000 && mtd write bl2 $loadaddr 0x80000 0x80000 && mtd write bl2 $loadaddr 0x100000 0x80000 && mtd write bl2 $loadaddr 0x180000 0x80000
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 1 ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 2
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
@@ -998,7 +876,7 @@
 +};
 --- /dev/null
 +++ b/configs/mt7988a_bananapi_bpi-r4-poe-emmc_defconfig
-@@ -0,0 +1,180 @@
+@@ -0,0 +1,140 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -1006,182 +884,142 @@
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_PROMPT="MT7988> "
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
++CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
++CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7988=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11000000
 +CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x50000000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4-poe_emmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7988> "
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4-poe_emmc_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7988=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7988a_bananapi_bpi-r4-poe-sdmmc_defconfig
-@@ -0,0 +1,180 @@
+@@ -0,0 +1,140 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -1189,182 +1027,142 @@
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_PROMPT="MT7988> "
++CONFIG_ENV_SIZE=0x40000
++CONFIG_ENV_OFFSET=0x400000
++CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-sd"
++CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7988=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11000000
 +CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_ENV_OFFSET_REDUND=0x440000
 +CONFIG_SYS_LOAD_ADDR=0x50000000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-sd"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4-poe_sdmmc_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-sd.dtb"
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-sd.dtb"
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7988> "
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_ENV_OFFSET=0x400000
-+CONFIG_ENV_OFFSET_REDUND=0x440000
-+CONFIG_ENV_SIZE=0x40000
-+CONFIG_ENV_SIZE_REDUND=0x40000
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4-poe_sdmmc_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7988=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/configs/mt7988a_bananapi_bpi-r4-poe-snand_defconfig
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,140 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
@@ -1372,181 +1170,139 @@
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_PROMPT="MT7988> "
++CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
++CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_TARGET_MT7988=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 +CONFIG_DEBUG_UART_BASE=0x11000000
 +CONFIG_DEBUG_UART_CLOCK=40000000
 +CONFIG_SYS_LOAD_ADDR=0x50000000
++CONFIG_PCI=y
 +CONFIG_DEBUG_UART=y
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_DEFAULT_DEVICE_TREE="mt7988a-bananapi-bpi-r4-emmc"
-+CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4-poe_snand_env"
-+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
-+CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_OF_SYSTEM_SETUP=y
-+CONFIG_SMBIOS_PRODUCT_NAME=""
-+CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
 +CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+CONFIG_CFB_CONSOLE_ANSI=y
-+CONFIG_BOARD_LATE_INIT=y
-+CONFIG_BUTTON=y
-+CONFIG_BUTTON_GPIO=y
-+CONFIG_GPIO_HOG=y
-+CONFIG_CMD_ENV_FLAGS=y
-+CONFIG_FIT=y
-+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
-+CONFIG_LED=y
-+CONFIG_LED_BLINK=y
-+CONFIG_LED_GPIO=y
++CONFIG_OF_SYSTEM_SETUP=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7988a-bpi-r4-emmc.dtb"
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
 +CONFIG_LOG=y
-+CONFIG_CMD_BOOTMENU=y
-+CONFIG_CMD_BOOTP=y
-+CONFIG_CMD_BUTTON=y
-+CONFIG_CMD_CACHE=y
-+CONFIG_CMD_CDP=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7988> "
 +CONFIG_CMD_CPU=y
-+CONFIG_CMD_DHCP=y
-+CONFIG_CMD_DM=y
-+CONFIG_CMD_DNS=y
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ENV_READMEM=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_EXT4=y
-+CONFIG_CMD_FAT=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_FS_GENERIC=y
-+CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
 +CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
 +CONFIG_CMD_GPT=y
-+CONFIG_CMD_HASH=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_LED=y
-+CONFIG_CMD_LICENSE=y
-+CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_MBR is not set
 +CONFIG_CMD_MMC=y
 +CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PSTORE=y
-+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF_TEST=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
 +CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PXE=y
-+CONFIG_CMD_PWM=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
 +CONFIG_CMD_SMC=y
-+CONFIG_CMD_TFTPBOOT=y
-+CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_PART=y
-+CONFIG_CMD_RARP=y
-+CONFIG_CMD_SETEXPR=y
-+CONFIG_CMD_SLEEP=y
-+CONFIG_CMD_SNTP=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_STRINGS=y
-+CONFIG_CMD_USB=y
-+CONFIG_CMD_UUID=y
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DM_MMC=y
-+CONFIG_DM_MTD=y
-+CONFIG_DM_REGULATOR=y
-+CONFIG_DM_REGULATOR_FIXED=y
-+CONFIG_DM_REGULATOR_GPIO=y
-+CONFIG_DM_USB=y
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_MTK=y
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_VERSION_VARIABLE=y
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_NETCONSOLE=y
-+CONFIG_DM_GPIO=y
-+CONFIG_DM_SCSI=y
-+CONFIG_AHCI=y
-+CONFIG_AHCI_PCI=y
-+CONFIG_SCSI_AHCI=y
-+CONFIG_SCSI=y
-+CONFIG_CMD_SCSI=y
-+CONFIG_PHY=y
-+CONFIG_PHY_MTK_TPHY=y
-+CONFIG_MTK_AHCI=y
-+CONFIG_PCI=y
-+CONFIG_MTD=y
-+CONFIG_MTD_UBI_FASTMAP=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCIE_MEDIATEK=y
-+CONFIG_PINCTRL_MT7988=y
-+CONFIG_PRE_CONSOLE_BUFFER=y
-+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
-+CONFIG_RAM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_MTK_SERIAL=y
-+CONFIG_MMC=y
-+CONFIG_MMC_DEFAULT_DEV=1
-+CONFIG_MMC_SUPPORTS_TUNING=y
-+CONFIG_SPI=y
-+CONFIG_DM_SPI=y
-+CONFIG_MTK_SPI_NAND=y
-+CONFIG_MTK_SPI_NAND_MTD=y
-+CONFIG_SYSRESET_WATCHDOG=y
-+CONFIG_WDT_MTK=y
-+CONFIG_LZO=y
-+CONFIG_ZSTD=y
-+CONFIG_HEXDUMP=y
-+CONFIG_RANDOM_UUID=y
-+CONFIG_REGEX=y
-+CONFIG_USB=y
-+CONFIG_USB_HOST=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_MTK=y
-+CONFIG_USB_STORAGE=y
 +CONFIG_OF_EMBED=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_ENV_SIZE_REDUND=0x1f000
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r4-poe_snand_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
 +CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
 +CONFIG_SUPPORT_EMMC_BOOT=y
 +CONFIG_MMC_HS200_SUPPORT=y
 +CONFIG_MMC_MTK=y
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SPI_FLASH_WINBOND=y
++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
++CONFIG_SPI_FLASH_MTD=y
++CONFIG_MTD_UBI_FASTMAP=y
 +CONFIG_PHY_FIXED=y
-+CONFIG_DM_ETH=y
 +CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7988=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
-+CONFIG_USE_DEFAULT_ENV_FILE=y
-+CONFIG_MTD_SPI_NAND=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
-+#CONFIG_MTK_SNOR=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH_MTD=y
-+CONFIG_SPI_FLASH_WINBOND=y
-+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-+CONFIG_CMD_SF=y
-+CONFIG_CMD_NAND=y
-+CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
-+CONFIG_USE_IPADDR=y
-+CONFIG_IPADDR="192.168.1.1"
-+CONFIG_USE_SERVERIP=y
-+CONFIG_SERVERIP="192.168.1.254"
 --- /dev/null
 +++ b/bananapi_bpi-r4-poe_emmc_env
 @@ -0,0 +1,57 @@
@@ -1660,7 +1416,7 @@
 +sdmmc_write_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol
 +sdmmc_write_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol
 +snand_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr 0x0 0x80000 && mtd write bl2 $loadaddr 0x80000 0x80000 && mtd write bl2 $loadaddr 0x100000 0x80000 && mtd write bl2 $loadaddr 0x180000 0x80000
-+ubi_create_env=ubi create ubootenv 0x100000 dynamic 1 ; ubi create ubootenv2 0x100000 dynamic 2
++ubi_create_env=ubi create ubootenv 0x100000 dynamic ; ubi create ubootenv2 0x100000 dynamic
 +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi
 +ubi_init=run ubi_format && run ubi_init_bl && run ubi_create_env && run ubi_init_openwrt && run ubi_init_emmc_install
 +ubi_init_openwrt=run sdmmc_read_recovery && iminfo $loadaddr && run ubi_write_recovery ; run sdmmc_read_production && iminfo $loadaddr && run ubi_write_production
@@ -1724,7 +1480,7 @@
 +part_recovery=recovery
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +snand_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr 0x0 0x80000 && mtd write bl2 $loadaddr 0x80000 0x80000 && mtd write bl2 $loadaddr 0x100000 0x80000 && mtd write bl2 $loadaddr 0x180000 0x80000
-+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic 1 ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic 2
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
diff --git a/package/boot/uboot-mediatek/patches/451-add-tplink-xtr8488.patch b/package/boot/uboot-mediatek/patches/451-add-tplink-xtr8488.patch
new file mode 100644
index 0000000000..50ca34f406
--- /dev/null
+++ b/package/boot/uboot-mediatek/patches/451-add-tplink-xtr8488.patch
@@ -0,0 +1,392 @@
+--- /dev/null
++++ b/configs/mt7986_tplink_tl-xtr8488_defconfig
+@@ -0,0 +1,130 @@
++CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
++CONFIG_POSITION_INDEPENDENT=y
++CONFIG_ARCH_MEDIATEK=y
++CONFIG_TEXT_BASE=0x41e00000
++CONFIG_SYS_MALLOC_F_LEN=0x4000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_DEFAULT_DEVICE_TREE="mt7986a-tplink-tl-xtr8488"
++CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7986=y
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
++CONFIG_DEBUG_UART_BASE=0x11002000
++CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_SYS_LOAD_ADDR=0x46000000
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_AHCI=y
++CONFIG_FIT=y
++CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AUTOBOOT_MENU_SHOW=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-tplink-tl-xtr8488.dtb"
++CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
++CONFIG_LOG=y
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7986> "
++CONFIG_CMD_CPU=y
++CONFIG_CMD_LICENSE=y
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
++CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
++CONFIG_CMD_PING=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_PXE=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_EXT4=y
++CONFIG_CMD_FAT=y
++CONFIG_CMD_FS_GENERIC=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_UBI=y
++CONFIG_CMD_UBI_RENAME=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="tplink_tl-xtr8488_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
++CONFIG_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_SCSI_AHCI=y
++CONFIG_AHCI_PCI=y
++CONFIG_MTK_AHCI=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_MTD_UBI_FASTMAP=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
++CONFIG_PCIE_MEDIATEK=y
++CONFIG_PHY=y
++CONFIG_PHY_MTK_TPHY=y
++CONFIG_PINCTRL=y
++CONFIG_PINCONF=y
++CONFIG_PINCTRL_MT7622=y
++CONFIG_PINCTRL_MT7986=y
++CONFIG_POWER_DOMAIN=y
++CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_DM_PWM=y
++CONFIG_PWM_MTK=y
++CONFIG_RAM=y
++CONFIG_SCSI=y
++CONFIG_DM_SERIAL=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
++CONFIG_MTK_SPIM=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_MTK=y
++CONFIG_USB_STORAGE=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
++CONFIG_LMB_MAX_REGIONS=64
+--- /dev/null
++++ b/arch/arm/dts/mt7986a-tplink-tl-xtr8488.dts
+@@ -0,0 +1,196 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Copyright (c) 2021 MediaTek Inc.
++ * Author: Sam Shih <sam.shih@mediatek.com>
++ */
++
++/dts-v1/;
++#include "mt7986.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/linux-event-codes.h>
++
++/ {
++	#address-cells = <1>;
++	#size-cells = <1>;
++	model = "TP-Link TL-XTR8488";
++	compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
++
++	chosen {
++		stdout-path = &uart0;
++		tick-timer = &timer0;
++	};
++
++	memory@40000000 {
++		device_type = "memory";
++		reg = <0x40000000 0x40000000>;
++	};
++
++	keys {
++		compatible = "gpio-keys";
++
++		reset {
++			label = "reset";
++			linux,code = <KEY_RESTART>;
++			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
++		};
++
++		wps {
++			label = "wps";
++			linux,code = <KEY_WPS_BUTTON>;
++			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
++		};
++
++		turbo {
++			label = "turbo";
++			linux,code = <BTN_1>;
++			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		status_red {
++			label = "red:status";
++			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
++		};
++
++		status_green {
++			label = "green:status";
++			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
++		};
++
++		turbo {
++			label = "green:turbo";
++			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
++		};
++	};
++};
++
++&uart0 {
++	mediatek,force-highspeed;
++	status = "okay";
++};
++
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart1_pins>;
++	status = "disabled";
++};
++
++&eth {
++	status = "okay";
++	mediatek,gmac-id = <0>;
++	phy-mode = "2500base-x";
++	mediatek,switch = "mt7531";
++	reset-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
++
++	fixed-link {
++		speed = <2500>;
++		full-duplex;
++	};
++};
++
++&pinctrl {
++	spi_flash_pins: spi0-pins-func-1 {
++		mux {
++			function = "flash";
++			groups = "spi0", "spi0_wp_hold";
++		};
++
++		conf-pu {
++			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
++			drive-strength = <MTK_DRIVE_8mA>;
++			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
++		};
++
++		conf-pd {
++			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
++			drive-strength = <MTK_DRIVE_8mA>;
++			bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
++		};
++	};
++
++	spic_pins: spi1-pins-func-1 {
++		mux {
++			function = "spi";
++			groups = "spi1_2";
++		};
++	};
++
++	uart1_pins: spi1-pins-func-3 {
++		mux {
++			function = "uart";
++			groups = "uart1_2";
++		};
++	};
++
++	pwm_pins: pwm0-pins-func-1 {
++		mux {
++			function = "pwm";
++			groups = "pwm0";
++		};
++	};
++};
++
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm_pins>;
++	status = "okay";
++};
++
++&spi0 {
++	#address-cells = <1>;
++	#size-cells = <0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi_flash_pins>;
++	status = "okay";
++	must_tx;
++	enhance_timing;
++	dma_ext;
++	ipm_design;
++	support_quad;
++	tick_dly = <1>;
++	sample_sel = <0>;
++
++	spi_nand@1 {
++		compatible = "spi-nand";
++		reg = <1>;
++		spi-max-frequency = <52000000>;
++
++		partitions {
++			compatible = "fixed-partitions";
++			#address-cells = <1>;
++			#size-cells = <1>;
++
++			partition@0 {
++				label = "bl2";
++				reg = <0x0 0x80000>;
++			};
++
++			partition@100000 {
++				label = "config";
++				reg = <0x100000 0x40000>;
++			};
++
++			partition@140000 {
++				label = "factory";
++				reg = <0x140000 0x40000>;
++			};
++
++			partition@380000 {
++				label = "fip";
++				reg = <0x380000 0x200000>;
++			};
++
++			partition@580000 {
++				label = "ubi";
++				reg = <0x580000 0x7800000>;
++			};
++		};
++	};
++};
++
++&watchdog {
++	status = "disabled";
++};
+--- /dev/null
++++ b/tplink_tl-xtr8488_env
+@@ -0,0 +1,57 @@
++ipaddr=192.168.1.1
++serverip=192.168.1.254
++loadaddr=0x46000000
++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
++bootconf=config-1
++bootdelay=0
++bootfile=openwrt-mediatek-filogic-tplink_tl-xtr8488-initramfs-recovery.itb
++bootfile_bl2=openwrt-mediatek-filogic-tplink_tl-xtr8488-preloader.bin
++bootfile_fip=openwrt-mediatek-filogic-tplink_tl-xtr8488-bl31-uboot.fip
++bootfile_upg=openwrt-mediatek-filogic-tplink_tl-xtr8488-squashfs-sysupgrade.itb
++bootled_pwr=green:status
++bootled_rec=red:status
++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
++bootmenu_default=0
++bootmenu_delay=0
++bootmenu_title=      ( ( ( OpenWrt ) ) )
++bootmenu_0=Initialize environment.=run _firstboot
++bootmenu_0d=Run default boot command.=run boot_default
++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
++bootmenu_8=Reboot.=reset
++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
++part_default=production
++part_recovery=recovery
++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
++ethaddr_factory=mtd read config 0x40080000 0x0 0x20000 && env readmem -b ethaddr 0x4008001c 0x6 ; setenv ethaddr_factory
++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
++_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
diff --git a/package/boot/uboot-mediatek/patches/452-add-xiaomi-redmi-ax6s.patch b/package/boot/uboot-mediatek/patches/452-add-xiaomi-redmi-ax6s.patch
index 28cc5d73d7..06c866d840 100644
--- a/package/boot/uboot-mediatek/patches/452-add-xiaomi-redmi-ax6s.patch
+++ b/package/boot/uboot-mediatek/patches/452-add-xiaomi-redmi-ax6s.patch
@@ -15,7 +15,7 @@ Subject: [PATCH] add xiaomi redmi ax6s
 
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
-@@ -1425,6 +1425,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -1225,6 +1225,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  	mt7622-linksys-e8450-ubi.dtb \
  	mt7622-ubnt-unifi-6-lr.dtb \
  	mt7622-ubnt-unifi-6-lr-v3.dtb \
@@ -315,6 +315,6 @@ Subject: [PATCH] add xiaomi redmi ax6s
 +ubi_init=ubi part ubi || run ubi_format
 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
-+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic 2 && ubi write $loadaddr fit $filesize
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
 +ubi_read_production=run ubi_init && ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 +tftp_production=tftpboot $loadaddr $bootfile_upg && iminfo $loadaddr && run ubi_write_production && reset
diff --git a/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch b/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
index 25d2733d1c..b35203bc12 100644
--- a/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
+++ b/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
@@ -206,3636 +206,269 @@
 +};
 --- /dev/null
 +++ b/configs/mt7981_openwrt-one-nor_defconfig
-@@ -0,0 +1,1811 @@
-+#
-+# Automatically generated file; DO NOT EDIT.
-+# U-Boot 2024.01 Configuration
-+#
-+
-+#
-+# Compiler: aarch64-openwrt-linux-musl-gcc (OpenWrt GCC 13.2.0 r26144+12-219018185e) 13.2.0
-+#
-+CONFIG_CREATE_ARCH_SYMLINK=y
-+CONFIG_SYS_CACHE_SHIFT_6=y
-+CONFIG_SYS_CACHELINE_SIZE=64
-+CONFIG_LINKER_LIST_ALIGN=8
-+# CONFIG_ARC is not set
+@@ -0,0 +1,129 @@
 +CONFIG_ARM=y
-+# CONFIG_M68K is not set
-+# CONFIG_MICROBLAZE is not set
-+# CONFIG_MIPS is not set
-+# CONFIG_NIOS2 is not set
-+# CONFIG_PPC is not set
-+# CONFIG_RISCV is not set
-+# CONFIG_SANDBOX is not set
-+# CONFIG_SH is not set
-+# CONFIG_X86 is not set
-+# CONFIG_XTENSA is not set
-+CONFIG_SYS_ARCH="arm"
-+CONFIG_SYS_CPU="armv8"
-+CONFIG_SYS_SOC="mediatek"
-+CONFIG_SYS_VENDOR="mediatek"
-+CONFIG_SYS_BOARD="mt7981"
-+CONFIG_SYS_CONFIG_NAME="mt7981"
-+
-+#
-+# Skipping low level initialization functions
-+#
-+# CONFIG_SKIP_LOWLEVEL_INIT is not set
-+# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_SYS_NONCACHED_MEMORY=0x100000
-+# CONFIG_SYS_ICACHE_OFF is not set
-+# CONFIG_SYS_DCACHE_OFF is not set
-+
-+#
-+# ARM architecture
-+#
-+CONFIG_ARM64=y
-+CONFIG_ARM64_CRC32=y
-+CONFIG_COUNTER_FREQUENCY=0
 +CONFIG_POSITION_INDEPENDENT=y
-+CONFIG_INIT_SP_RELATIVE=y
-+CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
-+# CONFIG_GIC_V3_ITS is not set
-+CONFIG_STATIC_RELA=y
-+CONFIG_DMA_ADDR_T_64BIT=y
-+CONFIG_GPIO_EXTRA_HEADER=y
-+CONFIG_ARM_ASM_UNIFIED=y
-+# CONFIG_SYS_ARM_CACHE_CP15 is not set
-+# CONFIG_SYS_ARM_MMU is not set
-+# CONFIG_SYS_ARM_MPU is not set
-+CONFIG_SYS_ARM_ARCH=8
-+CONFIG_SYS_ARM_CACHE_WRITEBACK=y
-+# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
-+# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
-+# CONFIG_ARCH_CPU_INIT is not set
-+CONFIG_SYS_ARCH_TIMER=y
-+CONFIG_ARM_SMCCC=y
-+# CONFIG_SYS_L2_PL310 is not set
-+# CONFIG_SPL_SYS_L2_PL310 is not set
-+# CONFIG_SYS_L2CACHE_OFF is not set
-+# CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set
-+# CONFIG_USE_ARCH_MEMCPY is not set
-+# CONFIG_USE_ARCH_MEMSET is not set
-+CONFIG_ARM64_SUPPORT_AARCH32=y
-+# CONFIG_ARCH_AT91 is not set
-+# CONFIG_ARCH_DAVINCI is not set
-+# CONFIG_ARCH_HISTB is not set
-+# CONFIG_ARCH_KIRKWOOD is not set
-+# CONFIG_ARCH_MVEBU is not set
-+# CONFIG_ARCH_ORION5X is not set
-+# CONFIG_TARGET_STV0991 is not set
-+# CONFIG_ARCH_BCM283X is not set
-+# CONFIG_ARCH_BCMSTB is not set
-+# CONFIG_ARCH_BCMBCA is not set
-+# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
-+# CONFIG_TARGET_BCMNS is not set
-+# CONFIG_TARGET_BCMNS2 is not set
-+# CONFIG_TARGET_BCMNS3 is not set
-+# CONFIG_ARCH_EXYNOS is not set
-+# CONFIG_ARCH_S5PC1XX is not set
-+# CONFIG_ARCH_HIGHBANK is not set
-+# CONFIG_ARCH_INTEGRATOR is not set
-+# CONFIG_ARCH_IPQ40XX is not set
-+# CONFIG_ARCH_KEYSTONE is not set
-+# CONFIG_ARCH_K3 is not set
-+# CONFIG_ARCH_OMAP2PLUS is not set
-+# CONFIG_ARCH_MESON is not set
 +CONFIG_ARCH_MEDIATEK=y
-+# CONFIG_ARCH_LPC32XX is not set
-+# CONFIG_ARCH_IMX8 is not set
-+# CONFIG_ARCH_IMX8M is not set
-+# CONFIG_ARCH_IMX8ULP is not set
-+# CONFIG_ARCH_IMX9 is not set
-+# CONFIG_ARCH_IMXRT is not set
-+# CONFIG_ARCH_MX23 is not set
-+# CONFIG_ARCH_MX28 is not set
-+# CONFIG_ARCH_MX31 is not set
-+# CONFIG_ARCH_MX7ULP is not set
-+# CONFIG_ARCH_MX7 is not set
-+# CONFIG_ARCH_MX6 is not set
-+# CONFIG_ARCH_MX5 is not set
-+# CONFIG_ARCH_NEXELL is not set
-+# CONFIG_ARCH_NPCM is not set
-+# CONFIG_ARCH_APPLE is not set
-+# CONFIG_ARCH_OWL is not set
-+# CONFIG_ARCH_QEMU is not set
-+# CONFIG_ARCH_RMOBILE is not set
-+# CONFIG_ARCH_SNAPDRAGON is not set
-+# CONFIG_ARCH_SOCFPGA is not set
-+# CONFIG_ARCH_SUNXI is not set
-+# CONFIG_ARCH_U8500 is not set
-+# CONFIG_ARCH_VERSAL is not set
-+# CONFIG_ARCH_VERSAL_NET is not set
-+# CONFIG_ARCH_VF610 is not set
-+# CONFIG_ARCH_ZYNQ is not set
-+# CONFIG_ARCH_ZYNQMP_R5 is not set
-+# CONFIG_ARCH_ZYNQMP is not set
-+# CONFIG_ARCH_TEGRA is not set
-+# CONFIG_ARCH_VEXPRESS64 is not set
-+# CONFIG_TARGET_CORSTONE1000 is not set
-+# CONFIG_TARGET_TOTAL_COMPUTE is not set
-+# CONFIG_TARGET_LS2080A_EMU is not set
-+# CONFIG_TARGET_LS1088AQDS is not set
-+# CONFIG_TARGET_LS2080AQDS is not set
-+# CONFIG_TARGET_LS2080ARDB is not set
-+# CONFIG_TARGET_LS2081ARDB is not set
-+# CONFIG_TARGET_LX2160ARDB is not set
-+# CONFIG_TARGET_LX2160AQDS is not set
-+# CONFIG_TARGET_LX2162AQDS is not set
-+# CONFIG_TARGET_HIKEY is not set
-+# CONFIG_TARGET_HIKEY960 is not set
-+# CONFIG_TARGET_POPLAR is not set
-+# CONFIG_TARGET_LS1012AQDS is not set
-+# CONFIG_TARGET_LS1012ARDB is not set
-+# CONFIG_TARGET_LS1012A2G5RDB is not set
-+# CONFIG_TARGET_LS1012AFRWY is not set
-+# CONFIG_TARGET_LS1012AFRDM is not set
-+# CONFIG_TARGET_LS1028AQDS is not set
-+# CONFIG_TARGET_LS1028ARDB is not set
-+# CONFIG_TARGET_LS1088ARDB is not set
-+# CONFIG_TARGET_LS1021AQDS is not set
-+# CONFIG_TARGET_LS1021ATWR is not set
-+# CONFIG_TARGET_PG_WCOM_SELI8 is not set
-+# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
-+# CONFIG_TARGET_LS1021ATSN is not set
-+# CONFIG_TARGET_LS1021AIOT is not set
-+# CONFIG_TARGET_LS1043AQDS is not set
-+# CONFIG_TARGET_LS1043ARDB is not set
-+# CONFIG_TARGET_LS1046AQDS is not set
-+# CONFIG_TARGET_LS1046ARDB is not set
-+# CONFIG_TARGET_LS1046AFRWY is not set
-+# CONFIG_TARGET_SL28 is not set
-+# CONFIG_TARGET_TEN64 is not set
-+# CONFIG_ARCH_UNIPHIER is not set
-+# CONFIG_ARCH_SYNQUACER is not set
-+# CONFIG_ARCH_STM32 is not set
-+# CONFIG_ARCH_STI is not set
-+# CONFIG_ARCH_STM32MP is not set
-+# CONFIG_ARCH_ROCKCHIP is not set
-+# CONFIG_ARCH_OCTEONTX is not set
-+# CONFIG_ARCH_OCTEONTX2 is not set
-+# CONFIG_TARGET_THUNDERX_88XX is not set
-+# CONFIG_ARCH_ASPEED is not set
-+# CONFIG_TARGET_DURIAN is not set
-+# CONFIG_TARGET_POMELO is not set
-+# CONFIG_TARGET_PRESIDIO_ASIC is not set
-+# CONFIG_TARGET_XENGUEST_ARM64 is not set
-+# CONFIG_ARCH_GXP is not set
-+# CONFIG_STATIC_MACH_TYPE is not set
 +CONFIG_TEXT_BASE=0x41e00000
-+CONFIG_SYS_MALLOC_LEN=0x400000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_ENV_SOURCE_FILE=""
-+CONFIG_SF_DEFAULT_SPEED=1000000
-+CONFIG_SF_DEFAULT_MODE=0x0
 +CONFIG_ENV_SIZE=0x8000
-+CONFIG_DM_GPIO=y
 +CONFIG_DEFAULT_DEVICE_TREE="openwrt-one"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
-+CONFIG_DM_RESET=y
-+CONFIG_SYS_MONITOR_LEN=0
-+# CONFIG_MT8512 is not set
-+# CONFIG_TARGET_MT7622 is not set
-+# CONFIG_TARGET_MT7623 is not set
-+# CONFIG_TARGET_MT7629 is not set
 +CONFIG_TARGET_MT7981=y
-+# CONFIG_TARGET_MT7986 is not set
-+# CONFIG_TARGET_MT7988 is not set
-+# CONFIG_TARGET_MT8183 is not set
-+# CONFIG_TARGET_MT8512 is not set
-+# CONFIG_TARGET_MT8516 is not set
-+# CONFIG_TARGET_MT8518 is not set
-+CONFIG_MTK_BROM_HEADER_INFO="media=snand;nandinfo=2k+64"
 +CONFIG_RESET_BUTTON_LABEL="back"
-+CONFIG_RESET_BUTTON_SETTLE_DELAY=0
-+CONFIG_ERR_PTR_OFFSET=0x0
-+# CONFIG_SPL is not set
-+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+# CONFIG_DEBUG_UART_BOARD_INIT is not set
-+CONFIG_IDENT_STRING=""
-+CONFIG_SYS_CLK_FREQ=0
-+# CONFIG_CHIP_DIP_SCAN is not set
-+# CONFIG_CMO_BY_VA_ONLY is not set
-+# CONFIG_ARMV8_MULTIENTRY is not set
-+# CONFIG_ARMV8_SET_SMPEN is not set
-+# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
-+
-+#
-+# ARMv8 secure monitor firmware
-+#
-+# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-+CONFIG_PSCI_RESET=y
-+# CONFIG_ARMV8_PSCI is not set
-+# CONFIG_ARMV8_EA_EL3_FIRST is not set
-+# CONFIG_ARMV8_CRYPTO is not set
-+# CONFIG_CMD_DEKBLOB is not set
-+# CONFIG_IMX_CAAM_DEK_ENCAP is not set
-+# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
-+# CONFIG_IMX_SECO_DEK_ENCAP is not set
-+# CONFIG_IMX_ELE_DEK_ENCAP is not set
-+# CONFIG_CMD_HDMIDETECT is not set
-+CONFIG_IMX_DCD_ADDR=0x00910000
-+CONFIG_SYS_MEM_TOP_HIDE=0x0
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+
-+#
-+# ARM debug
-+#
-+CONFIG_BUILD_TARGET=""
-+# CONFIG_PCI is not set
-+CONFIG_FWU_NUM_BANKS=2
-+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
 +CONFIG_DEBUG_UART=y
-+# CONFIG_AHCI is not set
-+# CONFIG_OF_BOARD_FIXUP is not set
-+
-+#
-+# Functionality shared between NXP SoCs
-+#
-+# CONFIG_NXP_ESBC is not set
-+
-+#
-+# General setup
-+#
-+CONFIG_LOCALVERSION=""
-+CONFIG_LOCALVERSION_AUTO=y
-+CONFIG_CC_IS_GCC=y
-+CONFIG_GCC_VERSION=130200
-+CONFIG_CLANG_VERSION=0
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-+# CONFIG_OPTIMIZE_INLINING is not set
-+CONFIG_ARCH_SUPPORTS_LTO=y
-+# CONFIG_LTO is not set
-+CONFIG_CC_HAS_ASM_INLINE=y
-+# CONFIG_XEN is not set
-+# CONFIG_ENV_VARS_UBOOT_CONFIG is not set
-+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-+# CONFIG_SYS_BOOT_GET_KBD is not set
-+CONFIG_SYS_MALLOC_F=y
-+# CONFIG_VALGRIND is not set
-+CONFIG_EXPERT=y
-+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-+# CONFIG_TOOLS_DEBUG is not set
-+CONFIG_PHYS_64BIT=y
-+CONFIG_FDT_64BIT=y
-+# CONFIG_REMAKE_ELF is not set
-+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-+CONFIG_PLATFORM_ELFENTRY="_start"
-+CONFIG_STACK_SIZE=0x1000000
-+CONFIG_SYS_SRAM_BASE=0x0
-+CONFIG_SYS_SRAM_SIZE=0x0
-+# CONFIG_MP is not set
-+CONFIG_HAVE_TEXT_BASE=y
-+# CONFIG_HAVE_SYS_UBOOT_START is not set
-+CONFIG_SYS_UBOOT_START=0x41e00000
-+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-+# CONFIG_API is not set
-+
-+#
-+# Boot options
-+#
-+
-+#
-+# Boot images
-+#
-+# CONFIG_ANDROID_BOOT_IMAGE is not set
-+# CONFIG_TIMESTAMP is not set
 +CONFIG_FIT=y
-+CONFIG_FIT_EXTERNAL_OFFSET=0x0
-+CONFIG_FIT_FULL_CHECK=y
-+# CONFIG_FIT_SIGNATURE is not set
-+# CONFIG_FIT_CIPHER is not set
-+# CONFIG_FIT_VERBOSE is not set
-+# CONFIG_FIT_BEST_MATCH is not set
-+CONFIG_FIT_PRINT=y
-+# CONFIG_SPL_LOAD_FIT_FULL is not set
-+CONFIG_PXE_UTILS=y
-+CONFIG_BOOTSTD=y
-+# CONFIG_BOOTSTD_FULL is not set
-+# CONFIG_BOOTSTD_DEFAULTS is not set
-+CONFIG_BOOTSTD_BOOTCOMMAND=y
-+CONFIG_BOOTMETH_GLOBAL=y
-+# CONFIG_BOOTMETH_CROS is not set
-+CONFIG_BOOTMETH_EXTLINUX=y
-+CONFIG_BOOTMETH_EXTLINUX_PXE=y
-+CONFIG_BOOTMETH_EFILOADER=y
-+CONFIG_BOOTMETH_VBE=y
-+CONFIG_BOOTMETH_VBE_REQUEST=y
-+CONFIG_BOOTMETH_VBE_SIMPLE=y
-+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-+# CONFIG_BOOTMETH_SCRIPT is not set
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+# CONFIG_SUPPORT_RAW_INITRD is not set
-+# CONFIG_CHROMEOS is not set
-+# CONFIG_CHROMEOS_VBOOT is not set
-+# CONFIG_RAMBOOT_PBL is not set
-+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-+# CONFIG_DISTRO_DEFAULTS is not set
-+
-+#
-+# Boot timing
-+#
-+# CONFIG_BOOTSTAGE is not set
-+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
-+# CONFIG_SHOW_BOOT_PROGRESS is not set
-+
-+#
-+# Boot media
-+#
 +CONFIG_NAND_BOOT=y
-+# CONFIG_ONENAND_BOOT is not set
-+# CONFIG_QSPI_BOOT is not set
-+# CONFIG_SATA_BOOT is not set
-+# CONFIG_SD_BOOT is not set
-+# CONFIG_SD_BOOT_QSPI is not set
 +CONFIG_SPI_BOOT=y
-+
-+#
-+# Autoboot options
-+#
-+CONFIG_AUTOBOOT=y
-+CONFIG_BOOTDELAY=2
-+# CONFIG_AUTOBOOT_KEYED is not set
-+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+# CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is not set
-+# CONFIG_BOOT_RETRY is not set
-+
-+#
-+# Image support
-+#
-+# CONFIG_IMAGE_PRE_LOAD is not set
-+
-+#
-+# Devicetree fixup
-+#
-+# CONFIG_OF_BOARD_SETUP is not set
-+# CONFIG_OF_SYSTEM_SETUP is not set
-+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-+# CONFIG_FDT_FIXUP_PARTITIONS is not set
-+# CONFIG_FDT_SIMPLEFB is not set
-+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-+# CONFIG_USE_BOOTARGS is not set
-+# CONFIG_BOOTARGS_SUBST is not set
-+# CONFIG_USE_BOOTCOMMAND is not set
 +CONFIG_USE_PREBOOT=y
 +CONFIG_DEFAULT_FDT_FILE="openwrt-one"
-+# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
-+# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
-+
-+#
-+# Configuration editor
-+#
-+# CONFIG_CEDIT is not set
-+
-+#
-+# Console
-+#
-+CONFIG_MENU=y
-+# CONFIG_CONSOLE_RECORD is not set
-+# CONFIG_DISABLE_CONSOLE is not set
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
-+# CONFIG_SILENT_CONSOLE is not set
-+# CONFIG_SPL_SILENT_CONSOLE is not set
-+# CONFIG_TPL_SILENT_CONSOLE is not set
-+# CONFIG_PRE_CONSOLE_BUFFER is not set
-+CONFIG_CONSOLE_FLUSH_SUPPORT=y
-+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
-+# CONFIG_CONSOLE_MUX is not set
-+# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set
-+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-+# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
-+# CONFIG_SYS_STDIO_DEREGISTER is not set
-+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-+# CONFIG_SYS_DEVICE_NULLDEV is not set
-+
-+#
-+# Logging
-+#
 +CONFIG_LOG=y
-+CONFIG_LOG_MAX_LEVEL=6
-+CONFIG_LOG_DEFAULT_LEVEL=6
-+CONFIG_LOG_CONSOLE=y
-+# CONFIG_LOGF_FILE is not set
-+# CONFIG_LOGF_LINE is not set
-+# CONFIG_LOGF_FUNC is not set
-+CONFIG_LOGF_FUNC_PAD=20
-+# CONFIG_LOG_SYSLOG is not set
-+# CONFIG_LOG_ERROR_RETURN is not set
-+
-+#
-+# Init options
-+#
-+# CONFIG_BOARD_TYPES is not set
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DISPLAY_BOARDINFO=y
-+# CONFIG_DISPLAY_BOARDINFO_LATE is not set
-+
-+#
-+# Start-up hooks
-+#
-+# CONFIG_CYCLIC is not set
-+CONFIG_EVENT=y
-+CONFIG_EVENT_DYNAMIC=y
-+# CONFIG_EVENT_DEBUG is not set
-+# CONFIG_ARCH_MISC_INIT is not set
-+# CONFIG_BOARD_EARLY_INIT_F is not set
-+# CONFIG_BOARD_EARLY_INIT_R is not set
-+# CONFIG_BOARD_POSTCLK_INIT is not set
 +CONFIG_BOARD_LATE_INIT=y
-+# CONFIG_CLOCKS is not set
-+# CONFIG_HWCONFIG is not set
-+CONFIG_LAST_STAGE_INIT=y
-+# CONFIG_MISC_INIT_R is not set
-+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-+# CONFIG_ID_EEPROM is not set
-+# CONFIG_RESET_PHY_R is not set
-+
-+#
-+# Security support
-+#
-+CONFIG_HASH=y
-+# CONFIG_STACKPROTECTOR is not set
-+# CONFIG_BOARD_RNG_SEED is not set
-+
-+#
-+# Update support
-+#
-+# CONFIG_UPDATE_TFTP is not set
-+# CONFIG_ANDROID_AB is not set
-+
-+#
-+# Blob list
-+#
-+# CONFIG_BLOBLIST is not set
-+CONFIG_SUPPORT_SPL=y
-+# CONFIG_VPL is not set
-+
-+#
-+# Command line interface
-+#
-+CONFIG_CMDLINE=y
 +CONFIG_HUSH_PARSER=y
-+CONFIG_CMDLINE_EDITING=y
-+# CONFIG_CMDLINE_PS_SUPPORT is not set
-+CONFIG_AUTO_COMPLETE=y
-+CONFIG_SYS_LONGHELP=y
 +CONFIG_SYS_PROMPT="OpenWrt One> "
-+CONFIG_SYS_PROMPT_HUSH_PS2="> "
 +CONFIG_SYS_MAXARGS=16
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_SYS_XTRACE=y
-+CONFIG_BUILD_BIN2C=y
-+
-+#
-+# Commands
-+#
-+
-+#
-+# Info commands
-+#
-+CONFIG_CMD_BDI=y
-+# CONFIG_CMD_BDINFO_EXTRA is not set
-+# CONFIG_CMD_CONFIG is not set
-+CONFIG_CMD_CONSOLE=y
 +CONFIG_CMD_CPU=y
-+# CONFIG_CMD_HISTORY is not set
 +CONFIG_CMD_LICENSE=y
-+# CONFIG_CMD_PMC is not set
-+
-+#
-+# Boot commands
-+#
-+CONFIG_CMD_BOOTD=y
-+CONFIG_CMD_BOOTM=y
-+# CONFIG_CMD_BOOTDEV is not set
-+CONFIG_CMD_BOOTFLOW=y
-+# CONFIG_CMD_BOOTMETH is not set
-+CONFIG_BOOTM_EFI=y
-+# CONFIG_CMD_BOOTZ is not set
-+CONFIG_CMD_BOOTI=y
-+CONFIG_BOOTM_LINUX=y
 +# CONFIG_BOOTM_NETBSD is not set
-+# CONFIG_BOOTM_OPENRTOS is not set
-+# CONFIG_BOOTM_OSE is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
-+# CONFIG_CMD_VBE is not set
 +# CONFIG_BOOTM_VXWORKS is not set
-+CONFIG_SYS_BOOTM_LEN=0x4000000
-+CONFIG_CMD_BOOTEFI=y
-+CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-+# CONFIG_CMD_BOOTEFI_HELLO is not set
-+# CONFIG_CMD_BOOTEFI_SELFTEST is not set
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_ADTIMG is not set
-+CONFIG_CMD_ELF=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_GO=y
-+CONFIG_CMD_RUN=y
-+CONFIG_CMD_IMI=y
-+# CONFIG_CMD_IMLS is not set
-+CONFIG_CMD_XIMG=y
-+# CONFIG_CMD_ZBOOT is not set
-+
-+#
-+# Environment commands
-+#
 +CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_EXPORTENV=y
-+CONFIG_CMD_IMPORTENV=y
-+CONFIG_CMD_EDITENV=y
-+# CONFIG_CMD_GREPENV is not set
-+CONFIG_CMD_SAVEENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_ENV_EXISTS=y
-+CONFIG_CMD_ENV_READMEM=y
-+# CONFIG_CMD_ENV_CALLBACK is not set
 +CONFIG_CMD_ENV_FLAGS=y
-+# CONFIG_CMD_NVEDIT_EFI is not set
-+# CONFIG_CMD_NVEDIT_INDIRECT is not set
-+# CONFIG_CMD_NVEDIT_INFO is not set
-+# CONFIG_CMD_NVEDIT_LOAD is not set
-+# CONFIG_CMD_NVEDIT_SELECT is not set
-+
-+#
-+# Memory commands
-+#
-+# CONFIG_CMD_BINOP is not set
-+# CONFIG_CMD_BLOBLIST is not set
-+CONFIG_CMD_CRC32=y
-+# CONFIG_CRC32_VERIFY is not set
-+# CONFIG_CMD_EEPROM is not set
-+# CONFIG_LOOPW is not set
-+# CONFIG_CMD_MD5SUM is not set
-+# CONFIG_CMD_MEMINFO is not set
-+CONFIG_CMD_MEMORY=y
-+# CONFIG_CMD_MEM_SEARCH is not set
-+# CONFIG_CMD_MX_CYCLIC is not set
-+CONFIG_CMD_RANDOM=y
-+# CONFIG_CMD_MEMTEST is not set
-+# CONFIG_CMD_SHA1SUM is not set
 +CONFIG_CMD_STRINGS=y
-+
-+#
-+# Compression commands
-+#
-+CONFIG_CMD_LZMADEC=y
 +# CONFIG_CMD_UNLZ4 is not set
 +# CONFIG_CMD_UNZIP is not set
-+# CONFIG_CMD_ZIP is not set
-+
-+#
-+# Device access commands
-+#
-+# CONFIG_CMD_ARMFLASH is not set
-+# CONFIG_CMD_BIND is not set
-+# CONFIG_CMD_CLK is not set
-+# CONFIG_CMD_DEMO is not set
-+# CONFIG_CMD_DFU is not set
 +CONFIG_CMD_DM=y
-+CONFIG_CMD_FLASH=y
-+# CONFIG_CMD_FPGAD is not set
-+# CONFIG_CMD_FUSE is not set
 +CONFIG_CMD_GPIO=y
-+# CONFIG_CMD_GPIO_READ is not set
 +CONFIG_CMD_PWM=y
-+# CONFIG_CMD_GPT is not set
-+# CONFIG_RANDOM_UUID is not set
-+# CONFIG_CMD_IDE is not set
-+# CONFIG_CMD_IO is not set
-+# CONFIG_CMD_IOTRACE is not set
-+# CONFIG_CMD_I2C is not set
-+CONFIG_CMD_LOADB=y
-+# CONFIG_CMD_LOADM is not set
-+CONFIG_CMD_LOADS=y
-+# CONFIG_LOADS_ECHO is not set
-+# CONFIG_CMD_SAVES is not set
-+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-+CONFIG_CMD_LOADXY_TIMEOUT=90
-+# CONFIG_CMD_LSBLK is not set
-+# CONFIG_CMD_MBR is not set
-+# CONFIG_CMD_CLONE is not set
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND_EXT=y
-+# CONFIG_CMD_ONENAND is not set
-+# CONFIG_CMD_OSD is not set
-+# CONFIG_CMD_PART is not set
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PINMUX=y
-+# CONFIG_CMD_POWEROFF is not set
-+# CONFIG_CMD_READ is not set
-+# CONFIG_CMD_SATA is not set
-+# CONFIG_CMD_SDRAM is not set
-+CONFIG_CMD_SF=y
 +CONFIG_CMD_SF_TEST=y
-+# CONFIG_CMD_SPI is not set
-+# CONFIG_CMD_TSI148 is not set
-+# CONFIG_CMD_UNIVERSE is not set
 +CONFIG_CMD_USB=y
-+# CONFIG_CMD_USB_SDP is not set
-+# CONFIG_CMD_RKMTD is not set
-+# CONFIG_CMD_WRITE is not set
-+
-+#
-+# Shell scripting commands
-+#
-+# CONFIG_CMD_CAT is not set
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_SETEXPR=y
-+# CONFIG_CMD_SETEXPR_FMT is not set
-+# CONFIG_CMD_XXD is not set
-+
-+#
-+# Android support commands
-+#
-+CONFIG_CMD_NET=y
-+CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_DHCP=y
-+# CONFIG_BOOTP_MAY_FAIL is not set
-+CONFIG_BOOTP_BOOTPATH=y
-+# CONFIG_BOOTP_VENDOREX is not set
-+# CONFIG_BOOTP_BOOTFILESIZE is not set
-+CONFIG_BOOTP_DNS=y
-+# CONFIG_BOOTP_DNS2 is not set
-+CONFIG_BOOTP_GATEWAY=y
-+CONFIG_BOOTP_HOSTNAME=y
-+# CONFIG_BOOTP_PREFER_SERVERIP is not set
-+CONFIG_BOOTP_SUBNETMASK=y
-+# CONFIG_BOOTP_NISDOMAIN is not set
-+# CONFIG_BOOTP_NTPSERVER is not set
-+# CONFIG_BOOTP_TIMEOFFSET is not set
-+# CONFIG_CMD_PCAP is not set
-+CONFIG_BOOTP_PXE=y
-+CONFIG_BOOTP_PXE_CLIENTARCH=0x16
-+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
-+CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
-+CONFIG_CMD_TFTPBOOT=y
-+# CONFIG_CMD_TFTPPUT is not set
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_NET_TFTP_VARS=y
 +CONFIG_CMD_RARP=y
-+# CONFIG_CMD_NFS is not set
-+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-+# CONFIG_CMD_WGET is not set
-+# CONFIG_CMD_MII is not set
-+# CONFIG_CMD_MDIO is not set
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_ETHSW is not set
 +CONFIG_CMD_PXE=y
-+# CONFIG_CMD_WOL is not set
-+
-+#
-+# Misc commands
-+#
-+# CONFIG_CMD_2048 is not set
-+# CONFIG_CMD_BSP is not set
-+CONFIG_CMD_BLOCK_CACHE=y
-+CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
-+# CONFIG_CMD_CONITRACE is not set
-+# CONFIG_CMD_CLS is not set
-+# CONFIG_CMD_EFIDEBUG is not set
-+CONFIG_CMD_EFICONFIG=y
-+# CONFIG_CMD_EXCEPTION is not set
-+CONFIG_CMD_LED=y
-+# CONFIG_CMD_INI is not set
-+# CONFIG_CMD_DATE is not set
-+# CONFIG_CMD_TIME is not set
-+# CONFIG_CMD_GETTIME is not set
-+# CONFIG_CMD_PAUSE is not set
-+CONFIG_CMD_SLEEP=y
-+# CONFIG_CMD_TIMER is not set
-+# CONFIG_CMD_SYSBOOT is not set
-+# CONFIG_CMD_QFW is not set
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_PSTORE_MEM_SIZE=0x10000
-+CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000
-+CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000
-+CONFIG_CMD_PSTORE_FTRACE_SIZE=0x1000
-+CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000
-+CONFIG_CMD_PSTORE_ECC_SIZE=0
-+# CONFIG_CMD_TERMINAL is not set
 +CONFIG_CMD_UUID=y
-+
-+#
-+# TI specific command line interface
-+#
-+
-+#
-+# Power commands
-+#
-+
-+#
-+# Security commands
-+#
-+# CONFIG_CMD_AES is not set
-+# CONFIG_CMD_BLOB is not set
 +CONFIG_CMD_HASH=y
-+# CONFIG_CMD_HVC is not set
 +CONFIG_CMD_SMC=y
-+# CONFIG_HASH_VERIFY is not set
-+
-+#
-+# Firmware commands
-+#
-+
-+#
-+# Filesystem commands
-+#
-+# CONFIG_CMD_BTRFS is not set
-+# CONFIG_CMD_EROFS is not set
-+# CONFIG_CMD_EXT2 is not set
-+# CONFIG_CMD_EXT4 is not set
 +CONFIG_CMD_FAT=y
-+# CONFIG_CMD_SQUASHFS is not set
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_FS_UUID=y
-+# CONFIG_CMD_JFFS2 is not set
-+# CONFIG_CMD_MTDPARTS is not set
-+CONFIG_MTDIDS_DEFAULT=""
-+CONFIG_MTDPARTS_DEFAULT=""
-+# CONFIG_CMD_REISER is not set
-+# CONFIG_CMD_ZFS is not set
-+
-+#
-+# Debug commands
-+#
-+# CONFIG_CMD_DIAG is not set
-+# CONFIG_CMD_EVENT is not set
-+# CONFIG_CMD_LOG is not set
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+
-+#
-+# Partition Types
-+#
-+CONFIG_PARTITIONS=y
-+# CONFIG_MAC_PARTITION is not set
-+CONFIG_DOS_PARTITION=y
-+# CONFIG_ISO_PARTITION is not set
-+# CONFIG_AMIGA_PARTITION is not set
-+# CONFIG_EFI_PARTITION is not set
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_SUPPORT_OF_CONTROL=y
-+
-+#
-+# Device Tree Control
-+#
-+CONFIG_OF_CONTROL=y
-+CONFIG_OF_REAL=y
-+# CONFIG_OF_LIVE is not set
-+CONFIG_OF_SEPARATE=y
-+# CONFIG_OF_EMBED is not set
-+# CONFIG_OF_BOARD is not set
-+# CONFIG_OF_OMIT_DTB is not set
-+CONFIG_DEVICE_TREE_INCLUDES=""
-+CONFIG_OF_LIST="openwrt-one"
-+# CONFIG_MULTI_DTB_FIT is not set
-+CONFIG_OF_TAG_MIGRATE=y
-+# CONFIG_OF_DTB_PROPS_REMOVE is not set
-+
-+#
-+# Environment
-+#
-+CONFIG_ENV_SUPPORT=y
-+CONFIG_SAVEENV=y
 +CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_MIN_ENTRIES=64
-+CONFIG_ENV_MAX_ENTRIES=512
-+CONFIG_ENV_IS_DEFAULT=y
-+CONFIG_ENV_IS_NOWHERE=y
-+# CONFIG_ENV_IS_IN_EEPROM is not set
-+# CONFIG_ENV_IS_IN_FAT is not set
-+# CONFIG_ENV_IS_IN_EXT4 is not set
-+# CONFIG_ENV_IS_IN_FLASH is not set
-+# CONFIG_ENV_IS_IN_MTD is not set
-+# CONFIG_ENV_IS_IN_NAND is not set
-+# CONFIG_ENV_IS_IN_NVRAM is not set
-+# CONFIG_ENV_IS_IN_ONENAND is not set
-+# CONFIG_ENV_IS_IN_REMOTE is not set
-+# CONFIG_ENV_IS_IN_SPI_FLASH is not set
-+# CONFIG_ENV_IS_IN_UBI is not set
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 +CONFIG_USE_DEFAULT_ENV_FILE=y
 +CONFIG_DEFAULT_ENV_FILE="openwrt-one-nor_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+# CONFIG_ENV_IMPORT_FDT is not set
-+# CONFIG_ENV_APPEND is not set
-+# CONFIG_ENV_WRITEABLE_LIST is not set
-+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-+# CONFIG_USE_BOOTFILE is not set
-+# CONFIG_USE_ETHPRIME is not set
-+# CONFIG_USE_HOSTNAME is not set
-+# CONFIG_VERSION_VARIABLE is not set
-+CONFIG_NET=y
-+CONFIG_ARP_TIMEOUT=5000
-+CONFIG_NET_RETRY_COUNT=5
-+CONFIG_PROT_UDP=y
-+CONFIG_BOOTDEV_ETH=y
-+# CONFIG_BOOTP_SEND_HOSTNAME is not set
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
-+# CONFIG_NETCONSOLE is not set
-+# CONFIG_IP_DEFRAG is not set
-+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-+CONFIG_TFTP_BLOCKSIZE=1468
-+# CONFIG_TFTP_PORT is not set
-+CONFIG_TFTP_WINDOWSIZE=1
-+# CONFIG_TFTP_TSIZE is not set
-+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-+# CONFIG_KEEP_SERVERADDR is not set
-+# CONFIG_UDP_CHECKSUM is not set
-+# CONFIG_BOOTP_SERVERIP is not set
-+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-+# CONFIG_USE_GATEWAYIP is not set
-+# CONFIG_USE_IPADDR is not set
-+# CONFIG_USE_NETMASK is not set
-+# CONFIG_USE_ROOTPATH is not set
-+# CONFIG_USE_SERVERIP is not set
-+# CONFIG_PROT_TCP is not set
-+# CONFIG_IPV6 is not set
-+CONFIG_SYS_RX_ETH_BUFFER=4
-+
-+#
-+# Device Drivers
-+#
-+
-+#
-+# Generic Driver Options
-+#
-+CONFIG_DM=y
-+# CONFIG_DM_WARN is not set
-+# CONFIG_DM_DEBUG is not set
-+# CONFIG_DM_STATS is not set
-+CONFIG_DM_DEVICE_REMOVE=y
-+CONFIG_DM_EVENT=y
-+CONFIG_DM_STDIO=y
-+CONFIG_DM_SEQ_ALIAS=y
-+# CONFIG_DM_DMA is not set
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+# CONFIG_DEVRES is not set
-+CONFIG_SIMPLE_BUS=y
-+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-+# CONFIG_SIMPLE_PM_BUS is not set
-+CONFIG_OF_TRANSLATE=y
-+# CONFIG_TRANSLATION_OFFSET is not set
-+CONFIG_DM_DEV_READ_INLINE=y
-+# CONFIG_OFNODE_MULTI_TREE is not set
-+# CONFIG_BOUNCE_BUFFER is not set
-+# CONFIG_ADC is not set
-+# CONFIG_ADC_EXYNOS is not set
-+# CONFIG_ADC_SANDBOX is not set
-+# CONFIG_SARADC_MESON is not set
-+# CONFIG_SARADC_ROCKCHIP is not set
-+# CONFIG_SATA is not set
-+# CONFIG_SCSI_AHCI is not set
-+
-+#
-+# SATA/SCSI device support
-+#
-+# CONFIG_AXI is not set
-+
-+#
-+# Bus devices
-+#
-+CONFIG_BLK=y
-+CONFIG_BLOCK_CACHE=y
-+# CONFIG_BLKMAP is not set
-+# CONFIG_EFI_MEDIA is not set
-+# CONFIG_IDE is not set
-+# CONFIG_LBA48 is not set
-+# CONFIG_SYS_64BIT_LBA is not set
-+# CONFIG_RKMTD is not set
-+# CONFIG_BOOTCOUNT_LIMIT is not set
-+
-+#
-+# Button Support
-+#
 +CONFIG_BUTTON=y
-+# CONFIG_BUTTON_ADC is not set
 +CONFIG_BUTTON_GPIO=y
-+
-+#
-+# Cache Controller drivers
-+#
-+# CONFIG_CACHE is not set
-+# CONFIG_L2X0_CACHE is not set
-+# CONFIG_V5L2_CACHE is not set
-+# CONFIG_NCORE_CACHE is not set
-+# CONFIG_SIFIVE_CCACHE is not set
-+
-+#
-+# Clock
-+#
 +CONFIG_CLK=y
-+# CONFIG_CLK_CCF is not set
-+# CONFIG_CLK_GPIO is not set
-+# CONFIG_CLK_CDCE9XX is not set
-+# CONFIG_CLK_ICS8N3QV01 is not set
-+# CONFIG_CLK_K210 is not set
-+# CONFIG_CLK_MPC83XX is not set
-+# CONFIG_CLK_XLNX_CLKWZRD is not set
-+# CONFIG_CLK_AT91 is not set
-+# CONFIG_CLK_RCAR is not set
-+# CONFIG_CLK_RCAR_CPG_LIB is not set
-+# CONFIG_CLK_SIFIVE is not set
-+# CONFIG_CLK_TI_AM3_DPLL is not set
-+# CONFIG_CLK_TI_CTRL is not set
-+# CONFIG_CLK_TI_GATE is not set
-+# CONFIG_CLK_K3 is not set
-+CONFIG_CPU=y
-+# CONFIG_CPU_IMX is not set
-+
-+#
-+# Hardware crypto devices
-+#
-+# CONFIG_DM_HASH is not set
-+# CONFIG_FSL_CAAM is not set
-+CONFIG_CAAM_64BIT=y
-+# CONFIG_SYS_FSL_SEC_BE is not set
-+# CONFIG_SYS_FSL_SEC_LE is not set
-+# CONFIG_NPCM_AES is not set
-+# CONFIG_NPCM_SHA is not set
-+# CONFIG_DDR_SPD is not set
-+# CONFIG_IMX_SNPS_DDR_PHY is not set
-+
-+#
-+# Demo for driver model
-+#
-+# CONFIG_DM_DEMO is not set
-+
-+#
-+# DFU support
-+#
-+
-+#
-+# DMA Support
-+#
-+# CONFIG_DMA is not set
-+# CONFIG_DMA_LPC32XX is not set
-+# CONFIG_TI_EDMA3 is not set
-+# CONFIG_DMA_LEGACY is not set
-+
-+#
-+# Extcon Support
-+#
-+# CONFIG_EXTCON is not set
-+
-+#
-+# Fastboot support
-+#
-+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-+CONFIG_FIRMWARE=y
-+CONFIG_ARM_PSCI_FW=y
-+# CONFIG_ZYNQMP_FIRMWARE is not set
-+# CONFIG_ARM_SMCCC_FEATURES is not set
-+# CONFIG_ARM_FFA_TRANSPORT is not set
-+# CONFIG_SCMI_FIRMWARE is not set
-+# CONFIG_DM_FUZZING_ENGINE is not set
-+
-+#
-+# FPGA support
-+#
-+# CONFIG_FPGA_ALTERA is not set
-+# CONFIG_FPGA_SOCFPGA is not set
-+# CONFIG_FPGA_LATTICE is not set
-+# CONFIG_FPGA_XILINX is not set
-+# CONFIG_DM_FPGA is not set
-+# CONFIG_FWU_MDATA is not set
-+CONFIG_GPIO=y
 +CONFIG_GPIO_HOG=y
-+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
-+# CONFIG_ALTERA_PIO is not set
-+# CONFIG_BCM2835_GPIO is not set
-+# CONFIG_DWAPB_GPIO is not set
-+# CONFIG_AT91_GPIO is not set
-+# CONFIG_ATMEL_PIO4 is not set
-+# CONFIG_ASPEED_GPIO is not set
-+# CONFIG_DA8XX_GPIO is not set
-+# CONFIG_HIKEY_GPIO is not set
-+# CONFIG_INTEL_BROADWELL_GPIO is not set
-+# CONFIG_INTEL_GPIO is not set
-+# CONFIG_INTEL_ICH6_GPIO is not set
-+# CONFIG_IMX_RGPIO2P is not set
-+# CONFIG_IPROC_GPIO is not set
-+# CONFIG_HSDK_CREG_GPIO is not set
-+# CONFIG_KIRKWOOD_GPIO is not set
-+# CONFIG_LPC32XX_GPIO is not set
-+# CONFIG_MCP230XX_GPIO is not set
-+# CONFIG_MSM_GPIO is not set
-+# CONFIG_MXC_GPIO is not set
-+# CONFIG_MXS_GPIO is not set
-+# CONFIG_NPCM_GPIO is not set
-+# CONFIG_CMD_PCA953X is not set
-+# CONFIG_ROCKCHIP_GPIO is not set
-+# CONFIG_XILINX_GPIO is not set
-+# CONFIG_TCA642X is not set
-+# CONFIG_TEGRA_GPIO is not set
-+# CONFIG_TEGRA186_GPIO is not set
-+# CONFIG_VYBRID_GPIO is not set
-+# CONFIG_SIFIVE_GPIO is not set
-+# CONFIG_ZYNQ_GPIO is not set
-+# CONFIG_DM_74X164 is not set
-+# CONFIG_PCA953X is not set
-+# CONFIG_MPC8XXX_GPIO is not set
-+# CONFIG_MPC8XX_GPIO is not set
-+# CONFIG_NX_GPIO is not set
-+# CONFIG_NOMADIK_GPIO is not set
-+# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
-+# CONFIG_SLG7XL45106_I2C_GPO is not set
-+# CONFIG_TURRIS_OMNIA_MCU is not set
-+# CONFIG_FTGPIO010 is not set
-+
-+#
-+# Hardware Spinlock Support
-+#
-+# CONFIG_DM_HWSPINLOCK is not set
-+CONFIG_I2C=y
-+# CONFIG_DM_I2C is not set
-+# CONFIG_SYS_I2C_LEGACY is not set
-+# CONFIG_SPL_SYS_I2C_LEGACY is not set
-+# CONFIG_SYS_I2C_FSL is not set
-+# CONFIG_SYS_I2C_DW is not set
-+# CONFIG_SYS_I2C_IMX_LPI2C is not set
-+# CONFIG_SYS_I2C_MTK is not set
-+# CONFIG_SYS_I2C_MICROCHIP is not set
-+# CONFIG_SYS_I2C_MXC is not set
-+# CONFIG_SYS_I2C_NPCM is not set
-+# CONFIG_SYS_I2C_SOFT is not set
-+# CONFIG_SYS_I2C_MV is not set
-+# CONFIG_SYS_I2C_MVTWSI is not set
-+CONFIG_INPUT=y
-+# CONFIG_DM_KEYBOARD is not set
-+# CONFIG_CROS_EC_KEYB is not set
-+# CONFIG_TEGRA_KEYBOARD is not set
-+# CONFIG_TWL4030_INPUT is not set
-+
-+#
-+# IOMMU device drivers
-+#
-+# CONFIG_IOMMU is not set
-+
-+#
-+# LED Support
-+#
 +CONFIG_LED=y
-+# CONFIG_LED_PWM is not set
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
-+# CONFIG_LED_STATUS is not set
-+
-+#
-+# Mailbox Controller Support
-+#
-+# CONFIG_DM_MAILBOX is not set
-+
-+#
-+# Memory Controller drivers
-+#
-+# CONFIG_MEMORY is not set
-+# CONFIG_ATMEL_EBI is not set
-+# CONFIG_MFD_ATMEL_SMC is not set
-+
-+#
-+# Multifunction device drivers
-+#
-+# CONFIG_MISC is not set
-+# CONFIG_NVMEM is not set
-+# CONFIG_SPL_NVMEM is not set
-+# CONFIG_SMSC_LPC47M is not set
-+# CONFIG_SMSC_SIO1007 is not set
-+# CONFIG_CROS_EC is not set
-+# CONFIG_DS4510 is not set
-+# CONFIG_FSL_SEC_MON is not set
-+# CONFIG_IRQ is not set
-+# CONFIG_NPCM_HOST is not set
-+# CONFIG_NUVOTON_NCT6102D is not set
-+# CONFIG_PWRSEQ is not set
-+# CONFIG_PCA9551_LED is not set
-+# CONFIG_TEST_DRV is not set
-+# CONFIG_USB_HUB_USB251XB is not set
-+# CONFIG_TWL4030_LED is not set
-+# CONFIG_WINBOND_W83627 is not set
-+# CONFIG_FS_LOADER is not set
-+
-+#
-+# MMC Host controller Support
-+#
 +# CONFIG_MMC is not set
-+# CONFIG_MMC_BROKEN_CD is not set
-+# CONFIG_DM_MMC is not set
-+# CONFIG_FSL_ESDHC is not set
-+# CONFIG_FSL_ESDHC_IMX is not set
-+
-+#
-+# MTD Support
-+#
-+CONFIG_MTD_PARTITIONS=y
 +CONFIG_MTD=y
 +CONFIG_DM_MTD=y
-+# CONFIG_MTD_NOR_FLASH is not set
-+# CONFIG_MTD_CONCAT is not set
-+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
-+# CONFIG_FLASH_CFI_DRIVER is not set
-+# CONFIG_CFI_FLASH is not set
-+# CONFIG_ALTERA_QSPI is not set
-+# CONFIG_HBMC_AM654 is not set
-+# CONFIG_SAMSUNG_ONENAND is not set
-+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
-+CONFIG_MTD_NAND_CORE=y
 +# CONFIG_MTD_RAW_NAND is not set
 +CONFIG_MTD_SPI_NAND=y
-+
-+#
-+# SPI Flash Support
-+#
 +CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH=y
-+CONFIG_SF_DEFAULT_BUS=0
-+CONFIG_SF_DEFAULT_CS=0
-+# CONFIG_BOOTDEV_SPI_FLASH is not set
 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-+CONFIG_SPI_FLASH_SMART_HWCAPS=y
-+# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
-+# CONFIG_SPI_FLASH_SOFT_RESET is not set
-+# CONFIG_SPI_FLASH_BAR is not set
-+CONFIG_SPI_FLASH_LOCK=y
-+CONFIG_SPI_FLASH_UNLOCK_ALL=y
-+# CONFIG_SPI_FLASH_ATMEL is not set
 +CONFIG_SPI_FLASH_EON=y
 +CONFIG_SPI_FLASH_GIGADEVICE=y
 +CONFIG_SPI_FLASH_ISSI=y
 +CONFIG_SPI_FLASH_MACRONIX=y
 +CONFIG_SPI_FLASH_SPANSION=y
-+# CONFIG_SPI_FLASH_S28HX_T is not set
 +CONFIG_SPI_FLASH_STMICRO=y
-+# CONFIG_SPI_FLASH_MT35XU is not set
-+# CONFIG_SPI_FLASH_SST is not set
 +CONFIG_SPI_FLASH_WINBOND=y
 +CONFIG_SPI_FLASH_XMC=y
 +CONFIG_SPI_FLASH_XTX=y
-+# CONFIG_SPI_FLASH_ZBIT is not set
-+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-+# CONFIG_SPI_FLASH_DATAFLASH is not set
 +CONFIG_SPI_FLASH_MTD=y
-+
-+#
-+# UBI support
-+#
 +CONFIG_UBI_SILENCE_MSG=y
-+CONFIG_MTD_UBI=y
-+CONFIG_MTD_UBI_MODULE=y
-+CONFIG_MTD_UBI_WL_THRESHOLD=4096
-+CONFIG_MTD_UBI_BEB_LIMIT=20
-+# CONFIG_MTD_UBI_FASTMAP is not set
-+# CONFIG_NVMXIP is not set
-+# CONFIG_NVMXIP_QSPI is not set
-+# CONFIG_NMBM is not set
-+
-+#
-+# Multiplexer drivers
-+#
-+# CONFIG_MULTIPLEXER is not set
-+# CONFIG_BITBANGMII is not set
-+# CONFIG_MV88E6352_SWITCH is not set
-+CONFIG_PHYLIB=y
-+# CONFIG_PHY_ADDR_ENABLE is not set
-+# CONFIG_B53_SWITCH is not set
-+# CONFIG_MV88E61XX_SWITCH is not set
-+# CONFIG_PHYLIB_10G is not set
-+# CONFIG_PHY_ADIN is not set
-+# CONFIG_PHY_AIROHA is not set
-+# CONFIG_PHY_AQUANTIA is not set
-+# CONFIG_PHY_ATHEROS is not set
-+# CONFIG_SPL_PHY_ATHEROS is not set
-+# CONFIG_PHY_BROADCOM is not set
-+# CONFIG_PHY_CORTINA is not set
-+# CONFIG_PHY_DAVICOM is not set
-+# CONFIG_PHY_ET1011C is not set
-+# CONFIG_PHY_LXT is not set
-+# CONFIG_PHY_MARVELL is not set
-+# CONFIG_PHY_MARVELL_10G is not set
-+# CONFIG_PHY_MESON_GXL is not set
-+# CONFIG_PHY_MICREL is not set
-+# CONFIG_PHY_MOTORCOMM is not set
-+# CONFIG_PHY_MSCC is not set
-+# CONFIG_PHY_NATSEMI is not set
-+# CONFIG_PHY_NXP_C45_TJA11XX is not set
-+# CONFIG_PHY_NXP_TJA11XX is not set
-+# CONFIG_PHY_REALTEK is not set
-+# CONFIG_PHY_SMSC is not set
-+# CONFIG_PHY_TERANETICS is not set
-+# CONFIG_PHY_TI is not set
-+# CONFIG_PHY_TI_DP83867 is not set
-+# CONFIG_PHY_TI_DP83869 is not set
-+# CONFIG_PHY_TI_GENERIC is not set
-+# CONFIG_PHY_VITESSE is not set
-+# CONFIG_PHY_XILINX is not set
-+# CONFIG_PHY_XILINX_GMII2RGMII is not set
-+# CONFIG_PHY_XWAY is not set
-+# CONFIG_PHY_ETHERNET_ID is not set
 +CONFIG_PHY_FIXED=y
-+# CONFIG_PHY_NCSI is not set
-+# CONFIG_FSL_MEMAC is not set
-+CONFIG_PHY_RESET_DELAY=0
-+# CONFIG_FSL_PFE is not set
-+CONFIG_ETH=y
-+CONFIG_DM_ETH=y
-+# CONFIG_DM_MDIO is not set
-+# CONFIG_DM_ETH_PHY is not set
-+CONFIG_NETDEVICES=y
-+# CONFIG_PHY_GIGE is not set
-+# CONFIG_ALTERA_TSE is not set
-+# CONFIG_BCM_SF2_ETH is not set
-+# CONFIG_BCMGENET is not set
-+# CONFIG_BNXT_ETH is not set
-+# CONFIG_CALXEDA_XGMAC is not set
-+# CONFIG_DRIVER_DM9000 is not set
-+# CONFIG_DWC_ETH_QOS is not set
-+# CONFIG_EEPRO100 is not set
-+# CONFIG_ETH_DESIGNWARE is not set
-+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-+# CONFIG_ETHOC is not set
-+# CONFIG_FMAN_ENET is not set
-+# CONFIG_FTMAC100 is not set
-+# CONFIG_FTGMAC100 is not set
-+# CONFIG_MCFFEC is not set
-+# CONFIG_FSLDMAFEC is not set
-+# CONFIG_KS8851_MLL is not set
-+# CONFIG_LITEETH is not set
-+# CONFIG_MACB is not set
-+# CONFIG_NET_NPCM750 is not set
-+# CONFIG_PCH_GBE is not set
-+# CONFIG_RGMII is not set
-+# CONFIG_MII is not set
-+# CONFIG_RMII is not set
-+# CONFIG_PCNET is not set
-+# CONFIG_QE_UEC is not set
-+# CONFIG_RTL8139 is not set
-+# CONFIG_SMC911X is not set
-+# CONFIG_SUN7I_GMAC is not set
-+# CONFIG_SUN4I_EMAC is not set
-+# CONFIG_SUN8I_EMAC is not set
-+# CONFIG_SH_ETHER is not set
-+# CONFIG_DRIVER_TI_CPSW is not set
-+# CONFIG_DRIVER_TI_EMAC is not set
-+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-+# CONFIG_TULIP is not set
-+# CONFIG_XILINX_AXIEMAC is not set
-+# CONFIG_VSC7385_ENET is not set
-+# CONFIG_XILINX_EMACLITE is not set
-+# CONFIG_ZYNQ_GEM is not set
-+# CONFIG_SYS_DPAA_QBMAN is not set
-+# CONFIG_TSEC_ENET is not set
 +CONFIG_MEDIATEK_ETH=y
-+# CONFIG_HIFEMAC_ETH is not set
-+# CONFIG_HIGMACV300_ETH is not set
-+# CONFIG_NVME is not set
-+# CONFIG_NVME_APPLE is not set
-+
-+#
-+# PCI Endpoint
-+#
-+# CONFIG_PCI_ENDPOINT is not set
-+# CONFIG_X86_PCH7 is not set
-+# CONFIG_X86_PCH9 is not set
-+
-+#
-+# PHY Subsystem
-+#
 +CONFIG_PHY=y
-+# CONFIG_NOP_PHY is not set
-+# CONFIG_MIPI_DPHY_HELPERS is not set
-+# CONFIG_BCM_SR_PCIE_PHY is not set
-+# CONFIG_OMAP_USB2_PHY is not set
 +CONFIG_PHY_MTK_TPHY=y
-+
-+#
-+# Rockchip PHY driver
-+#
-+# CONFIG_PHY_CADENCE_SIERRA is not set
-+# CONFIG_PHY_CADENCE_TORRENT is not set
-+# CONFIG_MSM8916_USB_PHY is not set
-+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-+
-+#
-+# Pin controllers
-+#
 +CONFIG_PINCTRL=y
-+CONFIG_PINCTRL_FULL=y
-+CONFIG_PINCTRL_GENERIC=y
-+CONFIG_PINMUX=y
 +CONFIG_PINCONF=y
-+CONFIG_PINCONF_RECURSIVE=y
-+# CONFIG_PINCTRL_AT91 is not set
-+# CONFIG_PINCTRL_AT91PIO4 is not set
-+# CONFIG_PINCTRL_INTEL is not set
-+# CONFIG_PINCTRL_QE is not set
-+# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
-+# CONFIG_PINCTRL_SINGLE is not set
-+# CONFIG_PINCTRL_STM32 is not set
-+# CONFIG_PINCTRL_STMFX is not set
-+# CONFIG_PINCTRL_K210 is not set
-+CONFIG_PINCTRL_MTK=y
-+# CONFIG_PINCTRL_MT7622 is not set
-+# CONFIG_PINCTRL_MT7623 is not set
-+# CONFIG_PINCTRL_MT7629 is not set
 +CONFIG_PINCTRL_MT7981=y
-+# CONFIG_PINCTRL_MT7986 is not set
-+# CONFIG_PINCTRL_MT7988 is not set
-+# CONFIG_PINCTRL_MT8512 is not set
-+# CONFIG_PINCTRL_MT8516 is not set
-+# CONFIG_PINCTRL_MT8518 is not set
-+CONFIG_POWER=y
-+# CONFIG_POWER_LEGACY is not set
-+# CONFIG_ACPI_PMC is not set
-+
-+#
-+# Power Domain Support
-+#
 +CONFIG_POWER_DOMAIN=y
-+# CONFIG_APPLE_PMGR_POWER_DOMAIN is not set
 +CONFIG_MTK_POWER_DOMAIN=y
-+# CONFIG_DM_PMIC is not set
-+# CONFIG_PMIC_TPS65217 is not set
-+# CONFIG_POWER_TPS65218 is not set
-+# CONFIG_POWER_TPS62362 is not set
-+# CONFIG_DM_REGULATOR is not set
-+# CONFIG_TPS6586X_POWER is not set
-+# CONFIG_POWER_MT6323 is not set
 +CONFIG_DM_PWM=y
-+# CONFIG_PWM_ASPEED is not set
-+# CONFIG_PWM_CADENCE_TTC is not set
-+# CONFIG_PWM_CROS_EC is not set
-+# CONFIG_PWM_EXYNOS is not set
-+# CONFIG_PWM_IMX is not set
-+# CONFIG_PWM_MESON is not set
 +CONFIG_PWM_MTK=y
-+# CONFIG_PWM_ROCKCHIP is not set
-+# CONFIG_PWM_SANDBOX is not set
-+# CONFIG_PWM_SIFIVE is not set
-+# CONFIG_PWM_TEGRA is not set
-+# CONFIG_PWM_SUNXI is not set
-+# CONFIG_U_QE is not set
-+# CONFIG_RAM is not set
-+
-+#
-+# Reboot Mode Support
-+#
-+# CONFIG_DM_REBOOT_MODE is not set
-+
-+#
-+# Remote Processor drivers
-+#
-+
-+#
-+# Reset Controller Support
-+#
-+# CONFIG_RESET_AST2500 is not set
-+# CONFIG_RESET_AST2600 is not set
-+CONFIG_RESET_MEDIATEK=y
-+# CONFIG_RESET_HISILICON is not set
-+# CONFIG_RESET_SYSCON is not set
-+# CONFIG_RESET_SCMI is not set
-+# CONFIG_RESET_DRA7 is not set
-+# CONFIG_DM_RNG is not set
-+
-+#
-+# Real Time Clock
-+#
-+# CONFIG_DM_RTC is not set
-+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-+# CONFIG_RTC_DS1337 is not set
-+# CONFIG_RTC_DS1338 is not set
-+# CONFIG_RTC_DS1374 is not set
-+# CONFIG_RTC_DS3231 is not set
-+# CONFIG_RTC_PCF8563 is not set
-+# CONFIG_RTC_PT7C4338 is not set
-+# CONFIG_RTC_PL031 is not set
-+# CONFIG_RTC_S35392A is not set
-+# CONFIG_RTC_MC13XXX is not set
-+# CONFIG_RTC_MC146818 is not set
-+# CONFIG_RTC_M41T62 is not set
-+# CONFIG_SCSI is not set
-+# CONFIG_DM_SCSI is not set
-+CONFIG_SERIAL=y
-+CONFIG_BAUDRATE=115200
-+# CONFIG_DEFAULT_ENV_IS_RW is not set
-+CONFIG_REQUIRE_SERIAL_CONSOLE=y
-+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-+CONFIG_SERIAL_PRESENT=y
 +CONFIG_DM_SERIAL=y
-+# CONFIG_SERIAL_RX_BUFFER is not set
-+# CONFIG_SERIAL_PUTS is not set
-+# CONFIG_SERIAL_SEARCH_ALL is not set
-+# CONFIG_SERIAL_PROBE_ALL is not set
-+# CONFIG_VPL_DM_SERIAL is not set
-+CONFIG_DEBUG_UART_MTK=y
-+CONFIG_DEBUG_UART_SHIFT=0
-+# CONFIG_DEBUG_UART_ANNOUNCE is not set
-+# CONFIG_DEBUG_UART_SKIP_INIT is not set
-+# CONFIG_ALTERA_JTAG_UART is not set
-+# CONFIG_ALTERA_UART is not set
-+# CONFIG_ARC_SERIAL is not set
-+# CONFIG_ARM_DCC is not set
-+# CONFIG_ATMEL_USART is not set
-+# CONFIG_BCM6345_SERIAL is not set
-+# CONFIG_COREBOOT_SERIAL is not set
-+# CONFIG_CORTINA_UART is not set
-+# CONFIG_FSL_LINFLEXUART is not set
-+# CONFIG_FSL_LPUART is not set
-+# CONFIG_MVEBU_A3700_UART is not set
-+# CONFIG_MCFUART is not set
-+# CONFIG_NULLDEV_SERIAL is not set
-+# CONFIG_SYS_NS16550 is not set
-+# CONFIG_PL01X_SERIAL is not set
-+# CONFIG_ROCKCHIP_SERIAL is not set
-+# CONFIG_XILINX_UARTLITE is not set
-+# CONFIG_MSM_SERIAL is not set
-+# CONFIG_MSM_GENI_SERIAL is not set
-+# CONFIG_MXS_AUART_SERIAL is not set
-+# CONFIG_OMAP_SERIAL is not set
-+# CONFIG_SIFIVE_SERIAL is not set
-+# CONFIG_ZYNQ_SERIAL is not set
 +CONFIG_MTK_SERIAL=y
-+# CONFIG_MT7620_SERIAL is not set
-+# CONFIG_NPCM_SERIAL is not set
-+# CONFIG_SM is not set
-+# CONFIG_MESON_SM is not set
-+# CONFIG_SMEM is not set
-+
-+#
-+# Sound support
-+#
-+# CONFIG_SOUND is not set
-+
-+#
-+# SOC (System On Chip) specific Drivers
-+#
-+# CONFIG_SOC_DEVICE is not set
-+# CONFIG_SOC_TI is not set
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_SPI_MEM=y
-+# CONFIG_SPI_DIRMAP is not set
-+# CONFIG_ALTERA_SPI is not set
-+# CONFIG_APPLE_SPI is not set
-+# CONFIG_ATCSPI200_SPI is not set
-+# CONFIG_ATMEL_SPI is not set
-+# CONFIG_BCMSTB_SPI is not set
-+# CONFIG_CORTINA_SFLASH is not set
-+# CONFIG_CADENCE_QSPI is not set
-+# CONFIG_CF_SPI is not set
-+# CONFIG_DESIGNWARE_SPI is not set
-+# CONFIG_EXYNOS_SPI is not set
-+# CONFIG_FSL_DSPI is not set
-+# CONFIG_FSL_QSPI is not set
-+# CONFIG_GXP_SPI is not set
-+# CONFIG_ICH_SPI is not set
-+# CONFIG_IPROC_QSPI is not set
-+# CONFIG_KIRKWOOD_SPI is not set
-+# CONFIG_MICROCHIP_COREQSPI is not set
-+# CONFIG_MPC8XXX_SPI is not set
-+# CONFIG_MTK_SNOR is not set
-+# CONFIG_MTK_SNFI_SPI is not set
 +CONFIG_MTK_SPIM=y
-+# CONFIG_MVEBU_A3700_SPI is not set
-+# CONFIG_MXS_SPI is not set
-+# CONFIG_SPI_MXIC is not set
-+# CONFIG_NPCM_FIU_SPI is not set
-+# CONFIG_NPCM_PSPI is not set
-+# CONFIG_NXP_FSPI is not set
-+# CONFIG_OMAP3_SPI is not set
-+# CONFIG_PL022_SPI is not set
-+# CONFIG_ROCKCHIP_SFC is not set
-+# CONFIG_ROCKCHIP_SPI is not set
-+# CONFIG_SPI_ASPEED_SMC is not set
-+# CONFIG_SPI_SIFIVE is not set
-+# CONFIG_SOFT_SPI is not set
-+# CONFIG_SPI_SN_F_OSPI is not set
-+# CONFIG_SPI_SUNXI is not set
-+# CONFIG_TEGRA114_SPI is not set
-+# CONFIG_TEGRA20_SFLASH is not set
-+# CONFIG_TEGRA20_SLINK is not set
-+# CONFIG_TEGRA210_QSPI is not set
-+# CONFIG_TI_QSPI is not set
-+# CONFIG_XILINX_SPI is not set
-+# CONFIG_ZYNQ_SPI is not set
-+# CONFIG_ZYNQ_QSPI is not set
-+# CONFIG_ZYNQMP_GQSPI is not set
-+# CONFIG_SH_QSPI is not set
-+# CONFIG_MXC_SPI is not set
-+
-+#
-+# SPMI support
-+#
-+# CONFIG_SPMI is not set
-+# CONFIG_SYSINFO is not set
-+
-+#
-+# System reset device drivers
-+#
-+# CONFIG_SYSRESET is not set
-+# CONFIG_TEE is not set
-+# CONFIG_DM_THERMAL is not set
-+
-+#
-+# Timer Support
-+#
-+# CONFIG_TIMER is not set
-+
-+#
-+# TPM support
-+#
 +CONFIG_USB=y
-+CONFIG_DM_USB=y
-+# CONFIG_DM_USB_GADGET is not set
-+
-+#
-+# USB Host Controller Drivers
-+#
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
-+# CONFIG_USB_XHCI_DWC3 is not set
-+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
 +CONFIG_USB_XHCI_MTK=y
-+# CONFIG_USB_XHCI_FSL is not set
-+# CONFIG_USB_XHCI_BRCM is not set
-+# CONFIG_USB_EHCI_HCD is not set
-+# CONFIG_USB_OHCI_HCD is not set
-+# CONFIG_USB_UHCI_HCD is not set
-+# CONFIG_USB_DWC2 is not set
-+# CONFIG_USB_R8A66597_HCD is not set
-+# CONFIG_USB_ISP1760 is not set
-+# CONFIG_USB_CDNS3 is not set
-+# CONFIG_USB_DWC3 is not set
-+# CONFIG_USB_MTU3 is not set
-+
-+#
-+# Legacy MUSB Support
-+#
-+# CONFIG_USB_MUSB_HCD is not set
-+# CONFIG_USB_MUSB_UDC is not set
-+
-+#
-+# MUSB Controller Driver
-+#
-+# CONFIG_USB_MUSB_HOST is not set
-+# CONFIG_USB_MUSB_PIO_ONLY is not set
-+
-+#
-+# USB Phy
-+#
-+# CONFIG_TWL4030_USB is not set
-+# CONFIG_ROCKCHIP_USB2_PHY is not set
-+
-+#
-+# ULPI drivers
-+#
-+
-+#
-+# USB peripherals
-+#
 +CONFIG_USB_STORAGE=y
-+# CONFIG_USB_KEYBOARD is not set
-+# CONFIG_USB_ONBOARD_HUB is not set
-+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-+# CONFIG_USB_HOST_ETHER is not set
-+# CONFIG_USB_GADGET is not set
-+# CONFIG_SPL_USB_GADGET is not set
-+
-+#
-+# UFS Host Controller Support
-+#
-+# CONFIG_TI_J721E_UFS is not set
-+
-+#
-+# Graphics support
-+#
-+# CONFIG_VIDEO is not set
-+
-+#
-+# VirtIO Drivers
-+#
-+# CONFIG_VIRTIO_MMIO is not set
-+
-+#
-+# 1-Wire support
-+#
-+# CONFIG_W1 is not set
-+
-+#
-+# 1-wire EEPROM support
-+#
-+# CONFIG_W1_EEPROM is not set
-+
-+#
-+# Watchdog Timer Support
-+#
-+# CONFIG_WATCHDOG is not set
-+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-+# CONFIG_IMX_WATCHDOG is not set
-+# CONFIG_ULP_WATCHDOG is not set
-+# CONFIG_WDT is not set
-+# CONFIG_PHYS_TO_BUS is not set
-+
-+#
-+# File systems
-+#
-+# CONFIG_FS_BTRFS is not set
-+# CONFIG_FS_CBFS is not set
-+# CONFIG_FS_EXT4 is not set
-+CONFIG_FS_FAT=y
-+CONFIG_FAT_WRITE=y
-+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-+# CONFIG_FS_JFFS2 is not set
 +CONFIG_UBIFS_SILENCE_MSG=y
-+CONFIG_UBIFS_SILENCE_DEBUG_DUMP=y
-+# CONFIG_FS_CRAMFS is not set
-+# CONFIG_YAFFS2 is not set
-+# CONFIG_FS_SQUASHFS is not set
-+# CONFIG_FS_EROFS is not set
-+
-+#
-+# Library routines
-+#
-+# CONFIG_ADDR_MAP is not set
-+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-+# CONFIG_PHYSMEM is not set
-+# CONFIG_BCH is not set
-+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-+CONFIG_CHARSET=y
-+# CONFIG_DYNAMIC_CRC_TABLE is not set
-+CONFIG_LIB_UUID=y
-+# CONFIG_SEMIHOSTING is not set
-+CONFIG_PRINTF=y
-+CONFIG_SPRINTF=y
-+CONFIG_STRTO=y
-+CONFIG_SYS_HZ=1000
-+# CONFIG_PANIC_HANG is not set
-+CONFIG_REGEX=y
-+CONFIG_LIB_RAND=y
-+# CONFIG_LIB_HW_RAND is not set
-+CONFIG_SUPPORT_ACPI=y
-+# CONFIG_ACPI is not set
-+CONFIG_RBTREE=y
-+# CONFIG_BITREVERSE is not set
-+# CONFIG_TRACE is not set
-+# CONFIG_CIRCBUF is not set
-+# CONFIG_CMD_DHRYSTONE is not set
-+
-+#
-+# Security support
-+#
-+# CONFIG_AES is not set
-+# CONFIG_ECDSA is not set
-+# CONFIG_RSA is not set
-+# CONFIG_TPM is not set
-+
-+#
-+# Android Verified Boot
-+#
-+
-+#
-+# Hashing Support
-+#
-+# CONFIG_BLAKE2 is not set
-+CONFIG_SHA1=y
-+CONFIG_SHA256=y
-+# CONFIG_SHA512 is not set
-+# CONFIG_SHA384 is not set
-+# CONFIG_SHA_HW_ACCEL is not set
-+CONFIG_MD5=y
-+CONFIG_CRC8=y
-+CONFIG_CRC32=y
-+
-+#
-+# Compression Support
-+#
-+# CONFIG_LZ4 is not set
-+CONFIG_LZMA=y
-+CONFIG_LZO=y
-+CONFIG_GZIP=y
-+# CONFIG_ZLIB_UNCOMPRESS is not set
-+# CONFIG_BZIP2 is not set
-+CONFIG_ZLIB=y
-+# CONFIG_ZSTD is not set
-+CONFIG_VPL_LZMA=y
-+# CONFIG_SPL_GZIP is not set
-+# CONFIG_ERRNO_STR is not set
 +CONFIG_HEXDUMP=y
-+# CONFIG_GETOPT is not set
-+CONFIG_OF_LIBFDT=y
-+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
-+CONFIG_SYS_FDT_PAD=0x3000
-+
-+#
-+# System tables
-+#
-+CONFIG_GENERATE_SMBIOS_TABLE=y
-+# CONFIG_LIB_RATIONAL is not set
-+CONFIG_SMBIOS=y
-+# CONFIG_SMBIOS_PARSER is not set
-+CONFIG_EFI_LOADER=y
-+CONFIG_CMD_BOOTEFI_BOOTMGR=y
-+CONFIG_EFI_VARIABLE_FILE_STORE=y
-+# CONFIG_EFI_VARIABLE_NO_STORE is not set
-+# CONFIG_EFI_VARIABLES_PRESEED is not set
-+CONFIG_EFI_VAR_BUF_SIZE=131072
-+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-+CONFIG_EFI_CAPSULE_MAX=15
-+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-+CONFIG_EFI_DEVICE_PATH_UTIL=y
-+CONFIG_EFI_DT_FIXUP=y
-+CONFIG_EFI_LOADER_HII=y
-+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-+CONFIG_EFI_UNICODE_CAPITALIZATION=y
-+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
-+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-+CONFIG_EFI_HAVE_RUNTIME_RESET=y
-+CONFIG_EFI_LOAD_FILE2_INITRD=y
-+CONFIG_EFI_ECPT=y
-+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-+# CONFIG_OPTEE_LIB is not set
-+# CONFIG_OPTEE_IMAGE is not set
-+# CONFIG_BOOTM_OPTEE is not set
-+# CONFIG_TEST_FDTDEC is not set
-+CONFIG_LIB_ELF=y
-+CONFIG_LMB=y
-+CONFIG_LMB_USE_MAX_REGIONS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+# CONFIG_PHANDLE_CHECK_SEQ is not set
-+
-+#
-+# Testing
-+#
-+# CONFIG_UNIT_TEST is not set
-+# CONFIG_POST is not set
-+
-+#
-+# Tools options
-+#
-+CONFIG_MKIMAGE_DTC_PATH="dtc"
-+CONFIG_TOOLS_CRC32=y
-+# CONFIG_TOOLS_LIBCRYPTO is not set
-+CONFIG_TOOLS_FIT=y
-+CONFIG_TOOLS_FIT_FULL_CHECK=y
-+CONFIG_TOOLS_FIT_PRINT=y
-+CONFIG_TOOLS_FIT_RSASSA_PSS=y
-+CONFIG_TOOLS_FIT_SIGNATURE=y
-+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-+CONFIG_TOOLS_FIT_VERBOSE=y
-+CONFIG_TOOLS_MD5=y
-+CONFIG_TOOLS_OF_LIBFDT=y
-+CONFIG_TOOLS_SHA1=y
-+CONFIG_TOOLS_SHA256=y
-+CONFIG_TOOLS_SHA384=y
-+CONFIG_TOOLS_SHA512=y
-+# CONFIG_TOOLS_MKEFICAPSULE is not set
-+# CONFIG_FSPI_CONF_HEADER is not set
-+# CONFIG_TOOLS_MKFWUMDATA is not set
 --- /dev/null
 +++ b/configs/mt7981_openwrt-one-spi-nand_defconfig
-@@ -0,0 +1,1815 @@
-+#
-+# Automatically generated file; DO NOT EDIT.
-+# U-Boot 2024.01 Configuration
-+#
-+
-+#
-+# Compiler: aarch64-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r25206+8-d5e2177a6b) 12.3.0
-+#
-+CONFIG_CREATE_ARCH_SYMLINK=y
-+CONFIG_SYS_CACHE_SHIFT_6=y
-+CONFIG_SYS_CACHELINE_SIZE=64
-+CONFIG_LINKER_LIST_ALIGN=8
-+# CONFIG_ARC is not set
+@@ -0,0 +1,130 @@
 +CONFIG_ARM=y
-+# CONFIG_M68K is not set
-+# CONFIG_MICROBLAZE is not set
-+# CONFIG_MIPS is not set
-+# CONFIG_NIOS2 is not set
-+# CONFIG_PPC is not set
-+# CONFIG_RISCV is not set
-+# CONFIG_SANDBOX is not set
-+# CONFIG_SH is not set
-+# CONFIG_X86 is not set
-+# CONFIG_XTENSA is not set
-+CONFIG_SYS_ARCH="arm"
-+CONFIG_SYS_CPU="armv8"
-+CONFIG_SYS_SOC="mediatek"
-+CONFIG_SYS_VENDOR="mediatek"
-+CONFIG_SYS_BOARD="mt7981"
-+CONFIG_SYS_CONFIG_NAME="mt7981"
-+
-+#
-+# Skipping low level initialization functions
-+#
-+# CONFIG_SKIP_LOWLEVEL_INIT is not set
-+# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
-+CONFIG_SYS_NONCACHED_MEMORY=0x100000
-+# CONFIG_SYS_ICACHE_OFF is not set
-+# CONFIG_SYS_DCACHE_OFF is not set
-+
-+#
-+# ARM architecture
-+#
-+CONFIG_ARM64=y
-+CONFIG_ARM64_CRC32=y
-+CONFIG_COUNTER_FREQUENCY=0
 +CONFIG_POSITION_INDEPENDENT=y
-+CONFIG_INIT_SP_RELATIVE=y
-+CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
-+# CONFIG_GIC_V3_ITS is not set
-+CONFIG_STATIC_RELA=y
-+CONFIG_DMA_ADDR_T_64BIT=y
-+CONFIG_GPIO_EXTRA_HEADER=y
-+CONFIG_ARM_ASM_UNIFIED=y
-+# CONFIG_SYS_ARM_CACHE_CP15 is not set
-+# CONFIG_SYS_ARM_MMU is not set
-+# CONFIG_SYS_ARM_MPU is not set
-+CONFIG_SYS_ARM_ARCH=8
-+CONFIG_SYS_ARM_CACHE_WRITEBACK=y
-+# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
-+# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
-+# CONFIG_ARCH_CPU_INIT is not set
-+CONFIG_SYS_ARCH_TIMER=y
-+CONFIG_ARM_SMCCC=y
-+# CONFIG_SYS_L2_PL310 is not set
-+# CONFIG_SPL_SYS_L2_PL310 is not set
-+# CONFIG_SYS_L2CACHE_OFF is not set
-+# CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set
-+# CONFIG_USE_ARCH_MEMCPY is not set
-+# CONFIG_USE_ARCH_MEMSET is not set
-+CONFIG_ARM64_SUPPORT_AARCH32=y
-+# CONFIG_ARCH_AT91 is not set
-+# CONFIG_ARCH_DAVINCI is not set
-+# CONFIG_ARCH_HISTB is not set
-+# CONFIG_ARCH_KIRKWOOD is not set
-+# CONFIG_ARCH_MVEBU is not set
-+# CONFIG_ARCH_ORION5X is not set
-+# CONFIG_TARGET_STV0991 is not set
-+# CONFIG_ARCH_BCM283X is not set
-+# CONFIG_ARCH_BCMSTB is not set
-+# CONFIG_ARCH_BCMBCA is not set
-+# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
-+# CONFIG_TARGET_BCMNS is not set
-+# CONFIG_TARGET_BCMNS2 is not set
-+# CONFIG_TARGET_BCMNS3 is not set
-+# CONFIG_ARCH_EXYNOS is not set
-+# CONFIG_ARCH_S5PC1XX is not set
-+# CONFIG_ARCH_HIGHBANK is not set
-+# CONFIG_ARCH_INTEGRATOR is not set
-+# CONFIG_ARCH_IPQ40XX is not set
-+# CONFIG_ARCH_KEYSTONE is not set
-+# CONFIG_ARCH_K3 is not set
-+# CONFIG_ARCH_OMAP2PLUS is not set
-+# CONFIG_ARCH_MESON is not set
 +CONFIG_ARCH_MEDIATEK=y
-+# CONFIG_ARCH_LPC32XX is not set
-+# CONFIG_ARCH_IMX8 is not set
-+# CONFIG_ARCH_IMX8M is not set
-+# CONFIG_ARCH_IMX8ULP is not set
-+# CONFIG_ARCH_IMX9 is not set
-+# CONFIG_ARCH_IMXRT is not set
-+# CONFIG_ARCH_MX23 is not set
-+# CONFIG_ARCH_MX28 is not set
-+# CONFIG_ARCH_MX31 is not set
-+# CONFIG_ARCH_MX7ULP is not set
-+# CONFIG_ARCH_MX7 is not set
-+# CONFIG_ARCH_MX6 is not set
-+# CONFIG_ARCH_MX5 is not set
-+# CONFIG_ARCH_NEXELL is not set
-+# CONFIG_ARCH_NPCM is not set
-+# CONFIG_ARCH_APPLE is not set
-+# CONFIG_ARCH_OWL is not set
-+# CONFIG_ARCH_QEMU is not set
-+# CONFIG_ARCH_RMOBILE is not set
-+# CONFIG_ARCH_SNAPDRAGON is not set
-+# CONFIG_ARCH_SOCFPGA is not set
-+# CONFIG_ARCH_SUNXI is not set
-+# CONFIG_ARCH_U8500 is not set
-+# CONFIG_ARCH_VERSAL is not set
-+# CONFIG_ARCH_VERSAL_NET is not set
-+# CONFIG_ARCH_VF610 is not set
-+# CONFIG_ARCH_ZYNQ is not set
-+# CONFIG_ARCH_ZYNQMP_R5 is not set
-+# CONFIG_ARCH_ZYNQMP is not set
-+# CONFIG_ARCH_TEGRA is not set
-+# CONFIG_ARCH_VEXPRESS64 is not set
-+# CONFIG_TARGET_CORSTONE1000 is not set
-+# CONFIG_TARGET_TOTAL_COMPUTE is not set
-+# CONFIG_TARGET_LS2080A_EMU is not set
-+# CONFIG_TARGET_LS1088AQDS is not set
-+# CONFIG_TARGET_LS2080AQDS is not set
-+# CONFIG_TARGET_LS2080ARDB is not set
-+# CONFIG_TARGET_LS2081ARDB is not set
-+# CONFIG_TARGET_LX2160ARDB is not set
-+# CONFIG_TARGET_LX2160AQDS is not set
-+# CONFIG_TARGET_LX2162AQDS is not set
-+# CONFIG_TARGET_HIKEY is not set
-+# CONFIG_TARGET_HIKEY960 is not set
-+# CONFIG_TARGET_POPLAR is not set
-+# CONFIG_TARGET_LS1012AQDS is not set
-+# CONFIG_TARGET_LS1012ARDB is not set
-+# CONFIG_TARGET_LS1012A2G5RDB is not set
-+# CONFIG_TARGET_LS1012AFRWY is not set
-+# CONFIG_TARGET_LS1012AFRDM is not set
-+# CONFIG_TARGET_LS1028AQDS is not set
-+# CONFIG_TARGET_LS1028ARDB is not set
-+# CONFIG_TARGET_LS1088ARDB is not set
-+# CONFIG_TARGET_LS1021AQDS is not set
-+# CONFIG_TARGET_LS1021ATWR is not set
-+# CONFIG_TARGET_PG_WCOM_SELI8 is not set
-+# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
-+# CONFIG_TARGET_LS1021ATSN is not set
-+# CONFIG_TARGET_LS1021AIOT is not set
-+# CONFIG_TARGET_LS1043AQDS is not set
-+# CONFIG_TARGET_LS1043ARDB is not set
-+# CONFIG_TARGET_LS1046AQDS is not set
-+# CONFIG_TARGET_LS1046ARDB is not set
-+# CONFIG_TARGET_LS1046AFRWY is not set
-+# CONFIG_TARGET_SL28 is not set
-+# CONFIG_TARGET_TEN64 is not set
-+# CONFIG_ARCH_UNIPHIER is not set
-+# CONFIG_ARCH_SYNQUACER is not set
-+# CONFIG_ARCH_STM32 is not set
-+# CONFIG_ARCH_STI is not set
-+# CONFIG_ARCH_STM32MP is not set
-+# CONFIG_ARCH_ROCKCHIP is not set
-+# CONFIG_ARCH_OCTEONTX is not set
-+# CONFIG_ARCH_OCTEONTX2 is not set
-+# CONFIG_TARGET_THUNDERX_88XX is not set
-+# CONFIG_ARCH_ASPEED is not set
-+# CONFIG_TARGET_DURIAN is not set
-+# CONFIG_TARGET_POMELO is not set
-+# CONFIG_TARGET_PRESIDIO_ASIC is not set
-+# CONFIG_TARGET_XENGUEST_ARM64 is not set
-+# CONFIG_ARCH_GXP is not set
-+# CONFIG_STATIC_MACH_TYPE is not set
 +CONFIG_TEXT_BASE=0x41e00000
-+CONFIG_SYS_MALLOC_LEN=0x400000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
-+CONFIG_ENV_SOURCE_FILE=""
-+CONFIG_SF_DEFAULT_SPEED=1000000
-+CONFIG_SF_DEFAULT_MODE=0x0
-+CONFIG_ENV_SIZE=0x1f000
-+CONFIG_DM_GPIO=y
 +CONFIG_DEFAULT_DEVICE_TREE="openwrt-one"
 +CONFIG_OF_LIBFDT_OVERLAY=y
-+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
-+CONFIG_DM_RESET=y
-+CONFIG_SYS_MONITOR_LEN=0
-+# CONFIG_MT8512 is not set
-+# CONFIG_TARGET_MT7622 is not set
-+# CONFIG_TARGET_MT7623 is not set
-+# CONFIG_TARGET_MT7629 is not set
 +CONFIG_TARGET_MT7981=y
-+# CONFIG_TARGET_MT7986 is not set
-+# CONFIG_TARGET_MT7988 is not set
-+# CONFIG_TARGET_MT8183 is not set
-+# CONFIG_TARGET_MT8512 is not set
-+# CONFIG_TARGET_MT8516 is not set
-+# CONFIG_TARGET_MT8518 is not set
-+CONFIG_MTK_BROM_HEADER_INFO="media=snand;nandinfo=2k+64"
 +CONFIG_RESET_BUTTON_LABEL="back"
-+CONFIG_RESET_BUTTON_SETTLE_DELAY=0
-+CONFIG_ERR_PTR_OFFSET=0x0
-+# CONFIG_SPL is not set
-+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
-+# CONFIG_DEBUG_UART_BOARD_INIT is not set
-+CONFIG_IDENT_STRING=""
-+CONFIG_SYS_CLK_FREQ=0
-+# CONFIG_CHIP_DIP_SCAN is not set
-+# CONFIG_CMO_BY_VA_ONLY is not set
-+# CONFIG_ARMV8_MULTIENTRY is not set
-+# CONFIG_ARMV8_SET_SMPEN is not set
-+# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
-+
-+#
-+# ARMv8 secure monitor firmware
-+#
-+# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-+CONFIG_PSCI_RESET=y
-+# CONFIG_ARMV8_PSCI is not set
-+# CONFIG_ARMV8_EA_EL3_FIRST is not set
-+# CONFIG_ARMV8_CRYPTO is not set
-+# CONFIG_CMD_DEKBLOB is not set
-+# CONFIG_IMX_CAAM_DEK_ENCAP is not set
-+# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
-+# CONFIG_IMX_SECO_DEK_ENCAP is not set
-+# CONFIG_IMX_ELE_DEK_ENCAP is not set
-+# CONFIG_CMD_HDMIDETECT is not set
-+CONFIG_IMX_DCD_ADDR=0x00910000
-+CONFIG_SYS_MEM_TOP_HIDE=0x0
 +CONFIG_SYS_LOAD_ADDR=0x46000000
-+
-+#
-+# ARM debug
-+#
-+CONFIG_BUILD_TARGET=""
-+# CONFIG_PCI is not set
-+CONFIG_FWU_NUM_BANKS=2
-+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
 +CONFIG_DEBUG_UART=y
-+# CONFIG_AHCI is not set
-+# CONFIG_OF_BOARD_FIXUP is not set
-+
-+#
-+# Functionality shared between NXP SoCs
-+#
-+# CONFIG_NXP_ESBC is not set
-+
-+#
-+# General setup
-+#
-+CONFIG_LOCALVERSION=""
-+CONFIG_LOCALVERSION_AUTO=y
-+CONFIG_CC_IS_GCC=y
-+CONFIG_GCC_VERSION=120300
-+CONFIG_CLANG_VERSION=0
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-+# CONFIG_OPTIMIZE_INLINING is not set
-+CONFIG_ARCH_SUPPORTS_LTO=y
-+# CONFIG_LTO is not set
-+CONFIG_CC_HAS_ASM_INLINE=y
-+# CONFIG_XEN is not set
-+# CONFIG_ENV_VARS_UBOOT_CONFIG is not set
-+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-+# CONFIG_SYS_BOOT_GET_KBD is not set
-+CONFIG_SYS_MALLOC_F=y
-+# CONFIG_VALGRIND is not set
-+CONFIG_EXPERT=y
-+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-+# CONFIG_TOOLS_DEBUG is not set
-+CONFIG_PHYS_64BIT=y
-+CONFIG_FDT_64BIT=y
-+# CONFIG_REMAKE_ELF is not set
-+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-+CONFIG_PLATFORM_ELFENTRY="_start"
-+CONFIG_STACK_SIZE=0x1000000
-+CONFIG_SYS_SRAM_BASE=0x0
-+CONFIG_SYS_SRAM_SIZE=0x0
-+# CONFIG_MP is not set
-+CONFIG_HAVE_TEXT_BASE=y
-+# CONFIG_HAVE_SYS_UBOOT_START is not set
-+CONFIG_SYS_UBOOT_START=0x41e00000
-+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-+# CONFIG_API is not set
-+
-+#
-+# Boot options
-+#
-+
-+#
-+# Boot images
-+#
-+# CONFIG_ANDROID_BOOT_IMAGE is not set
-+# CONFIG_TIMESTAMP is not set
 +CONFIG_FIT=y
-+CONFIG_FIT_EXTERNAL_OFFSET=0x0
-+CONFIG_FIT_FULL_CHECK=y
-+# CONFIG_FIT_SIGNATURE is not set
-+# CONFIG_FIT_CIPHER is not set
-+# CONFIG_FIT_VERBOSE is not set
-+# CONFIG_FIT_BEST_MATCH is not set
-+CONFIG_FIT_PRINT=y
-+# CONFIG_SPL_LOAD_FIT_FULL is not set
-+CONFIG_PXE_UTILS=y
-+CONFIG_BOOTSTD=y
-+# CONFIG_BOOTSTD_FULL is not set
-+# CONFIG_BOOTSTD_DEFAULTS is not set
-+CONFIG_BOOTSTD_BOOTCOMMAND=y
-+CONFIG_BOOTMETH_GLOBAL=y
-+# CONFIG_BOOTMETH_CROS is not set
-+CONFIG_BOOTMETH_EXTLINUX=y
-+CONFIG_BOOTMETH_EXTLINUX_PXE=y
-+CONFIG_BOOTMETH_EFILOADER=y
-+CONFIG_BOOTMETH_VBE=y
-+CONFIG_BOOTMETH_VBE_REQUEST=y
-+CONFIG_BOOTMETH_VBE_SIMPLE=y
-+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-+# CONFIG_BOOTMETH_SCRIPT is not set
-+CONFIG_LEGACY_IMAGE_FORMAT=y
-+# CONFIG_SUPPORT_RAW_INITRD is not set
-+# CONFIG_CHROMEOS is not set
-+# CONFIG_CHROMEOS_VBOOT is not set
-+# CONFIG_RAMBOOT_PBL is not set
-+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-+# CONFIG_DISTRO_DEFAULTS is not set
-+
-+#
-+# Boot timing
-+#
-+# CONFIG_BOOTSTAGE is not set
-+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
-+# CONFIG_SHOW_BOOT_PROGRESS is not set
-+
-+#
-+# Boot media
-+#
 +CONFIG_NAND_BOOT=y
-+# CONFIG_ONENAND_BOOT is not set
-+# CONFIG_QSPI_BOOT is not set
-+# CONFIG_SATA_BOOT is not set
-+# CONFIG_SD_BOOT is not set
-+# CONFIG_SD_BOOT_QSPI is not set
 +CONFIG_SPI_BOOT=y
-+
-+#
-+# Autoboot options
-+#
-+CONFIG_AUTOBOOT=y
-+CONFIG_BOOTDELAY=2
-+# CONFIG_AUTOBOOT_KEYED is not set
-+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
 +CONFIG_AUTOBOOT_MENU_SHOW=y
-+# CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is not set
-+# CONFIG_BOOT_RETRY is not set
-+
-+#
-+# Image support
-+#
-+# CONFIG_IMAGE_PRE_LOAD is not set
-+
-+#
-+# Devicetree fixup
-+#
-+# CONFIG_OF_BOARD_SETUP is not set
-+# CONFIG_OF_SYSTEM_SETUP is not set
-+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-+# CONFIG_FDT_FIXUP_PARTITIONS is not set
-+# CONFIG_FDT_SIMPLEFB is not set
-+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-+# CONFIG_USE_BOOTARGS is not set
-+# CONFIG_BOOTARGS_SUBST is not set
-+# CONFIG_USE_BOOTCOMMAND is not set
 +CONFIG_USE_PREBOOT=y
 +CONFIG_DEFAULT_FDT_FILE="openwrt-one"
-+# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
-+# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
-+
-+#
-+# Configuration editor
-+#
-+# CONFIG_CEDIT is not set
-+
-+#
-+# Console
-+#
-+CONFIG_MENU=y
-+# CONFIG_CONSOLE_RECORD is not set
-+# CONFIG_DISABLE_CONSOLE is not set
++CONFIG_SYS_CBSIZE=512
++CONFIG_SYS_PBSIZE=1049
 +CONFIG_LOGLEVEL=7
-+# CONFIG_SILENT_CONSOLE is not set
-+# CONFIG_SPL_SILENT_CONSOLE is not set
-+# CONFIG_TPL_SILENT_CONSOLE is not set
-+# CONFIG_PRE_CONSOLE_BUFFER is not set
-+CONFIG_CONSOLE_FLUSH_SUPPORT=y
-+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
-+# CONFIG_CONSOLE_MUX is not set
-+# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set
-+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-+# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
-+# CONFIG_SYS_STDIO_DEREGISTER is not set
-+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-+# CONFIG_SYS_DEVICE_NULLDEV is not set
-+
-+#
-+# Logging
-+#
 +CONFIG_LOG=y
-+CONFIG_LOG_MAX_LEVEL=6
-+CONFIG_LOG_DEFAULT_LEVEL=6
-+CONFIG_LOG_CONSOLE=y
-+# CONFIG_LOGF_FILE is not set
-+# CONFIG_LOGF_LINE is not set
-+# CONFIG_LOGF_FUNC is not set
-+CONFIG_LOGF_FUNC_PAD=20
-+# CONFIG_LOG_SYSLOG is not set
-+# CONFIG_LOG_ERROR_RETURN is not set
-+
-+#
-+# Init options
-+#
-+# CONFIG_BOARD_TYPES is not set
-+CONFIG_DISPLAY_CPUINFO=y
-+CONFIG_DISPLAY_BOARDINFO=y
-+# CONFIG_DISPLAY_BOARDINFO_LATE is not set
-+
-+#
-+# Start-up hooks
-+#
-+# CONFIG_CYCLIC is not set
-+CONFIG_EVENT=y
-+CONFIG_EVENT_DYNAMIC=y
-+# CONFIG_EVENT_DEBUG is not set
-+# CONFIG_ARCH_MISC_INIT is not set
-+# CONFIG_BOARD_EARLY_INIT_F is not set
-+# CONFIG_BOARD_EARLY_INIT_R is not set
-+# CONFIG_BOARD_POSTCLK_INIT is not set
 +CONFIG_BOARD_LATE_INIT=y
-+# CONFIG_CLOCKS is not set
-+# CONFIG_HWCONFIG is not set
-+CONFIG_LAST_STAGE_INIT=y
-+# CONFIG_MISC_INIT_R is not set
-+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-+# CONFIG_ID_EEPROM is not set
-+# CONFIG_RESET_PHY_R is not set
-+
-+#
-+# Security support
-+#
-+CONFIG_HASH=y
-+# CONFIG_STACKPROTECTOR is not set
-+# CONFIG_BOARD_RNG_SEED is not set
-+
-+#
-+# Update support
-+#
-+# CONFIG_UPDATE_TFTP is not set
-+# CONFIG_ANDROID_AB is not set
-+
-+#
-+# Blob list
-+#
-+# CONFIG_BLOBLIST is not set
-+CONFIG_SUPPORT_SPL=y
-+# CONFIG_VPL is not set
-+
-+#
-+# Command line interface
-+#
-+CONFIG_CMDLINE=y
 +CONFIG_HUSH_PARSER=y
-+CONFIG_CMDLINE_EDITING=y
-+# CONFIG_CMDLINE_PS_SUPPORT is not set
-+CONFIG_AUTO_COMPLETE=y
-+CONFIG_SYS_LONGHELP=y
 +CONFIG_SYS_PROMPT="OpenWrt One> "
-+CONFIG_SYS_PROMPT_HUSH_PS2="> "
 +CONFIG_SYS_MAXARGS=16
-+CONFIG_SYS_CBSIZE=512
-+CONFIG_SYS_PBSIZE=1049
-+CONFIG_SYS_XTRACE=y
-+CONFIG_BUILD_BIN2C=y
-+
-+#
-+# Commands
-+#
-+
-+#
-+# Info commands
-+#
-+CONFIG_CMD_BDI=y
-+# CONFIG_CMD_BDINFO_EXTRA is not set
-+# CONFIG_CMD_CONFIG is not set
-+CONFIG_CMD_CONSOLE=y
 +CONFIG_CMD_CPU=y
-+# CONFIG_CMD_HISTORY is not set
 +CONFIG_CMD_LICENSE=y
-+# CONFIG_CMD_PMC is not set
-+
-+#
-+# Boot commands
-+#
-+CONFIG_CMD_BOOTD=y
-+CONFIG_CMD_BOOTM=y
-+# CONFIG_CMD_BOOTDEV is not set
-+CONFIG_CMD_BOOTFLOW=y
-+# CONFIG_CMD_BOOTMETH is not set
-+CONFIG_BOOTM_EFI=y
-+# CONFIG_CMD_BOOTZ is not set
-+CONFIG_CMD_BOOTI=y
-+CONFIG_BOOTM_LINUX=y
 +# CONFIG_BOOTM_NETBSD is not set
-+# CONFIG_BOOTM_OPENRTOS is not set
-+# CONFIG_BOOTM_OSE is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
-+# CONFIG_CMD_VBE is not set
 +# CONFIG_BOOTM_VXWORKS is not set
-+CONFIG_SYS_BOOTM_LEN=0x4000000
-+CONFIG_CMD_BOOTEFI=y
-+CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-+# CONFIG_CMD_BOOTEFI_HELLO is not set
-+# CONFIG_CMD_BOOTEFI_SELFTEST is not set
++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 +CONFIG_CMD_BOOTMENU=y
-+# CONFIG_CMD_ADTIMG is not set
-+CONFIG_CMD_ELF=y
-+CONFIG_CMD_FDT=y
-+CONFIG_CMD_GO=y
-+CONFIG_CMD_RUN=y
-+CONFIG_CMD_IMI=y
-+# CONFIG_CMD_IMLS is not set
-+CONFIG_CMD_XIMG=y
-+# CONFIG_CMD_ZBOOT is not set
-+
-+#
-+# Environment commands
-+#
 +CONFIG_CMD_ASKENV=y
-+CONFIG_CMD_EXPORTENV=y
-+CONFIG_CMD_IMPORTENV=y
-+CONFIG_CMD_EDITENV=y
-+# CONFIG_CMD_GREPENV is not set
-+CONFIG_CMD_SAVEENV=y
 +CONFIG_CMD_ERASEENV=y
-+CONFIG_CMD_ENV_EXISTS=y
-+CONFIG_CMD_ENV_READMEM=y
-+# CONFIG_CMD_ENV_CALLBACK is not set
 +CONFIG_CMD_ENV_FLAGS=y
-+# CONFIG_CMD_NVEDIT_EFI is not set
-+# CONFIG_CMD_NVEDIT_INDIRECT is not set
-+# CONFIG_CMD_NVEDIT_INFO is not set
-+# CONFIG_CMD_NVEDIT_LOAD is not set
-+# CONFIG_CMD_NVEDIT_SELECT is not set
-+
-+#
-+# Memory commands
-+#
-+# CONFIG_CMD_BINOP is not set
-+# CONFIG_CMD_BLOBLIST is not set
-+CONFIG_CMD_CRC32=y
-+# CONFIG_CRC32_VERIFY is not set
-+# CONFIG_CMD_EEPROM is not set
-+# CONFIG_LOOPW is not set
-+# CONFIG_CMD_MD5SUM is not set
-+# CONFIG_CMD_MEMINFO is not set
-+CONFIG_CMD_MEMORY=y
-+# CONFIG_CMD_MEM_SEARCH is not set
-+# CONFIG_CMD_MX_CYCLIC is not set
-+CONFIG_CMD_RANDOM=y
-+# CONFIG_CMD_MEMTEST is not set
-+# CONFIG_CMD_SHA1SUM is not set
 +CONFIG_CMD_STRINGS=y
-+
-+#
-+# Compression commands
-+#
-+CONFIG_CMD_LZMADEC=y
 +# CONFIG_CMD_UNLZ4 is not set
 +# CONFIG_CMD_UNZIP is not set
-+# CONFIG_CMD_ZIP is not set
-+
-+#
-+# Device access commands
-+#
-+# CONFIG_CMD_ARMFLASH is not set
-+# CONFIG_CMD_BIND is not set
-+# CONFIG_CMD_CLK is not set
-+# CONFIG_CMD_DEMO is not set
-+# CONFIG_CMD_DFU is not set
 +CONFIG_CMD_DM=y
-+CONFIG_CMD_FLASH=y
-+# CONFIG_CMD_FPGAD is not set
-+# CONFIG_CMD_FUSE is not set
 +CONFIG_CMD_GPIO=y
-+# CONFIG_CMD_GPIO_READ is not set
 +CONFIG_CMD_PWM=y
-+# CONFIG_CMD_GPT is not set
-+# CONFIG_RANDOM_UUID is not set
-+# CONFIG_CMD_IDE is not set
-+# CONFIG_CMD_IO is not set
-+# CONFIG_CMD_IOTRACE is not set
-+# CONFIG_CMD_I2C is not set
-+CONFIG_CMD_LOADB=y
-+# CONFIG_CMD_LOADM is not set
-+CONFIG_CMD_LOADS=y
-+# CONFIG_LOADS_ECHO is not set
-+# CONFIG_CMD_SAVES is not set
-+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-+CONFIG_CMD_LOADXY_TIMEOUT=90
-+# CONFIG_CMD_LSBLK is not set
-+# CONFIG_CMD_MBR is not set
-+# CONFIG_CMD_CLONE is not set
 +CONFIG_CMD_MTD=y
-+CONFIG_CMD_NAND_EXT=y
-+# CONFIG_CMD_ONENAND is not set
-+# CONFIG_CMD_OSD is not set
-+# CONFIG_CMD_PART is not set
 +CONFIG_CMD_PCI=y
-+CONFIG_CMD_PINMUX=y
-+# CONFIG_CMD_POWEROFF is not set
-+# CONFIG_CMD_READ is not set
-+# CONFIG_CMD_SATA is not set
-+# CONFIG_CMD_SDRAM is not set
-+CONFIG_CMD_SF=y
 +CONFIG_CMD_SF_TEST=y
-+# CONFIG_CMD_SPI is not set
-+# CONFIG_CMD_TSI148 is not set
-+# CONFIG_CMD_UNIVERSE is not set
 +CONFIG_CMD_USB=y
-+# CONFIG_CMD_USB_SDP is not set
-+# CONFIG_CMD_RKMTD is not set
-+# CONFIG_CMD_WRITE is not set
-+
-+#
-+# Shell scripting commands
-+#
-+# CONFIG_CMD_CAT is not set
-+CONFIG_CMD_ECHO=y
-+CONFIG_CMD_ITEST=y
-+CONFIG_CMD_SOURCE=y
-+CONFIG_CMD_SETEXPR=y
-+# CONFIG_CMD_SETEXPR_FMT is not set
-+# CONFIG_CMD_XXD is not set
-+
-+#
-+# Android support commands
-+#
-+CONFIG_CMD_NET=y
-+CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_DHCP=y
-+# CONFIG_BOOTP_MAY_FAIL is not set
-+CONFIG_BOOTP_BOOTPATH=y
-+# CONFIG_BOOTP_VENDOREX is not set
-+# CONFIG_BOOTP_BOOTFILESIZE is not set
-+CONFIG_BOOTP_DNS=y
-+# CONFIG_BOOTP_DNS2 is not set
-+CONFIG_BOOTP_GATEWAY=y
-+CONFIG_BOOTP_HOSTNAME=y
-+# CONFIG_BOOTP_PREFER_SERVERIP is not set
-+CONFIG_BOOTP_SUBNETMASK=y
-+# CONFIG_BOOTP_NISDOMAIN is not set
-+# CONFIG_BOOTP_NTPSERVER is not set
-+# CONFIG_BOOTP_TIMEOFFSET is not set
-+# CONFIG_CMD_PCAP is not set
-+CONFIG_BOOTP_PXE=y
-+CONFIG_BOOTP_PXE_CLIENTARCH=0x16
-+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
-+CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
-+CONFIG_CMD_TFTPBOOT=y
-+# CONFIG_CMD_TFTPPUT is not set
 +CONFIG_CMD_TFTPSRV=y
-+CONFIG_NET_TFTP_VARS=y
 +CONFIG_CMD_RARP=y
-+# CONFIG_CMD_NFS is not set
-+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-+# CONFIG_CMD_WGET is not set
-+# CONFIG_CMD_MII is not set
-+# CONFIG_CMD_MDIO is not set
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_LINK_LOCAL=y
-+# CONFIG_CMD_ETHSW is not set
 +CONFIG_CMD_PXE=y
-+# CONFIG_CMD_WOL is not set
-+
-+#
-+# Misc commands
-+#
-+# CONFIG_CMD_2048 is not set
-+# CONFIG_CMD_BSP is not set
-+CONFIG_CMD_BLOCK_CACHE=y
-+CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
-+# CONFIG_CMD_CONITRACE is not set
-+# CONFIG_CMD_CLS is not set
-+# CONFIG_CMD_EFIDEBUG is not set
-+CONFIG_CMD_EFICONFIG=y
-+# CONFIG_CMD_EXCEPTION is not set
-+CONFIG_CMD_LED=y
-+# CONFIG_CMD_INI is not set
-+# CONFIG_CMD_DATE is not set
-+# CONFIG_CMD_TIME is not set
-+# CONFIG_CMD_GETTIME is not set
-+# CONFIG_CMD_PAUSE is not set
-+CONFIG_CMD_SLEEP=y
-+# CONFIG_CMD_TIMER is not set
-+# CONFIG_CMD_SYSBOOT is not set
-+# CONFIG_CMD_QFW is not set
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
-+CONFIG_CMD_PSTORE_MEM_SIZE=0x10000
-+CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000
-+CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000
-+CONFIG_CMD_PSTORE_FTRACE_SIZE=0x1000
-+CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000
-+CONFIG_CMD_PSTORE_ECC_SIZE=0
-+# CONFIG_CMD_TERMINAL is not set
 +CONFIG_CMD_UUID=y
-+
-+#
-+# TI specific command line interface
-+#
-+
-+#
-+# Power commands
-+#
-+
-+#
-+# Security commands
-+#
-+# CONFIG_CMD_AES is not set
-+# CONFIG_CMD_BLOB is not set
 +CONFIG_CMD_HASH=y
-+# CONFIG_CMD_HVC is not set
 +CONFIG_CMD_SMC=y
-+# CONFIG_HASH_VERIFY is not set
-+
-+#
-+# Firmware commands
-+#
-+
-+#
-+# Filesystem commands
-+#
-+# CONFIG_CMD_BTRFS is not set
-+# CONFIG_CMD_EROFS is not set
-+# CONFIG_CMD_EXT2 is not set
-+# CONFIG_CMD_EXT4 is not set
 +CONFIG_CMD_FAT=y
-+# CONFIG_CMD_SQUASHFS is not set
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_FS_UUID=y
-+# CONFIG_CMD_JFFS2 is not set
-+# CONFIG_CMD_MTDPARTS is not set
-+CONFIG_MTDIDS_DEFAULT=""
-+CONFIG_MTDPARTS_DEFAULT=""
-+# CONFIG_CMD_REISER is not set
-+# CONFIG_CMD_ZFS is not set
-+
-+#
-+# Debug commands
-+#
-+# CONFIG_CMD_DIAG is not set
-+# CONFIG_CMD_EVENT is not set
-+# CONFIG_CMD_LOG is not set
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
-+CONFIG_CMD_UBIFS=y
-+
-+#
-+# Partition Types
-+#
-+CONFIG_PARTITIONS=y
-+# CONFIG_MAC_PARTITION is not set
-+CONFIG_DOS_PARTITION=y
-+# CONFIG_ISO_PARTITION is not set
-+# CONFIG_AMIGA_PARTITION is not set
-+# CONFIG_EFI_PARTITION is not set
-+CONFIG_PARTITION_UUIDS=y
-+CONFIG_SUPPORT_OF_CONTROL=y
-+
-+#
-+# Device Tree Control
-+#
-+CONFIG_OF_CONTROL=y
-+CONFIG_OF_REAL=y
-+# CONFIG_OF_LIVE is not set
-+CONFIG_OF_SEPARATE=y
-+# CONFIG_OF_EMBED is not set
-+# CONFIG_OF_BOARD is not set
-+# CONFIG_OF_OMIT_DTB is not set
-+CONFIG_DEVICE_TREE_INCLUDES=""
-+CONFIG_OF_LIST="openwrt-one"
-+# CONFIG_MULTI_DTB_FIT is not set
-+CONFIG_OF_TAG_MIGRATE=y
-+# CONFIG_OF_DTB_PROPS_REMOVE is not set
-+
-+#
-+# Environment
-+#
-+CONFIG_ENV_SUPPORT=y
-+CONFIG_SAVEENV=y
 +CONFIG_ENV_OVERWRITE=y
-+CONFIG_ENV_MIN_ENTRIES=64
-+CONFIG_ENV_MAX_ENTRIES=512
-+# CONFIG_ENV_IS_NOWHERE is not set
-+# CONFIG_ENV_IS_IN_EEPROM is not set
-+# CONFIG_ENV_IS_IN_FAT is not set
-+# CONFIG_ENV_IS_IN_EXT4 is not set
-+# CONFIG_ENV_IS_IN_FLASH is not set
-+# CONFIG_ENV_IS_IN_MTD is not set
-+# CONFIG_ENV_IS_IN_NAND is not set
-+# CONFIG_ENV_IS_IN_NVRAM is not set
-+# CONFIG_ENV_IS_IN_ONENAND is not set
-+# CONFIG_ENV_IS_IN_REMOTE is not set
-+# CONFIG_ENV_IS_IN_SPI_FLASH is not set
 +CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_ENV_UBI_PART="ubi"
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
-+# CONFIG_ENV_UBI_VOLUME_CREATE is not set
-+CONFIG_ENV_UBI_VID_OFFSET=0
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 +CONFIG_USE_DEFAULT_ENV_FILE=y
 +CONFIG_DEFAULT_ENV_FILE="openwrt-one-spi-nand_env"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+# CONFIG_ENV_IMPORT_FDT is not set
-+# CONFIG_ENV_APPEND is not set
-+# CONFIG_ENV_WRITEABLE_LIST is not set
-+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-+# CONFIG_USE_BOOTFILE is not set
-+# CONFIG_USE_ETHPRIME is not set
-+# CONFIG_USE_HOSTNAME is not set
-+# CONFIG_VERSION_VARIABLE is not set
-+CONFIG_NET=y
-+CONFIG_ARP_TIMEOUT=5000
-+CONFIG_NET_RETRY_COUNT=5
-+CONFIG_PROT_UDP=y
-+CONFIG_BOOTDEV_ETH=y
-+# CONFIG_BOOTP_SEND_HOSTNAME is not set
++CONFIG_VERSION_VARIABLE=y
 +CONFIG_NET_RANDOM_ETHADDR=y
-+# CONFIG_NETCONSOLE is not set
-+# CONFIG_IP_DEFRAG is not set
-+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-+CONFIG_TFTP_BLOCKSIZE=1468
-+# CONFIG_TFTP_PORT is not set
-+CONFIG_TFTP_WINDOWSIZE=1
-+# CONFIG_TFTP_TSIZE is not set
-+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-+# CONFIG_KEEP_SERVERADDR is not set
-+# CONFIG_UDP_CHECKSUM is not set
-+# CONFIG_BOOTP_SERVERIP is not set
-+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-+# CONFIG_USE_GATEWAYIP is not set
-+# CONFIG_USE_IPADDR is not set
-+# CONFIG_USE_NETMASK is not set
-+# CONFIG_USE_ROOTPATH is not set
-+# CONFIG_USE_SERVERIP is not set
-+# CONFIG_PROT_TCP is not set
-+# CONFIG_IPV6 is not set
-+CONFIG_SYS_RX_ETH_BUFFER=4
-+
-+#
-+# Device Drivers
-+#
-+
-+#
-+# Generic Driver Options
-+#
-+CONFIG_DM=y
-+# CONFIG_DM_WARN is not set
-+# CONFIG_DM_DEBUG is not set
-+# CONFIG_DM_STATS is not set
-+CONFIG_DM_DEVICE_REMOVE=y
-+CONFIG_DM_EVENT=y
-+CONFIG_DM_STDIO=y
-+CONFIG_DM_SEQ_ALIAS=y
-+# CONFIG_DM_DMA is not set
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
-+# CONFIG_DEVRES is not set
-+CONFIG_SIMPLE_BUS=y
-+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-+# CONFIG_SIMPLE_PM_BUS is not set
-+CONFIG_OF_TRANSLATE=y
-+# CONFIG_TRANSLATION_OFFSET is not set
-+CONFIG_DM_DEV_READ_INLINE=y
-+# CONFIG_OFNODE_MULTI_TREE is not set
-+# CONFIG_BOUNCE_BUFFER is not set
-+# CONFIG_ADC is not set
-+# CONFIG_ADC_EXYNOS is not set
-+# CONFIG_ADC_SANDBOX is not set
-+# CONFIG_SARADC_MESON is not set
-+# CONFIG_SARADC_ROCKCHIP is not set
-+# CONFIG_SATA is not set
-+# CONFIG_SCSI_AHCI is not set
-+
-+#
-+# SATA/SCSI device support
-+#
-+# CONFIG_AXI is not set
-+
-+#
-+# Bus devices
-+#
-+CONFIG_BLK=y
-+CONFIG_BLOCK_CACHE=y
-+# CONFIG_BLKMAP is not set
-+# CONFIG_EFI_MEDIA is not set
-+# CONFIG_IDE is not set
-+# CONFIG_LBA48 is not set
-+# CONFIG_SYS_64BIT_LBA is not set
-+# CONFIG_RKMTD is not set
-+# CONFIG_BOOTCOUNT_LIMIT is not set
-+
-+#
-+# Button Support
-+#
 +CONFIG_BUTTON=y
-+# CONFIG_BUTTON_ADC is not set
 +CONFIG_BUTTON_GPIO=y
-+
-+#
-+# Cache Controller drivers
-+#
-+# CONFIG_CACHE is not set
-+# CONFIG_L2X0_CACHE is not set
-+# CONFIG_V5L2_CACHE is not set
-+# CONFIG_NCORE_CACHE is not set
-+# CONFIG_SIFIVE_CCACHE is not set
-+
-+#
-+# Clock
-+#
 +CONFIG_CLK=y
-+# CONFIG_CLK_CCF is not set
-+# CONFIG_CLK_GPIO is not set
-+# CONFIG_CLK_CDCE9XX is not set
-+# CONFIG_CLK_ICS8N3QV01 is not set
-+# CONFIG_CLK_K210 is not set
-+# CONFIG_CLK_MPC83XX is not set
-+# CONFIG_CLK_XLNX_CLKWZRD is not set
-+# CONFIG_CLK_AT91 is not set
-+# CONFIG_CLK_RCAR is not set
-+# CONFIG_CLK_RCAR_CPG_LIB is not set
-+# CONFIG_CLK_SIFIVE is not set
-+# CONFIG_CLK_TI_AM3_DPLL is not set
-+# CONFIG_CLK_TI_CTRL is not set
-+# CONFIG_CLK_TI_GATE is not set
-+# CONFIG_CLK_K3 is not set
-+CONFIG_CPU=y
-+# CONFIG_CPU_IMX is not set
-+
-+#
-+# Hardware crypto devices
-+#
-+# CONFIG_DM_HASH is not set
-+# CONFIG_FSL_CAAM is not set
-+CONFIG_CAAM_64BIT=y
-+# CONFIG_SYS_FSL_SEC_BE is not set
-+# CONFIG_SYS_FSL_SEC_LE is not set
-+# CONFIG_NPCM_AES is not set
-+# CONFIG_NPCM_SHA is not set
-+# CONFIG_DDR_SPD is not set
-+# CONFIG_IMX_SNPS_DDR_PHY is not set
-+
-+#
-+# Demo for driver model
-+#
-+# CONFIG_DM_DEMO is not set
-+
-+#
-+# DFU support
-+#
-+
-+#
-+# DMA Support
-+#
-+# CONFIG_DMA is not set
-+# CONFIG_DMA_LPC32XX is not set
-+# CONFIG_TI_EDMA3 is not set
-+# CONFIG_DMA_LEGACY is not set
-+
-+#
-+# Extcon Support
-+#
-+# CONFIG_EXTCON is not set
-+
-+#
-+# Fastboot support
-+#
-+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-+CONFIG_FIRMWARE=y
-+CONFIG_ARM_PSCI_FW=y
-+# CONFIG_ZYNQMP_FIRMWARE is not set
-+# CONFIG_ARM_SMCCC_FEATURES is not set
-+# CONFIG_ARM_FFA_TRANSPORT is not set
-+# CONFIG_SCMI_FIRMWARE is not set
-+# CONFIG_DM_FUZZING_ENGINE is not set
-+
-+#
-+# FPGA support
-+#
-+# CONFIG_FPGA_ALTERA is not set
-+# CONFIG_FPGA_SOCFPGA is not set
-+# CONFIG_FPGA_LATTICE is not set
-+# CONFIG_FPGA_XILINX is not set
-+# CONFIG_DM_FPGA is not set
-+# CONFIG_FWU_MDATA is not set
-+CONFIG_GPIO=y
 +CONFIG_GPIO_HOG=y
-+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
-+# CONFIG_ALTERA_PIO is not set
-+# CONFIG_BCM2835_GPIO is not set
-+# CONFIG_DWAPB_GPIO is not set
-+# CONFIG_AT91_GPIO is not set
-+# CONFIG_ATMEL_PIO4 is not set
-+# CONFIG_ASPEED_GPIO is not set
-+# CONFIG_DA8XX_GPIO is not set
-+# CONFIG_HIKEY_GPIO is not set
-+# CONFIG_INTEL_BROADWELL_GPIO is not set
-+# CONFIG_INTEL_GPIO is not set
-+# CONFIG_INTEL_ICH6_GPIO is not set
-+# CONFIG_IMX_RGPIO2P is not set
-+# CONFIG_IPROC_GPIO is not set
-+# CONFIG_HSDK_CREG_GPIO is not set
-+# CONFIG_KIRKWOOD_GPIO is not set
-+# CONFIG_LPC32XX_GPIO is not set
-+# CONFIG_MCP230XX_GPIO is not set
-+# CONFIG_MSM_GPIO is not set
-+# CONFIG_MXC_GPIO is not set
-+# CONFIG_MXS_GPIO is not set
-+# CONFIG_NPCM_GPIO is not set
-+# CONFIG_CMD_PCA953X is not set
-+# CONFIG_ROCKCHIP_GPIO is not set
-+# CONFIG_XILINX_GPIO is not set
-+# CONFIG_TCA642X is not set
-+# CONFIG_TEGRA_GPIO is not set
-+# CONFIG_TEGRA186_GPIO is not set
-+# CONFIG_VYBRID_GPIO is not set
-+# CONFIG_SIFIVE_GPIO is not set
-+# CONFIG_ZYNQ_GPIO is not set
-+# CONFIG_DM_74X164 is not set
-+# CONFIG_PCA953X is not set
-+# CONFIG_MPC8XXX_GPIO is not set
-+# CONFIG_MPC8XX_GPIO is not set
-+# CONFIG_NX_GPIO is not set
-+# CONFIG_NOMADIK_GPIO is not set
-+# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
-+# CONFIG_SLG7XL45106_I2C_GPO is not set
-+# CONFIG_TURRIS_OMNIA_MCU is not set
-+# CONFIG_FTGPIO010 is not set
-+
-+#
-+# Hardware Spinlock Support
-+#
-+# CONFIG_DM_HWSPINLOCK is not set
-+CONFIG_I2C=y
-+# CONFIG_DM_I2C is not set
-+# CONFIG_SYS_I2C_LEGACY is not set
-+# CONFIG_SPL_SYS_I2C_LEGACY is not set
-+# CONFIG_SYS_I2C_FSL is not set
-+# CONFIG_SYS_I2C_DW is not set
-+# CONFIG_SYS_I2C_IMX_LPI2C is not set
-+# CONFIG_SYS_I2C_MTK is not set
-+# CONFIG_SYS_I2C_MICROCHIP is not set
-+# CONFIG_SYS_I2C_MXC is not set
-+# CONFIG_SYS_I2C_NPCM is not set
-+# CONFIG_SYS_I2C_SOFT is not set
-+# CONFIG_SYS_I2C_MV is not set
-+# CONFIG_SYS_I2C_MVTWSI is not set
-+CONFIG_INPUT=y
-+# CONFIG_DM_KEYBOARD is not set
-+# CONFIG_CROS_EC_KEYB is not set
-+# CONFIG_TEGRA_KEYBOARD is not set
-+# CONFIG_TWL4030_INPUT is not set
-+
-+#
-+# IOMMU device drivers
-+#
-+# CONFIG_IOMMU is not set
-+
-+#
-+# LED Support
-+#
 +CONFIG_LED=y
-+# CONFIG_LED_PWM is not set
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
-+# CONFIG_LED_STATUS is not set
-+
-+#
-+# Mailbox Controller Support
-+#
-+# CONFIG_DM_MAILBOX is not set
-+
-+#
-+# Memory Controller drivers
-+#
-+# CONFIG_MEMORY is not set
-+# CONFIG_ATMEL_EBI is not set
-+# CONFIG_MFD_ATMEL_SMC is not set
-+
-+#
-+# Multifunction device drivers
-+#
-+# CONFIG_MISC is not set
-+# CONFIG_NVMEM is not set
-+# CONFIG_SPL_NVMEM is not set
-+# CONFIG_SMSC_LPC47M is not set
-+# CONFIG_SMSC_SIO1007 is not set
-+# CONFIG_CROS_EC is not set
-+# CONFIG_DS4510 is not set
-+# CONFIG_FSL_SEC_MON is not set
-+# CONFIG_IRQ is not set
-+# CONFIG_NPCM_HOST is not set
-+# CONFIG_NUVOTON_NCT6102D is not set
-+# CONFIG_PWRSEQ is not set
-+# CONFIG_PCA9551_LED is not set
-+# CONFIG_TEST_DRV is not set
-+# CONFIG_USB_HUB_USB251XB is not set
-+# CONFIG_TWL4030_LED is not set
-+# CONFIG_WINBOND_W83627 is not set
-+# CONFIG_FS_LOADER is not set
-+
-+#
-+# MMC Host controller Support
-+#
 +# CONFIG_MMC is not set
-+# CONFIG_MMC_BROKEN_CD is not set
-+# CONFIG_DM_MMC is not set
-+# CONFIG_FSL_ESDHC is not set
-+# CONFIG_FSL_ESDHC_IMX is not set
-+
-+#
-+# MTD Support
-+#
-+CONFIG_MTD_PARTITIONS=y
 +CONFIG_MTD=y
 +CONFIG_DM_MTD=y
-+# CONFIG_MTD_NOR_FLASH is not set
-+# CONFIG_MTD_CONCAT is not set
-+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
-+# CONFIG_FLASH_CFI_DRIVER is not set
-+# CONFIG_CFI_FLASH is not set
-+# CONFIG_ALTERA_QSPI is not set
-+# CONFIG_HBMC_AM654 is not set
-+# CONFIG_SAMSUNG_ONENAND is not set
-+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
-+CONFIG_MTD_NAND_CORE=y
 +# CONFIG_MTD_RAW_NAND is not set
 +CONFIG_MTD_SPI_NAND=y
-+
-+#
-+# SPI Flash Support
-+#
 +CONFIG_DM_SPI_FLASH=y
-+CONFIG_SPI_FLASH=y
-+CONFIG_SF_DEFAULT_BUS=0
-+CONFIG_SF_DEFAULT_CS=0
-+# CONFIG_BOOTDEV_SPI_FLASH is not set
 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-+CONFIG_SPI_FLASH_SMART_HWCAPS=y
-+# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
-+# CONFIG_SPI_FLASH_SOFT_RESET is not set
-+# CONFIG_SPI_FLASH_BAR is not set
-+CONFIG_SPI_FLASH_LOCK=y
-+CONFIG_SPI_FLASH_UNLOCK_ALL=y
-+# CONFIG_SPI_FLASH_ATMEL is not set
 +CONFIG_SPI_FLASH_EON=y
 +CONFIG_SPI_FLASH_GIGADEVICE=y
 +CONFIG_SPI_FLASH_ISSI=y
 +CONFIG_SPI_FLASH_MACRONIX=y
 +CONFIG_SPI_FLASH_SPANSION=y
-+# CONFIG_SPI_FLASH_S28HX_T is not set
 +CONFIG_SPI_FLASH_STMICRO=y
-+# CONFIG_SPI_FLASH_MT35XU is not set
-+# CONFIG_SPI_FLASH_SST is not set
 +CONFIG_SPI_FLASH_WINBOND=y
 +CONFIG_SPI_FLASH_XMC=y
 +CONFIG_SPI_FLASH_XTX=y
-+# CONFIG_SPI_FLASH_ZBIT is not set
-+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-+# CONFIG_SPI_FLASH_DATAFLASH is not set
 +CONFIG_SPI_FLASH_MTD=y
-+
-+#
-+# UBI support
-+#
-+CONFIG_UBI_SILENCE_MSG=y
-+CONFIG_MTD_UBI=y
-+CONFIG_MTD_UBI_MODULE=y
-+CONFIG_MTD_UBI_WL_THRESHOLD=4096
-+CONFIG_MTD_UBI_BEB_LIMIT=20
-+# CONFIG_MTD_UBI_FASTMAP is not set
-+# CONFIG_NVMXIP is not set
-+# CONFIG_NVMXIP_QSPI is not set
-+# CONFIG_NMBM is not set
-+
-+#
-+# Multiplexer drivers
-+#
-+# CONFIG_MULTIPLEXER is not set
-+# CONFIG_BITBANGMII is not set
-+# CONFIG_MV88E6352_SWITCH is not set
-+CONFIG_PHYLIB=y
-+# CONFIG_PHY_ADDR_ENABLE is not set
-+# CONFIG_B53_SWITCH is not set
-+# CONFIG_MV88E61XX_SWITCH is not set
-+# CONFIG_PHYLIB_10G is not set
-+# CONFIG_PHY_ADIN is not set
-+# CONFIG_PHY_AIROHA is not set
-+# CONFIG_PHY_AQUANTIA is not set
-+# CONFIG_PHY_ATHEROS is not set
-+# CONFIG_SPL_PHY_ATHEROS is not set
-+# CONFIG_PHY_BROADCOM is not set
-+# CONFIG_PHY_CORTINA is not set
-+# CONFIG_PHY_DAVICOM is not set
-+# CONFIG_PHY_ET1011C is not set
-+# CONFIG_PHY_LXT is not set
-+# CONFIG_PHY_MARVELL is not set
-+# CONFIG_PHY_MARVELL_10G is not set
-+# CONFIG_PHY_MESON_GXL is not set
-+# CONFIG_PHY_MICREL is not set
-+# CONFIG_PHY_MOTORCOMM is not set
-+# CONFIG_PHY_MSCC is not set
-+# CONFIG_PHY_NATSEMI is not set
-+# CONFIG_PHY_NXP_C45_TJA11XX is not set
-+# CONFIG_PHY_NXP_TJA11XX is not set
-+# CONFIG_PHY_REALTEK is not set
-+# CONFIG_PHY_SMSC is not set
-+# CONFIG_PHY_TERANETICS is not set
-+# CONFIG_PHY_TI is not set
-+# CONFIG_PHY_TI_DP83867 is not set
-+# CONFIG_PHY_TI_DP83869 is not set
-+# CONFIG_PHY_TI_GENERIC is not set
-+# CONFIG_PHY_VITESSE is not set
-+# CONFIG_PHY_XILINX is not set
-+# CONFIG_PHY_XILINX_GMII2RGMII is not set
-+# CONFIG_PHY_XWAY is not set
-+# CONFIG_PHY_ETHERNET_ID is not set
 +CONFIG_PHY_FIXED=y
-+# CONFIG_PHY_NCSI is not set
-+# CONFIG_FSL_MEMAC is not set
-+CONFIG_PHY_RESET_DELAY=0
-+# CONFIG_FSL_PFE is not set
-+CONFIG_ETH=y
-+CONFIG_DM_ETH=y
-+# CONFIG_DM_MDIO is not set
-+# CONFIG_DM_ETH_PHY is not set
-+CONFIG_NETDEVICES=y
-+# CONFIG_PHY_GIGE is not set
-+# CONFIG_ALTERA_TSE is not set
-+# CONFIG_BCM_SF2_ETH is not set
-+# CONFIG_BCMGENET is not set
-+# CONFIG_BNXT_ETH is not set
-+# CONFIG_CALXEDA_XGMAC is not set
-+# CONFIG_DRIVER_DM9000 is not set
-+# CONFIG_DWC_ETH_QOS is not set
-+# CONFIG_EEPRO100 is not set
-+# CONFIG_ETH_DESIGNWARE is not set
-+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-+# CONFIG_ETHOC is not set
-+# CONFIG_FMAN_ENET is not set
-+# CONFIG_FTMAC100 is not set
-+# CONFIG_FTGMAC100 is not set
-+# CONFIG_MCFFEC is not set
-+# CONFIG_FSLDMAFEC is not set
-+# CONFIG_KS8851_MLL is not set
-+# CONFIG_LITEETH is not set
-+# CONFIG_MACB is not set
-+# CONFIG_NET_NPCM750 is not set
-+# CONFIG_PCH_GBE is not set
-+# CONFIG_RGMII is not set
-+# CONFIG_MII is not set
-+# CONFIG_RMII is not set
-+# CONFIG_PCNET is not set
-+# CONFIG_QE_UEC is not set
-+# CONFIG_RTL8139 is not set
-+# CONFIG_SMC911X is not set
-+# CONFIG_SUN7I_GMAC is not set
-+# CONFIG_SUN4I_EMAC is not set
-+# CONFIG_SUN8I_EMAC is not set
-+# CONFIG_SH_ETHER is not set
-+# CONFIG_DRIVER_TI_CPSW is not set
-+# CONFIG_DRIVER_TI_EMAC is not set
-+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-+# CONFIG_TULIP is not set
-+# CONFIG_XILINX_AXIEMAC is not set
-+# CONFIG_VSC7385_ENET is not set
-+# CONFIG_XILINX_EMACLITE is not set
-+# CONFIG_ZYNQ_GEM is not set
-+# CONFIG_SYS_DPAA_QBMAN is not set
-+# CONFIG_TSEC_ENET is not set
 +CONFIG_MEDIATEK_ETH=y
-+# CONFIG_HIFEMAC_ETH is not set
-+# CONFIG_HIGMACV300_ETH is not set
-+# CONFIG_NVME is not set
-+# CONFIG_NVME_APPLE is not set
-+
-+#
-+# PCI Endpoint
-+#
-+# CONFIG_PCI_ENDPOINT is not set
-+# CONFIG_X86_PCH7 is not set
-+# CONFIG_X86_PCH9 is not set
-+
-+#
-+# PHY Subsystem
-+#
 +CONFIG_PHY=y
-+# CONFIG_NOP_PHY is not set
-+# CONFIG_MIPI_DPHY_HELPERS is not set
-+# CONFIG_BCM_SR_PCIE_PHY is not set
-+# CONFIG_OMAP_USB2_PHY is not set
 +CONFIG_PHY_MTK_TPHY=y
-+
-+#
-+# Rockchip PHY driver
-+#
-+# CONFIG_PHY_CADENCE_SIERRA is not set
-+# CONFIG_PHY_CADENCE_TORRENT is not set
-+# CONFIG_MSM8916_USB_PHY is not set
-+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-+
-+#
-+# Pin controllers
-+#
 +CONFIG_PINCTRL=y
-+CONFIG_PINCTRL_FULL=y
-+CONFIG_PINCTRL_GENERIC=y
-+CONFIG_PINMUX=y
 +CONFIG_PINCONF=y
-+CONFIG_PINCONF_RECURSIVE=y
-+# CONFIG_PINCTRL_AT91 is not set
-+# CONFIG_PINCTRL_AT91PIO4 is not set
-+# CONFIG_PINCTRL_INTEL is not set
-+# CONFIG_PINCTRL_QE is not set
-+# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
-+# CONFIG_PINCTRL_SINGLE is not set
-+# CONFIG_PINCTRL_STM32 is not set
-+# CONFIG_PINCTRL_STMFX is not set
-+# CONFIG_PINCTRL_K210 is not set
-+CONFIG_PINCTRL_MTK=y
-+# CONFIG_PINCTRL_MT7622 is not set
-+# CONFIG_PINCTRL_MT7623 is not set
-+# CONFIG_PINCTRL_MT7629 is not set
 +CONFIG_PINCTRL_MT7981=y
-+# CONFIG_PINCTRL_MT7986 is not set
-+# CONFIG_PINCTRL_MT7988 is not set
-+# CONFIG_PINCTRL_MT8512 is not set
-+# CONFIG_PINCTRL_MT8516 is not set
-+# CONFIG_PINCTRL_MT8518 is not set
-+CONFIG_POWER=y
-+# CONFIG_POWER_LEGACY is not set
-+# CONFIG_ACPI_PMC is not set
-+
-+#
-+# Power Domain Support
-+#
 +CONFIG_POWER_DOMAIN=y
-+# CONFIG_APPLE_PMGR_POWER_DOMAIN is not set
 +CONFIG_MTK_POWER_DOMAIN=y
-+# CONFIG_DM_PMIC is not set
-+# CONFIG_PMIC_TPS65217 is not set
-+# CONFIG_POWER_TPS65218 is not set
-+# CONFIG_POWER_TPS62362 is not set
-+# CONFIG_DM_REGULATOR is not set
-+# CONFIG_TPS6586X_POWER is not set
-+# CONFIG_POWER_MT6323 is not set
 +CONFIG_DM_PWM=y
-+# CONFIG_PWM_ASPEED is not set
-+# CONFIG_PWM_CADENCE_TTC is not set
-+# CONFIG_PWM_CROS_EC is not set
-+# CONFIG_PWM_EXYNOS is not set
-+# CONFIG_PWM_IMX is not set
-+# CONFIG_PWM_MESON is not set
 +CONFIG_PWM_MTK=y
-+# CONFIG_PWM_ROCKCHIP is not set
-+# CONFIG_PWM_SANDBOX is not set
-+# CONFIG_PWM_SIFIVE is not set
-+# CONFIG_PWM_TEGRA is not set
-+# CONFIG_PWM_SUNXI is not set
-+# CONFIG_U_QE is not set
-+# CONFIG_RAM is not set
-+
-+#
-+# Reboot Mode Support
-+#
-+# CONFIG_DM_REBOOT_MODE is not set
-+
-+#
-+# Remote Processor drivers
-+#
-+
-+#
-+# Reset Controller Support
-+#
-+# CONFIG_RESET_AST2500 is not set
-+# CONFIG_RESET_AST2600 is not set
-+CONFIG_RESET_MEDIATEK=y
-+# CONFIG_RESET_HISILICON is not set
-+# CONFIG_RESET_SYSCON is not set
-+# CONFIG_RESET_SCMI is not set
-+# CONFIG_RESET_DRA7 is not set
-+# CONFIG_DM_RNG is not set
-+
-+#
-+# Real Time Clock
-+#
-+# CONFIG_DM_RTC is not set
-+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-+# CONFIG_RTC_DS1337 is not set
-+# CONFIG_RTC_DS1338 is not set
-+# CONFIG_RTC_DS1374 is not set
-+# CONFIG_RTC_DS3231 is not set
-+# CONFIG_RTC_PCF8563 is not set
-+# CONFIG_RTC_PT7C4338 is not set
-+# CONFIG_RTC_PL031 is not set
-+# CONFIG_RTC_S35392A is not set
-+# CONFIG_RTC_MC13XXX is not set
-+# CONFIG_RTC_MC146818 is not set
-+# CONFIG_RTC_M41T62 is not set
-+# CONFIG_SCSI is not set
-+# CONFIG_DM_SCSI is not set
-+CONFIG_SERIAL=y
-+CONFIG_BAUDRATE=115200
-+# CONFIG_DEFAULT_ENV_IS_RW is not set
-+CONFIG_REQUIRE_SERIAL_CONSOLE=y
-+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-+CONFIG_SERIAL_PRESENT=y
 +CONFIG_DM_SERIAL=y
-+# CONFIG_SERIAL_RX_BUFFER is not set
-+# CONFIG_SERIAL_PUTS is not set
-+# CONFIG_SERIAL_SEARCH_ALL is not set
-+# CONFIG_SERIAL_PROBE_ALL is not set
-+# CONFIG_VPL_DM_SERIAL is not set
-+CONFIG_DEBUG_UART_MTK=y
-+CONFIG_DEBUG_UART_SHIFT=0
-+# CONFIG_DEBUG_UART_ANNOUNCE is not set
-+# CONFIG_DEBUG_UART_SKIP_INIT is not set
-+# CONFIG_ALTERA_JTAG_UART is not set
-+# CONFIG_ALTERA_UART is not set
-+# CONFIG_ARC_SERIAL is not set
-+# CONFIG_ARM_DCC is not set
-+# CONFIG_ATMEL_USART is not set
-+# CONFIG_BCM6345_SERIAL is not set
-+# CONFIG_COREBOOT_SERIAL is not set
-+# CONFIG_CORTINA_UART is not set
-+# CONFIG_FSL_LINFLEXUART is not set
-+# CONFIG_FSL_LPUART is not set
-+# CONFIG_MVEBU_A3700_UART is not set
-+# CONFIG_MCFUART is not set
-+# CONFIG_NULLDEV_SERIAL is not set
-+# CONFIG_SYS_NS16550 is not set
-+# CONFIG_PL01X_SERIAL is not set
-+# CONFIG_ROCKCHIP_SERIAL is not set
-+# CONFIG_XILINX_UARTLITE is not set
-+# CONFIG_MSM_SERIAL is not set
-+# CONFIG_MSM_GENI_SERIAL is not set
-+# CONFIG_MXS_AUART_SERIAL is not set
-+# CONFIG_OMAP_SERIAL is not set
-+# CONFIG_SIFIVE_SERIAL is not set
-+# CONFIG_ZYNQ_SERIAL is not set
 +CONFIG_MTK_SERIAL=y
-+# CONFIG_MT7620_SERIAL is not set
-+# CONFIG_NPCM_SERIAL is not set
-+# CONFIG_SM is not set
-+# CONFIG_MESON_SM is not set
-+# CONFIG_SMEM is not set
-+
-+#
-+# Sound support
-+#
-+# CONFIG_SOUND is not set
-+
-+#
-+# SOC (System On Chip) specific Drivers
-+#
-+# CONFIG_SOC_DEVICE is not set
-+# CONFIG_SOC_TI is not set
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
-+CONFIG_SPI_MEM=y
-+# CONFIG_SPI_DIRMAP is not set
-+# CONFIG_ALTERA_SPI is not set
-+# CONFIG_APPLE_SPI is not set
-+# CONFIG_ATCSPI200_SPI is not set
-+# CONFIG_ATMEL_SPI is not set
-+# CONFIG_BCMSTB_SPI is not set
-+# CONFIG_CORTINA_SFLASH is not set
-+# CONFIG_CADENCE_QSPI is not set
-+# CONFIG_CF_SPI is not set
-+# CONFIG_DESIGNWARE_SPI is not set
-+# CONFIG_EXYNOS_SPI is not set
-+# CONFIG_FSL_DSPI is not set
-+# CONFIG_FSL_QSPI is not set
-+# CONFIG_GXP_SPI is not set
-+# CONFIG_ICH_SPI is not set
-+# CONFIG_IPROC_QSPI is not set
-+# CONFIG_KIRKWOOD_SPI is not set
-+# CONFIG_MICROCHIP_COREQSPI is not set
-+# CONFIG_MPC8XXX_SPI is not set
-+# CONFIG_MTK_SNOR is not set
-+# CONFIG_MTK_SNFI_SPI is not set
 +CONFIG_MTK_SPIM=y
-+# CONFIG_MVEBU_A3700_SPI is not set
-+# CONFIG_MXS_SPI is not set
-+# CONFIG_SPI_MXIC is not set
-+# CONFIG_NPCM_FIU_SPI is not set
-+# CONFIG_NPCM_PSPI is not set
-+# CONFIG_NXP_FSPI is not set
-+# CONFIG_OMAP3_SPI is not set
-+# CONFIG_PL022_SPI is not set
-+# CONFIG_ROCKCHIP_SFC is not set
-+# CONFIG_ROCKCHIP_SPI is not set
-+# CONFIG_SPI_ASPEED_SMC is not set
-+# CONFIG_SPI_SIFIVE is not set
-+# CONFIG_SOFT_SPI is not set
-+# CONFIG_SPI_SN_F_OSPI is not set
-+# CONFIG_SPI_SUNXI is not set
-+# CONFIG_TEGRA114_SPI is not set
-+# CONFIG_TEGRA20_SFLASH is not set
-+# CONFIG_TEGRA20_SLINK is not set
-+# CONFIG_TEGRA210_QSPI is not set
-+# CONFIG_TI_QSPI is not set
-+# CONFIG_XILINX_SPI is not set
-+# CONFIG_ZYNQ_SPI is not set
-+# CONFIG_ZYNQ_QSPI is not set
-+# CONFIG_ZYNQMP_GQSPI is not set
-+# CONFIG_SH_QSPI is not set
-+# CONFIG_MXC_SPI is not set
-+
-+#
-+# SPMI support
-+#
-+# CONFIG_SPMI is not set
-+# CONFIG_SYSINFO is not set
-+
-+#
-+# System reset device drivers
-+#
-+# CONFIG_SYSRESET is not set
-+# CONFIG_TEE is not set
-+# CONFIG_DM_THERMAL is not set
-+
-+#
-+# Timer Support
-+#
-+# CONFIG_TIMER is not set
-+
-+#
-+# TPM support
-+#
 +CONFIG_USB=y
-+CONFIG_DM_USB=y
-+# CONFIG_DM_USB_GADGET is not set
-+
-+#
-+# USB Host Controller Drivers
-+#
-+CONFIG_USB_HOST=y
 +CONFIG_USB_XHCI_HCD=y
-+# CONFIG_USB_XHCI_DWC3 is not set
-+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
 +CONFIG_USB_XHCI_MTK=y
-+# CONFIG_USB_XHCI_FSL is not set
-+# CONFIG_USB_XHCI_BRCM is not set
-+# CONFIG_USB_EHCI_HCD is not set
-+# CONFIG_USB_OHCI_HCD is not set
-+# CONFIG_USB_UHCI_HCD is not set
-+# CONFIG_USB_DWC2 is not set
-+# CONFIG_USB_R8A66597_HCD is not set
-+# CONFIG_USB_ISP1760 is not set
-+# CONFIG_USB_CDNS3 is not set
-+# CONFIG_USB_DWC3 is not set
-+# CONFIG_USB_MTU3 is not set
-+
-+#
-+# Legacy MUSB Support
-+#
-+# CONFIG_USB_MUSB_HCD is not set
-+# CONFIG_USB_MUSB_UDC is not set
-+
-+#
-+# MUSB Controller Driver
-+#
-+# CONFIG_USB_MUSB_HOST is not set
-+# CONFIG_USB_MUSB_PIO_ONLY is not set
-+
-+#
-+# USB Phy
-+#
-+# CONFIG_TWL4030_USB is not set
-+# CONFIG_ROCKCHIP_USB2_PHY is not set
-+
-+#
-+# ULPI drivers
-+#
-+
-+#
-+# USB peripherals
-+#
 +CONFIG_USB_STORAGE=y
-+# CONFIG_USB_KEYBOARD is not set
-+# CONFIG_USB_ONBOARD_HUB is not set
-+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-+# CONFIG_USB_HOST_ETHER is not set
-+# CONFIG_USB_GADGET is not set
-+# CONFIG_SPL_USB_GADGET is not set
-+
-+#
-+# UFS Host Controller Support
-+#
-+# CONFIG_TI_J721E_UFS is not set
-+
-+#
-+# Graphics support
-+#
-+# CONFIG_VIDEO is not set
-+
-+#
-+# VirtIO Drivers
-+#
-+# CONFIG_VIRTIO_MMIO is not set
-+
-+#
-+# 1-Wire support
-+#
-+# CONFIG_W1 is not set
-+
-+#
-+# 1-wire EEPROM support
-+#
-+# CONFIG_W1_EEPROM is not set
-+
-+#
-+# Watchdog Timer Support
-+#
-+# CONFIG_WATCHDOG is not set
-+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-+# CONFIG_IMX_WATCHDOG is not set
-+# CONFIG_ULP_WATCHDOG is not set
-+# CONFIG_WDT is not set
-+# CONFIG_PHYS_TO_BUS is not set
-+
-+#
-+# File systems
-+#
-+# CONFIG_FS_BTRFS is not set
-+# CONFIG_FS_CBFS is not set
-+# CONFIG_FS_EXT4 is not set
-+CONFIG_FS_FAT=y
-+CONFIG_FAT_WRITE=y
-+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-+# CONFIG_FS_JFFS2 is not set
-+CONFIG_UBIFS_SILENCE_MSG=y
-+CONFIG_UBIFS_SILENCE_DEBUG_DUMP=y
-+# CONFIG_FS_CRAMFS is not set
-+# CONFIG_YAFFS2 is not set
-+# CONFIG_FS_SQUASHFS is not set
-+# CONFIG_FS_EROFS is not set
-+
-+#
-+# Library routines
-+#
-+# CONFIG_ADDR_MAP is not set
-+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-+# CONFIG_PHYSMEM is not set
-+# CONFIG_BCH is not set
-+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-+CONFIG_CHARSET=y
-+# CONFIG_DYNAMIC_CRC_TABLE is not set
-+CONFIG_LIB_UUID=y
-+# CONFIG_SEMIHOSTING is not set
-+CONFIG_PRINTF=y
-+CONFIG_SPRINTF=y
-+CONFIG_STRTO=y
-+CONFIG_SYS_HZ=1000
-+# CONFIG_PANIC_HANG is not set
-+CONFIG_REGEX=y
-+CONFIG_LIB_RAND=y
-+# CONFIG_LIB_HW_RAND is not set
-+CONFIG_SUPPORT_ACPI=y
-+# CONFIG_ACPI is not set
-+CONFIG_RBTREE=y
-+# CONFIG_BITREVERSE is not set
-+# CONFIG_TRACE is not set
-+# CONFIG_CIRCBUF is not set
-+# CONFIG_CMD_DHRYSTONE is not set
-+
-+#
-+# Security support
-+#
-+# CONFIG_AES is not set
-+# CONFIG_ECDSA is not set
-+# CONFIG_RSA is not set
-+# CONFIG_TPM is not set
-+
-+#
-+# Android Verified Boot
-+#
-+
-+#
-+# Hashing Support
-+#
-+# CONFIG_BLAKE2 is not set
-+CONFIG_SHA1=y
-+CONFIG_SHA256=y
-+# CONFIG_SHA512 is not set
-+# CONFIG_SHA384 is not set
-+# CONFIG_SHA_HW_ACCEL is not set
-+CONFIG_MD5=y
-+CONFIG_CRC8=y
-+CONFIG_CRC32=y
-+
-+#
-+# Compression Support
-+#
-+# CONFIG_LZ4 is not set
-+CONFIG_LZMA=y
-+CONFIG_LZO=y
-+CONFIG_GZIP=y
-+# CONFIG_ZLIB_UNCOMPRESS is not set
-+# CONFIG_BZIP2 is not set
-+CONFIG_ZLIB=y
-+# CONFIG_ZSTD is not set
-+CONFIG_VPL_LZMA=y
-+# CONFIG_SPL_GZIP is not set
-+# CONFIG_ERRNO_STR is not set
 +CONFIG_HEXDUMP=y
-+# CONFIG_GETOPT is not set
-+CONFIG_OF_LIBFDT=y
-+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
-+CONFIG_SYS_FDT_PAD=0x3000
-+
-+#
-+# System tables
-+#
-+CONFIG_GENERATE_SMBIOS_TABLE=y
-+# CONFIG_LIB_RATIONAL is not set
-+CONFIG_SMBIOS=y
-+# CONFIG_SMBIOS_PARSER is not set
-+CONFIG_EFI_LOADER=y
-+CONFIG_CMD_BOOTEFI_BOOTMGR=y
-+CONFIG_EFI_VARIABLE_FILE_STORE=y
-+# CONFIG_EFI_VARIABLE_NO_STORE is not set
-+# CONFIG_EFI_VARIABLES_PRESEED is not set
-+CONFIG_EFI_VAR_BUF_SIZE=131072
-+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-+CONFIG_EFI_CAPSULE_MAX=15
-+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-+CONFIG_EFI_DEVICE_PATH_UTIL=y
-+CONFIG_EFI_DT_FIXUP=y
-+CONFIG_EFI_LOADER_HII=y
-+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-+CONFIG_EFI_UNICODE_CAPITALIZATION=y
-+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
-+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-+CONFIG_EFI_HAVE_RUNTIME_RESET=y
-+CONFIG_EFI_LOAD_FILE2_INITRD=y
-+CONFIG_EFI_ECPT=y
-+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-+# CONFIG_OPTEE_LIB is not set
-+# CONFIG_OPTEE_IMAGE is not set
-+# CONFIG_BOOTM_OPTEE is not set
-+# CONFIG_TEST_FDTDEC is not set
-+CONFIG_LIB_ELF=y
-+CONFIG_LMB=y
-+CONFIG_LMB_USE_MAX_REGIONS=y
 +CONFIG_LMB_MAX_REGIONS=64
-+# CONFIG_PHANDLE_CHECK_SEQ is not set
-+
-+#
-+# Testing
-+#
-+# CONFIG_UNIT_TEST is not set
-+# CONFIG_POST is not set
-+
-+#
-+# Tools options
-+#
-+CONFIG_MKIMAGE_DTC_PATH="dtc"
-+CONFIG_TOOLS_CRC32=y
-+CONFIG_TOOLS_LIBCRYPTO=y
-+CONFIG_TOOLS_FIT=y
-+CONFIG_TOOLS_FIT_FULL_CHECK=y
-+CONFIG_TOOLS_FIT_PRINT=y
-+CONFIG_TOOLS_FIT_RSASSA_PSS=y
-+CONFIG_TOOLS_FIT_SIGNATURE=y
-+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-+CONFIG_TOOLS_FIT_VERBOSE=y
-+CONFIG_TOOLS_MD5=y
-+CONFIG_TOOLS_OF_LIBFDT=y
-+CONFIG_TOOLS_SHA1=y
-+CONFIG_TOOLS_SHA256=y
-+CONFIG_TOOLS_SHA384=y
-+CONFIG_TOOLS_SHA512=y
-+# CONFIG_TOOLS_MKEFICAPSULE is not set
-+# CONFIG_FSPI_CONF_HEADER is not set
-+# CONFIG_TOOLS_MKFWUMDATA is not set
 --- /dev/null
 +++ b/openwrt-one-nor_env
 @@ -0,0 +1,46 @@
diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index 48d72ca55c..d127d7108d 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -24,6 +24,24 @@ define U-Boot/Default
 endef
 
 
+# RK3308 boards
+
+define U-Boot/rk3308/Default
+  BUILD_SUBTARGET:=armv8
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308
+  ATF:=rk3308_bl31_v2.26.elf
+  TPL:=rk3308_ddr_589MHz_uart2_m1_v2.07.bin
+endef
+
+define U-Boot/rock-pi-s-rk3308
+  $(U-Boot/rk3308/Default)
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308-rock-pi-s
+  TPL:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
+  NAME:=ROCK Pi S
+  BUILD_DEVICES:= \
+    radxa_rock-pi-s
+endef
+
 # RK3328 boards
 
 define U-Boot/rk3328/Default
@@ -88,6 +106,13 @@ define U-Boot/rock-pi-e-rk3328
     radxa_rock-pi-e
 endef
 
+define U-Boot/rock-pi-e-v3-rk3328
+  $(U-Boot/rk3328/Default)
+  NAME:=ROCK Pi E v3.0
+  BUILD_DEVICES:= \
+    radxa_rock-pi-e-v3
+endef
+
 # RK3399 boards
 
 define U-Boot/rk3399/Default
@@ -174,16 +199,42 @@ endef
 
 define U-Boot/radxa-e25-rk3568
   $(U-Boot/rk3568/Default)
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3568-e25
+  TPL:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
   NAME:=E25
   BUILD_DEVICES:= \
     radxa_e25
 endef
 
+define U-Boot/rock-3a-rk3568
+  $(U-Boot/rk3568/Default)
+  NAME:=ROCK 3A
+  BUILD_DEVICES:= \
+    radxa_rock-3a
+endef
+
+# RK3588 boards
+
+define U-Boot/Default/rk3588
+  BUILD_SUBTARGET:=armv8
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3588
+  ATF:=rk3588_bl31_v1.45.elf
+  TPL:=rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
+endef
+
+define U-Boot/nanopi-r6s-rk3588s
+  $(U-Boot/Default/rk3588)
+  NAME:=NanoPi R6S
+  BUILD_DEVICES:= \
+    friendlyarm_nanopi-r6s
+endef
+
 UBOOT_TARGETS := \
   nanopc-t4-rk3399 \
   nanopi-r4s-rk3399 \
   rock-pi-4-rk3399 \
   rockpro64-rk3399 \
+  rock-pi-s-rk3308 \
   nanopi-r2c-rk3328 \
   nanopi-r2c-plus-rk3328 \
   nanopi-r2s-rk3328 \
@@ -192,11 +243,14 @@ UBOOT_TARGETS := \
   roc-cc-rk3328 \
   rock64-rk3328 \
   rock-pi-e-rk3328 \
+  rock-pi-e-v3-rk3328 \
   radxa-cm3-io-rk3566 \
   bpi-r2-pro-rk3568 \
   nanopi-r5c-rk3568 \
   nanopi-r5s-rk3568 \
-  radxa-e25-rk3568
+  radxa-e25-rk3568 \
+  rock-3a-rk3568 \
+  nanopi-r6s-rk3588s
 
 UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
 
diff --git a/package/boot/uboot-rockchip/patches/000-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch b/package/boot/uboot-rockchip/patches/000-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch
new file mode 100644
index 0000000000..515e07c3f8
--- /dev/null
+++ b/package/boot/uboot-rockchip/patches/000-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch
@@ -0,0 +1,248 @@
+From 8ca5e0e4d6ed084d2321584e8cdc8105c60b9aa1 Mon Sep 17 00:00:00 2001
+From: FUKAUMI Naoki <naoki@radxa.com>
+Date: Tue, 25 Jun 2024 05:45:29 +0900
+Subject: [PATCH] rockchip: add support for Radxa ROCK Pi E v3.0
+
+ROCK Pi E v3.0 uses DDR4 SDRAM instead of DDR3 SDRAM used in v1.2x.
+
+prepare new rk3328-rock-pi-e-v3.dts in u-boot which just includes
+upstream rk3328-rock-pi-e.dts.
+
+defconfig still uses
+ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
+
+because v3.0 and prior are compatible.
+
+Suggested-by: Jonas Karlman <jonas@kwiboo.se>
+Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ ...dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} |  1 -
+ arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi     | 47 +--------
+ arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi  |  4 +
+ arch/arm/dts/rk3328-rock-pi-e-v3.dts          |  4 +
+ board/rockchip/evb_rk3328/MAINTAINERS         |  4 +-
+ configs/rock-pi-e-v3-rk3328_defconfig         | 97 +++++++++++++++++++
+ 6 files changed, 111 insertions(+), 46 deletions(-)
+ copy arch/arm/dts/{rk3328-rock-pi-e-u-boot.dtsi => rk3328-rock-pi-e-base-u-boot.dtsi} (94%)
+ rewrite arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi (88%)
+ create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3328-rock-pi-e-v3.dts
+ create mode 100644 configs/rock-pi-e-v3-rk3328_defconfig
+
+--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
++++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+@@ -1,43 +1,4 @@
+ // SPDX-License-Identifier: GPL-2.0+
+-/*
+- * (C) Copyright 2020 Radxa
+- */
+ 
+-#include "rk3328-u-boot.dtsi"
++#include "rk3328-rock-pi-e-base-u-boot.dtsi"
+ #include "rk3328-sdram-ddr3-666.dtsi"
+-
+-/ {
+-	smbios {
+-		compatible = "u-boot,sysinfo-smbios";
+-
+-		smbios {
+-			system {
+-				manufacturer = "radxa";
+-				product = "rock-pi-e_rk3328";
+-			};
+-
+-			baseboard {
+-				manufacturer = "radxa";
+-				product = "rock-pi-e_rk3328";
+-			};
+-
+-			chassis {
+-				manufacturer = "radxa";
+-				product = "rock-pi-e_rk3328";
+-			};
+-		};
+-	};
+-};
+-
+-&u2phy_host {
+-	phy-supply = <&vcc_host_5v>;
+-};
+-
+-&vcc_host_5v {
+-	/delete-property/ regulator-always-on;
+-	/delete-property/ regulator-boot-on;
+-};
+-
+-&vcc_sd {
+-	bootph-pre-ram;
+-};
+--- /dev/null
++++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi
+@@ -0,0 +1,42 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2020 Radxa
++ */
++
++#include "rk3328-u-boot.dtsi"
++
++/ {
++	smbios {
++		compatible = "u-boot,sysinfo-smbios";
++
++		smbios {
++			system {
++				manufacturer = "radxa";
++				product = "rock-pi-e_rk3328";
++			};
++
++			baseboard {
++				manufacturer = "radxa";
++				product = "rock-pi-e_rk3328";
++			};
++
++			chassis {
++				manufacturer = "radxa";
++				product = "rock-pi-e_rk3328";
++			};
++		};
++	};
++};
++
++&u2phy_host {
++	phy-supply = <&vcc_host_5v>;
++};
++
++&vcc_host_5v {
++	/delete-property/ regulator-always-on;
++	/delete-property/ regulator-boot-on;
++};
++
++&vcc_sd {
++	bootph-pre-ram;
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi
+@@ -0,0 +1,4 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include "rk3328-rock-pi-e-base-u-boot.dtsi"
++#include "rk3328-sdram-ddr4-666.dtsi"
+--- /dev/null
++++ b/arch/arm/dts/rk3328-rock-pi-e-v3.dts
+@@ -0,0 +1,4 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++#include "rk3328-rock-pi-e.dts"
+--- a/board/rockchip/evb_rk3328/MAINTAINERS
++++ b/board/rockchip/evb_rk3328/MAINTAINERS
+@@ -64,5 +64,5 @@ M:      Banglang Huang <banglang.huang@f
+ R:      Jonas Karlman <jonas@kwiboo.se>
+ S:      Maintained
+ F:      configs/rock-pi-e-rk3328_defconfig
+-F:      arch/arm/dts/rk3328-rock-pi-e.dts
+-F:      arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
++F:      configs/rock-pi-e-v3-rk3328_defconfig
++F:      arch/arm/dts/rk3328-rock-pi-e*
+--- /dev/null
++++ b/configs/rock-pi-e-v3-rk3328_defconfig
+@@ -0,0 +1,97 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SPL_GPIO=y
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e-v3"
++CONFIG_DM_RESET=y
++CONFIG_ROCKCHIP_RK3328=y
++CONFIG_DEBUG_UART_BASE=0xFF130000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_POWER=y
++CONFIG_SPL_ATF=y
++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_TIME=y
++CONFIG_CMD_REGULATOR=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_TPL_OF_CONTROL=y
++# CONFIG_OF_UPSTREAM is not set
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_TPL_OF_PLATDATA=y
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SYS_MMC_ENV_DEV=1
++CONFIG_TPL_DM=y
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_REGMAP=y
++CONFIG_SPL_REGMAP=y
++CONFIG_TPL_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_SPL_SYSCON=y
++CONFIG_TPL_SYSCON=y
++CONFIG_CLK=y
++CONFIG_SPL_CLK=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DM_MDIO=y
++CONFIG_DM_ETH_PHY=y
++CONFIG_PHY_GIGE=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PINCTRL=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM=y
++CONFIG_SPL_RAM=y
++CONFIG_TPL_RAM=y
++CONFIG_DM_RNG=y
++CONFIG_RNG_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSINFO=y
++CONFIG_SYSINFO_SMBIOS=y
++CONFIG_SYSRESET=y
++# CONFIG_TPL_SYSRESET is not set
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_TPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y
diff --git a/package/boot/uboot-rockchip/patches/001-backport-upstream-dts-sync.patch b/package/boot/uboot-rockchip/patches/001-backport-upstream-dts-sync.patch
new file mode 100644
index 0000000000..b6984ec3e5
--- /dev/null
+++ b/package/boot/uboot-rockchip/patches/001-backport-upstream-dts-sync.patch
@@ -0,0 +1,767 @@
+--- /dev/null
++++ b/dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6s.dts
+@@ -0,0 +1,764 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/pinctrl/rockchip.h>
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include "rk3588s.dtsi"
++
++/ {
++	model = "FriendlyElec NanoPi R6S";
++	compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588s";
++
++	aliases {
++		ethernet0 = &gmac1;
++		mmc0 = &sdmmc;
++		mmc1 = &sdhci;
++	};
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	adc-keys {
++		compatible = "adc-keys";
++		io-channels = <&saradc 0>;
++		io-channel-names = "buttons";
++		keyup-threshold-microvolt = <1800000>;
++		poll-interval = <100>;
++
++		button-maskrom {
++			label = "Maskrom";
++			linux,code = <KEY_VENDOR>;
++			press-threshold-microvolt = <1800>;
++		};
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		pinctrl-names = "default";
++		pinctrl-0 = <&key1_pin>;
++
++		button-user {
++			label = "User";
++			linux,code = <BTN_1>;
++			gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
++			debounce-interval = <50>;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		sys_led: led-0 {
++			label = "sys_led";
++			gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
++			linux,default-trigger = "heartbeat";
++			pinctrl-names = "default";
++			pinctrl-0 = <&sys_led_pin>;
++		};
++
++		wan_led: led-1 {
++			label = "wan_led";
++			gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&wan_led_pin>;
++		};
++
++		lan1_led: led-2 {
++			label = "lan1_led";
++			gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&lan1_led_pin>;
++		};
++
++		lan2_led: led-3 {
++			label = "lan2_led";
++			gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&lan2_led_pin>;
++		};
++	};
++
++	vcc5v0_sys: vcc5v0-sys-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_1v1_nldo_s3";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <1100000>;
++		regulator-max-microvolt = <1100000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	vcc_3v3_s0: vcc-3v3-s0-regulator {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-name = "vcc_3v3_s0";
++		vin-supply = <&vcc_3v3_s3>;
++	};
++
++	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&sd_s0_pwr>;
++		regulator-name = "vcc_3v3_sd_s0";
++		regulator-boot-on;
++		regulator-max-microvolt = <3000000>;
++		regulator-min-microvolt = <3000000>;
++		vin-supply = <&vcc_3v3_s3>;
++	};
++
++	vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_3v3_pcie20";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vcc_3v3_s3>;
++	};
++
++	vcc5v0_usb: vcc5v0-usb-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_usb";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&typec5v_pwren>;
++		regulator-name = "vcc5v0_usb_otg0";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_usb>;
++	};
++
++	vcc5v0_host_20: vcc5v0-host-20-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc5v0_host20_en>;
++		regulator-name = "vcc5v0_host_20";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_usb>;
++	};
++};
++
++&combphy0_ps {
++	status = "okay";
++};
++
++&combphy2_psu {
++	status = "okay";
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b2 {
++	cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_b3 {
++	cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&gmac1 {
++	clock_in_out = "output";
++	phy-handle = <&rgmii_phy1>;
++	phy-mode = "rgmii-rxid";
++	pinctrl-0 = <&gmac1_miim
++		     &gmac1_tx_bus2
++		     &gmac1_rx_bus2
++		     &gmac1_rgmii_clk
++		     &gmac1_rgmii_bus>;
++	pinctrl-names = "default";
++	tx_delay = <0x42>;
++	status = "okay";
++};
++
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0m2_xfer>;
++	status = "okay";
++
++	vdd_cpu_big0_s0: regulator@42 {
++		compatible = "rockchip,rk8602";
++		reg = <0x42>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu_big0_s0";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <550000>;
++		regulator-max-microvolt = <1050000>;
++		regulator-ramp-delay = <2300>;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_cpu_big1_s0: regulator@43 {
++		compatible = "rockchip,rk8603", "rockchip,rk8602";
++		reg = <0x43>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu_big1_s0";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <550000>;
++		regulator-max-microvolt = <1050000>;
++		regulator-ramp-delay = <2300>;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++};
++
++&i2c2 {
++	status = "okay";
++
++	vdd_npu_s0: regulator@42 {
++		compatible = "rockchip,rk8602";
++		reg = <0x42>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_npu_s0";
++		regulator-min-microvolt = <550000>;
++		regulator-max-microvolt = <950000>;
++		regulator-ramp-delay = <2300>;
++		regulator-boot-on;
++		regulator-always-on;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++};
++
++&i2c6 {
++	clock-frequency = <200000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c6m0_xfer>;
++	status = "okay";
++
++	hym8563: rtc@51 {
++		compatible = "haoyu,hym8563";
++		reg = <0x51>;
++		#clock-cells = <0>;
++		clock-output-names = "hym8563";
++		pinctrl-names = "default";
++		pinctrl-0 = <&rtc_int>;
++		interrupt-parent = <&gpio0>;
++		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
++		wakeup-source;
++	};
++};
++
++&mdio1 {
++	rgmii_phy1: ethernet-phy@1 {
++		compatible = "ethernet-phy-id001c.c916";
++		reg = <0x1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&rtl8211f_rst>;
++		reset-assert-us = <20000>;
++		reset-deassert-us = <100000>;
++		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++	};
++};
++
++&pcie2x1l1 {
++	reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
++	vpcie3v3-supply = <&vcc_3v3_pcie20>;
++	status = "okay";
++};
++
++&pcie2x1l2 {
++	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
++	vpcie3v3-supply = <&vcc_3v3_pcie20>;
++	status = "okay";
++};
++
++&pinctrl {
++	gpio-key {
++		key1_pin: key1-pin {
++			rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	gpio-leds {
++		sys_led_pin: sys-led-pin {
++			rockchip,pins =
++				<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		wan_led_pin: wan-led-pin {
++			rockchip,pins =
++				<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		lan1_led_pin: lan1-led-pin {
++			rockchip,pins =
++				<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		lan2_led_pin: lan2-led-pin {
++			rockchip,pins =
++				<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	hym8563 {
++		rtc_int: rtc-int {
++			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	sdmmc {
++		sd_s0_pwr: sd-s0-pwr {
++			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	usb {
++		typec5v_pwren: typec5v-pwren {
++			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		vcc5v0_host20_en: vcc5v0-host20-en {
++			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	rtl8211f {
++		rtl8211f_rst: rtl8211f-rst {
++			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++};
++
++&saradc {
++	vref-supply = <&avcc_1v8_s0>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	no-sdio;
++	no-sd;
++	non-removable;
++	mmc-hs200-1_8v;
++	status = "okay";
++};
++
++&sdmmc {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	disable-wp;
++	max-frequency = <150000000>;
++	no-mmc;
++	no-sdio;
++	sd-uhs-sdr104;
++	vmmc-supply = <&vcc_3v3_sd_s0>;
++	vqmmc-supply = <&vccio_sd_s0>;
++	status = "okay";
++};
++
++&spi2 {
++	status = "okay";
++	assigned-clocks = <&cru CLK_SPI2>;
++	assigned-clock-rates = <200000000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
++	num-cs = <1>;
++
++	pmic@0 {
++		compatible = "rockchip,rk806";
++		spi-max-frequency = <1000000>;
++		reg = <0x0>;
++
++		interrupt-parent = <&gpio0>;
++		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
++			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
++
++		system-power-controller;
++
++		vcc1-supply = <&vcc5v0_sys>;
++		vcc2-supply = <&vcc5v0_sys>;
++		vcc3-supply = <&vcc5v0_sys>;
++		vcc4-supply = <&vcc5v0_sys>;
++		vcc5-supply = <&vcc5v0_sys>;
++		vcc6-supply = <&vcc5v0_sys>;
++		vcc7-supply = <&vcc5v0_sys>;
++		vcc8-supply = <&vcc5v0_sys>;
++		vcc9-supply = <&vcc5v0_sys>;
++		vcc10-supply = <&vcc5v0_sys>;
++		vcc11-supply = <&vcc_2v0_pldo_s3>;
++		vcc12-supply = <&vcc5v0_sys>;
++		vcc13-supply = <&vcc_1v1_nldo_s3>;
++		vcc14-supply = <&vcc_1v1_nldo_s3>;
++		vcca-supply = <&vcc5v0_sys>;
++
++		gpio-controller;
++		#gpio-cells = <2>;
++
++		rk806_dvs1_null: dvs1-null-pins {
++			pins = "gpio_pwrctrl1";
++			function = "pin_fun0";
++		};
++
++		rk806_dvs2_null: dvs2-null-pins {
++			pins = "gpio_pwrctrl2";
++			function = "pin_fun0";
++		};
++
++		rk806_dvs3_null: dvs3-null-pins {
++			pins = "gpio_pwrctrl3";
++			function = "pin_fun0";
++		};
++
++		regulators {
++			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
++				regulator-boot-on;
++				regulator-min-microvolt = <550000>;
++				regulator-max-microvolt = <950000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_gpu_s0";
++				regulator-enable-ramp-delay = <400>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <550000>;
++				regulator-max-microvolt = <950000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_cpu_lit_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_log_s0: dcdc-reg3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <675000>;
++				regulator-max-microvolt = <750000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_log_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <750000>;
++				};
++			};
++
++			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <550000>;
++				regulator-max-microvolt = <950000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_vdenc_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_ddr_s0: dcdc-reg5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <675000>;
++				regulator-max-microvolt = <900000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_ddr_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <850000>;
++				};
++			};
++
++			vdd2_ddr_s3: dcdc-reg6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vdd2_ddr_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_2v0_pldo_s3: dcdc-reg7 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <2000000>;
++				regulator-max-microvolt = <2000000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_2v0_pldo_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <2000000>;
++				};
++			};
++
++			vcc_3v3_s3: dcdc-reg8 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc_3v3_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vddq_ddr_s0: dcdc-reg9 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vddq_ddr_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v8_s3: dcdc-reg10 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_1v8_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			avcc_1v8_s0: pldo-reg1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "avcc_1v8_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_1v8_s0: pldo-reg2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_1v8_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			avdd_1v2_s0: pldo-reg3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <1200000>;
++				regulator-name = "avdd_1v2_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			avcc_3v3_s0: pldo-reg4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "avcc_3v3_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vccio_sd_s0: pldo-reg5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vccio_sd_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			pldo6_s3: pldo-reg6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "pldo6_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vdd_0v75_s3: nldo-reg1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <750000>;
++				regulator-name = "vdd_0v75_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <750000>;
++				};
++			};
++
++			avdd_ddr_pll_s0: nldo-reg2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <850000>;
++				regulator-max-microvolt = <850000>;
++				regulator-name = "avdd_ddr_pll_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <850000>;
++				};
++			};
++
++			avdd_0v75_s0: nldo-reg3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <750000>;
++				regulator-name = "avdd_0v75_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			avdd_0v85_s0: nldo-reg4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <850000>;
++				regulator-max-microvolt = <850000>;
++				regulator-name = "avdd_0v85_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_0v75_s0: nldo-reg5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <750000>;
++				regulator-name = "vdd_0v75_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++};
++
++&tsadc {
++	status = "okay";
++};
++
++&u2phy2 {
++	status = "okay";
++};
++
++&u2phy2_host {
++	phy-supply = <&vcc5v0_host_20>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-0 = <&uart2m0_xfer>;
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_host0_ohci {
++	status = "okay";
++};
diff --git a/package/boot/uboot-rockchip/patches/106-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch b/package/boot/uboot-rockchip/patches/106-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch
new file mode 100644
index 0000000000..68958d87c9
--- /dev/null
+++ b/package/boot/uboot-rockchip/patches/106-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch
@@ -0,0 +1,193 @@
+From 7db9ff164813afb343024d37731ab797ed7f507e Mon Sep 17 00:00:00 2001
+From: Sebastian Kropatsch <seb-dev@mail.de>
+Date: Thu, 11 Jul 2024 12:15:18 +0200
+Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R6S
+
+The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
+It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
+one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
+Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
+connector, a fan connector, IR receiver as well as some buttons and LEDs.
+
+Add initial support for this board using the upstream devicetree sources.
+
+Kernel commit:
+f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
+
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
+---
+ arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi   |  3 +
+ arch/arm/mach-rockchip/rk3588/Kconfig         | 13 +++
+ board/friendlyelec/nanopi-r6s-rk3588s/Kconfig | 12 +++
+ .../nanopi-r6s-rk3588s/MAINTAINERS            |  7 ++
+ configs/nanopi-r6s-rk3588s_defconfig          | 82 +++++++++++++++++++
+ doc/board/rockchip/rockchip.rst               |  1 +
+ include/configs/nanopi-r6s-rk3588s.h          | 12 +++
+ 7 files changed, 130 insertions(+)
+ create mode 100644 arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
+ create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
+ create mode 100644 board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
+ create mode 100644 configs/nanopi-r6s-rk3588s_defconfig
+ create mode 100644 include/configs/nanopi-r6s-rk3588s.h
+
+--- /dev/null
++++ b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
+@@ -0,0 +1,3 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3588s-u-boot.dtsi"
+--- a/arch/arm/mach-rockchip/rk3588/Kconfig
++++ b/arch/arm/mach-rockchip/rk3588/Kconfig
+@@ -78,6 +78,18 @@ config TARGET_NANOPCT6_RK3588
+ 	  Power: 5.5*2.1mm DC Jack, 12VDC input
+ 	  Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
+ 
++config TARGET_NANOPI_R6S_RK3588S
++	bool "FriendlyElec NanoPi R6S"
++	select BOARD_LATE_INIT
++	help
++	  The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip
++	  RK3588s.
++	  It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC
++	  storage, one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports,
++	  one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a
++	  12-pin GPIO FPC connector, a fan connector, IR receiver as well
++	  as some buttons and LEDs.
++
+ config TARGET_NOVA_RK3588
+ 	bool "Indiedroid Nova RK3588"
+ 	select BOARD_LATE_INIT
+@@ -232,6 +244,7 @@ config TEXT_BASE
+ 
+ source "board/edgeble/neural-compute-module-6/Kconfig"
+ source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
++source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig"
+ source "board/indiedroid/nova/Kconfig"
+ source "board/pine64/quartzpro64-rk3588/Kconfig"
+ source "board/turing/turing-rk1-rk3588/Kconfig"
+--- /dev/null
++++ b/board/friendlyelec/nanopi-r6s-rk3588s/Kconfig
+@@ -0,0 +1,12 @@
++if TARGET_NANOPI_R6S_RK3588S
++
++config SYS_BOARD
++	default "nanopi-r6s-rk3588s"
++
++config SYS_VENDOR
++	default "friendlyelec"
++
++config SYS_CONFIG_NAME
++	default "nanopi-r6s-rk3588s"
++
++endif
+--- /dev/null
++++ b/board/friendlyelec/nanopi-r6s-rk3588s/MAINTAINERS
+@@ -0,0 +1,7 @@
++NANOPI-R6S
++M:	Sebastian Kropatsch <seb-dev@mail.de>
++S:	Maintained
++F:	arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi
++F:	board/friendlyelec/nanopi-r6s-rk3588s
++F:	configs/nanopi-r6s-rk3588s_defconfig
++F:	include/configs/nanopi-r6s-rk3588s.h
+--- /dev/null
++++ b/configs/nanopi-r6s-rk3588s_defconfig
+@@ -0,0 +1,82 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6s"
++CONFIG_ROCKCHIP_RK3588=y
++CONFIG_SPL_SERIAL=y
++CONFIG_TARGET_NANOPI_R6S_RK3588S=y
++CONFIG_DEBUG_UART_BASE=0xFEB50000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_PCI=y
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_FIT_SIGNATURE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_LEGACY_IMAGE_FORMAT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_ATF=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_PWM=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_ROCKUSB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_REGULATOR=y
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++# CONFIG_USB_FUNCTION_FASTBOOT is not set
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++# CONFIG_SPI_FLASH is not set
++CONFIG_PHY_REALTEK=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_DWC_ETH_QOS_ROCKCHIP=y
++CONFIG_RTL8169=y
++CONFIG_PCIE_DW_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_PHY_ROCKCHIP_USBDP=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_USB_FUNCTION_ROCKUSB=y
++CONFIG_ERRNO_STR=y
+--- /dev/null
++++ b/include/configs/nanopi-r6s-rk3588s.h
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++
++#ifndef __NANOPI_R6S_RK3588S_H
++#define __NANOPI_R6S_RK3588S_H
++
++#define ROCKCHIP_DEVICE_SETTINGS \
++		"stdout=serial,vidconsole\0" \
++		"stderr=serial,vidconsole\0"
++
++#include <configs/rk3588_common.h>
++
++#endif /* __NANOPI_R6S_RK3588S_H */
diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
index 917818db4a..fb5b18cb3d 100644
--- a/package/firmware/ipq-wifi/Makefile
+++ b/package/firmware/ipq-wifi/Makefile
@@ -6,9 +6,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
-PKG_SOURCE_DATE:=2024-06-30
-PKG_SOURCE_VERSION:=e82cba7e7ce79a04d2b658c20ac9be387ccc1dd9
-PKG_MIRROR_HASH:=c71ad9785bf382a80b4c9042f1f19da8737dc85cd11e49f18881dee94df61efd
+PKG_SOURCE_DATE:=2024-07-04
+PKG_SOURCE_VERSION:=fcdb2e74a6e4518266679292071c8f47f87b4df2
+PKG_MIRROR_HASH:=bfa2388468eb74221c7d1696089bb8ad3ca2b3b27ebff657f1962a6bbe6ccc11
 PKG_FLAGS:=nonshared
 
 include $(INCLUDE_DIR)/package.mk
@@ -29,7 +29,9 @@ endef
 ALLWIFIBOARDS:= \
 	8devices_mango \
 	arcadyan_aw1000 \
+	asus_rt-ax89x \
 	buffalo_wxr-5950ax12 \
+	cambiumnetworks_xe34 \
 	cmcc_rm2-6 \
 	compex_wpq873 \
 	dynalink_dl-wrx36 \
@@ -152,7 +154,9 @@ endef
 
 $(eval $(call generate-ipq-wifi-package,8devices_mango,8devices Mango))
 $(eval $(call generate-ipq-wifi-package,arcadyan_aw1000,Arcadyan AW1000))
+$(eval $(call generate-ipq-wifi-package,asus_rt-ax89x,Asus RT-AX89X))
 $(eval $(call generate-ipq-wifi-package,buffalo_wxr-5950ax12,Buffalo WXR-5950AX12))
+$(eval $(call generate-ipq-wifi-package,cambiumnetworks_xe34,Cambium Networks XE3-4))
 $(eval $(call generate-ipq-wifi-package,cmcc_rm2-6,CMCC RM2-6))
 $(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873))
 $(eval $(call generate-ipq-wifi-package,dynalink_dl-wrx36,Dynalink DL-WRX36))
diff --git a/package/firmware/lantiq/dsl_vr11_firmware_xdsl/Makefile b/package/firmware/lantiq/dsl_vr11_firmware_xdsl/Makefile
new file mode 100644
index 0000000000..c219e16bbb
--- /dev/null
+++ b/package/firmware/lantiq/dsl_vr11_firmware_xdsl/Makefile
@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=dsl_vr11_firmware_xdsl
+PKG_VERSION:=8.13.1.5.0.7
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_URL:=https://gitlab.com/prpl-foundation/intel/dsl_vr11_firmware_xdsl.git
+PKG_SOURCE_VERSION:=99cf1fe7a1711b9aa128eeb8419eab698448df9f
+PKG_MIRROR_HASH:=7fb37723f8db2558d774ba972f011598d2399609158c5dbc287eca0873b040f1
+
+PKG_FLAGS:=nonshared
+PKG_LICENSE:=MaxLinear-Software-License-Agreement
+PKG_LICENSE_FILES:=LICENSE
+
+include $(INCLUDE_DIR)/package.mk
+
+ANNEX_A_VER:=8D1507_8D0901
+
+define Package/$(PKG_NAME)
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  TITLE:=VRX518 / VR11 CPE xDSL Annex A firmware
+  URL:=http://www.intel.com
+  DEPENDS:=@TARGET_ipq40xx
+endef
+
+define Package/$(PKG_NAME)/description
+  VRX518 / VR11 CPE VDSL and ADSL Annex A firmware
+endef
+
+define Build/Compile
+endef
+
+define Package/$(PKG_NAME)/install
+	$(INSTALL_DIR) $(1)/lib/firmware/
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/LICENSE $(1)/lib/firmware/xcpe_$(ANNEX_A_VER).bin.LICENSE
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/xcpe_$(ANNEX_A_VER).bin $(1)/lib/firmware/
+	ln -s xcpe_$(ANNEX_A_VER).bin $(1)/lib/firmware/vdsl.bin
+endef
+
+$(eval $(call BuildPackage,$(PKG_NAME)))
diff --git a/package/firmware/lantiq/vrx518_aca_fw/Makefile b/package/firmware/lantiq/vrx518_aca_fw/Makefile
new file mode 100644
index 0000000000..60fb5b76a6
--- /dev/null
+++ b/package/firmware/lantiq/vrx518_aca_fw/Makefile
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=vrx518_aca_fw
+PKG_VERSION:=1.5.0
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_URL:=https://gitlab.com/prpl-foundation/intel/vrx518_aca_fw.git
+PKG_SOURCE_VERSION:=c509b89c77c26a7df0f0999aabf78b82ca9c9ff0
+PKG_MIRROR_HASH:=fba91071f18599617434d93e78c67dad91b3e4c5811b77c15961e3a13b506d2e
+
+PKG_FLAGS:=nonshared
+PKG_LICENSE:=MaxLinear-Software-License-Agreement
+PKG_LICENSE_FILES:=platform/xrx500/LICENSE
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/$(PKG_NAME)
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  TITLE:=VRX518 ACA firmware
+  URL:=http://www.intel.com
+  DEPENDS:=@TARGET_ipq40xx
+endef
+
+define Package/$(PKG_NAME)/description
+  VRX518 ACA firmware
+endef
+
+define Build/Compile
+endef
+
+define Package/$(PKG_NAME)/install
+	$(INSTALL_DIR) $(1)/lib/firmware/09a9
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/platform/xrx500/LICENSE $(1)/lib/firmware/09a9/aca_fw.bin.LICENSE
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/platform/xrx500/aca_fw.bin $(1)/lib/firmware/09a9
+endef
+
+$(eval $(call BuildPackage,$(PKG_NAME)))
diff --git a/package/firmware/lantiq/vrx518_ppe_fw/Makefile b/package/firmware/lantiq/vrx518_ppe_fw/Makefile
new file mode 100644
index 0000000000..90a6f73daa
--- /dev/null
+++ b/package/firmware/lantiq/vrx518_ppe_fw/Makefile
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=vrx518_ppe_fw
+PKG_VERSION:=1.3.7
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_URL:=https://gitlab.com/prpl-foundation/intel/vrx518_ppe_fw.git
+PKG_SOURCE_VERSION:=47c48d52ba59df733ab21fd0c18f6d1a7b0e7229
+PKG_MIRROR_HASH:=33dd15b6c6205b5031498aac9a5a4876f8217aefea06dc511ac60ca1343b50d1
+
+PKG_FLAGS:=nonshared
+PKG_LICENSE:=MaxLinear-Software-License-Agreement
+PKG_LICENSE_FILES:=platform/xrx500/LICENSE
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/$(PKG_NAME)
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  TITLE:=VRX518 PPE firmware
+  URL:=http://www.intel.com
+  DEPENDS:=@TARGET_ipq40xx
+endef
+
+define Package/$(PKG_NAME)/description
+  VRX518 PPE firmware
+endef
+
+define Build/Compile
+endef
+
+define Package/$(PKG_NAME)/install
+	$(INSTALL_DIR) $(1)/lib/firmware
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/platform/xrx500/LICENSE $(1)/lib/firmware/ppe_fw.bin.LICENSE
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/platform/xrx500/ppe_fw.bin $(1)/lib/firmware/
+endef
+
+$(eval $(call BuildPackage,$(PKG_NAME)))
diff --git a/package/firmware/linux-firmware/amd.mk b/package/firmware/linux-firmware/amd.mk
index b669cf1b35..c1f5711e92 100644
--- a/package/firmware/linux-firmware/amd.mk
+++ b/package/firmware/linux-firmware/amd.mk
@@ -1,4 +1,4 @@
-Package/amd64-microcode = $(call Package/firmware-default,AMD64 CPU microcode,@TARGET_x86,LICENSE.amd-ucode)
+Package/amd64-microcode = $(call Package/firmware-default,AMD64 CPU microcode,,LICENSE.amd-ucode)
 define Package/amd64-microcode/install
 	$(INSTALL_DIR) $(1)/lib/firmware/amd-ucode
 	$(CP) \
diff --git a/package/firmware/omnia-mcu-firmware/Makefile b/package/firmware/omnia-mcu-firmware/Makefile
new file mode 100644
index 0000000000..6f7bd6ca70
--- /dev/null
+++ b/package/firmware/omnia-mcu-firmware/Makefile
@@ -0,0 +1,49 @@
+#
+# Copyright (C) 2024 CZ.NIC z.s.p.o. (http://www.nic.cz/)
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=omnia-mcu-firmware
+PKG_DISTNAME:=omnia_hw_ctrl
+PKG_VERSION:=4.1
+PKG_RELEASE:=1
+
+PKG_SOURCE_SUBDIR:=$(PKG_DISTNAME)-binaries-v$(PKG_VERSION)
+PKG_SOURCE:=$(PKG_SOURCE_SUBDIR).tar.bz2
+PKG_SOURCE_URL:=https://gitlab.nic.cz/turris/hw/$(PKG_DISTNAME)/-/releases/v$(PKG_VERSION)/downloads/
+PKG_HASH:=9c6a3d88ae2ca093dd35aace040f0b1eb1cb5c1141575b45623bdd64d733c59f
+
+PKG_MAINTAINER:=Marek Mojik <marek.mojik@nic.cz>
+PKG_LICENSE:=GPL-3.0-or-later
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_SOURCE_SUBDIR)
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/omnia-mcu-firmware
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  URL:=https://gitlab.nic.cz/turris/hw/$(PKG_DISTNAME)/-/releases
+  TITLE:=CZ.NIC Turris Omnia MCU firmware
+  DEPENDS:=@TARGET_mvebu_cortexa9_DEVICE_cznic_turris-omnia
+endef
+
+define Package/omnia-mcu-firmware/description
+Firmware binaries for the microcontroller on the Turris Omnia router. These are
+used by the omnia-mcutool utility when upgrading MCU firmware.
+endef
+
+define Build/Compile
+	true
+endef
+
+define Package/omnia-mcu-firmware/install
+	$(INSTALL_DIR) $(1)/usr/share/omnia-mcu-firmware/
+	$(INSTALL_DATA) $(PKG_BUILD_DIR)/*.bin $(1)/usr/share/omnia-mcu-firmware/
+endef
+
+$(eval $(call BuildPackage,omnia-mcu-firmware))
diff --git a/package/firmware/wireless-regdb/Makefile b/package/firmware/wireless-regdb/Makefile
index 5b95ec59de..4cce267f61 100644
--- a/package/firmware/wireless-regdb/Makefile
+++ b/package/firmware/wireless-regdb/Makefile
@@ -1,14 +1,14 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wireless-regdb
-PKG_VERSION:=2024.05.08
+PKG_VERSION:=2024.07.04
 PKG_RELEASE:=1
 PKG_LICENSE:=ISC
 PKG_LICENSE_FILES:=LICENSE
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/software/network/wireless-regdb/
-PKG_HASH:=9aee1d86ebebb363b714bec941b2820f31e3b7f1a485ddc9fcbd9985c7d3e7c4
+PKG_HASH:=9832a14e1be24abff7be30dee3c9a1afb5fdfcf475a0d91aafef039f8d85f5eb
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 
diff --git a/package/kernel/ath10k-ct/Makefile b/package/kernel/ath10k-ct/Makefile
index 53d9eec1ea..bd18930801 100644
--- a/package/kernel/ath10k-ct/Makefile
+++ b/package/kernel/ath10k-ct/Makefile
@@ -8,14 +8,14 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/greearb/ath10k-ct.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-03-03
-PKG_SOURCE_VERSION:=eb3f488a200fafc46140fd51b5e21f737ee50f24
-PKG_MIRROR_HASH:=368ed648dc7239dbcac3c6ba09be92c4b706118052d35e058cf5d1dae2917039
+PKG_SOURCE_DATE:=2024-07-30
+PKG_SOURCE_VERSION:=ac71b14dc93aef0af6f0f24808b0afb673eaa5f5
+PKG_MIRROR_HASH:=f7774fc7002bbea450f543927acd528fb1bb6742f0e9ef28a402df3796893d93
 
-# Build the 6.7 ath10k-ct driver version.
+# Build the 6.9 ath10k-ct driver version.
 # Probably this should match as closely as
 # possible to whatever mac80211 backports version is being used.
-CT_KVER="-6.7"
+CT_KVER="-6.9"
 
 PKG_MAINTAINER:=Ben Greear <greearb@candelatech.com>
 PKG_BUILD_PARALLEL:=1
diff --git a/package/kernel/ath10k-ct/patches/001-patch-version.patch b/package/kernel/ath10k-ct/patches/001-patch-version.patch
new file mode 100644
index 0000000000..e5ae723cf1
--- /dev/null
+++ b/package/kernel/ath10k-ct/patches/001-patch-version.patch
@@ -0,0 +1,11 @@
+--- a/ath10k-6.9/pci.c
++++ b/ath10k-6.9/pci.c
+@@ -3871,7 +3871,7 @@ static int __ath10k_pci_probe(struct pci
+ 	int (*pci_hard_reset)(struct ath10k *ar);
+ 	u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr);
+ 
+-	printk(KERN_INFO "ath10k 6.7 driver, optimized for CT firmware, probing pci device: 0x%x.\n",
++	printk(KERN_INFO "ath10k 6.9 driver, optimized for CT firmware, probing pci device: 0x%x.\n",
+ 	       pci_dev->device);
+ 
+ 	switch (pci_dev->device) {
diff --git a/package/kernel/ath10k-ct/patches/130-ath10k-read-qcom-coexist-support-as-a-u32.patch b/package/kernel/ath10k-ct/patches/130-ath10k-read-qcom-coexist-support-as-a-u32.patch
index f5fc3b2ec8..b15bfdde6a 100644
--- a/package/kernel/ath10k-ct/patches/130-ath10k-read-qcom-coexist-support-as-a-u32.patch
+++ b/package/kernel/ath10k-ct/patches/130-ath10k-read-qcom-coexist-support-as-a-u32.patch
@@ -39,9 +39,9 @@ that the feature is properly initialized:
 
 Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
 
---- a/ath10k-6.7/core.c
-+++ b/ath10k-6.7/core.c
-@@ -2869,14 +2869,14 @@ done:
+--- a/ath10k-6.9/core.c
++++ b/ath10k-6.9/core.c
+@@ -2889,14 +2889,14 @@ done:
  static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
  {
  	struct device_node *node;
diff --git a/package/kernel/ath10k-ct/patches/201-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch b/package/kernel/ath10k-ct/patches/201-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch
index 701fbb9e6f..ba9372f9f0 100644
--- a/package/kernel/ath10k-ct/patches/201-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch
+++ b/package/kernel/ath10k-ct/patches/201-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch
@@ -20,25 +20,25 @@ Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
 Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
 Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
 ---
- ath10k-6.7/Kconfig   |  6 ++
- ath10k-6.7/Makefile  |  1 +
- ath10k-6.7/core.c    | 32 ++++++++
- ath10k-6.7/core.h    |  8 ++
- ath10k-6.7/hw.h      |  1 +
- ath10k-6.7/leds.c    | 90 +++++++++++++++++++++++
- ath10k-6.7/leds.h    | 34 +++++++++
- ath10k-6.7/mac.c     |  1 +
- ath10k-6.7/wmi-ops.h | 32 ++++++++
- ath10k-6.7/wmi-tlv.c |  2 +
- ath10k-6.7/wmi.c     | 54 ++++++++++++++
- ath10k-6.7/wmi.h     | 35 +++++++++
+ ath10k-6.9/Kconfig   |  6 ++
+ ath10k-6.9/Makefile  |  1 +
+ ath10k-6.9/core.c    | 32 ++++++++
+ ath10k-6.9/core.h    |  8 ++
+ ath10k-6.9/hw.h      |  1 +
+ ath10k-6.9/leds.c    | 90 +++++++++++++++++++++++
+ ath10k-6.9/leds.h    | 34 +++++++++
+ ath10k-6.9/mac.c     |  1 +
+ ath10k-6.9/wmi-ops.h | 32 ++++++++
+ ath10k-6.9/wmi-tlv.c |  2 +
+ ath10k-6.9/wmi.c     | 54 ++++++++++++++
+ ath10k-6.9/wmi.h     | 35 +++++++++
  12 files changed, 296 insertions(+)
- create mode 100644 ath10k-6.7/leds.c
- create mode 100644 ath10k-6.7/leds.h
+ create mode 100644 ath10k-6.9/leds.c
+ create mode 100644 ath10k-6.9/leds.h
 
---- a/ath10k-6.7/Kconfig
-+++ b/ath10k-6.7/Kconfig
-@@ -67,6 +67,12 @@ config ATH10K_DEBUGFS
+--- a/ath10k-6.9/Kconfig
++++ b/ath10k-6.9/Kconfig
+@@ -68,6 +68,12 @@ config ATH10K_DEBUGFS
  
  	  If unsure, say Y to make it easier to debug problems.
  
@@ -51,8 +51,8 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  config ATH10K_SPECTRAL
  	bool "Atheros ath10k spectral scan support"
  	depends on ATH10K_DEBUGFS
---- a/ath10k-6.7/Makefile
-+++ b/ath10k-6.7/Makefile
+--- a/ath10k-6.9/Makefile
++++ b/ath10k-6.9/Makefile
 @@ -20,6 +20,7 @@ ath10k_core-$(CONFIG_ATH10K_SPECTRAL) +=
  ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
  ath10k_core-$(CONFIG_ATH10K_TRACING) += trace.o
@@ -61,9 +61,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  ath10k_core-$(CONFIG_MAC80211_DEBUGFS) += debugfs_sta.o
  ath10k_core-$(CONFIG_PM) += wow.o
  ath10k_core-$(CONFIG_ATH10K_CE) += ce.o
---- a/ath10k-6.7/core.c
-+++ b/ath10k-6.7/core.c
-@@ -28,6 +28,7 @@
+--- a/ath10k-6.9/core.c
++++ b/ath10k-6.9/core.c
+@@ -29,6 +29,7 @@
  #include "testmode.h"
  #include "wmi-ops.h"
  #include "coredump.h"
@@ -71,7 +71,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  
  /* Disable ath10k-ct DBGLOG output by default */
  unsigned int ath10k_debug_mask = ATH10K_DBG_NO_DBGLOG;
-@@ -80,6 +81,7 @@ static const struct ath10k_hw_params ath
+@@ -81,6 +82,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca988x hw2.0",
  		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -79,7 +79,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
-@@ -120,6 +122,7 @@ static const struct ath10k_hw_params ath
+@@ -122,6 +124,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca988x hw2.0 ubiquiti",
  		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -87,7 +87,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
-@@ -161,6 +164,7 @@ static const struct ath10k_hw_params ath
+@@ -164,6 +167,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9887 hw1.0",
  		.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -95,7 +95,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
-@@ -202,6 +206,7 @@ static const struct ath10k_hw_params ath
+@@ -206,6 +210,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw3.2 sdio",
  		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  		.uart_pin = 19,
@@ -103,7 +103,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -238,6 +243,7 @@ static const struct ath10k_hw_params ath
+@@ -243,6 +248,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6164 hw2.1",
  		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -111,7 +111,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -278,6 +284,7 @@ static const struct ath10k_hw_params ath
+@@ -284,6 +290,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw2.1",
  		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -119,7 +119,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -318,6 +325,7 @@ static const struct ath10k_hw_params ath
+@@ -325,6 +332,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw3.0",
  		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -127,7 +127,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -358,6 +366,7 @@ static const struct ath10k_hw_params ath
+@@ -366,6 +374,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw3.2",
  		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -135,7 +135,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -402,6 +411,7 @@ static const struct ath10k_hw_params ath
+@@ -411,6 +420,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca99x0 hw2.0",
  		.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -143,7 +143,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0x00000700,
  		.continuous_frag_desc = true,
  		.cck_rate_map_rev2 = true,
-@@ -448,6 +458,7 @@ static const struct ath10k_hw_params ath
+@@ -458,6 +468,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9984/qca9994 hw1.0",
  		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -151,7 +151,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  		.otp_exe_param = 0x00000700,
  		.continuous_frag_desc = true,
-@@ -501,6 +512,7 @@ static const struct ath10k_hw_params ath
+@@ -512,6 +523,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9888 hw2.0",
  		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -159,7 +159,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  		.otp_exe_param = 0x00000700,
  		.continuous_frag_desc = true,
-@@ -551,6 +563,7 @@ static const struct ath10k_hw_params ath
+@@ -563,6 +575,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9377 hw1.0",
  		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -167,7 +167,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -591,6 +604,7 @@ static const struct ath10k_hw_params ath
+@@ -604,6 +617,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9377 hw1.1",
  		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -175,7 +175,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -633,6 +647,7 @@ static const struct ath10k_hw_params ath
+@@ -647,6 +661,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9377 hw1.1 sdio",
  		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 19,
@@ -183,7 +183,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -666,6 +681,7 @@ static const struct ath10k_hw_params ath
+@@ -681,6 +696,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca4019 hw1.0",
  		.patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -191,7 +191,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  		.otp_exe_param = 0x0010000,
  		.continuous_frag_desc = true,
-@@ -711,6 +727,7 @@ static const struct ath10k_hw_params ath
+@@ -727,6 +743,7 @@ static const struct ath10k_hw_params ath
  		.dev_id = 0,
  		.bus = ATH10K_BUS_SNOC,
  		.name = "wcn3990 hw1.0",
@@ -199,7 +199,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.continuous_frag_desc = true,
  		.tx_chain_mask = 0x7,
  		.rx_chain_mask = 0x7,
-@@ -4071,6 +4088,10 @@ int ath10k_core_start(struct ath10k *ar,
+@@ -4091,6 +4108,10 @@ int ath10k_core_start(struct ath10k *ar,
  			ath10k_wmi_check_apply_board_power_ctl_table(ar);
  	}
  
@@ -210,7 +210,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	return 0;
  
  err_hif_stop:
-@@ -4332,9 +4353,18 @@ static void ath10k_core_register_work(st
+@@ -4352,9 +4373,18 @@ static void ath10k_core_register_work(st
  		goto err_spectral_destroy;
  	}
  
@@ -229,7 +229,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  err_spectral_destroy:
  	ath10k_spectral_destroy(ar);
  err_debug_destroy:
-@@ -4394,6 +4424,8 @@ void ath10k_core_unregister(struct ath10
+@@ -4414,6 +4444,8 @@ void ath10k_core_unregister(struct ath10
  	if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  		return;
  
@@ -238,9 +238,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	ath10k_thermal_unregister(ar);
  	/* Stop spectral before unregistering from mac80211 to remove the
  	 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
---- a/ath10k-6.7/core.h
-+++ b/ath10k-6.7/core.h
-@@ -14,6 +14,7 @@
+--- a/ath10k-6.9/core.h
++++ b/ath10k-6.9/core.h
+@@ -15,6 +15,7 @@
  #include <linux/pci.h>
  #include <linux/uuid.h>
  #include <linux/time.h>
@@ -248,7 +248,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  
  #include "htt.h"
  #include "htc.h"
-@@ -1589,6 +1590,13 @@ struct ath10k {
+@@ -1590,6 +1591,13 @@ struct ath10k {
  	} testmode;
  
  	struct {
@@ -262,9 +262,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		/* protected by data_lock */
  		u32 rx_crc_err_drop;
  		u32 fw_crash_counter;
---- a/ath10k-6.7/hw.h
-+++ b/ath10k-6.7/hw.h
-@@ -523,6 +523,7 @@ struct ath10k_hw_params {
+--- a/ath10k-6.9/hw.h
++++ b/ath10k-6.9/hw.h
+@@ -525,6 +525,7 @@ struct ath10k_hw_params {
  	const char *name;
  	u32 patch_load_addr;
  	int uart_pin;
@@ -273,7 +273,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  
  	/* Type of hw cycle counter wraparound logic, for more info
 --- /dev/null
-+++ b/ath10k-6.7/leds.c
++++ b/ath10k-6.9/leds.c
 @@ -0,0 +1,90 @@
 +// SPDX-License-Identifier: ISC
 +/*
@@ -366,7 +366,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
 +}
 +
 --- /dev/null
-+++ b/ath10k-6.7/leds.h
++++ b/ath10k-6.9/leds.h
 @@ -0,0 +1,34 @@
 +/* SPDX-License-Identifier: ISC */
 +/*
@@ -402,9 +402,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
 +
 +#endif
 +#endif /* _LEDS_H_ */
---- a/ath10k-6.7/mac.c
-+++ b/ath10k-6.7/mac.c
-@@ -25,6 +25,7 @@
+--- a/ath10k-6.9/mac.c
++++ b/ath10k-6.9/mac.c
+@@ -26,6 +26,7 @@
  #include "wmi-tlv.h"
  #include "wmi-ops.h"
  #include "wow.h"
@@ -412,8 +412,8 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  
  /*********/
  /* Rates */
---- a/ath10k-6.7/wmi-ops.h
-+++ b/ath10k-6.7/wmi-ops.h
+--- a/ath10k-6.9/wmi-ops.h
++++ b/ath10k-6.9/wmi-ops.h
 @@ -228,7 +228,10 @@ struct wmi_ops {
  			 const struct wmi_bb_timing_cfg_arg *arg);
  	struct sk_buff *(*gen_per_peer_per_tid_cfg)(struct ath10k *ar,
@@ -461,9 +461,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  static inline int
  ath10k_wmi_dbglog_cfg(struct ath10k *ar, u64 module_enable, u32 log_level)
  {
---- a/ath10k-6.7/wmi-tlv.c
-+++ b/ath10k-6.7/wmi-tlv.c
-@@ -4601,6 +4601,8 @@ static const struct wmi_ops wmi_tlv_ops
+--- a/ath10k-6.9/wmi-tlv.c
++++ b/ath10k-6.9/wmi-tlv.c
+@@ -4606,6 +4606,8 @@ static const struct wmi_ops wmi_tlv_ops
  	.gen_echo = ath10k_wmi_tlv_op_gen_echo,
  	.gen_vdev_spectral_conf = ath10k_wmi_tlv_op_gen_vdev_spectral_conf,
  	.gen_vdev_spectral_enable = ath10k_wmi_tlv_op_gen_vdev_spectral_enable,
@@ -472,9 +472,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  };
  
  static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
---- a/ath10k-6.7/wmi.c
-+++ b/ath10k-6.7/wmi.c
-@@ -8446,6 +8446,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
+--- a/ath10k-6.9/wmi.c
++++ b/ath10k-6.9/wmi.c
+@@ -8467,6 +8467,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
  	return skb;
  }
  
@@ -524,7 +524,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  static struct sk_buff *
  ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  			     enum wmi_sta_ps_mode psmode)
-@@ -10255,6 +10298,9 @@ static const struct wmi_ops wmi_ops = {
+@@ -10274,6 +10317,9 @@ static const struct wmi_ops wmi_ops = {
  	.fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  	.gen_echo = ath10k_wmi_op_gen_echo,
@@ -534,7 +534,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_bcn_tmpl not implemented */
  	/* .gen_prb_tmpl not implemented */
  	/* .gen_p2p_go_bcn_ie not implemented */
-@@ -10325,6 +10371,8 @@ static const struct wmi_ops wmi_10_1_ops
+@@ -10344,6 +10390,8 @@ static const struct wmi_ops wmi_10_1_ops
  	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  	.gen_echo = ath10k_wmi_op_gen_echo,
@@ -543,7 +543,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_bcn_tmpl not implemented */
  	/* .gen_prb_tmpl not implemented */
  	/* .gen_p2p_go_bcn_ie not implemented */
-@@ -10404,6 +10452,8 @@ static const struct wmi_ops wmi_10_2_ops
+@@ -10423,6 +10471,8 @@ static const struct wmi_ops wmi_10_2_ops
  	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
  	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
@@ -552,7 +552,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_pdev_enable_adaptive_cca not implemented */
  };
  
-@@ -10475,6 +10525,8 @@ static const struct wmi_ops wmi_10_2_4_o
+@@ -10494,6 +10544,8 @@ static const struct wmi_ops wmi_10_2_4_o
  		ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  	.get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  	.gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
@@ -561,7 +561,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_bcn_tmpl not implemented */
  	/* .gen_prb_tmpl not implemented */
  	/* .gen_p2p_go_bcn_ie not implemented */
-@@ -10557,6 +10609,8 @@ static const struct wmi_ops wmi_10_4_ops
+@@ -10576,6 +10628,8 @@ static const struct wmi_ops wmi_10_4_ops
  	.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  	.gen_echo = ath10k_wmi_op_gen_echo,
  	.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
@@ -570,9 +570,9 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  };
  
  int ath10k_wmi_attach(struct ath10k *ar)
---- a/ath10k-6.7/wmi.h
-+++ b/ath10k-6.7/wmi.h
-@@ -3133,6 +3133,41 @@ enum wmi_10_4_feature_mask {
+--- a/ath10k-6.9/wmi.h
++++ b/ath10k-6.9/wmi.h
+@@ -3137,6 +3137,41 @@ enum wmi_10_4_feature_mask {
  
  };
  
diff --git a/package/kernel/ath10k-ct/patches/202-ath10k-use-tpt-trigger-by-default.patch b/package/kernel/ath10k-ct/patches/202-ath10k-use-tpt-trigger-by-default.patch
index 39b7f645d7..9bd07a24a6 100644
--- a/package/kernel/ath10k-ct/patches/202-ath10k-use-tpt-trigger-by-default.patch
+++ b/package/kernel/ath10k-ct/patches/202-ath10k-use-tpt-trigger-by-default.patch
@@ -14,9 +14,9 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
  ath10k-6.7/mac.c  | 2 +-
  3 files changed, 6 insertions(+), 4 deletions(-)
 
---- a/ath10k-6.7/core.h
-+++ b/ath10k-6.7/core.h
-@@ -1704,6 +1704,10 @@ struct ath10k {
+--- a/ath10k-6.9/core.h
++++ b/ath10k-6.9/core.h
+@@ -1705,6 +1705,10 @@ struct ath10k {
  	u8 csi_data[4096];
  	u16 csi_data_len;
  
@@ -27,8 +27,8 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
  	/* must be last */
  	u8 drv_priv[] __aligned(sizeof(void *));
  };
---- a/ath10k-6.7/leds.c
-+++ b/ath10k-6.7/leds.c
+--- a/ath10k-6.9/leds.c
++++ b/ath10k-6.9/leds.c
 @@ -70,7 +70,7 @@ int ath10k_leds_register(struct ath10k *
  
  	ar->leds.cdev.name = ar->leds.label;
@@ -38,9 +38,9 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
  
  	ret = led_classdev_register(wiphy_dev(ar->hw->wiphy), &ar->leds.cdev);
  	if (ret)
---- a/ath10k-6.7/mac.c
-+++ b/ath10k-6.7/mac.c
-@@ -11622,7 +11622,7 @@ int ath10k_mac_register(struct ath10k *a
+--- a/ath10k-6.9/mac.c
++++ b/ath10k-6.9/mac.c
+@@ -11631,7 +11631,7 @@ int ath10k_mac_register(struct ath10k *a
  	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
  
  #ifdef CPTCFG_MAC80211_LEDS
diff --git a/package/kernel/ath10k-ct/patches/300-fix-fortify-checking-error.patch b/package/kernel/ath10k-ct/patches/300-fix-fortify-checking-error.patch
index 1797b16dcf..122716c24d 100644
--- a/package/kernel/ath10k-ct/patches/300-fix-fortify-checking-error.patch
+++ b/package/kernel/ath10k-ct/patches/300-fix-fortify-checking-error.patch
@@ -1,6 +1,6 @@
---- a/ath10k-6.7/wmi.h
-+++ b/ath10k-6.7/wmi.h
-@@ -6341,7 +6341,7 @@ struct qca9880_set_ctl_table_cmd {
+--- a/ath10k-6.9/wmi.h
++++ b/ath10k-6.9/wmi.h
+@@ -6310,7 +6310,7 @@ struct qca9880_set_ctl_table_cmd {
  	__le32 ctl_len; /* in bytes.  This may be ignored in firmware,
  			 * make sure ctl_info data is sizeof(qca9880_power_ctl) */
  	/** ctl array (len adjusted to  number of words) */
diff --git a/package/kernel/ath10k-ct/patches/960-0010-ath10k-limit-htt-rx-ring-size.patch b/package/kernel/ath10k-ct/patches/960-0010-ath10k-limit-htt-rx-ring-size.patch
index 5fb70ab5c7..c1de78de98 100644
--- a/package/kernel/ath10k-ct/patches/960-0010-ath10k-limit-htt-rx-ring-size.patch
+++ b/package/kernel/ath10k-ct/patches/960-0010-ath10k-limit-htt-rx-ring-size.patch
@@ -1,6 +1,6 @@
---- a/ath10k-6.7/htt.h
-+++ b/ath10k-6.7/htt.h
-@@ -237,7 +237,11 @@ enum htt_rx_ring_flags {
+--- a/ath10k-6.9/htt.h
++++ b/ath10k-6.9/htt.h
+@@ -238,7 +238,11 @@ enum htt_rx_ring_flags {
  };
  
  #define HTT_RX_RING_SIZE_MIN 128
diff --git a/package/kernel/ath10k-ct/patches/960-0011-ath10k-limit-pci-buffer-size.patch b/package/kernel/ath10k-ct/patches/960-0011-ath10k-limit-pci-buffer-size.patch
index eceb66c3bb..3dcbda3715 100644
--- a/package/kernel/ath10k-ct/patches/960-0011-ath10k-limit-pci-buffer-size.patch
+++ b/package/kernel/ath10k-ct/patches/960-0011-ath10k-limit-pci-buffer-size.patch
@@ -1,6 +1,6 @@
---- a/ath10k-6.7/pci.c
-+++ b/ath10k-6.7/pci.c
-@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
+--- a/ath10k-6.9/pci.c
++++ b/ath10k-6.9/pci.c
+@@ -132,7 +132,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 2048,
@@ -12,7 +12,7 @@
  		.recv_cb = ath10k_pci_htt_htc_rx_cb,
  	},
  
-@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_
+@@ -141,7 +145,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 2048,
@@ -24,7 +24,7 @@
  		.recv_cb = ath10k_pci_htc_rx_cb,
  	},
  
-@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_
+@@ -168,7 +176,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 512,
@@ -36,7 +36,7 @@
  		.recv_cb = ath10k_pci_htt_rx_cb,
  	},
  
-@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_
+@@ -193,7 +205,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 2048,
diff --git a/package/kernel/ath10k-ct/patches/988-ath10k-always-use-mac80211-loss-detection.patch b/package/kernel/ath10k-ct/patches/988-ath10k-always-use-mac80211-loss-detection.patch
index 165f180388..974072fb9a 100644
--- a/package/kernel/ath10k-ct/patches/988-ath10k-always-use-mac80211-loss-detection.patch
+++ b/package/kernel/ath10k-ct/patches/988-ath10k-always-use-mac80211-loss-detection.patch
@@ -13,12 +13,12 @@ own loss detection mechanism.
 
 Signed-off-by: David Bauer <mail@david-bauer.net>
 ---
- ath10k-6.7/mac.c | 1 -
+ ath10k-6.9/mac.c | 1 -
  1 file changed, 1 deletion(-)
 
---- a/ath10k-6.7/mac.c
-+++ b/ath10k-6.7/mac.c
-@@ -11311,7 +11311,6 @@ int ath10k_mac_register(struct ath10k *a
+--- a/ath10k-6.9/mac.c
++++ b/ath10k-6.9/mac.c
+@@ -11316,7 +11316,6 @@ int ath10k_mac_register(struct ath10k *a
  	ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA);
  	ieee80211_hw_set(ar->hw, QUEUE_CONTROL);
  	ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG);
diff --git a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
index e36494c2fe..17748219e8 100644
--- a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
+++ b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c
@@ -100,6 +100,7 @@ static struct bh_map button_map[] = {
 	BH_MAP(KEY_WIMAX,		"wwan"),
 	BH_MAP(KEY_WLAN,		"wlan"),
 	BH_MAP(KEY_WPS_BUTTON,		"wps"),
+	BH_MAP(KEY_VENDOR,		"vendor"),
 };
 
 /* -------------------------------------------------------------------------*/
diff --git a/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c b/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c
index 8c829f9c6b..3ff01d588a 100644
--- a/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c
+++ b/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_adsl.c
@@ -126,7 +126,7 @@ static int ptm_stop(struct net_device *);
   static unsigned int ptm_poll(int, unsigned int);
   static int ptm_napi_poll(struct napi_struct *, int);
 static int ptm_hard_start_xmit(struct sk_buff *, struct net_device *);
-static int ptm_ioctl(struct net_device *, struct ifreq *, int);
+static int ptm_ioctl(struct net_device *, struct ifreq *, void __user *, int);
 #if LINUX_VERSION_CODE < KERNEL_VERSION(5,6,0)
 static void ptm_tx_timeout(struct net_device *);
 #else
@@ -247,7 +247,7 @@ static struct net_device_ops g_ptm_netdev_ops = {
     .ndo_start_xmit      = ptm_hard_start_xmit,
     .ndo_validate_addr   = eth_validate_addr,
     .ndo_set_mac_address = eth_mac_addr,
-    .ndo_do_ioctl        = ptm_ioctl,
+    .ndo_siocdevprivate  = ptm_ioctl,
     .ndo_tx_timeout      = ptm_tx_timeout,
 };
 
@@ -459,7 +459,7 @@ PTM_HARD_START_XMIT_FAIL:
     return NETDEV_TX_OK;
 }
 
-static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, void __user *data, int cmd)
 {
     int ndev;
 
@@ -469,45 +469,45 @@ static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
     switch ( cmd )
     {
     case IFX_PTM_MIB_CW_GET:
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxNoIdleCodewords   = WAN_MIB_TABLE[ndev].wrx_nonidle_cw;
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxIdleCodewords     = WAN_MIB_TABLE[ndev].wrx_idle_cw;
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxCodingViolation   = WAN_MIB_TABLE[ndev].wrx_err_cw;
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxNoIdleCodewords   = 0;
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxIdleCodewords     = 0;
+        ((PTM_CW_IF_ENTRY_T *)data)->ifRxNoIdleCodewords   = WAN_MIB_TABLE[ndev].wrx_nonidle_cw;
+        ((PTM_CW_IF_ENTRY_T *)data)->ifRxIdleCodewords     = WAN_MIB_TABLE[ndev].wrx_idle_cw;
+        ((PTM_CW_IF_ENTRY_T *)data)->ifRxCodingViolation   = WAN_MIB_TABLE[ndev].wrx_err_cw;
+        ((PTM_CW_IF_ENTRY_T *)data)->ifTxNoIdleCodewords   = 0;
+        ((PTM_CW_IF_ENTRY_T *)data)->ifTxIdleCodewords     = 0;
         break;
     case IFX_PTM_MIB_FRAME_GET:
-        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->RxCorrect   = WAN_MIB_TABLE[ndev].wrx_correct_pdu;
-        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->TC_CrcError = WAN_MIB_TABLE[ndev].wrx_tccrc_err_pdu;
-        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->RxDropped   = WAN_MIB_TABLE[ndev].wrx_nodesc_drop_pdu + WAN_MIB_TABLE[ndev].wrx_len_violation_drop_pdu;
-        ((PTM_FRAME_MIB_T *)ifr->ifr_data)->TxSend      = WAN_MIB_TABLE[ndev].wtx_total_pdu;
+        ((PTM_FRAME_MIB_T *)data)->RxCorrect   = WAN_MIB_TABLE[ndev].wrx_correct_pdu;
+        ((PTM_FRAME_MIB_T *)data)->TC_CrcError = WAN_MIB_TABLE[ndev].wrx_tccrc_err_pdu;
+        ((PTM_FRAME_MIB_T *)data)->RxDropped   = WAN_MIB_TABLE[ndev].wrx_nodesc_drop_pdu + WAN_MIB_TABLE[ndev].wrx_len_violation_drop_pdu;
+        ((PTM_FRAME_MIB_T *)data)->TxSend      = WAN_MIB_TABLE[ndev].wtx_total_pdu;
         break;
     case IFX_PTM_CFG_GET:
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcPresent = CFG_ETH_EFMTC_CRC->rx_eth_crc_present;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck   = CFG_ETH_EFMTC_CRC->rx_eth_crc_check;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck    = CFG_ETH_EFMTC_CRC->rx_tc_crc_check;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen      = CFG_ETH_EFMTC_CRC->rx_tc_crc_len;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen     = CFG_ETH_EFMTC_CRC->tx_eth_crc_gen;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen      = CFG_ETH_EFMTC_CRC->tx_tc_crc_gen;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen      = CFG_ETH_EFMTC_CRC->tx_tc_crc_len;
+        ((IFX_PTM_CFG_T *)data)->RxEthCrcPresent = CFG_ETH_EFMTC_CRC->rx_eth_crc_present;
+        ((IFX_PTM_CFG_T *)data)->RxEthCrcCheck   = CFG_ETH_EFMTC_CRC->rx_eth_crc_check;
+        ((IFX_PTM_CFG_T *)data)->RxTcCrcCheck    = CFG_ETH_EFMTC_CRC->rx_tc_crc_check;
+        ((IFX_PTM_CFG_T *)data)->RxTcCrcLen      = CFG_ETH_EFMTC_CRC->rx_tc_crc_len;
+        ((IFX_PTM_CFG_T *)data)->TxEthCrcGen     = CFG_ETH_EFMTC_CRC->tx_eth_crc_gen;
+        ((IFX_PTM_CFG_T *)data)->TxTcCrcGen      = CFG_ETH_EFMTC_CRC->tx_tc_crc_gen;
+        ((IFX_PTM_CFG_T *)data)->TxTcCrcLen      = CFG_ETH_EFMTC_CRC->tx_tc_crc_len;
         break;
     case IFX_PTM_CFG_SET:
-        CFG_ETH_EFMTC_CRC->rx_eth_crc_present   = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcPresent ? 1 : 0;
-        CFG_ETH_EFMTC_CRC->rx_eth_crc_check     = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck ? 1 : 0;
-        if ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck && (((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen == 16 || ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen == 32) )
+        CFG_ETH_EFMTC_CRC->rx_eth_crc_present   = ((IFX_PTM_CFG_T *)data)->RxEthCrcPresent ? 1 : 0;
+        CFG_ETH_EFMTC_CRC->rx_eth_crc_check     = ((IFX_PTM_CFG_T *)data)->RxEthCrcCheck ? 1 : 0;
+        if ( ((IFX_PTM_CFG_T *)data)->RxTcCrcCheck && (((IFX_PTM_CFG_T *)data)->RxTcCrcLen == 16 || ((IFX_PTM_CFG_T *)data)->RxTcCrcLen == 32) )
         {
             CFG_ETH_EFMTC_CRC->rx_tc_crc_check  = 1;
-            CFG_ETH_EFMTC_CRC->rx_tc_crc_len    = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen;
+            CFG_ETH_EFMTC_CRC->rx_tc_crc_len    = ((IFX_PTM_CFG_T *)data)->RxTcCrcLen;
         }
         else
         {
             CFG_ETH_EFMTC_CRC->rx_tc_crc_check  = 0;
             CFG_ETH_EFMTC_CRC->rx_tc_crc_len    = 0;
         }
-        CFG_ETH_EFMTC_CRC->tx_eth_crc_gen       = ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen ? 1 : 0;
-        if ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen && (((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen == 16 || ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen == 32) )
+        CFG_ETH_EFMTC_CRC->tx_eth_crc_gen       = ((IFX_PTM_CFG_T *)data)->TxEthCrcGen ? 1 : 0;
+        if ( ((IFX_PTM_CFG_T *)data)->TxTcCrcGen && (((IFX_PTM_CFG_T *)data)->TxTcCrcLen == 16 || ((IFX_PTM_CFG_T *)data)->TxTcCrcLen == 32) )
         {
             CFG_ETH_EFMTC_CRC->tx_tc_crc_gen    = 1;
-            CFG_ETH_EFMTC_CRC->tx_tc_crc_len    = ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen;
+            CFG_ETH_EFMTC_CRC->tx_tc_crc_len    = ((IFX_PTM_CFG_T *)data)->TxTcCrcLen;
         }
         else
         {
diff --git a/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c b/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c
index 9cd9cd5986..8a0ac331b7 100644
--- a/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c
+++ b/package/kernel/lantiq/ltq-ptm/src/ifxmips_ptm_vdsl.c
@@ -76,7 +76,7 @@ static int ptm_stop(struct net_device *);
   static unsigned int ptm_poll(int, unsigned int);
   static int ptm_napi_poll(struct napi_struct *, int);
 static int ptm_hard_start_xmit(struct sk_buff *, struct net_device *);
-static int ptm_ioctl(struct net_device *, struct ifreq *, int);
+static int ptm_ioctl(struct net_device *, struct ifreq *, void __user *, int);
 #if LINUX_VERSION_CODE < KERNEL_VERSION(5,6,0)
 static void ptm_tx_timeout(struct net_device *);
 #else
@@ -120,7 +120,7 @@ static struct net_device_ops g_ptm_netdev_ops = {
     .ndo_start_xmit      = ptm_hard_start_xmit,
     .ndo_validate_addr   = eth_validate_addr,
     .ndo_set_mac_address = eth_mac_addr,
-    .ndo_do_ioctl        = ptm_ioctl,
+    .ndo_siocdevprivate  = ptm_ioctl,
     .ndo_tx_timeout      = ptm_tx_timeout,
 };
 
@@ -377,62 +377,62 @@ PTM_HARD_START_XMIT_FAIL:
     return 0;
 }
 
-static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, void __user *data, int cmd)
 {
     ASSERT(dev == g_net_dev[0], "incorrect device");
 
     switch ( cmd )
     {
     case IFX_PTM_MIB_CW_GET:
-	((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxNoIdleCodewords   = IFX_REG_R32(DREG_AR_CELL0) + IFX_REG_R32(DREG_AR_CELL1);
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxIdleCodewords     = IFX_REG_R32(DREG_AR_IDLE_CNT0) + IFX_REG_R32(DREG_AR_IDLE_CNT1);
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifRxCodingViolation   = IFX_REG_R32(DREG_AR_CVN_CNT0) + IFX_REG_R32(DREG_AR_CVN_CNT1) + IFX_REG_R32(DREG_AR_CVNP_CNT0) + IFX_REG_R32(DREG_AR_CVNP_CNT1);
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxNoIdleCodewords   = IFX_REG_R32(DREG_AT_CELL0) + IFX_REG_R32(DREG_AT_CELL1);
-        ((PTM_CW_IF_ENTRY_T *)ifr->ifr_data)->ifTxIdleCodewords     = IFX_REG_R32(DREG_AT_IDLE_CNT0) + IFX_REG_R32(DREG_AT_IDLE_CNT1);
+	((PTM_CW_IF_ENTRY_T *)data)->ifRxNoIdleCodewords   = IFX_REG_R32(DREG_AR_CELL0) + IFX_REG_R32(DREG_AR_CELL1);
+        ((PTM_CW_IF_ENTRY_T *)data)->ifRxIdleCodewords     = IFX_REG_R32(DREG_AR_IDLE_CNT0) + IFX_REG_R32(DREG_AR_IDLE_CNT1);
+        ((PTM_CW_IF_ENTRY_T *)data)->ifRxCodingViolation   = IFX_REG_R32(DREG_AR_CVN_CNT0) + IFX_REG_R32(DREG_AR_CVN_CNT1) + IFX_REG_R32(DREG_AR_CVNP_CNT0) + IFX_REG_R32(DREG_AR_CVNP_CNT1);
+        ((PTM_CW_IF_ENTRY_T *)data)->ifTxNoIdleCodewords   = IFX_REG_R32(DREG_AT_CELL0) + IFX_REG_R32(DREG_AT_CELL1);
+        ((PTM_CW_IF_ENTRY_T *)data)->ifTxIdleCodewords     = IFX_REG_R32(DREG_AT_IDLE_CNT0) + IFX_REG_R32(DREG_AT_IDLE_CNT1);
         break;
     case IFX_PTM_MIB_FRAME_GET:
 	{
-            PTM_FRAME_MIB_T data = {0};
+            PTM_FRAME_MIB_T tmp = {0};
             int i;
 
-            data.RxCorrect = IFX_REG_R32(DREG_AR_HEC_CNT0) + IFX_REG_R32(DREG_AR_HEC_CNT1) + IFX_REG_R32(DREG_AR_AIIDLE_CNT0) + IFX_REG_R32(DREG_AR_AIIDLE_CNT1);
+            tmp.RxCorrect = IFX_REG_R32(DREG_AR_HEC_CNT0) + IFX_REG_R32(DREG_AR_HEC_CNT1) + IFX_REG_R32(DREG_AR_AIIDLE_CNT0) + IFX_REG_R32(DREG_AR_AIIDLE_CNT1);
             for ( i = 0; i < 4; i++ )
-                data.RxDropped += WAN_RX_MIB_TABLE(i)->wrx_dropdes_pdu;
+                tmp.RxDropped += WAN_RX_MIB_TABLE(i)->wrx_dropdes_pdu;
             for ( i = 0; i < 8; i++ )
-                data.TxSend    += WAN_TX_MIB_TABLE(i)->wtx_total_pdu;
+                tmp.TxSend    += WAN_TX_MIB_TABLE(i)->wtx_total_pdu;
 
-            *((PTM_FRAME_MIB_T *)ifr->ifr_data) = data;
+            *((PTM_FRAME_MIB_T *)data) = tmp;
         }
         break;
     case IFX_PTM_CFG_GET:
 	//  use bear channel 0 preemption gamma interface settings
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcPresent = 1;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck   = RX_GAMMA_ITF_CFG(0)->rx_eth_fcs_ver_dis == 0 ? 1 : 0;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck    = RX_GAMMA_ITF_CFG(0)->rx_tc_crc_ver_dis == 0 ? 1 : 0;;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen      = RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size == 0 ? 0 : (RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size * 16);
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen     = TX_GAMMA_ITF_CFG(0)->tx_eth_fcs_gen_dis == 0 ? 1 : 0;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen      = TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size == 0 ? 0 : 1;
-        ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen      = TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size == 0 ? 0 : (TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size * 16);
+        ((IFX_PTM_CFG_T *)data)->RxEthCrcPresent = 1;
+        ((IFX_PTM_CFG_T *)data)->RxEthCrcCheck   = RX_GAMMA_ITF_CFG(0)->rx_eth_fcs_ver_dis == 0 ? 1 : 0;
+        ((IFX_PTM_CFG_T *)data)->RxTcCrcCheck    = RX_GAMMA_ITF_CFG(0)->rx_tc_crc_ver_dis == 0 ? 1 : 0;;
+        ((IFX_PTM_CFG_T *)data)->RxTcCrcLen      = RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size == 0 ? 0 : (RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size * 16);
+        ((IFX_PTM_CFG_T *)data)->TxEthCrcGen     = TX_GAMMA_ITF_CFG(0)->tx_eth_fcs_gen_dis == 0 ? 1 : 0;
+        ((IFX_PTM_CFG_T *)data)->TxTcCrcGen      = TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size == 0 ? 0 : 1;
+        ((IFX_PTM_CFG_T *)data)->TxTcCrcLen      = TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size == 0 ? 0 : (TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size * 16);
         break;
     case IFX_PTM_CFG_SET:
 	{
             int i;
 
             for ( i = 0; i < 4; i++ ) {
-                RX_GAMMA_ITF_CFG(i)->rx_eth_fcs_ver_dis = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxEthCrcCheck ? 0 : 1;
+                RX_GAMMA_ITF_CFG(i)->rx_eth_fcs_ver_dis = ((IFX_PTM_CFG_T *)data)->RxEthCrcCheck ? 0 : 1;
 
-                RX_GAMMA_ITF_CFG(0)->rx_tc_crc_ver_dis = ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcCheck ? 0 : 1;
+                RX_GAMMA_ITF_CFG(0)->rx_tc_crc_ver_dis = ((IFX_PTM_CFG_T *)data)->RxTcCrcCheck ? 0 : 1;
 
-                switch ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->RxTcCrcLen ) {
+                switch ( ((IFX_PTM_CFG_T *)data)->RxTcCrcLen ) {
                     case 16: RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size = 1; break;
                     case 32: RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size = 2; break;
                     default: RX_GAMMA_ITF_CFG(0)->rx_tc_crc_size = 0;
                 }
 
-                TX_GAMMA_ITF_CFG(0)->tx_eth_fcs_gen_dis = ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxEthCrcGen ? 0 : 1;
+                TX_GAMMA_ITF_CFG(0)->tx_eth_fcs_gen_dis = ((IFX_PTM_CFG_T *)data)->TxEthCrcGen ? 0 : 1;
 
-                if ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcGen ) {
-                    switch ( ((IFX_PTM_CFG_T *)ifr->ifr_data)->TxTcCrcLen ) {
+                if ( ((IFX_PTM_CFG_T *)data)->TxTcCrcGen ) {
+                    switch ( ((IFX_PTM_CFG_T *)data)->TxTcCrcLen ) {
                         case 16: TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 1; break;
                         case 32: TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 2; break;
                         default: TX_GAMMA_ITF_CFG(0)->tx_tc_crc_size = 0;
@@ -447,7 +447,7 @@ static int ptm_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
         {
             struct ppe_prio_q_map cmd;
 
-            if ( copy_from_user(&cmd, ifr->ifr_data, sizeof(cmd)) )
+            if ( copy_from_user(&cmd, data, sizeof(cmd)) )
                 return -EFAULT;
 
             if ( cmd.pkt_prio < 0 || cmd.pkt_prio >= ARRAY_SIZE(g_ptm_prio_queue_map) )
diff --git a/package/kernel/lantiq/ltq-vdsl-vr11/Makefile b/package/kernel/lantiq/ltq-vdsl-vr11/Makefile
index 0fa6011cfc..99d6e35376 100644
--- a/package/kernel/lantiq/ltq-vdsl-vr11/Makefile
+++ b/package/kernel/lantiq/ltq-vdsl-vr11/Makefile
@@ -27,13 +27,11 @@ PKG_BUILD_FLAGS:=no-mold
 
 include $(INCLUDE_DIR)/package.mk
 
-# TODO this driver depends on the vrx518 dsl firmware, add this dependency if
-# that ever gets a compatible license
 define KernelPackage/ltq-vdsl-vr11
   TITLE:=vdsl driver
   SECTION:=sys
   SUBMENU:=Network Devices
-  DEPENDS:=@TARGET_ipq40xx +kmod-ltq-vdsl-vr11-mei
+  DEPENDS:=@TARGET_ipq40xx +kmod-ltq-vdsl-vr11-mei +dsl_vr11_firmware_xdsl
   FILES:=$(PKG_BUILD_DIR)/src/drv_dsl_cpe_api.ko
   AUTOLOAD:=$(call AutoLoad,51,drv_dsl_cpe_api)
 endef
diff --git a/package/kernel/lantiq/vrx518_ep/Makefile b/package/kernel/lantiq/vrx518_ep/Makefile
index b6477b19d6..7518080a80 100644
--- a/package/kernel/lantiq/vrx518_ep/Makefile
+++ b/package/kernel/lantiq/vrx518_ep/Makefile
@@ -15,14 +15,12 @@ PKG_LICENSE:=GPL-2.0
 
 include $(INCLUDE_DIR)/package.mk
 
-# TODO this driver depends on the vrx518 aca firmware, add this dependency if
-# that ever gets a compatible license
 define KernelPackage/vrx518_ep
   SECTION:=sys
   CATEGORY:=Kernel modules
   SUBMENU:=Network Devices
   TITLE:=VRX518 EP Support
-  DEPENDS:=@TARGET_ipq40xx
+  DEPENDS:=@TARGET_ipq40xx +vrx518_aca_fw
   AUTOLOAD:=$(call AutoLoad,26,vrx518)
   FILES:=$(PKG_BUILD_DIR)/vrx518.ko
 endef
diff --git a/package/kernel/lantiq/vrx518_tc/Makefile b/package/kernel/lantiq/vrx518_tc/Makefile
index b05fb4bb63..a5718d9d5b 100644
--- a/package/kernel/lantiq/vrx518_tc/Makefile
+++ b/package/kernel/lantiq/vrx518_tc/Makefile
@@ -28,8 +28,6 @@ include $(INCLUDE_DIR)/package.mk
 PLAT_DIR:=dcdp
 PKG_EXTMOD_SUBDIRS:=$(PLAT_DIR)
 
-# TODO this driver depends on the vrx518 ppe firmware, add this dependency if
-# that ever gets a compatible license
 define KernelPackage/$(PKG_NAME)
   SECTION:=sys
   CATEGORY:=Kernel modules
@@ -39,7 +37,7 @@ define KernelPackage/$(PKG_NAME)
     CONFIG_ATM_LANE=m \
     CONFIG_ATM_MPOA=m \
     CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT=y
-  DEPENDS:=@TARGET_ipq40xx +kmod-vrx518_ep +kmod-crypto-md5 +kmod-atm +kmod-ipoa +br2684ctl
+  DEPENDS:=@TARGET_ipq40xx +kmod-vrx518_ep +vrx518_ppe_fw +kmod-crypto-md5 +kmod-atm +kmod-ipoa +br2684ctl
   AUTOLOAD:=$(call AutoLoad,27,vrx518_tc)
   FILES:=$(PKG_BUILD_DIR)/$(PLAT_DIR)/$(PKG_NAME).ko
 endef
diff --git a/package/kernel/linux/modules/netfilter.mk b/package/kernel/linux/modules/netfilter.mk
index 8bf2be585f..3cf63982ba 100644
--- a/package/kernel/linux/modules/netfilter.mk
+++ b/package/kernel/linux/modules/netfilter.mk
@@ -1217,6 +1217,7 @@ define KernelPackage/nft-netdev
   DEPENDS:=+kmod-nft-core
   KCONFIG:= \
 	CONFIG_NETFILTER_INGRESS=y \
+	CONFIG_NETFILTER_EGRESS=y \
 	CONFIG_NF_TABLES_NETDEV \
 	CONFIG_NF_DUP_NETDEV \
 	CONFIG_NFT_DUP_NETDEV \
diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk
index f6f5ecc075..1d762e6b33 100644
--- a/package/kernel/linux/modules/other.mk
+++ b/package/kernel/linux/modules/other.mk
@@ -597,6 +597,7 @@ define KernelPackage/mtdtests
 	$(LINUX_DIR)/drivers/mtd/tests/mtd_speedtest.ko \
 	$(LINUX_DIR)/drivers/mtd/tests/mtd_stresstest.ko \
 	$(LINUX_DIR)/drivers/mtd/tests/mtd_subpagetest.ko \
+	$(LINUX_DIR)/drivers/mtd/tests/mtd_test.ko@ge6.1 \
 	$(LINUX_DIR)/drivers/mtd/tests/mtd_torturetest.ko
 endef
 
diff --git a/package/kernel/linux/modules/video.mk b/package/kernel/linux/modules/video.mk
index b59907c643..bbfceb691b 100644
--- a/package/kernel/linux/modules/video.mk
+++ b/package/kernel/linux/modules/video.mk
@@ -780,6 +780,21 @@ endef
 $(eval $(call KernelPackage,video-gspca-pac207))
 
 
+define KernelPackage/video-gspca-pac7302
+  TITLE:=pac7302 webcam support
+  KCONFIG:=CONFIG_USB_GSPCA_PAC7302
+  FILES:=$(LINUX_DIR)/drivers/media/$(V4L2_USB_DIR)/gspca/gspca_pac7302.ko
+  AUTOLOAD:=$(call AutoProbe,gspca_pac7302)
+  $(call AddDepends/camera-gspca)
+endef
+
+define KernelPackage/video-gspca-pac7302/description
+ The Pixart PAC7302 USB Camera Driver (pac7302) kernel module
+endef
+
+$(eval $(call KernelPackage,video-gspca-pac7302))
+
+
 define KernelPackage/video-gspca-pac7311
   TITLE:=pac7311 webcam support
   KCONFIG:=CONFIG_USB_GSPCA_PAC7311
diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
index 79ef87b998..aa022c9cd3 100644
--- a/package/kernel/mac80211/Makefile
+++ b/package/kernel/mac80211/Makefile
@@ -10,13 +10,13 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=mac80211
 
-PKG_VERSION:=6.6.15
-PKG_RELEASE:=2
+PKG_VERSION:=6.9.9
+PKG_RELEASE:=1
 PKG_LICENSE:=GPL-2.0-only
 PKG_LICENSE_FILES:=COPYING
 
 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/
-PKG_HASH:=3bbc461121134fda9089c084a5eed577d05e7837a157edf9a3797937172a3ece
+PKG_HASH:=3417da091a57c7b1c145d44c1fae9f1e0bac6d0c8ad61b37e57b0a802eeb2837
 
 PKG_SOURCE:=backports-$(PKG_VERSION).tar.xz
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(if $(BUILD_VARIANT),$(PKG_NAME)-$(BUILD_VARIANT)/)backports-$(PKG_VERSION)
@@ -333,7 +333,6 @@ endif
 ifeq ($(strip $(CONFIG_EXTERNAL_KERNEL_TREE)),"")
   ifeq ($(strip $(CONFIG_KERNEL_GIT_CLONE_URI)),"")
     define Build/Configure
-	  cmp $(PKG_BUILD_DIR)/include/linux/ath9k_platform.h $(LINUX_DIR)/include/linux/ath9k_platform.h
 	  cmp $(PKG_BUILD_DIR)/include/linux/ath5k_platform.h $(LINUX_DIR)/include/linux/ath5k_platform.h
 	  cmp $(PKG_BUILD_DIR)/include/linux/rt2x00_platform.h $(LINUX_DIR)/include/linux/rt2x00_platform.h
     endef
diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk
index b0c3691a57..1d4b37d259 100644
--- a/package/kernel/mac80211/ath.mk
+++ b/package/kernel/mac80211/ath.mk
@@ -296,7 +296,7 @@ define KernelPackage/ath11k
   $(call KernelPackage/mac80211/Default)
   TITLE:=Qualcomm 802.11ax wireless chipset support (common code)
   URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k
-  DEPENDS+= +kmod-ath +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT \
+  DEPENDS+= +kmod-ath +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT @!LINUX_5_15 \
   +kmod-crypto-michael-mic +ATH11K_THERMAL:kmod-hwmon-core +ATH11K_THERMAL:kmod-thermal
   FILES:=$(PKG_BUILD_DIR)/drivers/soc/qcom/qmi_helpers.ko \
   $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k.ko
diff --git a/package/kernel/mac80211/intel.mk b/package/kernel/mac80211/intel.mk
index f2aceb96cd..63b19a55c1 100644
--- a/package/kernel/mac80211/intel.mk
+++ b/package/kernel/mac80211/intel.mk
@@ -6,7 +6,7 @@ config-$(CONFIG_PACKAGE_IWLWIFI_DEBUGFS)+= IWLWIFI_DEBUGFS
 
 define KernelPackage/iwlwifi
   $(call KernelPackage/mac80211/Default)
-  DEPENDS:= +kmod-mac80211 +kmod-ptp @PCI_SUPPORT +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT
+  DEPENDS:= +kmod-mac80211 +kmod-ptp @PCI_SUPPORT +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT @!LINUX_5_15
   TITLE:=Intel AGN Wireless support
   FILES:= \
 	$(PKG_BUILD_DIR)/drivers/net/wireless/intel/iwlwifi/iwlwifi.ko \
diff --git a/package/kernel/mac80211/patches/ath/100-wifi-ath-add-struct_group-for-struct-ath_cycle_count.patch b/package/kernel/mac80211/patches/ath/100-wifi-ath-add-struct_group-for-struct-ath_cycle_count.patch
deleted file mode 100644
index f464072d75..0000000000
--- a/package/kernel/mac80211/patches/ath/100-wifi-ath-add-struct_group-for-struct-ath_cycle_count.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From e8053643b6d70e23a634f14e4408f3a6d1d3a6bf Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@qq.com>
-Date: Sat, 27 May 2023 09:04:48 +0000
-Subject: [PATCH] wifi: ath: add struct_group for struct ath_cycle_counters
-
-Add a struct_group to around all members in struct ath_cycle_counters.
-It can help the compiler detect the intended bounds of the memcpy() and
-memset().
-
-This patch fixes the following build warning:
-
-In function 'fortify_memset_chk',
-    inlined from 'ath9k_ps_wakeup' at /home/db/openwrt/build_dir/target-mips_24kc_musl/linux-ath79_generic/backports-6.1.24/drivers/net/wireless/ath/ath9k/main.c:140:3:
-./include/linux/fortify-string.h:314:25: error: call to '__write_overflow_field' declared with attribute warning: detected write beyond size of field (1st parameter); maybe use struct_group()? [-Werror=attribute-warning]
-  314 |                         __write_overflow_field(p_size_field, size);
-      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-Signed-off-by: Shiji Yang <yangshiji66@qq.com>
----
- drivers/net/wireless/ath/ath.h                | 10 ++++++----
- drivers/net/wireless/ath/ath5k/ani.c          |  2 +-
- drivers/net/wireless/ath/ath5k/base.c         |  4 ++--
- drivers/net/wireless/ath/ath5k/mac80211-ops.c |  2 +-
- drivers/net/wireless/ath/ath9k/link.c         |  2 +-
- drivers/net/wireless/ath/ath9k/main.c         |  4 ++--
- drivers/net/wireless/ath/hw.c                 |  2 +-
- 7 files changed, 14 insertions(+), 12 deletions(-)
-
---- a/drivers/net/wireless/ath/ath.h
-+++ b/drivers/net/wireless/ath/ath.h
-@@ -43,10 +43,12 @@ struct ath_ani {
- };
- 
- struct ath_cycle_counters {
--	u32 cycles;
--	u32 rx_busy;
--	u32 rx_frame;
--	u32 tx_frame;
-+	struct_group(cnts,
-+		u32 cycles;
-+		u32 rx_busy;
-+		u32 rx_frame;
-+		u32 tx_frame;
-+	);
- };
- 
- enum ath_device_state {
---- a/drivers/net/wireless/ath/ath5k/ani.c
-+++ b/drivers/net/wireless/ath/ath5k/ani.c
-@@ -379,7 +379,7 @@ ath5k_hw_ani_get_listen_time(struct ath5
- 	spin_lock_bh(&common->cc_lock);
- 
- 	ath_hw_cycle_counters_update(common);
--	memcpy(&as->last_cc, &common->cc_ani, sizeof(as->last_cc));
-+	memcpy(&as->last_cc.cnts, &common->cc_ani.cnts, sizeof(as->last_cc.cnts));
- 
- 	/* clears common->cc_ani */
- 	listen = ath_hw_get_listen_time(common);
---- a/drivers/net/wireless/ath/ath5k/base.c
-+++ b/drivers/net/wireless/ath/ath5k/base.c
-@@ -2985,8 +2985,8 @@ ath5k_reset(struct ath5k_hw *ah, struct
- 	memset(&ah->survey, 0, sizeof(ah->survey));
- 	spin_lock_bh(&common->cc_lock);
- 	ath_hw_cycle_counters_update(common);
--	memset(&common->cc_survey, 0, sizeof(common->cc_survey));
--	memset(&common->cc_ani, 0, sizeof(common->cc_ani));
-+	memset(&common->cc_survey.cnts, 0, sizeof(common->cc_survey.cnts));
-+	memset(&common->cc_ani.cnts, 0, sizeof(common->cc_ani.cnts));
- 	spin_unlock_bh(&common->cc_lock);
- 
- 	/*
---- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
-+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
-@@ -664,7 +664,7 @@ ath5k_get_survey(struct ieee80211_hw *hw
- 		ah->survey.time_rx += cc->rx_frame / div;
- 		ah->survey.time_tx += cc->tx_frame / div;
- 	}
--	memset(cc, 0, sizeof(*cc));
-+	memset(&cc->cnts, 0, sizeof(cc->cnts));
- 	spin_unlock_bh(&common->cc_lock);
- 
- 	memcpy(survey, &ah->survey, sizeof(*survey));
---- a/drivers/net/wireless/ath/ath9k/link.c
-+++ b/drivers/net/wireless/ath/ath9k/link.c
-@@ -536,7 +536,7 @@ int ath_update_survey_stats(struct ath_s
- 	if (cc->cycles > 0)
- 		ret = cc->rx_busy * 100 / cc->cycles;
- 
--	memset(cc, 0, sizeof(*cc));
-+	memset(&cc->cnts, 0, sizeof(cc->cnts));
- 
- 	ath_update_survey_nf(sc, pos);
- 
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -135,8 +135,8 @@ void ath9k_ps_wakeup(struct ath_softc *s
- 	if (power_mode != ATH9K_PM_AWAKE) {
- 		spin_lock(&common->cc_lock);
- 		ath_hw_cycle_counters_update(common);
--		memset(&common->cc_survey, 0, sizeof(common->cc_survey));
--		memset(&common->cc_ani, 0, sizeof(common->cc_ani));
-+		memset(&common->cc_survey.cnts, 0, sizeof(common->cc_survey.cnts));
-+		memset(&common->cc_ani.cnts, 0, sizeof(common->cc_ani.cnts));
- 		spin_unlock(&common->cc_lock);
- 	}
- 
---- a/drivers/net/wireless/ath/hw.c
-+++ b/drivers/net/wireless/ath/hw.c
-@@ -183,7 +183,7 @@ int32_t ath_hw_get_listen_time(struct at
- 	listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
- 		      (common->clockrate * 1000);
- 
--	memset(cc, 0, sizeof(*cc));
-+	memset(&cc->cnts, 0, sizeof(cc->cnts));
- 
- 	return listen_time;
- }
diff --git a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
index 601ebdc758..0f6a570cb0 100644
--- a/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
+++ b/package/kernel/mac80211/patches/ath/402-ath_regd_optional.patch
@@ -82,7 +82,7 @@
  	help
 --- a/local-symbols
 +++ b/local-symbols
-@@ -101,6 +101,7 @@ ADM8211=
+@@ -94,6 +94,7 @@ ADM8211=
  ATH_COMMON=
  WLAN_VENDOR_ATH=
  ATH_DEBUG=
diff --git a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
index d0f4b15772..895e2ff8d8 100644
--- a/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
+++ b/package/kernel/mac80211/patches/ath/404-regd_no_assoc_hints.patch
@@ -1,6 +1,6 @@
 --- a/net/wireless/reg.c
 +++ b/net/wireless/reg.c
-@@ -3340,6 +3340,8 @@ void regulatory_hint_country_ie(struct w
+@@ -3364,6 +3364,8 @@ void regulatory_hint_country_ie(struct w
  	enum environment_cap env = ENVIRON_ANY;
  	struct regulatory_request *request = NULL, *lr;
  
@@ -9,7 +9,7 @@
  	/* IE len must be evenly divisible by 2 */
  	if (country_ie_len & 0x01)
  		return;
-@@ -3591,6 +3593,7 @@ static bool is_wiphy_all_set_reg_flag(en
+@@ -3615,6 +3617,7 @@ static bool is_wiphy_all_set_reg_flag(en
  
  void regulatory_hint_disconnect(void)
  {
diff --git a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
index 136be19894..c762aa6d64 100644
--- a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
+++ b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
@@ -18,7 +18,7 @@
  static bool
  ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
 @@ -79,6 +80,19 @@ ath5k_pci_eeprom_read(struct ath_common
- 	struct ath5k_hw *ah = (struct ath5k_hw *) common->ah;
+ 	struct ath5k_hw *ah = common->ah;
  	u32 status, timeout;
  
 +	struct ath5k_platform_data *pdata = NULL;
diff --git a/package/kernel/mac80211/patches/ath/432-carl9170_re-fix_fortified-memset_warning.patch b/package/kernel/mac80211/patches/ath/432-carl9170_re-fix_fortified-memset_warning.patch
deleted file mode 100644
index eafe49bd6f..0000000000
--- a/package/kernel/mac80211/patches/ath/432-carl9170_re-fix_fortified-memset_warning.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-[PATCH 1/2] carl9170: re-fix fortified-memset warning
-@ 2023-06-23 15:23 Arnd Bergmann
-  2023-06-23 15:24 ` [PATCH 2/2] mac80211: make ieee80211_tx_info padding explicit Arnd Bergmann
-                   ` (2 more replies)
-  0 siblings, 3 replies; 9+ messages in thread
-From: Arnd Bergmann @ 2023-06-23 15:23 UTC (permalink / raw)
-  To: Christian Lamparter, Kalle Valo, Kees Cook, Johannes Berg
-  Cc: Arnd Bergmann, linux-wireless, linux-kernel
-
-From: Arnd Bergmann <arnd@arndb.de>
-
-The carl9170_tx_release() function sometimes triggers a fortified-memset
-warning in my randconfig builds:
-
-In file included from include/linux/string.h:254,
-                 from drivers/net/wireless/ath/carl9170/tx.c:40:
-In function 'fortify_memset_chk',
-    inlined from 'carl9170_tx_release' at drivers/net/wireless/ath/carl9170/tx.c:283:2,
-    inlined from 'kref_put' at include/linux/kref.h:65:3,
-    inlined from 'carl9170_tx_put_skb' at drivers/net/wireless/ath/carl9170/tx.c:342:9:
-include/linux/fortify-string.h:493:25: error: call to '__write_overflow_field' declared with attribute warning: detected write beyond size of field (1st parameter); maybe use struct_group()? [-Werror=attribute-warning]
-  493 |                         __write_overflow_field(p_size_field, size);
-
-Kees previously tried to avoid this by using memset_after(), but it seems
-this does not fully address the problem. I noticed that the memset_after()
-here is done on a different part of the union (status) than the original
-cast was from (rate_driver_data), which may confuse the compiler.
-
-Unfortunately, the memset_after() trick does not work on driver_rates[]
-because that is part of an anonymous struct, and I could not get
-struct_group() to do this either. Using two separate memset() calls
-on the two members does address the warning though.
-
-Fixes: fb5f6a0e8063b ("mac80211: Use memset_after() to clear tx status")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
- drivers/net/wireless/ath/carl9170/tx.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/wireless/ath/carl9170/tx.c
-+++ b/drivers/net/wireless/ath/carl9170/tx.c
-@@ -280,7 +280,8 @@ static void carl9170_tx_release(struct k
- 	 * carl9170_tx_fill_rateinfo() has filled the rate information
- 	 * before we get to this point.
- 	 */
--	memset_after(&txinfo->status, 0, rates);
-+	memset(&txinfo->pad, 0, sizeof(txinfo->pad));
-+	memset(&txinfo->rate_driver_data, 0, sizeof(txinfo->rate_driver_data));
- 
- 	if (atomic_read(&ar->tx_total_queued))
- 		ar->tx_schedule = true;
diff --git a/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
index f1b5ce1f1b..c41bfa8888 100644
--- a/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
+++ b/package/kernel/mac80211/patches/ath10k/080-ath10k_thermal_config.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath10k/Kconfig
 +++ b/drivers/net/wireless/ath/ath10k/Kconfig
-@@ -87,6 +87,12 @@ config ATH10K_TRACING
+@@ -88,6 +88,12 @@ config ATH10K_TRACING
  	help
  	  Select this to ath10k use tracing infrastructure.
  
@@ -37,7 +37,7 @@
  void ath10k_thermal_event_temperature(struct ath10k *ar, int temperature);
 --- a/local-symbols
 +++ b/local-symbols
-@@ -160,6 +160,7 @@ ATH10K_SNOC=
+@@ -153,6 +153,7 @@ ATH10K_SNOC=
  ATH10K_DEBUG=
  ATH10K_DEBUGFS=
  ATH10K_SPECTRAL=
diff --git a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
index adfeb3eaae..479c74e473 100644
--- a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
+++ b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch
@@ -14,7 +14,7 @@ Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
 
 --- a/drivers/net/wireless/ath/ath10k/core.c
 +++ b/drivers/net/wireless/ath/ath10k/core.c
-@@ -3507,6 +3507,16 @@ int ath10k_core_register(struct ath10k *
+@@ -3527,6 +3527,16 @@ int ath10k_core_register(struct ath10k *
  
  	queue_work(ar->workqueue, &ar->register_work);
  
diff --git a/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
index 1a043f7b15..c9ad4018c8 100644
--- a/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
+++ b/package/kernel/mac80211/patches/ath10k/930-ath10k_add_tpt_led_trigger.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath10k/mac.c
 +++ b/drivers/net/wireless/ath/ath10k/mac.c
-@@ -9917,6 +9917,21 @@ static int ath10k_mac_init_rd(struct ath
+@@ -9918,6 +9918,21 @@ static int ath10k_mac_init_rd(struct ath
  	return 0;
  }
  
@@ -22,7 +22,7 @@
  int ath10k_mac_register(struct ath10k *ar)
  {
  	static const u32 cipher_suites[] = {
-@@ -10275,6 +10290,12 @@ int ath10k_mac_register(struct ath10k *a
+@@ -10280,6 +10295,12 @@ int ath10k_mac_register(struct ath10k *a
  
  	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
  
diff --git a/package/kernel/mac80211/patches/ath10k/974-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch b/package/kernel/mac80211/patches/ath10k/974-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch
index 05e3b2a28d..a9eb38e576 100644
--- a/package/kernel/mac80211/patches/ath10k/974-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch
+++ b/package/kernel/mac80211/patches/ath10k/974-wifi-ath10k-add-LED-and-GPIO-controlling-support-for.patch
@@ -38,7 +38,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
 
 --- a/drivers/net/wireless/ath/ath10k/Kconfig
 +++ b/drivers/net/wireless/ath/ath10k/Kconfig
-@@ -72,6 +72,12 @@ config ATH10K_DEBUGFS
+@@ -73,6 +73,12 @@ config ATH10K_DEBUGFS
  
  	  If unsure, say Y to make it easier to debug problems.
  
@@ -63,7 +63,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  ath10k_core-$(CONFIG_DEV_COREDUMP) += coredump.o
 --- a/local-symbols
 +++ b/local-symbols
-@@ -161,6 +161,7 @@ ATH10K_DEBUG=
+@@ -154,6 +154,7 @@ ATH10K_DEBUG=
  ATH10K_DEBUGFS=
  ATH10K_SPECTRAL=
  ATH10K_THERMAL=
@@ -73,7 +73,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  WCN36XX=
 --- a/drivers/net/wireless/ath/ath10k/core.c
 +++ b/drivers/net/wireless/ath/ath10k/core.c
-@@ -26,6 +26,7 @@
+@@ -27,6 +27,7 @@
  #include "testmode.h"
  #include "wmi-ops.h"
  #include "coredump.h"
@@ -81,7 +81,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  
  unsigned int ath10k_debug_mask;
  EXPORT_SYMBOL(ath10k_debug_mask);
-@@ -67,6 +68,7 @@ static const struct ath10k_hw_params ath
+@@ -68,6 +69,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca988x hw2.0",
  		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -89,7 +89,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
-@@ -107,6 +109,7 @@ static const struct ath10k_hw_params ath
+@@ -109,6 +111,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca988x hw2.0 ubiquiti",
  		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -97,7 +97,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
-@@ -148,6 +151,7 @@ static const struct ath10k_hw_params ath
+@@ -151,6 +154,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9887 hw1.0",
  		.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -105,7 +105,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
-@@ -189,6 +193,7 @@ static const struct ath10k_hw_params ath
+@@ -193,6 +197,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw3.2 sdio",
  		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  		.uart_pin = 19,
@@ -113,7 +113,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -225,6 +230,7 @@ static const struct ath10k_hw_params ath
+@@ -230,6 +235,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6164 hw2.1",
  		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -121,7 +121,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -265,6 +271,7 @@ static const struct ath10k_hw_params ath
+@@ -271,6 +277,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw2.1",
  		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -129,7 +129,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -305,6 +312,7 @@ static const struct ath10k_hw_params ath
+@@ -312,6 +319,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw3.0",
  		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -137,7 +137,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -345,6 +353,7 @@ static const struct ath10k_hw_params ath
+@@ -353,6 +361,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca6174 hw3.2",
  		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -145,7 +145,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -389,6 +398,7 @@ static const struct ath10k_hw_params ath
+@@ -398,6 +407,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca99x0 hw2.0",
  		.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -153,7 +153,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0x00000700,
  		.continuous_frag_desc = true,
  		.cck_rate_map_rev2 = true,
-@@ -435,6 +445,7 @@ static const struct ath10k_hw_params ath
+@@ -445,6 +455,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9984/qca9994 hw1.0",
  		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -161,7 +161,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  		.otp_exe_param = 0x00000700,
  		.continuous_frag_desc = true,
-@@ -488,6 +499,7 @@ static const struct ath10k_hw_params ath
+@@ -499,6 +510,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9888 hw2.0",
  		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -169,7 +169,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  		.otp_exe_param = 0x00000700,
  		.continuous_frag_desc = true,
-@@ -538,6 +550,7 @@ static const struct ath10k_hw_params ath
+@@ -550,6 +562,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9377 hw1.0",
  		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -177,7 +177,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -578,6 +591,7 @@ static const struct ath10k_hw_params ath
+@@ -591,6 +604,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9377 hw1.1",
  		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 6,
@@ -185,7 +185,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -620,6 +634,7 @@ static const struct ath10k_hw_params ath
+@@ -634,6 +648,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca9377 hw1.1 sdio",
  		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 19,
@@ -193,7 +193,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.otp_exe_param = 0,
  		.channel_counters_freq_hz = 88000,
  		.max_probe_resp_desc_thres = 0,
-@@ -653,6 +668,7 @@ static const struct ath10k_hw_params ath
+@@ -668,6 +683,7 @@ static const struct ath10k_hw_params ath
  		.name = "qca4019 hw1.0",
  		.patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
  		.uart_pin = 7,
@@ -201,7 +201,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  		.otp_exe_param = 0x0010000,
  		.continuous_frag_desc = true,
-@@ -698,6 +714,7 @@ static const struct ath10k_hw_params ath
+@@ -714,6 +730,7 @@ static const struct ath10k_hw_params ath
  		.dev_id = 0,
  		.bus = ATH10K_BUS_SNOC,
  		.name = "wcn3990 hw1.0",
@@ -209,7 +209,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		.continuous_frag_desc = true,
  		.tx_chain_mask = 0x7,
  		.rx_chain_mask = 0x7,
-@@ -3222,6 +3239,10 @@ int ath10k_core_start(struct ath10k *ar,
+@@ -3242,6 +3259,10 @@ int ath10k_core_start(struct ath10k *ar,
  		goto err_hif_stop;
  	}
  
@@ -220,7 +220,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	return 0;
  
  err_hif_stop:
-@@ -3480,9 +3501,18 @@ static void ath10k_core_register_work(st
+@@ -3500,9 +3521,18 @@ static void ath10k_core_register_work(st
  		goto err_spectral_destroy;
  	}
  
@@ -239,7 +239,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  err_spectral_destroy:
  	ath10k_spectral_destroy(ar);
  err_debug_destroy:
-@@ -3528,6 +3558,8 @@ void ath10k_core_unregister(struct ath10
+@@ -3548,6 +3578,8 @@ void ath10k_core_unregister(struct ath10
  	if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  		return;
  
@@ -250,7 +250,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
 --- a/drivers/net/wireless/ath/ath10k/core.h
 +++ b/drivers/net/wireless/ath/ath10k/core.h
-@@ -14,6 +14,7 @@
+@@ -15,6 +15,7 @@
  #include <linux/pci.h>
  #include <linux/uuid.h>
  #include <linux/time.h>
@@ -258,7 +258,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  
  #include "htt.h"
  #include "htc.h"
-@@ -1256,6 +1257,13 @@ struct ath10k {
+@@ -1257,6 +1258,13 @@ struct ath10k {
  	} testmode;
  
  	struct {
@@ -274,7 +274,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  		u32 fw_crash_counter;
 --- a/drivers/net/wireless/ath/ath10k/hw.h
 +++ b/drivers/net/wireless/ath/ath10k/hw.h
-@@ -519,6 +519,7 @@ struct ath10k_hw_params {
+@@ -521,6 +521,7 @@ struct ath10k_hw_params {
  	const char *name;
  	u32 patch_load_addr;
  	int uart_pin;
@@ -414,7 +414,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
 +#endif /* _LEDS_H_ */
 --- a/drivers/net/wireless/ath/ath10k/mac.c
 +++ b/drivers/net/wireless/ath/ath10k/mac.c
-@@ -24,6 +24,7 @@
+@@ -25,6 +25,7 @@
  #include "wmi-tlv.h"
  #include "wmi-ops.h"
  #include "wow.h"
@@ -473,7 +473,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  {
 --- a/drivers/net/wireless/ath/ath10k/wmi-tlv.c
 +++ b/drivers/net/wireless/ath/ath10k/wmi-tlv.c
-@@ -4601,6 +4601,8 @@ static const struct wmi_ops wmi_tlv_ops
+@@ -4606,6 +4606,8 @@ static const struct wmi_ops wmi_tlv_ops
  	.gen_echo = ath10k_wmi_tlv_op_gen_echo,
  	.gen_vdev_spectral_conf = ath10k_wmi_tlv_op_gen_vdev_spectral_conf,
  	.gen_vdev_spectral_enable = ath10k_wmi_tlv_op_gen_vdev_spectral_enable,
@@ -484,7 +484,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  static const struct wmi_peer_flags_map wmi_tlv_peer_flags_map = {
 --- a/drivers/net/wireless/ath/ath10k/wmi.c
 +++ b/drivers/net/wireless/ath/ath10k/wmi.c
-@@ -7472,6 +7472,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
+@@ -7493,6 +7493,49 @@ ath10k_wmi_op_gen_peer_set_param(struct
  	return skb;
  }
  
@@ -534,7 +534,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  static struct sk_buff *
  ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  			     enum wmi_sta_ps_mode psmode)
-@@ -9138,6 +9181,9 @@ static const struct wmi_ops wmi_ops = {
+@@ -9157,6 +9200,9 @@ static const struct wmi_ops wmi_ops = {
  	.fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  	.gen_echo = ath10k_wmi_op_gen_echo,
@@ -544,7 +544,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_bcn_tmpl not implemented */
  	/* .gen_prb_tmpl not implemented */
  	/* .gen_p2p_go_bcn_ie not implemented */
-@@ -9208,6 +9254,8 @@ static const struct wmi_ops wmi_10_1_ops
+@@ -9227,6 +9273,8 @@ static const struct wmi_ops wmi_10_1_ops
  	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  	.gen_echo = ath10k_wmi_op_gen_echo,
@@ -553,7 +553,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_bcn_tmpl not implemented */
  	/* .gen_prb_tmpl not implemented */
  	/* .gen_p2p_go_bcn_ie not implemented */
-@@ -9280,6 +9328,8 @@ static const struct wmi_ops wmi_10_2_ops
+@@ -9299,6 +9347,8 @@ static const struct wmi_ops wmi_10_2_ops
  	.gen_delba_send = ath10k_wmi_op_gen_delba_send,
  	.fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  	.get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
@@ -562,7 +562,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_pdev_enable_adaptive_cca not implemented */
  };
  
-@@ -9351,6 +9401,8 @@ static const struct wmi_ops wmi_10_2_4_o
+@@ -9370,6 +9420,8 @@ static const struct wmi_ops wmi_10_2_4_o
  		ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  	.get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  	.gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
@@ -571,7 +571,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  	/* .gen_bcn_tmpl not implemented */
  	/* .gen_prb_tmpl not implemented */
  	/* .gen_p2p_go_bcn_ie not implemented */
-@@ -9432,6 +9484,8 @@ static const struct wmi_ops wmi_10_4_ops
+@@ -9451,6 +9503,8 @@ static const struct wmi_ops wmi_10_4_ops
  	.gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  	.gen_echo = ath10k_wmi_op_gen_echo,
  	.gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
@@ -582,7 +582,7 @@ Link: https://msgid.link/20230611080505.17393-1-ansuelsmth@gmail.com
  int ath10k_wmi_attach(struct ath10k *ar)
 --- a/drivers/net/wireless/ath/ath10k/wmi.h
 +++ b/drivers/net/wireless/ath/ath10k/wmi.h
-@@ -3030,6 +3030,41 @@ enum wmi_10_4_feature_mask {
+@@ -3034,6 +3034,41 @@ enum wmi_10_4_feature_mask {
  
  };
  
diff --git a/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
index 2e598199c4..5bd9186d19 100644
--- a/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
+++ b/package/kernel/mac80211/patches/ath10k/975-ath10k-use-tpt-trigger-by-default.patch
@@ -16,7 +16,7 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
 
 --- a/drivers/net/wireless/ath/ath10k/core.h
 +++ b/drivers/net/wireless/ath/ath10k/core.h
-@@ -1312,6 +1312,10 @@ struct ath10k {
+@@ -1313,6 +1313,10 @@ struct ath10k {
  	s32 tx_power_2g_limit;
  	s32 tx_power_5g_limit;
  
@@ -40,7 +40,7 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>
  	if (ret)
 --- a/drivers/net/wireless/ath/ath10k/mac.c
 +++ b/drivers/net/wireless/ath/ath10k/mac.c
-@@ -10292,7 +10292,7 @@ int ath10k_mac_register(struct ath10k *a
+@@ -10297,7 +10297,7 @@ int ath10k_mac_register(struct ath10k *a
  	ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER;
  
  #ifdef CPTCFG_MAC80211_LEDS
diff --git a/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
index 3626debf19..f1770cfbe0 100644
--- a/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
+++ b/package/kernel/mac80211/patches/ath10k/981-ath10k-adjust-tx-power-reduction-for-US-regulatory-d.patch
@@ -28,7 +28,7 @@ Forwarded: no
 
 --- a/drivers/net/wireless/ath/ath10k/mac.c
 +++ b/drivers/net/wireless/ath/ath10k/mac.c
-@@ -1028,6 +1028,40 @@ static inline int ath10k_vdev_setup_sync
+@@ -1022,6 +1022,40 @@ static inline int ath10k_vdev_setup_sync
  	return ar->last_wmi_vdev_start_status;
  }
  
@@ -69,7 +69,7 @@ Forwarded: no
  static int ath10k_monitor_vdev_start(struct ath10k *ar, int vdev_id)
  {
  	struct cfg80211_chan_def *chandef = NULL;
-@@ -1060,7 +1094,8 @@ static int ath10k_monitor_vdev_start(str
+@@ -1054,7 +1088,8 @@ static int ath10k_monitor_vdev_start(str
  	arg.channel.min_power = 0;
  	arg.channel.max_power = channel->max_power * 2;
  	arg.channel.max_reg_power = channel->max_reg_power * 2;
@@ -79,7 +79,7 @@ Forwarded: no
  
  	reinit_completion(&ar->vdev_setup_done);
  	reinit_completion(&ar->vdev_delete_done);
-@@ -1506,7 +1541,8 @@ static int ath10k_vdev_start_restart(str
+@@ -1500,7 +1535,8 @@ static int ath10k_vdev_start_restart(str
  	arg.channel.min_power = 0;
  	arg.channel.max_power = chandef->chan->max_power * 2;
  	arg.channel.max_reg_power = chandef->chan->max_reg_power * 2;
@@ -89,7 +89,7 @@ Forwarded: no
  
  	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
  		arg.ssid = arvif->u.ap.ssid;
-@@ -3437,7 +3473,8 @@ static int ath10k_update_channel_list(st
+@@ -3431,7 +3467,8 @@ static int ath10k_update_channel_list(st
  			ch->min_power = 0;
  			ch->max_power = channel->max_power * 2;
  			ch->max_reg_power = channel->max_reg_power * 2;
diff --git a/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
index 6439ff9803..5d70df15ad 100644
--- a/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
+++ b/package/kernel/mac80211/patches/ath10k/984-ath10k-Try-to-get-mac-address-from-dts.patch
@@ -18,7 +18,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
 
 --- a/drivers/net/wireless/ath/ath10k/core.c
 +++ b/drivers/net/wireless/ath/ath10k/core.c
-@@ -8,6 +8,7 @@
+@@ -9,6 +9,7 @@
  #include <linux/module.h>
  #include <linux/firmware.h>
  #include <linux/of.h>
@@ -26,7 +26,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  #include <linux/property.h>
  #include <linux/dmi.h>
  #include <linux/ctype.h>
-@@ -3409,6 +3410,8 @@ static int ath10k_core_probe_fw(struct a
+@@ -3429,6 +3430,8 @@ static int ath10k_core_probe_fw(struct a
  
  	device_get_mac_address(ar->dev, ar->mac_addr);
  
diff --git a/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch b/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch
index 5a62ea3fc2..b9cdae7e1f 100644
--- a/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch
+++ b/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch
@@ -18,7 +18,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 
 --- a/drivers/net/wireless/ath/ath10k/mac.c
 +++ b/drivers/net/wireless/ath/ath10k/mac.c
-@@ -10088,7 +10088,6 @@ int ath10k_mac_register(struct ath10k *a
+@@ -10089,7 +10089,6 @@ int ath10k_mac_register(struct ath10k *a
  	ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA);
  	ieee80211_hw_set(ar->hw, QUEUE_CONTROL);
  	ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG);
diff --git a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
index 2f560c70a0..755982a7d5 100644
--- a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
+++ b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath10k/htt.h
 +++ b/drivers/net/wireless/ath/ath10k/htt.h
-@@ -235,7 +235,11 @@ enum htt_rx_ring_flags {
+@@ -236,7 +236,11 @@ enum htt_rx_ring_flags {
  };
  
  #define HTT_RX_RING_SIZE_MIN 128
@@ -14,7 +14,7 @@
  #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)
 --- a/drivers/net/wireless/ath/ath10k/pci.c
 +++ b/drivers/net/wireless/ath/ath10k/pci.c
-@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_
+@@ -132,7 +132,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 2048,
@@ -26,7 +26,7 @@
  		.recv_cb = ath10k_pci_htt_htc_rx_cb,
  	},
  
-@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_
+@@ -141,7 +145,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 2048,
@@ -38,7 +38,7 @@
  		.recv_cb = ath10k_pci_htc_rx_cb,
  	},
  
-@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_
+@@ -168,7 +176,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 512,
@@ -50,7 +50,7 @@
  		.recv_cb = ath10k_pci_htt_rx_cb,
  	},
  
-@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_
+@@ -193,7 +205,11 @@ static const struct ce_attr pci_host_ce_
  		.flags = CE_ATTR_FLAGS,
  		.src_nentries = 0,
  		.src_sz_max = 2048,
diff --git a/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-mhi-add-a-warning-message-for-MHI_CB_EE_.patch b/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-mhi-add-a-warning-message-for-MHI_CB_EE_.patch
deleted file mode 100644
index e1286c9537..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0013-wifi-ath11k-mhi-add-a-warning-message-for-MHI_CB_EE_.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 4a93b554cf9fa64faa7cf164c0d32fc3ce67108b Mon Sep 17 00:00:00 2001
-From: Arowa Suliman <arowa@chromium.org>
-Date: Sat, 26 Aug 2023 08:42:42 +0300
-Subject: [PATCH] wifi: ath11k: mhi: add a warning message for MHI_CB_EE_RDDM
- crash
-
-Currently, the ath11k driver does not print a crash signature when a
-MHI_CB_EE_RDDM crash happens. Checked by triggering a simulated crash using the
-command and checking dmesg for logs:
-
-echo assert > /sys/kernel/debug/ath11k/../simulate_fw_crash
-
-Add a warning when firmware crash MHI_CB_EE_RDDM happens.
-
-Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23
-
-Signed-off-by: Arowa Suliman <arowa@chromium.org>
-Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230714001126.463127-1-arowa@chromium.org
----
- drivers/net/wireless/ath/ath11k/mhi.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/wireless/ath/ath11k/mhi.c
-+++ b/drivers/net/wireless/ath/ath11k/mhi.c
-@@ -333,6 +333,7 @@ static void ath11k_mhi_op_status_cb(stru
- 		ath11k_warn(ab, "firmware crashed: MHI_CB_SYS_ERROR\n");
- 		break;
- 	case MHI_CB_EE_RDDM:
-+		ath11k_warn(ab, "firmware crashed: MHI_CB_EE_RDDM\n");
- 		if (!(test_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags)))
- 			queue_work(ab->workqueue_aux, &ab->reset_work);
- 		break;
diff --git a/package/kernel/mac80211/patches/ath11k/0014-wifi-ath11k-move-references-from-rsvd2-to-info-field.patch b/package/kernel/mac80211/patches/ath11k/0014-wifi-ath11k-move-references-from-rsvd2-to-info-field.patch
deleted file mode 100644
index 731a763e17..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0014-wifi-ath11k-move-references-from-rsvd2-to-info-field.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 5bd2ced044bb95029d5c44cf7d23ced73e0fc05b Mon Sep 17 00:00:00 2001
-From: Muna Sinada <quic_msinada@quicinc.com>
-Date: Sat, 26 Aug 2023 08:42:46 +0300
-Subject: [PATCH] wifi: ath11k: move references from rsvd2 to info fields
-
-Remove references to reserved fields and add new info fields for
-struct hal_rx_ppdu_end_user_stats. Reserved fields should not be
-accessed, therefore existing references to it are to be changed to
-referencing specific info fields.
-
-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
-
-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/1692827868-15667-1-git-send-email-quic_msinada@quicinc.com
----
- drivers/net/wireless/ath/ath11k/hal_rx.c | 10 +++++-----
- drivers/net/wireless/ath/ath11k/hal_rx.h | 11 ++++++++---
- 2 files changed, 13 insertions(+), 8 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/hal_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
-@@ -814,7 +814,7 @@ ath11k_hal_rx_handle_ofdma_info(void *rx
- 
- 	rx_user_status->ul_ofdma_user_v0_word0 = __le32_to_cpu(ppdu_end_user->info6);
- 
--	rx_user_status->ul_ofdma_user_v0_word1 = __le32_to_cpu(ppdu_end_user->rsvd2[10]);
-+	rx_user_status->ul_ofdma_user_v0_word1 = __le32_to_cpu(ppdu_end_user->info9);
- }
- 
- static inline void
-@@ -825,11 +825,11 @@ ath11k_hal_rx_populate_byte_count(void *
- 		(struct hal_rx_ppdu_end_user_stats *)rx_tlv;
- 
- 	rx_user_status->mpdu_ok_byte_count =
--		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_RSVD2_6_MPDU_OK_BYTE_COUNT,
--			  __le32_to_cpu(ppdu_end_user->rsvd2[6]));
-+		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_OK_BYTE_COUNT,
-+			  __le32_to_cpu(ppdu_end_user->info7));
- 	rx_user_status->mpdu_err_byte_count =
--		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_RSVD2_8_MPDU_ERR_BYTE_COUNT,
--			  __le32_to_cpu(ppdu_end_user->rsvd2[8]));
-+		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO9_MPDU_ERR_BYTE_COUNT,
-+			  __le32_to_cpu(ppdu_end_user->info8));
- }
- 
- static inline void
---- a/drivers/net/wireless/ath/ath11k/hal_rx.h
-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
-@@ -222,8 +222,8 @@ struct hal_rx_ppdu_start {
- #define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP		GENMASK(15, 0)
- #define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_EOSP_BITMAP	GENMASK(31, 16)
- 
--#define HAL_RX_PPDU_END_USER_STATS_RSVD2_6_MPDU_OK_BYTE_COUNT	GENMASK(24, 0)
--#define HAL_RX_PPDU_END_USER_STATS_RSVD2_8_MPDU_ERR_BYTE_COUNT	GENMASK(24, 0)
-+#define HAL_RX_PPDU_END_USER_STATS_INFO7_MPDU_OK_BYTE_COUNT	GENMASK(24, 0)
-+#define HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_ERR_BYTE_COUNT	GENMASK(24, 0)
- 
- struct hal_rx_ppdu_end_user_stats {
- 	__le32 rsvd0[2];
-@@ -236,7 +236,12 @@ struct hal_rx_ppdu_end_user_stats {
- 	__le32 info4;
- 	__le32 info5;
- 	__le32 info6;
--	__le32 rsvd2[11];
-+	__le32 rsvd2[5];
-+	__le32 info7;
-+	__le32 rsvd3;
-+	__le32 info8;
-+	__le32 rsvd3[2];
-+	__le32 info9;
- } __packed;
- 
- struct hal_rx_ppdu_end_user_stats_ext {
diff --git a/package/kernel/mac80211/patches/ath11k/0015-wifi-ath11k-fix-tid-bitmap-is-0-in-peer-rx-mu-stats.patch b/package/kernel/mac80211/patches/ath11k/0015-wifi-ath11k-fix-tid-bitmap-is-0-in-peer-rx-mu-stats.patch
deleted file mode 100644
index 3edc3fc956..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0015-wifi-ath11k-fix-tid-bitmap-is-0-in-peer-rx-mu-stats.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 7791487cd16cafd018cba0bf73789111a9f16843 Mon Sep 17 00:00:00 2001
-From: Muna Sinada <quic_msinada@quicinc.com>
-Date: Sat, 26 Aug 2023 08:42:46 +0300
-Subject: [PATCH] wifi: ath11k: fix tid bitmap is 0 in peer rx mu stats
-
-Correct parsing of reading offset for rx tid 16 bit bitmap. Incorrect
-offset caused peer rx mu stats tid bitmap to always be zero. This
-correction is in the software context and does not affect the
-firmware interface.
-
-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00356-QCAHKSWPL_SILICONZ-1
-
-Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/1692827868-15667-2-git-send-email-quic_msinada@quicinc.com
----
- drivers/net/wireless/ath/ath11k/hal_rx.c | 10 +++++-----
- drivers/net/wireless/ath/ath11k/hal_rx.h | 17 +++++++++--------
- 2 files changed, 14 insertions(+), 13 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/hal_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
-@@ -814,7 +814,7 @@ ath11k_hal_rx_handle_ofdma_info(void *rx
- 
- 	rx_user_status->ul_ofdma_user_v0_word0 = __le32_to_cpu(ppdu_end_user->info6);
- 
--	rx_user_status->ul_ofdma_user_v0_word1 = __le32_to_cpu(ppdu_end_user->info9);
-+	rx_user_status->ul_ofdma_user_v0_word1 = __le32_to_cpu(ppdu_end_user->info10);
- }
- 
- static inline void
-@@ -826,10 +826,10 @@ ath11k_hal_rx_populate_byte_count(void *
- 
- 	rx_user_status->mpdu_ok_byte_count =
- 		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_OK_BYTE_COUNT,
--			  __le32_to_cpu(ppdu_end_user->info7));
-+			  __le32_to_cpu(ppdu_end_user->info8));
- 	rx_user_status->mpdu_err_byte_count =
- 		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO9_MPDU_ERR_BYTE_COUNT,
--			  __le32_to_cpu(ppdu_end_user->info8));
-+			  __le32_to_cpu(ppdu_end_user->info9));
- }
- 
- static inline void
-@@ -903,8 +903,8 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
- 			FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO2_AST_INDEX,
- 				  __le32_to_cpu(eu_stats->info2));
- 		ppdu_info->tid =
--			ffs(FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP,
--				      __le32_to_cpu(eu_stats->info6))) - 1;
-+			ffs(FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO7_TID_BITMAP,
-+				      __le32_to_cpu(eu_stats->info7))) - 1;
- 		ppdu_info->tcp_msdu_count =
- 			FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO4_TCP_MSDU_CNT,
- 				  __le32_to_cpu(eu_stats->info4));
---- a/drivers/net/wireless/ath/ath11k/hal_rx.h
-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
-@@ -149,7 +149,7 @@ struct hal_rx_mon_ppdu_info {
- 	u8 beamformed;
- 	u8 rssi_comb;
- 	u8 rssi_chain_pri20[HAL_RX_MAX_NSS];
--	u8 tid;
-+	u16 tid;
- 	u16 ht_flags;
- 	u16 vht_flags;
- 	u16 he_flags;
-@@ -219,11 +219,11 @@ struct hal_rx_ppdu_start {
- #define HAL_RX_PPDU_END_USER_STATS_INFO5_OTHER_MSDU_CNT		GENMASK(15, 0)
- #define HAL_RX_PPDU_END_USER_STATS_INFO5_TCP_ACK_MSDU_CNT	GENMASK(31, 16)
- 
--#define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP		GENMASK(15, 0)
--#define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_EOSP_BITMAP	GENMASK(31, 16)
-+#define HAL_RX_PPDU_END_USER_STATS_INFO7_TID_BITMAP		GENMASK(15, 0)
-+#define HAL_RX_PPDU_END_USER_STATS_INFO7_TID_EOSP_BITMAP	GENMASK(31, 16)
- 
--#define HAL_RX_PPDU_END_USER_STATS_INFO7_MPDU_OK_BYTE_COUNT	GENMASK(24, 0)
--#define HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_ERR_BYTE_COUNT	GENMASK(24, 0)
-+#define HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_OK_BYTE_COUNT	GENMASK(24, 0)
-+#define HAL_RX_PPDU_END_USER_STATS_INFO9_MPDU_ERR_BYTE_COUNT	GENMASK(24, 0)
- 
- struct hal_rx_ppdu_end_user_stats {
- 	__le32 rsvd0[2];
-@@ -236,12 +236,13 @@ struct hal_rx_ppdu_end_user_stats {
- 	__le32 info4;
- 	__le32 info5;
- 	__le32 info6;
--	__le32 rsvd2[5];
- 	__le32 info7;
--	__le32 rsvd3;
-+	__le32 rsvd2[4];
- 	__le32 info8;
--	__le32 rsvd3[2];
-+	__le32 rsvd3;
- 	__le32 info9;
-+	__le32 rsvd4[2];
-+	__le32 info10;
- } __packed;
- 
- struct hal_rx_ppdu_end_user_stats_ext {
diff --git a/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-add-chip-id-board-name-while-searching-b.patch b/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-add-chip-id-board-name-while-searching-b.patch
deleted file mode 100644
index 662e28f4ef..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0016-wifi-ath11k-add-chip-id-board-name-while-searching-b.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 1133af5aea588a58043244a4ecb5ce511b310356 Mon Sep 17 00:00:00 2001
-From: Wen Gong <quic_wgong@quicinc.com>
-Date: Wed, 30 Aug 2023 02:02:26 -0400
-Subject: [PATCH] wifi: ath11k: add chip id board name while searching
- board-2.bin for WCN6855
-
-Sometimes board-2.bin does not have the board data which matched the
-parameters such as bus type, vendor, device, subsystem-vendor,
-subsystem-device, qmi-chip-id and qmi-board-id, then wlan will load fail.
-
-Hence add another type which only matches the bus type and qmi-chip-id,
-then the ratio of missing board data reduced.
-
-Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23
-
-Signed-off-by: Wen Gong <quic_wgong@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230830060226.18664-1-quic_wgong@quicinc.com
----
- drivers/net/wireless/ath/ath11k/core.c | 108 ++++++++++++++++++++-----
- 1 file changed, 87 insertions(+), 21 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/core.c
-+++ b/drivers/net/wireless/ath/ath11k/core.c
-@@ -985,9 +985,15 @@ int ath11k_core_check_dt(struct ath11k_b
- 	return 0;
- }
- 
-+enum ath11k_bdf_name_type {
-+	ATH11K_BDF_NAME_FULL,
-+	ATH11K_BDF_NAME_BUS_NAME,
-+	ATH11K_BDF_NAME_CHIP_ID,
-+};
-+
- static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
- 					   size_t name_len, bool with_variant,
--					   bool bus_type_mode)
-+					   enum ath11k_bdf_name_type name_type)
- {
- 	/* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
- 	char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
-@@ -998,11 +1004,8 @@ static int __ath11k_core_create_board_na
- 
- 	switch (ab->id.bdf_search) {
- 	case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
--		if (bus_type_mode)
--			scnprintf(name, name_len,
--				  "bus=%s",
--				  ath11k_bus_str(ab->hif.bus));
--		else
-+		switch (name_type) {
-+		case ATH11K_BDF_NAME_FULL:
- 			scnprintf(name, name_len,
- 				  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
- 				  ath11k_bus_str(ab->hif.bus),
-@@ -1012,6 +1015,19 @@ static int __ath11k_core_create_board_na
- 				  ab->qmi.target.chip_id,
- 				  ab->qmi.target.board_id,
- 				  variant);
-+			break;
-+		case ATH11K_BDF_NAME_BUS_NAME:
-+			scnprintf(name, name_len,
-+				  "bus=%s",
-+				  ath11k_bus_str(ab->hif.bus));
-+			break;
-+		case ATH11K_BDF_NAME_CHIP_ID:
-+			scnprintf(name, name_len,
-+				  "bus=%s,qmi-chip-id=%d",
-+				  ath11k_bus_str(ab->hif.bus),
-+				  ab->qmi.target.chip_id);
-+			break;
-+		}
- 		break;
- 	default:
- 		scnprintf(name, name_len,
-@@ -1030,19 +1046,29 @@ static int __ath11k_core_create_board_na
- static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
- 					 size_t name_len)
- {
--	return __ath11k_core_create_board_name(ab, name, name_len, true, false);
-+	return __ath11k_core_create_board_name(ab, name, name_len, true,
-+					       ATH11K_BDF_NAME_FULL);
- }
- 
- static int ath11k_core_create_fallback_board_name(struct ath11k_base *ab, char *name,
- 						  size_t name_len)
- {
--	return __ath11k_core_create_board_name(ab, name, name_len, false, false);
-+	return __ath11k_core_create_board_name(ab, name, name_len, false,
-+					       ATH11K_BDF_NAME_FULL);
- }
- 
- static int ath11k_core_create_bus_type_board_name(struct ath11k_base *ab, char *name,
- 						  size_t name_len)
- {
--	return __ath11k_core_create_board_name(ab, name, name_len, false, true);
-+	return __ath11k_core_create_board_name(ab, name, name_len, false,
-+					       ATH11K_BDF_NAME_BUS_NAME);
-+}
-+
-+static int ath11k_core_create_chip_id_board_name(struct ath11k_base *ab, char *name,
-+						 size_t name_len)
-+{
-+	return __ath11k_core_create_board_name(ab, name, name_len, false,
-+					       ATH11K_BDF_NAME_CHIP_ID);
- }
- 
- const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
-@@ -1289,16 +1315,21 @@ int ath11k_core_fetch_board_data_api_1(s
- #define BOARD_NAME_SIZE 200
- int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
- {
--	char boardname[BOARD_NAME_SIZE], fallback_boardname[BOARD_NAME_SIZE];
-+	char *boardname = NULL, *fallback_boardname = NULL, *chip_id_boardname = NULL;
- 	char *filename, filepath[100];
--	int ret;
-+	int ret = 0;
- 
- 	filename = ATH11K_BOARD_API2_FILE;
-+	boardname = kzalloc(BOARD_NAME_SIZE, GFP_KERNEL);
-+	if (!boardname) {
-+		ret = -ENOMEM;
-+		goto exit;
-+	}
- 
--	ret = ath11k_core_create_board_name(ab, boardname, sizeof(boardname));
-+	ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE);
- 	if (ret) {
- 		ath11k_err(ab, "failed to create board name: %d", ret);
--		return ret;
-+		goto exit;
- 	}
- 
- 	ab->bd_api = 2;
-@@ -1307,13 +1338,19 @@ int ath11k_core_fetch_bdf(struct ath11k_
- 						 ATH11K_BD_IE_BOARD_NAME,
- 						 ATH11K_BD_IE_BOARD_DATA);
- 	if (!ret)
--		goto success;
-+		goto exit;
-+
-+	fallback_boardname = kzalloc(BOARD_NAME_SIZE, GFP_KERNEL);
-+	if (!fallback_boardname) {
-+		ret = -ENOMEM;
-+		goto exit;
-+	}
- 
- 	ret = ath11k_core_create_fallback_board_name(ab, fallback_boardname,
--						     sizeof(fallback_boardname));
-+						     BOARD_NAME_SIZE);
- 	if (ret) {
- 		ath11k_err(ab, "failed to create fallback board name: %d", ret);
--		return ret;
-+		goto exit;
- 	}
- 
- 	ret = ath11k_core_fetch_board_data_api_n(ab, bd, fallback_boardname,
-@@ -1321,7 +1358,28 @@ int ath11k_core_fetch_bdf(struct ath11k_
- 						 ATH11K_BD_IE_BOARD_NAME,
- 						 ATH11K_BD_IE_BOARD_DATA);
- 	if (!ret)
--		goto success;
-+		goto exit;
-+
-+	chip_id_boardname = kzalloc(BOARD_NAME_SIZE, GFP_KERNEL);
-+	if (!chip_id_boardname) {
-+		ret = -ENOMEM;
-+		goto exit;
-+	}
-+
-+	ret = ath11k_core_create_chip_id_board_name(ab, chip_id_boardname,
-+						    BOARD_NAME_SIZE);
-+	if (ret) {
-+		ath11k_err(ab, "failed to create chip id board name: %d", ret);
-+		goto exit;
-+	}
-+
-+	ret = ath11k_core_fetch_board_data_api_n(ab, bd, chip_id_boardname,
-+						 ATH11K_BD_IE_BOARD,
-+						 ATH11K_BD_IE_BOARD_NAME,
-+						 ATH11K_BD_IE_BOARD_DATA);
-+
-+	if (!ret)
-+		goto exit;
- 
- 	ab->bd_api = 1;
- 	ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_DEFAULT_BOARD_FILE);
-@@ -1334,14 +1392,22 @@ int ath11k_core_fetch_bdf(struct ath11k_
- 			ath11k_err(ab, "failed to fetch board data for %s from %s\n",
- 				   fallback_boardname, filepath);
- 
-+		ath11k_err(ab, "failed to fetch board data for %s from %s\n",
-+			   chip_id_boardname, filepath);
-+
- 		ath11k_err(ab, "failed to fetch board.bin from %s\n",
- 			   ab->hw_params.fw.dir);
--		return ret;
- 	}
- 
--success:
--	ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api);
--	return 0;
-+exit:
-+	kfree(boardname);
-+	kfree(fallback_boardname);
-+	kfree(chip_id_boardname);
-+
-+	if (!ret)
-+		ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api);
-+
-+	return ret;
- }
- 
- int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd)
diff --git a/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-drop-NULL-pointer-check-in-ath11k_update.patch b/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-drop-NULL-pointer-check-in-ath11k_update.patch
deleted file mode 100644
index ccf7461a75..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0018-wifi-ath11k-drop-NULL-pointer-check-in-ath11k_update.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From ac13a7842ab46a87aa315514d6d7e19b03cb2adc Mon Sep 17 00:00:00 2001
-From: Dmitry Antipov <dmantipov@yandex.ru>
-Date: Wed, 6 Sep 2023 12:36:55 +0300
-Subject: [PATCH] wifi: ath11k: drop NULL pointer check in
- ath11k_update_per_peer_tx_stats()
-
-Since 'user_stats' is a fixed-size array of 'struct htt_ppdu_user_stats'
-in 'struct htt_ppdu_stats', any of its member can't be NULL and so
-relevant check may be dropped.
-
-Found by Linux Verification Center (linuxtesting.org) with SVACE.
-
-Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230906093704.14001-1-dmantipov@yandex.ru
----
- drivers/net/wireless/ath/ath11k/dp_rx.c | 3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
-@@ -1388,9 +1388,6 @@ ath11k_update_per_peer_tx_stats(struct a
- 	u8 tid = HTT_PPDU_STATS_NON_QOS_TID;
- 	bool is_ampdu = false;
- 
--	if (!usr_stats)
--		return;
--
- 	if (!(usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_RATE)))
- 		return;
- 
diff --git a/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-drop-redundant-check-in-ath11k_dp_rx_mon.patch b/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-drop-redundant-check-in-ath11k_dp_rx_mon.patch
deleted file mode 100644
index cf18273918..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0019-wifi-ath11k-drop-redundant-check-in-ath11k_dp_rx_mon.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 82ae3f4635382ff23e2ece55b5d5e713223951ec Mon Sep 17 00:00:00 2001
-From: Dmitry Antipov <dmantipov@yandex.ru>
-Date: Thu, 24 Aug 2023 10:50:44 +0300
-Subject: [PATCH] wifi: ath11k: drop redundant check in
- ath11k_dp_rx_mon_dest_process()
-
-In 'ath11k_dp_rx_mon_dest_process()', 'mon_dst_srng' points to
-a member of 'srng_list', which is a fixed-size array inside
-'struct ath11k_hal'. This way, if 'ring_id' is valid (i. e.
-between 0 and HAL_SRNG_RING_ID_MAX - 1 inclusive), 'mon_dst_srng'
-can't be NULL and so relevant check may be dropped.
-
-Found by Linux Verification Center (linuxtesting.org) with SVACE.
-
-Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230824075121.121144-1-dmantipov@yandex.ru
----
- drivers/net/wireless/ath/ath11k/dp_rx.c | 7 -------
- 1 file changed, 7 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
-@@ -5100,13 +5100,6 @@ static void ath11k_dp_rx_mon_dest_proces
- 
- 	mon_dst_srng = &ar->ab->hal.srng_list[ring_id];
- 
--	if (!mon_dst_srng) {
--		ath11k_warn(ar->ab,
--			    "HAL Monitor Destination Ring Init Failed -- %p",
--			    mon_dst_srng);
--		return;
--	}
--
- 	spin_lock_bh(&pmon->mon_lock);
- 
- 	ath11k_hal_srng_access_begin(ar->ab, mon_dst_srng);
diff --git a/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-remove-unused-members-of-struct-ath11k_b.patch b/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-remove-unused-members-of-struct-ath11k_b.patch
deleted file mode 100644
index ffb210cc10..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0020-wifi-ath11k-remove-unused-members-of-struct-ath11k_b.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 9066794113c4813b6ce4a66ed6ce14ecdf35625d Mon Sep 17 00:00:00 2001
-From: Dmitry Antipov <dmantipov@yandex.ru>
-Date: Thu, 24 Aug 2023 10:50:45 +0300
-Subject: [PATCH] wifi: ath11k: remove unused members of 'struct ath11k_base'
-
-Remove set but otherwise unused 'wlan_init_status' and
-'wmi_ready' members of 'struct ath11k_base', adjust
-'ath11k_wmi_tlv_rdy_parse()' accordingly.
-
-Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230824075121.121144-2-dmantipov@yandex.ru
----
- drivers/net/wireless/ath/ath11k/core.h | 2 --
- drivers/net/wireless/ath/ath11k/wmi.c  | 2 --
- 2 files changed, 4 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/core.h
-+++ b/drivers/net/wireless/ath/ath11k/core.h
-@@ -901,8 +901,6 @@ struct ath11k_base {
- 	struct list_head peers;
- 	wait_queue_head_t peer_mapping_wq;
- 	u8 mac_addr[ETH_ALEN];
--	bool wmi_ready;
--	u32 wlan_init_status;
- 	int irq_num[ATH11K_IRQ_NUM_MAX];
- 	struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
- 	struct ath11k_targ_cap target_caps;
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -7222,14 +7222,12 @@ static int ath11k_wmi_tlv_rdy_parse(stru
- 		memset(&fixed_param, 0, sizeof(fixed_param));
- 		memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
- 		       min_t(u16, sizeof(fixed_param), len));
--		ab->wlan_init_status = fixed_param.ready_event_min.status;
- 		rdy_parse->num_extra_mac_addr =
- 			fixed_param.ready_event_min.num_extra_mac_addr;
- 
- 		ether_addr_copy(ab->mac_addr,
- 				fixed_param.ready_event_min.mac_addr.addr);
- 		ab->pktlog_defs_checksum = fixed_param.pktlog_defs_checksum;
--		ab->wmi_ready = true;
- 		break;
- 	case WMI_TAG_ARRAY_FIXED_STRUCT:
- 		addr_list = (struct wmi_mac_addr *)ptr;
diff --git a/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-use-kstrtoul_from_user-where-appropriate.patch b/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-use-kstrtoul_from_user-where-appropriate.patch
deleted file mode 100644
index 7a6b11b6d3..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0021-wifi-ath11k-use-kstrtoul_from_user-where-appropriate.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 458f66c30df2b8495790cf6fca76ebad44046921 Mon Sep 17 00:00:00 2001
-From: Dmitry Antipov <dmantipov@yandex.ru>
-Date: Thu, 21 Sep 2023 11:16:57 +0300
-Subject: [PATCH] wifi: ath11k: use kstrtoul_from_user() where appropriate
-
-Use 'kstrtoul_from_user()' in 'ath11k_write_file_spectral_count()'
-and 'ath11k_write_file_spectral_bins()'
-
-Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230824075121.121144-4-dmantipov@yandex.ru
----
- drivers/net/wireless/ath/ath11k/spectral.c | 26 +++++++---------------
- 1 file changed, 8 insertions(+), 18 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/spectral.c
-+++ b/drivers/net/wireless/ath/ath11k/spectral.c
-@@ -386,16 +386,11 @@ static ssize_t ath11k_write_file_spectra
- {
- 	struct ath11k *ar = file->private_data;
- 	unsigned long val;
--	char buf[32];
--	ssize_t len;
--
--	len = min(count, sizeof(buf) - 1);
--	if (copy_from_user(buf, user_buf, len))
--		return -EFAULT;
-+	ssize_t ret;
- 
--	buf[len] = '\0';
--	if (kstrtoul(buf, 0, &val))
--		return -EINVAL;
-+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-+	if (ret)
-+		return ret;
- 
- 	if (val > ATH11K_SPECTRAL_SCAN_COUNT_MAX)
- 		return -EINVAL;
-@@ -441,16 +436,11 @@ static ssize_t ath11k_write_file_spectra
- {
- 	struct ath11k *ar = file->private_data;
- 	unsigned long val;
--	char buf[32];
--	ssize_t len;
--
--	len = min(count, sizeof(buf) - 1);
--	if (copy_from_user(buf, user_buf, len))
--		return -EFAULT;
-+	ssize_t ret;
- 
--	buf[len] = '\0';
--	if (kstrtoul(buf, 0, &val))
--		return -EINVAL;
-+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-+	if (ret)
-+		return ret;
- 
- 	if (val < ATH11K_SPECTRAL_MIN_BINS ||
- 	    val > ar->ab->hw_params.spectral.max_fft_bins)
diff --git a/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-remove-unnecessary-void-conversions.patch b/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-remove-unnecessary-void-conversions.patch
deleted file mode 100644
index 81c1ca16b3..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0022-wifi-ath11k-remove-unnecessary-void-conversions.patch
+++ /dev/null
@@ -1,248 +0,0 @@
-From 87fd0602610d6965c45afc61780ac98842e8f902 Mon Sep 17 00:00:00 2001
-From: Wu Yunchuan <yunchuan@nfschina.com>
-Date: Thu, 21 Sep 2023 11:50:05 +0300
-Subject: [PATCH] wifi: ath11k: remove unnecessary (void*) conversions
-
-No need cast (void *) to (struct ath11k_base *),
-struct hal_rx_msdu_link *), (struct ath11k_buffer_addr *) or
-other types.
-
-Signed-off-by: Wu Yunchuan <yunchuan@nfschina.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230919045150.524304-1-yunchuan@nfschina.com
----
- drivers/net/wireless/ath/ath11k/dp.c       |  2 +-
- drivers/net/wireless/ath/ath11k/dp_rx.c    | 13 +++++--------
- drivers/net/wireless/ath/ath11k/hal.c      |  8 +++-----
- drivers/net/wireless/ath/ath11k/hal_rx.c   | 17 +++++++----------
- drivers/net/wireless/ath/ath11k/hal_tx.c   |  2 +-
- drivers/net/wireless/ath/ath11k/mac.c      |  4 ++--
- drivers/net/wireless/ath/ath11k/spectral.c |  2 +-
- drivers/net/wireless/ath/ath11k/wmi.c      |  6 +++---
- 8 files changed, 23 insertions(+), 31 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/dp.c
-+++ b/drivers/net/wireless/ath/ath11k/dp.c
-@@ -1009,7 +1009,7 @@ void ath11k_dp_vdev_tx_attach(struct ath
- 
- static int ath11k_dp_tx_pending_cleanup(int buf_id, void *skb, void *ctx)
- {
--	struct ath11k_base *ab = (struct ath11k_base *)ctx;
-+	struct ath11k_base *ab = ctx;
- 	struct sk_buff *msdu = skb;
- 
- 	dma_unmap_single(ab->dev, ATH11K_SKB_CB(msdu)->paddr, msdu->len,
---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
-@@ -1256,7 +1256,7 @@ static int ath11k_htt_tlv_ppdu_stats_par
- 	int cur_user;
- 	u16 peer_id;
- 
--	ppdu_info = (struct htt_ppdu_stats_info *)data;
-+	ppdu_info = data;
- 
- 	switch (tag) {
- 	case HTT_PPDU_STATS_TAG_COMMON:
-@@ -4492,8 +4492,7 @@ int ath11k_dp_rx_monitor_link_desc_retur
- 	src_srng_desc = ath11k_hal_srng_src_get_next_entry(ar->ab, hal_srng);
- 
- 	if (src_srng_desc) {
--		struct ath11k_buffer_addr *src_desc =
--				(struct ath11k_buffer_addr *)src_srng_desc;
-+		struct ath11k_buffer_addr *src_desc = src_srng_desc;
- 
- 		*src_desc = *((struct ath11k_buffer_addr *)p_last_buf_addr_info);
- 	} else {
-@@ -4512,8 +4511,7 @@ void ath11k_dp_rx_mon_next_link_desc_get
- 					 u8 *rbm,
- 					 void **pp_buf_addr_info)
- {
--	struct hal_rx_msdu_link *msdu_link =
--			(struct hal_rx_msdu_link *)rx_msdu_link_desc;
-+	struct hal_rx_msdu_link *msdu_link = rx_msdu_link_desc;
- 	struct ath11k_buffer_addr *buf_addr_info;
- 
- 	buf_addr_info = (struct ath11k_buffer_addr *)&msdu_link->buf_addr_info;
-@@ -4554,7 +4552,7 @@ static void ath11k_hal_rx_msdu_list_get(
- 	u32 first = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1);
- 	u8  tmp  = 0;
- 
--	msdu_link = (struct hal_rx_msdu_link *)msdu_link_desc;
-+	msdu_link = msdu_link_desc;
- 	msdu_details = &msdu_link->msdu_link[0];
- 
- 	for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) {
-@@ -4651,8 +4649,7 @@ ath11k_dp_rx_mon_mpdu_pop(struct ath11k
- 	bool is_frag, is_first_msdu;
- 	bool drop_mpdu = false;
- 	struct ath11k_skb_rxcb *rxcb;
--	struct hal_reo_entrance_ring *ent_desc =
--			(struct hal_reo_entrance_ring *)ring_entry;
-+	struct hal_reo_entrance_ring *ent_desc = ring_entry;
- 	int buf_id;
- 	u32 rx_link_buf_info[2];
- 	u8 rbm;
---- a/drivers/net/wireless/ath/ath11k/hal.c
-+++ b/drivers/net/wireless/ath/ath11k/hal.c
-@@ -571,7 +571,7 @@ u32 ath11k_hal_ce_get_desc_size(enum hal
- void ath11k_hal_ce_src_set_desc(void *buf, dma_addr_t paddr, u32 len, u32 id,
- 				u8 byte_swap_data)
- {
--	struct hal_ce_srng_src_desc *desc = (struct hal_ce_srng_src_desc *)buf;
-+	struct hal_ce_srng_src_desc *desc = buf;
- 
- 	desc->buffer_addr_low = paddr & HAL_ADDR_LSB_REG_MASK;
- 	desc->buffer_addr_info =
-@@ -586,8 +586,7 @@ void ath11k_hal_ce_src_set_desc(void *bu
- 
- void ath11k_hal_ce_dst_set_desc(void *buf, dma_addr_t paddr)
- {
--	struct hal_ce_srng_dest_desc *desc =
--		(struct hal_ce_srng_dest_desc *)buf;
-+	struct hal_ce_srng_dest_desc *desc = buf;
- 
- 	desc->buffer_addr_low = paddr & HAL_ADDR_LSB_REG_MASK;
- 	desc->buffer_addr_info =
-@@ -597,8 +596,7 @@ void ath11k_hal_ce_dst_set_desc(void *bu
- 
- u32 ath11k_hal_ce_dst_status_get_length(void *buf)
- {
--	struct hal_ce_srng_dst_status_desc *desc =
--		(struct hal_ce_srng_dst_status_desc *)buf;
-+	struct hal_ce_srng_dst_status_desc *desc = buf;
- 	u32 len;
- 
- 	len = FIELD_GET(HAL_CE_DST_STATUS_DESC_FLAGS_LEN, desc->flags);
---- a/drivers/net/wireless/ath/ath11k/hal_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
-@@ -265,7 +265,7 @@ out:
- void ath11k_hal_rx_buf_addr_info_set(void *desc, dma_addr_t paddr,
- 				     u32 cookie, u8 manager)
- {
--	struct ath11k_buffer_addr *binfo = (struct ath11k_buffer_addr *)desc;
-+	struct ath11k_buffer_addr *binfo = desc;
- 	u32 paddr_lo, paddr_hi;
- 
- 	paddr_lo = lower_32_bits(paddr);
-@@ -279,7 +279,7 @@ void ath11k_hal_rx_buf_addr_info_set(voi
- void ath11k_hal_rx_buf_addr_info_get(void *desc, dma_addr_t *paddr,
- 				     u32 *cookie, u8 *rbm)
- {
--	struct ath11k_buffer_addr *binfo = (struct ath11k_buffer_addr *)desc;
-+	struct ath11k_buffer_addr *binfo = desc;
- 
- 	*paddr =
- 		(((u64)FIELD_GET(BUFFER_ADDR_INFO1_ADDR, binfo->info1)) << 32) |
-@@ -292,7 +292,7 @@ void ath11k_hal_rx_msdu_link_info_get(vo
- 				      u32 *msdu_cookies,
- 				      enum hal_rx_buf_return_buf_manager *rbm)
- {
--	struct hal_rx_msdu_link *link = (struct hal_rx_msdu_link *)link_desc;
-+	struct hal_rx_msdu_link *link = link_desc;
- 	struct hal_rx_msdu_details *msdu;
- 	int i;
- 
-@@ -699,7 +699,7 @@ u32 ath11k_hal_reo_qdesc_size(u32 ba_win
- void ath11k_hal_reo_qdesc_setup(void *vaddr, int tid, u32 ba_window_size,
- 				u32 start_seq, enum hal_pn_type type)
- {
--	struct hal_rx_reo_queue *qdesc = (struct hal_rx_reo_queue *)vaddr;
-+	struct hal_rx_reo_queue *qdesc = vaddr;
- 	struct hal_rx_reo_queue_ext *ext_desc;
- 
- 	memset(qdesc, 0, sizeof(*qdesc));
-@@ -809,8 +809,7 @@ static inline void
- ath11k_hal_rx_handle_ofdma_info(void *rx_tlv,
- 				struct hal_rx_user_status *rx_user_status)
- {
--	struct hal_rx_ppdu_end_user_stats *ppdu_end_user =
--		(struct hal_rx_ppdu_end_user_stats *)rx_tlv;
-+	struct hal_rx_ppdu_end_user_stats *ppdu_end_user = rx_tlv;
- 
- 	rx_user_status->ul_ofdma_user_v0_word0 = __le32_to_cpu(ppdu_end_user->info6);
- 
-@@ -821,8 +820,7 @@ static inline void
- ath11k_hal_rx_populate_byte_count(void *rx_tlv, void *ppduinfo,
- 				  struct hal_rx_user_status *rx_user_status)
- {
--	struct hal_rx_ppdu_end_user_stats *ppdu_end_user =
--		(struct hal_rx_ppdu_end_user_stats *)rx_tlv;
-+	struct hal_rx_ppdu_end_user_stats *ppdu_end_user = rx_tlv;
- 
- 	rx_user_status->mpdu_ok_byte_count =
- 		FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_OK_BYTE_COUNT,
-@@ -1540,8 +1538,7 @@ void ath11k_hal_rx_reo_ent_buf_paddr_get
- 					 u32 *sw_cookie, void **pp_buf_addr,
- 					 u8 *rbm, u32 *msdu_cnt)
- {
--	struct hal_reo_entrance_ring *reo_ent_ring =
--		(struct hal_reo_entrance_ring *)rx_desc;
-+	struct hal_reo_entrance_ring *reo_ent_ring = rx_desc;
- 	struct ath11k_buffer_addr *buf_addr_info;
- 	struct rx_mpdu_desc *rx_mpdu_desc_info_details;
- 
---- a/drivers/net/wireless/ath/ath11k/hal_tx.c
-+++ b/drivers/net/wireless/ath/ath11k/hal_tx.c
-@@ -37,7 +37,7 @@ static const u8 dscp_tid_map[DSCP_TID_MA
- void ath11k_hal_tx_cmd_desc_setup(struct ath11k_base *ab, void *cmd,
- 				  struct hal_tx_info *ti)
- {
--	struct hal_tcl_data_cmd *tcl_cmd = (struct hal_tcl_data_cmd *)cmd;
-+	struct hal_tcl_data_cmd *tcl_cmd = cmd;
- 
- 	tcl_cmd->buf_addr_info.info0 =
- 		FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, ti->paddr);
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -6970,8 +6970,8 @@ err:
- 
- static int ath11k_mac_vif_unref(int buf_id, void *skb, void *ctx)
- {
--	struct ieee80211_vif *vif = (struct ieee80211_vif *)ctx;
--	struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB((struct sk_buff *)skb);
-+	struct ieee80211_vif *vif = ctx;
-+	struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
- 
- 	if (skb_cb->vif == vif)
- 		skb_cb->vif = NULL;
---- a/drivers/net/wireless/ath/ath11k/spectral.c
-+++ b/drivers/net/wireless/ath/ath11k/spectral.c
-@@ -592,7 +592,7 @@ int ath11k_spectral_process_fft(struct a
- 		return -EINVAL;
- 	}
- 
--	tlv = (struct spectral_tlv *)data;
-+	tlv = data;
- 	tlv_len = FIELD_GET(SPECTRAL_TLV_HDR_LEN, __le32_to_cpu(tlv->header));
- 	/* convert Dword into bytes */
- 	tlv_len *= ATH11K_SPECTRAL_DWORD_SIZE;
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -2281,7 +2281,7 @@ int ath11k_wmi_send_scan_start_cmd(struc
- 	tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_UINT32) |
- 		      FIELD_PREP(WMI_TLV_LEN, len);
- 	ptr += TLV_HDR_SIZE;
--	tmp_ptr = (u32 *)ptr;
-+	tmp_ptr = ptr;
- 
- 	for (i = 0; i < params->num_chan; ++i)
- 		tmp_ptr[i] = params->chan_list[i];
-@@ -4148,7 +4148,7 @@ static int ath11k_init_cmd_send(struct a
- 	ptr += TLV_HDR_SIZE + len;
- 
- 	if (param->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
--		hw_mode = (struct wmi_pdev_set_hw_mode_cmd_param *)ptr;
-+		hw_mode = ptr;
- 		hw_mode->tlv_header = FIELD_PREP(WMI_TLV_TAG,
- 						 WMI_TAG_PDEV_SET_HW_MODE_CMD) |
- 				      FIELD_PREP(WMI_TLV_LEN,
-@@ -4168,7 +4168,7 @@ static int ath11k_init_cmd_send(struct a
- 		len = sizeof(*band_to_mac);
- 
- 		for (idx = 0; idx < param->num_band_to_mac; idx++) {
--			band_to_mac = (void *)ptr;
-+			band_to_mac = ptr;
- 
- 			band_to_mac->tlv_header = FIELD_PREP(WMI_TLV_TAG,
- 							     WMI_TAG_PDEV_BAND_TO_MAC) |
diff --git a/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-fix-ath11k_mac_op_remain_on_channel-stac.patch b/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-fix-ath11k_mac_op_remain_on_channel-stac.patch
deleted file mode 100644
index 2c7f196f8e..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0023-wifi-ath11k-fix-ath11k_mac_op_remain_on_channel-stac.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 4fd15bb705d3faa7e6adab2daba2e3af80d9b6bd Mon Sep 17 00:00:00 2001
-From: Dmitry Antipov <dmantipov@yandex.ru>
-Date: Tue, 26 Sep 2023 07:29:04 +0300
-Subject: [PATCH] wifi: ath11k: fix ath11k_mac_op_remain_on_channel() stack
- usage
-
-When compiling with clang 16.0.6, I've noticed the following:
-
-drivers/net/wireless/ath/ath11k/mac.c:8903:12: warning: stack frame
-size (1032) exceeds limit (1024) in 'ath11k_mac_op_remain_on_channel'
-[-Wframe-larger-than]
-static int ath11k_mac_op_remain_on_channel(struct ieee80211_hw *hw,
-           ^
-68/1032 (6.59%) spills, 964/1032 (93.41%) variables
-
-So switch to kzalloc()'ed instance of 'struct scan_req_params' like
-it's done in 'ath11k_mac_op_hw_scan()'. Compile tested only.
-
-Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230926042906.13725-1-dmantipov@yandex.ru
----
- drivers/net/wireless/ath/ath11k/mac.c | 44 +++++++++++++++------------
- 1 file changed, 25 insertions(+), 19 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -8908,7 +8908,7 @@ static int ath11k_mac_op_remain_on_chann
- {
- 	struct ath11k *ar = hw->priv;
- 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
--	struct scan_req_params arg;
-+	struct scan_req_params *arg;
- 	int ret;
- 	u32 scan_time_msec;
- 
-@@ -8940,27 +8940,31 @@ static int ath11k_mac_op_remain_on_chann
- 
- 	scan_time_msec = ar->hw->wiphy->max_remain_on_channel_duration * 2;
- 
--	memset(&arg, 0, sizeof(arg));
--	ath11k_wmi_start_scan_init(ar, &arg);
--	arg.num_chan = 1;
--	arg.chan_list = kcalloc(arg.num_chan, sizeof(*arg.chan_list),
--				GFP_KERNEL);
--	if (!arg.chan_list) {
-+	arg = kzalloc(sizeof(*arg), GFP_KERNEL);
-+	if (!arg) {
- 		ret = -ENOMEM;
- 		goto exit;
- 	}
-+	ath11k_wmi_start_scan_init(ar, arg);
-+	arg->num_chan = 1;
-+	arg->chan_list = kcalloc(arg->num_chan, sizeof(*arg->chan_list),
-+				 GFP_KERNEL);
-+	if (!arg->chan_list) {
-+		ret = -ENOMEM;
-+		goto free_arg;
-+	}
- 
--	arg.vdev_id = arvif->vdev_id;
--	arg.scan_id = ATH11K_SCAN_ID;
--	arg.chan_list[0] = chan->center_freq;
--	arg.dwell_time_active = scan_time_msec;
--	arg.dwell_time_passive = scan_time_msec;
--	arg.max_scan_time = scan_time_msec;
--	arg.scan_flags |= WMI_SCAN_FLAG_PASSIVE;
--	arg.scan_flags |= WMI_SCAN_FILTER_PROBE_REQ;
--	arg.burst_duration = duration;
-+	arg->vdev_id = arvif->vdev_id;
-+	arg->scan_id = ATH11K_SCAN_ID;
-+	arg->chan_list[0] = chan->center_freq;
-+	arg->dwell_time_active = scan_time_msec;
-+	arg->dwell_time_passive = scan_time_msec;
-+	arg->max_scan_time = scan_time_msec;
-+	arg->scan_flags |= WMI_SCAN_FLAG_PASSIVE;
-+	arg->scan_flags |= WMI_SCAN_FILTER_PROBE_REQ;
-+	arg->burst_duration = duration;
- 
--	ret = ath11k_start_scan(ar, &arg);
-+	ret = ath11k_start_scan(ar, arg);
- 	if (ret) {
- 		ath11k_warn(ar->ab, "failed to start roc scan: %d\n", ret);
- 
-@@ -8986,7 +8990,9 @@ static int ath11k_mac_op_remain_on_chann
- 	ret = 0;
- 
- free_chan_list:
--	kfree(arg.chan_list);
-+	kfree(arg->chan_list);
-+free_arg:
-+	kfree(arg);
- exit:
- 	mutex_unlock(&ar->conf_mutex);
- 	return ret;
diff --git a/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-mac-fix-struct-ieee80211_sband_iftype_da.patch b/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-mac-fix-struct-ieee80211_sband_iftype_da.patch
deleted file mode 100644
index 90da6a8c44..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0024-wifi-ath11k-mac-fix-struct-ieee80211_sband_iftype_da.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 9e61589ac3c2d23c528d3ffd44604d98553ea1cb Mon Sep 17 00:00:00 2001
-From: Kalle Valo <quic_kvalo@quicinc.com>
-Date: Wed, 27 Sep 2023 17:27:08 +0300
-Subject: [PATCH] wifi: ath11k: mac: fix struct ieee80211_sband_iftype_data
- handling
-
-Commit e8c1841278a7 ("wifi: cfg80211: annotate iftype_data pointer with
-sparse") added sparse checks for struct ieee80211_sband_iftype_data handling
-which immediately found an issue in ath11k:
-
-drivers/net/wireless/ath/ath11k/mac.c:7952:22: warning: incorrect type in argument 1 (different address spaces)
-drivers/net/wireless/ath/ath11k/mac.c:7952:22:    expected struct ieee80211_sta_he_cap const *he_cap
-drivers/net/wireless/ath/ath11k/mac.c:7952:22:    got struct ieee80211_sta_he_cap const [noderef] __iftype_data *
-
-The problem here is that we are accessing sband->iftype_data directly even
-though we should use for_each_sband_iftype_data() or similar. Fortunately
-there's ieee80211_get_he_iftype_cap_vif() which is just what we need here so
-use it to get HE capabilities.
-
-Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23
-
-Reported-by: Johannes Berg <johannes@sipsolutions.net>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230927142708.2897504-2-kvalo@kernel.org
----
- drivers/net/wireless/ath/ath11k/mac.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -7913,12 +7913,14 @@ ath11k_mac_get_tx_mcs_map(const struct i
- 
- static bool
- ath11k_mac_bitrate_mask_get_single_nss(struct ath11k *ar,
-+				       struct ath11k_vif *arvif,
- 				       enum nl80211_band band,
- 				       const struct cfg80211_bitrate_mask *mask,
- 				       int *nss)
- {
- 	struct ieee80211_supported_band *sband = &ar->mac.sbands[band];
- 	u16 vht_mcs_map = le16_to_cpu(sband->vht_cap.vht_mcs.tx_mcs_map);
-+	const struct ieee80211_sta_he_cap *he_cap;
- 	u16 he_mcs_map = 0;
- 	u8 ht_nss_mask = 0;
- 	u8 vht_nss_mask = 0;
-@@ -7949,7 +7951,11 @@ ath11k_mac_bitrate_mask_get_single_nss(s
- 			return false;
- 	}
- 
--	he_mcs_map = le16_to_cpu(ath11k_mac_get_tx_mcs_map(&sband->iftype_data->he_cap));
-+	he_cap = ieee80211_get_he_iftype_cap_vif(sband, arvif->vif);
-+	if (!he_cap)
-+		return false;
-+
-+	he_mcs_map = le16_to_cpu(ath11k_mac_get_tx_mcs_map(he_cap));
- 
- 	for (i = 0; i < ARRAY_SIZE(mask->control[band].he_mcs); i++) {
- 		if (mask->control[band].he_mcs[i] == 0)
-@@ -8365,7 +8371,7 @@ ath11k_mac_op_set_bitrate_mask(struct ie
- 		ieee80211_iterate_stations_atomic(ar->hw,
- 						  ath11k_mac_disable_peer_fixed_rate,
- 						  arvif);
--	} else if (ath11k_mac_bitrate_mask_get_single_nss(ar, band, mask,
-+	} else if (ath11k_mac_bitrate_mask_get_single_nss(ar, arvif, band, mask,
- 							  &single_nss)) {
- 		rate = WMI_FIXED_RATE_NONE;
- 		nss = single_nss;
diff --git a/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-fix-CAC-running-state-during-virtual-int.patch b/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-fix-CAC-running-state-during-virtual-int.patch
deleted file mode 100644
index eee0bf0fb5..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0025-wifi-ath11k-fix-CAC-running-state-during-virtual-int.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 69fcb525905600a151997cd16367bb92c34a2b14 Mon Sep 17 00:00:00 2001
-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Date: Tue, 3 Oct 2023 17:26:54 +0300
-Subject: [PATCH] wifi: ath11k: fix CAC running state during virtual interface
- start
-
-Currently channel definition's primary channel's DFS CAC time
-as well as primary channel's state i.e usable are used to set
-the CAC_RUNNING flag for the ath11k radio structure. However,
-this is wrong since certain channel definition are possbile
-where primary channel may not be a DFS channel but, secondary
-channel is a DFS channel. For example - channel 36 with 160 MHz
-bandwidth.
-In such cases, the flag will not be set which is wrong.
-
-Fix this issue by using cfg80211_chandef_dfs_usable() function
-from cfg80211 which return trues if at least one channel is in
-usable state.
-
-While at it, modify the CAC running debug log message to print
-the CAC time as well in milli-seconds.
-
-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230912051857.2284-3-quic_adisi@quicinc.com
----
- drivers/net/wireless/ath/ath11k/mac.c | 19 +++++++++++--------
- 1 file changed, 11 insertions(+), 8 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -5,6 +5,7 @@
-  */
- 
- #include <net/mac80211.h>
-+#include <net/cfg80211.h>
- #include <linux/etherdevice.h>
- #include <linux/bitfield.h>
- #include <linux/inetdevice.h>
-@@ -7196,6 +7197,7 @@ ath11k_mac_vdev_start_restart(struct ath
- 	struct wmi_vdev_start_req_arg arg = {};
- 	const struct cfg80211_chan_def *chandef = &ctx->def;
- 	int ret = 0;
-+	unsigned int dfs_cac_time;
- 
- 	lockdep_assert_held(&ar->conf_mutex);
- 
-@@ -7275,20 +7277,21 @@ ath11k_mac_vdev_start_restart(struct ath
- 	ath11k_dbg(ab, ATH11K_DBG_MAC,  "vdev %pM started, vdev_id %d\n",
- 		   arvif->vif->addr, arvif->vdev_id);
- 
--	/* Enable CAC Flag in the driver by checking the channel DFS cac time,
--	 * i.e dfs_cac_ms value which will be valid only for radar channels
--	 * and state as NL80211_DFS_USABLE which indicates CAC needs to be
-+	/* Enable CAC Flag in the driver by checking the all sub-channel's DFS
-+	 * state as NL80211_DFS_USABLE which indicates CAC needs to be
- 	 * done before channel usage. This flags is used to drop rx packets.
- 	 * during CAC.
- 	 */
- 	/* TODO Set the flag for other interface types as required */
--	if (arvif->vdev_type == WMI_VDEV_TYPE_AP &&
--	    chandef->chan->dfs_cac_ms &&
--	    chandef->chan->dfs_state == NL80211_DFS_USABLE) {
-+	if (arvif->vdev_type == WMI_VDEV_TYPE_AP && ctx->radar_enabled &&
-+	    cfg80211_chandef_dfs_usable(ar->hw->wiphy, chandef)) {
- 		set_bit(ATH11K_CAC_RUNNING, &ar->dev_flags);
-+		dfs_cac_time = cfg80211_chandef_dfs_cac_time(ar->hw->wiphy,
-+							     chandef);
- 		ath11k_dbg(ab, ATH11K_DBG_MAC,
--			   "CAC Started in chan_freq %d for vdev %d\n",
--			   arg.channel.freq, arg.vdev_id);
-+			   "cac started dfs_cac_time %u center_freq %d center_freq1 %d for vdev %d\n",
-+			   dfs_cac_time, arg.channel.freq, chandef->center_freq1,
-+			   arg.vdev_id);
- 	}
- 
- 	ret = ath11k_mac_set_txbf_conf(arvif);
diff --git a/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-fix-Tx-power-value-during-active-CAC.patch b/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-fix-Tx-power-value-during-active-CAC.patch
deleted file mode 100644
index c3aa8a49af..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0026-wifi-ath11k-fix-Tx-power-value-during-active-CAC.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 77f1ee6fd8b6e470f721d05a2e269039d5cafcb7 Mon Sep 17 00:00:00 2001
-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Date: Tue, 3 Oct 2023 17:26:54 +0300
-Subject: [PATCH] wifi: ath11k: fix Tx power value during active CAC
-
-Tx power is fetched from firmware's pdev stats. However, during active
-CAC, firmware does not fill the current Tx power and sends the max
-initialised value filled during firmware init. If host sends this power
-to user space, this is wrong since in certain situations, the Tx power
-could be greater than the max allowed by the regulatory. Hence, host
-should not be fetching the Tx power during an active CAC.
-
-Fix this issue by returning -EAGAIN error so that user space knows that there's
-no valid value available.
-
-Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
-
-Fixes: 9a2aa68afe3d ("wifi: ath11k: add get_txpower mac ops")
-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20230912051857.2284-4-quic_adisi@quicinc.com
----
- drivers/net/wireless/ath/ath11k/mac.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -9068,6 +9068,14 @@ static int ath11k_mac_op_get_txpower(str
- 		return -EAGAIN;
- 	}
- 
-+	/* Firmware doesn't provide Tx power during CAC hence no need to fetch
-+	 * the stats.
-+	 */
-+	if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
-+		mutex_unlock(&ar->conf_mutex);
-+		return -EAGAIN;
-+	}
-+
- 	req_param.pdev_id = ar->pdev->pdev_id;
- 	req_param.stats_id = WMI_REQUEST_PDEV_STAT;
- 
diff --git a/package/kernel/mac80211/patches/ath11k/0027-wifi-ath11k-call-ath11k_mac_fils_discovery-without-c.patch b/package/kernel/mac80211/patches/ath11k/0027-wifi-ath11k-call-ath11k_mac_fils_discovery-without-c.patch
deleted file mode 100644
index d233492513..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0027-wifi-ath11k-call-ath11k_mac_fils_discovery-without-c.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From e149353e6562f3e3246f75dfc4cca6a0cc5b4efc Mon Sep 17 00:00:00 2001
-From: Aloka Dixit <quic_alokad@quicinc.com>
-Date: Mon, 9 Oct 2023 10:13:54 +0300
-Subject: [PATCH] wifi: ath11k: call ath11k_mac_fils_discovery() without
- condition
-
-Mac80211 does not set flags BSS_CHANGED_FILS_DISCOVERY and
-BSS_CHANGED_UNSOL_BCAST_PROBE_RESP if there are no updates to
-FILS discovery and unsolicited broadcast probe response transmission
-configurations respectively. This results in the transmissions getting
-stopped during BSS change operations which do not include these
-attributes. Remove the checks for the flags and always send the existing
-configuration to firmware.
-
-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
-
-Signed-off-by: Aloka Dixit <quic_alokad@quicinc.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20231004044915.6817-1-quic_alokad@quicinc.com
----
- drivers/net/wireless/ath/ath11k/mac.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -3732,9 +3732,7 @@ static void ath11k_mac_op_bss_info_chang
- 				    arvif->vdev_id, ret);
- 	}
- 
--	if (changed & BSS_CHANGED_FILS_DISCOVERY ||
--	    changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP)
--		ath11k_mac_fils_discovery(arvif, info);
-+	ath11k_mac_fils_discovery(arvif, info);
- 
- 	if (changed & BSS_CHANGED_ARP_FILTER) {
- 		ipv4_cnt = min(vif->cfg.arp_addr_cnt, ATH11K_IPV4_MAX_COUNT);
diff --git a/package/kernel/mac80211/patches/ath11k/0028-wifi-ath11k-ath11k_debugfs_register-fix-format-trunc.patch b/package/kernel/mac80211/patches/ath11k/0028-wifi-ath11k-ath11k_debugfs_register-fix-format-trunc.patch
deleted file mode 100644
index df8a4283fa..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0028-wifi-ath11k-ath11k_debugfs_register-fix-format-trunc.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From a47111663491ff2829df0626493ce81b48dd880a Mon Sep 17 00:00:00 2001
-From: Kalle Valo <quic_kvalo@quicinc.com>
-Date: Tue, 10 Oct 2023 09:22:50 +0300
-Subject: [PATCH] wifi: ath11k: ath11k_debugfs_register(): fix
- format-truncation warning
-
-In v6.6-rc4 with GCC 13.2 I see a new warning:
-
-drivers/net/wireless/ath/ath11k/debugfs.c: In function 'ath11k_debugfs_register':
-drivers/net/wireless/ath/ath11k/debugfs.c:1597:51: error: '%d' directive output may be truncated writing between 1 and 3 bytes into a region of size 2 [-Werror=format-truncation=]
-drivers/net/wireless/ath/ath11k/debugfs.c:1597:48: note: directive argument in the range [0, 255]
-drivers/net/wireless/ath/ath11k/debugfs.c:1597:9: note: 'snprintf' output between 5 and 7 bytes into a destination of size 5
-
-Increase the size of pdev_name to 10 bytes to make sure there's enough room for
-the string. Also change the format to '%u' as ar->pdev_idx is u8.
-
-Compile tested only.
-
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20231010062250.2580951-1-kvalo@kernel.org
----
- drivers/net/wireless/ath/ath11k/debugfs.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/debugfs.c
-+++ b/drivers/net/wireless/ath/ath11k/debugfs.c
-@@ -1591,10 +1591,10 @@ static const struct file_operations fops
- int ath11k_debugfs_register(struct ath11k *ar)
- {
- 	struct ath11k_base *ab = ar->ab;
--	char pdev_name[5];
-+	char pdev_name[10];
- 	char buf[100] = {0};
- 
--	snprintf(pdev_name, sizeof(pdev_name), "%s%d", "mac", ar->pdev_idx);
-+	snprintf(pdev_name, sizeof(pdev_name), "%s%u", "mac", ar->pdev_idx);
- 
- 	ar->debug.debugfs_pdev = debugfs_create_dir(pdev_name, ab->debugfs_soc);
- 	if (IS_ERR(ar->debug.debugfs_pdev))
diff --git a/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-add-parsing-of-phy-bitmap-for-reg-rules.patch b/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-add-parsing-of-phy-bitmap-for-reg-rules.patch
deleted file mode 100644
index 10d517a27a..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0029-wifi-ath11k-add-parsing-of-phy-bitmap-for-reg-rules.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 534c2dd8099a9cc4bad8ea8b3c7fa1f730e10d5d Mon Sep 17 00:00:00 2001
-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Date: Tue, 10 Oct 2023 10:27:19 +0300
-Subject: [PATCH] wifi: ath11k: add parsing of phy bitmap for reg rules
-
-Certain regulatory domains could put restrictions on phy mode operation.
-For example, in a few countries HE Operation is not allowed. For such
-countries, firmware indicates this via phy bitmap in each reg rule.
-
-Currently, there is no logic to parse this info and then pass it on to the
-cfg80211/regulatory.
-
-Add parsing of this phy bitmap from the regulatory channel change event and
-then accordingly map it to cfg80211/regulatory flags and pass it on to it.
-
-While at it, correct typo in debug print s/dsf/dfs.
-
-Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20231004092655.25020-1-quic_adisi@quicinc.com
----
- drivers/net/wireless/ath/ath11k/reg.c | 11 +++++++++++
- drivers/net/wireless/ath/ath11k/reg.h |  3 +++
- drivers/net/wireless/ath/ath11k/wmi.c |  5 +++--
- 3 files changed, 17 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/reg.c
-+++ b/drivers/net/wireless/ath/ath11k/reg.c
-@@ -352,6 +352,16 @@ static u32 ath11k_map_fw_reg_flags(u16 r
- 	return flags;
- }
- 
-+static u32 ath11k_map_fw_phy_flags(u32 phy_flags)
-+{
-+	u32 flags = 0;
-+
-+	if (phy_flags & ATH11K_REG_PHY_BITMAP_NO11AX)
-+		flags |= NL80211_RRF_NO_HE;
-+
-+	return flags;
-+}
-+
- static bool
- ath11k_reg_can_intersect(struct ieee80211_reg_rule *rule1,
- 			 struct ieee80211_reg_rule *rule2)
-@@ -685,6 +695,7 @@ ath11k_reg_build_regd(struct ath11k_base
- 		}
- 
- 		flags |= ath11k_map_fw_reg_flags(reg_rule->flags);
-+		flags |= ath11k_map_fw_phy_flags(reg_info->phybitmap);
- 
- 		ath11k_reg_update_rule(tmp_regd->reg_rules + i,
- 				       reg_rule->start_freq,
---- a/drivers/net/wireless/ath/ath11k/reg.h
-+++ b/drivers/net/wireless/ath/ath11k/reg.h
-@@ -24,6 +24,9 @@ enum ath11k_dfs_region {
- 	ATH11K_DFS_REG_UNDEF,
- };
- 
-+/* Phy bitmaps */
-+#define ATH11K_REG_PHY_BITMAP_NO11AX	BIT(5)
-+
- /* ATH11K Regulatory API's */
- void ath11k_reg_init(struct ath11k *ar);
- void ath11k_reg_free(struct ath11k_base *ab);
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -5440,10 +5440,11 @@ static int ath11k_pull_reg_chan_list_ext
- 	}
- 
- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
--		   "cc_ext %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
-+		   "cc_ext %s dfs %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d phy_bitmap 0x%x",
- 		   reg_info->alpha2, reg_info->dfs_region,
- 		   reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
--		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
-+		   reg_info->min_bw_5ghz, reg_info->max_bw_5ghz,
-+		   reg_info->phybitmap);
- 
- 	ath11k_dbg(ab, ATH11K_DBG_WMI,
- 		   "num_2ghz_reg_rules %d num_5ghz_reg_rules %d",
diff --git a/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-Remove-unused-struct-ath11k_htc_frame.patch b/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-Remove-unused-struct-ath11k_htc_frame.patch
deleted file mode 100644
index df4235388a..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0030-wifi-ath11k-Remove-unused-struct-ath11k_htc_frame.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 480d230bef0ecd06e72ae3a84117142e38e77503 Mon Sep 17 00:00:00 2001
-From: Jeff Johnson <quic_jjohnson@quicinc.com>
-Date: Mon, 9 Oct 2023 09:36:54 -0700
-Subject: [PATCH] wifi: ath11k: Remove unused struct ath11k_htc_frame
-
-struct ath11k_htc_frame is unused, and since it illogically contains
-two consecutive flexible arrays, it could never be used, so remove it.
-
-No functional changes, compile tested only.
-
-Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20231009-ath11k_htc_frame-v1-1-81d405b7a195@quicinc.com
----
- drivers/net/wireless/ath/ath11k/htc.h | 12 ------------
- 1 file changed, 12 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/htc.h
-+++ b/drivers/net/wireless/ath/ath11k/htc.h
-@@ -156,18 +156,6 @@ struct ath11k_htc_record {
- 	};
- } __packed __aligned(4);
- 
--/* note: the trailer offset is dynamic depending
-- * on payload length. this is only a struct layout draft
-- */
--struct ath11k_htc_frame {
--	struct ath11k_htc_hdr hdr;
--	union {
--		struct ath11k_htc_msg msg;
--		u8 payload[0];
--	};
--	struct ath11k_htc_record trailer[0];
--} __packed __aligned(4);
--
- enum ath11k_htc_svc_gid {
- 	ATH11K_HTC_SVC_GRP_RSVD = 0,
- 	ATH11K_HTC_SVC_GRP_WMI = 1,
diff --git a/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-Introduce-and-use-ath11k_sta_to_arsta.patch b/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-Introduce-and-use-ath11k_sta_to_arsta.patch
deleted file mode 100644
index 1a6a701eec..0000000000
--- a/package/kernel/mac80211/patches/ath11k/0031-wifi-ath11k-Introduce-and-use-ath11k_sta_to_arsta.patch
+++ /dev/null
@@ -1,384 +0,0 @@
-From 10c65f97b424fcee439463f933140df2a0022f98 Mon Sep 17 00:00:00 2001
-From: Jeff Johnson <quic_jjohnson@quicinc.com>
-Date: Mon, 9 Oct 2023 09:39:42 -0700
-Subject: [PATCH] wifi: ath11k: Introduce and use ath11k_sta_to_arsta()
-
-Currently, the logic to return an ath11k_sta pointer, given a
-ieee80211_sta pointer, uses typecasting throughout the driver. In
-general, conversion functions are preferable to typecasting since
-using a conversion function allows the compiler to validate the types
-of both the input and output parameters.
-
-ath11k already defines a conversion function ath11k_vif_to_arvif() for
-a similar conversion. So introduce ath11k_sta_to_arsta() for this use
-case, and convert all of the existing typecasting to use this
-function.
-
-No functional changes, compile tested only.
-
-Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
-Link: https://lore.kernel.org/r/20231009-ath11k_sta_to_arsta-v1-1-1563e3a307e8@quicinc.com
----
- drivers/net/wireless/ath/ath11k/core.h        |  5 ++++
- drivers/net/wireless/ath/ath11k/debugfs.c     |  4 +--
- drivers/net/wireless/ath/ath11k/debugfs_sta.c | 30 +++++++++----------
- drivers/net/wireless/ath/ath11k/dp_rx.c       |  8 ++---
- drivers/net/wireless/ath/ath11k/dp_tx.c       |  4 +--
- drivers/net/wireless/ath/ath11k/mac.c         | 18 +++++------
- drivers/net/wireless/ath/ath11k/peer.c        |  2 +-
- drivers/net/wireless/ath/ath11k/wmi.c         |  6 ++--
- 8 files changed, 41 insertions(+), 36 deletions(-)
-
---- a/drivers/net/wireless/ath/ath11k/core.h
-+++ b/drivers/net/wireless/ath/ath11k/core.h
-@@ -1223,6 +1223,11 @@ static inline struct ath11k_vif *ath11k_
- 	return (struct ath11k_vif *)vif->drv_priv;
- }
- 
-+static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
-+{
-+	return (struct ath11k_sta *)sta->drv_priv;
-+}
-+
- static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
- 					     int mac_id)
- {
---- a/drivers/net/wireless/ath/ath11k/debugfs.c
-+++ b/drivers/net/wireless/ath/ath11k/debugfs.c
-@@ -1459,7 +1459,7 @@ static void ath11k_reset_peer_ps_duratio
- 					  struct ieee80211_sta *sta)
- {
- 	struct ath11k *ar = data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 
- 	spin_lock_bh(&ar->data_lock);
- 	arsta->ps_total_duration = 0;
-@@ -1510,7 +1510,7 @@ static void ath11k_peer_ps_state_disable
- 					 struct ieee80211_sta *sta)
- {
- 	struct ath11k *ar = data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 
- 	spin_lock_bh(&ar->data_lock);
- 	arsta->peer_ps_state = WMI_PEER_PS_STATE_DISABLED;
---- a/drivers/net/wireless/ath/ath11k/debugfs_sta.c
-+++ b/drivers/net/wireless/ath/ath11k/debugfs_sta.c
-@@ -136,7 +136,7 @@ static ssize_t ath11k_dbg_sta_dump_tx_st
- 					    size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	struct ath11k_htt_data_stats *stats;
- 	static const char *str_name[ATH11K_STATS_TYPE_MAX] = {"succ", "fail",
-@@ -243,7 +243,7 @@ static ssize_t ath11k_dbg_sta_dump_rx_st
- 					    size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	struct ath11k_rx_peer_stats *rx_stats = arsta->rx_stats;
- 	int len = 0, i, retval = 0;
-@@ -340,7 +340,7 @@ static int
- ath11k_dbg_sta_open_htt_peer_stats(struct inode *inode, struct file *file)
- {
- 	struct ieee80211_sta *sta = inode->i_private;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	struct debug_htt_stats_req *stats_req;
- 	int type = ar->debug.htt_stats.type;
-@@ -376,7 +376,7 @@ static int
- ath11k_dbg_sta_release_htt_peer_stats(struct inode *inode, struct file *file)
- {
- 	struct ieee80211_sta *sta = inode->i_private;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 
- 	mutex_lock(&ar->conf_mutex);
-@@ -413,7 +413,7 @@ static ssize_t ath11k_dbg_sta_write_peer
- 						size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	int ret, enable;
- 
-@@ -453,7 +453,7 @@ static ssize_t ath11k_dbg_sta_read_peer_
- 					       size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	char buf[32] = {0};
- 	int len;
-@@ -480,7 +480,7 @@ static ssize_t ath11k_dbg_sta_write_delb
- 					  size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	u32 tid, initiator, reason;
- 	int ret;
-@@ -531,7 +531,7 @@ static ssize_t ath11k_dbg_sta_write_addb
- 					       size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	u32 tid, status;
- 	int ret;
-@@ -581,7 +581,7 @@ static ssize_t ath11k_dbg_sta_write_addb
- 					  size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	u32 tid, buf_size;
- 	int ret;
-@@ -632,7 +632,7 @@ static ssize_t ath11k_dbg_sta_read_aggr_
- 					     size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	char buf[64];
- 	int len = 0;
-@@ -652,7 +652,7 @@ static ssize_t ath11k_dbg_sta_write_aggr
- 					      size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	u32 aggr_mode;
- 	int ret;
-@@ -697,7 +697,7 @@ ath11k_write_htt_peer_stats_reset(struct
- 				  size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	struct htt_ext_stats_cfg_params cfg_params = { 0 };
- 	int ret;
-@@ -756,7 +756,7 @@ static ssize_t ath11k_dbg_sta_read_peer_
- 						 size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	char buf[20];
- 	int len;
-@@ -783,7 +783,7 @@ static ssize_t ath11k_dbg_sta_read_curre
- 						       loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	u64 time_since_station_in_power_save;
- 	char buf[20];
-@@ -817,7 +817,7 @@ static ssize_t ath11k_dbg_sta_read_total
- 						     size_t count, loff_t *ppos)
- {
- 	struct ieee80211_sta *sta = file->private_data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	char buf[20];
- 	u64 power_save_duration;
---- a/drivers/net/wireless/ath/ath11k/dp_rx.c
-+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
-@@ -1099,7 +1099,7 @@ int ath11k_dp_rx_ampdu_start(struct ath1
- 			     struct ieee80211_ampdu_params *params)
- {
- 	struct ath11k_base *ab = ar->ab;
--	struct ath11k_sta *arsta = (void *)params->sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(params->sta);
- 	int vdev_id = arsta->arvif->vdev_id;
- 	int ret;
- 
-@@ -1117,7 +1117,7 @@ int ath11k_dp_rx_ampdu_stop(struct ath11
- {
- 	struct ath11k_base *ab = ar->ab;
- 	struct ath11k_peer *peer;
--	struct ath11k_sta *arsta = (void *)params->sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(params->sta);
- 	int vdev_id = arsta->arvif->vdev_id;
- 	dma_addr_t paddr;
- 	bool active;
-@@ -1456,7 +1456,7 @@ ath11k_update_per_peer_tx_stats(struct a
- 	}
- 
- 	sta = peer->sta;
--	arsta = (struct ath11k_sta *)sta->drv_priv;
-+	arsta = ath11k_sta_to_arsta(sta);
- 
- 	memset(&arsta->txrate, 0, sizeof(arsta->txrate));
- 
-@@ -5248,7 +5248,7 @@ int ath11k_dp_rx_process_mon_status(stru
- 			goto next_skb;
- 		}
- 
--		arsta = (struct ath11k_sta *)peer->sta->drv_priv;
-+		arsta = ath11k_sta_to_arsta(peer->sta);
- 		ath11k_dp_rx_update_peer_stats(arsta, ppdu_info);
- 
- 		if (ath11k_debugfs_is_pktlog_peer_valid(ar, peer->addr))
---- a/drivers/net/wireless/ath/ath11k/dp_tx.c
-+++ b/drivers/net/wireless/ath/ath11k/dp_tx.c
-@@ -467,7 +467,7 @@ void ath11k_dp_tx_update_txcompl(struct
- 	}
- 
- 	sta = peer->sta;
--	arsta = (struct ath11k_sta *)sta->drv_priv;
-+	arsta = ath11k_sta_to_arsta(sta);
- 
- 	memset(&arsta->txrate, 0, sizeof(arsta->txrate));
- 	pkt_type = FIELD_GET(HAL_TX_RATE_STATS_INFO0_PKT_TYPE,
-@@ -627,7 +627,7 @@ static void ath11k_dp_tx_complete_msdu(s
- 		ieee80211_free_txskb(ar->hw, msdu);
- 		return;
- 	}
--	arsta = (struct ath11k_sta *)peer->sta->drv_priv;
-+	arsta = ath11k_sta_to_arsta(peer->sta);
- 	status.sta = peer->sta;
- 	status.skb = msdu;
- 	status.info = info;
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -2832,7 +2832,7 @@ static void ath11k_peer_assoc_prepare(st
- 
- 	lockdep_assert_held(&ar->conf_mutex);
- 
--	arsta = (struct ath11k_sta *)sta->drv_priv;
-+	arsta = ath11k_sta_to_arsta(sta);
- 
- 	memset(arg, 0, sizeof(*arg));
- 
-@@ -4313,7 +4313,7 @@ static int ath11k_mac_op_set_key(struct
- 		ath11k_warn(ab, "peer %pM disappeared!\n", peer_addr);
- 
- 	if (sta) {
--		arsta = (struct ath11k_sta *)sta->drv_priv;
-+		arsta = ath11k_sta_to_arsta(sta);
- 
- 		switch (key->cipher) {
- 		case WLAN_CIPHER_SUITE_TKIP:
-@@ -4904,7 +4904,7 @@ static int ath11k_mac_station_add(struct
- {
- 	struct ath11k_base *ab = ar->ab;
- 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct peer_create_params peer_param;
- 	int ret;
- 
-@@ -5028,7 +5028,7 @@ static int ath11k_mac_op_sta_state(struc
- {
- 	struct ath11k *ar = hw->priv;
- 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k_peer *peer;
- 	int ret = 0;
- 
-@@ -5194,7 +5194,7 @@ static void ath11k_mac_op_sta_set_4addr(
- 					struct ieee80211_sta *sta, bool enabled)
- {
- 	struct ath11k *ar = hw->priv;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 
- 	if (enabled && !arsta->use_4addr_set) {
- 		ieee80211_queue_work(ar->hw, &arsta->set_4addr_wk);
-@@ -5208,7 +5208,7 @@ static void ath11k_mac_op_sta_rc_update(
- 					u32 changed)
- {
- 	struct ath11k *ar = hw->priv;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
- 	struct ath11k_peer *peer;
- 	u32 bw, smps;
-@@ -6201,7 +6201,7 @@ static void ath11k_mac_op_tx(struct ieee
- 	}
- 
- 	if (control->sta)
--		arsta = (struct ath11k_sta *)control->sta->drv_priv;
-+		arsta = ath11k_sta_to_arsta(control->sta);
- 
- 	ret = ath11k_dp_tx(ar, arvif, arsta, skb);
- 	if (unlikely(ret)) {
-@@ -8233,7 +8233,7 @@ static void ath11k_mac_set_bitrate_mask_
- 					     struct ieee80211_sta *sta)
- {
- 	struct ath11k_vif *arvif = data;
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arvif->ar;
- 
- 	spin_lock_bh(&ar->data_lock);
-@@ -8637,7 +8637,7 @@ static void ath11k_mac_op_sta_statistics
- 					 struct ieee80211_sta *sta,
- 					 struct station_info *sinfo)
- {
--	struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
-+	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
- 	struct ath11k *ar = arsta->arvif->ar;
- 	s8 signal;
- 	bool db2dbm = test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
---- a/drivers/net/wireless/ath/ath11k/peer.c
-+++ b/drivers/net/wireless/ath/ath11k/peer.c
-@@ -446,7 +446,7 @@ int ath11k_peer_create(struct ath11k *ar
- 	peer->sec_type_grp = HAL_ENCRYPT_TYPE_OPEN;
- 
- 	if (sta) {
--		arsta = (struct ath11k_sta *)sta->drv_priv;
-+		arsta = ath11k_sta_to_arsta(sta);
- 		arsta->tcl_metadata |= FIELD_PREP(HTT_TCL_META_DATA_TYPE, 0) |
- 				       FIELD_PREP(HTT_TCL_META_DATA_PEER_ID,
- 						  peer->peer_id);
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -6453,7 +6453,7 @@ static int ath11k_wmi_tlv_rssi_chain_par
- 		goto exit;
- 	}
- 
--	arsta = (struct ath11k_sta *)sta->drv_priv;
-+	arsta = ath11k_sta_to_arsta(sta);
- 
- 	BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) >
- 		     ARRAY_SIZE(stats_rssi->rssi_avg_beacon));
-@@ -6541,7 +6541,7 @@ static int ath11k_wmi_tlv_fw_stats_data_
- 							   arvif->bssid,
- 							   NULL);
- 			if (sta) {
--				arsta = (struct ath11k_sta *)sta->drv_priv;
-+				arsta = ath11k_sta_to_arsta(sta);
- 				arsta->rssi_beacon = src->beacon_snr;
- 				ath11k_dbg(ab, ATH11K_DBG_WMI,
- 					   "stats vdev id %d snr %d\n",
-@@ -7468,7 +7468,7 @@ static void ath11k_wmi_event_peer_sta_ps
- 		goto exit;
- 	}
- 
--	arsta = (struct ath11k_sta *)sta->drv_priv;
-+	arsta = ath11k_sta_to_arsta(sta);
- 
- 	spin_lock_bh(&ar->data_lock);
- 
diff --git a/package/kernel/mac80211/patches/ath11k/0906-wifi-ath11k-disable-coldboot-for-ipq6018.patch b/package/kernel/mac80211/patches/ath11k/0906-wifi-ath11k-disable-coldboot-for-ipq6018.patch
index db646f7620..325724e68d 100644
--- a/package/kernel/mac80211/patches/ath11k/0906-wifi-ath11k-disable-coldboot-for-ipq6018.patch
+++ b/package/kernel/mac80211/patches/ath11k/0906-wifi-ath11k-disable-coldboot-for-ipq6018.patch
@@ -13,7 +13,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/drivers/net/wireless/ath/ath11k/core.c
 +++ b/drivers/net/wireless/ath/ath11k/core.c
-@@ -168,8 +168,8 @@ static const struct ath11k_hw_params ath
+@@ -170,8 +170,8 @@ static const struct ath11k_hw_params ath
  		.supports_shadow_regs = false,
  		.idle_ps = false,
  		.supports_sta_ps = false,
diff --git a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
index 30472b3229..f1583b6e96 100644
--- a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
+++ b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch
@@ -49,7 +49,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/drivers/net/wireless/ath/ath11k/mhi.c
 +++ b/drivers/net/wireless/ath/ath11k/mhi.c
-@@ -294,6 +294,34 @@ static void ath11k_mhi_op_runtime_put(st
+@@ -239,6 +239,34 @@ static void ath11k_mhi_op_runtime_put(st
  {
  }
  
@@ -84,7 +84,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  static char *ath11k_mhi_op_callback_to_str(enum mhi_callback reason)
  {
  	switch (reason) {
-@@ -315,6 +343,8 @@ static char *ath11k_mhi_op_callback_to_s
+@@ -260,6 +288,8 @@ static char *ath11k_mhi_op_callback_to_s
  		return "MHI_CB_FATAL_ERROR";
  	case MHI_CB_BW_REQ:
  		return "MHI_CB_BW_REQ";
@@ -93,7 +93,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  	default:
  		return "UNKNOWN";
  	}
-@@ -337,27 +367,14 @@ static void ath11k_mhi_op_status_cb(stru
+@@ -282,27 +312,14 @@ static void ath11k_mhi_op_status_cb(stru
  		if (!(test_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags)))
  			queue_work(ab->workqueue_aux, &ab->reset_work);
  		break;
@@ -126,7 +126,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  	struct device_node *np;
 --- a/drivers/net/wireless/ath/ath11k/mhi.h
 +++ b/drivers/net/wireless/ath/ath11k/mhi.h
-@@ -16,6 +16,9 @@
+@@ -17,6 +17,9 @@
  #define MHICTRL					0x38
  #define MHICTRL_RESET_MASK			0x2
  
@@ -138,7 +138,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  int ath11k_mhi_register(struct ath11k_pci *ar_pci);
 --- a/drivers/net/wireless/ath/ath11k/pci.c
 +++ b/drivers/net/wireless/ath/ath11k/pci.c
-@@ -371,13 +371,20 @@ static void ath11k_pci_sw_reset(struct a
+@@ -374,13 +374,20 @@ static void ath11k_pci_sw_reset(struct a
  static void ath11k_pci_init_qmi_ce_config(struct ath11k_base *ab)
  {
  	struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
diff --git a/package/kernel/mac80211/patches/ath11k/101-wifi-ath11k-add-support-DT-ieee80211-freq-limit.patch b/package/kernel/mac80211/patches/ath11k/101-wifi-ath11k-add-support-DT-ieee80211-freq-limit.patch
index 9571f7f207..6088b26e6b 100644
--- a/package/kernel/mac80211/patches/ath11k/101-wifi-ath11k-add-support-DT-ieee80211-freq-limit.patch
+++ b/package/kernel/mac80211/patches/ath11k/101-wifi-ath11k-add-support-DT-ieee80211-freq-limit.patch
@@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
 
 --- a/drivers/net/wireless/ath/ath11k/mac.c
 +++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -9455,6 +9455,7 @@ static int __ath11k_mac_register(struct
+@@ -10034,6 +10034,7 @@ static int __ath11k_mac_register(struct
  	if (ret)
  		goto err;
  
diff --git a/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch b/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
index dcfb4b5ac8..6b351cc81d 100644
--- a/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
+++ b/package/kernel/mac80211/patches/ath11k/900-ath11k-control-thermal-support-via-symbol.patch
@@ -34,7 +34,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 +	  Enable ath11k thermal sensors and throttling support.
 --- a/drivers/net/wireless/ath/ath11k/Makefile
 +++ b/drivers/net/wireless/ath/ath11k/Makefile
-@@ -22,7 +22,7 @@ ath11k-y += core.o \
+@@ -23,7 +23,7 @@ ath11k-y += core.o \
  ath11k-$(CPTCFG_ATH11K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
  ath11k-$(CPTCFG_NL80211_TESTMODE) += testmode.o
  ath11k-$(CPTCFG_ATH11K_TRACING) += trace.o
@@ -45,18 +45,18 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  
 --- a/drivers/net/wireless/ath/ath11k/thermal.h
 +++ b/drivers/net/wireless/ath/ath11k/thermal.h
-@@ -25,7 +25,7 @@ struct ath11k_thermal {
+@@ -26,7 +26,7 @@ struct ath11k_thermal {
  	int temperature;
  };
  
 -#if IS_REACHABLE(CONFIG_THERMAL)
 +#if IS_REACHABLE(CPTCFG_ATH11K_THERMAL)
- int ath11k_thermal_register(struct ath11k_base *sc);
- void ath11k_thermal_unregister(struct ath11k_base *sc);
+ int ath11k_thermal_register(struct ath11k_base *ab);
+ void ath11k_thermal_unregister(struct ath11k_base *ab);
  int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state);
 --- a/local-symbols
 +++ b/local-symbols
-@@ -173,6 +173,7 @@ ATH11K_DEBUG=
+@@ -166,6 +166,7 @@ ATH11K_DEBUG=
  ATH11K_DEBUGFS=
  ATH11K_TRACING=
  ATH11K_SPECTRAL=
diff --git a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch b/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
deleted file mode 100644
index 9a0ca80090..0000000000
--- a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 04178918e7f6b5f34dde81ec79ee8a1ccace3be3 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robimarko@gmail.com>
-Date: Mon, 17 Oct 2022 11:45:03 +0200
-Subject: [PATCH] wifi: ath11k: pci: fix compilation in 5.16 and older
-
-Commit ("genirq/msi, treewide: Use a named struct for PCI/MSI attributes")
-changed the msi_desc structure a bit, however that is only available in
-kernels 5.17 and newer, so check for kernel version to allow compilation
-in 5.16 and older.
-
-Signed-off-by: Robert Marko <robimarko@gmail.com>
----
- drivers/net/wireless/ath/ath11k/pci.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/net/wireless/ath/ath11k/pci.c
-+++ b/drivers/net/wireless/ath/ath11k/pci.c
-@@ -459,7 +459,11 @@ static int ath11k_pci_alloc_msi(struct a
- 	pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO,
- 			      &ab->pci.msi.addr_lo);
- 
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(5, 17, 0))
- 	if (msi_desc->pci.msi_attrib.is_64) {
-+#else
-+	if (msi_desc->msi_attrib.is_64) {
-+#endif
- 		pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_HI,
- 				      &ab->pci.msi.addr_hi);
- 	} else {
diff --git a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
index 71373b2136..dcf1f5f276 100644
--- a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
+++ b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch
@@ -22,7 +22,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/drivers/net/wireless/ath/ath11k/core.c
 +++ b/drivers/net/wireless/ath/ath11k/core.c
-@@ -36,7 +36,7 @@ bool ath11k_ftm_mode;
+@@ -37,7 +37,7 @@ bool ath11k_ftm_mode;
  module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
  MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
  
@@ -31,7 +31,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  	{
  		.hw_rev = ATH11K_HW_IPQ8074,
  		.name = "ipq8074 hw2.0",
-@@ -2040,7 +2040,8 @@ static void ath11k_core_reset(struct wor
+@@ -2138,7 +2138,8 @@ static void ath11k_core_reset(struct wor
  static int ath11k_init_hw_params(struct ath11k_base *ab)
  {
  	const struct ath11k_hw_params *hw_params = NULL;
@@ -41,7 +41,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  
  	for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
  		hw_params = &ath11k_hw_params[i];
-@@ -2056,7 +2057,31 @@ static int ath11k_init_hw_params(struct
+@@ -2154,7 +2155,31 @@ static int ath11k_init_hw_params(struct
  
  	ab->hw_params = *hw_params;
  
diff --git a/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch b/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
index 74317e0262..19f4e7dbe2 100644
--- a/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
+++ b/package/kernel/mac80211/patches/ath11k/905-ath11k-remove-intersection-support-for-regulatory-ru.patch
@@ -23,7 +23,7 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
 
 --- a/drivers/net/wireless/ath/ath11k/reg.c
 +++ b/drivers/net/wireless/ath/ath11k/reg.c
-@@ -362,129 +362,6 @@ static u32 ath11k_map_fw_phy_flags(u32 p
+@@ -363,134 +363,6 @@ static u32 ath11k_map_fw_phy_flags(u32 p
  	return flags;
  }
  
@@ -89,6 +89,11 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
 -	/* Use the flags of both the rules */
 -	new_rule->flags = rule1->flags | rule2->flags;
 -
+-	if ((rule1->flags & NL80211_RRF_PSD) && (rule2->flags & NL80211_RRF_PSD))
+-		new_rule->psd = min_t(s8, rule1->psd, rule2->psd);
+-	else
+-		new_rule->flags &= ~NL80211_RRF_PSD;
+-
 -	/* To be safe, lts use the max cac timeout of both rules */
 -	new_rule->dfs_cac_ms = max_t(u32, rule1->dfs_cac_ms,
 -				     rule2->dfs_cac_ms);
@@ -153,20 +158,22 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
  static const char *
  ath11k_reg_get_regdom_str(enum nl80211_dfs_regions dfs_region)
  {
-@@ -619,9 +496,9 @@ ath11k_reg_update_weather_radar_band(str
+@@ -641,11 +513,11 @@ ath11k_reg_ap_pwr_convert(enum ieee80211
  
  struct ieee80211_regdomain *
  ath11k_reg_build_regd(struct ath11k_base *ab,
--		      struct cur_regulatory_info *reg_info, bool intersect)
-+		      struct cur_regulatory_info *reg_info)
+-		      struct cur_regulatory_info *reg_info, bool intersect,
++		      struct cur_regulatory_info *reg_info,
+ 		      enum wmi_vdev_type vdev_type,
+ 		      enum ieee80211_ap_reg_power power_type)
  {
 -	struct ieee80211_regdomain *tmp_regd, *default_regd, *new_regd = NULL;
 +	struct ieee80211_regdomain *new_regd = NULL;
- 	struct cur_reg_rule *reg_rule;
+ 	struct cur_reg_rule *reg_rule, *reg_rule_6ghz;
  	u8 i = 0, j = 0, k = 0;
  	u8 num_rules;
-@@ -638,26 +515,26 @@ ath11k_reg_build_regd(struct ath11k_base
- 		num_rules += reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP];
+@@ -688,26 +560,26 @@ ath11k_reg_build_regd(struct ath11k_base
+ 	}
  
  	if (!num_rules)
 -		goto ret;
@@ -199,7 +206,7 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
  		   reg_info->dfs_region, num_rules);
  	/* Update reg_rules[] below. Firmware is expected to
  	 * send these rules in order(2 GHz rules first and then 5 GHz)
-@@ -697,7 +574,7 @@ ath11k_reg_build_regd(struct ath11k_base
+@@ -746,7 +618,7 @@ ath11k_reg_build_regd(struct ath11k_base
  		flags |= ath11k_map_fw_reg_flags(reg_rule->flags);
  		flags |= ath11k_map_fw_phy_flags(reg_info->phybitmap);
  
@@ -208,7 +215,7 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
  				       reg_rule->start_freq,
  				       reg_rule->end_freq, max_bw,
  				       reg_rule->ant_gain, reg_rule->reg_power,
-@@ -712,7 +589,7 @@ ath11k_reg_build_regd(struct ath11k_base
+@@ -761,7 +633,7 @@ ath11k_reg_build_regd(struct ath11k_base
  		    reg_info->dfs_region == ATH11K_DFS_REG_ETSI &&
  		    (reg_rule->end_freq > ETSI_WEATHER_RADAR_BAND_LOW &&
  		    reg_rule->start_freq < ETSI_WEATHER_RADAR_BAND_HIGH)){
@@ -217,7 +224,7 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
  							     reg_rule, &i,
  							     flags, max_bw);
  			continue;
-@@ -723,37 +600,20 @@ ath11k_reg_build_regd(struct ath11k_base
+@@ -772,51 +644,23 @@ ath11k_reg_build_regd(struct ath11k_base
  				   "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n",
  				   i + 1, reg_rule->start_freq, reg_rule->end_freq,
  				   max_bw, reg_rule->ant_gain, reg_rule->reg_power,
@@ -236,7 +243,8 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
  	}
  
 -	tmp_regd->n_reg_rules = i;
--
++	new_regd->n_reg_rules = i;
+ 
 -	if (intersect) {
 -		default_regd = ab->default_regd[reg_info->phy_id];
 -
@@ -252,29 +260,11 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
 -	} else {
 -		new_regd = tmp_regd;
 -	}
-+	new_regd->n_reg_rules = i;
- 
+-
 -ret:
  	return new_regd;
  }
  
---- a/drivers/net/wireless/ath/ath11k/reg.h
-+++ b/drivers/net/wireless/ath/ath11k/reg.h
-@@ -33,7 +33,7 @@ void ath11k_reg_free(struct ath11k_base
- void ath11k_regd_update_work(struct work_struct *work);
- struct ieee80211_regdomain *
- ath11k_reg_build_regd(struct ath11k_base *ab,
--		      struct cur_regulatory_info *reg_info, bool intersect);
-+		      struct cur_regulatory_info *reg_info);
- int ath11k_regd_update(struct ath11k *ar);
- int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait);
- #endif
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -7060,24 +7060,12 @@ static void ath11k_wmi_htc_tx_complete(s
- 		wake_up(&wmi->tx_ce_desc_wq);
- }
- 
 -static bool ath11k_reg_is_world_alpha(char *alpha)
 -{
 -	if (alpha[0] == '0' && alpha[1] == '0')
@@ -286,19 +276,20 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
 -	return false;
 -}
 -
- static int ath11k_reg_chan_list_event(struct ath11k_base *ab,
- 				      struct sk_buff *skb,
- 				      enum wmi_reg_chan_list_cmd_type id)
+ static enum wmi_vdev_type ath11k_reg_get_ar_vdev_type(struct ath11k *ar)
+ {
+ 	struct ath11k_vif *arvif;
+@@ -839,7 +683,6 @@ int ath11k_reg_handle_chan_list(struct a
+ 				enum ieee80211_ap_reg_power power_type)
  {
- 	struct cur_regulatory_info *reg_info = NULL;
- 	struct ieee80211_regdomain *regd = NULL;
+ 	struct ieee80211_regdomain *regd;
 -	bool intersect = false;
- 	int ret = 0, pdev_idx, i, j;
+ 	int pdev_idx;
  	struct ath11k *ar;
- 
-@@ -7141,17 +7129,7 @@ static int ath11k_reg_chan_list_event(st
+ 	enum wmi_vdev_type vdev_type;
+@@ -891,24 +734,14 @@ int ath11k_reg_handle_chan_list(struct a
  		    (char *)reg_info->alpha2, 2))
- 		goto mem_free;
+ 		goto retfail;
  
 -	/* Intersect new rules with default regd if a new country setting was
 -	 * requested, i.e a default regd was already set during initialization
@@ -310,8 +301,28 @@ Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
 -	    !ath11k_reg_is_world_alpha((char *)reg_info->alpha2))
 -		intersect = true;
 -
--	regd = ath11k_reg_build_regd(ab, reg_info, intersect);
-+	regd = ath11k_reg_build_regd(ab, reg_info);
+ 	ar = ab->pdevs[pdev_idx].ar;
+ 	vdev_type = ath11k_reg_get_ar_vdev_type(ar);
+ 
+ 	ath11k_dbg(ab, ATH11K_DBG_WMI,
+-		   "wmi handle chan list power type %d vdev type %d intersect %d\n",
+-		   power_type, vdev_type, intersect);
++		   "wmi handle chan list power type %d vdev type %d\n",
++		   power_type, vdev_type);
+ 
+-	regd = ath11k_reg_build_regd(ab, reg_info, intersect, vdev_type, power_type);
++	regd = ath11k_reg_build_regd(ab, reg_info, vdev_type, power_type);
  	if (!regd) {
  		ath11k_warn(ab, "failed to build regd from reg_info\n");
  		goto fallback;
+--- a/drivers/net/wireless/ath/ath11k/reg.h
++++ b/drivers/net/wireless/ath/ath11k/reg.h
+@@ -35,7 +35,7 @@ void ath11k_reg_free(struct ath11k_base
+ void ath11k_regd_update_work(struct work_struct *work);
+ struct ieee80211_regdomain *
+ ath11k_reg_build_regd(struct ath11k_base *ab,
+-		      struct cur_regulatory_info *reg_info, bool intersect,
++		      struct cur_regulatory_info *reg_info,
+ 		      enum wmi_vdev_type vdev_type,
+ 		      enum ieee80211_ap_reg_power power_type);
+ int ath11k_regd_update(struct ath11k *ar);
diff --git a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
index 3ec2d6ec6e..72eae8c7d6 100644
--- a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
+++ b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch
@@ -10,7 +10,7 @@
  			   sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
 --- a/drivers/net/wireless/ath/ath.h
 +++ b/drivers/net/wireless/ath/ath.h
-@@ -153,6 +153,7 @@ struct ath_common {
+@@ -151,6 +151,7 @@ struct ath_common {
  	int debug_mask;
  	enum ath_device_state state;
  	unsigned long op_flags;
diff --git a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
index 8ed7ad8a09..1055bd335c 100644
--- a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
+++ b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
@@ -1,15 +1,3 @@
---- a/include/linux/ath9k_platform.h
-+++ b/include/linux/ath9k_platform.h
-@@ -46,6 +46,9 @@ struct ath9k_platform_data {
- 	int (*external_reset)(void);
- 
- 	bool use_eeprom;
-+
-+	int num_leds;
-+	const struct gpio_led *leds;
- };
- 
- #endif /* _LINUX_ATH9K_PLATFORM_H */
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
 @@ -15,6 +15,7 @@
diff --git a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
index f00ce5f3dc..a0e5a24ed8 100644
--- a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+++ b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
@@ -125,7 +125,7 @@
  		REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON);
 --- a/drivers/net/wireless/ath/ath9k/main.c
 +++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -538,6 +538,11 @@ irqreturn_t ath_isr(int irq, void *dev)
+@@ -537,6 +537,11 @@ irqreturn_t ath_isr(int irq, void *dev)
  		return IRQ_HANDLED;
  	}
  
diff --git a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
index 8b399f4b4c..0fedc71270 100644
--- a/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
+++ b/package/kernel/mac80211/patches/ath9k/543-ath9k_entropy_from_adc.patch
@@ -18,7 +18,7 @@
  	void (*spectral_scan_trigger)(struct ath_hw *ah);
 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -1918,6 +1918,26 @@ void ar9003_hw_init_rate_txpower(struct
+@@ -1915,6 +1915,26 @@ void ar9003_hw_init_rate_txpower(struct
  	}
  }
  
@@ -45,7 +45,7 @@
  void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
  {
  	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
-@@ -1954,6 +1974,7 @@ void ar9003_hw_attach_phy_ops(struct ath
+@@ -1951,6 +1971,7 @@ void ar9003_hw_attach_phy_ops(struct ath
  	priv_ops->set_radar_params = ar9003_hw_set_radar_params;
  	priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
  
diff --git a/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
index d3bf07ff92..6027741cd8 100644
--- a/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
+++ b/package/kernel/mac80211/patches/ath9k/545-ath9k_ani_ws_detect.patch
@@ -79,7 +79,7 @@
  static const u8 ofdm2pwr[] = {
  	ALL_TARGET_LEGACY_6_24,
  	ALL_TARGET_LEGACY_6_24,
-@@ -1068,11 +1054,6 @@ static bool ar9003_hw_ani_control(struct
+@@ -1065,11 +1051,6 @@ static bool ar9003_hw_ani_control(struct
  	struct ath_common *common = ath9k_hw_common(ah);
  	struct ath9k_channel *chan = ah->curchan;
  	struct ar5416AniState *aniState = &ah->ani;
@@ -91,7 +91,7 @@
  	s32 value, value2;
  
  	switch (cmd & ah->ani_function) {
-@@ -1086,61 +1067,6 @@ static bool ar9003_hw_ani_control(struct
+@@ -1083,61 +1064,6 @@ static bool ar9003_hw_ani_control(struct
  		 */
  		u32 on = param ? 1 : 0;
  
diff --git a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
index 83076b8ae4..0b2acf8af1 100644
--- a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+++ b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
@@ -128,16 +128,3 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	if (pdata && pdata->leds && pdata->num_leds)
  		for (i = 0; i < pdata->num_leds; i++) {
---- a/include/linux/ath9k_platform.h
-+++ b/include/linux/ath9k_platform.h
-@@ -49,6 +49,10 @@ struct ath9k_platform_data {
- 
- 	int num_leds;
- 	const struct gpio_led *leds;
-+
-+	unsigned num_btns;
-+	const struct gpio_keys_button *btns;
-+	unsigned btn_poll_interval;
- };
- 
- #endif /* _LINUX_ATH9K_PLATFORM_H */
diff --git a/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
index efd2932446..4e4cab986b 100644
--- a/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
+++ b/package/kernel/mac80211/patches/ath9k/551-ath9k_ubnt_uap_plus_hsr.patch
@@ -339,7 +339,7 @@
  
  static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  			u32 queues, bool drop);
-@@ -659,6 +660,7 @@ void ath_reset_work(struct work_struct *
+@@ -658,6 +659,7 @@ void ath_reset_work(struct work_struct *
  static int ath9k_start(struct ieee80211_hw *hw)
  {
  	struct ath_softc *sc = hw->priv;
@@ -347,7 +347,7 @@
  	struct ath_hw *ah = sc->sc_ah;
  	struct ath_common *common = ath9k_hw_common(ah);
  	struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
-@@ -737,6 +739,11 @@ static int ath9k_start(struct ieee80211_
+@@ -736,6 +738,11 @@ static int ath9k_start(struct ieee80211_
  					  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  	}
  
@@ -371,7 +371,7 @@
  
 --- a/local-symbols
 +++ b/local-symbols
-@@ -128,6 +128,7 @@ ATH9K_WOW=
+@@ -121,6 +121,7 @@ ATH9K_WOW=
  ATH9K_RFKILL=
  ATH9K_CHANNEL_CONTEXT=
  ATH9K_PCOEM=
@@ -400,4 +400,4 @@
 +
  config ATH9K_DEBUGFS
  	bool "Atheros ath9k debugging"
- 	depends on ATH9K && DEBUG_FS
+ 	depends on ATH9K && DEBUG_FS && MAC80211_DEBUGFS
diff --git a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
index 29e66c070c..a4efdcd1bc 100644
--- a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+++ b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
@@ -209,7 +209,7 @@
  static int ath_ahb_probe(struct platform_device *pdev)
  {
  	void __iomem *mem;
-@@ -80,6 +318,17 @@ static int ath_ahb_probe(struct platform
+@@ -80,6 +274,17 @@ static int ath_ahb_probe(struct platform
  	int ret = 0;
  	struct ath_hw *ah;
  	char hw_name[64];
@@ -227,7 +227,7 @@
  
  	if (!dev_get_platdata(&pdev->dev)) {
  		dev_err(&pdev->dev, "no platform data specified\n");
-@@ -118,13 +367,16 @@ static int ath_ahb_probe(struct platform
+@@ -118,17 +323,23 @@ static int ath_ahb_probe(struct platform
  	sc->mem = mem;
  	sc->irq = irq;
  
@@ -245,18 +245,15 @@
  	if (ret) {
  		dev_err(&pdev->dev, "failed to initialize device\n");
  		goto err_irq;
-@@ -155,6 +407,9 @@ static int ath_ahb_remove(struct platfor
- 		free_irq(sc->irq, sc);
- 		ieee80211_free_hw(sc->hw);
  	}
 +#ifdef CONFIG_OF
 +	pdev->dev.platform_data = NULL;
 +#endif
  
- 	return 0;
- }
-@@ -164,6 +419,9 @@ static struct platform_driver ath_ahb_dr
- 	.remove     = ath_ahb_remove,
+ 	ah = sc->sc_ah;
+ 	ath9k_hw_name(ah, hw_name, sizeof(hw_name));
+@@ -162,6 +373,9 @@ static struct platform_driver ath_ahb_dr
+ 	.remove_new = ath_ahb_remove,
  	.driver		= {
  		.name	= "ath9k",
 +#ifdef CONFIG_OF
diff --git a/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch b/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
index 09ef50526f..295a4cca73 100644
--- a/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
+++ b/package/kernel/mac80211/patches/brcm/810-b43-gpio-mask-module-option.patch
@@ -22,7 +22,7 @@
  static int modparam_bad_frames_preempt;
  module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  MODULE_PARM_DESC(bad_frames_preempt,
-@@ -2869,10 +2874,10 @@ static int b43_gpio_init(struct b43_wlde
+@@ -2870,10 +2875,10 @@ static int b43_gpio_init(struct b43_wlde
  	u32 mask, set;
  
  	b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0);
diff --git a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
index 22b67c49d8..e9f915d2d9 100644
--- a/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
+++ b/package/kernel/mac80211/patches/brcm/812-b43-add-antenna-control.patch
@@ -9,7 +9,7 @@
  	antenna = b43_antenna_to_phyctl(antenna);
  	ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL);
  	/* We can't send beacons with short preamble. Would get PHY errors. */
-@@ -3284,8 +3284,8 @@ static int b43_chip_init(struct b43_wlde
+@@ -3285,8 +3285,8 @@ static int b43_chip_init(struct b43_wlde
  
  	/* Select the antennae */
  	if (phy->ops->set_rx_antenna)
@@ -20,7 +20,7 @@
  
  	if (phy->type == B43_PHYTYPE_B) {
  		value16 = b43_read16(dev, 0x005E);
-@@ -3986,7 +3986,6 @@ static int b43_op_config(struct ieee8021
+@@ -3988,7 +3988,6 @@ static int b43_op_config(struct ieee8021
  	struct b43_wldev *dev = wl->current_dev;
  	struct b43_phy *phy = &dev->phy;
  	struct ieee80211_conf *conf = &hw->conf;
@@ -28,7 +28,7 @@
  	int err = 0;
  
  	mutex_lock(&wl->mutex);
-@@ -4029,11 +4028,9 @@ static int b43_op_config(struct ieee8021
+@@ -4031,11 +4030,9 @@ static int b43_op_config(struct ieee8021
  	}
  
  	/* Antennas for RX and management frame TX. */
@@ -42,7 +42,7 @@
  
  	if (wl->radio_enabled != phy->radio_on) {
  		if (wl->radio_enabled) {
-@@ -5176,6 +5173,47 @@ static int b43_op_get_survey(struct ieee
+@@ -5178,6 +5175,47 @@ static int b43_op_get_survey(struct ieee
  	return 0;
  }
  
@@ -88,9 +88,9 @@
 +}
 +
  static const struct ieee80211_ops b43_hw_ops = {
- 	.tx			= b43_op_tx,
- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
-@@ -5198,6 +5236,8 @@ static const struct ieee80211_ops b43_hw
+ 	.add_chanctx = ieee80211_emulate_add_chanctx,
+ 	.remove_chanctx = ieee80211_emulate_remove_chanctx,
+@@ -5204,6 +5242,8 @@ static const struct ieee80211_ops b43_hw
  	.sw_scan_complete	= b43_op_sw_scan_complete_notifier,
  	.get_survey		= b43_op_get_survey,
  	.rfkill_poll		= b43_rfkill_poll,
@@ -99,7 +99,7 @@
  };
  
  /* Hard-reset the chip. Do not call this directly.
-@@ -5499,6 +5539,8 @@ static int b43_one_core_attach(struct b4
+@@ -5505,6 +5545,8 @@ static int b43_one_core_attach(struct b4
  	if (!wldev)
  		goto out;
  
@@ -108,7 +108,7 @@
  	wldev->use_pio = b43_modparam_pio;
  	wldev->dev = dev;
  	wldev->wl = wl;
-@@ -5590,6 +5632,9 @@ static struct b43_wl *b43_wireless_init(
+@@ -5596,6 +5638,9 @@ static struct b43_wl *b43_wireless_init(
  
  	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
  
diff --git a/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch b/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
index 9cb0a32fd4..f7aa413208 100644
--- a/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
+++ b/package/kernel/mac80211/patches/brcm/814-b43-only-use-gpio-0-1-for-led.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/broadcom/b43/main.c
 +++ b/drivers/net/wireless/broadcom/b43/main.c
-@@ -2886,6 +2886,14 @@ static int b43_gpio_init(struct b43_wlde
+@@ -2887,6 +2887,14 @@ static int b43_gpio_init(struct b43_wlde
  	} else if (dev->dev->chip_id == 0x5354) {
  		/* Don't allow overtaking buttons GPIOs */
  		set &= 0x2; /* 0x2 is LED GPIO on BCM5354 */
diff --git a/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch b/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
index b06172ec0e..84b989d858 100644
--- a/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
+++ b/package/kernel/mac80211/patches/brcm/861-brcmfmac-workaround-bug-with-some-inconsistent-BSSes.patch
@@ -10,7 +10,7 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
 
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
-@@ -979,8 +979,36 @@ static struct wireless_dev *brcmf_cfg802
+@@ -980,8 +980,36 @@ static struct wireless_dev *brcmf_cfg802
  	struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy);
  	struct brcmf_pub *drvr = cfg->pub;
  	struct wireless_dev *wdev;
diff --git a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
index 92e647816b..9f91b29c40 100644
--- a/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
+++ b/package/kernel/mac80211/patches/brcm/862-brcmfmac-Disable-power-management.patch
@@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
 
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
-@@ -3327,6 +3327,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip
+@@ -3313,6 +3313,10 @@ brcmf_cfg80211_set_power_mgmt(struct wip
  	 * preference in cfg struct to apply this to
  	 * FW later while initializing the dongle
  	 */
diff --git a/package/kernel/mac80211/patches/brcm/865-brcmfmac-disable-dump_survey-on-bcm2835.patch b/package/kernel/mac80211/patches/brcm/865-brcmfmac-disable-dump_survey-on-bcm2835.patch
index bb87c69ff3..975647444f 100644
--- a/package/kernel/mac80211/patches/brcm/865-brcmfmac-disable-dump_survey-on-bcm2835.patch
+++ b/package/kernel/mac80211/patches/brcm/865-brcmfmac-disable-dump_survey-on-bcm2835.patch
@@ -9,7 +9,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
-@@ -7987,6 +7987,7 @@ static s32 brcmf_translate_country_code(
+@@ -7979,6 +7979,7 @@ static s32 brcmf_translate_country_code(
  	return 0;
  }
  
@@ -17,7 +17,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  static int
  brcmf_parse_dump_obss(char *buf, struct brcmf_dump_survey *survey)
  {
-@@ -8209,6 +8210,7 @@ exit:
+@@ -8201,6 +8202,7 @@ exit:
  		brcmf_set_mpc(ifp, 1);
  	return err;
  }
@@ -25,7 +25,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  
  static void brcmf_cfg80211_reg_notifier(struct wiphy *wiphy,
  					struct regulatory_request *req)
-@@ -8361,8 +8363,10 @@ struct brcmf_cfg80211_info *brcmf_cfg802
+@@ -8353,8 +8355,10 @@ struct brcmf_cfg80211_info *brcmf_cfg802
  	if (brcmf_feat_is_enabled(ifp, BRCMF_FEAT_WOWL_GTK))
  		ops->set_rekey_data = brcmf_cfg80211_set_rekey_data;
  #endif
diff --git a/package/kernel/mac80211/patches/build/001-fix_build.patch b/package/kernel/mac80211/patches/build/001-fix_build.patch
index 8f63d36e2e..085eae3cd3 100644
--- a/package/kernel/mac80211/patches/build/001-fix_build.patch
+++ b/package/kernel/mac80211/patches/build/001-fix_build.patch
@@ -27,7 +27,7 @@
  	@set -e ; test -f local-symbols || (						\
  	echo "/--------------"								;\
  	echo "| You shouldn't run make in the backports tree, but only in"		;\
-@@ -60,58 +62,62 @@ mrproper:
+@@ -60,57 +62,62 @@ mrproper:
  	echo "| (that isn't currently running.)"					;\
  	echo "\\--"									;\
  	false)
@@ -56,13 +56,12 @@
 -			done								\
 -		) > Kconfig.kernel							;\
 -		kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR)	\
--			kernelversion |	sed 's/^\(\([3-5]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
+-			kernelversion |	sed 's/^\(\([3-6]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
 -		test "$$kver" != "" || echo "Kernel version parse failed!"		;\
 -		test "$$kver" != ""							;\
--		kvers="$$(seq 14 39 | sed 's/^/2.6./')"					;\
--		kvers="$$kvers $$(seq 0 19 | sed 's/^/3./')"				;\
 -		kvers="$$kvers $$(seq 0 20 | sed 's/^/4./')"				;\
--		kvers="$$kvers $$(seq 0 99 | sed 's/^/5./')"				;\
+-		kvers="$$kvers $$(seq 0 19 | sed 's/^/5./')"				;\
+-		kvers="$$kvers $$(seq 0 20 | sed 's/^/6./')"				;\
 -		print=0									;\
 -		for v in $$kvers ; do							\
 -			if [ "$$print" = "1" ] ; then					\
@@ -112,14 +111,13 @@
 +	@echo " done."
 +
 +Kconfig.versions: Kconfig.kernel
-+	@kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR) \
-+		kernelversion |	sed 's/^\(\([3-5]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
++	@kver=$$($(MAKE) --no-print-directory -C $(KLIB_BUILD) M=$(BACKPORT_DIR)	\
++		kernelversion |	sed 's/^\(\([3-6]\|2\.6\)\.[0-9]\+\).*/\1/;t;d');\
 +	test "$$kver" != "" || echo "Kernel version parse failed!"		;\
 +	test "$$kver" != ""							;\
-+	kvers="$$(seq 14 39 | sed 's/^/2.6./')"					;\
-+	kvers="$$kvers $$(seq 0 19 | sed 's/^/3./')"				;\
 +	kvers="$$kvers $$(seq 0 20 | sed 's/^/4./')"				;\
-+	kvers="$$kvers $$(seq 0 99 | sed 's/^/5./')"				;\
++	kvers="$$kvers $$(seq 0 19 | sed 's/^/5./')"				;\
++	kvers="$$kvers $$(seq 0 20 | sed 's/^/6./')"				;\
 +	print=0									;\
 +	for v in $$kvers ; do							\
 +		if [ "$$print" = "1" ] ; then					\
@@ -127,8 +125,9 @@
 +			echo "    def_bool y"					;\
 +		fi								;\
 +		if [ "$$v" = "$$kver" ] ; then print=1 ; fi			;\
-+	done > $@
-+	@RHEL_MAJOR=$$(grep '^RHEL_MAJOR' $(KERNEL_MAKEFILE) | 			\
++	done > Kconfig.versions							;\
++	# RHEL as well, sadly we need to grep for it				;\
++	RHEL_MAJOR=$$(grep '^RHEL_MAJOR' $(KERNEL_MAKEFILE) | 			\
 +				sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
 +	RHEL_MINOR=$$(grep '^RHEL_MINOR' $(KERNEL_MAKEFILE) | 			\
 +				sed 's/.*=\s*\([0-9]*\)/\1/;t;d')		;\
diff --git a/package/kernel/mac80211/patches/build/005-fix-kconf-warnings.patch b/package/kernel/mac80211/patches/build/005-fix-kconf-warnings.patch
new file mode 100644
index 0000000000..00e94003f2
--- /dev/null
+++ b/package/kernel/mac80211/patches/build/005-fix-kconf-warnings.patch
@@ -0,0 +1,76 @@
+--- a/kconf/conf.c
++++ b/kconf/conf.c
+@@ -86,7 +86,7 @@ static int conf_askvalue(struct symbol *
+ 	enum symbol_type type = sym_get_type(sym);
+ 
+ 	if (!sym_has_value(sym))
+-		printf(_("(NEW) "));
++		printf("%s", _("(NEW) "));
+ 
+ 	line[0] = '\n';
+ 	line[1] = 0;
+@@ -282,7 +282,7 @@ static int conf_choice(struct menu *menu
+ 			if (child->sym->name)
+ 				printf(" (%s)", child->sym->name);
+ 			if (!sym_has_value(child->sym))
+-				printf(_(" (NEW)"));
++				printf("%s", _(" (NEW)"));
+ 			printf("\n");
+ 		}
+ 		printf(_("%*schoice"), indent - 1, "");
+@@ -437,7 +437,7 @@ static void check_conf(struct menu *menu
+ 				}
+ 			} else {
+ 				if (!conf_cnt++)
+-					printf(_("*\n* Restart config...\n*\n"));
++					printf("%s", _("*\n* Restart config...\n*\n"));
+ 				rootEntry = menu_get_parent_menu(menu);
+ 				conf(rootEntry);
+ 			}
+@@ -614,7 +614,7 @@ int main(int ac, char **av)
+ 			name = getenv("KCONFIG_NOSILENTUPDATE");
+ 			if (name && *name) {
+ 				fprintf(stderr,
+-					_("\n*** The configuration requires explicit update.\n\n"));
++					"%s", _("\n*** The configuration requires explicit update.\n\n"));
+ 				return 1;
+ 			}
+ 		}
+@@ -666,22 +666,22 @@ int main(int ac, char **av)
+ 		 * All other commands are only used to generate a config.
+ 		 */
+ 		if (conf_get_changed() && conf_write(NULL)) {
+-			fprintf(stderr, _("\n*** Error during writing of the configuration.\n\n"));
++			fprintf(stderr, "%s", _("\n*** Error during writing of the configuration.\n\n"));
+ 			exit(1);
+ 		}
+ 		if (conf_write_autoconf()) {
+-			fprintf(stderr, _("\n*** Error during update of the configuration.\n\n"));
++			fprintf(stderr, "%s", _("\n*** Error during update of the configuration.\n\n"));
+ 			return 1;
+ 		}
+ 	} else if (input_mode == savedefconfig) {
+ 		if (conf_write_defconfig(defconfig_file)) {
+-			fprintf(stderr, _("n*** Error while saving defconfig to: %s\n\n"),
++			fprintf(stderr, _("\n*** Error while saving defconfig to: %s\n\n"),
+ 				defconfig_file);
+ 			return 1;
+ 		}
+ 	} else if (input_mode != listnewconfig) {
+ 		if (conf_write(NULL)) {
+-			fprintf(stderr, _("\n*** Error during writing of the configuration.\n\n"));
++			fprintf(stderr, "%s", _("\n*** Error during writing of the configuration.\n\n"));
+ 			exit(1);
+ 		}
+ 	}
+--- a/kconf/Makefile
++++ b/kconf/Makefile
+@@ -17,7 +17,7 @@ clean:
+ zconf.tab.c: zconf.lex.c
+ 
+ %.tab.c: %.y
+-	$(YACC) -o$@ -t -l $<
++	$(YACC) -Wno-yacc -o$@ -t -l $<
+ 
+ %.lex.c: %.l
+ 	$(LEX) -o$@ -L $<
diff --git a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
index 2a0f9ede42..0dad745b4f 100644
--- a/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
+++ b/package/kernel/mac80211/patches/build/060-no_local_ssb_bcma.patch
@@ -1,6 +1,6 @@
 --- a/local-symbols
 +++ b/local-symbols
-@@ -493,43 +493,6 @@ USB_VL600=
+@@ -471,43 +471,6 @@ USB_VL600=
  USB_NET_CH9200=
  USB_NET_AQC111=
  USB_RTL8153_ECM=
@@ -90,7 +90,7 @@
  config B43_PHY_G
 --- a/drivers/net/wireless/broadcom/b43/main.c
 +++ b/drivers/net/wireless/broadcom/b43/main.c
-@@ -2853,7 +2853,7 @@ static struct ssb_device *b43_ssb_gpio_d
+@@ -2854,7 +2854,7 @@ static struct ssb_device *b43_ssb_gpio_d
  {
  	struct ssb_bus *bus = dev->dev->sdev->bus;
  
@@ -99,7 +99,7 @@
  	return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
  #else
  	return bus->chipco.dev;
-@@ -4871,7 +4871,7 @@ static int b43_wireless_core_init(struct
+@@ -4873,7 +4873,7 @@ static int b43_wireless_core_init(struct
  	}
  	if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
  		hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
@@ -171,7 +171,7 @@
  	depends on CORDIC
 --- a/Kconfig.local
 +++ b/Kconfig.local
-@@ -1483,117 +1483,6 @@ config BACKPORTED_USB_NET_AQC111
+@@ -1417,117 +1417,6 @@ config BACKPORTED_USB_NET_AQC111
  config BACKPORTED_USB_RTL8153_ECM
  	tristate
  	default USB_RTL8153_ECM
@@ -303,7 +303,7 @@
  source "$BACKPORT_DIR/drivers/staging/Kconfig"
 --- a/Makefile.kernel
 +++ b/Makefile.kernel
-@@ -43,8 +43,6 @@ obj-$(CPTCFG_QRTR) += net/qrtr/
+@@ -42,8 +42,6 @@ obj-$(CPTCFG_QRTR) += net/qrtr/
  obj-$(CPTCFG_QCOM_QMI_HELPERS) += drivers/soc/qcom/
  obj-$(CPTCFG_MHI_BUS) += drivers/bus/mhi/
  obj-$(CPTCFG_WLAN) += drivers/net/wireless/
diff --git a/package/kernel/mac80211/patches/build/080-resv_start_op.patch b/package/kernel/mac80211/patches/build/080-resv_start_op.patch
deleted file mode 100644
index bbd9018bdf..0000000000
--- a/package/kernel/mac80211/patches/build/080-resv_start_op.patch
+++ /dev/null
@@ -1,24 +0,0 @@
---- a/drivers/net/wireless/virtual/mac80211_hwsim.c
-+++ b/drivers/net/wireless/virtual/mac80211_hwsim.c
-@@ -6179,7 +6179,9 @@ static struct genl_family hwsim_genl_fam
- 	.module = THIS_MODULE,
- 	.small_ops = hwsim_ops,
- 	.n_small_ops = ARRAY_SIZE(hwsim_ops),
-+#if LINUX_VERSION_IS_GEQ(6,1,0)
- 	.resv_start_op = HWSIM_CMD_REPORT_PMSR + 1, // match with __HWSIM_CMD_MAX
-+#endif
- 	.mcgrps = hwsim_mcgrps,
- 	.n_mcgrps = ARRAY_SIZE(hwsim_mcgrps),
- };
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -17551,7 +17551,9 @@ static struct genl_family nl80211_fam __
- 	.n_ops = ARRAY_SIZE(nl80211_ops),
- 	.small_ops = nl80211_small_ops,
- 	.n_small_ops = ARRAY_SIZE(nl80211_small_ops),
-+#if LINUX_VERSION_IS_GEQ(6,1,0)
- 	.resv_start_op = NL80211_CMD_REMOVE_LINK_STA + 1,
-+#endif
- 	.mcgrps = nl80211_mcgrps,
- 	.n_mcgrps = ARRAY_SIZE(nl80211_mcgrps),
- 	.parallel_ops = true,
diff --git a/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch b/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
index b017a0ce14..a3a65c2d2a 100644
--- a/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
+++ b/package/kernel/mac80211/patches/build/100-backports-drop-QRTR-and-MHI.patch
@@ -32,7 +32,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  source "$BACKPORT_DIR/drivers/net/usb/Kconfig"
 --- a/Makefile.kernel
 +++ b/Makefile.kernel
-@@ -39,9 +39,7 @@ obj-y += compat/
+@@ -38,9 +38,7 @@ obj-y += compat/
  
  obj-$(CPTCFG_CFG80211) += net/wireless/
  obj-$(CPTCFG_MAC80211) += net/mac80211/
@@ -59,7 +59,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  
 --- a/local-symbols
 +++ b/local-symbols
-@@ -65,14 +65,6 @@ MAC80211_MESH_PS_DEBUG=
+@@ -59,14 +59,6 @@ MAC80211_MESH_PS_DEBUG=
  MAC80211_TDLS_DEBUG=
  MAC80211_DEBUG_COUNTERS=
  MAC80211_STA_HASH_MAX_SIZE=
@@ -73,4 +73,4 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 -MHI_BUS_EP=
  QCOM_AOSS_QMP=
  QCOM_COMMAND_DB=
- QCOM_CPR=
+ QCOM_GENI_SE=
diff --git a/package/kernel/mac80211/patches/build/120-headers_version_fix.patch b/package/kernel/mac80211/patches/build/120-headers_version_fix.patch
index 9a8c4749b2..21cf0b3134 100644
--- a/package/kernel/mac80211/patches/build/120-headers_version_fix.patch
+++ b/package/kernel/mac80211/patches/build/120-headers_version_fix.patch
@@ -1,6 +1,6 @@
 --- a/backport-include/linux/random.h
 +++ b/backport-include/linux/random.h
-@@ -23,7 +23,7 @@ static inline u16 get_random_u16(void)
+@@ -15,7 +15,7 @@ static inline u16 get_random_u16(void)
  }
  #endif
  
diff --git a/package/kernel/mac80211/patches/build/200-Revert-wifi-iwlwifi-Use-generic-thermal_zone_get_tri.patch b/package/kernel/mac80211/patches/build/200-Revert-wifi-iwlwifi-Use-generic-thermal_zone_get_tri.patch
deleted file mode 100644
index 3a5285d2f3..0000000000
--- a/package/kernel/mac80211/patches/build/200-Revert-wifi-iwlwifi-Use-generic-thermal_zone_get_tri.patch
+++ /dev/null
@@ -1,159 +0,0 @@
-From: Felix Fietkau <nbd@nbd.name>
-Date: Mon, 17 Apr 2023 19:42:38 +0200
-Subject: [PATCH] Revert "wifi: iwlwifi: Use generic thermal_zone_get_trip()
- function"
-
-This reverts commit 3d2f20ad46f83b333025f5e8e4afc34be8f13c4c.
----
-
---- a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
-@@ -531,7 +531,7 @@ struct iwl_mvm_tt_mgmt {
-  * @tzone: thermal zone device data
- */
- struct iwl_mvm_thermal_device {
--	struct thermal_trip trips[IWL_MAX_DTS_TRIPS];
-+	s16 temp_trips[IWL_MAX_DTS_TRIPS];
- 	u8 fw_trips_index[IWL_MAX_DTS_TRIPS];
- 	struct thermal_zone_device *tzone;
- };
---- a/drivers/net/wireless/intel/iwlwifi/mvm/tt.c
-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/tt.c
-@@ -573,11 +573,11 @@ int iwl_mvm_send_temp_report_ths_cmd(str
- 	 * and uncompressed, the FW should get it compressed and sorted
- 	 */
- 
--	/* compress trips to cmd array, remove uninitialized values*/
-+	/* compress temp_trips to cmd array, remove uninitialized values*/
- 	for (i = 0; i < IWL_MAX_DTS_TRIPS; i++) {
--		if (mvm->tz_device.trips[i].temperature != INT_MIN) {
-+		if (mvm->tz_device.temp_trips[i] != S16_MIN) {
- 			cmd.thresholds[idx++] =
--				cpu_to_le16((s16)(mvm->tz_device.trips[i].temperature / 1000));
-+				cpu_to_le16(mvm->tz_device.temp_trips[i]);
- 		}
- 	}
- 	cmd.num_temps = cpu_to_le32(idx);
-@@ -593,8 +593,8 @@ int iwl_mvm_send_temp_report_ths_cmd(str
- 	 */
- 	for (i = 0; i < idx; i++) {
- 		for (j = 0; j < IWL_MAX_DTS_TRIPS; j++) {
--			if ((int)(le16_to_cpu(cmd.thresholds[i]) * 1000) ==
--			    mvm->tz_device.trips[j].temperature)
-+			if (le16_to_cpu(cmd.thresholds[i]) ==
-+				mvm->tz_device.temp_trips[j])
- 				mvm->tz_device.fw_trips_index[i] = j;
- 		}
- 	}
-@@ -638,12 +638,37 @@ out:
- 	return ret;
- }
- 
-+static int iwl_mvm_tzone_get_trip_temp(struct thermal_zone_device *device,
-+				       int trip, int *temp)
-+{
-+	struct iwl_mvm *mvm = (struct iwl_mvm *)device->devdata;
-+
-+	if (trip < 0 || trip >= IWL_MAX_DTS_TRIPS)
-+		return -EINVAL;
-+
-+	*temp = mvm->tz_device.temp_trips[trip] * 1000;
-+
-+	return 0;
-+}
-+
-+static int iwl_mvm_tzone_get_trip_type(struct thermal_zone_device *device,
-+				       int trip, enum thermal_trip_type *type)
-+{
-+	if (trip < 0 || trip >= IWL_MAX_DTS_TRIPS)
-+		return -EINVAL;
-+
-+	*type = THERMAL_TRIP_PASSIVE;
-+
-+	return 0;
-+}
-+
- static int iwl_mvm_tzone_set_trip_temp(struct thermal_zone_device *device,
- 				       int trip, int temp)
- {
- 	struct iwl_mvm *mvm = thermal_zone_device_priv(device);
- 	struct iwl_mvm_thermal_device *tzone;
--	int ret;
-+	int i, ret;
-+	s16 temperature;
- 
- 	mutex_lock(&mvm->mutex);
- 
-@@ -653,17 +678,40 @@ static int iwl_mvm_tzone_set_trip_temp(s
- 		goto out;
- 	}
- 
-+	if (trip < 0 || trip >= IWL_MAX_DTS_TRIPS) {
-+		ret = -EINVAL;
-+		goto out;
-+	}
-+
- 	if ((temp / 1000) > S16_MAX) {
- 		ret = -EINVAL;
- 		goto out;
- 	}
- 
-+	temperature = (s16)(temp / 1000);
- 	tzone = &mvm->tz_device;
-+
- 	if (!tzone) {
- 		ret = -EIO;
- 		goto out;
- 	}
- 
-+	/* no updates*/
-+	if (tzone->temp_trips[trip] == temperature) {
-+		ret = 0;
-+		goto out;
-+	}
-+
-+	/* already existing temperature */
-+	for (i = 0; i < IWL_MAX_DTS_TRIPS; i++) {
-+		if (tzone->temp_trips[i] == temperature) {
-+			ret = -EINVAL;
-+			goto out;
-+		}
-+	}
-+
-+	tzone->temp_trips[trip] = temperature;
-+
- 	ret = iwl_mvm_send_temp_report_ths_cmd(mvm);
- out:
- 	mutex_unlock(&mvm->mutex);
-@@ -672,6 +720,8 @@ out:
- 
- static  struct thermal_zone_device_ops tzone_ops = {
- 	.get_temp = iwl_mvm_tzone_get_temp,
-+	.get_trip_temp = iwl_mvm_tzone_get_trip_temp,
-+	.get_trip_type = iwl_mvm_tzone_get_trip_type,
- 	.set_trip_temp = iwl_mvm_tzone_set_trip_temp,
- };
- 
-@@ -693,8 +743,7 @@ static void iwl_mvm_thermal_zone_registe
- 	BUILD_BUG_ON(ARRAY_SIZE(name) >= THERMAL_NAME_LENGTH);
- 
- 	sprintf(name, "iwlwifi_%u", atomic_inc_return(&counter) & 0xFF);
--	mvm->tz_device.tzone = thermal_zone_device_register_with_trips(name,
--							mvm->tz_device.trips,
-+	mvm->tz_device.tzone = thermal_zone_device_register(name,
- 							IWL_MAX_DTS_TRIPS,
- 							IWL_WRITABLE_TRIPS_MSK,
- 							mvm, &tzone_ops,
-@@ -717,10 +766,8 @@ static void iwl_mvm_thermal_zone_registe
- 	/* 0 is a valid temperature,
- 	 * so initialize the array with S16_MIN which invalid temperature
- 	 */
--	for (i = 0 ; i < IWL_MAX_DTS_TRIPS; i++) {
--		mvm->tz_device.trips[i].temperature = INT_MIN;
--		mvm->tz_device.trips[i].type = THERMAL_TRIP_PASSIVE;
--	}
-+	for (i = 0 ; i < IWL_MAX_DTS_TRIPS; i++)
-+		mvm->tz_device.temp_trips[i] = S16_MIN;
- }
- 
- static int iwl_mvm_tcool_get_max_state(struct thermal_cooling_device *cdev,
diff --git a/package/kernel/mac80211/patches/build/200-iwlwifi_thermal_backport.patch b/package/kernel/mac80211/patches/build/200-iwlwifi_thermal_backport.patch
new file mode 100644
index 0000000000..ad398d4d9d
--- /dev/null
+++ b/package/kernel/mac80211/patches/build/200-iwlwifi_thermal_backport.patch
@@ -0,0 +1,26 @@
+--- a/drivers/net/wireless/intel/iwlwifi/mvm/tt.c
++++ b/drivers/net/wireless/intel/iwlwifi/mvm/tt.c
+@@ -689,13 +689,23 @@ static void iwl_mvm_thermal_zone_registe
+ 	for (i = 0 ; i < IWL_MAX_DTS_TRIPS; i++) {
+ 		mvm->tz_device.trips[i].temperature = THERMAL_TEMP_INVALID;
+ 		mvm->tz_device.trips[i].type = THERMAL_TRIP_PASSIVE;
++#if LINUX_VERSION_IS_GEQ(6,9,0)
+ 		mvm->tz_device.trips[i].flags = THERMAL_TRIP_FLAG_RW_TEMP;
++#endif
+ 	}
++#if LINUX_VERSION_IS_GEQ(6,9,0)
+ 	mvm->tz_device.tzone = thermal_zone_device_register_with_trips(name,
+ 							mvm->tz_device.trips,
+ 							IWL_MAX_DTS_TRIPS,
+ 							mvm, &tzone_ops,
+ 							NULL, 0, 0);
++#else
++	mvm->tz_device.tzone = thermal_zone_device_register_with_trips(name,
++							mvm->tz_device.trips,
++							IWL_MAX_DTS_TRIPS, 0,
++							mvm, &tzone_ops,
++							NULL, 0, 0);
++#endif
+ 	if (IS_ERR(mvm->tz_device.tzone)) {
+ 		IWL_DEBUG_TEMP(mvm,
+ 			       "Failed to register to thermal zone (err = %ld)\n",
diff --git a/package/kernel/mac80211/patches/build/240-backport_genl_split_ops.patch b/package/kernel/mac80211/patches/build/210-backport_genl_split_ops.patch
index b22804cf92..d9d6b8a75b 100644
--- a/package/kernel/mac80211/patches/build/240-backport_genl_split_ops.patch
+++ b/package/kernel/mac80211/patches/build/210-backport_genl_split_ops.patch
@@ -1,31 +1,31 @@
 --- a/net/wireless/nl80211.c
 +++ b/net/wireless/nl80211.c
-@@ -16442,8 +16442,14 @@ static u32 nl80211_internal_flags[] = {
+@@ -16383,9 +16383,14 @@ static u32 nl80211_internal_flags[] = {
  #undef SELECTOR
  };
  
 +#if LINUX_VERSION_IS_LESS(6,2,0)
- static int nl80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb,
- 			    struct genl_info *info)
-+#else
-+static int nl80211_pre_doit(const struct genl_split_ops *ops,
-+			    struct sk_buff *skb,
++static int nl80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb,
 +			    struct genl_info *info)
++#else
+ static int nl80211_pre_doit(const struct genl_split_ops *ops,
+ 			    struct sk_buff *skb,
+ 			    struct genl_info *info)
 +#endif
  {
  	struct cfg80211_registered_device *rdev = NULL;
  	struct wireless_dev *wdev = NULL;
-@@ -16543,8 +16549,14 @@ out_unlock:
+@@ -16485,9 +16490,14 @@ out_unlock:
  	return err;
  }
  
 +#if LINUX_VERSION_IS_LESS(6,2,0)
- static void nl80211_post_doit(const struct genl_ops *ops, struct sk_buff *skb,
- 			      struct genl_info *info)
-+#else
-+static void nl80211_post_doit(const struct genl_split_ops *ops,
-+			      struct sk_buff *skb,
++static void nl80211_post_doit(const struct genl_ops *ops, struct sk_buff *skb,
 +			      struct genl_info *info)
++#else
+ static void nl80211_post_doit(const struct genl_split_ops *ops,
+ 			      struct sk_buff *skb,
+ 			      struct genl_info *info)
 +#endif
  {
  	u32 internal_flags = nl80211_internal_flags[ops->internal_flags];
diff --git a/package/kernel/mac80211/patches/build/210-revert-split-op.patch b/package/kernel/mac80211/patches/build/210-revert-split-op.patch
deleted file mode 100644
index 4f1f8a7795..0000000000
--- a/package/kernel/mac80211/patches/build/210-revert-split-op.patch
+++ /dev/null
@@ -1,22 +0,0 @@
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -16442,8 +16442,7 @@ static u32 nl80211_internal_flags[] = {
- #undef SELECTOR
- };
- 
--static int nl80211_pre_doit(const struct genl_split_ops *ops,
--			    struct sk_buff *skb,
-+static int nl80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb,
- 			    struct genl_info *info)
- {
- 	struct cfg80211_registered_device *rdev = NULL;
-@@ -16544,8 +16543,7 @@ out_unlock:
- 	return err;
- }
- 
--static void nl80211_post_doit(const struct genl_split_ops *ops,
--			      struct sk_buff *skb,
-+static void nl80211_post_doit(const struct genl_ops *ops, struct sk_buff *skb,
- 			      struct genl_info *info)
- {
- 	u32 internal_flags = nl80211_internal_flags[ops->internal_flags];
diff --git a/package/kernel/mac80211/patches/build/230-backport_genl_info_userhdr.patch b/package/kernel/mac80211/patches/build/230-backport_genl_info_userhdr.patch
deleted file mode 100644
index 38f86dc37a..0000000000
--- a/package/kernel/mac80211/patches/build/230-backport_genl_info_userhdr.patch
+++ /dev/null
@@ -1,32 +0,0 @@
---- a/backport-include/net/genetlink.h
-+++ b/backport-include/net/genetlink.h
-@@ -3,6 +3,7 @@
- #include_next <net/genetlink.h>
- #include <linux/version.h>
- 
-+#if LINUX_VERSION_IS_LESS(4,12,0)
- static inline void __bp_genl_info_userhdr_set(struct genl_info *info,
- 					      void *userhdr)
- {
-@@ -14,7 +15,6 @@ static inline void *__bp_genl_info_userh
- 	return info->userhdr;
- }
- 
--#if LINUX_VERSION_IS_LESS(4,12,0)
- #define GENL_SET_ERR_MSG(info, msg) NL_SET_ERR_MSG(genl_info_extack(info), msg)
- 
- static inline int genl_err_attr(struct genl_info *info, int err,
-@@ -44,11 +44,13 @@ static inline struct netlink_ext_ack *ge
- #endif
- }
- 
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- /* this gets put in place of info->userhdr, since we use that above */
- static inline void *genl_info_userhdr(struct genl_info *info)
- {
- 	return (u8 *)info->genlhdr + GENL_HDRLEN;
- }
-+#endif
- 
- #if LINUX_VERSION_IS_LESS(4,10,0)
- #define __genl_ro_after_init
diff --git a/package/kernel/mac80211/patches/build/230-brcmfmac_usb_driver_backport.patch b/package/kernel/mac80211/patches/build/230-brcmfmac_usb_driver_backport.patch
new file mode 100644
index 0000000000..daeea38372
--- /dev/null
+++ b/package/kernel/mac80211/patches/build/230-brcmfmac_usb_driver_backport.patch
@@ -0,0 +1,14 @@
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c
+@@ -1581,7 +1581,11 @@ static int brcmf_usb_reset_device(struct
+ 
+ void brcmf_usb_exit(void)
+ {
++#if LINUX_VERSION_IS_GEQ(6,8,0)
+ 	struct device_driver *drv = &brcmf_usbdrvr.driver;
++#else
++	struct device_driver *drv = &brcmf_usbdrvr.drvwrap.driver;
++#endif
+ 	int ret;
+ 
+ 	brcmf_dbg(USB, "Enter\n");
diff --git a/package/kernel/mac80211/patches/build/250-backport_iwlwifi_thermal.patch b/package/kernel/mac80211/patches/build/250-backport_iwlwifi_thermal.patch
deleted file mode 100644
index 631fdd710d..0000000000
--- a/package/kernel/mac80211/patches/build/250-backport_iwlwifi_thermal.patch
+++ /dev/null
@@ -1,160 +0,0 @@
---- a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
-@@ -531,7 +531,11 @@ struct iwl_mvm_tt_mgmt {
-  * @tzone: thermal zone device data
- */
- struct iwl_mvm_thermal_device {
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	s16 temp_trips[IWL_MAX_DTS_TRIPS];
-+#else
-+	struct thermal_trip trips[IWL_MAX_DTS_TRIPS];
-+#endif
- 	u8 fw_trips_index[IWL_MAX_DTS_TRIPS];
- 	struct thermal_zone_device *tzone;
- };
---- a/drivers/net/wireless/intel/iwlwifi/mvm/tt.c
-+++ b/drivers/net/wireless/intel/iwlwifi/mvm/tt.c
-@@ -573,6 +573,7 @@ int iwl_mvm_send_temp_report_ths_cmd(str
- 	 * and uncompressed, the FW should get it compressed and sorted
- 	 */
- 
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	/* compress temp_trips to cmd array, remove uninitialized values*/
- 	for (i = 0; i < IWL_MAX_DTS_TRIPS; i++) {
- 		if (mvm->tz_device.temp_trips[i] != S16_MIN) {
-@@ -580,6 +581,15 @@ int iwl_mvm_send_temp_report_ths_cmd(str
- 				cpu_to_le16(mvm->tz_device.temp_trips[i]);
- 		}
- 	}
-+#else
-+	/* compress trips to cmd array, remove uninitialized values*/
-+	for (i = 0; i < IWL_MAX_DTS_TRIPS; i++) {
-+		if (mvm->tz_device.trips[i].temperature != INT_MIN) {
-+			cmd.thresholds[idx++] =
-+				cpu_to_le16((s16)(mvm->tz_device.trips[i].temperature / 1000));
-+		}
-+	}
-+#endif
- 	cmd.num_temps = cpu_to_le32(idx);
- 
- 	if (!idx)
-@@ -593,8 +603,13 @@ int iwl_mvm_send_temp_report_ths_cmd(str
- 	 */
- 	for (i = 0; i < idx; i++) {
- 		for (j = 0; j < IWL_MAX_DTS_TRIPS; j++) {
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 			if (le16_to_cpu(cmd.thresholds[i]) ==
- 				mvm->tz_device.temp_trips[j])
-+#else
-+			if ((int)(le16_to_cpu(cmd.thresholds[i]) * 1000) ==
-+				mvm->tz_device.trips[j].temperature)
-+#endif
- 				mvm->tz_device.fw_trips_index[i] = j;
- 		}
- 	}
-@@ -638,6 +653,7 @@ out:
- 	return ret;
- }
- 
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- static int iwl_mvm_tzone_get_trip_temp(struct thermal_zone_device *device,
- 				       int trip, int *temp)
- {
-@@ -661,14 +677,19 @@ static int iwl_mvm_tzone_get_trip_type(s
- 
- 	return 0;
- }
-+#endif
- 
- static int iwl_mvm_tzone_set_trip_temp(struct thermal_zone_device *device,
- 				       int trip, int temp)
- {
- 	struct iwl_mvm *mvm = thermal_zone_device_priv(device);
- 	struct iwl_mvm_thermal_device *tzone;
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	int i, ret;
- 	s16 temperature;
-+#else
-+	int ret;
-+#endif
- 
- 	mutex_lock(&mvm->mutex);
- 
-@@ -678,17 +699,21 @@ static int iwl_mvm_tzone_set_trip_temp(s
- 		goto out;
- 	}
- 
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	if (trip < 0 || trip >= IWL_MAX_DTS_TRIPS) {
- 		ret = -EINVAL;
- 		goto out;
- 	}
-+#endif
- 
- 	if ((temp / 1000) > S16_MAX) {
- 		ret = -EINVAL;
- 		goto out;
- 	}
- 
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	temperature = (s16)(temp / 1000);
-+#endif
- 	tzone = &mvm->tz_device;
- 
- 	if (!tzone) {
-@@ -696,6 +721,7 @@ static int iwl_mvm_tzone_set_trip_temp(s
- 		goto out;
- 	}
- 
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	/* no updates*/
- 	if (tzone->temp_trips[trip] == temperature) {
- 		ret = 0;
-@@ -711,6 +737,7 @@ static int iwl_mvm_tzone_set_trip_temp(s
- 	}
- 
- 	tzone->temp_trips[trip] = temperature;
-+#endif
- 
- 	ret = iwl_mvm_send_temp_report_ths_cmd(mvm);
- out:
-@@ -720,8 +747,10 @@ out:
- 
- static  struct thermal_zone_device_ops tzone_ops = {
- 	.get_temp = iwl_mvm_tzone_get_temp,
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	.get_trip_temp = iwl_mvm_tzone_get_trip_temp,
- 	.get_trip_type = iwl_mvm_tzone_get_trip_type,
-+#endif
- 	.set_trip_temp = iwl_mvm_tzone_set_trip_temp,
- };
- 
-@@ -743,7 +772,12 @@ static void iwl_mvm_thermal_zone_registe
- 	BUILD_BUG_ON(ARRAY_SIZE(name) >= THERMAL_NAME_LENGTH);
- 
- 	sprintf(name, "iwlwifi_%u", atomic_inc_return(&counter) & 0xFF);
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	mvm->tz_device.tzone = thermal_zone_device_register(name,
-+#else
-+	mvm->tz_device.tzone = thermal_zone_device_register_with_trips(name,
-+							mvm->tz_device.trips,
-+#endif
- 							IWL_MAX_DTS_TRIPS,
- 							IWL_WRITABLE_TRIPS_MSK,
- 							mvm, &tzone_ops,
-@@ -766,8 +800,15 @@ static void iwl_mvm_thermal_zone_registe
- 	/* 0 is a valid temperature,
- 	 * so initialize the array with S16_MIN which invalid temperature
- 	 */
-+#if LINUX_VERSION_IS_LESS(6,6,0)
- 	for (i = 0 ; i < IWL_MAX_DTS_TRIPS; i++)
- 		mvm->tz_device.temp_trips[i] = S16_MIN;
-+#else
-+	for (i = 0 ; i < IWL_MAX_DTS_TRIPS; i++) {
-+		mvm->tz_device.trips[i].temperature = INT_MIN;
-+		mvm->tz_device.trips[i].type = THERMAL_TRIP_PASSIVE;
-+	}
-+#endif
- }
- 
- static int iwl_mvm_tcool_get_max_state(struct thermal_cooling_device *cdev,
diff --git a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
index 11536651b5..fb774b5201 100644
--- a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+++ b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/marvell/mwl8k.c
 +++ b/drivers/net/wireless/marvell/mwl8k.c
-@@ -5703,6 +5703,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
+@@ -5707,6 +5707,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
  MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  
  static const struct pci_device_id mwl8k_pci_id_table[] = {
diff --git a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
index c8d24283aa..06edc441ec 100644
--- a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+++ b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/marvell/mwl8k.c
 +++ b/drivers/net/wireless/marvell/mwl8k.c
-@@ -6289,6 +6289,8 @@ static int mwl8k_probe(struct pci_dev *p
+@@ -6293,6 +6293,8 @@ static int mwl8k_probe(struct pci_dev *p
  
  	priv->running_bsses = 0;
  
@@ -9,7 +9,7 @@
  	return rc;
  
  err_stop_firmware:
-@@ -6322,8 +6324,6 @@ static void mwl8k_remove(struct pci_dev
+@@ -6326,8 +6328,6 @@ static void mwl8k_remove(struct pci_dev
  		return;
  	priv = hw->priv;
  
diff --git a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
index f4d97eeee2..a7ecabde82 100644
--- a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+++ b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
@@ -139,7 +139,7 @@ Signed-off-by: Pali Rohár <pali@kernel.org>
  			mwifiex_init_fw_complete(adapter);
  			return -1;
  		} else if (adapter->last_init_cmd == cmdresp_no)
-@@ -1273,8 +1353,8 @@ mwifiex_process_sleep_confirm_resp(struc
+@@ -1265,8 +1345,8 @@ mwifiex_process_sleep_confirm_resp(struc
  
  	if (command != HostCmd_CMD_802_11_PS_MODE_ENH) {
  		mwifiex_dbg(adapter, ERROR,
@@ -152,7 +152,7 @@ Signed-off-by: Pali Rohár <pali@kernel.org>
  
 --- a/drivers/net/wireless/marvell/mwifiex/main.h
 +++ b/drivers/net/wireless/marvell/mwifiex/main.h
-@@ -1086,6 +1086,8 @@ void mwifiex_cancel_all_pending_cmd(stru
+@@ -1084,6 +1084,8 @@ void mwifiex_cancel_all_pending_cmd(stru
  void mwifiex_cancel_pending_scan_cmd(struct mwifiex_adapter *adapter);
  void mwifiex_cancel_scan(struct mwifiex_adapter *adapter);
  
diff --git a/package/kernel/mac80211/patches/rt2x00/002-v6.7-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch b/package/kernel/mac80211/patches/rt2x00/002-v6.7-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch
deleted file mode 100644
index ffb66559d1..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/002-v6.7-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 2ecfe6f07e8e6257cad3d3290c5aec2102120041 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Sat, 23 Sep 2023 09:01:01 +0800
-Subject: wifi: rt2x00: fix MT7620 low RSSI issue
-
-On Mediatek vendor driver[1], MT7620 (RT6352) uses different RSSI
-base value '-2' compared to the other RT2x00 chips. This patch
-introduces the SoC specific base value to fix the low RSSI value
-reports on MT7620.
-
-[1] Found on MT76x2E_MT7620_LinuxAP_V3.0.4.0_P3 ConvertToRssi().
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB031571CDB146C414A908A66DBCFEA@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -856,6 +856,7 @@ static int rt2800_agc_to_rssi(struct rt2
- 	s8 rssi0 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI0);
- 	s8 rssi1 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI1);
- 	s8 rssi2 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI2);
-+	s8 base_val = rt2x00_rt(rt2x00dev, RT6352) ? -2 : -12;
- 	u16 eeprom;
- 	u8 offset0;
- 	u8 offset1;
-@@ -880,9 +881,9 @@ static int rt2800_agc_to_rssi(struct rt2
- 	 * If the value in the descriptor is 0, it is considered invalid
- 	 * and the default (extremely low) rssi value is assumed
- 	 */
--	rssi0 = (rssi0) ? (-12 - offset0 - rt2x00dev->lna_gain - rssi0) : -128;
--	rssi1 = (rssi1) ? (-12 - offset1 - rt2x00dev->lna_gain - rssi1) : -128;
--	rssi2 = (rssi2) ? (-12 - offset2 - rt2x00dev->lna_gain - rssi2) : -128;
-+	rssi0 = (rssi0) ? (base_val - offset0 - rt2x00dev->lna_gain - rssi0) : -128;
-+	rssi1 = (rssi1) ? (base_val - offset1 - rt2x00dev->lna_gain - rssi1) : -128;
-+	rssi2 = (rssi2) ? (base_val - offset2 - rt2x00dev->lna_gain - rssi2) : -128;
- 
- 	/*
- 	 * mac80211 only accepts a single RSSI value. Calculating the
diff --git a/package/kernel/mac80211/patches/rt2x00/003-v6.7-wifi-rt2x00-fix-rt2800-watchdog-function.patch b/package/kernel/mac80211/patches/rt2x00/003-v6.7-wifi-rt2x00-fix-rt2800-watchdog-function.patch
deleted file mode 100644
index f253dacf2b..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/003-v6.7-wifi-rt2x00-fix-rt2800-watchdog-function.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 69708fbb2c698f262e03360d064c7066e0679953 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Sat, 14 Oct 2023 14:55:01 +0800
-Subject: wifi: rt2x00: fix rt2800 watchdog function
-
-The watchdog function is broken on rt2800 series SoCs. This patch
-fixes the incorrect watchdog logic to make it work again.
-
-1. Update current wdt queue index if it's not equal to the previous
-   index. Watchdog compares the current and previous queue index to
-   judge if the queue hung.
-2. Make sure hung_{rx,tx} 'true' status won't be override by the
-   normal queue. Any queue hangs should trigger a reset action.
-3. Clear the watchdog counter of all queues before resetting the
-   hardware. This change may help to avoid the reset loop.
-4. Change hang check function return type to bool as we only need
-   to return two status, yes or no.
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB0315BC1D83D31154924F0D39BCD1A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 17 +++++++++++------
- 1 file changed, 11 insertions(+), 6 deletions(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -1237,13 +1237,14 @@ void rt2800_txdone_nostatus(struct rt2x0
- }
- EXPORT_SYMBOL_GPL(rt2800_txdone_nostatus);
- 
--static int rt2800_check_hung(struct data_queue *queue)
-+static bool rt2800_check_hung(struct data_queue *queue)
- {
- 	unsigned int cur_idx = rt2800_drv_get_dma_done(queue);
- 
--	if (queue->wd_idx != cur_idx)
-+	if (queue->wd_idx != cur_idx) {
-+		queue->wd_idx = cur_idx;
- 		queue->wd_count = 0;
--	else
-+	} else
- 		queue->wd_count++;
- 
- 	return queue->wd_count > 16;
-@@ -1280,7 +1281,7 @@ void rt2800_watchdog(struct rt2x00_dev *
- 		case QID_MGMT:
- 			if (rt2x00queue_empty(queue))
- 				continue;
--			hung_tx = rt2800_check_hung(queue);
-+			hung_tx = hung_tx || rt2800_check_hung(queue);
- 			break;
- 		case QID_RX:
- 			/* For station mode we should reactive at least
-@@ -1289,7 +1290,7 @@ void rt2800_watchdog(struct rt2x00_dev *
- 			 */
- 			if (rt2x00dev->intf_sta_count == 0)
- 				continue;
--			hung_rx = rt2800_check_hung(queue);
-+			hung_rx = hung_rx || rt2800_check_hung(queue);
- 			break;
- 		default:
- 			break;
-@@ -1302,8 +1303,12 @@ void rt2800_watchdog(struct rt2x00_dev *
- 	if (hung_rx)
- 		rt2x00_warn(rt2x00dev, "Watchdog RX hung detected\n");
- 
--	if (hung_tx || hung_rx)
-+	if (hung_tx || hung_rx) {
-+		queue_for_each(rt2x00dev, queue)
-+			queue->wd_count = 0;
-+
- 		ieee80211_restart_hw(rt2x00dev->hw);
-+	}
- }
- EXPORT_SYMBOL_GPL(rt2800_watchdog);
- 
diff --git a/package/kernel/mac80211/patches/rt2x00/004-1-v6.7-wifi-rt2x00-improve-MT7620-register-initialization.patch b/package/kernel/mac80211/patches/rt2x00/004-1-v6.7-wifi-rt2x00-improve-MT7620-register-initialization.patch
deleted file mode 100644
index 9f4dbb8346..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/004-1-v6.7-wifi-rt2x00-improve-MT7620-register-initialization.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From 1ffe76d5ae78553948d67a978acd9945c2f0a175 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Thu, 19 Oct 2023 19:58:56 +0800
-Subject: wifi: rt2x00: improve MT7620 register initialization
-
-1. Do not hard reset the BBP. We can use soft reset instead. This
-   change has some help to the calibration failure issue.
-2. Enable falling back to legacy rate from the HT/RTS rate by
-   setting the HT_FBK_TO_LEGACY register.
-3. Implement MCS rate specific maximum PSDU size. It can improve
-   the transmission quality under the low RSSI condition.
-4. Set BBP_84 register value to 0x19. This is used for extension
-   channel overlapping IOT.
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB031553CCD4B7A3B89C85935DBCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800.h     | 18 ++++++++++++++++++
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c  | 24 ++++++++++++++++++++++++
- drivers/net/wireless/ralink/rt2x00/rt2800mmio.c |  3 +++
- 3 files changed, 45 insertions(+)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
-@@ -871,6 +871,18 @@
- #define LED_CFG_LED_POLAR		FIELD32(0x40000000)
- 
- /*
-+ * AMPDU_MAX_LEN_20M1S: Per MCS max A-MPDU length, 20 MHz, MCS 0-7
-+ * AMPDU_MAX_LEN_20M2S: Per MCS max A-MPDU length, 20 MHz, MCS 8-15
-+ * AMPDU_MAX_LEN_40M1S: Per MCS max A-MPDU length, 40 MHz, MCS 0-7
-+ * AMPDU_MAX_LEN_40M2S: Per MCS max A-MPDU length, 40 MHz, MCS 8-15
-+ * Maximum A-MPDU length = 2^(AMPDU_MAX - 5) kilobytes
-+ */
-+#define AMPDU_MAX_LEN_20M1S		0x1030
-+#define AMPDU_MAX_LEN_20M2S		0x1034
-+#define AMPDU_MAX_LEN_40M1S		0x1038
-+#define AMPDU_MAX_LEN_40M2S		0x103C
-+
-+/*
-  * AMPDU_BA_WINSIZE: Force BlockAck window size
-  * FORCE_WINSIZE_ENABLE:
-  *   0: Disable forcing of BlockAck window size
-@@ -1545,6 +1557,12 @@
-  */
- #define EXP_ACK_TIME			0x1380
- 
-+/*
-+ * HT_FBK_TO_LEGACY: Enable/Disable HT/RTS fallback to OFDM/CCK rate
-+ * Not available for legacy SoCs
-+ */
-+#define HT_FBK_TO_LEGACY		0x1384
-+
- /* TX_PWR_CFG_5 */
- #define TX_PWR_CFG_5			0x1384
- #define TX_PWR_CFG_5_MCS16_CH0		FIELD32(0x0000000f)
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -5851,6 +5851,7 @@ static int rt2800_init_registers(struct
- 	struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
- 	u32 reg;
- 	u16 eeprom;
-+	u8 bbp;
- 	unsigned int i;
- 	int ret;
- 
-@@ -5860,6 +5861,19 @@ static int rt2800_init_registers(struct
- 	if (ret)
- 		return ret;
- 
-+	if (rt2x00_rt(rt2x00dev, RT6352)) {
-+		rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x01);
-+
-+		bbp = rt2800_bbp_read(rt2x00dev, 21);
-+		bbp |= 0x01;
-+		rt2800_bbp_write(rt2x00dev, 21, bbp);
-+		bbp = rt2800_bbp_read(rt2x00dev, 21);
-+		bbp &= (~0x01);
-+		rt2800_bbp_write(rt2x00dev, 21, bbp);
-+
-+		rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00);
-+	}
-+
- 	rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
- 	rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
- 
-@@ -6013,6 +6027,14 @@ static int rt2800_init_registers(struct
- 		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
- 		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
- 		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-+
-+		rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_20M1S, 0x77754433);
-+		rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_20M2S, 0x77765543);
-+		rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_40M1S, 0x77765544);
-+		rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_40M2S, 0x77765544);
-+
-+		rt2800_register_write(rt2x00dev, HT_FBK_TO_LEGACY, 0x1010);
-+
- 	} else {
- 		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
- 		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
-@@ -7231,6 +7253,8 @@ static void rt2800_init_bbp_6352(struct
- 	rt2800_bbp_dcoc_write(rt2x00dev, 159, 0x64);
- 
- 	rt2800_bbp4_mac_if_ctrl(rt2x00dev);
-+
-+	rt2800_bbp_write(rt2x00dev, 84, 0x19);
- }
- 
- static void rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
---- a/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
-@@ -760,6 +760,9 @@ int rt2800mmio_init_registers(struct rt2
- 
- 	rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
- 
-+	if (rt2x00_rt(rt2x00dev, RT6352))
-+		return 0;
-+
- 	reg = 0;
- 	rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
- 	rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
diff --git a/package/kernel/mac80211/patches/rt2x00/004-2-v6.7-wifi-rt2x00-rework-MT7620-channel-config-function.patch b/package/kernel/mac80211/patches/rt2x00/004-2-v6.7-wifi-rt2x00-rework-MT7620-channel-config-function.patch
deleted file mode 100644
index 1aec73d762..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/004-2-v6.7-wifi-rt2x00-rework-MT7620-channel-config-function.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From a28533c6be1711584bf3ec978309d5c590029821 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Thu, 19 Oct 2023 19:58:57 +0800
-Subject: wifi: rt2x00: rework MT7620 channel config function
-
-1. Move the channel configuration code from rt2800_vco_calibration()
-   to the rt2800_config_channel().
-2. Use MT7620 SoC specific AGC initial LNA value instead of the
-   RT5592's value.
-3. BBP{195,196} pairing write has been replaced with
-   rt2800_bbp_glrt_write() to reduce redundant code.
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB0315622A4340BFFA530B1B86BCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 91 ++++++++++----------------
- 1 file changed, 35 insertions(+), 56 deletions(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -3861,14 +3861,6 @@ static void rt2800_config_channel_rf7620
- 		rfcsr |= tx_agc_fc;
- 		rt2800_rfcsr_write_bank(rt2x00dev, 7, 59, rfcsr);
- 	}
--
--	if (conf_is_ht40(conf)) {
--		rt2800_bbp_glrt_write(rt2x00dev, 141, 0x10);
--		rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2f);
--	} else {
--		rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1a);
--		rt2800_bbp_glrt_write(rt2x00dev, 157, 0x40);
--	}
- }
- 
- static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
-@@ -4437,32 +4429,46 @@ static void rt2800_config_channel(struct
- 		usleep_range(1000, 1500);
- 	}
- 
--	if (rt2x00_rt(rt2x00dev, RT5592) || rt2x00_rt(rt2x00dev, RT6352)) {
--		reg = 0x10;
--		if (!conf_is_ht40(conf)) {
--			if (rt2x00_rt(rt2x00dev, RT6352) &&
--			    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
--				reg |= 0x5;
--			} else {
--				reg |= 0xa;
--			}
--		}
--		rt2800_bbp_write(rt2x00dev, 195, 141);
--		rt2800_bbp_write(rt2x00dev, 196, reg);
-+	if (rt2x00_rt(rt2x00dev, RT5592)) {
-+		bbp = conf_is_ht40(conf) ? 0x10 : 0x1a;
-+		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
- 
--		/* AGC init.
--		 * Despite the vendor driver using different values here for
--		 * RT6352 chip, we use 0x1c for now. This may have to be changed
--		 * once TSSI got implemented.
--		 */
--		reg = (rf->channel <= 14 ? 0x1c : 0x24) + 2*rt2x00dev->lna_gain;
--		rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg);
-+		bbp = (rf->channel <= 14 ? 0x1c : 0x24) + 2 * rt2x00dev->lna_gain;
-+		rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
- 
--		if (rt2x00_rt(rt2x00dev, RT5592))
--			rt2800_iq_calibrate(rt2x00dev, rf->channel);
-+		rt2800_iq_calibrate(rt2x00dev, rf->channel);
- 	}
- 
- 	if (rt2x00_rt(rt2x00dev, RT6352)) {
-+		/* BBP for GLRT BW */
-+		bbp = conf_is_ht40(conf) ?
-+		      0x10 : rt2x00_has_cap_external_lna_bg(rt2x00dev) ?
-+		      0x15 : 0x1a;
-+		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
-+
-+		bbp = conf_is_ht40(conf) ? 0x2f : 0x40;
-+		rt2800_bbp_glrt_write(rt2x00dev, 157, bbp);
-+
-+		if (rt2x00dev->default_ant.rx_chain_num == 1) {
-+			rt2800_bbp_write(rt2x00dev, 91, 0x07);
-+			rt2800_bbp_write(rt2x00dev, 95, 0x1a);
-+			rt2800_bbp_glrt_write(rt2x00dev, 128, 0xa0);
-+			rt2800_bbp_glrt_write(rt2x00dev, 170, 0x12);
-+			rt2800_bbp_glrt_write(rt2x00dev, 171, 0x10);
-+		} else {
-+			rt2800_bbp_write(rt2x00dev, 91, 0x06);
-+			rt2800_bbp_write(rt2x00dev, 95, 0x9a);
-+			rt2800_bbp_glrt_write(rt2x00dev, 128, 0xe0);
-+			rt2800_bbp_glrt_write(rt2x00dev, 170, 0x30);
-+			rt2800_bbp_glrt_write(rt2x00dev, 171, 0x30);
-+		}
-+
-+		/* AGC init */
-+		bbp = rf->channel <= 14 ? 0x04 + 2 * rt2x00dev->lna_gain : 0;
-+		rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
-+
-+		usleep_range(1000, 1500);
-+
- 		if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
- 			     &rt2x00dev->cap_flags)) {
- 			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
-@@ -5608,26 +5614,6 @@ void rt2800_vco_calibration(struct rt2x0
- 	rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
- 
- 	if (rt2x00_rt(rt2x00dev, RT6352)) {
--		if (rt2x00dev->default_ant.rx_chain_num == 1) {
--			rt2800_bbp_write(rt2x00dev, 91, 0x07);
--			rt2800_bbp_write(rt2x00dev, 95, 0x1A);
--			rt2800_bbp_write(rt2x00dev, 195, 128);
--			rt2800_bbp_write(rt2x00dev, 196, 0xA0);
--			rt2800_bbp_write(rt2x00dev, 195, 170);
--			rt2800_bbp_write(rt2x00dev, 196, 0x12);
--			rt2800_bbp_write(rt2x00dev, 195, 171);
--			rt2800_bbp_write(rt2x00dev, 196, 0x10);
--		} else {
--			rt2800_bbp_write(rt2x00dev, 91, 0x06);
--			rt2800_bbp_write(rt2x00dev, 95, 0x9A);
--			rt2800_bbp_write(rt2x00dev, 195, 128);
--			rt2800_bbp_write(rt2x00dev, 196, 0xE0);
--			rt2800_bbp_write(rt2x00dev, 195, 170);
--			rt2800_bbp_write(rt2x00dev, 196, 0x30);
--			rt2800_bbp_write(rt2x00dev, 195, 171);
--			rt2800_bbp_write(rt2x00dev, 196, 0x30);
--		}
--
- 		if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
- 			rt2800_bbp_write(rt2x00dev, 75, 0x68);
- 			rt2800_bbp_write(rt2x00dev, 76, 0x4C);
-@@ -5635,13 +5621,6 @@ void rt2800_vco_calibration(struct rt2x0
- 			rt2800_bbp_write(rt2x00dev, 80, 0x0C);
- 			rt2800_bbp_write(rt2x00dev, 82, 0xB6);
- 		}
--
--		/* On 11A, We should delay and wait RF/BBP to be stable
--		 * and the appropriate time should be 1000 micro seconds
--		 * 2005/06/05 - On 11G, we also need this delay time.
--		 * Otherwise it's difficult to pass the WHQL.
--		 */
--		usleep_range(1000, 1500);
- 	}
- }
- EXPORT_SYMBOL_GPL(rt2800_vco_calibration);
diff --git a/package/kernel/mac80211/patches/rt2x00/004-3-v6.7-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch b/package/kernel/mac80211/patches/rt2x00/004-3-v6.7-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch
deleted file mode 100644
index 64cd599c02..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/004-3-v6.7-wifi-rt2x00-rework-MT7620-PA-LNA-RF-calibration.patch
+++ /dev/null
@@ -1,241 +0,0 @@
-From cca74bed37af1c8217bcd8282d9b384efdbf73bd Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Thu, 19 Oct 2023 19:58:58 +0800
-Subject: wifi: rt2x00: rework MT7620 PA/LNA RF calibration
-
-1. Move MT7620 PA/LNA calibration code to dedicated functions.
-2. For external PA/LNA devices, restore RF and BBP registers before
-   R-Calibration.
-3. Do Rx DCOC calibration again before RXIQ calibration.
-4. Add some missing LNA related registers' initialization.
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB0315979F92DC563019B8F238BCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 176 +++++++++++++++++--------
- drivers/net/wireless/ralink/rt2x00/rt2x00.h    |   6 +
- 2 files changed, 130 insertions(+), 52 deletions(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -4468,41 +4468,6 @@ static void rt2800_config_channel(struct
- 		rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp);
- 
- 		usleep_range(1000, 1500);
--
--		if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
--			     &rt2x00dev->cap_flags)) {
--			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
--			reg |= 0x00000101;
--			rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
--
--			reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
--			reg |= 0x00000101;
--			rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
--
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
--			rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
--			rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
--
--			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
--					      0x36303636);
--			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
--					      0x6C6C6B6C);
--			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
--					      0x6C6C6B6C);
--		}
- 	}
- 
- 	bbp = rt2800_bbp_read(rt2x00dev, 4);
-@@ -5612,16 +5577,6 @@ void rt2800_vco_calibration(struct rt2x0
- 		}
- 	}
- 	rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
--
--	if (rt2x00_rt(rt2x00dev, RT6352)) {
--		if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
--			rt2800_bbp_write(rt2x00dev, 75, 0x68);
--			rt2800_bbp_write(rt2x00dev, 76, 0x4C);
--			rt2800_bbp_write(rt2x00dev, 79, 0x1C);
--			rt2800_bbp_write(rt2x00dev, 80, 0x0C);
--			rt2800_bbp_write(rt2x00dev, 82, 0xB6);
--		}
--	}
- }
- EXPORT_SYMBOL_GPL(rt2800_vco_calibration);
- 
-@@ -10348,6 +10303,128 @@ do_cal:
- 	rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
- }
- 
-+static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev)
-+{
-+	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
-+		rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0);
-+		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
-+	}
-+
-+	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x02);
-+	}
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xd3);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xb3);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xd5);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6c);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xfc);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1f);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xff);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1c);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6b);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xf7);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
-+	}
-+
-+	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
-+		rt2800_bbp_write(rt2x00dev, 75, 0x60);
-+		rt2800_bbp_write(rt2x00dev, 76, 0x44);
-+		rt2800_bbp_write(rt2x00dev, 79, 0x1c);
-+		rt2800_bbp_write(rt2x00dev, 80, 0x0c);
-+		rt2800_bbp_write(rt2x00dev, 82, 0xB6);
-+	}
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
-+		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x3630363a);
-+		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c666c);
-+		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c666c);
-+	}
-+}
-+
-+static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
-+{
-+	u32 reg;
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
-+	    rt2x00_has_cap_external_lna_bg(rt2x00dev))
-+		rt2800_restore_rf_bbp_rt6352(rt2x00dev);
-+
-+	rt2800_r_calibration(rt2x00dev);
-+	rt2800_rf_self_txdc_cal(rt2x00dev);
-+	rt2800_rxdcoc_calibration(rt2x00dev);
-+	rt2800_bw_filter_calibration(rt2x00dev, true);
-+	rt2800_bw_filter_calibration(rt2x00dev, false);
-+	rt2800_loft_iq_calibration(rt2x00dev);
-+
-+	/* missing DPD calibration for internal PA devices */
-+
-+	rt2800_rxdcoc_calibration(rt2x00dev);
-+	rt2800_rxiq_calibration(rt2x00dev);
-+
-+	if (!rt2x00_has_cap_external_pa(rt2x00dev) &&
-+	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
-+		return;
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
-+		reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
-+		reg |= 0x00000101;
-+		rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
-+
-+		reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
-+		reg |= 0x00000101;
-+		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
-+	}
-+
-+	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
-+	}
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xc8);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xa4);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xc8);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xa4);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xc8);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xa4);
-+		rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
-+	}
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev))
-+		rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
-+
-+	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
-+		rt2800_bbp_write(rt2x00dev, 75, 0x68);
-+		rt2800_bbp_write(rt2x00dev, 76, 0x4c);
-+		rt2800_bbp_write(rt2x00dev, 79, 0x1c);
-+		rt2800_bbp_write(rt2x00dev, 80, 0x0c);
-+		rt2800_bbp_write(rt2x00dev, 82, 0xb6);
-+	}
-+
-+	if (rt2x00_has_cap_external_pa(rt2x00dev)) {
-+		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x36303636);
-+		rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c6b6c);
-+		rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c6b6c);
-+	}
-+}
-+
- static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev)
- {
- 	/* Initialize RF central register to default value */
-@@ -10612,13 +10689,8 @@ static void rt2800_init_rfcsr_6352(struc
- 	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
- 	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
- 
--	rt2800_r_calibration(rt2x00dev);
--	rt2800_rf_self_txdc_cal(rt2x00dev);
--	rt2800_rxdcoc_calibration(rt2x00dev);
--	rt2800_bw_filter_calibration(rt2x00dev, true);
--	rt2800_bw_filter_calibration(rt2x00dev, false);
--	rt2800_loft_iq_calibration(rt2x00dev);
--	rt2800_rxiq_calibration(rt2x00dev);
-+	/* Do calibration and init PA/LNA */
-+	rt2800_calibration_rt6352(rt2x00dev);
- }
- 
- static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
---- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
-@@ -1263,6 +1263,12 @@ rt2x00_has_cap_external_lna_bg(struct rt
- }
- 
- static inline bool
-+rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev)
-+{
-+	return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0);
-+}
-+
-+static inline bool
- rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
- {
- 	return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);
diff --git a/package/kernel/mac80211/patches/rt2x00/005-1-v6.8-wifi-rt2x00-introduce-DMA-busy-check-watchdog-for-rt.patch b/package/kernel/mac80211/patches/rt2x00/005-1-v6.8-wifi-rt2x00-introduce-DMA-busy-check-watchdog-for-rt.patch
deleted file mode 100644
index c1c3225733..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/005-1-v6.8-wifi-rt2x00-introduce-DMA-busy-check-watchdog-for-rt.patch
+++ /dev/null
@@ -1,177 +0,0 @@
-From b1275cdd7456ef811747dfb4f3c46310ddd300cd Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Sat, 4 Nov 2023 16:57:58 +0800
-Subject: wifi: rt2x00: introduce DMA busy check watchdog for rt2800
-
-When I tried to fix the watchdog of rt2800, I found that sometimes
-the watchdog can not reset the hung device. This is because the
-queue is not completely stuck, it just becomes very slow. The MTK
-vendor driver for the new chip MT7603/MT7612 has a DMA busy watchdog
-to detect device hangs by checking DMA busy status. This watchdog
-implementation is something similar to it. To reduce unnecessary
-reset, we can check the INT_SOURCE_CSR register together as I found
-that when the radio hung, the RX/TX coherent interrupt will always
-stuck at triggered state.
-
-The 'watchdog' module parameter has been extended to control all
-watchdogs(0=disabled, 1=hang watchdog, 2=DMA watchdog, 3=both). This
-new watchdog function is a slight schedule and it won't affect the
-transmission speed. So we can turn on it by default. Due to the
-INT_SOURCE_CSR register is invalid on rt2800 USB NICs, the DMA busy
-watchdog will be automatically disabled for them.
-
-Tested on MT7620 and RT5350.
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB0315D7462CE08A119A99DE34BCA4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800.h    |  4 ++
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 77 ++++++++++++++++++++++----
- drivers/net/wireless/ralink/rt2x00/rt2x00.h    |  3 +
- 3 files changed, 73 insertions(+), 11 deletions(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
-@@ -3194,4 +3194,8 @@ enum rt2800_eeprom_word {
-  */
- #define BCN_TBTT_OFFSET 64
- 
-+/* Watchdog type mask */
-+#define RT2800_WATCHDOG_HANG		BIT(0)
-+#define RT2800_WATCHDOG_DMA_BUSY	BIT(1)
-+
- #endif /* RT2800_H */
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -30,9 +30,10 @@
- #include "rt2800lib.h"
- #include "rt2800.h"
- 
--static bool modparam_watchdog;
--module_param_named(watchdog, modparam_watchdog, bool, S_IRUGO);
--MODULE_PARM_DESC(watchdog, "Enable watchdog to detect tx/rx hangs and reset hardware if detected");
-+static unsigned int modparam_watchdog = RT2800_WATCHDOG_DMA_BUSY;
-+module_param_named(watchdog, modparam_watchdog, uint, 0444);
-+MODULE_PARM_DESC(watchdog, "Enable watchdog to recover tx/rx hangs.\n"
-+		 "\t\t(0=disabled, 1=hang watchdog, 2=DMA watchdog(default), 3=both)");
- 
- /*
-  * Register access.
-@@ -1261,15 +1262,12 @@ static void rt2800_update_survey(struct
- 	chan_survey->time_ext_busy += rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC);
- }
- 
--void rt2800_watchdog(struct rt2x00_dev *rt2x00dev)
-+static bool rt2800_watchdog_hung(struct rt2x00_dev *rt2x00dev)
- {
- 	struct data_queue *queue;
- 	bool hung_tx = false;
- 	bool hung_rx = false;
- 
--	if (test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
--		return;
--
- 	rt2800_update_survey(rt2x00dev);
- 
- 	queue_for_each(rt2x00dev, queue) {
-@@ -1297,18 +1295,72 @@ void rt2800_watchdog(struct rt2x00_dev *
- 		}
- 	}
- 
-+	if (!hung_tx && !hung_rx)
-+		return false;
-+
- 	if (hung_tx)
- 		rt2x00_warn(rt2x00dev, "Watchdog TX hung detected\n");
- 
- 	if (hung_rx)
- 		rt2x00_warn(rt2x00dev, "Watchdog RX hung detected\n");
- 
--	if (hung_tx || hung_rx) {
--		queue_for_each(rt2x00dev, queue)
--			queue->wd_count = 0;
-+	queue_for_each(rt2x00dev, queue)
-+		queue->wd_count = 0;
-+
-+	return true;
-+}
-+
-+static bool rt2800_watchdog_dma_busy(struct rt2x00_dev *rt2x00dev)
-+{
-+	bool busy_rx, busy_tx;
-+	u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
-+	u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
-+
-+	if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
-+	    rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT))
-+		rt2x00dev->rxdma_busy++;
-+	else
-+		rt2x00dev->rxdma_busy = 0;
- 
-+	if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
-+	    rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT))
-+		rt2x00dev->txdma_busy++;
-+	else
-+		rt2x00dev->txdma_busy = 0;
-+
-+	busy_rx = rt2x00dev->rxdma_busy > 30 ? true : false;
-+	busy_tx = rt2x00dev->txdma_busy > 30 ? true : false;
-+
-+	if (!busy_rx && !busy_tx)
-+		return false;
-+
-+	if (busy_rx)
-+		rt2x00_warn(rt2x00dev, "Watchdog RX DMA busy detected\n");
-+
-+	if (busy_tx)
-+		rt2x00_warn(rt2x00dev, "Watchdog TX DMA busy detected\n");
-+
-+	rt2x00dev->rxdma_busy = 0;
-+	rt2x00dev->txdma_busy = 0;
-+
-+	return true;
-+}
-+
-+void rt2800_watchdog(struct rt2x00_dev *rt2x00dev)
-+{
-+	bool reset = false;
-+
-+	if (test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
-+		return;
-+
-+	if (modparam_watchdog & RT2800_WATCHDOG_DMA_BUSY)
-+		reset = rt2800_watchdog_dma_busy(rt2x00dev);
-+
-+	if (modparam_watchdog & RT2800_WATCHDOG_HANG)
-+		reset = rt2800_watchdog_hung(rt2x00dev) || reset;
-+
-+	if (reset)
- 		ieee80211_restart_hw(rt2x00dev->hw);
--	}
- }
- EXPORT_SYMBOL_GPL(rt2800_watchdog);
- 
-@@ -12016,6 +12068,9 @@ int rt2800_probe_hw(struct rt2x00_dev *r
- 		__set_bit(REQUIRE_TASKLET_CONTEXT, &rt2x00dev->cap_flags);
- 	}
- 
-+	/* USB NICs don't support DMA watchdog as INT_SOURCE_CSR is invalid */
-+	if (rt2x00_is_usb(rt2x00dev))
-+		modparam_watchdog &= ~RT2800_WATCHDOG_DMA_BUSY;
- 	if (modparam_watchdog) {
- 		__set_bit(CAPABILITY_RESTART_HW, &rt2x00dev->cap_flags);
- 		rt2x00dev->link.watchdog_interval = msecs_to_jiffies(100);
---- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
-@@ -926,6 +926,9 @@ struct rt2x00_dev {
- 	 */
- 	u16 beacon_int;
- 
-+	/* Rx/Tx DMA busy watchdog counter */
-+	u16 rxdma_busy, txdma_busy;
-+
- 	/**
- 	 * Timestamp of last received beacon
- 	 */
diff --git a/package/kernel/mac80211/patches/rt2x00/005-2-v6.8-wifi-rt2x00-disable-RTS-threshold-for-rt2800-by-defa.patch b/package/kernel/mac80211/patches/rt2x00/005-2-v6.8-wifi-rt2x00-disable-RTS-threshold-for-rt2800-by-defa.patch
deleted file mode 100644
index b3e95da5a6..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/005-2-v6.8-wifi-rt2x00-disable-RTS-threshold-for-rt2800-by-defa.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 570beb6285fd355904b22625da20809f477096c5 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Sat, 4 Nov 2023 16:57:59 +0800
-Subject: wifi: rt2x00: disable RTS threshold for rt2800 by default
-
-rt2800 has a lot of registers to control the RTS enable/disable
-status for different rates. And the driver control them via
-rt2800_set_rts_threshold(). When RTS was disabled in user
-interface, this function won't be called at all. This means that
-the RTS is still 'on' for CCK and OFDM rates. So we'd better to
-disable them by default because it should be like this. The RTS
-for HT20 and HT40 is already default off so we don't need to
-touch them. If we toggle the RTS status, these register bits
-will be enable/disable again by rt2800_set_rts_threshold().
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB03155DDB953155B7A2DE849ABCA4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -6100,7 +6100,7 @@ static int rt2800_init_registers(struct
- 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 0);
- 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- 	rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 0);
--	rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, 1);
-+	rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, 0);
- 	rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
- 
- 	reg = rt2800_register_read(rt2x00dev, OFDM_PROT_CFG);
-@@ -6113,7 +6113,7 @@ static int rt2800_init_registers(struct
- 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 0);
- 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- 	rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 0);
--	rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, 1);
-+	rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, 0);
- 	rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
- 
- 	reg = rt2800_register_read(rt2x00dev, MM20_PROT_CFG);
diff --git a/package/kernel/mac80211/patches/rt2x00/005-3-v6.8-wifi-rt2x00-restart-beacon-queue-when-hardware-reset.patch b/package/kernel/mac80211/patches/rt2x00/005-3-v6.8-wifi-rt2x00-restart-beacon-queue-when-hardware-reset.patch
deleted file mode 100644
index 1fa7b8b0fb..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/005-3-v6.8-wifi-rt2x00-restart-beacon-queue-when-hardware-reset.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From a11d965a218f0cd95b13fe44d0bcd8a20ce134a8 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Sat, 4 Nov 2023 16:58:00 +0800
-Subject: wifi: rt2x00: restart beacon queue when hardware reset
-
-When a hardware reset is triggered, all registers are reset, so all
-queues are forced to stop in hardware interface. However, mac80211
-will not automatically stop the queue. If we don't manually stop the
-beacon queue, the queue will be deadlocked and unable to start again.
-This patch fixes the issue where Apple devices cannot connect to the
-AP after calling ieee80211_restart_hw().
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://lore.kernel.org/r/TYAP286MB031530EB6D98DCE4DF20766CBCA4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/ralink/rt2x00/rt2x00dev.c |  3 +++
- drivers/net/wireless/ralink/rt2x00/rt2x00mac.c | 11 +++++++++++
- 2 files changed, 14 insertions(+)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
-@@ -101,6 +101,7 @@ void rt2x00lib_disable_radio(struct rt2x
- 	rt2x00link_stop_tuner(rt2x00dev);
- 	rt2x00queue_stop_queues(rt2x00dev);
- 	rt2x00queue_flush_queues(rt2x00dev, true);
-+	rt2x00queue_stop_queue(rt2x00dev->bcn);
- 
- 	/*
- 	 * Disable radio.
-@@ -1286,6 +1287,7 @@ int rt2x00lib_start(struct rt2x00_dev *r
- 	rt2x00dev->intf_ap_count = 0;
- 	rt2x00dev->intf_sta_count = 0;
- 	rt2x00dev->intf_associated = 0;
-+	rt2x00dev->intf_beaconing = 0;
- 
- 	/* Enable the radio */
- 	retval = rt2x00lib_enable_radio(rt2x00dev);
-@@ -1312,6 +1314,7 @@ void rt2x00lib_stop(struct rt2x00_dev *r
- 	rt2x00dev->intf_ap_count = 0;
- 	rt2x00dev->intf_sta_count = 0;
- 	rt2x00dev->intf_associated = 0;
-+	rt2x00dev->intf_beaconing = 0;
- }
- 
- static inline void rt2x00lib_set_if_combinations(struct rt2x00_dev *rt2x00dev)
---- a/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c
-@@ -598,6 +598,17 @@ void rt2x00mac_bss_info_changed(struct i
- 	 */
- 	if (changes & BSS_CHANGED_BEACON_ENABLED) {
- 		mutex_lock(&intf->beacon_skb_mutex);
-+
-+		/*
-+		 * Clear the 'enable_beacon' flag and clear beacon because
-+		 * the beacon queue has been stopped after hardware reset.
-+		 */
-+		if (test_bit(DEVICE_STATE_RESET, &rt2x00dev->flags) &&
-+		    intf->enable_beacon) {
-+			intf->enable_beacon = false;
-+			rt2x00queue_clear_beacon(rt2x00dev, vif);
-+		}
-+
- 		if (!bss_conf->enable_beacon && intf->enable_beacon) {
- 			rt2x00dev->intf_beaconing--;
- 			intf->enable_beacon = false;
diff --git a/package/kernel/mac80211/patches/rt2x00/101-wifi-rt2x00-correct-wrong-BBP-register-in-RxDCOC-cal.patch b/package/kernel/mac80211/patches/rt2x00/101-wifi-rt2x00-correct-wrong-BBP-register-in-RxDCOC-cal.patch
deleted file mode 100644
index 253d1d9c19..0000000000
--- a/package/kernel/mac80211/patches/rt2x00/101-wifi-rt2x00-correct-wrong-BBP-register-in-RxDCOC-cal.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Thu, 9 Nov 2023 12:01:18 +0800
-Subject: [PATCH] wifi: rt2x00: correct wrong BBP register in RxDCOC
- calibration
-
-Refer to Mediatek vendor driver RxDCOC_Calibration() function, when
-performing gainfreeze calibration, we should write register 140
-instead of 141. This fix can reduce the total calibration time from
-6 seconds to 1 second.
-
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
----
- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -8711,7 +8711,7 @@ static void rt2800_rxdcoc_calibration(st
- 	rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
- 	rt2800_rfcsr_write_bank(rt2x00dev, 7, 4, saverfb7r4);
- 
--	rt2800_bbp_write(rt2x00dev, 158, 141);
-+	rt2800_bbp_write(rt2x00dev, 158, 140);
- 	bbpreg = rt2800_bbp_read(rt2x00dev, 159);
- 	bbpreg = bbpreg & (~0x40);
- 	rt2800_bbp_write(rt2x00dev, 159, bbpreg);
diff --git a/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch b/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch
index 8b04473dbe..f90e109a88 100644
--- a/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch
+++ b/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch
@@ -21,7 +21,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/local-symbols
 +++ b/local-symbols
-@@ -352,6 +352,7 @@ RT2X00_LIB_FIRMWARE=
+@@ -334,6 +334,7 @@ RT2X00_LIB_FIRMWARE=
  RT2X00_LIB_CRYPTO=
  RT2X00_LIB_LEDS=
  RT2X00_LIB_DEBUGFS=
@@ -89,7 +89,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  /* Firmware functions */
  static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
  {
-@@ -168,7 +155,7 @@ static const struct rt2800_ops rt2800soc
+@@ -172,7 +159,7 @@ static const struct rt2800_ops rt2800soc
  	.register_multiread	= rt2x00mmio_register_multiread,
  	.register_multiwrite	= rt2x00mmio_register_multiwrite,
  	.regbusy_read		= rt2x00mmio_regbusy_read,
diff --git a/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch b/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
index c06ed07030..de2cf2dca7 100644
--- a/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
+++ b/package/kernel/mac80211/patches/rt2x00/609-rt2x00-make-wmac-loadable-via-OF-on-rt288x-305x-SoC.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
-@@ -226,10 +226,17 @@ static int rt2800soc_probe(struct platfo
+@@ -230,10 +230,17 @@ static int rt2800soc_probe(struct platfo
  	return rt2x00soc_probe(pdev, &rt2800soc_ops);
  }
  
diff --git a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
index 8ee4e6cafa..4a819039da 100644
--- a/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
+++ b/package/kernel/mac80211/patches/rt2x00/610-rt2x00-change-led-polarity-from-OF.patch
@@ -8,7 +8,7 @@
  
  #include "rt2x00.h"
  #include "rt2800lib.h"
-@@ -11285,6 +11286,17 @@ static int rt2800_init_eeprom(struct rt2
+@@ -11282,6 +11283,17 @@ static int rt2800_init_eeprom(struct rt2
  	rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
  	rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
  
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index 3e48eab5d2..5b950539b9 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10407,8 +10425,10 @@ static void rt2800_calibration_rt6352(st
+@@ -10404,8 +10422,10 @@ static void rt2800_calibration_rt6352(st
  	u32 reg;
  
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
@@ -64,7 +64,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  	rt2800_r_calibration(rt2x00dev);
  	rt2800_rf_self_txdc_cal(rt2x00dev);
-@@ -10426,6 +10446,8 @@ static void rt2800_calibration_rt6352(st
+@@ -10423,6 +10443,8 @@ static void rt2800_calibration_rt6352(st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
index 19f1edc928..b3828052e9 100644
--- a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
+++ b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch
@@ -49,9 +49,9 @@
 +static int rt2800pci_get_chipeco(void) { return 0; }
 +
  static const struct ieee80211_ops rt2800pci_mac80211_ops = {
- 	.tx			= rt2x00mac_tx,
- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
-@@ -329,6 +333,9 @@ static const struct rt2800_ops rt2800pci
+ 	.add_chanctx = ieee80211_emulate_add_chanctx,
+ 	.remove_chanctx = ieee80211_emulate_remove_chanctx,
+@@ -333,6 +337,9 @@ static const struct rt2800_ops rt2800pci
  	.drv_init_registers	= rt2800mmio_init_registers,
  	.drv_get_txwi		= rt2800mmio_get_txwi,
  	.drv_get_dma_done	= rt2800mmio_get_dma_done,
@@ -102,9 +102,9 @@
 +#endif
 +
  static const struct ieee80211_ops rt2800soc_mac80211_ops = {
- 	.tx			= rt2x00mac_tx,
- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
-@@ -161,6 +188,9 @@ static const struct rt2800_ops rt2800soc
+ 	.add_chanctx = ieee80211_emulate_add_chanctx,
+ 	.remove_chanctx = ieee80211_emulate_remove_chanctx,
+@@ -165,6 +192,9 @@ static const struct rt2800_ops rt2800soc
  	.drv_init_registers	= rt2800mmio_init_registers,
  	.drv_get_txwi		= rt2800mmio_get_txwi,
  	.drv_get_dma_done	= rt2800mmio_get_dma_done,
@@ -125,9 +125,9 @@
 +static int rt2800usb_get_chipeco(void) { return 0; }
 +
  static const struct ieee80211_ops rt2800usb_mac80211_ops = {
- 	.tx			= rt2x00mac_tx,
- 	.wake_tx_queue		= ieee80211_handle_wake_tx_queue,
-@@ -672,6 +676,9 @@ static const struct rt2800_ops rt2800usb
+ 	.add_chanctx = ieee80211_emulate_add_chanctx,
+ 	.remove_chanctx = ieee80211_emulate_remove_chanctx,
+@@ -676,6 +680,9 @@ static const struct rt2800_ops rt2800usb
  	.drv_init_registers	= rt2800usb_init_registers,
  	.drv_get_txwi		= rt2800usb_get_txwi,
  	.drv_get_dma_done	= rt2800usb_get_dma_done,
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index 0f699f5e18..4c07a10590 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -202,7 +202,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10381,6 +10410,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10378,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -212,7 +212,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10458,6 +10490,9 @@ static void rt2800_calibration_rt6352(st
+@@ -10455,6 +10487,9 @@ static void rt2800_calibration_rt6352(st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -222,7 +222,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10548,31 +10583,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10545,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -284,7 +284,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10638,63 +10678,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10635,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -411,7 +411,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10757,12 +10805,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10754,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  
diff --git a/package/kernel/mac80211/patches/rtl/001-01-v6.9-wifi-rtl8xxxu-remove-assignment-of-priv-vif-in-rtl8x.patch b/package/kernel/mac80211/patches/rtl/001-01-v6.9-wifi-rtl8xxxu-remove-assignment-of-priv-vif-in-rtl8x.patch
deleted file mode 100644
index e0a01a8120..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-01-v6.9-wifi-rtl8xxxu-remove-assignment-of-priv-vif-in-rtl8x.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From d55cb6d8a99441aff55cb9ce663a07f7f1667e83 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:22 +0100
-Subject: [PATCH 01/21] wifi: rtl8xxxu: remove assignment of priv->vif in
- rtl8xxxu_bss_info_changed()
-
-priv->vif gets already set in rtl8xxxu_add_interface, there is no need
-to set it also in rtl8xxxu_bss_info_changed().
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-2-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5004,7 +5004,6 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 
- 			rtl8xxxu_update_ra_report(rarpt, highest_rate, sgi, bw);
- 
--			priv->vif = vif;
- 			priv->rssi_level = RTL8XXXU_RATR_STA_INIT;
- 
- 			priv->fops->update_rate_mask(priv, ramask, 0, sgi,
diff --git a/package/kernel/mac80211/patches/rtl/001-02-v6.9-wifi-rtl8xxxu-prepare-supporting-two-virtual-interfa.patch b/package/kernel/mac80211/patches/rtl/001-02-v6.9-wifi-rtl8xxxu-prepare-supporting-two-virtual-interfa.patch
deleted file mode 100644
index b1948bb7c2..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-02-v6.9-wifi-rtl8xxxu-prepare-supporting-two-virtual-interfa.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 2bbd7d584046038ce655e476628bb15e1460fac6 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:23 +0100
-Subject: [PATCH 02/21] wifi: rtl8xxxu: prepare supporting two virtual
- interfaces
-
-To prepare for concurrent mode, add an array ("vifs") to rtl8xxxu_priv
-to keep track of both interfaces.
-
-Keep the old priv->vif as long there are still users of it and let
-priv->vifs[0] point to the same location.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-3-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h      |  2 ++
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 10 +++++++---
- 2 files changed, 9 insertions(+), 3 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -1897,6 +1897,8 @@ struct rtl8xxxu_priv {
- 	 * is supported and no iface_combinations are provided.
- 	 */
- 	struct ieee80211_vif *vif;
-+
-+	struct ieee80211_vif *vifs[2];
- 	struct delayed_work ra_watchdog;
- 	struct work_struct c2hcmd_work;
- 	struct sk_buff_head c2hcmd_queue;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -6569,10 +6569,12 @@ static int rtl8xxxu_add_interface(struct
- 	int ret;
- 	u8 val8;
- 
--	if (!priv->vif)
-+	if (!priv->vif) {
- 		priv->vif = vif;
--	else
-+		priv->vifs[0] = vif;
-+	} else {
- 		return -EOPNOTSUPP;
-+	}
- 
- 	switch (vif->type) {
- 	case NL80211_IFTYPE_STATION:
-@@ -6622,8 +6624,10 @@ static void rtl8xxxu_remove_interface(st
- 
- 	dev_dbg(&priv->udev->dev, "%s\n", __func__);
- 
--	if (priv->vif)
-+	if (priv->vif) {
- 		priv->vif = NULL;
-+		priv->vifs[0] = NULL;
-+	}
- }
- 
- static int rtl8xxxu_config(struct ieee80211_hw *hw, u32 changed)
diff --git a/package/kernel/mac80211/patches/rtl/001-03-v6.9-wifi-rtl8xxxu-support-setting-linktype-for-both-inte.patch b/package/kernel/mac80211/patches/rtl/001-03-v6.9-wifi-rtl8xxxu-support-setting-linktype-for-both-inte.patch
deleted file mode 100644
index f473fad118..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-03-v6.9-wifi-rtl8xxxu-support-setting-linktype-for-both-inte.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From 7f444692cde83c1455682c2d0d2c9a666422b867 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:24 +0100
-Subject: [PATCH 03/21] wifi: rtl8xxxu: support setting linktype for both
- interfaces
-
-To prepare for concurrent mode, enhance the set_linktype function to be
-able to set the linktype in the MSR register for both hardware ports.
-
-Until the users of set_linktype can handle multiple interfaces, use
-port_num = 0.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-4-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 37 +++++++++++--------
- 1 file changed, 22 insertions(+), 15 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -1633,33 +1633,41 @@ rtl8xxxu_gen1_set_tx_power(struct rtl8xx
- }
- 
- static void rtl8xxxu_set_linktype(struct rtl8xxxu_priv *priv,
--				  enum nl80211_iftype linktype)
-+				  enum nl80211_iftype linktype, int port_num)
- {
--	u8 val8;
--
--	val8 = rtl8xxxu_read8(priv, REG_MSR);
--	val8 &= ~MSR_LINKTYPE_MASK;
-+	u8 val8, type;
- 
- 	switch (linktype) {
- 	case NL80211_IFTYPE_UNSPECIFIED:
--		val8 |= MSR_LINKTYPE_NONE;
-+		type = MSR_LINKTYPE_NONE;
- 		break;
- 	case NL80211_IFTYPE_ADHOC:
--		val8 |= MSR_LINKTYPE_ADHOC;
-+		type = MSR_LINKTYPE_ADHOC;
- 		break;
- 	case NL80211_IFTYPE_STATION:
--		val8 |= MSR_LINKTYPE_STATION;
-+		type = MSR_LINKTYPE_STATION;
- 		break;
- 	case NL80211_IFTYPE_AP:
--		val8 |= MSR_LINKTYPE_AP;
-+		type = MSR_LINKTYPE_AP;
- 		break;
- 	default:
--		goto out;
-+		return;
-+	}
-+
-+	switch (port_num) {
-+	case 0:
-+		val8 = rtl8xxxu_read8(priv, REG_MSR) & 0x0c;
-+		val8 |= type;
-+		break;
-+	case 1:
-+		val8 = rtl8xxxu_read8(priv, REG_MSR) & 0x03;
-+		val8 |= type << 2;
-+		break;
-+	default:
-+		return;
- 	}
- 
- 	rtl8xxxu_write8(priv, REG_MSR, val8);
--out:
--	return;
- }
- 
- static void
-@@ -4236,7 +4244,6 @@ static int rtl8xxxu_init_device(struct i
- 	}
- 
- 	rtl8xxxu_set_mac(priv);
--	rtl8xxxu_set_linktype(priv, NL80211_IFTYPE_STATION);
- 
- 	/*
- 	 * Configure initial WMAC settings
-@@ -4964,7 +4971,7 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 	if (changed & BSS_CHANGED_ASSOC) {
- 		dev_dbg(dev, "Changed ASSOC: %i!\n", vif->cfg.assoc);
- 
--		rtl8xxxu_set_linktype(priv, vif->type);
-+		rtl8xxxu_set_linktype(priv, vif->type, 0);
- 
- 		if (vif->cfg.assoc) {
- 			u32 ramask;
-@@ -6610,7 +6617,7 @@ static int rtl8xxxu_add_interface(struct
- 		ret = -EOPNOTSUPP;
- 	}
- 
--	rtl8xxxu_set_linktype(priv, vif->type);
-+	rtl8xxxu_set_linktype(priv, vif->type, 0);
- 	ether_addr_copy(priv->mac_addr, vif->addr);
- 	rtl8xxxu_set_mac(priv);
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-04-v6.9-wifi-rtl8xxxu-8188e-convert-usage-of-priv-vif-to-pri.patch b/package/kernel/mac80211/patches/rtl/001-04-v6.9-wifi-rtl8xxxu-8188e-convert-usage-of-priv-vif-to-pri.patch
deleted file mode 100644
index 160a71adc7..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-04-v6.9-wifi-rtl8xxxu-8188e-convert-usage-of-priv-vif-to-pri.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From a047e46a7b98de384a158b25a05dc09aa7d70c5f Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:25 +0100
-Subject: [PATCH 04/21] wifi: rtl8xxxu: 8188e: convert usage of priv->vif to
- priv->vifs[0]
-
-The driver currently does not support AP or concurrent mode for 8188e,
-so just use priv->vifs[0] instead of priv->vif for now.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-5-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
-@@ -1699,7 +1699,7 @@ void rtl8188e_handle_ra_tx_report2(struc
- 	/* We only use macid 0, so only the first item is relevant.
- 	 * AP mode will use more of them if it's ever implemented.
- 	 */
--	if (!priv->vif || priv->vif->type == NL80211_IFTYPE_STATION)
-+	if (!priv->vifs[0] || priv->vifs[0]->type == NL80211_IFTYPE_STATION)
- 		items = 1;
- 
- 	for (macid = 0; macid < items; macid++) {
diff --git a/package/kernel/mac80211/patches/rtl/001-05-v6.9-wifi-rtl8xxxu-support-setting-mac-address-register-f.patch b/package/kernel/mac80211/patches/rtl/001-05-v6.9-wifi-rtl8xxxu-support-setting-mac-address-register-f.patch
deleted file mode 100644
index c3e3fea450..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-05-v6.9-wifi-rtl8xxxu-support-setting-mac-address-register-f.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 00add60cad3c9690ac0f9d4f6685f96ccd607670 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:26 +0100
-Subject: [PATCH 05/21] wifi: rtl8xxxu: support setting mac address register
- for both interfaces
-
-To prepare for concurrent mode, enhance rtl8xxxu_set_mac() to write the
-mac address of the respective interface to REG_MACID or REG_MACID1.
-
-Remove the call to rtl8xxxu_set_mac() from the init function as we set
-it in rtl8xxxu_add_interface() later anyway.
-
-Until rtl8xxxu_add_interface() can handle both interfaces, call
-rtl8xxxu_set_mac() with port_num = 0.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-6-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 20 +++++++++++++------
- 1 file changed, 14 insertions(+), 6 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -3580,15 +3580,25 @@ void rtl8723a_phy_lc_calibrate(struct rt
- 		rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00);
- }
- 
--static int rtl8xxxu_set_mac(struct rtl8xxxu_priv *priv)
-+static int rtl8xxxu_set_mac(struct rtl8xxxu_priv *priv, int port_num)
- {
- 	int i;
- 	u16 reg;
- 
--	reg = REG_MACID;
-+	switch (port_num) {
-+	case 0:
-+		reg = REG_MACID;
-+		break;
-+	case 1:
-+		reg = REG_MACID1;
-+		break;
-+	default:
-+		WARN_ONCE("%s: invalid port_num\n", __func__);
-+		return -EINVAL;
-+	}
- 
- 	for (i = 0; i < ETH_ALEN; i++)
--		rtl8xxxu_write8(priv, reg + i, priv->mac_addr[i]);
-+		rtl8xxxu_write8(priv, reg + i, priv->vifs[port_num]->addr[i]);
- 
- 	return 0;
- }
-@@ -4243,8 +4253,6 @@ static int rtl8xxxu_init_device(struct i
- 		rtl8xxxu_write32(priv, REG_HIMR, 0xffffffff);
- 	}
- 
--	rtl8xxxu_set_mac(priv);
--
- 	/*
- 	 * Configure initial WMAC settings
- 	 */
-@@ -6619,7 +6627,7 @@ static int rtl8xxxu_add_interface(struct
- 
- 	rtl8xxxu_set_linktype(priv, vif->type, 0);
- 	ether_addr_copy(priv->mac_addr, vif->addr);
--	rtl8xxxu_set_mac(priv);
-+	rtl8xxxu_set_mac(priv, 0);
- 
- 	return ret;
- }
diff --git a/package/kernel/mac80211/patches/rtl/001-06-v6.9-wifi-rtl8xxxu-extend-wifi-connected-check-to-both-in.patch b/package/kernel/mac80211/patches/rtl/001-06-v6.9-wifi-rtl8xxxu-extend-wifi-connected-check-to-both-in.patch
deleted file mode 100644
index 70879f861f..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-06-v6.9-wifi-rtl8xxxu-extend-wifi-connected-check-to-both-in.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 9aa776209ca31695bead52674ad943848ccc97d5 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:27 +0100
-Subject: [PATCH 06/21] wifi: rtl8xxxu: extend wifi connected check to both
- interfaces
-
-There are multiple places in the code where the current connection
-status of wifi is checked. The driver will support two interfaces soon
-and either one of them (or both) could be connected.
-
-Convert all uses of (vif && vif->cfg.assoc) to a new helper
-function rtl8xxxu_is_assoc() which checks both interfaces.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-7-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 20 +++++++++----------
- 1 file changed, 9 insertions(+), 11 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -6043,18 +6043,20 @@ void rtl8723bu_update_bt_link_info(struc
- 		btcoex->bt_busy = false;
- }
- 
-+static inline bool rtl8xxxu_is_assoc(struct rtl8xxxu_priv *priv)
-+{
-+	return (priv->vifs[0] && priv->vifs[0]->cfg.assoc) ||
-+	       (priv->vifs[1] && priv->vifs[1]->cfg.assoc);
-+}
-+
- static
- void rtl8723bu_handle_bt_inquiry(struct rtl8xxxu_priv *priv)
- {
--	struct ieee80211_vif *vif;
- 	struct rtl8xxxu_btcoex *btcoex;
--	bool wifi_connected;
- 
--	vif = priv->vif;
- 	btcoex = &priv->bt_coex;
--	wifi_connected = (vif && vif->cfg.assoc);
- 
--	if (!wifi_connected) {
-+	if (!rtl8xxxu_is_assoc(priv)) {
- 		rtl8723bu_set_ps_tdma(priv, 0x8, 0x0, 0x0, 0x0, 0x0);
- 		rtl8723bu_set_coex_with_type(priv, 0);
- 	} else if (btcoex->has_sco || btcoex->has_hid || btcoex->has_a2dp) {
-@@ -6072,15 +6074,11 @@ void rtl8723bu_handle_bt_inquiry(struct
- static
- void rtl8723bu_handle_bt_info(struct rtl8xxxu_priv *priv)
- {
--	struct ieee80211_vif *vif;
- 	struct rtl8xxxu_btcoex *btcoex;
--	bool wifi_connected;
- 
--	vif = priv->vif;
- 	btcoex = &priv->bt_coex;
--	wifi_connected = (vif && vif->cfg.assoc);
- 
--	if (wifi_connected) {
-+	if (rtl8xxxu_is_assoc(priv)) {
- 		u32 val32 = 0;
- 		u32 high_prio_tx = 0, high_prio_rx = 0;
- 
-@@ -7103,7 +7101,7 @@ static void rtl8xxxu_track_cfo(struct rt
- 	int cfo_khz_a, cfo_khz_b, cfo_average;
- 	int crystal_cap;
- 
--	if (!priv->vif || !priv->vif->cfg.assoc) {
-+	if (!rtl8xxxu_is_assoc(priv)) {
- 		/* Reset */
- 		cfo->adjust = true;
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-07-v6.9-wifi-rtl8xxxu-extend-check-for-matching-bssid-to-bot.patch b/package/kernel/mac80211/patches/rtl/001-07-v6.9-wifi-rtl8xxxu-extend-check-for-matching-bssid-to-bot.patch
deleted file mode 100644
index 2c53aded28..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-07-v6.9-wifi-rtl8xxxu-extend-check-for-matching-bssid-to-bot.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 80fd8687db41b1e04f78c37137d090f2165cca6e Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:28 +0100
-Subject: [PATCH 07/21] wifi: rtl8xxxu: extend check for matching bssid to both
- interfaces
-
-The driver will support two interfaces soon, which both can be in
-station mode, so extend the check, whether cfo information should be
-parsed, to cover both interfaces.
-
-For better code readability put the lines with priv->vifs[port_num] in a
-separate function.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-8-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 22 ++++++++++++-------
- 1 file changed, 14 insertions(+), 8 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5706,6 +5706,16 @@ static void rtl8xxxu_update_beacon_work_
- 	rtl8xxxu_send_beacon_frame(hw, vif);
- }
- 
-+static inline bool rtl8xxxu_is_packet_match_bssid(struct rtl8xxxu_priv *priv,
-+						  struct ieee80211_hdr *hdr,
-+						  int port_num)
-+{
-+	return priv->vifs[port_num] &&
-+	       priv->vifs[port_num]->type == NL80211_IFTYPE_STATION &&
-+	       priv->vifs[port_num]->cfg.assoc &&
-+	       ether_addr_equal(priv->vifs[port_num]->bss_conf.bssid, hdr->addr2);
-+}
-+
- void rtl8723au_rx_parse_phystats(struct rtl8xxxu_priv *priv,
- 				 struct ieee80211_rx_status *rx_status,
- 				 struct rtl8723au_phy_stats *phy_stats,
-@@ -5722,12 +5732,10 @@ void rtl8723au_rx_parse_phystats(struct
- 		rx_status->signal = priv->fops->cck_rssi(priv, phy_stats);
- 	} else {
- 		bool parse_cfo = priv->fops->set_crystal_cap &&
--				 priv->vif &&
--				 priv->vif->type == NL80211_IFTYPE_STATION &&
--				 priv->vif->cfg.assoc &&
- 				 !crc_icv_err &&
- 				 !ieee80211_is_ctl(hdr->frame_control) &&
--				 ether_addr_equal(priv->vif->bss_conf.bssid, hdr->addr2);
-+				 (rtl8xxxu_is_packet_match_bssid(priv, hdr, 0) ||
-+				  rtl8xxxu_is_packet_match_bssid(priv, hdr, 1));
- 
- 		if (parse_cfo) {
- 			priv->cfo_tracking.cfo_tail[0] = phy_stats->path_cfotail[0];
-@@ -5762,12 +5770,10 @@ static void jaguar2_rx_parse_phystats_ty
- 					    bool crc_icv_err)
- {
- 	bool parse_cfo = priv->fops->set_crystal_cap &&
--			 priv->vif &&
--			 priv->vif->type == NL80211_IFTYPE_STATION &&
--			 priv->vif->cfg.assoc &&
- 			 !crc_icv_err &&
- 			 !ieee80211_is_ctl(hdr->frame_control) &&
--			 ether_addr_equal(priv->vif->bss_conf.bssid, hdr->addr2);
-+			 (rtl8xxxu_is_packet_match_bssid(priv, hdr, 0) ||
-+			  rtl8xxxu_is_packet_match_bssid(priv, hdr, 1));
- 	u8 pwdb_max = 0;
- 	int rx_path;
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-08-v6.9-wifi-rtl8xxxu-don-t-parse-CFO-if-both-interfaces-are.patch b/package/kernel/mac80211/patches/rtl/001-08-v6.9-wifi-rtl8xxxu-don-t-parse-CFO-if-both-interfaces-are.patch
deleted file mode 100644
index bad1c3cb27..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-08-v6.9-wifi-rtl8xxxu-don-t-parse-CFO-if-both-interfaces-are.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From f86dd8eaf8da84ee5b803d90b8c311d7e2725d0b Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:29 +0100
-Subject: [PATCH 08/21] wifi: rtl8xxxu: don't parse CFO, if both interfaces are
- connected in STA mode
-
-If both interfaces are in STATION mode and both are connected to an AP,
-there might be conflicting CFO values for the two connections. Ignore
-the CFO information in this case.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-9-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5716,6 +5716,14 @@ static inline bool rtl8xxxu_is_packet_ma
- 	       ether_addr_equal(priv->vifs[port_num]->bss_conf.bssid, hdr->addr2);
- }
- 
-+static inline bool rtl8xxxu_is_sta_sta(struct rtl8xxxu_priv *priv)
-+{
-+	return (priv->vifs[0] && priv->vifs[0]->cfg.assoc &&
-+		priv->vifs[0]->type == NL80211_IFTYPE_STATION) &&
-+	       (priv->vifs[1] && priv->vifs[1]->cfg.assoc &&
-+		priv->vifs[1]->type == NL80211_IFTYPE_STATION);
-+}
-+
- void rtl8723au_rx_parse_phystats(struct rtl8xxxu_priv *priv,
- 				 struct ieee80211_rx_status *rx_status,
- 				 struct rtl8723au_phy_stats *phy_stats,
-@@ -5734,6 +5742,7 @@ void rtl8723au_rx_parse_phystats(struct
- 		bool parse_cfo = priv->fops->set_crystal_cap &&
- 				 !crc_icv_err &&
- 				 !ieee80211_is_ctl(hdr->frame_control) &&
-+				 !rtl8xxxu_is_sta_sta(priv) &&
- 				 (rtl8xxxu_is_packet_match_bssid(priv, hdr, 0) ||
- 				  rtl8xxxu_is_packet_match_bssid(priv, hdr, 1));
- 
-@@ -5772,6 +5781,7 @@ static void jaguar2_rx_parse_phystats_ty
- 	bool parse_cfo = priv->fops->set_crystal_cap &&
- 			 !crc_icv_err &&
- 			 !ieee80211_is_ctl(hdr->frame_control) &&
-+			 !rtl8xxxu_is_sta_sta(priv) &&
- 			 (rtl8xxxu_is_packet_match_bssid(priv, hdr, 0) ||
- 			  rtl8xxxu_is_packet_match_bssid(priv, hdr, 1));
- 	u8 pwdb_max = 0;
diff --git a/package/kernel/mac80211/patches/rtl/001-09-v6.9-wifi-rtl8xxxu-support-setting-bssid-register-for-mul.patch b/package/kernel/mac80211/patches/rtl/001-09-v6.9-wifi-rtl8xxxu-support-setting-bssid-register-for-mul.patch
deleted file mode 100644
index def70343b0..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-09-v6.9-wifi-rtl8xxxu-support-setting-bssid-register-for-mul.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 3ff7a05996f901a7a10068b42e9dc8435f908a4c Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:30 +0100
-Subject: [PATCH 09/21] wifi: rtl8xxxu: support setting bssid register for
- multiple interfaces
-
-To prepare for concurrent mode, enhance rtl8xxxu_set_bssid() to write the
-BSSID of the respective interface to REG_BSSID or REG_BSSID1.
-
-Like done with rtl8xxxu_set_mac(), call rtl8xxxu_set_bssid() with
-port_num = 0, until the callers also support multiple interfaces.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-10-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c  | 18 ++++++++++++++----
- 1 file changed, 14 insertions(+), 4 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -3603,14 +3603,24 @@ static int rtl8xxxu_set_mac(struct rtl8x
- 	return 0;
- }
- 
--static int rtl8xxxu_set_bssid(struct rtl8xxxu_priv *priv, const u8 *bssid)
-+static int rtl8xxxu_set_bssid(struct rtl8xxxu_priv *priv, const u8 *bssid, int port_num)
- {
- 	int i;
- 	u16 reg;
- 
- 	dev_dbg(&priv->udev->dev, "%s: (%pM)\n", __func__, bssid);
- 
--	reg = REG_BSSID;
-+	switch (port_num) {
-+	case 0:
-+		reg = REG_BSSID;
-+		break;
-+	case 1:
-+		reg = REG_BSSID1;
-+		break;
-+	default:
-+		WARN_ONCE("%s: invalid port_num\n", __func__);
-+		return -EINVAL;
-+	}
- 
- 	for (i = 0; i < ETH_ALEN; i++)
- 		rtl8xxxu_write8(priv, reg + i, bssid[i]);
-@@ -5068,7 +5078,7 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 
- 	if (changed & BSS_CHANGED_BSSID) {
- 		dev_dbg(dev, "Changed BSSID!\n");
--		rtl8xxxu_set_bssid(priv, bss_conf->bssid);
-+		rtl8xxxu_set_bssid(priv, bss_conf->bssid, 0);
- 	}
- 
- 	if (changed & BSS_CHANGED_BASIC_RATES) {
-@@ -5097,7 +5107,7 @@ static int rtl8xxxu_start_ap(struct ieee
- 	struct device *dev = &priv->udev->dev;
- 
- 	dev_dbg(dev, "Start AP mode\n");
--	rtl8xxxu_set_bssid(priv, vif->bss_conf.bssid);
-+	rtl8xxxu_set_bssid(priv, vif->bss_conf.bssid, 0);
- 	rtl8xxxu_write16(priv, REG_BCN_INTERVAL, vif->bss_conf.beacon_int);
- 	priv->fops->report_connect(priv, RTL8XXXU_BC_MC_MACID, 0, true);
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-10-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-set_aif.patch b/package/kernel/mac80211/patches/rtl/001-10-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-set_aif.patch
deleted file mode 100644
index b8cb66dd92..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-10-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-set_aif.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 43532c050f8eec4056a21978fdb5b958e1477553 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:31 +0100
-Subject: [PATCH 10/21] wifi: rtl8xxxu: support multiple interfaces in
- set_aifs()
-
-In concurrent mode supported by this driver, both interfaces will use
-the same channel and same wireless mode.
-It is therefore possible to get the wireless mode by checking the first
-connected interface.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-11-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4913,14 +4913,20 @@ static void rtl8xxxu_set_aifs(struct rtl
- 	u8 aifs, aifsn, sifs;
- 	int i;
- 
--	if (priv->vif) {
-+	for (i = 0; i < ARRAY_SIZE(priv->vifs); i++) {
-+		if (!priv->vifs[i])
-+			continue;
-+
- 		struct ieee80211_sta *sta;
- 
- 		rcu_read_lock();
--		sta = ieee80211_find_sta(priv->vif, priv->vif->bss_conf.bssid);
-+		sta = ieee80211_find_sta(priv->vifs[i], priv->vifs[i]->bss_conf.bssid);
- 		if (sta)
- 			wireless_mode = rtl8xxxu_wireless_mode(priv->hw, sta);
- 		rcu_read_unlock();
-+
-+		if (wireless_mode)
-+			break;
- 	}
- 
- 	if (priv->hw->conf.chandef.chan->band == NL80211_BAND_5GHZ ||
diff --git a/package/kernel/mac80211/patches/rtl/001-11-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-update_.patch b/package/kernel/mac80211/patches/rtl/001-11-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-update_.patch
deleted file mode 100644
index 63960e7ae7..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-11-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-update_.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 05b22e9b7d84253f765cde01cb09d144094b61c9 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:32 +0100
-Subject: [PATCH 11/21] wifi: rtl8xxxu: support multiple interfaces in
- update_beacon_work_callback()
-
-As we only want to support AP mode/sending beacons on port 0, it is
-enough to replace priv->vif with priv->vifs[0].
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-12-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5712,7 +5712,7 @@ static void rtl8xxxu_update_beacon_work_
- 	struct rtl8xxxu_priv *priv =
- 		container_of(work, struct rtl8xxxu_priv, update_beacon_work);
- 	struct ieee80211_hw *hw = priv->hw;
--	struct ieee80211_vif *vif = priv->vif;
-+	struct ieee80211_vif *vif = priv->vifs[0];
- 
- 	if (!vif) {
- 		WARN_ONCE(true, "no vif to update beacon\n");
diff --git a/package/kernel/mac80211/patches/rtl/001-12-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-configu.patch b/package/kernel/mac80211/patches/rtl/001-12-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-configu.patch
deleted file mode 100644
index 707236b7dc..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-12-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-configu.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 6b76638287055791e74b32c401a39ea1b91e7158 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:33 +0100
-Subject: [PATCH 12/21] wifi: rtl8xxxu: support multiple interfaces in
- configure_filter()
-
-As we only want to support AP mode/sending beacons on port 0, change
-from priv->vif to priv->vifs[0] in the check for AP mode.
-Additionally, if we are in AP mode, don't filter RX beacon and probe
-response frames to still allow working STATION mode on the other
-interface.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-13-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -6794,8 +6794,8 @@ static void rtl8xxxu_configure_filter(st
- 	else
- 		rcr |= RCR_CHECK_BSSID_BEACON | RCR_CHECK_BSSID_MATCH;
- 
--	if (priv->vif && priv->vif->type == NL80211_IFTYPE_AP)
--		rcr &= ~RCR_CHECK_BSSID_MATCH;
-+	if (priv->vifs[0] && priv->vifs[0]->type == NL80211_IFTYPE_AP)
-+		rcr &= ~(RCR_CHECK_BSSID_MATCH | RCR_CHECK_BSSID_BEACON);
- 
- 	if (*total_flags & FIF_CONTROL)
- 		rcr |= RCR_ACCEPT_CTRL_FRAME;
diff --git a/package/kernel/mac80211/patches/rtl/001-13-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-watchdo.patch b/package/kernel/mac80211/patches/rtl/001-13-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-watchdo.patch
deleted file mode 100644
index b174b704d7..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-13-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-watchdo.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 3f9baa99f8429ea6f56e7cc8d881c027518e9573 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:34 +0100
-Subject: [PATCH 13/21] wifi: rtl8xxxu: support multiple interfaces in
- watchdog_callback()
-
-Check first whether priv->vifs[0] exists and is of type STATION, then go
-to priv->vifs[1]. Make sure to call refresh_rate_mask for both
-interfaces.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-14-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 19 +++++++++++--------
- 1 file changed, 11 insertions(+), 8 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -7200,11 +7200,15 @@ static void rtl8xxxu_watchdog_callback(s
- {
- 	struct ieee80211_vif *vif;
- 	struct rtl8xxxu_priv *priv;
-+	int i;
- 
- 	priv = container_of(work, struct rtl8xxxu_priv, ra_watchdog.work);
--	vif = priv->vif;
-+	for (i = 0; i < ARRAY_SIZE(priv->vifs); i++) {
-+		vif = priv->vifs[i];
-+
-+		if (!vif || vif->type != NL80211_IFTYPE_STATION)
-+			continue;
- 
--	if (vif && vif->type == NL80211_IFTYPE_STATION) {
- 		int signal;
- 		struct ieee80211_sta *sta;
- 
-@@ -7215,22 +7219,21 @@ static void rtl8xxxu_watchdog_callback(s
- 
- 			dev_dbg(dev, "%s: no sta found\n", __func__);
- 			rcu_read_unlock();
--			goto out;
-+			continue;
- 		}
- 		rcu_read_unlock();
- 
- 		signal = ieee80211_ave_rssi(vif);
- 
--		priv->fops->report_rssi(priv, 0,
-+		priv->fops->report_rssi(priv, rtl8xxxu_get_macid(priv, sta),
- 					rtl8xxxu_signal_to_snr(signal));
- 
--		if (priv->fops->set_crystal_cap)
--			rtl8xxxu_track_cfo(priv);
--
- 		rtl8xxxu_refresh_rate_mask(priv, signal, sta, false);
- 	}
- 
--out:
-+	if (priv->fops->set_crystal_cap)
-+		rtl8xxxu_track_cfo(priv);
-+
- 	schedule_delayed_work(&priv->ra_watchdog, 2 * HZ);
- }
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-14-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-add-rem.patch b/package/kernel/mac80211/patches/rtl/001-14-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-add-rem.patch
deleted file mode 100644
index 7fcbb02afe..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-14-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-add-rem.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From eef55f1545c92c7181d5083453dee1296298ad3e Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:35 +0100
-Subject: [PATCH 14/21] wifi: rtl8xxxu: support multiple interfaces in
- {add,remove}_interface()
-
-Add a custom struct to store in vif->drv_priv with a reference to
-port_num and fill it when a new interface is added. Choose a free
-port_num for the newly added interface.
-
-As we only want to support AP mode/sending beacons on port 0, only change
-the beacon settings if a new interface is actually assigned to port 0.
-
-Call set_linktype() and set_mac() with the appropriate port_num.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-15-martin.kaistra@linutronix.de
----
- .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h  |  4 ++
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 52 +++++++++++--------
- 2 files changed, 34 insertions(+), 22 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -1921,6 +1921,10 @@ struct rtl8xxxu_sta_info {
- 	u8 macid;
- };
- 
-+struct rtl8xxxu_vif {
-+	int port_num;
-+};
-+
- struct rtl8xxxu_rx_urb {
- 	struct urb urb;
- 	struct ieee80211_hw *hw;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -6610,28 +6610,33 @@ error:
- static int rtl8xxxu_add_interface(struct ieee80211_hw *hw,
- 				  struct ieee80211_vif *vif)
- {
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
--	int ret;
-+	int port_num;
- 	u8 val8;
- 
--	if (!priv->vif) {
--		priv->vif = vif;
--		priv->vifs[0] = vif;
--	} else {
-+	if (!priv->vifs[0])
-+		port_num = 0;
-+	else if (!priv->vifs[1])
-+		port_num = 1;
-+	else
- 		return -EOPNOTSUPP;
--	}
- 
- 	switch (vif->type) {
- 	case NL80211_IFTYPE_STATION:
--		rtl8xxxu_stop_tx_beacon(priv);
-+		if (port_num == 0) {
-+			rtl8xxxu_stop_tx_beacon(priv);
- 
--		val8 = rtl8xxxu_read8(priv, REG_BEACON_CTRL);
--		val8 |= BEACON_ATIM | BEACON_FUNCTION_ENABLE |
--			BEACON_DISABLE_TSF_UPDATE;
--		rtl8xxxu_write8(priv, REG_BEACON_CTRL, val8);
--		ret = 0;
-+			val8 = rtl8xxxu_read8(priv, REG_BEACON_CTRL);
-+			val8 |= BEACON_ATIM | BEACON_FUNCTION_ENABLE |
-+				BEACON_DISABLE_TSF_UPDATE;
-+			rtl8xxxu_write8(priv, REG_BEACON_CTRL, val8);
-+		}
- 		break;
- 	case NL80211_IFTYPE_AP:
-+		if (port_num == 1)
-+			return -EOPNOTSUPP;
-+
- 		rtl8xxxu_write8(priv, REG_BEACON_CTRL,
- 				BEACON_DISABLE_TSF_UPDATE | BEACON_CTRL_MBSSID);
- 		rtl8xxxu_write8(priv, REG_ATIMWND, 0x0c); /* 12ms */
-@@ -6648,31 +6653,32 @@ static int rtl8xxxu_add_interface(struct
- 		val8 = rtl8xxxu_read8(priv, REG_CCK_CHECK);
- 		val8 &= ~BIT_BCN_PORT_SEL;
- 		rtl8xxxu_write8(priv, REG_CCK_CHECK, val8);
--
--		ret = 0;
- 		break;
- 	default:
--		ret = -EOPNOTSUPP;
-+		return -EOPNOTSUPP;
- 	}
- 
--	rtl8xxxu_set_linktype(priv, vif->type, 0);
-+	priv->vifs[port_num] = vif;
-+	priv->vif = vif;
-+	rtlvif->port_num = port_num;
-+
-+	rtl8xxxu_set_linktype(priv, vif->type, port_num);
- 	ether_addr_copy(priv->mac_addr, vif->addr);
--	rtl8xxxu_set_mac(priv, 0);
-+	rtl8xxxu_set_mac(priv, port_num);
- 
--	return ret;
-+	return 0;
- }
- 
- static void rtl8xxxu_remove_interface(struct ieee80211_hw *hw,
- 				      struct ieee80211_vif *vif)
- {
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 
- 	dev_dbg(&priv->udev->dev, "%s\n", __func__);
- 
--	if (priv->vif) {
--		priv->vif = NULL;
--		priv->vifs[0] = NULL;
--	}
-+	priv->vif = NULL;
-+	priv->vifs[rtlvif->port_num] = NULL;
- }
- 
- static int rtl8xxxu_config(struct ieee80211_hw *hw, u32 changed)
-@@ -7661,6 +7667,8 @@ static int rtl8xxxu_probe(struct usb_int
- 	if (ret)
- 		goto err_set_intfdata;
- 
-+	hw->vif_data_size = sizeof(struct rtl8xxxu_vif);
-+
- 	hw->wiphy->max_scan_ssids = 1;
- 	hw->wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
- 	if (priv->fops->max_macid_num)
diff --git a/package/kernel/mac80211/patches/rtl/001-15-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-bss_inf.patch b/package/kernel/mac80211/patches/rtl/001-15-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-bss_inf.patch
deleted file mode 100644
index 5c5c1948d3..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-15-v6.9-wifi-rtl8xxxu-support-multiple-interfaces-in-bss_inf.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 073401c3b6b9eaea027240baf07f2b84dd2d2d26 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:36 +0100
-Subject: [PATCH 15/21] wifi: rtl8xxxu: support multiple interfaces in
- bss_info_changed()
-
-Call set_linktype and set_bssid now with correct port_num. Call
-stop_tx_beacon only for port 0, as we don't support beacons on port 1.
-Explicit changes to BEACON will only happen for AP type interfaces, so
-we don't need an additional check there.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-16-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4983,6 +4983,7 @@ static void
- rtl8xxxu_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
- 			  struct ieee80211_bss_conf *bss_conf, u64 changed)
- {
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 	struct device *dev = &priv->udev->dev;
- 	struct ieee80211_sta *sta;
-@@ -4995,7 +4996,7 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 	if (changed & BSS_CHANGED_ASSOC) {
- 		dev_dbg(dev, "Changed ASSOC: %i!\n", vif->cfg.assoc);
- 
--		rtl8xxxu_set_linktype(priv, vif->type, 0);
-+		rtl8xxxu_set_linktype(priv, vif->type, rtlvif->port_num);
- 
- 		if (vif->cfg.assoc) {
- 			u32 ramask;
-@@ -5042,7 +5043,8 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 
- 			rtl8xxxu_write8(priv, REG_BCN_MAX_ERR, 0xff);
- 
--			rtl8xxxu_stop_tx_beacon(priv);
-+			if (rtlvif->port_num == 0)
-+				rtl8xxxu_stop_tx_beacon(priv);
- 
- 			/* joinbss sequence */
- 			rtl8xxxu_write16(priv, REG_BCN_PSR_RPT,
-@@ -5084,7 +5086,7 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 
- 	if (changed & BSS_CHANGED_BSSID) {
- 		dev_dbg(dev, "Changed BSSID!\n");
--		rtl8xxxu_set_bssid(priv, bss_conf->bssid, 0);
-+		rtl8xxxu_set_bssid(priv, bss_conf->bssid, rtlvif->port_num);
- 	}
- 
- 	if (changed & BSS_CHANGED_BASIC_RATES) {
diff --git a/package/kernel/mac80211/patches/rtl/001-16-v6.9-wifi-rtl8xxxu-support-multiple-interface-in-start_ap.patch b/package/kernel/mac80211/patches/rtl/001-16-v6.9-wifi-rtl8xxxu-support-multiple-interface-in-start_ap.patch
deleted file mode 100644
index 25d0238461..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-16-v6.9-wifi-rtl8xxxu-support-multiple-interface-in-start_ap.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 61fdbd9e2a9d74c716bf4d9684653de5efdee691 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:37 +0100
-Subject: [PATCH 16/21] wifi: rtl8xxxu: support multiple interface in
- start_ap()
-
-Call set_bssid() with the correct port_num now.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-17-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5111,11 +5111,12 @@ error:
- static int rtl8xxxu_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
- 			     struct ieee80211_bss_conf *link_conf)
- {
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 	struct device *dev = &priv->udev->dev;
- 
- 	dev_dbg(dev, "Start AP mode\n");
--	rtl8xxxu_set_bssid(priv, vif->bss_conf.bssid, 0);
-+	rtl8xxxu_set_bssid(priv, vif->bss_conf.bssid, rtlvif->port_num);
- 	rtl8xxxu_write16(priv, REG_BCN_INTERVAL, vif->bss_conf.beacon_int);
- 	priv->fops->report_connect(priv, RTL8XXXU_BC_MC_MACID, 0, true);
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-17-v6.9-wifi-rtl8xxxu-add-macids-for-STA-mode.patch b/package/kernel/mac80211/patches/rtl/001-17-v6.9-wifi-rtl8xxxu-add-macids-for-STA-mode.patch
deleted file mode 100644
index 9f8d0a3aaf..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-17-v6.9-wifi-rtl8xxxu-add-macids-for-STA-mode.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 5ce0d7e8aee03e73b35f0fe1f1ebbdd4e45776f3 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:38 +0100
-Subject: [PATCH 17/21] wifi: rtl8xxxu: add macids for STA mode
-
-Until now, the driver only assigned a dedicated macid for connections
-made in AP mode, in STA mode the return value of rtl8xxxu_get_macid()
-was simply 0.
-To differentiate between port 0 and 1, when both are in STA mode,
-allocate a second macid (with value 1) and set sta_info->macid according
-to the used port_num in rtl8xxxu_sta_add().
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-18-martin.kaistra@linutronix.de
----
- .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h   |  1 +
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c  | 18 +++++++++++++++++-
- 2 files changed, 18 insertions(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -1774,6 +1774,7 @@ struct rtl8xxxu_cfo_tracking {
- #define RTL8XXXU_HW_LED_CONTROL	2
- #define RTL8XXXU_MAX_MAC_ID_NUM	128
- #define RTL8XXXU_BC_MC_MACID	0
-+#define RTL8XXXU_BC_MC_MACID1	1
- 
- struct rtl8xxxu_priv {
- 	struct ieee80211_hw *hw;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4053,10 +4053,13 @@ static inline u8 rtl8xxxu_get_macid(stru
- {
- 	struct rtl8xxxu_sta_info *sta_info;
- 
--	if (!priv->vif || priv->vif->type == NL80211_IFTYPE_STATION || !sta)
-+	if (!sta)
- 		return 0;
- 
- 	sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
-+	if (!sta_info)
-+		return 0;
-+
- 	return sta_info->macid;
- }
- 
-@@ -4536,6 +4539,7 @@ static int rtl8xxxu_init_device(struct i
- 		rtl8188e_ra_info_init_all(&priv->ra_info);
- 
- 	set_bit(RTL8XXXU_BC_MC_MACID, priv->mac_id_map);
-+	set_bit(RTL8XXXU_BC_MC_MACID1, priv->mac_id_map);
- 
- exit:
- 	return ret;
-@@ -7375,6 +7379,7 @@ static int rtl8xxxu_sta_add(struct ieee8
- 			    struct ieee80211_sta *sta)
- {
- 	struct rtl8xxxu_sta_info *sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 
- 	if (vif->type == NL80211_IFTYPE_AP) {
-@@ -7384,6 +7389,17 @@ static int rtl8xxxu_sta_add(struct ieee8
- 
- 		rtl8xxxu_refresh_rate_mask(priv, 0, sta, true);
- 		priv->fops->report_connect(priv, sta_info->macid, H2C_MACID_ROLE_STA, true);
-+	} else {
-+		switch (rtlvif->port_num) {
-+		case 0:
-+			sta_info->macid = RTL8XXXU_BC_MC_MACID;
-+			break;
-+		case 1:
-+			sta_info->macid = RTL8XXXU_BC_MC_MACID1;
-+			break;
-+		default:
-+			break;
-+		}
- 	}
- 
- 	return 0;
diff --git a/package/kernel/mac80211/patches/rtl/001-18-v6.9-wifi-rtl8xxxu-remove-obsolete-priv-vif.patch b/package/kernel/mac80211/patches/rtl/001-18-v6.9-wifi-rtl8xxxu-remove-obsolete-priv-vif.patch
deleted file mode 100644
index 5cf65eb519..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-18-v6.9-wifi-rtl8xxxu-remove-obsolete-priv-vif.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From f232e9d91bb84817c60c051a3e3b56dd2721a7b3 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:39 +0100
-Subject: [PATCH 18/21] wifi: rtl8xxxu: remove obsolete priv->vif
-
-Now that all uses of priv->vif have been converted to priv->vifs[]
-remove the old attribute.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-19-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h      | 5 -----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 2 --
- 2 files changed, 7 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -1893,11 +1893,6 @@ struct rtl8xxxu_priv {
- 	u8 rssi_level;
- 	DECLARE_BITMAP(tx_aggr_started, IEEE80211_NUM_TIDS);
- 	DECLARE_BITMAP(tid_tx_operational, IEEE80211_NUM_TIDS);
--	/*
--	 * Only one virtual interface permitted because only STA mode
--	 * is supported and no iface_combinations are provided.
--	 */
--	struct ieee80211_vif *vif;
- 
- 	struct ieee80211_vif *vifs[2];
- 	struct delayed_work ra_watchdog;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -6666,7 +6666,6 @@ static int rtl8xxxu_add_interface(struct
- 	}
- 
- 	priv->vifs[port_num] = vif;
--	priv->vif = vif;
- 	rtlvif->port_num = port_num;
- 
- 	rtl8xxxu_set_linktype(priv, vif->type, port_num);
-@@ -6684,7 +6683,6 @@ static void rtl8xxxu_remove_interface(st
- 
- 	dev_dbg(&priv->udev->dev, "%s\n", __func__);
- 
--	priv->vif = NULL;
- 	priv->vifs[rtlvif->port_num] = NULL;
- }
- 
diff --git a/package/kernel/mac80211/patches/rtl/001-19-v6.9-wifi-rtl8xxxu-add-hw-crypto-support-for-AP-mode.patch b/package/kernel/mac80211/patches/rtl/001-19-v6.9-wifi-rtl8xxxu-add-hw-crypto-support-for-AP-mode.patch
deleted file mode 100644
index b5f9307496..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-19-v6.9-wifi-rtl8xxxu-add-hw-crypto-support-for-AP-mode.patch
+++ /dev/null
@@ -1,226 +0,0 @@
-From b837f78fbffa5f8e7e7c59879db54793abf161ec Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:40 +0100
-Subject: [PATCH 19/21] wifi: rtl8xxxu: add hw crypto support for AP mode
-
-Add a custom function for allocating entries in the sec cam. This allows
-us to store multiple keys with the same keyidx.
-
-The maximum number of sec cam entries for 8188f is 16 according to the
-vendor driver. Add the number to rtl8xxxu_fileops, so that other chips
-which might support more entries, can set a different number there.
-
-Set the bssid as mac address for group keys instead of just using the
-ethernet broadcast address and use BIT(6) in the sec cam ctrl entry
-for differentiating them from pairwise keys like in the vendor driver.
-
-Add the TXDESC_EN_DESC_ID bit and the hw_key_idx to tx
-broadcast/multicast packets in AP mode.
-
-Finally, allow the usage of rtl8xxxu_set_key() for AP mode.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-20-martin.kaistra@linutronix.de
----
- .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h  |  5 ++
- .../realtek/rtl8xxxu/rtl8xxxu_8188f.c         |  1 +
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 48 +++++++++++++++----
- 3 files changed, 44 insertions(+), 10 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -498,6 +498,7 @@ struct rtl8xxxu_txdesc40 {
- #define DESC_RATE_ID_SHIFT		16
- #define DESC_RATE_ID_MASK		0xf
- #define TXDESC_NAVUSEHDR		BIT(20)
-+#define TXDESC_EN_DESC_ID		BIT(21)
- #define TXDESC_SEC_RC4			0x00400000
- #define TXDESC_SEC_AES			0x00c00000
- #define TXDESC_PKT_OFFSET_SHIFT		26
-@@ -1775,6 +1776,7 @@ struct rtl8xxxu_cfo_tracking {
- #define RTL8XXXU_MAX_MAC_ID_NUM	128
- #define RTL8XXXU_BC_MC_MACID	0
- #define RTL8XXXU_BC_MC_MACID1	1
-+#define RTL8XXXU_MAX_SEC_CAM_NUM	64
- 
- struct rtl8xxxu_priv {
- 	struct ieee80211_hw *hw;
-@@ -1908,6 +1910,7 @@ struct rtl8xxxu_priv {
- 	char led_name[32];
- 	struct led_classdev led_cdev;
- 	DECLARE_BITMAP(mac_id_map, RTL8XXXU_MAX_MAC_ID_NUM);
-+	DECLARE_BITMAP(cam_map, RTL8XXXU_MAX_SEC_CAM_NUM);
- };
- 
- struct rtl8xxxu_sta_info {
-@@ -1919,6 +1922,7 @@ struct rtl8xxxu_sta_info {
- 
- struct rtl8xxxu_vif {
- 	int port_num;
-+	u8 hw_key_idx;
- };
- 
- struct rtl8xxxu_rx_urb {
-@@ -1993,6 +1997,7 @@ struct rtl8xxxu_fileops {
- 	u16 max_aggr_num;
- 	u8 supports_ap:1;
- 	u16 max_macid_num;
-+	u16 max_sec_cam_num;
- 	u32 adda_1t_init;
- 	u32 adda_1t_path_on;
- 	u32 adda_2t_path_on_a;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
-@@ -1751,6 +1751,7 @@ struct rtl8xxxu_fileops rtl8188fu_fops =
- 	.max_aggr_num = 0x0c14,
- 	.supports_ap = 1,
- 	.max_macid_num = 16,
-+	.max_sec_cam_num = 16,
- 	.adda_1t_init = 0x03c00014,
- 	.adda_1t_path_on = 0x03c00014,
- 	.trxff_boundary = 0x3f7f,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4559,8 +4559,10 @@ static void rtl8xxxu_cam_write(struct rt
- 	 * This is a bit of a hack - the lower bits of the cipher
- 	 * suite selector happens to match the cipher index in the CAM
- 	 */
--	addr = key->keyidx << CAM_CMD_KEY_SHIFT;
-+	addr = key->hw_key_idx << CAM_CMD_KEY_SHIFT;
- 	ctrl = (key->cipher & 0x0f) << 2 | key->keyidx | CAM_WRITE_VALID;
-+	if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
-+		ctrl |= BIT(6);
- 
- 	for (j = 5; j >= 0; j--) {
- 		switch (j) {
-@@ -5546,13 +5548,14 @@ static void rtl8xxxu_tx(struct ieee80211
- 	struct rtl8xxxu_tx_urb *tx_urb;
- 	struct ieee80211_sta *sta = NULL;
- 	struct ieee80211_vif *vif = tx_info->control.vif;
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct device *dev = &priv->udev->dev;
- 	u32 queue, rts_rate;
- 	u16 pktlen = skb->len;
- 	int tx_desc_size = priv->fops->tx_desc_size;
- 	u8 macid;
- 	int ret;
--	bool ampdu_enable, sgi = false, short_preamble = false;
-+	bool ampdu_enable, sgi = false, short_preamble = false, bmc = false;
- 
- 	if (skb_headroom(skb) < tx_desc_size) {
- 		dev_warn(dev,
-@@ -5594,10 +5597,14 @@ static void rtl8xxxu_tx(struct ieee80211
- 		tx_desc->txdw0 =
- 			TXDESC_OWN | TXDESC_FIRST_SEGMENT | TXDESC_LAST_SEGMENT;
- 	if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
--	    is_broadcast_ether_addr(ieee80211_get_DA(hdr)))
-+	    is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
- 		tx_desc->txdw0 |= TXDESC_BROADMULTICAST;
-+		bmc = true;
-+	}
-+
- 
- 	tx_desc->txdw1 = cpu_to_le32(queue << TXDESC_QUEUE_SHIFT);
-+	macid = rtl8xxxu_get_macid(priv, sta);
- 
- 	if (tx_info->control.hw_key) {
- 		switch (tx_info->control.hw_key->cipher) {
-@@ -5612,6 +5619,10 @@ static void rtl8xxxu_tx(struct ieee80211
- 		default:
- 			break;
- 		}
-+		if (bmc && rtlvif->hw_key_idx != 0xff) {
-+			tx_desc->txdw1 |= TXDESC_EN_DESC_ID;
-+			macid = rtlvif->hw_key_idx;
-+		}
- 	}
- 
- 	/* (tx_info->flags & IEEE80211_TX_CTL_AMPDU) && */
-@@ -5655,7 +5666,6 @@ static void rtl8xxxu_tx(struct ieee80211
- 	else
- 		rts_rate = 0;
- 
--	macid = rtl8xxxu_get_macid(priv, sta);
- 	priv->fops->fill_txdesc(hw, hdr, tx_info, tx_desc, sgi, short_preamble,
- 				ampdu_enable, rts_rate, macid);
- 
-@@ -6667,6 +6677,7 @@ static int rtl8xxxu_add_interface(struct
- 
- 	priv->vifs[port_num] = vif;
- 	rtlvif->port_num = port_num;
-+	rtlvif->hw_key_idx = 0xff;
- 
- 	rtl8xxxu_set_linktype(priv, vif->type, port_num);
- 	ether_addr_copy(priv->mac_addr, vif->addr);
-@@ -6843,11 +6854,19 @@ static int rtl8xxxu_set_rts_threshold(st
- 	return 0;
- }
- 
-+static int rtl8xxxu_get_free_sec_cam(struct ieee80211_hw *hw)
-+{
-+	struct rtl8xxxu_priv *priv = hw->priv;
-+
-+	return find_first_zero_bit(priv->cam_map, priv->fops->max_sec_cam_num);
-+}
-+
- static int rtl8xxxu_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
- 			    struct ieee80211_vif *vif,
- 			    struct ieee80211_sta *sta,
- 			    struct ieee80211_key_conf *key)
- {
-+	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 	struct device *dev = &priv->udev->dev;
- 	u8 mac_addr[ETH_ALEN];
-@@ -6859,9 +6878,6 @@ static int rtl8xxxu_set_key(struct ieee8
- 	dev_dbg(dev, "%s: cmd %02x, cipher %08x, index %i\n",
- 		__func__, cmd, key->cipher, key->keyidx);
- 
--	if (vif->type != NL80211_IFTYPE_STATION)
--		return -EOPNOTSUPP;
--
- 	if (key->keyidx > 3)
- 		return -EOPNOTSUPP;
- 
-@@ -6885,7 +6901,7 @@ static int rtl8xxxu_set_key(struct ieee8
- 		ether_addr_copy(mac_addr, sta->addr);
- 	} else {
- 		dev_dbg(dev, "%s: group key\n", __func__);
--		eth_broadcast_addr(mac_addr);
-+		ether_addr_copy(mac_addr, vif->bss_conf.bssid);
- 	}
- 
- 	val16 = rtl8xxxu_read16(priv, REG_CR);
-@@ -6899,16 +6915,28 @@ static int rtl8xxxu_set_key(struct ieee8
- 
- 	switch (cmd) {
- 	case SET_KEY:
--		key->hw_key_idx = key->keyidx;
-+
-+		retval = rtl8xxxu_get_free_sec_cam(hw);
-+		if (retval < 0)
-+			return -EOPNOTSUPP;
-+
-+		key->hw_key_idx = retval;
-+
-+		if (vif->type == NL80211_IFTYPE_AP && !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
-+			rtlvif->hw_key_idx = key->hw_key_idx;
-+
- 		key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
- 		rtl8xxxu_cam_write(priv, key, mac_addr);
-+		set_bit(key->hw_key_idx, priv->cam_map);
- 		retval = 0;
- 		break;
- 	case DISABLE_KEY:
- 		rtl8xxxu_write32(priv, REG_CAM_WRITE, 0x00000000);
- 		val32 = CAM_CMD_POLLING | CAM_CMD_WRITE |
--			key->keyidx << CAM_CMD_KEY_SHIFT;
-+			key->hw_key_idx << CAM_CMD_KEY_SHIFT;
- 		rtl8xxxu_write32(priv, REG_CAM_CMD, val32);
-+		rtlvif->hw_key_idx = 0xff;
-+		clear_bit(key->hw_key_idx, priv->cam_map);
- 		retval = 0;
- 		break;
- 	default:
diff --git a/package/kernel/mac80211/patches/rtl/001-20-v6.9-wifi-rtl8xxxu-make-supporting-AP-mode-only-on-port-0.patch b/package/kernel/mac80211/patches/rtl/001-20-v6.9-wifi-rtl8xxxu-make-supporting-AP-mode-only-on-port-0.patch
deleted file mode 100644
index 4b55b0ede7..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-20-v6.9-wifi-rtl8xxxu-make-supporting-AP-mode-only-on-port-0.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 69abad618efd17e50bc6f880332ab36b660b0b34 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:41 +0100
-Subject: [PATCH 20/21] wifi: rtl8xxxu: make supporting AP mode only on port 0
- transparent
-
-When the driver is used for concurrent mode, both virtual interfaces can
-be set to station or AP mode, though only one can be in AP mode at the
-same time.
-
-In order to keep the code simple, use only hw port 0 for AP mode. When
-an interface is added in AP mode which would be assigned to port 1, use
-a switch_port function to transparently swap the mapping between virtual
-interface and hw port.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-21-martin.kaistra@linutronix.de
----
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 91 ++++++++++++++++++-
- 1 file changed, 89 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -6624,6 +6624,91 @@ error:
- 	return ret;
- }
- 
-+static void rtl8xxxu_switch_ports(struct rtl8xxxu_priv *priv)
-+{
-+	u8 macid[ETH_ALEN], bssid[ETH_ALEN], macid_1[ETH_ALEN], bssid_1[ETH_ALEN];
-+	u8 msr, bcn_ctrl, bcn_ctrl_1, atimwnd[2], atimwnd_1[2];
-+	struct rtl8xxxu_vif *rtlvif;
-+	struct ieee80211_vif *vif;
-+	u8 tsftr[8], tsftr_1[8];
-+	int i;
-+
-+	msr = rtl8xxxu_read8(priv, REG_MSR);
-+	bcn_ctrl = rtl8xxxu_read8(priv, REG_BEACON_CTRL);
-+	bcn_ctrl_1 = rtl8xxxu_read8(priv, REG_BEACON_CTRL_1);
-+
-+	for (i = 0; i < ARRAY_SIZE(atimwnd); i++)
-+		atimwnd[i] = rtl8xxxu_read8(priv, REG_ATIMWND + i);
-+	for (i = 0; i < ARRAY_SIZE(atimwnd_1); i++)
-+		atimwnd_1[i] = rtl8xxxu_read8(priv, REG_ATIMWND_1 + i);
-+
-+	for (i = 0; i < ARRAY_SIZE(tsftr); i++)
-+		tsftr[i] = rtl8xxxu_read8(priv, REG_TSFTR + i);
-+	for (i = 0; i < ARRAY_SIZE(tsftr); i++)
-+		tsftr_1[i] = rtl8xxxu_read8(priv, REG_TSFTR1 + i);
-+
-+	for (i = 0; i < ARRAY_SIZE(macid); i++)
-+		macid[i] = rtl8xxxu_read8(priv, REG_MACID + i);
-+
-+	for (i = 0; i < ARRAY_SIZE(bssid); i++)
-+		bssid[i] = rtl8xxxu_read8(priv, REG_BSSID + i);
-+
-+	for (i = 0; i < ARRAY_SIZE(macid_1); i++)
-+		macid_1[i] = rtl8xxxu_read8(priv, REG_MACID1 + i);
-+
-+	for (i = 0; i < ARRAY_SIZE(bssid_1); i++)
-+		bssid_1[i] = rtl8xxxu_read8(priv, REG_BSSID1 + i);
-+
-+	/* disable bcn function, disable update TSF */
-+	rtl8xxxu_write8(priv, REG_BEACON_CTRL, (bcn_ctrl &
-+			(~BEACON_FUNCTION_ENABLE)) | BEACON_DISABLE_TSF_UPDATE);
-+	rtl8xxxu_write8(priv, REG_BEACON_CTRL_1, (bcn_ctrl_1 &
-+			(~BEACON_FUNCTION_ENABLE)) | BEACON_DISABLE_TSF_UPDATE);
-+
-+	/* switch msr */
-+	msr = (msr & 0xf0) | ((msr & 0x03) << 2) | ((msr & 0x0c) >> 2);
-+	rtl8xxxu_write8(priv, REG_MSR, msr);
-+
-+	/* write port0 */
-+	rtl8xxxu_write8(priv, REG_BEACON_CTRL, bcn_ctrl_1 & ~BEACON_FUNCTION_ENABLE);
-+	for (i = 0; i < ARRAY_SIZE(atimwnd_1); i++)
-+		rtl8xxxu_write8(priv, REG_ATIMWND + i, atimwnd_1[i]);
-+	for (i = 0; i < ARRAY_SIZE(tsftr_1); i++)
-+		rtl8xxxu_write8(priv, REG_TSFTR + i, tsftr_1[i]);
-+	for (i = 0; i < ARRAY_SIZE(macid_1); i++)
-+		rtl8xxxu_write8(priv, REG_MACID + i, macid_1[i]);
-+	for (i = 0; i < ARRAY_SIZE(bssid_1); i++)
-+		rtl8xxxu_write8(priv, REG_BSSID + i, bssid_1[i]);
-+
-+	/* write port1 */
-+	rtl8xxxu_write8(priv, REG_BEACON_CTRL_1, bcn_ctrl & ~BEACON_FUNCTION_ENABLE);
-+	for (i = 0; i < ARRAY_SIZE(atimwnd); i++)
-+		rtl8xxxu_write8(priv, REG_ATIMWND_1 + i, atimwnd[i]);
-+	for (i = 0; i < ARRAY_SIZE(tsftr); i++)
-+		rtl8xxxu_write8(priv, REG_TSFTR1 + i, tsftr[i]);
-+	for (i = 0; i < ARRAY_SIZE(macid); i++)
-+		rtl8xxxu_write8(priv, REG_MACID1 + i, macid[i]);
-+	for (i = 0; i < ARRAY_SIZE(bssid); i++)
-+		rtl8xxxu_write8(priv, REG_BSSID1 + i, bssid[i]);
-+
-+	/* write bcn ctl */
-+	rtl8xxxu_write8(priv, REG_BEACON_CTRL, bcn_ctrl_1);
-+	rtl8xxxu_write8(priv, REG_BEACON_CTRL_1, bcn_ctrl);
-+
-+	vif = priv->vifs[0];
-+	priv->vifs[0] = priv->vifs[1];
-+	priv->vifs[1] = vif;
-+
-+	/* priv->vifs[0] is NULL here, based on how this function is currently
-+	 * called from rtl8xxxu_add_interface().
-+	 * When this function will be used in the future for a different
-+	 * scenario, please check whether vifs[0] or vifs[1] can be NULL and if
-+	 * necessary add code to set port_num = 1.
-+	 */
-+	rtlvif = (struct rtl8xxxu_vif *)priv->vifs[1]->drv_priv;
-+	rtlvif->port_num = 1;
-+}
-+
- static int rtl8xxxu_add_interface(struct ieee80211_hw *hw,
- 				  struct ieee80211_vif *vif)
- {
-@@ -6651,8 +6736,10 @@ static int rtl8xxxu_add_interface(struct
- 		}
- 		break;
- 	case NL80211_IFTYPE_AP:
--		if (port_num == 1)
--			return -EOPNOTSUPP;
-+		if (port_num == 1) {
-+			rtl8xxxu_switch_ports(priv);
-+			port_num = 0;
-+		}
- 
- 		rtl8xxxu_write8(priv, REG_BEACON_CTRL,
- 				BEACON_DISABLE_TSF_UPDATE | BEACON_CTRL_MBSSID);
diff --git a/package/kernel/mac80211/patches/rtl/001-21-v6.9-wifi-rtl8xxxu-declare-concurrent-mode-support-for-81.patch b/package/kernel/mac80211/patches/rtl/001-21-v6.9-wifi-rtl8xxxu-declare-concurrent-mode-support-for-81.patch
deleted file mode 100644
index 6322541434..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-21-v6.9-wifi-rtl8xxxu-declare-concurrent-mode-support-for-81.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 1cd165adf314f6bf25cde58f02f4ff51d01730b0 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Fri, 22 Dec 2023 11:14:42 +0100
-Subject: [PATCH 21/21] wifi: rtl8xxxu: declare concurrent mode support for
- 8188f
-
-Everything is in place now for concurrent mode, we can tell the system
-that we support it.
-We will allow a maximum of 2 virtual interfaces, one of them can be in
-AP mode.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20231222101442.626837-22-martin.kaistra@linutronix.de
----
- .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h  |  1 +
- .../realtek/rtl8xxxu/rtl8xxxu_8188f.c         |  1 +
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 19 +++++++++++++++++++
- 3 files changed, 21 insertions(+)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -1992,6 +1992,7 @@ struct rtl8xxxu_fileops {
- 	u8 init_reg_rxfltmap:1;
- 	u8 init_reg_pkt_life_time:1;
- 	u8 init_reg_hmtfr:1;
-+	u8 supports_concurrent:1;
- 	u8 ampdu_max_time;
- 	u8 ustime_tsf_edca;
- 	u16 max_aggr_num;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c
-@@ -1752,6 +1752,7 @@ struct rtl8xxxu_fileops rtl8188fu_fops =
- 	.supports_ap = 1,
- 	.max_macid_num = 16,
- 	.max_sec_cam_num = 16,
-+	.supports_concurrent = 1,
- 	.adda_1t_init = 0x03c00014,
- 	.adda_1t_path_on = 0x03c00014,
- 	.trxff_boundary = 0x3f7f,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -7665,6 +7665,20 @@ static void rtl8xxxu_deinit_led(struct r
- 	led_classdev_unregister(led);
- }
- 
-+struct ieee80211_iface_limit rtl8xxxu_limits[] = {
-+	{ .max = 2, .types = BIT(NL80211_IFTYPE_STATION), },
-+	{ .max = 1, .types = BIT(NL80211_IFTYPE_AP), },
-+};
-+
-+struct ieee80211_iface_combination rtl8xxxu_combinations[] = {
-+	{
-+		.limits = rtl8xxxu_limits,
-+		.n_limits = ARRAY_SIZE(rtl8xxxu_limits),
-+		.max_interfaces = 2,
-+		.num_different_channels = 1,
-+	},
-+};
-+
- static int rtl8xxxu_probe(struct usb_interface *interface,
- 			  const struct usb_device_id *id)
- {
-@@ -7810,6 +7824,11 @@ static int rtl8xxxu_probe(struct usb_int
- 		hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
- 	hw->queues = 4;
- 
-+	if (priv->fops->supports_concurrent) {
-+		hw->wiphy->iface_combinations = rtl8xxxu_combinations;
-+		hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtl8xxxu_combinations);
-+	}
-+
- 	sband = &rtl8xxxu_supported_band;
- 	sband->ht_cap.ht_supported = true;
- 	sband->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
diff --git a/package/kernel/mac80211/patches/rtl/002-01-v6.9-wifi-rtl8xxxu-Fix-LED-control-code-of-RTL8192FU.patch b/package/kernel/mac80211/patches/rtl/002-01-v6.9-wifi-rtl8xxxu-Fix-LED-control-code-of-RTL8192FU.patch
deleted file mode 100644
index d1a480d53f..0000000000
--- a/package/kernel/mac80211/patches/rtl/002-01-v6.9-wifi-rtl8xxxu-Fix-LED-control-code-of-RTL8192FU.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 9475cc7ac31503521af95e38151e9d856e8ff30b Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2@gmail.com>
-Date: Sun, 31 Dec 2023 00:45:54 +0200
-Subject: [PATCH 1/2] wifi: rtl8xxxu: Fix LED control code of RTL8192FU
-
-Some devices, like the Comfast CF-826F, use LED1, which already works.
-Others, like Asus USB-N13 C1, use LED0, which doesn't work correctly.
-
-Write the right values to the LED control registers to make LED0 work
-as well.
-
-This is unfortunately tested only with the Comfast CF-826F.
-
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/7a2c3158-3a45-4466-b11e-fc09802b20e2@gmail.com
----
- .../realtek/rtl8xxxu/rtl8xxxu_8192f.c         | 32 +++++++++++++------
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h | 15 +++++++++
- 2 files changed, 38 insertions(+), 9 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
-@@ -2014,26 +2014,40 @@ static int rtl8192fu_led_brightness_set(
- 	struct rtl8xxxu_priv *priv = container_of(led_cdev,
- 						  struct rtl8xxxu_priv,
- 						  led_cdev);
--	u16 ledcfg;
-+	u32 ledcfg;
- 
- 	/* Values obtained by observing the USB traffic from the Windows driver. */
- 	rtl8xxxu_write32(priv, REG_SW_GPIO_SHARE_CTRL_0, 0x20080);
- 	rtl8xxxu_write32(priv, REG_SW_GPIO_SHARE_CTRL_1, 0x1b0000);
- 
--	ledcfg = rtl8xxxu_read16(priv, REG_LEDCFG0);
-+	ledcfg = rtl8xxxu_read32(priv, REG_LEDCFG0);
-+
-+	/* Comfast CF-826F uses LED1. Asus USB-N13 C1 uses LED0. Set both. */
-+
-+	u32p_replace_bits(&ledcfg, LED_GPIO_ENABLE, LEDCFG0_LED2EN);
-+	u32p_replace_bits(&ledcfg, LED_IO_MODE_OUTPUT, LEDCFG0_LED0_IO_MODE);
-+	u32p_replace_bits(&ledcfg, LED_IO_MODE_OUTPUT, LEDCFG0_LED1_IO_MODE);
- 
- 	if (brightness == LED_OFF) {
--		/* Value obtained like above. */
--		ledcfg = BIT(1) | BIT(7);
-+		u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED0CM);
-+		u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED0SV);
-+		u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED1CM);
-+		u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED1SV);
- 	} else if (brightness == LED_ON) {
--		/* Value obtained like above. */
--		ledcfg = BIT(1) | BIT(7) | BIT(11);
-+		u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED0CM);
-+		u32p_replace_bits(&ledcfg, LED_SW_ON, LEDCFG0_LED0SV);
-+		u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED1CM);
-+		u32p_replace_bits(&ledcfg, LED_SW_ON, LEDCFG0_LED1SV);
- 	} else if (brightness == RTL8XXXU_HW_LED_CONTROL) {
--		/* Value obtained by brute force. */
--		ledcfg = BIT(8) | BIT(9);
-+		u32p_replace_bits(&ledcfg, LED_MODE_TX_OR_RX_EVENTS,
-+				  LEDCFG0_LED0CM);
-+		u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED0SV);
-+		u32p_replace_bits(&ledcfg, LED_MODE_TX_OR_RX_EVENTS,
-+				  LEDCFG0_LED1CM);
-+		u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED1SV);
- 	}
- 
--	rtl8xxxu_write16(priv, REG_LEDCFG0, ledcfg);
-+	rtl8xxxu_write32(priv, REG_LEDCFG0, ledcfg);
- 
- 	return 0;
- }
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
-@@ -146,6 +146,21 @@
- #define  GPIO_INTM_EDGE_TRIG_IRQ	BIT(9)
- 
- #define REG_LEDCFG0			0x004c
-+#define  LEDCFG0_LED0CM			GENMASK(2, 0)
-+#define  LEDCFG0_LED1CM			GENMASK(10, 8)
-+#define   LED_MODE_SW_CTRL		0x0
-+#define   LED_MODE_TX_OR_RX_EVENTS	0x3
-+#define  LEDCFG0_LED0SV			BIT(3)
-+#define  LEDCFG0_LED1SV			BIT(11)
-+#define   LED_SW_OFF			0x0
-+#define   LED_SW_ON			0x1
-+#define  LEDCFG0_LED0_IO_MODE		BIT(7)
-+#define  LEDCFG0_LED1_IO_MODE		BIT(15)
-+#define   LED_IO_MODE_OUTPUT		0x0
-+#define   LED_IO_MODE_INPUT		0x1
-+#define  LEDCFG0_LED2EN			BIT(21)
-+#define   LED_GPIO_DISABLE		0x0
-+#define   LED_GPIO_ENABLE		0x1
- #define  LEDCFG0_DPDT_SELECT		BIT(23)
- #define REG_LEDCFG1			0x004d
- #define  LEDCFG1_HW_LED_CONTROL		BIT(1)
diff --git a/package/kernel/mac80211/patches/rtl/002-02-v6.9-wifi-rtl8xxxu-Fix-off-by-one-initial-RTS-rate.patch b/package/kernel/mac80211/patches/rtl/002-02-v6.9-wifi-rtl8xxxu-Fix-off-by-one-initial-RTS-rate.patch
deleted file mode 100644
index 7d1c67f2e0..0000000000
--- a/package/kernel/mac80211/patches/rtl/002-02-v6.9-wifi-rtl8xxxu-Fix-off-by-one-initial-RTS-rate.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 80850ca041f2c7ee28fa5e47c5c1b106415f099f Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2@gmail.com>
-Date: Tue, 2 Jan 2024 21:33:07 +0200
-Subject: [PATCH 2/2] wifi: rtl8xxxu: Fix off by one initial RTS rate
-
-rtl8xxxu_set_basic_rates() sets the wrong initial RTS rate. It sets the
-next higher rate than the one it should set, e.g. 36M instead of 24M.
-
-The while loop was supposed to find the index of the most significant
-bit which is 1, but it was copied incorrectly from the vendor driver.
-Use __fls() instead.
-
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/761e6836-6cd6-4930-91b6-0446834655c5@gmail.com
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4870,10 +4870,9 @@ static void rtl8xxxu_set_basic_rates(str
- 
- 	dev_dbg(&priv->udev->dev, "%s: rates %08x\n", __func__,	rate_cfg);
- 
--	while (rate_cfg) {
--		rate_cfg = (rate_cfg >> 1);
--		rate_idx++;
--	}
-+	if (rate_cfg)
-+		rate_idx = __fls(rate_cfg);
-+
- 	rtl8xxxu_write8(priv, REG_INIRTS_RATE_SEL, rate_idx);
- }
- 
diff --git a/package/kernel/mac80211/patches/rtl/003-01-v6.9-wifi-rtl8xxxu-add-cancel_work_sync-for-c2hcmd_work.patch b/package/kernel/mac80211/patches/rtl/003-01-v6.9-wifi-rtl8xxxu-add-cancel_work_sync-for-c2hcmd_work.patch
deleted file mode 100644
index 612b5f8738..0000000000
--- a/package/kernel/mac80211/patches/rtl/003-01-v6.9-wifi-rtl8xxxu-add-cancel_work_sync-for-c2hcmd_work.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 1213acb478a7181cd73eeaf00db430f1e45b1361 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Thu, 11 Jan 2024 17:36:27 +0100
-Subject: [PATCH 1/2] wifi: rtl8xxxu: add cancel_work_sync() for c2hcmd_work
-
-The workqueue might still be running, when the driver is stopped. To
-avoid a use-after-free, call cancel_work_sync() in rtl8xxxu_stop().
-
-Fixes: e542e66b7c2e ("rtl8xxxu: add bluetooth co-existence support for single antenna")
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240111163628.320697-2-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -7480,6 +7480,7 @@ static void rtl8xxxu_stop(struct ieee802
- 	if (priv->usb_interrupts)
- 		rtl8xxxu_write32(priv, REG_USB_HIMR, 0);
- 
-+	cancel_work_sync(&priv->c2hcmd_work);
- 	cancel_delayed_work_sync(&priv->ra_watchdog);
- 
- 	rtl8xxxu_free_rx_resources(priv);
diff --git a/package/kernel/mac80211/patches/rtl/003-02-v6.9-wifi-rtl8xxxu-enable-channel-switch-support.patch b/package/kernel/mac80211/patches/rtl/003-02-v6.9-wifi-rtl8xxxu-enable-channel-switch-support.patch
deleted file mode 100644
index 6c78d3901b..0000000000
--- a/package/kernel/mac80211/patches/rtl/003-02-v6.9-wifi-rtl8xxxu-enable-channel-switch-support.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From ece90a8622320bf5a24d3326da1f8e109891573c Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Thu, 11 Jan 2024 17:36:28 +0100
-Subject: [PATCH 2/2] wifi: rtl8xxxu: enable channel switch support
-
-The CSA countdown in the beacon frames, which are sent out by firmware,
-needs to get updated by the driver. To achieve this, convert
-update_beacon_work to delayed_work and schedule it with the beacon
-interval in case CSA is active and the countdown is not complete.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240111163628.320697-3-martin.kaistra@linutronix.de
----
- .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h  |  2 +-
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 19 +++++++++++++++----
- 2 files changed, 16 insertions(+), 5 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -1900,7 +1900,7 @@ struct rtl8xxxu_priv {
- 	struct delayed_work ra_watchdog;
- 	struct work_struct c2hcmd_work;
- 	struct sk_buff_head c2hcmd_queue;
--	struct work_struct update_beacon_work;
-+	struct delayed_work update_beacon_work;
- 	struct rtl8xxxu_btcoex bt_coex;
- 	struct rtl8xxxu_ra_report ra_report;
- 	struct rtl8xxxu_cfo_tracking cfo_tracking;
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4605,7 +4605,7 @@ static int rtl8xxxu_set_tim(struct ieee8
- {
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 
--	schedule_work(&priv->update_beacon_work);
-+	schedule_delayed_work(&priv->update_beacon_work, 0);
- 
- 	return 0;
- }
-@@ -5107,7 +5107,7 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 	}
- 
- 	if (changed & BSS_CHANGED_BEACON)
--		schedule_work(&priv->update_beacon_work);
-+		schedule_delayed_work(&priv->update_beacon_work, 0);
- 
- error:
- 	return;
-@@ -5726,7 +5726,7 @@ static void rtl8xxxu_send_beacon_frame(s
- static void rtl8xxxu_update_beacon_work_callback(struct work_struct *work)
- {
- 	struct rtl8xxxu_priv *priv =
--		container_of(work, struct rtl8xxxu_priv, update_beacon_work);
-+		container_of(work, struct rtl8xxxu_priv, update_beacon_work.work);
- 	struct ieee80211_hw *hw = priv->hw;
- 	struct ieee80211_vif *vif = priv->vifs[0];
- 
-@@ -5735,6 +5735,14 @@ static void rtl8xxxu_update_beacon_work_
- 		return;
- 	}
- 
-+	if (vif->bss_conf.csa_active) {
-+		if (ieee80211_beacon_cntdwn_is_complete(vif)) {
-+			ieee80211_csa_finish(vif);
-+			return;
-+		}
-+		schedule_delayed_work(&priv->update_beacon_work,
-+				      msecs_to_jiffies(vif->bss_conf.beacon_int));
-+	}
- 	rtl8xxxu_send_beacon_frame(hw, vif);
- }
- 
-@@ -7482,6 +7490,7 @@ static void rtl8xxxu_stop(struct ieee802
- 
- 	cancel_work_sync(&priv->c2hcmd_work);
- 	cancel_delayed_work_sync(&priv->ra_watchdog);
-+	cancel_delayed_work_sync(&priv->update_beacon_work);
- 
- 	rtl8xxxu_free_rx_resources(priv);
- 	rtl8xxxu_free_tx_resources(priv);
-@@ -7763,7 +7772,7 @@ static int rtl8xxxu_probe(struct usb_int
- 	spin_lock_init(&priv->rx_urb_lock);
- 	INIT_WORK(&priv->rx_urb_wq, rtl8xxxu_rx_urb_work);
- 	INIT_DELAYED_WORK(&priv->ra_watchdog, rtl8xxxu_watchdog_callback);
--	INIT_WORK(&priv->update_beacon_work, rtl8xxxu_update_beacon_work_callback);
-+	INIT_DELAYED_WORK(&priv->update_beacon_work, rtl8xxxu_update_beacon_work_callback);
- 	skb_queue_head_init(&priv->c2hcmd_queue);
- 
- 	usb_set_intfdata(interface, hw);
-@@ -7824,6 +7833,8 @@ static int rtl8xxxu_probe(struct usb_int
- 		hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
- 	hw->queues = 4;
- 
-+	hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
-+
- 	if (priv->fops->supports_concurrent) {
- 		hw->wiphy->iface_combinations = rtl8xxxu_combinations;
- 		hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtl8xxxu_combinations);
diff --git a/package/kernel/mac80211/patches/rtl/004-01-v6.9-wifi-rtl8xxxu-convert-EN_DESC_ID-of-TX-descriptor-to.patch b/package/kernel/mac80211/patches/rtl/004-01-v6.9-wifi-rtl8xxxu-convert-EN_DESC_ID-of-TX-descriptor-to.patch
deleted file mode 100644
index a88a52231d..0000000000
--- a/package/kernel/mac80211/patches/rtl/004-01-v6.9-wifi-rtl8xxxu-convert-EN_DESC_ID-of-TX-descriptor-to.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 426e7b4773921d07ab4ab8ba16fbad396d6c9971 Mon Sep 17 00:00:00 2001
-From: Ping-Ke Shih <pkshih@realtek.com>
-Date: Tue, 16 Jan 2024 16:09:44 +0800
-Subject: [PATCH 1/2] wifi: rtl8xxxu: convert EN_DESC_ID of TX descriptor to
- le32 type
-
-Fields of TX descriptor are little-endian order, so correct EN_DESC_ID
-field to le32 type.
-
-Fixes: b837f78fbffa ("wifi: rtl8xxxu: add hw crypto support for AP mode")
-Reported-by: kernel test robot <lkp@intel.com>
-Closes: https://lore.kernel.org/oe-kbuild-all/202401161318.YtXoCkjU-lkp@intel.com/
-Cc: Martin Kaistra <martin.kaistra@linutronix.de>
-Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240116080945.20172-1-pkshih@realtek.com
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5619,7 +5619,7 @@ static void rtl8xxxu_tx(struct ieee80211
- 			break;
- 		}
- 		if (bmc && rtlvif->hw_key_idx != 0xff) {
--			tx_desc->txdw1 |= TXDESC_EN_DESC_ID;
-+			tx_desc->txdw1 |= cpu_to_le32(TXDESC_EN_DESC_ID);
- 			macid = rtlvif->hw_key_idx;
- 		}
- 	}
diff --git a/package/kernel/mac80211/patches/rtl/004-02-v6.9-wifi-rtl8xxxu-make-instances-of-iface-limit-and-comb.patch b/package/kernel/mac80211/patches/rtl/004-02-v6.9-wifi-rtl8xxxu-make-instances-of-iface-limit-and-comb.patch
deleted file mode 100644
index 68848e28e0..0000000000
--- a/package/kernel/mac80211/patches/rtl/004-02-v6.9-wifi-rtl8xxxu-make-instances-of-iface-limit-and-comb.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 92c7428f942da7dfcdc629b05b5114f80822d7a4 Mon Sep 17 00:00:00 2001
-From: Ping-Ke Shih <pkshih@realtek.com>
-Date: Tue, 16 Jan 2024 16:09:45 +0800
-Subject: [PATCH 2/2] wifi: rtl8xxxu: make instances of iface limit and
- combination to be static const
-
-rtl8xxxu_limits and rtl8xxxu_combinations can be static const, so add
-modifiers as desire. Otherwise, Sparse reports warnings
-
-rtl8xxxu_core.c:7677:30: warning: symbol 'rtl8xxxu_limits' was not declared. Should it be static?
-rtl8xxxu_core.c:7682:36: warning: symbol 'rtl8xxxu_combinations' was not declared. Should it be static?
-
-Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240116080945.20172-2-pkshih@realtek.com
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -7674,12 +7674,12 @@ static void rtl8xxxu_deinit_led(struct r
- 	led_classdev_unregister(led);
- }
- 
--struct ieee80211_iface_limit rtl8xxxu_limits[] = {
-+static const struct ieee80211_iface_limit rtl8xxxu_limits[] = {
- 	{ .max = 2, .types = BIT(NL80211_IFTYPE_STATION), },
- 	{ .max = 1, .types = BIT(NL80211_IFTYPE_AP), },
- };
- 
--struct ieee80211_iface_combination rtl8xxxu_combinations[] = {
-+static const struct ieee80211_iface_combination rtl8xxxu_combinations[] = {
- 	{
- 		.limits = rtl8xxxu_limits,
- 		.n_limits = ARRAY_SIZE(rtl8xxxu_limits),
diff --git a/package/kernel/mac80211/patches/rtl/005-v6.9-wifi-rtl8xxxu-add-missing-number-of-sec-cam-entries-.patch b/package/kernel/mac80211/patches/rtl/005-v6.9-wifi-rtl8xxxu-add-missing-number-of-sec-cam-entries-.patch
deleted file mode 100644
index 9fba6befef..0000000000
--- a/package/kernel/mac80211/patches/rtl/005-v6.9-wifi-rtl8xxxu-add-missing-number-of-sec-cam-entries-.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 563d5025cf3b51c7bf20e6966af433ed5f838875 Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Tue, 16 Jan 2024 10:50:01 +0100
-Subject: [PATCH] wifi: rtl8xxxu: add missing number of sec cam entries for all
- variants
-
-Commit b837f78fbffa ("wifi: rtl8xxxu: add hw crypto support for AP
-mode") introduced max_sec_cam_num as a member of rtl8xxxu_fileops.
-It was missed to set this number for all variants except 8188f, which
-caused rtl8xxxu_get_free_sec_cam() to always return 0 and therefore breaking
-encrypted traffic.
-
-Fix it by adding the numbers for all variants. The values are taken from
-the vendor drivers and rtlwifi.
-
-Link: https://lore.kernel.org/linux-wireless/20240111163603.2325-1-zenmchen@gmail.com/
-Fixes: b837f78fbffa ("wifi: rtl8xxxu: add hw crypto support for AP mode")
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240116095001.399500-1-martin.kaistra@linutronix.de
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 1 +
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192c.c | 1 +
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c | 1 +
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c | 1 +
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8710b.c | 1 +
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723a.c | 1 +
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723b.c | 1 +
- 7 files changed, 7 insertions(+)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
-@@ -1882,6 +1882,7 @@ struct rtl8xxxu_fileops rtl8188eu_fops =
- 	.has_tx_report = 1,
- 	.init_reg_pkt_life_time = 1,
- 	.gen2_thermal_meter = 1,
-+	.max_sec_cam_num = 32,
- 	.adda_1t_init = 0x0b1b25a0,
- 	.adda_1t_path_on = 0x0bdb25a0,
- 	/*
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192c.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192c.c
-@@ -613,6 +613,7 @@ struct rtl8xxxu_fileops rtl8192cu_fops =
- 	.rx_agg_buf_size = 16000,
- 	.tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
- 	.rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16),
-+	.max_sec_cam_num = 32,
- 	.adda_1t_init = 0x0b1b25a0,
- 	.adda_1t_path_on = 0x0bdb25a0,
- 	.adda_2t_path_on_a = 0x04db25a4,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
-@@ -1769,6 +1769,7 @@ struct rtl8xxxu_fileops rtl8192eu_fops =
- 	.needs_full_init = 1,
- 	.supports_ap = 1,
- 	.max_macid_num = 128,
-+	.max_sec_cam_num = 64,
- 	.adda_1t_init = 0x0fc01616,
- 	.adda_1t_path_on = 0x0fc01616,
- 	.adda_2t_path_on_a = 0x0fc01616,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
-@@ -2095,6 +2095,7 @@ struct rtl8xxxu_fileops rtl8192fu_fops =
- 	.max_aggr_num = 0x1f1f,
- 	.supports_ap = 1,
- 	.max_macid_num = 128,
-+	.max_sec_cam_num = 64,
- 	.trxff_boundary = 0x3f3f,
- 	.pbp_rx = PBP_PAGE_SIZE_256,
- 	.pbp_tx = PBP_PAGE_SIZE_256,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8710b.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8710b.c
-@@ -1877,6 +1877,7 @@ struct rtl8xxxu_fileops rtl8710bu_fops =
- 	.max_aggr_num = 0x0c14,
- 	.supports_ap = 1,
- 	.max_macid_num = 16,
-+	.max_sec_cam_num = 32,
- 	.adda_1t_init = 0x03c00016,
- 	.adda_1t_path_on = 0x03c00016,
- 	.trxff_boundary = 0x3f7f,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723a.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723a.c
-@@ -510,6 +510,7 @@ struct rtl8xxxu_fileops rtl8723au_fops =
- 	.rx_agg_buf_size = 16000,
- 	.tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
- 	.rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16),
-+	.max_sec_cam_num = 32,
- 	.adda_1t_init = 0x0b1b25a0,
- 	.adda_1t_path_on = 0x0bdb25a0,
- 	.adda_2t_path_on_a = 0x04db25a4,
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723b.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723b.c
-@@ -1744,6 +1744,7 @@ struct rtl8xxxu_fileops rtl8723bu_fops =
- 	.max_aggr_num = 0x0c14,
- 	.supports_ap = 1,
- 	.max_macid_num = 128,
-+	.max_sec_cam_num = 64,
- 	.adda_1t_init = 0x01c00014,
- 	.adda_1t_path_on = 0x01c00014,
- 	.adda_2t_path_on_a = 0x01c00014,
diff --git a/package/kernel/mac80211/patches/rtl/006-v6.9-wifi-rtl8xxxu-fix-error-messages.patch b/package/kernel/mac80211/patches/rtl/006-v6.9-wifi-rtl8xxxu-fix-error-messages.patch
deleted file mode 100644
index 961f613161..0000000000
--- a/package/kernel/mac80211/patches/rtl/006-v6.9-wifi-rtl8xxxu-fix-error-messages.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 17903a283593c1dbf9da041f836004163ca30f7b Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@linaro.org>
-Date: Wed, 31 Jan 2024 10:10:07 +0300
-Subject: [PATCH] wifi: rtl8xxxu: fix error messages
-
-The first parameter of WARN_ONCE() is a condition so this code will end
-up printing the function name instead of the proper message.
-
-Fixes: 3ff7a05996f9 ("wifi: rtl8xxxu: support setting bssid register for multiple interfaces")
-Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/7b144531-a8da-4725-8911-9b614a525a35@moroto.mountain
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -3593,7 +3593,7 @@ static int rtl8xxxu_set_mac(struct rtl8x
- 		reg = REG_MACID1;
- 		break;
- 	default:
--		WARN_ONCE("%s: invalid port_num\n", __func__);
-+		WARN_ONCE(1, "%s: invalid port_num\n", __func__);
- 		return -EINVAL;
- 	}
- 
-@@ -3618,7 +3618,7 @@ static int rtl8xxxu_set_bssid(struct rtl
- 		reg = REG_BSSID1;
- 		break;
- 	default:
--		WARN_ONCE("%s: invalid port_num\n", __func__);
-+		WARN_ONCE(1, "%s: invalid port_num\n", __func__);
- 		return -EINVAL;
- 	}
- 
diff --git a/package/kernel/mac80211/patches/rtl/007-v6.9-wifi-rtl8xxxu-Add-TP-Link-TL-WN823N-V2.patch b/package/kernel/mac80211/patches/rtl/007-v6.9-wifi-rtl8xxxu-Add-TP-Link-TL-WN823N-V2.patch
deleted file mode 100644
index 7ccc08c28d..0000000000
--- a/package/kernel/mac80211/patches/rtl/007-v6.9-wifi-rtl8xxxu-Add-TP-Link-TL-WN823N-V2.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 1209f487d452ff7e822dec30661fd6b5163fb8cf Mon Sep 17 00:00:00 2001
-From: Chun Qiu <cqca@cock.lu>
-Date: Mon, 29 Jan 2024 13:30:30 +0800
-Subject: [PATCH] wifi: rtl8xxxu: Add TP-Link TL-WN823N V2
-
-TP-Link TL-WN823N V2 (2357:0135) is based on rtl8192fu and has been
-tested to work with the rtl8xxxu driver.
-
-Signed-off-by: Chun Qiu <cqca@cock.lu>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240129053030.16369-1-cqca@cock.lu
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -7733,7 +7733,7 @@ static int rtl8xxxu_probe(struct usb_int
- 			untested = 0;
- 		break;
- 	case 0x2357:
--		if (id->idProduct == 0x0109)
-+		if (id->idProduct == 0x0109 || id->idProduct == 0x0135)
- 			untested = 0;
- 		break;
- 	case 0x0b05:
-@@ -8025,6 +8025,9 @@ static const struct usb_device_id dev_ta
- 	.driver_info = (unsigned long)&rtl8192fu_fops},
- {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDOR_ID_REALTEK, 0x318b, 0xff, 0xff, 0xff),
- 	.driver_info = (unsigned long)&rtl8192fu_fops},
-+/* TP-Link TL-WN823N V2 */
-+{USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0135, 0xff, 0xff, 0xff),
-+	.driver_info = (unsigned long)&rtl8192fu_fops},
- #ifdef CPTCFG_RTL8XXXU_UNTESTED
- /* Still supported by rtlwifi */
- {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDOR_ID_REALTEK, 0x8176, 0xff, 0xff, 0xff),
diff --git a/package/kernel/mac80211/patches/rtl/008-v6.9-wifi-rtl8xxxu-update-rate-mask-per-sta.patch b/package/kernel/mac80211/patches/rtl/008-v6.9-wifi-rtl8xxxu-update-rate-mask-per-sta.patch
deleted file mode 100644
index 66cd70c6b1..0000000000
--- a/package/kernel/mac80211/patches/rtl/008-v6.9-wifi-rtl8xxxu-update-rate-mask-per-sta.patch
+++ /dev/null
@@ -1,411 +0,0 @@
-From 94dd7ce1885e530a7b10bbe50d5d68ba1bb99e6e Mon Sep 17 00:00:00 2001
-From: Martin Kaistra <martin.kaistra@linutronix.de>
-Date: Mon, 5 Feb 2024 10:30:40 +0100
-Subject: [PATCH] wifi: rtl8xxxu: update rate mask per sta
-
-Until now, rtl8xxxu_watchdog_callback() only fetches RSSI and updates
-the rate mask in station mode. This means, in AP mode only the default
-rate mask is used.
-
-In order to have the rate mask reflect the actual connection quality,
-extend rtl8xxxu_watchdog_callback() to iterate over every sta. Like in
-the rtw88 driver, add a function to collect all currently present stas
-and then iterate over a list of copies to ensure no RCU lock problems
-for register access via USB. Remove the existing RCU lock in
-rtl8xxxu_refresh_rate_mask().
-
-Since the currently used ieee80211_ave_rssi() is only for 'vif', add
-driver-level tracking of RSSI per sta.
-
-Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240205093040.1941140-1-martin.kaistra@linutronix.de
----
- .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h  |   8 +-
- .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 188 ++++++++++++++----
- 2 files changed, 158 insertions(+), 38 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
-@@ -6,6 +6,7 @@
-  */
- 
- #include <asm/byteorder.h>
-+#include <linux/average.h>
- 
- #define RTL8XXXU_DEBUG_REG_WRITE	0x01
- #define RTL8XXXU_DEBUG_REG_READ		0x02
-@@ -1858,6 +1859,8 @@ struct rtl8xxxu_priv {
- 	int next_mbox;
- 	int nr_out_eps;
- 
-+	/* Ensure no added or deleted stas while iterating */
-+	struct mutex sta_mutex;
- 	struct mutex h2c_mutex;
- 	/* Protect the indirect register accesses of RTL8710BU. */
- 	struct mutex syson_indirect_access_mutex;
-@@ -1892,7 +1895,6 @@ struct rtl8xxxu_priv {
- 	u8 pi_enabled:1;
- 	u8 no_pape:1;
- 	u8 int_buf[USB_INTR_CONTENT_LENGTH];
--	u8 rssi_level;
- 	DECLARE_BITMAP(tx_aggr_started, IEEE80211_NUM_TIDS);
- 	DECLARE_BITMAP(tid_tx_operational, IEEE80211_NUM_TIDS);
- 
-@@ -1913,11 +1915,15 @@ struct rtl8xxxu_priv {
- 	DECLARE_BITMAP(cam_map, RTL8XXXU_MAX_SEC_CAM_NUM);
- };
- 
-+DECLARE_EWMA(rssi, 10, 16);
-+
- struct rtl8xxxu_sta_info {
- 	struct ieee80211_sta *sta;
- 	struct ieee80211_vif *vif;
- 
- 	u8 macid;
-+	struct ewma_rssi avg_rssi;
-+	u8 rssi_level;
- };
- 
- struct rtl8xxxu_vif {
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4991,10 +4991,11 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 	struct device *dev = &priv->udev->dev;
-+	struct rtl8xxxu_sta_info *sta_info;
- 	struct ieee80211_sta *sta;
- 	struct rtl8xxxu_ra_report *rarpt;
-+	u8 val8, macid;
- 	u32 val32;
--	u8 val8;
- 
- 	rarpt = &priv->ra_report;
- 
-@@ -5017,6 +5018,7 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 				rcu_read_unlock();
- 				goto error;
- 			}
-+			macid = rtl8xxxu_get_macid(priv, sta);
- 
- 			if (sta->deflink.ht_cap.ht_supported)
- 				dev_info(dev, "%s: HT supported\n", __func__);
-@@ -5037,14 +5039,15 @@ rtl8xxxu_bss_info_changed(struct ieee802
- 				bw = RATE_INFO_BW_40;
- 			else
- 				bw = RATE_INFO_BW_20;
-+
-+			sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
-+			sta_info->rssi_level = RTL8XXXU_RATR_STA_INIT;
- 			rcu_read_unlock();
- 
- 			rtl8xxxu_update_ra_report(rarpt, highest_rate, sgi, bw);
- 
--			priv->rssi_level = RTL8XXXU_RATR_STA_INIT;
--
- 			priv->fops->update_rate_mask(priv, ramask, 0, sgi,
--						     bw == RATE_INFO_BW_40, 0);
-+						     bw == RATE_INFO_BW_40, macid);
- 
- 			rtl8xxxu_write8(priv, REG_BCN_MAX_ERR, 0xff);
- 
-@@ -6317,6 +6320,76 @@ static void rtl8188e_c2hcmd_callback(str
- 	}
- }
- 
-+#define rtl8xxxu_iterate_vifs_atomic(priv, iterator, data)			\
-+	ieee80211_iterate_active_interfaces_atomic((priv)->hw,			\
-+			IEEE80211_IFACE_ITER_NORMAL, iterator, data)
-+
-+struct rtl8xxxu_rx_update_rssi_data {
-+	struct rtl8xxxu_priv *priv;
-+	struct ieee80211_hdr *hdr;
-+	struct ieee80211_rx_status *rx_status;
-+	u8 *bssid;
-+};
-+
-+static void rtl8xxxu_rx_update_rssi_iter(void *data, u8 *mac,
-+					 struct ieee80211_vif *vif)
-+{
-+	struct rtl8xxxu_rx_update_rssi_data *iter_data = data;
-+	struct ieee80211_sta *sta;
-+	struct ieee80211_hdr *hdr = iter_data->hdr;
-+	struct rtl8xxxu_priv *priv = iter_data->priv;
-+	struct rtl8xxxu_sta_info *sta_info;
-+	struct ieee80211_rx_status *rx_status = iter_data->rx_status;
-+	u8 *bssid = iter_data->bssid;
-+
-+	if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
-+		return;
-+
-+	if (!(ether_addr_equal(vif->addr, hdr->addr1) ||
-+	      ieee80211_is_beacon(hdr->frame_control)))
-+		return;
-+
-+	sta = ieee80211_find_sta_by_ifaddr(priv->hw, hdr->addr2,
-+					   vif->addr);
-+	if (!sta)
-+		return;
-+
-+	sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
-+	ewma_rssi_add(&sta_info->avg_rssi, -rx_status->signal);
-+}
-+
-+static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr)
-+{
-+	__le16 fc = hdr->frame_control;
-+	u8 *bssid;
-+
-+	if (ieee80211_has_tods(fc))
-+		bssid = hdr->addr1;
-+	else if (ieee80211_has_fromds(fc))
-+		bssid = hdr->addr2;
-+	else
-+		bssid = hdr->addr3;
-+
-+	return bssid;
-+}
-+
-+static void rtl8xxxu_rx_update_rssi(struct rtl8xxxu_priv *priv,
-+				    struct ieee80211_rx_status *rx_status,
-+				    struct ieee80211_hdr *hdr)
-+{
-+	struct rtl8xxxu_rx_update_rssi_data data = {};
-+
-+	if (ieee80211_is_ctl(hdr->frame_control))
-+		return;
-+
-+	data.priv = priv;
-+	data.hdr = hdr;
-+	data.rx_status = rx_status;
-+	data.bssid = get_hdr_bssid(hdr);
-+
-+	rtl8xxxu_iterate_vifs_atomic(priv, rtl8xxxu_rx_update_rssi_iter, &data);
-+}
-+
- int rtl8xxxu_parse_rxdesc16(struct rtl8xxxu_priv *priv, struct sk_buff *skb)
- {
- 	struct ieee80211_hw *hw = priv->hw;
-@@ -6376,18 +6449,26 @@ int rtl8xxxu_parse_rxdesc16(struct rtl8x
- 			skb_queue_tail(&priv->c2hcmd_queue, skb);
- 			schedule_work(&priv->c2hcmd_work);
- 		} else {
-+			struct ieee80211_hdr *hdr;
-+
- 			phy_stats = (struct rtl8723au_phy_stats *)skb->data;
- 
- 			skb_pull(skb, drvinfo_sz + desc_shift);
- 
- 			skb_trim(skb, pkt_len);
- 
--			if (rx_desc->phy_stats)
-+			hdr = (struct ieee80211_hdr *)skb->data;
-+			if (rx_desc->phy_stats) {
- 				priv->fops->parse_phystats(
- 					priv, rx_status, phy_stats,
- 					rx_desc->rxmcs,
--					(struct ieee80211_hdr *)skb->data,
-+					hdr,
- 					rx_desc->crc32 || rx_desc->icverr);
-+				if (!rx_desc->crc32 && !rx_desc->icverr)
-+					rtl8xxxu_rx_update_rssi(priv,
-+								rx_status,
-+								hdr);
-+			}
- 
- 			rx_status->mactime = rx_desc->tsfl;
- 			rx_status->flag |= RX_FLAG_MACTIME_START;
-@@ -6484,10 +6565,15 @@ int rtl8xxxu_parse_rxdesc24(struct rtl8x
- 		} else {
- 			struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
- 
--			if (rx_desc->phy_stats)
-+			if (rx_desc->phy_stats) {
- 				priv->fops->parse_phystats(priv, rx_status, phy_stats,
- 							   rx_desc->rxmcs, hdr,
- 							   rx_desc->crc32 || rx_desc->icverr);
-+				if (!rx_desc->crc32 && !rx_desc->icverr)
-+					rtl8xxxu_rx_update_rssi(priv,
-+								rx_status,
-+								hdr);
-+			}
- 
- 			rx_status->mactime = rx_desc->tsfl;
- 			rx_status->flag |= RX_FLAG_MACTIME_START;
-@@ -7111,6 +7197,7 @@ static void rtl8xxxu_refresh_rate_mask(s
- 				       int signal, struct ieee80211_sta *sta,
- 				       bool force)
- {
-+	struct rtl8xxxu_sta_info *sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
- 	struct ieee80211_hw *hw = priv->hw;
- 	u16 wireless_mode;
- 	u8 rssi_level, ratr_idx;
-@@ -7119,7 +7206,7 @@ static void rtl8xxxu_refresh_rate_mask(s
- 	u8 go_up_gap = 5;
- 	u8 macid = rtl8xxxu_get_macid(priv, sta);
- 
--	rssi_level = priv->rssi_level;
-+	rssi_level = sta_info->rssi_level;
- 	snr = rtl8xxxu_signal_to_snr(signal);
- 	snr_thresh_high = RTL8XXXU_SNR_THRESH_HIGH;
- 	snr_thresh_low = RTL8XXXU_SNR_THRESH_LOW;
-@@ -7144,18 +7231,16 @@ static void rtl8xxxu_refresh_rate_mask(s
- 	else
- 		rssi_level = RTL8XXXU_RATR_STA_LOW;
- 
--	if (rssi_level != priv->rssi_level || force) {
-+	if (rssi_level != sta_info->rssi_level || force) {
- 		int sgi = 0;
- 		u32 rate_bitmap = 0;
- 
--		rcu_read_lock();
- 		rate_bitmap = (sta->deflink.supp_rates[0] & 0xfff) |
- 				(sta->deflink.ht_cap.mcs.rx_mask[0] << 12) |
- 				(sta->deflink.ht_cap.mcs.rx_mask[1] << 20);
- 		if (sta->deflink.ht_cap.cap &
- 		    (IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20))
- 			sgi = 1;
--		rcu_read_unlock();
- 
- 		wireless_mode = rtl8xxxu_wireless_mode(hw, sta);
- 		switch (wireless_mode) {
-@@ -7236,7 +7321,7 @@ static void rtl8xxxu_refresh_rate_mask(s
- 			break;
- 		}
- 
--		priv->rssi_level = rssi_level;
-+		sta_info->rssi_level = rssi_level;
- 		priv->fops->update_rate_mask(priv, rate_bitmap, ratr_idx, sgi, txbw_40mhz, macid);
- 	}
- }
-@@ -7329,40 +7414,60 @@ static void rtl8xxxu_track_cfo(struct rt
- 	rtl8xxxu_set_atc_status(priv, abs(cfo_average) >= CFO_TH_ATC);
- }
- 
--static void rtl8xxxu_watchdog_callback(struct work_struct *work)
-+static void rtl8xxxu_ra_iter(void *data, struct ieee80211_sta *sta)
- {
--	struct ieee80211_vif *vif;
--	struct rtl8xxxu_priv *priv;
--	int i;
-+	struct rtl8xxxu_sta_info *sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
-+	struct rtl8xxxu_priv *priv = data;
-+	int signal = -ewma_rssi_read(&sta_info->avg_rssi);
- 
--	priv = container_of(work, struct rtl8xxxu_priv, ra_watchdog.work);
--	for (i = 0; i < ARRAY_SIZE(priv->vifs); i++) {
--		vif = priv->vifs[i];
-+	priv->fops->report_rssi(priv, rtl8xxxu_get_macid(priv, sta),
-+				rtl8xxxu_signal_to_snr(signal));
-+	rtl8xxxu_refresh_rate_mask(priv, signal, sta, false);
-+}
-+
-+struct rtl8xxxu_stas_entry {
-+	struct list_head list;
-+	struct ieee80211_sta *sta;
-+};
- 
--		if (!vif || vif->type != NL80211_IFTYPE_STATION)
--			continue;
-+struct rtl8xxxu_iter_stas_data {
-+	struct rtl8xxxu_priv *priv;
-+	struct list_head list;
-+};
- 
--		int signal;
--		struct ieee80211_sta *sta;
-+static void rtl8xxxu_collect_sta_iter(void *data, struct ieee80211_sta *sta)
-+{
-+	struct rtl8xxxu_iter_stas_data *iter_stas = data;
-+	struct rtl8xxxu_stas_entry *stas_entry;
- 
--		rcu_read_lock();
--		sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
--		if (!sta) {
--			struct device *dev = &priv->udev->dev;
-+	stas_entry = kmalloc(sizeof(*stas_entry), GFP_ATOMIC);
-+	if (!stas_entry)
-+		return;
- 
--			dev_dbg(dev, "%s: no sta found\n", __func__);
--			rcu_read_unlock();
--			continue;
--		}
--		rcu_read_unlock();
-+	stas_entry->sta = sta;
-+	list_add_tail(&stas_entry->list, &iter_stas->list);
-+}
- 
--		signal = ieee80211_ave_rssi(vif);
-+static void rtl8xxxu_watchdog_callback(struct work_struct *work)
-+{
- 
--		priv->fops->report_rssi(priv, rtl8xxxu_get_macid(priv, sta),
--					rtl8xxxu_signal_to_snr(signal));
-+	struct rtl8xxxu_iter_stas_data iter_data;
-+	struct rtl8xxxu_stas_entry *sta_entry, *tmp;
-+	struct rtl8xxxu_priv *priv;
- 
--		rtl8xxxu_refresh_rate_mask(priv, signal, sta, false);
-+	priv = container_of(work, struct rtl8xxxu_priv, ra_watchdog.work);
-+	iter_data.priv = priv;
-+	INIT_LIST_HEAD(&iter_data.list);
-+
-+	mutex_lock(&priv->sta_mutex);
-+	ieee80211_iterate_stations_atomic(priv->hw, rtl8xxxu_collect_sta_iter,
-+					  &iter_data);
-+	list_for_each_entry_safe(sta_entry, tmp, &iter_data.list, list) {
-+		list_del_init(&sta_entry->list);
-+		rtl8xxxu_ra_iter(priv, sta_entry->sta);
-+		kfree(sta_entry);
- 	}
-+	mutex_unlock(&priv->sta_mutex);
- 
- 	if (priv->fops->set_crystal_cap)
- 		rtl8xxxu_track_cfo(priv);
-@@ -7504,10 +7609,15 @@ static int rtl8xxxu_sta_add(struct ieee8
- 	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 
-+	mutex_lock(&priv->sta_mutex);
-+	ewma_rssi_init(&sta_info->avg_rssi);
- 	if (vif->type == NL80211_IFTYPE_AP) {
-+		sta_info->rssi_level = RTL8XXXU_RATR_STA_INIT;
- 		sta_info->macid = rtl8xxxu_acquire_macid(priv);
--		if (sta_info->macid >= RTL8XXXU_MAX_MAC_ID_NUM)
-+		if (sta_info->macid >= RTL8XXXU_MAX_MAC_ID_NUM) {
-+			mutex_unlock(&priv->sta_mutex);
- 			return -ENOSPC;
-+		}
- 
- 		rtl8xxxu_refresh_rate_mask(priv, 0, sta, true);
- 		priv->fops->report_connect(priv, sta_info->macid, H2C_MACID_ROLE_STA, true);
-@@ -7523,6 +7633,7 @@ static int rtl8xxxu_sta_add(struct ieee8
- 			break;
- 		}
- 	}
-+	mutex_unlock(&priv->sta_mutex);
- 
- 	return 0;
- }
-@@ -7534,8 +7645,10 @@ static int rtl8xxxu_sta_remove(struct ie
- 	struct rtl8xxxu_sta_info *sta_info = (struct rtl8xxxu_sta_info *)sta->drv_priv;
- 	struct rtl8xxxu_priv *priv = hw->priv;
- 
-+	mutex_lock(&priv->sta_mutex);
- 	if (vif->type == NL80211_IFTYPE_AP)
- 		rtl8xxxu_release_macid(priv, sta_info->macid);
-+	mutex_unlock(&priv->sta_mutex);
- 
- 	return 0;
- }
-@@ -7766,6 +7879,7 @@ static int rtl8xxxu_probe(struct usb_int
- 	mutex_init(&priv->usb_buf_mutex);
- 	mutex_init(&priv->syson_indirect_access_mutex);
- 	mutex_init(&priv->h2c_mutex);
-+	mutex_init(&priv->sta_mutex);
- 	INIT_LIST_HEAD(&priv->tx_urb_free_list);
- 	spin_lock_init(&priv->tx_urb_lock);
- 	INIT_LIST_HEAD(&priv->rx_urb_pending_list);
diff --git a/package/kernel/mac80211/patches/rtl/009-v6.9-wifi-rtl8xxxu-check-vif-before-using-in-rtl8xxxu_tx.patch b/package/kernel/mac80211/patches/rtl/009-v6.9-wifi-rtl8xxxu-check-vif-before-using-in-rtl8xxxu_tx.patch
deleted file mode 100644
index 600f7c37df..0000000000
--- a/package/kernel/mac80211/patches/rtl/009-v6.9-wifi-rtl8xxxu-check-vif-before-using-in-rtl8xxxu_tx.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 513c559ca9f05394da79fbf20a8f89eec5f53dce Mon Sep 17 00:00:00 2001
-From: Ping-Ke Shih <pkshih@realtek.com>
-Date: Fri, 16 Feb 2024 11:39:23 +0800
-Subject: [PATCH] wifi: rtl8xxxu: check vif before using in rtl8xxxu_tx()
-
-The 'vif' is from tx_info of SKB, and other codes check 'vif' before using,
-which raises smatch warnings:
-
-drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c:5656 rtl8xxxu_tx()
-   warn: variable dereferenced before check 'vif' (see line 5553)
-
-Compile tested only.
-
-Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/20240216033923.34683-1-pkshih@realtek.com
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -5550,7 +5550,7 @@ static void rtl8xxxu_tx(struct ieee80211
- 	struct rtl8xxxu_tx_urb *tx_urb;
- 	struct ieee80211_sta *sta = NULL;
- 	struct ieee80211_vif *vif = tx_info->control.vif;
--	struct rtl8xxxu_vif *rtlvif = (struct rtl8xxxu_vif *)vif->drv_priv;
-+	struct rtl8xxxu_vif *rtlvif = vif ? (struct rtl8xxxu_vif *)vif->drv_priv : NULL;
- 	struct device *dev = &priv->udev->dev;
- 	u32 queue, rts_rate;
- 	u16 pktlen = skb->len;
-@@ -5621,7 +5621,7 @@ static void rtl8xxxu_tx(struct ieee80211
- 		default:
- 			break;
- 		}
--		if (bmc && rtlvif->hw_key_idx != 0xff) {
-+		if (bmc && rtlvif && rtlvif->hw_key_idx != 0xff) {
- 			tx_desc->txdw1 |= cpu_to_le32(TXDESC_EN_DESC_ID);
- 			macid = rtlvif->hw_key_idx;
- 		}
diff --git a/package/kernel/mac80211/patches/rtl/010-v6.9-wifi-rtl8xxxu-fix-mixed-declarations-and-code-warnin.patch b/package/kernel/mac80211/patches/rtl/010-v6.9-wifi-rtl8xxxu-fix-mixed-declarations-and-code-warnin.patch
deleted file mode 100644
index e1de784b09..0000000000
--- a/package/kernel/mac80211/patches/rtl/010-v6.9-wifi-rtl8xxxu-fix-mixed-declarations-and-code-warnin.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From a7e178259c5bc900da762b33d3a20b7ee1206f07 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Fri, 23 Feb 2024 21:34:32 +0800
-Subject: [PATCH] wifi: rtl8xxxu: fix mixed declarations in rtl8xxxu_set_aifs()
-
-Moving struct ieee80211_sta *sta variable definition to the front
-of the code to fix the ISO C90 forbids mixed declarations and code
-warning.
-
-Fixes: 43532c050f8e ("wifi: rtl8xxxu: support multiple interfaces in set_aifs()")
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
-Signed-off-by: Kalle Valo <kvalo@kernel.org>
-Link: https://msgid.link/TYAP286MB03157A408E0D69F2F6FBD88ABC552@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM
----
- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
-@@ -4919,11 +4919,11 @@ static void rtl8xxxu_set_aifs(struct rtl
- 	int i;
- 
- 	for (i = 0; i < ARRAY_SIZE(priv->vifs); i++) {
-+		struct ieee80211_sta *sta;
-+
- 		if (!priv->vifs[i])
- 			continue;
- 
--		struct ieee80211_sta *sta;
--
- 		rcu_read_lock();
- 		sta = ieee80211_find_sta(priv->vifs[i], priv->vifs[i]->bss_conf.bssid);
- 		if (sta)
diff --git a/package/kernel/mac80211/patches/subsys/100-v6.8-wifi-mac80211-rework-RX-timestamp-flags.patch b/package/kernel/mac80211/patches/subsys/100-v6.8-wifi-mac80211-rework-RX-timestamp-flags.patch
deleted file mode 100644
index 5f88d697c3..0000000000
--- a/package/kernel/mac80211/patches/subsys/100-v6.8-wifi-mac80211-rework-RX-timestamp-flags.patch
+++ /dev/null
@@ -1,161 +0,0 @@
-From d5b6f6d595b446c1693fdaa6aeb4a65b94d5fc90 Mon Sep 17 00:00:00 2001
-From: Johannes Berg <johannes.berg@intel.com>
-Date: Wed, 20 Dec 2023 13:41:39 +0200
-Subject: [PATCH] wifi: mac80211: rework RX timestamp flags
-
-We only have a single flag free, and before using that for
-another mactime flag, instead refactor the mactime flags
-to use a 2-bit field.
-
-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
-Reviewed-by: Gregory Greenman <gregory.greenman@intel.com>
-Reviewed-by: Benjamin Berg <benjamin.berg@intel.com>
-Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
-Link: https://msgid.link/20231220133549.d0e664832d14.I20c8900106f9bf81316bed778b1e3ce145785274@changeid
-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
----
- drivers/net/wireless/ath/ath10k/htt_rx.c |  2 +-
- include/net/mac80211.h                   | 13 +++++++++----
- net/mac80211/ieee80211_i.h               |  5 +----
- net/mac80211/util.c                      | 16 ++++++++++------
- 4 files changed, 21 insertions(+), 15 deletions(-)
-
---- a/drivers/net/wireless/ath/ath10k/htt_rx.c
-+++ b/drivers/net/wireless/ath/ath10k/htt_rx.c
-@@ -1294,7 +1294,7 @@ static void ath10k_htt_rx_h_ppdu(struct
- 		status->encoding = RX_ENC_LEGACY;
- 		status->bw = RATE_INFO_BW_20;
- 
--		status->flag &= ~RX_FLAG_MACTIME_END;
-+		status->flag &= ~RX_FLAG_MACTIME;
- 		status->flag |= RX_FLAG_NO_SIGNAL_VAL;
- 
- 		status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
---- a/include/net/mac80211.h
-+++ b/include/net/mac80211.h
-@@ -1352,6 +1352,9 @@ ieee80211_tx_info_clear_status(struct ie
-  *	the frame.
-  * @RX_FLAG_FAILED_PLCP_CRC: Set this flag if the PCLP check failed on
-  *	the frame.
-+ * @RX_FLAG_MACTIME: The timestamp passed in the RX status (@mactime
-+ *	field) is valid if this field is non-zero, and the position
-+ *	where the timestamp was sampled depends on the value.
-  * @RX_FLAG_MACTIME_START: The timestamp passed in the RX status (@mactime
-  *	field) is valid and contains the time the first symbol of the MPDU
-  *	was received. This is useful in monitor mode and for proper IBSS
-@@ -1431,12 +1434,12 @@ ieee80211_tx_info_clear_status(struct ie
- enum mac80211_rx_flags {
- 	RX_FLAG_MMIC_ERROR		= BIT(0),
- 	RX_FLAG_DECRYPTED		= BIT(1),
--	RX_FLAG_MACTIME_PLCP_START	= BIT(2),
-+	RX_FLAG_ONLY_MONITOR		= BIT(2),
- 	RX_FLAG_MMIC_STRIPPED		= BIT(3),
- 	RX_FLAG_IV_STRIPPED		= BIT(4),
- 	RX_FLAG_FAILED_FCS_CRC		= BIT(5),
- 	RX_FLAG_FAILED_PLCP_CRC 	= BIT(6),
--	RX_FLAG_MACTIME_START		= BIT(7),
-+	/* one free bit at 7 */
- 	RX_FLAG_NO_SIGNAL_VAL		= BIT(8),
- 	RX_FLAG_AMPDU_DETAILS		= BIT(9),
- 	RX_FLAG_PN_VALIDATED		= BIT(10),
-@@ -1445,8 +1448,10 @@ enum mac80211_rx_flags {
- 	RX_FLAG_AMPDU_IS_LAST		= BIT(13),
- 	RX_FLAG_AMPDU_DELIM_CRC_ERROR	= BIT(14),
- 	RX_FLAG_AMPDU_DELIM_CRC_KNOWN	= BIT(15),
--	RX_FLAG_MACTIME_END		= BIT(16),
--	RX_FLAG_ONLY_MONITOR		= BIT(17),
-+	RX_FLAG_MACTIME			= BIT(16) | BIT(17),
-+	RX_FLAG_MACTIME_PLCP_START	= 1 << 16,
-+	RX_FLAG_MACTIME_START		= 2 << 16,
-+	RX_FLAG_MACTIME_END		= 3 << 16,
- 	RX_FLAG_SKIP_MONITOR		= BIT(18),
- 	RX_FLAG_AMSDU_MORE		= BIT(19),
- 	RX_FLAG_RADIOTAP_TLV_AT_END	= BIT(20),
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -1807,10 +1807,7 @@ static inline bool txq_has_queue(struct
- static inline bool
- ieee80211_have_rx_timestamp(struct ieee80211_rx_status *status)
- {
--	WARN_ON_ONCE(status->flag & RX_FLAG_MACTIME_START &&
--		     status->flag & RX_FLAG_MACTIME_END);
--	return !!(status->flag & (RX_FLAG_MACTIME_START | RX_FLAG_MACTIME_END |
--				  RX_FLAG_MACTIME_PLCP_START));
-+	return status->flag & RX_FLAG_MACTIME;
- }
- 
- void ieee80211_vif_inc_num_mcast(struct ieee80211_sub_if_data *sdata);
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -4174,6 +4174,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 				     unsigned int mpdu_offset)
- {
- 	u64 ts = status->mactime;
-+	bool mactime_plcp_start;
- 	struct rate_info ri;
- 	u16 rate;
- 	u8 n_ltf;
-@@ -4181,6 +4182,9 @@ u64 ieee80211_calculate_rx_timestamp(str
- 	if (WARN_ON(!ieee80211_have_rx_timestamp(status)))
- 		return 0;
- 
-+	mactime_plcp_start = (status->flag & RX_FLAG_MACTIME) ==
-+				RX_FLAG_MACTIME_PLCP_START;
-+
- 	memset(&ri, 0, sizeof(ri));
- 
- 	ri.bw = status->bw;
-@@ -4195,7 +4199,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 		if (status->enc_flags & RX_ENC_FLAG_SHORT_GI)
- 			ri.flags |= RATE_INFO_FLAGS_SHORT_GI;
- 		/* TODO/FIXME: is this right? handle other PPDUs */
--		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
-+		if (mactime_plcp_start) {
- 			mpdu_offset += 2;
- 			ts += 36;
- 		}
-@@ -4212,7 +4216,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 		 * See P802.11ax_D6.0, section 27.3.4 for
- 		 * VHT PPDU format.
- 		 */
--		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
-+		if (mactime_plcp_start) {
- 			mpdu_offset += 2;
- 			ts += 36;
- 
-@@ -4236,7 +4240,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 		 * See P802.11REVmd_D3.0, section 19.3.2 for
- 		 * HT PPDU format.
- 		 */
--		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
-+		if (mactime_plcp_start) {
- 			mpdu_offset += 2;
- 			if (status->enc_flags & RX_ENC_FLAG_HT_GF)
- 				ts += 24;
-@@ -4264,7 +4268,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 		 * See P802.11REVmd_D3.0, section 21.3.2 for
- 		 * VHT PPDU format.
- 		 */
--		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
-+		if (mactime_plcp_start) {
- 			mpdu_offset += 2;
- 			ts += 36;
- 
-@@ -4298,7 +4302,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 		bitrate = sband->bitrates[status->rate_idx].bitrate;
- 		ri.legacy = DIV_ROUND_UP(bitrate, (1 << shift));
- 
--		if (status->flag & RX_FLAG_MACTIME_PLCP_START) {
-+		if (mactime_plcp_start) {
- 			if (status->band == NL80211_BAND_5GHZ) {
- 				ts += 20 << shift;
- 				mpdu_offset += 2;
-@@ -4320,7 +4324,7 @@ u64 ieee80211_calculate_rx_timestamp(str
- 		return 0;
- 
- 	/* rewind from end of MPDU */
--	if (status->flag & RX_FLAG_MACTIME_END)
-+	if ((status->flag & RX_FLAG_MACTIME) == RX_FLAG_MACTIME_END)
- 		ts -= mpdu_len * 8 * 10 / rate;
- 
- 	ts += mpdu_offset * 8 * 10 / rate;
diff --git a/package/kernel/mac80211/patches/subsys/101-v6.7-wifi-mac80211-Use-flexible-array-in-struct-ieee80211.patch b/package/kernel/mac80211/patches/subsys/101-v6.7-wifi-mac80211-Use-flexible-array-in-struct-ieee80211.patch
deleted file mode 100644
index 3f04c93c0a..0000000000
--- a/package/kernel/mac80211/patches/subsys/101-v6.7-wifi-mac80211-Use-flexible-array-in-struct-ieee80211.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 2ae5c9248e06dac2c2360be26b4e25f673238337 Mon Sep 17 00:00:00 2001
-From: Jeff Johnson <quic_jjohnson@quicinc.com>
-Date: Thu, 31 Aug 2023 11:22:58 -0700
-Subject: [PATCH] wifi: mac80211: Use flexible array in struct ieee80211_tim_ie
-
-Currently struct ieee80211_tim_ie defines:
-	u8 virtual_map[1];
-
-Per the guidance in [1] change this to be a flexible array.
-
-Per the discussion in [2] wrap the virtual_map in a union with a u8
-item in order to preserve the existing expectation that the
-virtual_map must contain at least one octet (at least when used in a
-non-S1G PPDU). This means that no driver changes are required.
-
-[1] https://docs.kernel.org/process/deprecated.html#zero-length-and-one-element-arrays
-[2] https://lore.kernel.org/linux-wireless/202308301529.AC90A9EF98@keescook/
-
-Suggested-by: Kees Cook <keescook@chromium.org>
-Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Reviewed-by: Kees Cook <keescook@chromium.org>
-Link: https://lore.kernel.org/r/20230831-ieee80211_tim_ie-v3-2-e10ff584ab5d@quicinc.com
-[add wifi prefix]
-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
----
- include/linux/ieee80211.h | 13 ++++++++++---
- 1 file changed, 10 insertions(+), 3 deletions(-)
-
---- a/include/linux/ieee80211.h
-+++ b/include/linux/ieee80211.h
-@@ -951,17 +951,24 @@ struct ieee80211_wide_bw_chansw_ie {
-  * @dtim_count: DTIM Count
-  * @dtim_period: DTIM Period
-  * @bitmap_ctrl: Bitmap Control
-+ * @required_octet: "Syntatic sugar" to force the struct size to the
-+ *                  minimum valid size when carried in a non-S1G PPDU
-  * @virtual_map: Partial Virtual Bitmap
-  *
-  * This structure represents the payload of the "TIM element" as
-- * described in IEEE Std 802.11-2020 section 9.4.2.5.
-+ * described in IEEE Std 802.11-2020 section 9.4.2.5. Note that this
-+ * definition is only applicable when the element is carried in a
-+ * non-S1G PPDU. When the TIM is carried in an S1G PPDU, the Bitmap
-+ * Control and Partial Virtual Bitmap may not be present.
-  */
- struct ieee80211_tim_ie {
- 	u8 dtim_count;
- 	u8 dtim_period;
- 	u8 bitmap_ctrl;
--	/* variable size: 1 - 251 bytes */
--	u8 virtual_map[1];
-+	union {
-+		u8 required_octet;
-+		DECLARE_FLEX_ARRAY(u8, virtual_map);
-+	};
- } __packed;
- 
- /**
diff --git a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
index 7bf99bec28..c71f1f2ffc 100644
--- a/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
+++ b/package/kernel/mac80211/patches/subsys/110-mac80211_keep_keys_on_stop_ap.patch
@@ -9,11 +9,16 @@ Used for AP+STA support in OpenWrt - preserve AP mode keys across STA reconnect
 
 --- a/net/mac80211/cfg.c
 +++ b/net/mac80211/cfg.c
-@@ -1635,7 +1635,6 @@ static int ieee80211_stop_ap(struct wiph
- 	link_conf->bssid_indicator = 0;
+@@ -1647,12 +1647,6 @@ static int ieee80211_stop_ap(struct wiph
  
- 	__sta_info_flush(sdata, true);
--	ieee80211_free_keys(sdata, true);
+ 	__sta_info_flush(sdata, true, link_id);
  
+-	ieee80211_remove_link_keys(link, &keys);
+-	if (!list_empty(&keys)) {
+-		synchronize_net();
+-		ieee80211_free_key_list(local, &keys);
+-	}
+-
  	link_conf->enable_beacon = false;
  	sdata->beacon_rate_set = false;
+ 	sdata->vif.cfg.ssid_len = 0;
diff --git a/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch b/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch
index 43507f2985..d4341a1350 100644
--- a/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch
+++ b/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch
@@ -1,8 +1,8 @@
 --- a/net/mac80211/main.c
 +++ b/net/mac80211/main.c
-@@ -1393,24 +1393,6 @@ int ieee80211_register_hw(struct ieee802
- 	debugfs_hw_add(local);
- 	rate_control_add_debugfs(local);
+@@ -1564,24 +1564,6 @@ int ieee80211_register_hw(struct ieee802
+ 
+ 	ieee80211_check_wbrf_support(local);
  
 -	rtnl_lock();
 -	wiphy_lock(hw->wiphy);
diff --git a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
index 1e9676fd0b..a1f96cb3a0 100644
--- a/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
+++ b/package/kernel/mac80211/patches/subsys/210-ap_scan.patch
@@ -8,7 +8,7 @@ Subject: [PATCH] mac80211: allow scans in access point mode (for site survey)
 
 --- a/net/mac80211/cfg.c
 +++ b/net/mac80211/cfg.c
-@@ -2847,6 +2847,8 @@ static int ieee80211_scan(struct wiphy *
+@@ -2844,6 +2844,8 @@ static int ieee80211_scan(struct wiphy *
  		 */
  		fallthrough;
  	case NL80211_IFTYPE_AP:
diff --git a/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch b/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
index 1034e2c928..d576661bd2 100644
--- a/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
+++ b/package/kernel/mac80211/patches/subsys/301-mac80211-sta-randomize-BA-session-dialog-token-alloc.patch
@@ -28,10 +28,10 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
 
 --- a/net/mac80211/sta_info.c
 +++ b/net/mac80211/sta_info.c
-@@ -561,6 +561,11 @@ __sta_info_alloc(struct ieee80211_sub_if
+@@ -565,6 +565,11 @@ __sta_info_alloc(struct ieee80211_sub_if
+ 	spin_lock_init(&sta->ps_lock);
  	INIT_WORK(&sta->drv_deliver_wk, sta_deliver_ps_frames);
- 	INIT_WORK(&sta->ampdu_mlme.work, ieee80211_ba_session_work);
- 	mutex_init(&sta->ampdu_mlme.mtx);
+ 	wiphy_work_init(&sta->ampdu_mlme.work, ieee80211_ba_session_work);
 +#if LINUX_VERSION_IS_LESS(6,2,0)
 +	sta->ampdu_mlme.dialog_token_allocator = prandom_u32_max(U8_MAX);
 +#else
diff --git a/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch b/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
index e4575ca7ba..71ce340d31 100644
--- a/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
+++ b/package/kernel/mac80211/patches/subsys/305-mac80211-increase-quantum-for-airtime-scheduler.patch
@@ -12,9 +12,9 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/net/mac80211/ieee80211_i.h
 +++ b/net/mac80211/ieee80211_i.h
-@@ -92,6 +92,8 @@ extern const u8 ieee80211_ac_to_qos_mask
-  */
- #define AIRTIME_ACTIVE_DURATION (HZ / 10)
+@@ -101,6 +101,8 @@ ieee80211_sta_keep_active(struct sta_inf
+ 	return time_before_eq(jiffies, sta->airtime[ac].last_active + HZ / 10);
+ }
  
 +#define AIRTIME_QUANTUM_SHIFT	3
 +
@@ -23,7 +23,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/mac80211/tx.c
 +++ b/net/mac80211/tx.c
-@@ -4060,7 +4060,7 @@ struct ieee80211_txq *ieee80211_next_txq
+@@ -4082,7 +4082,7 @@ struct ieee80211_txq *ieee80211_next_txq
  
  		if (deficit < 0)
  			sta->airtime[txqi->txq.ac].deficit +=
@@ -32,7 +32,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  		if (deficit < 0 || !aql_check) {
  			list_move_tail(&txqi->schedule_order,
-@@ -4203,7 +4203,8 @@ bool ieee80211_txq_may_transmit(struct i
+@@ -4225,7 +4225,8 @@ bool ieee80211_txq_may_transmit(struct i
  		}
  		sta = container_of(iter->txq.sta, struct sta_info, sta);
  		if (ieee80211_sta_deficit(sta, ac) < 0)
@@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		list_move_tail(&iter->schedule_order, &local->active_txqs[ac]);
  	}
  
-@@ -4211,7 +4212,7 @@ bool ieee80211_txq_may_transmit(struct i
+@@ -4233,7 +4234,7 @@ bool ieee80211_txq_may_transmit(struct i
  	if (sta->airtime[ac].deficit >= 0)
  		goto out;
  
diff --git a/package/kernel/mac80211/patches/subsys/306-wifi-mac80211-clear-vif-drv_priv-after-calling-remov.patch b/package/kernel/mac80211/patches/subsys/306-wifi-mac80211-clear-vif-drv_priv-after-calling-remov.patch
new file mode 100644
index 0000000000..b0119988d3
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/306-wifi-mac80211-clear-vif-drv_priv-after-calling-remov.patch
@@ -0,0 +1,29 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Wed, 3 Jul 2024 12:10:01 +0200
+Subject: [PATCH] wifi: mac80211: clear vif drv_priv after calling
+ remove_interface
+
+Avoid reusing stale driver data when an interface is brought down and up
+again. In order to avoid having to duplicate the memset in every single
+driver, do it here.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/iface.c
++++ b/net/mac80211/iface.c
+@@ -693,8 +693,12 @@ static void ieee80211_do_stop(struct iee
+ 
+ 		fallthrough;
+ 	default:
+-		if (going_down)
+-			drv_remove_interface(local, sdata);
++		if (!going_down)
++			break;
++		drv_remove_interface(local, sdata);
++
++		/* Clear private driver data to prevent reuse */
++		memset(sdata->vif.drv_priv, 0, local->hw.vif_data_size);
+ 	}
+ 
+ 	ieee80211_recalc_ps(local);
diff --git a/package/kernel/mac80211/patches/subsys/310-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch b/package/kernel/mac80211/patches/subsys/310-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch
deleted file mode 100644
index e142cfa4fe..0000000000
--- a/package/kernel/mac80211/patches/subsys/310-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch
+++ /dev/null
@@ -1,224 +0,0 @@
-From: Felix Fietkau <nbd@nbd.name>
-Date: Fri, 30 Jun 2023 13:11:51 +0200
-Subject: [PATCH] mac80211: split mesh fast tx cache into
- local/proxied/forwarded
-
-Depending on the origin of the packets (and their SA), 802.11 + mesh headers
-could be filled in differently. In order to properly deal with that, add a
-new field to the lookup key, indicating the type (local, proxied or
-forwarded). This can fix spurious packet drop issues that depend on the order
-in which nodes/hosts communicate with each other.
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
-
---- a/net/mac80211/mesh.c
-+++ b/net/mac80211/mesh.c
-@@ -765,6 +765,9 @@ bool ieee80211_mesh_xmit_fast(struct iee
- 			      struct sk_buff *skb, u32 ctrl_flags)
- {
- 	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
-+	struct ieee80211_mesh_fast_tx_key key = {
-+		.type = MESH_FAST_TX_TYPE_LOCAL
-+	};
- 	struct ieee80211_mesh_fast_tx *entry;
- 	struct ieee80211s_hdr *meshhdr;
- 	u8 sa[ETH_ALEN] __aligned(2);
-@@ -800,7 +803,10 @@ bool ieee80211_mesh_xmit_fast(struct iee
- 			return false;
- 	}
- 
--	entry = mesh_fast_tx_get(sdata, skb->data);
-+	ether_addr_copy(key.addr, skb->data);
-+	if (!ether_addr_equal(skb->data + ETH_ALEN, sdata->vif.addr))
-+		key.type = MESH_FAST_TX_TYPE_PROXIED;
-+	entry = mesh_fast_tx_get(sdata, &key);
- 	if (!entry)
- 		return false;
- 
---- a/net/mac80211/mesh.h
-+++ b/net/mac80211/mesh.h
-@@ -134,9 +134,38 @@ struct mesh_path {
- #define MESH_FAST_TX_CACHE_TIMEOUT		8000 /* msecs */
- 
- /**
-+ * enum ieee80211_mesh_fast_tx_type - cached mesh fast tx entry type
-+ *
-+ * @MESH_FAST_TX_TYPE_LOCAL: tx from the local vif address as SA
-+ * @MESH_FAST_TX_TYPE_PROXIED: local tx with a different SA (e.g. bridged)
-+ * @MESH_FAST_TX_TYPE_FORWARDED: forwarded from a different mesh point
-+ * @NUM_MESH_FAST_TX_TYPE: number of entry types
-+ */
-+enum ieee80211_mesh_fast_tx_type {
-+	MESH_FAST_TX_TYPE_LOCAL,
-+	MESH_FAST_TX_TYPE_PROXIED,
-+	MESH_FAST_TX_TYPE_FORWARDED,
-+
-+	/* must be last */
-+	NUM_MESH_FAST_TX_TYPE
-+};
-+
-+
-+/**
-+ * struct ieee80211_mesh_fast_tx_key - cached mesh fast tx entry key
-+ *
-+ * @addr: The Ethernet DA for this entry
-+ * @type: cache entry type
-+ */
-+struct ieee80211_mesh_fast_tx_key {
-+	u8 addr[ETH_ALEN] __aligned(2);
-+	u16 type;
-+};
-+
-+/**
-  * struct ieee80211_mesh_fast_tx - cached mesh fast tx entry
-  * @rhash: rhashtable pointer
-- * @addr_key: The Ethernet DA which is the key for this entry
-+ * @key: the lookup key for this cache entry
-  * @fast_tx: base fast_tx data
-  * @hdr: cached mesh and rfc1042 headers
-  * @hdrlen: length of mesh + rfc1042
-@@ -147,7 +176,7 @@ struct mesh_path {
-  */
- struct ieee80211_mesh_fast_tx {
- 	struct rhash_head rhash;
--	u8 addr_key[ETH_ALEN] __aligned(2);
-+	struct ieee80211_mesh_fast_tx_key key;
- 
- 	struct ieee80211_fast_tx fast_tx;
- 	u8 hdr[sizeof(struct ieee80211s_hdr) + sizeof(rfc1042_header)];
-@@ -333,7 +362,8 @@ void mesh_path_tx_root_frame(struct ieee
- 
- bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt);
- struct ieee80211_mesh_fast_tx *
--mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr);
-+mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata,
-+		 struct ieee80211_mesh_fast_tx_key *key);
- bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
- 			      struct sk_buff *skb, u32 ctrl_flags);
- void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata,
---- a/net/mac80211/mesh_pathtbl.c
-+++ b/net/mac80211/mesh_pathtbl.c
-@@ -36,8 +36,8 @@ static const struct rhashtable_params me
- static const struct rhashtable_params fast_tx_rht_params = {
- 	.nelem_hint = 10,
- 	.automatic_shrinking = true,
--	.key_len = ETH_ALEN,
--	.key_offset = offsetof(struct ieee80211_mesh_fast_tx, addr_key),
-+	.key_len = sizeof(struct ieee80211_mesh_fast_tx_key),
-+	.key_offset = offsetof(struct ieee80211_mesh_fast_tx, key),
- 	.head_offset = offsetof(struct ieee80211_mesh_fast_tx, rhash),
- 	.hashfn = mesh_table_hash,
- };
-@@ -426,20 +426,21 @@ static void mesh_fast_tx_entry_free(stru
- }
- 
- struct ieee80211_mesh_fast_tx *
--mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr)
-+mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata,
-+		 struct ieee80211_mesh_fast_tx_key *key)
- {
- 	struct ieee80211_mesh_fast_tx *entry;
- 	struct mesh_tx_cache *cache;
- 
- 	cache = &sdata->u.mesh.tx_cache;
--	entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
-+	entry = rhashtable_lookup(&cache->rht, key, fast_tx_rht_params);
- 	if (!entry)
- 		return NULL;
- 
- 	if (!(entry->mpath->flags & MESH_PATH_ACTIVE) ||
- 	    mpath_expired(entry->mpath)) {
- 		spin_lock_bh(&cache->walk_lock);
--		entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params);
-+		entry = rhashtable_lookup(&cache->rht, key, fast_tx_rht_params);
- 		if (entry)
- 		    mesh_fast_tx_entry_free(cache, entry);
- 		spin_unlock_bh(&cache->walk_lock);
-@@ -484,18 +485,24 @@ void mesh_fast_tx_cache(struct ieee80211
- 	if (!sta)
- 		return;
- 
-+	build.key.type = MESH_FAST_TX_TYPE_LOCAL;
- 	if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) {
- 		/* This is required to keep the mppath alive */
- 		mppath = mpp_path_lookup(sdata, meshhdr->eaddr1);
- 		if (!mppath)
- 			return;
- 		build.mppath = mppath;
-+		if (!ether_addr_equal(meshhdr->eaddr2, sdata->vif.addr))
-+			build.key.type = MESH_FAST_TX_TYPE_PROXIED;
- 	} else if (ieee80211_has_a4(hdr->frame_control)) {
- 		mppath = mpath;
- 	} else {
- 		return;
- 	}
- 
-+	if (!ether_addr_equal(hdr->addr4, sdata->vif.addr))
-+		build.key.type = MESH_FAST_TX_TYPE_FORWARDED;
-+
- 	/* rate limit, in case fast xmit can't be enabled */
- 	if (mppath->fast_tx_check == jiffies)
- 		return;
-@@ -542,7 +549,7 @@ void mesh_fast_tx_cache(struct ieee80211
- 		}
- 	}
- 
--	memcpy(build.addr_key, mppath->dst, ETH_ALEN);
-+	memcpy(build.key.addr, mppath->dst, ETH_ALEN);
- 	build.timestamp = jiffies;
- 	build.fast_tx.band = info->band;
- 	build.fast_tx.da_offs = offsetof(struct ieee80211_hdr, addr3);
-@@ -644,13 +651,19 @@ void mesh_fast_tx_flush_addr(struct ieee
- 			     const u8 *addr)
- {
- 	struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache;
-+	struct ieee80211_mesh_fast_tx_key key = {};
- 	struct ieee80211_mesh_fast_tx *entry;
-+	int i;
- 
-+	ether_addr_copy(key.addr, addr);
- 	cache = &sdata->u.mesh.tx_cache;
- 	spin_lock_bh(&cache->walk_lock);
--	entry = rhashtable_lookup_fast(&cache->rht, addr, fast_tx_rht_params);
--	if (entry)
--		mesh_fast_tx_entry_free(cache, entry);
-+	for (i = 0; i < NUM_MESH_FAST_TX_TYPE; i++) {
-+		key.type = i;
-+		entry = rhashtable_lookup_fast(&cache->rht, &key, fast_tx_rht_params);
-+		if (entry)
-+			mesh_fast_tx_entry_free(cache, entry);
-+	}
- 	spin_unlock_bh(&cache->walk_lock);
- }
- 
---- a/net/mac80211/rx.c
-+++ b/net/mac80211/rx.c
-@@ -2726,7 +2726,10 @@ ieee80211_rx_mesh_fast_forward(struct ie
- 			       struct sk_buff *skb, int hdrlen)
- {
- 	struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh;
--	struct ieee80211_mesh_fast_tx *entry = NULL;
-+	struct ieee80211_mesh_fast_tx_key key = {
-+		.type = MESH_FAST_TX_TYPE_FORWARDED
-+	};
-+	struct ieee80211_mesh_fast_tx *entry;
- 	struct ieee80211s_hdr *mesh_hdr;
- 	struct tid_ampdu_tx *tid_tx;
- 	struct sta_info *sta;
-@@ -2735,9 +2738,13 @@ ieee80211_rx_mesh_fast_forward(struct ie
- 
- 	mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(eth));
- 	if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6)
--		entry = mesh_fast_tx_get(sdata, mesh_hdr->eaddr1);
-+		ether_addr_copy(key.addr, mesh_hdr->eaddr1);
- 	else if (!(mesh_hdr->flags & MESH_FLAGS_AE))
--		entry = mesh_fast_tx_get(sdata, skb->data);
-+		ether_addr_copy(key.addr, skb->data);
-+	else
-+		return false;
-+
-+	entry = mesh_fast_tx_get(sdata, &key);
- 	if (!entry)
- 		return false;
- 
diff --git a/package/kernel/mac80211/patches/subsys/312-wifi-cfg80211-annotate-iftype_data-pointer-with-spar.patch b/package/kernel/mac80211/patches/subsys/312-wifi-cfg80211-annotate-iftype_data-pointer-with-spar.patch
deleted file mode 100644
index 91ebfc6105..0000000000
--- a/package/kernel/mac80211/patches/subsys/312-wifi-cfg80211-annotate-iftype_data-pointer-with-spar.patch
+++ /dev/null
@@ -1,467 +0,0 @@
-From: Johannes Berg <johannes.berg@intel.com>
-Date: Mon, 28 Aug 2023 09:54:39 +0200
-Subject: [PATCH] wifi: cfg80211: annotate iftype_data pointer with sparse
-
-There were are a number of cases in mac80211 and iwlwifi (at
-least) that used the sband->iftype_data pointer directly,
-instead of using the accessors to find the right array entry
-to use.
-
-Make sparse warn when such a thing is done.
-
-To not have a lot of casts, add two helper functions/macros
-
- - ieee80211_set_sband_iftype_data()
- - for_each_sband_iftype_data()
-
-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
----
-
---- a/drivers/net/wireless/ath/ath11k/mac.c
-+++ b/drivers/net/wireless/ath/ath11k/mac.c
-@@ -5893,8 +5893,9 @@ static void ath11k_mac_setup_he_cap(stru
- 					       ar->mac.iftype[NL80211_BAND_2GHZ],
- 					       NL80211_BAND_2GHZ);
- 		band = &ar->mac.sbands[NL80211_BAND_2GHZ];
--		band->iftype_data = ar->mac.iftype[NL80211_BAND_2GHZ];
--		band->n_iftype_data = count;
-+		_ieee80211_set_sband_iftype_data(band,
-+						 ar->mac.iftype[NL80211_BAND_2GHZ],
-+						 count);
- 	}
- 
- 	if (cap->supported_bands & WMI_HOST_WLAN_5G_CAP) {
-@@ -5902,8 +5903,9 @@ static void ath11k_mac_setup_he_cap(stru
- 					       ar->mac.iftype[NL80211_BAND_5GHZ],
- 					       NL80211_BAND_5GHZ);
- 		band = &ar->mac.sbands[NL80211_BAND_5GHZ];
--		band->iftype_data = ar->mac.iftype[NL80211_BAND_5GHZ];
--		band->n_iftype_data = count;
-+		_ieee80211_set_sband_iftype_data(band,
-+						 ar->mac.iftype[NL80211_BAND_5GHZ],
-+						 count);
- 	}
- 
- 	if (cap->supported_bands & WMI_HOST_WLAN_5G_CAP &&
-@@ -5912,8 +5914,9 @@ static void ath11k_mac_setup_he_cap(stru
- 					       ar->mac.iftype[NL80211_BAND_6GHZ],
- 					       NL80211_BAND_6GHZ);
- 		band = &ar->mac.sbands[NL80211_BAND_6GHZ];
--		band->iftype_data = ar->mac.iftype[NL80211_BAND_6GHZ];
--		band->n_iftype_data = count;
-+		_ieee80211_set_sband_iftype_data(band,
-+						 ar->mac.iftype[NL80211_BAND_6GHZ],
-+						 count);
- 	}
- }
- 
---- a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
-+++ b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
-@@ -1078,8 +1078,8 @@ static void iwl_init_he_hw_capab(struct
- 
- 	memcpy(iftype_data, iwl_he_eht_capa, sizeof(iwl_he_eht_capa));
- 
--	sband->iftype_data = iftype_data;
--	sband->n_iftype_data = ARRAY_SIZE(iwl_he_eht_capa);
-+	_ieee80211_set_sband_iftype_data(sband, iftype_data,
-+					 ARRAY_SIZE(iwl_he_eht_capa));
- 
- 	for (i = 0; i < sband->n_iftype_data; i++)
- 		iwl_nvm_fixup_sband_iftd(trans, data, sband, &iftype_data[i],
---- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c
-@@ -1127,8 +1127,7 @@ void mt7915_set_stream_he_caps(struct mt
- 		n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
- 
- 		band = &phy->mt76->sband_2g.sband;
--		band->iftype_data = data;
--		band->n_iftype_data = n;
-+		_ieee80211_set_sband_iftype_data(band, data, n);
- 	}
- 
- 	if (phy->mt76->cap.has_5ghz) {
-@@ -1136,8 +1135,7 @@ void mt7915_set_stream_he_caps(struct mt
- 		n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
- 
- 		band = &phy->mt76->sband_5g.sband;
--		band->iftype_data = data;
--		band->n_iftype_data = n;
-+		_ieee80211_set_sband_iftype_data(band, data, n);
- 	}
- 
- 	if (phy->mt76->cap.has_6ghz) {
-@@ -1145,8 +1143,7 @@ void mt7915_set_stream_he_caps(struct mt
- 		n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
- 
- 		band = &phy->mt76->sband_6g.sband;
--		band->iftype_data = data;
--		band->n_iftype_data = n;
-+		_ieee80211_set_sband_iftype_data(band, data, n);
- 	}
- }
- 
---- a/drivers/net/wireless/mediatek/mt76/mt7921/main.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt7921/main.c
-@@ -196,8 +196,7 @@ void mt7921_set_stream_he_caps(struct mt
- 		n = mt7921_init_he_caps(phy, NL80211_BAND_2GHZ, data);
- 
- 		band = &phy->mt76->sband_2g.sband;
--		band->iftype_data = data;
--		band->n_iftype_data = n;
-+		_ieee80211_set_sband_iftype_data(band, data, n);
- 	}
- 
- 	if (phy->mt76->cap.has_5ghz) {
-@@ -205,16 +204,14 @@ void mt7921_set_stream_he_caps(struct mt
- 		n = mt7921_init_he_caps(phy, NL80211_BAND_5GHZ, data);
- 
- 		band = &phy->mt76->sband_5g.sband;
--		band->iftype_data = data;
--		band->n_iftype_data = n;
-+		_ieee80211_set_sband_iftype_data(band, data, n);
- 
- 		if (phy->mt76->cap.has_6ghz) {
- 			data = phy->iftype[NL80211_BAND_6GHZ];
- 			n = mt7921_init_he_caps(phy, NL80211_BAND_6GHZ, data);
- 
- 			band = &phy->mt76->sband_6g.sband;
--			band->iftype_data = data;
--			band->n_iftype_data = n;
-+			_ieee80211_set_sband_iftype_data(band, data, n);
- 		}
- 	}
- }
---- a/drivers/net/wireless/mediatek/mt76/mt7996/init.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt7996/init.c
-@@ -828,8 +828,7 @@ __mt7996_set_stream_he_eht_caps(struct m
- 		n++;
- 	}
- 
--	sband->iftype_data = data;
--	sband->n_iftype_data = n;
-+	_ieee80211_set_sband_iftype_data(sband, data, n);
- }
- 
- void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy)
---- a/drivers/net/wireless/quantenna/qtnfmac/commands.c
-+++ b/drivers/net/wireless/quantenna/qtnfmac/commands.c
-@@ -1335,7 +1335,7 @@ static int qtnf_cmd_band_fill_iftype(con
- 		return -EINVAL;
- 	}
- 
--	kfree(band->iftype_data);
-+	kfree((__force void *)band->iftype_data);
- 	band->iftype_data = NULL;
- 	band->n_iftype_data = tlv->n_iftype_data;
- 	if (band->n_iftype_data == 0)
-@@ -1347,7 +1347,8 @@ static int qtnf_cmd_band_fill_iftype(con
- 		band->n_iftype_data = 0;
- 		return -ENOMEM;
- 	}
--	band->iftype_data = iftype_data;
-+
-+	_ieee80211_set_sband_iftype_data(band, iftype_data, tlv->n_iftype_data);
- 
- 	for (i = 0; i < band->n_iftype_data; i++)
- 		qtnf_cmd_conv_iftype(iftype_data++, &tlv->iftype_data[i]);
---- a/drivers/net/wireless/quantenna/qtnfmac/core.c
-+++ b/drivers/net/wireless/quantenna/qtnfmac/core.c
-@@ -549,7 +549,7 @@ static void qtnf_core_mac_detach(struct
- 		if (!wiphy->bands[band])
- 			continue;
- 
--		kfree(wiphy->bands[band]->iftype_data);
-+		kfree((__force void *)wiphy->bands[band]->iftype_data);
- 		wiphy->bands[band]->n_iftype_data = 0;
- 
- 		kfree(wiphy->bands[band]->channels);
---- a/drivers/net/wireless/realtek/rtw89/core.c
-+++ b/drivers/net/wireless/realtek/rtw89/core.c
-@@ -3359,8 +3359,7 @@ static void rtw89_init_he_cap(struct rtw
- 		idx++;
- 	}
- 
--	sband->iftype_data = iftype_data;
--	sband->n_iftype_data = idx;
-+	_ieee80211_set_sband_iftype_data(sband, iftype_data, idx);
- }
- 
- static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
-@@ -3405,11 +3404,11 @@ err:
- 	hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
- 	hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
- 	if (sband_2ghz)
--		kfree(sband_2ghz->iftype_data);
-+		kfree((__force void *)sband_2ghz->iftype_data);
- 	if (sband_5ghz)
--		kfree(sband_5ghz->iftype_data);
-+		kfree((__force void *)sband_5ghz->iftype_data);
- 	if (sband_6ghz)
--		kfree(sband_6ghz->iftype_data);
-+		kfree((__force void *)sband_6ghz->iftype_data);
- 	kfree(sband_2ghz);
- 	kfree(sband_5ghz);
- 	kfree(sband_6ghz);
-@@ -3421,11 +3420,11 @@ static void rtw89_core_clr_supported_ban
- 	struct ieee80211_hw *hw = rtwdev->hw;
- 
- 	if (hw->wiphy->bands[NL80211_BAND_2GHZ])
--		kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
-+		kfree((__force void *)hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
- 	if (hw->wiphy->bands[NL80211_BAND_5GHZ])
--		kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
-+		kfree((__force void *)hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
- 	if (hw->wiphy->bands[NL80211_BAND_6GHZ])
--		kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
-+		kfree((__force void *)hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
- 	kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
- 	kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
- 	kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]);
---- a/drivers/net/wireless/realtek/rtw89/regd.c
-+++ b/drivers/net/wireless/realtek/rtw89/regd.c
-@@ -377,7 +377,7 @@ bottom:
- 		return;
- 
- 	wiphy->bands[NL80211_BAND_6GHZ] = NULL;
--	kfree(sband->iftype_data);
-+	kfree((__force void *)sband->iftype_data);
- 	kfree(sband);
- }
- 
---- a/drivers/net/wireless/virtual/mac80211_hwsim.c
-+++ b/drivers/net/wireless/virtual/mac80211_hwsim.c
-@@ -4899,25 +4899,19 @@ static const struct ieee80211_sband_ifty
- 
- static void mac80211_hwsim_sband_capab(struct ieee80211_supported_band *sband)
- {
--	u16 n_iftype_data;
--
--	if (sband->band == NL80211_BAND_2GHZ) {
--		n_iftype_data = ARRAY_SIZE(sband_capa_2ghz);
--		sband->iftype_data =
--			(struct ieee80211_sband_iftype_data *)sband_capa_2ghz;
--	} else if (sband->band == NL80211_BAND_5GHZ) {
--		n_iftype_data = ARRAY_SIZE(sband_capa_5ghz);
--		sband->iftype_data =
--			(struct ieee80211_sband_iftype_data *)sband_capa_5ghz;
--	} else if (sband->band == NL80211_BAND_6GHZ) {
--		n_iftype_data = ARRAY_SIZE(sband_capa_6ghz);
--		sband->iftype_data =
--			(struct ieee80211_sband_iftype_data *)sband_capa_6ghz;
--	} else {
--		return;
-+	switch (sband->band) {
-+	case NL80211_BAND_2GHZ:
-+		ieee80211_set_sband_iftype_data(sband, sband_capa_2ghz);
-+		break;
-+	case NL80211_BAND_5GHZ:
-+		ieee80211_set_sband_iftype_data(sband, sband_capa_5ghz);
-+		break;
-+	case NL80211_BAND_6GHZ:
-+		ieee80211_set_sband_iftype_data(sband, sband_capa_6ghz);
-+		break;
-+	default:
-+		break;
- 	}
--
--	sband->n_iftype_data = n_iftype_data;
- }
- 
- #ifdef CPTCFG_MAC80211_MESH
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -415,6 +415,19 @@ struct ieee80211_sta_eht_cap {
- 	u8 eht_ppe_thres[IEEE80211_EHT_PPE_THRES_MAX_LEN];
- };
- 
-+/* sparse defines __CHECKER__; see Documentation/dev-tools/sparse.rst */
-+#ifdef __CHECKER__
-+/*
-+ * This is used to mark the sband->iftype_data pointer which is supposed
-+ * to be an array with special access semantics (per iftype), but a lot
-+ * of code got it wrong in the past, so with this marking sparse will be
-+ * noisy when the pointer is used directly.
-+ */
-+# define __iftd		__attribute__((noderef, address_space(__iftype_data)))
-+#else
-+# define __iftd
-+#endif /* __CHECKER__ */
-+
- /**
-  * struct ieee80211_sband_iftype_data - sband data per interface type
-  *
-@@ -548,10 +561,48 @@ struct ieee80211_supported_band {
- 	struct ieee80211_sta_s1g_cap s1g_cap;
- 	struct ieee80211_edmg edmg_cap;
- 	u16 n_iftype_data;
--	const struct ieee80211_sband_iftype_data *iftype_data;
-+	const struct ieee80211_sband_iftype_data __iftd *iftype_data;
- };
- 
- /**
-+ * _ieee80211_set_sband_iftype_data - set sband iftype data array
-+ * @sband: the sband to initialize
-+ * @iftd: the iftype data array pointer
-+ * @n_iftd: the length of the iftype data array
-+ *
-+ * Set the sband iftype data array; use this where the length cannot
-+ * be derived from the ARRAY_SIZE() of the argument, but prefer
-+ * ieee80211_set_sband_iftype_data() where it can be used.
-+ */
-+static inline void
-+_ieee80211_set_sband_iftype_data(struct ieee80211_supported_band *sband,
-+				 const struct ieee80211_sband_iftype_data *iftd,
-+				 u16 n_iftd)
-+{
-+	sband->iftype_data = (const void __iftd __force *)iftd;
-+	sband->n_iftype_data = n_iftd;
-+}
-+
-+/**
-+ * ieee80211_set_sband_iftype_data - set sband iftype data array
-+ * @sband: the sband to initialize
-+ * @iftd: the iftype data array
-+ */
-+#define ieee80211_set_sband_iftype_data(sband, iftd)	\
-+	_ieee80211_set_sband_iftype_data(sband, iftd, ARRAY_SIZE(iftd))
-+
-+/**
-+ * for_each_sband_iftype_data - iterate sband iftype data entries
-+ * @sband: the sband whose iftype_data array to iterate
-+ * @i: iterator counter
-+ * @iftd: iftype data pointer to set
-+ */
-+#define for_each_sband_iftype_data(sband, i, iftd)				\
-+	for (i = 0, iftd = (const void __force *)&(sband)->iftype_data[i];	\
-+	     i < (sband)->n_iftype_data;					\
-+	     i++, iftd = (const void __force *)&(sband)->iftype_data[i])
-+
-+/**
-  * ieee80211_get_sband_iftype_data - return sband data for a given iftype
-  * @sband: the sband to search for the STA on
-  * @iftype: enum nl80211_iftype
-@@ -562,6 +613,7 @@ static inline const struct ieee80211_sba
- ieee80211_get_sband_iftype_data(const struct ieee80211_supported_band *sband,
- 				u8 iftype)
- {
-+	const struct ieee80211_sband_iftype_data *data;
- 	int i;
- 
- 	if (WARN_ON(iftype >= NL80211_IFTYPE_MAX))
-@@ -570,10 +622,7 @@ ieee80211_get_sband_iftype_data(const st
- 	if (iftype == NL80211_IFTYPE_AP_VLAN)
- 		iftype = NL80211_IFTYPE_AP;
- 
--	for (i = 0; i < sband->n_iftype_data; i++)  {
--		const struct ieee80211_sband_iftype_data *data =
--			&sband->iftype_data[i];
--
-+	for_each_sband_iftype_data(sband, i, data) {
- 		if (data->types_mask & BIT(iftype))
- 			return data;
- 	}
---- a/net/mac80211/main.c
-+++ b/net/mac80211/main.c
-@@ -1052,6 +1052,7 @@ int ieee80211_register_hw(struct ieee802
- 	supp_he = false;
- 	supp_eht = false;
- 	for (band = 0; band < NUM_NL80211_BANDS; band++) {
-+		const struct ieee80211_sband_iftype_data *iftd;
- 		struct ieee80211_supported_band *sband;
- 
- 		sband = local->hw.wiphy->bands[band];
-@@ -1098,11 +1099,7 @@ int ieee80211_register_hw(struct ieee802
- 		supp_ht = supp_ht || sband->ht_cap.ht_supported;
- 		supp_vht = supp_vht || sband->vht_cap.vht_supported;
- 
--		for (i = 0; i < sband->n_iftype_data; i++) {
--			const struct ieee80211_sband_iftype_data *iftd;
--
--			iftd = &sband->iftype_data[i];
--
-+		for_each_sband_iftype_data(sband, i, iftd) {
- 			supp_he = supp_he || iftd->he_cap.has_he;
- 			supp_eht = supp_eht || iftd->eht_cap.has_eht;
- 		}
---- a/net/wireless/chan.c
-+++ b/net/wireless/chan.c
-@@ -6,7 +6,7 @@
-  *
-  * Copyright 2009	Johannes Berg <johannes@sipsolutions.net>
-  * Copyright 2013-2014  Intel Mobile Communications GmbH
-- * Copyright 2018-2022	Intel Corporation
-+ * Copyright 2018-2023	Intel Corporation
-  */
- 
- #include <linux/export.h>
-@@ -1162,8 +1162,7 @@ bool cfg80211_chandef_usable(struct wiph
- 		if (!sband)
- 			return false;
- 
--		for (i = 0; i < sband->n_iftype_data; i++) {
--			iftd = &sband->iftype_data[i];
-+		for_each_sband_iftype_data(sband, i, iftd) {
- 			if (!iftd->eht_cap.has_eht)
- 				continue;
- 
---- a/net/wireless/core.c
-+++ b/net/wireless/core.c
-@@ -5,7 +5,7 @@
-  * Copyright 2006-2010		Johannes Berg <johannes@sipsolutions.net>
-  * Copyright 2013-2014  Intel Mobile Communications GmbH
-  * Copyright 2015-2017	Intel Deutschland GmbH
-- * Copyright (C) 2018-2022 Intel Corporation
-+ * Copyright (C) 2018-2023 Intel Corporation
-  */
- 
- #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-@@ -819,6 +819,7 @@ int wiphy_register(struct wiphy *wiphy)
- 
- 	/* sanity check supported bands/channels */
- 	for (band = 0; band < NUM_NL80211_BANDS; band++) {
-+		const struct ieee80211_sband_iftype_data *iftd;
- 		u16 types = 0;
- 		bool have_he = false;
- 
-@@ -875,14 +876,11 @@ int wiphy_register(struct wiphy *wiphy)
- 				return -EINVAL;
- 		}
- 
--		for (i = 0; i < sband->n_iftype_data; i++) {
--			const struct ieee80211_sband_iftype_data *iftd;
-+		for_each_sband_iftype_data(sband, i, iftd) {
- 			bool has_ap, has_non_ap;
- 			u32 ap_bits = BIT(NL80211_IFTYPE_AP) |
- 				      BIT(NL80211_IFTYPE_P2P_GO);
- 
--			iftd = &sband->iftype_data[i];
--
- 			if (WARN_ON(!iftd->types_mask))
- 				return -EINVAL;
- 			if (WARN_ON(types & iftd->types_mask))
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -1907,20 +1907,20 @@ static int nl80211_send_band_rateinfo(st
- 		struct nlattr *nl_iftype_data =
- 			nla_nest_start_noflag(msg,
- 					      NL80211_BAND_ATTR_IFTYPE_DATA);
-+		const struct ieee80211_sband_iftype_data *iftd;
- 		int err;
- 
- 		if (!nl_iftype_data)
- 			return -ENOBUFS;
- 
--		for (i = 0; i < sband->n_iftype_data; i++) {
-+		for_each_sband_iftype_data(sband, i, iftd) {
- 			struct nlattr *iftdata;
- 
- 			iftdata = nla_nest_start_noflag(msg, i + 1);
- 			if (!iftdata)
- 				return -ENOBUFS;
- 
--			err = nl80211_send_iftype_data(msg, sband,
--						       &sband->iftype_data[i]);
-+			err = nl80211_send_iftype_data(msg, sband, iftd);
- 			if (err)
- 				return err;
- 
diff --git a/package/kernel/mac80211/patches/subsys/313-wifi-cfg80211-export-DFS-CAC-time-and-usable-state-h.patch b/package/kernel/mac80211/patches/subsys/313-wifi-cfg80211-export-DFS-CAC-time-and-usable-state-h.patch
deleted file mode 100644
index a41a906c3c..0000000000
--- a/package/kernel/mac80211/patches/subsys/313-wifi-cfg80211-export-DFS-CAC-time-and-usable-state-h.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 30ca8b0c4d6c9fb1d76e5894b1e8bf7c6a12224d Mon Sep 17 00:00:00 2001
-From: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Date: Tue, 12 Sep 2023 10:48:55 +0530
-Subject: [PATCH] wifi: cfg80211: export DFS CAC time and usable state helper
- functions
-
-cfg80211 has cfg80211_chandef_dfs_usable() function to know whether
-at least one channel in the chandef is in usable state or not. Also,
-cfg80211_chandef_dfs_cac_time() function is there which tells the CAC
-time required for the given chandef.
-
-Make these two functions visible to drivers by exporting their symbol
-to global list of kernel symbols.
-
-Lower level drivers can make use of these two functions to be aware
-if CAC is required on the given chandef and for how long. For example
-drivers which maintains the CAC state internally can make use of these.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
-Reviewed-by: Jeff Johnson <quic_jjohnson@quicinc.com>
-Link: https://lore.kernel.org/r/20230912051857.2284-2-quic_adisi@quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
----
- include/net/cfg80211.h | 24 ++++++++++++++++++++++++
- net/wireless/chan.c    |  2 ++
- net/wireless/core.h    | 17 -----------------
- 3 files changed, 26 insertions(+), 17 deletions(-)
-
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -1008,6 +1008,30 @@ int cfg80211_chandef_dfs_required(struct
- 				  enum nl80211_iftype iftype);
- 
- /**
-+ * cfg80211_chandef_dfs_usable - checks if chandef is DFS usable and we
-+ *				 can/need start CAC on such channel
-+ * @wiphy: the wiphy to validate against
-+ * @chandef: the channel definition to check
-+ *
-+ * Return: true if all channels available and at least
-+ *	   one channel requires CAC (NL80211_DFS_USABLE)
-+ */
-+bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
-+				 const struct cfg80211_chan_def *chandef);
-+
-+/**
-+ * cfg80211_chandef_dfs_cac_time - get the DFS CAC time (in ms) for given
-+ *				   channel definition
-+ * @wiphy: the wiphy to validate against
-+ * @chandef: the channel definition to check
-+ *
-+ * Returns: DFS CAC time (in ms) which applies for this channel definition
-+ */
-+unsigned int
-+cfg80211_chandef_dfs_cac_time(struct wiphy *wiphy,
-+			      const struct cfg80211_chan_def *chandef);
-+
-+/**
-  * nl80211_send_chandef - sends the channel definition.
-  * @msg: the msg to send channel definition
-  * @chandef: the channel definition to check
---- a/net/wireless/chan.c
-+++ b/net/wireless/chan.c
-@@ -666,6 +666,7 @@ bool cfg80211_chandef_dfs_usable(struct
- 
- 	return (r1 + r2 > 0);
- }
-+EXPORT_SYMBOL(cfg80211_chandef_dfs_usable);
- 
- /*
-  * Checks if center frequency of chan falls with in the bandwidth
-@@ -965,6 +966,7 @@ cfg80211_chandef_dfs_cac_time(struct wip
- 
- 	return max(t1, t2);
- }
-+EXPORT_SYMBOL(cfg80211_chandef_dfs_cac_time);
- 
- static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
- 					u32 center_freq, u32 bandwidth,
---- a/net/wireless/core.h
-+++ b/net/wireless/core.h
-@@ -476,29 +476,12 @@ int cfg80211_scan(struct cfg80211_regist
- 
- extern struct work_struct cfg80211_disconnect_work;
- 
--/**
-- * cfg80211_chandef_dfs_usable - checks if chandef is DFS usable
-- * @wiphy: the wiphy to validate against
-- * @chandef: the channel definition to check
-- *
-- * Checks if chandef is usable and we can/need start CAC on such channel.
-- *
-- * Return: true if all channels available and at least
-- *	   one channel requires CAC (NL80211_DFS_USABLE)
-- */
--bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
--				 const struct cfg80211_chan_def *chandef);
--
- void cfg80211_set_dfs_state(struct wiphy *wiphy,
- 			    const struct cfg80211_chan_def *chandef,
- 			    enum nl80211_dfs_state dfs_state);
- 
- void cfg80211_dfs_channels_update_work(struct work_struct *work);
- 
--unsigned int
--cfg80211_chandef_dfs_cac_time(struct wiphy *wiphy,
--			      const struct cfg80211_chan_def *chandef);
--
- void cfg80211_sched_dfs_chan_update(struct cfg80211_registered_device *rdev);
- 
- int
diff --git a/package/kernel/mac80211/patches/subsys/314-wifi-mac80211-fix-race-condition-on-enabling-fast-xm.patch b/package/kernel/mac80211/patches/subsys/314-wifi-mac80211-fix-race-condition-on-enabling-fast-xm.patch
deleted file mode 100644
index e7a7010c7f..0000000000
--- a/package/kernel/mac80211/patches/subsys/314-wifi-mac80211-fix-race-condition-on-enabling-fast-xm.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From: Felix Fietkau <nbd@nbd.name>
-Date: Wed, 3 Jan 2024 15:10:18 +0100
-Subject: [PATCH] wifi: mac80211: fix race condition on enabling fast-xmit
-
-fast-xmit must only be enabled after the sta has been uploaded to the driver,
-otherwise it could end up passing the not-yet-uploaded sta via drv_tx calls
-to the driver, leading to potential crashes because of uninitialized drv_priv
-data.
-Add a missing sta->uploaded check and re-check fast xmit after inserting a sta.
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
-
---- a/net/mac80211/sta_info.c
-+++ b/net/mac80211/sta_info.c
-@@ -918,6 +918,7 @@ static int sta_info_insert_finish(struct
- 
- 	if (ieee80211_vif_is_mesh(&sdata->vif))
- 		mesh_accept_plinks_update(sdata);
-+	ieee80211_check_fast_xmit(sta);
- 
- 	return 0;
-  out_remove:
---- a/net/mac80211/tx.c
-+++ b/net/mac80211/tx.c
-@@ -3034,7 +3034,7 @@ void ieee80211_check_fast_xmit(struct st
- 	    sdata->vif.type == NL80211_IFTYPE_STATION)
- 		goto out;
- 
--	if (!test_sta_flag(sta, WLAN_STA_AUTHORIZED))
-+	if (!test_sta_flag(sta, WLAN_STA_AUTHORIZED) || !sta->uploaded)
- 		goto out;
- 
- 	if (test_sta_flag(sta, WLAN_STA_PS_STA) ||
diff --git a/package/kernel/mac80211/patches/subsys/320-cfg80211-allow-grace-period-for-DFS-available-after-.patch b/package/kernel/mac80211/patches/subsys/320-cfg80211-allow-grace-period-for-DFS-available-after-.patch
index ec381303ce..39f23f7839 100644
--- a/package/kernel/mac80211/patches/subsys/320-cfg80211-allow-grace-period-for-DFS-available-after-.patch
+++ b/package/kernel/mac80211/patches/subsys/320-cfg80211-allow-grace-period-for-DFS-available-after-.patch
@@ -11,23 +11,23 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/include/net/cfg80211.h
 +++ b/include/net/cfg80211.h
-@@ -175,6 +175,8 @@ enum ieee80211_channel_flags {
+@@ -189,6 +189,8 @@ enum ieee80211_channel_flags {
   * @dfs_state: current state of this channel. Only relevant if radar is required
   *	on this channel.
   * @dfs_state_entered: timestamp (jiffies) when the dfs state was entered.
 + * @dfs_state_last_available: timestamp (jiffies) of the last time when the
 + *	channel was available.
   * @dfs_cac_ms: DFS CAC time in milliseconds, this is valid for DFS channels.
+  * @psd: power spectral density (in dBm)
   */
- struct ieee80211_channel {
-@@ -191,6 +193,7 @@ struct ieee80211_channel {
+@@ -206,6 +208,7 @@ struct ieee80211_channel {
  	int orig_mag, orig_mpwr;
  	enum nl80211_dfs_state dfs_state;
  	unsigned long dfs_state_entered;
 +	unsigned long dfs_state_last_available;
  	unsigned int dfs_cac_ms;
+ 	s8 psd;
  };
- 
 --- a/net/wireless/ap.c
 +++ b/net/wireless/ap.c
 @@ -30,6 +30,9 @@ static int ___cfg80211_stop_ap(struct cf
@@ -52,7 +52,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/wireless/chan.c
 +++ b/net/wireless/chan.c
-@@ -461,6 +461,8 @@ static void cfg80211_set_chans_dfs_state
+@@ -560,6 +560,8 @@ static void cfg80211_set_chans_dfs_state
  
  		c->dfs_state = dfs_state;
  		c->dfs_state_entered = jiffies;
@@ -61,7 +61,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	}
  }
  
-@@ -874,6 +876,49 @@ static bool cfg80211_get_chans_dfs_avail
+@@ -1049,6 +1051,49 @@ static bool cfg80211_get_chans_dfs_avail
  	return true;
  }
  
@@ -113,7 +113,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  {
 --- a/net/wireless/core.h
 +++ b/net/wireless/core.h
-@@ -481,6 +481,8 @@ void cfg80211_set_dfs_state(struct wiphy
+@@ -467,6 +467,8 @@ void cfg80211_set_dfs_state(struct wiphy
  			    enum nl80211_dfs_state dfs_state);
  
  void cfg80211_dfs_channels_update_work(struct work_struct *work);
@@ -124,7 +124,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/wireless/mlme.c
 +++ b/net/wireless/mlme.c
-@@ -930,6 +930,8 @@ void cfg80211_dfs_channels_update_work(s
+@@ -1037,6 +1037,8 @@ void cfg80211_dfs_channels_update_work(s
  			if (c->dfs_state == NL80211_DFS_UNAVAILABLE) {
  				time_dfs_update = IEEE80211_DFS_MIN_NOP_TIME_MS;
  				radar_event = NL80211_RADAR_NOP_FINISHED;
@@ -133,7 +133,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  			} else {
  				if (regulatory_pre_cac_allowed(wiphy) ||
  				    cfg80211_any_wiphy_oper_chan(wiphy, c))
-@@ -937,11 +939,10 @@ void cfg80211_dfs_channels_update_work(s
+@@ -1044,11 +1046,10 @@ void cfg80211_dfs_channels_update_work(s
  
  				time_dfs_update = REG_PRE_CAC_EXPIRY_GRACE_MS;
  				radar_event = NL80211_RADAR_PRE_CAC_EXPIRED;
diff --git a/package/kernel/mac80211/patches/subsys/330-mac80211-add-AQL-support-for-broadcast-packets.patch b/package/kernel/mac80211/patches/subsys/330-mac80211-add-AQL-support-for-broadcast-packets.patch
index d53afcf591..d822e45357 100644
--- a/package/kernel/mac80211/patches/subsys/330-mac80211-add-AQL-support-for-broadcast-packets.patch
+++ b/package/kernel/mac80211/patches/subsys/330-mac80211-add-AQL-support-for-broadcast-packets.patch
@@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/include/net/cfg80211.h
 +++ b/include/net/cfg80211.h
-@@ -3324,6 +3324,7 @@ enum wiphy_params_flags {
+@@ -3416,6 +3416,7 @@ enum wiphy_params_flags {
  /* The per TXQ device queue limit in airtime */
  #define IEEE80211_DEFAULT_AQL_TXQ_LIMIT_L	5000
  #define IEEE80211_DEFAULT_AQL_TXQ_LIMIT_H	12000
@@ -70,7 +70,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/mac80211/ieee80211_i.h
 +++ b/net/mac80211/ieee80211_i.h
-@@ -1328,10 +1328,12 @@ struct ieee80211_local {
+@@ -1338,10 +1338,12 @@ struct ieee80211_local {
  	spinlock_t handle_wake_tx_queue_lock;
  
  	u16 airtime_flags;
@@ -85,7 +85,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	const struct ieee80211_ops *ops;
 --- a/net/mac80211/main.c
 +++ b/net/mac80211/main.c
-@@ -788,6 +788,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
+@@ -944,6 +944,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
  	spin_lock_init(&local->rx_path_lock);
  	spin_lock_init(&local->queue_stop_reason_lock);
  
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		spin_lock_init(&local->active_txq_lock[i]);
 --- a/net/mac80211/sta_info.c
 +++ b/net/mac80211/sta_info.c
-@@ -2343,13 +2343,28 @@ EXPORT_SYMBOL(ieee80211_sta_recalc_aggre
+@@ -2357,13 +2357,28 @@ EXPORT_SYMBOL(ieee80211_sta_recalc_aggre
  
  void ieee80211_sta_update_pending_airtime(struct ieee80211_local *local,
  					  struct sta_info *sta, u8 ac,
@@ -127,7 +127,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  			atomic_add(tx_airtime,
 --- a/net/mac80211/tx.c
 +++ b/net/mac80211/tx.c
-@@ -2536,7 +2536,7 @@ static u16 ieee80211_store_ack_skb(struc
+@@ -2554,7 +2554,7 @@ static u16 ieee80211_store_ack_skb(struc
  
  		spin_lock_irqsave(&local->ack_status_lock, flags);
  		id = idr_alloc(&local->ack_status_frames, ack_skb,
@@ -136,9 +136,9 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		spin_unlock_irqrestore(&local->ack_status_lock, flags);
  
  		if (id >= 0) {
-@@ -3958,20 +3958,20 @@ begin:
+@@ -3983,20 +3983,20 @@ begin:
  encap_out:
- 	IEEE80211_SKB_CB(skb)->control.vif = vif;
+ 	info->control.vif = vif;
  
 -	if (tx.sta &&
 -	    wiphy_ext_feature_isset(local->hw.wiphy, NL80211_EXT_FEATURE_AQL)) {
@@ -167,7 +167,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	}
  
  	return skb;
-@@ -4026,6 +4026,7 @@ struct ieee80211_txq *ieee80211_next_txq
+@@ -4048,6 +4048,7 @@ struct ieee80211_txq *ieee80211_next_txq
  	struct ieee80211_txq *ret = NULL;
  	struct txq_info *txqi = NULL, *head = NULL;
  	bool found_eligible_txq = false;
@@ -175,7 +175,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	spin_lock_bh(&local->active_txq_lock[ac]);
  
-@@ -4049,26 +4050,26 @@ struct ieee80211_txq *ieee80211_next_txq
+@@ -4071,26 +4072,26 @@ struct ieee80211_txq *ieee80211_next_txq
  	if (!head)
  		head = txqi;
  
@@ -214,7 +214,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (txqi->schedule_round == local->schedule_round[ac])
  		goto out;
  
-@@ -4133,7 +4134,8 @@ bool ieee80211_txq_airtime_check(struct
+@@ -4155,7 +4156,8 @@ bool ieee80211_txq_airtime_check(struct
  		return true;
  
  	if (!txq->sta)
@@ -224,7 +224,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	if (unlikely(txq->tid == IEEE80211_NUM_TIDS))
  		return true;
-@@ -4182,15 +4184,15 @@ bool ieee80211_txq_may_transmit(struct i
+@@ -4204,15 +4206,15 @@ bool ieee80211_txq_may_transmit(struct i
  
  	spin_lock_bh(&local->active_txq_lock[ac]);
  
@@ -245,25 +245,16 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		if (iter == txqi)
 --- a/include/net/mac80211.h
 +++ b/include/net/mac80211.h
-@@ -1116,6 +1116,7 @@ ieee80211_rate_get_vht_nss(const struct
-  *	link the frame will be transmitted on
-  * @hw_queue: HW queue to put the frame on, skb_get_queue_mapping() gives the AC
-  * @ack_frame_id: internal frame ID for TX status, used internally
-+ * @tx_time_mc: TX time is for a multicast packet
-  * @tx_time_est: TX time estimate in units of 4us, used internally
-  * @control: union part for control data
-  * @control.rates: TX rates array to try
-@@ -1155,8 +1156,9 @@ struct ieee80211_tx_info {
- 	/* common information */
- 	u32 flags;
- 	u32 band:3,
--	    ack_frame_id:13,
-+	    ack_frame_id:12,
+@@ -1180,8 +1180,8 @@ struct ieee80211_tx_info {
+ 	    status_data_idr:1,
+ 	    status_data:13,
  	    hw_queue:4,
 +	    tx_time_mc:1,
  	    tx_time_est:10;
- 	/* 2 free bits */
+-	/* 1 free bit */
  
+ 	union {
+ 		struct {
 --- a/net/mac80211/sta_info.h
 +++ b/net/mac80211/sta_info.h
 @@ -147,7 +147,8 @@ struct airtime_info {
@@ -278,7 +269,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/mac80211/status.c
 +++ b/net/mac80211/status.c
-@@ -716,7 +716,7 @@ static void ieee80211_report_used_skb(st
+@@ -717,7 +717,7 @@ static void ieee80211_report_used_skb(st
  		ieee80211_sta_update_pending_airtime(local, sta,
  						     skb_get_queue_mapping(skb),
  						     tx_time_est,
@@ -287,7 +278,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		rcu_read_unlock();
  	}
  
-@@ -1127,10 +1127,11 @@ void ieee80211_tx_status_ext(struct ieee
+@@ -1138,10 +1138,11 @@ void ieee80211_tx_status_ext(struct ieee
  		/* Do this here to avoid the expensive lookup of the sta
  		 * in ieee80211_report_used_skb().
  		 */
diff --git a/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-extend-IEEE80211_KEY_FLAG_GENERATE_MMI.patch b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-extend-IEEE80211_KEY_FLAG_GENERATE_MMI.patch
index 6504f6ca33..5c202c26c2 100644
--- a/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-extend-IEEE80211_KEY_FLAG_GENERATE_MMI.patch
+++ b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-extend-IEEE80211_KEY_FLAG_GENERATE_MMI.patch
@@ -15,7 +15,7 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
 
 --- a/include/net/mac80211.h
 +++ b/include/net/mac80211.h
-@@ -2032,8 +2032,8 @@ static inline bool lockdep_vif_mutex_hel
+@@ -2123,8 +2123,8 @@ static inline bool lockdep_vif_wiphy_mut
   *	@IEEE80211_KEY_FLAG_GENERATE_MMIC on the same key.
   * @IEEE80211_KEY_FLAG_NO_AUTO_TX: Key needs explicit Tx activation.
   * @IEEE80211_KEY_FLAG_GENERATE_MMIE: This flag should be set by the driver
@@ -23,12 +23,12 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
 - *	generation only
 + *	for a AES_CMAC or a AES_GMAC key to indicate that it requires sequence
 + *	number generation only
+  * @IEEE80211_KEY_FLAG_SPP_AMSDU: SPP A-MSDUs can be used with this key
+  *	(set by mac80211 from the sta->spp_amsdu flag)
   */
- enum ieee80211_key_flags {
- 	IEEE80211_KEY_FLAG_GENERATE_IV_MGMT	= BIT(0),
 --- a/net/mac80211/wpa.c
 +++ b/net/mac80211/wpa.c
-@@ -882,7 +882,8 @@ ieee80211_crypto_aes_cmac_256_encrypt(st
+@@ -895,7 +895,8 @@ ieee80211_crypto_aes_cmac_256_encrypt(st
  
  	info = IEEE80211_SKB_CB(skb);
  
@@ -38,7 +38,7 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
  		return TX_CONTINUE;
  
  	if (WARN_ON(skb_tailroom(skb) < sizeof(*mmie)))
-@@ -898,6 +899,9 @@ ieee80211_crypto_aes_cmac_256_encrypt(st
+@@ -911,6 +912,9 @@ ieee80211_crypto_aes_cmac_256_encrypt(st
  
  	bip_ipn_set64(mmie->sequence_number, pn64);
  
@@ -48,7 +48,7 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
  	bip_aad(skb, aad);
  
  	/* MIC = AES-256-CMAC(IGTK, AAD || Management Frame Body || MMIE, 128)
-@@ -1027,7 +1031,8 @@ ieee80211_crypto_aes_gmac_encrypt(struct
+@@ -1040,7 +1044,8 @@ ieee80211_crypto_aes_gmac_encrypt(struct
  
  	info = IEEE80211_SKB_CB(skb);
  
@@ -58,7 +58,7 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
  		return TX_CONTINUE;
  
  	if (WARN_ON(skb_tailroom(skb) < sizeof(*mmie)))
-@@ -1043,6 +1048,9 @@ ieee80211_crypto_aes_gmac_encrypt(struct
+@@ -1056,6 +1061,9 @@ ieee80211_crypto_aes_gmac_encrypt(struct
  
  	bip_ipn_set64(mmie->sequence_number, pn64);
  
diff --git a/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-only-call-drv_sta_rc_update-for-upload.patch b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-only-call-drv_sta_rc_update-for-upload.patch
deleted file mode 100644
index 167b9e3f77..0000000000
--- a/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-only-call-drv_sta_rc_update-for-upload.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From: Felix Fietkau <nbd@nbd.name>
-Date: Wed, 21 Feb 2024 14:41:40 +0100
-Subject: [PATCH] wifi: mac80211: only call drv_sta_rc_update for uploaded
- stations
-
-When a station has not been uploaded yet, receiving SMPS or channel width
-notification action frames can lead to rate_control_rate_update calling
-drv_sta_rc_update with uninitialized driver private data.
-Fix this by adding a missing check for sta->uploaded.
-
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
-
---- a/net/mac80211/rate.c
-+++ b/net/mac80211/rate.c
-@@ -119,7 +119,8 @@ void rate_control_rate_update(struct iee
- 		rcu_read_unlock();
- 	}
- 
--	drv_sta_rc_update(local, sta->sdata, &sta->sta, changed);
-+	if (sta->uploaded)
-+		drv_sta_rc_update(local, sta->sdata, &sta->sta, changed);
- }
- 
- int ieee80211_rate_control_register(const struct rate_control_ops *ops)
diff --git a/package/kernel/mac80211/patches/subsys/332-wifi-mac80211-check-clear-fast-rx-for-non-4addr-sta-.patch b/package/kernel/mac80211/patches/subsys/332-wifi-mac80211-check-clear-fast-rx-for-non-4addr-sta-.patch
deleted file mode 100644
index 02b4345f21..0000000000
--- a/package/kernel/mac80211/patches/subsys/332-wifi-mac80211-check-clear-fast-rx-for-non-4addr-sta-.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From: Felix Fietkau <nbd@nbd.name>
-Date: Sat, 16 Mar 2024 08:37:21 +0100
-Subject: [PATCH] wifi: mac80211: check/clear fast rx for non-4addr sta VLAN
- changes
-
-When moving a station out of a VLAN and deleting the VLAN afterwards, the
-fast_rx entry still holds a pointer to the VLAN's netdev, which can cause
-use-after-free bugs. Fix this by immediately calling ieee80211_check_fast_rx
-after the VLAN change.
-
-Cc: stable@vger.kernel.org
-Reported-by: ranygh@riseup.net
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -2184,15 +2184,14 @@ static int ieee80211_change_station(stru
- 		}
- 
- 		if (sta->sdata->vif.type == NL80211_IFTYPE_AP_VLAN &&
--		    sta->sdata->u.vlan.sta) {
--			ieee80211_clear_fast_rx(sta);
-+		    sta->sdata->u.vlan.sta)
- 			RCU_INIT_POINTER(sta->sdata->u.vlan.sta, NULL);
--		}
- 
- 		if (test_sta_flag(sta, WLAN_STA_AUTHORIZED))
- 			ieee80211_vif_dec_num_mcast(sta->sdata);
- 
- 		sta->sdata = vlansdata;
-+		ieee80211_check_fast_rx(sta);
- 		ieee80211_check_fast_xmit(sta);
- 
- 		if (test_sta_flag(sta, WLAN_STA_AUTHORIZED)) {
diff --git a/package/kernel/mac80211/patches/subsys/340-wifi-nl80211-split-helper-function-from-nl80211_put_.patch b/package/kernel/mac80211/patches/subsys/340-wifi-nl80211-split-helper-function-from-nl80211_put_.patch
new file mode 100644
index 0000000000..40757e3777
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/340-wifi-nl80211-split-helper-function-from-nl80211_put_.patch
@@ -0,0 +1,145 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Tue, 4 Jun 2024 14:31:09 +0200
+Subject: [PATCH] wifi: nl80211: split helper function from
+ nl80211_put_iface_combinations
+
+Create a helper function that puts the data from struct
+ieee80211_iface_combination to a nl80211 message.
+This will be used for adding per-radio interface combination data.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/wireless/nl80211.c
++++ b/net/wireless/nl80211.c
+@@ -1620,71 +1620,78 @@ nla_put_failure:
+ 	return -ENOBUFS;
+ }
+ 
+-static int nl80211_put_iface_combinations(struct wiphy *wiphy,
+-					  struct sk_buff *msg,
+-					  bool large)
++static int nl80211_put_ifcomb_data(struct sk_buff *msg, bool large, int idx,
++				   const struct ieee80211_iface_combination *c)
+ {
+-	struct nlattr *nl_combis;
+-	int i, j;
++	struct nlattr *nl_combi, *nl_limits;
++	int i;
+ 
+-	nl_combis = nla_nest_start_noflag(msg,
+-					  NL80211_ATTR_INTERFACE_COMBINATIONS);
+-	if (!nl_combis)
++	nl_combi = nla_nest_start_noflag(msg, idx);
++	if (!nl_combi)
+ 		goto nla_put_failure;
+ 
+-	for (i = 0; i < wiphy->n_iface_combinations; i++) {
+-		const struct ieee80211_iface_combination *c;
+-		struct nlattr *nl_combi, *nl_limits;
++	nl_limits = nla_nest_start_noflag(msg, NL80211_IFACE_COMB_LIMITS);
++	if (!nl_limits)
++		goto nla_put_failure;
+ 
+-		c = &wiphy->iface_combinations[i];
++	for (i = 0; i < c->n_limits; i++) {
++		struct nlattr *nl_limit;
+ 
+-		nl_combi = nla_nest_start_noflag(msg, i + 1);
+-		if (!nl_combi)
++		nl_limit = nla_nest_start_noflag(msg, i + 1);
++		if (!nl_limit)
+ 			goto nla_put_failure;
+-
+-		nl_limits = nla_nest_start_noflag(msg,
+-						  NL80211_IFACE_COMB_LIMITS);
+-		if (!nl_limits)
++		if (nla_put_u32(msg, NL80211_IFACE_LIMIT_MAX, c->limits[i].max))
+ 			goto nla_put_failure;
++		if (nl80211_put_iftypes(msg, NL80211_IFACE_LIMIT_TYPES,
++					c->limits[i].types))
++			goto nla_put_failure;
++		nla_nest_end(msg, nl_limit);
++	}
+ 
+-		for (j = 0; j < c->n_limits; j++) {
+-			struct nlattr *nl_limit;
++	nla_nest_end(msg, nl_limits);
+ 
+-			nl_limit = nla_nest_start_noflag(msg, j + 1);
+-			if (!nl_limit)
+-				goto nla_put_failure;
+-			if (nla_put_u32(msg, NL80211_IFACE_LIMIT_MAX,
+-					c->limits[j].max))
+-				goto nla_put_failure;
+-			if (nl80211_put_iftypes(msg, NL80211_IFACE_LIMIT_TYPES,
+-						c->limits[j].types))
+-				goto nla_put_failure;
+-			nla_nest_end(msg, nl_limit);
+-		}
++	if (c->beacon_int_infra_match &&
++	    nla_put_flag(msg, NL80211_IFACE_COMB_STA_AP_BI_MATCH))
++		goto nla_put_failure;
++	if (nla_put_u32(msg, NL80211_IFACE_COMB_NUM_CHANNELS,
++			c->num_different_channels) ||
++	    nla_put_u32(msg, NL80211_IFACE_COMB_MAXNUM,
++			c->max_interfaces))
++		goto nla_put_failure;
++	if (large &&
++	    (nla_put_u32(msg, NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS,
++			c->radar_detect_widths) ||
++	     nla_put_u32(msg, NL80211_IFACE_COMB_RADAR_DETECT_REGIONS,
++			c->radar_detect_regions)))
++		goto nla_put_failure;
++	if (c->beacon_int_min_gcd &&
++	    nla_put_u32(msg, NL80211_IFACE_COMB_BI_MIN_GCD,
++			c->beacon_int_min_gcd))
++		goto nla_put_failure;
+ 
+-		nla_nest_end(msg, nl_limits);
++	nla_nest_end(msg, nl_combi);
+ 
+-		if (c->beacon_int_infra_match &&
+-		    nla_put_flag(msg, NL80211_IFACE_COMB_STA_AP_BI_MATCH))
+-			goto nla_put_failure;
+-		if (nla_put_u32(msg, NL80211_IFACE_COMB_NUM_CHANNELS,
+-				c->num_different_channels) ||
+-		    nla_put_u32(msg, NL80211_IFACE_COMB_MAXNUM,
+-				c->max_interfaces))
+-			goto nla_put_failure;
+-		if (large &&
+-		    (nla_put_u32(msg, NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS,
+-				c->radar_detect_widths) ||
+-		     nla_put_u32(msg, NL80211_IFACE_COMB_RADAR_DETECT_REGIONS,
+-				c->radar_detect_regions)))
+-			goto nla_put_failure;
+-		if (c->beacon_int_min_gcd &&
+-		    nla_put_u32(msg, NL80211_IFACE_COMB_BI_MIN_GCD,
+-				c->beacon_int_min_gcd))
+-			goto nla_put_failure;
++	return 0;
++nla_put_failure:
++	return -ENOBUFS;
++}
+ 
+-		nla_nest_end(msg, nl_combi);
+-	}
++static int nl80211_put_iface_combinations(struct wiphy *wiphy,
++					  struct sk_buff *msg,
++					  bool large)
++{
++	struct nlattr *nl_combis;
++	int i;
++
++	nl_combis = nla_nest_start_noflag(msg,
++					  NL80211_ATTR_INTERFACE_COMBINATIONS);
++	if (!nl_combis)
++		goto nla_put_failure;
++
++	for (i = 0; i < wiphy->n_iface_combinations; i++)
++		if (nl80211_put_ifcomb_data(msg, large, i + 1,
++					    &wiphy->iface_combinations[i]))
++			goto nla_put_failure;
+ 
+ 	nla_nest_end(msg, nl_combis);
+ 
diff --git a/package/kernel/mac80211/patches/subsys/341-wifi-cfg80211-add-support-for-advertising-multiple-r.patch b/package/kernel/mac80211/patches/subsys/341-wifi-cfg80211-add-support-for-advertising-multiple-r.patch
new file mode 100644
index 0000000000..45349891b6
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/341-wifi-cfg80211-add-support-for-advertising-multiple-r.patch
@@ -0,0 +1,348 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Wed, 22 May 2024 11:42:57 +0200
+Subject: [PATCH] wifi: cfg80211: add support for advertising multiple
+ radios belonging to a wiphy
+
+The prerequisite for MLO support in cfg80211/mac80211 is that all the links
+participating in MLO must be from the same wiphy/ieee80211_hw. To meet this
+expectation, some drivers may need to group multiple discrete hardware each
+acting as a link in MLO under single wiphy.
+
+With this change, supported frequencies and interface combinations of each
+individual radio are reported to user space. This allows user space to figure
+out the limitations of what combination of channels can be used concurrently.
+
+Even for non-MLO devices, this improves support for devices capable of
+running on multiple channels at the same time.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/include/net/cfg80211.h
++++ b/include/net/cfg80211.h
+@@ -5045,7 +5045,9 @@ struct ieee80211_iface_limit {
+  * struct ieee80211_iface_combination - possible interface combination
+  *
+  * With this structure the driver can describe which interface
+- * combinations it supports concurrently.
++ * combinations it supports concurrently. When set in a struct wiphy_radio,
++ * the combinations refer to combinations of interfaces currently active on
++ * that radio.
+  *
+  * Examples:
+  *
+@@ -5403,6 +5405,38 @@ struct wiphy_iftype_akm_suites {
+ 	int n_akm_suites;
+ };
+ 
++/**
++ * struct wiphy_radio_freq_range - wiphy frequency range
++ * @start_freq:  start range edge frequency (kHz)
++ * @end_freq:    end range edge frequency (kHz)
++ */
++struct wiphy_radio_freq_range {
++	u32 start_freq;
++	u32 end_freq;
++};
++
++
++/**
++ * struct wiphy_radio - physical radio of a wiphy
++ * This structure describes a physical radio belonging to a wiphy.
++ * It is used to describe concurrent-channel capabilities. Only one channel
++ * can be active on the radio described by struct wiphy_radio.
++ *
++ * @freq_range: frequency range that the radio can operate on.
++ * @n_freq_range: number of elements in @freq_range
++ *
++ * @iface_combinations: Valid interface combinations array, should not
++ *	list single interface types.
++ * @n_iface_combinations: number of entries in @iface_combinations array.
++ */
++struct wiphy_radio {
++	const struct wiphy_radio_freq_range *freq_range;
++	int n_freq_range;
++
++	const struct ieee80211_iface_combination *iface_combinations;
++	int n_iface_combinations;
++};
++
+ #define CFG80211_HW_TIMESTAMP_ALL_PEERS	0xffff
+ 
+ /**
+@@ -5621,6 +5655,9 @@ struct wiphy_iftype_akm_suites {
+  *	A value of %CFG80211_HW_TIMESTAMP_ALL_PEERS indicates the driver
+  *	supports enabling HW timestamping for all peers (i.e. no need to
+  *	specify a mac address).
++ *
++ * @radio: radios belonging to this wiphy
++ * @n_radio: number of radios
+  */
+ struct wiphy {
+ 	struct mutex mtx;
+@@ -5771,6 +5808,9 @@ struct wiphy {
+ 
+ 	u16 hw_timestamp_max_peers;
+ 
++	int n_radio;
++	const struct wiphy_radio *radio;
++
+ 	char priv[] __aligned(NETDEV_ALIGN);
+ };
+ 
+--- a/include/uapi/linux/nl80211.h
++++ b/include/uapi/linux/nl80211.h
+@@ -2061,6 +2061,10 @@ enum nl80211_commands {
+  * @NL80211_ATTR_INTERFACE_COMBINATIONS: Nested attribute listing the supported
+  *	interface combinations. In each nested item, it contains attributes
+  *	defined in &enum nl80211_if_combination_attrs.
++ *	If the wiphy uses multiple radios (@NL80211_ATTR_WIPHY_RADIOS is set),
++ *	this attribute contains the interface combinations of the first radio.
++ *	See @NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS for the global wiphy
++ *	combinations for the sum of all radios.
+  * @NL80211_ATTR_SOFTWARE_IFTYPES: Nested attribute (just like
+  *	%NL80211_ATTR_SUPPORTED_IFTYPES) containing the interface types that
+  *	are managed in software: interfaces of these types aren't subject to
+@@ -2856,6 +2860,14 @@ enum nl80211_commands {
+  *	%NL80211_CMD_ASSOCIATE indicating the SPP A-MSDUs
+  *	are used on this connection
+  *
++ * @NL80211_ATTR_WIPHY_RADIOS: Nested attribute describing physical radios
++ *	belonging to this wiphy. See &enum nl80211_wiphy_radio_attrs.
++ *
++ * @NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS: Nested attribute listing the
++ *	supported interface combinations for all radios combined. In each
++ *	nested item, it contains attributes defined in
++ *	&enum nl80211_if_combination_attrs.
++ *
+  * @NUM_NL80211_ATTR: total number of nl80211_attrs available
+  * @NL80211_ATTR_MAX: highest attribute number currently defined
+  * @__NL80211_ATTR_AFTER_LAST: internal use
+@@ -3401,6 +3413,9 @@ enum nl80211_attrs {
+ 
+ 	NL80211_ATTR_ASSOC_SPP_AMSDU,
+ 
++	NL80211_ATTR_WIPHY_RADIOS,
++	NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS,
++
+ 	/* add attributes here, update the policy in nl80211.c */
+ 
+ 	__NL80211_ATTR_AFTER_LAST,
+@@ -7987,4 +8002,54 @@ enum nl80211_ap_settings_flags {
+ 	NL80211_AP_SETTINGS_SA_QUERY_OFFLOAD_SUPPORT	= 1 << 1,
+ };
+ 
++/**
++ * enum nl80211_wiphy_radio_attrs - wiphy radio attributes
++ *
++ * @__NL80211_WIPHY_RADIO_ATTR_INVALID: Invalid
++ *
++ * @NL80211_WIPHY_RADIO_ATTR_INDEX: Index of this radio (u32)
++ * @NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE: Frequency range supported by this
++ *	radio. Attribute may be present multiple times.
++ * @NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION: Supported interface
++ *	combination for this radio. Attribute may be present multiple times
++ *	and contains attributes defined in &enum nl80211_if_combination_attrs.
++ *
++ * @__NL80211_WIPHY_RADIO_ATTR_LAST: Internal
++ * @NL80211_WIPHY_RADIO_ATTR_MAX: Highest attribute
++ */
++enum nl80211_wiphy_radio_attrs {
++	__NL80211_WIPHY_RADIO_ATTR_INVALID,
++
++	NL80211_WIPHY_RADIO_ATTR_INDEX,
++	NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE,
++	NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION,
++
++	/* keep last */
++	__NL80211_WIPHY_RADIO_ATTR_LAST,
++	NL80211_WIPHY_RADIO_ATTR_MAX = __NL80211_WIPHY_RADIO_ATTR_LAST - 1,
++};
++
++/**
++ * enum nl80211_wiphy_radio_freq_range - wiphy radio frequency range
++ *
++ * @__NL80211_WIPHY_RADIO_FREQ_ATTR_INVALID: Invalid
++ *
++ * @NL80211_WIPHY_RADIO_FREQ_ATTR_START: Frequency range start (u32).
++ *	The unit is kHz.
++ * @NL80211_WIPHY_RADIO_FREQ_ATTR_END: Frequency range end (u32).
++ *	The unit is kHz.
++ *
++ * @__NL80211_WIPHY_RADIO_FREQ_ATTR_LAST: Internal
++ * @NL80211_WIPHY_RADIO_FREQ_ATTR_MAX: Highest attribute
++ */
++enum nl80211_wiphy_radio_freq_range {
++	__NL80211_WIPHY_RADIO_FREQ_ATTR_INVALID,
++
++	NL80211_WIPHY_RADIO_FREQ_ATTR_START,
++	NL80211_WIPHY_RADIO_FREQ_ATTR_END,
++
++	__NL80211_WIPHY_RADIO_FREQ_ATTR_LAST,
++	NL80211_WIPHY_RADIO_FREQ_ATTR_MAX = __NL80211_WIPHY_RADIO_FREQ_ATTR_LAST - 1,
++};
++
+ #endif /* __LINUX_NL80211_H */
+--- a/net/wireless/nl80211.c
++++ b/net/wireless/nl80211.c
+@@ -1621,16 +1621,18 @@ nla_put_failure:
+ }
+ 
+ static int nl80211_put_ifcomb_data(struct sk_buff *msg, bool large, int idx,
+-				   const struct ieee80211_iface_combination *c)
++				   const struct ieee80211_iface_combination *c,
++				   u16 nested)
+ {
+ 	struct nlattr *nl_combi, *nl_limits;
+ 	int i;
+ 
+-	nl_combi = nla_nest_start_noflag(msg, idx);
++	nl_combi = nla_nest_start_noflag(msg, idx | nested);
+ 	if (!nl_combi)
+ 		goto nla_put_failure;
+ 
+-	nl_limits = nla_nest_start_noflag(msg, NL80211_IFACE_COMB_LIMITS);
++	nl_limits = nla_nest_start_noflag(msg, NL80211_IFACE_COMB_LIMITS |
++					       nested);
+ 	if (!nl_limits)
+ 		goto nla_put_failure;
+ 
+@@ -1678,19 +1680,26 @@ nla_put_failure:
+ 
+ static int nl80211_put_iface_combinations(struct wiphy *wiphy,
+ 					  struct sk_buff *msg,
+-					  bool large)
++					  int attr, int radio,
++					  bool large, u16 nested)
+ {
++	const struct ieee80211_iface_combination *c;
+ 	struct nlattr *nl_combis;
+-	int i;
++	int i, n;
+ 
+-	nl_combis = nla_nest_start_noflag(msg,
+-					  NL80211_ATTR_INTERFACE_COMBINATIONS);
++	nl_combis = nla_nest_start_noflag(msg, attr | nested);
+ 	if (!nl_combis)
+ 		goto nla_put_failure;
+ 
+-	for (i = 0; i < wiphy->n_iface_combinations; i++)
+-		if (nl80211_put_ifcomb_data(msg, large, i + 1,
+-					    &wiphy->iface_combinations[i]))
++	if (radio >= 0) {
++		c = wiphy->radio[0].iface_combinations;
++		n = wiphy->radio[0].n_iface_combinations;
++	} else {
++		c = wiphy->iface_combinations;
++		n = wiphy->n_iface_combinations;
++	}
++	for (i = 0; i < n; i++)
++		if (nl80211_put_ifcomb_data(msg, large, i + 1, &c[i], nested))
+ 			goto nla_put_failure;
+ 
+ 	nla_nest_end(msg, nl_combis);
+@@ -2397,6 +2406,80 @@ fail:
+ 	return -ENOBUFS;
+ }
+ 
++static int nl80211_put_radio(struct wiphy *wiphy, struct sk_buff *msg, int idx)
++{
++	const struct wiphy_radio *r = &wiphy->radio[idx];
++	struct nlattr *radio, *freq;
++	int i;
++
++	radio = nla_nest_start(msg, idx);
++	if (!radio)
++		return -ENOBUFS;
++
++	if (nla_put_u32(msg, NL80211_WIPHY_RADIO_ATTR_INDEX, idx))
++		goto nla_put_failure;
++
++	for (i = 0; i < r->n_freq_range; i++) {
++		const struct wiphy_radio_freq_range *range = &r->freq_range[i];
++
++		freq = nla_nest_start(msg, NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE);
++		if (!freq)
++			goto nla_put_failure;
++
++		if (nla_put_u32(msg, NL80211_WIPHY_RADIO_FREQ_ATTR_START,
++				range->start_freq) ||
++		    nla_put_u32(msg, NL80211_WIPHY_RADIO_FREQ_ATTR_END,
++				range->end_freq))
++			goto nla_put_failure;
++
++		nla_nest_end(msg, freq);
++	}
++
++	for (i = 0; i < r->n_iface_combinations; i++)
++		if (nl80211_put_ifcomb_data(msg, true,
++					    NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION,
++					    &r->iface_combinations[i],
++					    NLA_F_NESTED))
++			goto nla_put_failure;
++
++	nla_nest_end(msg, radio);
++
++	return 0;
++
++nla_put_failure:
++	return -ENOBUFS;
++}
++
++static int nl80211_put_radios(struct wiphy *wiphy, struct sk_buff *msg)
++{
++	struct nlattr *radios;
++	int i;
++
++	if (!wiphy->n_radio)
++		return 0;
++
++	radios = nla_nest_start(msg, NL80211_ATTR_WIPHY_RADIOS);
++	if (!radios)
++		return -ENOBUFS;
++
++	for (i = 0; i < wiphy->n_radio; i++)
++		if (nl80211_put_radio(wiphy, msg, i))
++			goto fail;
++
++	nla_nest_end(msg, radios);
++
++	if (nl80211_put_iface_combinations(wiphy, msg,
++					   NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS,
++					   -1, true, NLA_F_NESTED))
++		return -ENOBUFS;
++
++	return 0;
++
++fail:
++	nla_nest_cancel(msg, radios);
++	return -ENOBUFS;
++}
++
+ struct nl80211_dump_wiphy_state {
+ 	s64 filter_wiphy;
+ 	long start;
+@@ -2692,7 +2775,9 @@ static int nl80211_send_wiphy(struct cfg
+ 			goto nla_put_failure;
+ 
+ 		if (nl80211_put_iface_combinations(&rdev->wiphy, msg,
+-						   state->split))
++						   NL80211_ATTR_INTERFACE_COMBINATIONS,
++						   rdev->wiphy.n_radio ? 0 : -1,
++						   state->split, 0))
+ 			goto nla_put_failure;
+ 
+ 		state->split_start++;
+@@ -3006,6 +3091,12 @@ static int nl80211_send_wiphy(struct cfg
+ 				rdev->wiphy.hw_timestamp_max_peers))
+ 			goto nla_put_failure;
+ 
++		state->split_start++;
++		break;
++	case 17:
++		if (nl80211_put_radios(&rdev->wiphy, msg))
++			goto nla_put_failure;
++
+ 		/* done */
+ 		state->split_start = 0;
+ 		break;
diff --git a/package/kernel/mac80211/patches/subsys/342-wifi-cfg80211-extend-interface-combination-check-for.patch b/package/kernel/mac80211/patches/subsys/342-wifi-cfg80211-extend-interface-combination-check-for.patch
new file mode 100644
index 0000000000..0ba97a2c0f
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/342-wifi-cfg80211-extend-interface-combination-check-for.patch
@@ -0,0 +1,172 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Tue, 4 Jun 2024 21:01:50 +0200
+Subject: [PATCH] wifi: cfg80211: extend interface combination check for
+ multi-radio
+
+Add a field in struct iface_combination_params to check per-radio
+interface combinations instead of per-wiphy ones.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/include/net/cfg80211.h
++++ b/include/net/cfg80211.h
+@@ -1598,6 +1598,7 @@ struct cfg80211_color_change_settings {
+  *
+  * Used to pass interface combination parameters
+  *
++ * @radio_idx: wiphy radio index or -1 for global
+  * @num_different_channels: the number of different channels we want
+  *	to use for verification
+  * @radar_detect: a bitmap where each bit corresponds to a channel
+@@ -1611,6 +1612,7 @@ struct cfg80211_color_change_settings {
+  *	the verification
+  */
+ struct iface_combination_params {
++	int radio_idx;
+ 	int num_different_channels;
+ 	u8 radar_detect;
+ 	int iftype_num[NUM_NL80211_IFTYPES];
+@@ -4579,6 +4581,8 @@ struct mgmt_frame_regs {
+  *
+  * @set_hw_timestamp: Enable/disable HW timestamping of TM/FTM frames.
+  * @set_ttlm: set the TID to link mapping.
++ * @get_radio_mask: get bitmask of radios in use.
++ *	(invoked with the wiphy mutex held)
+  */
+ struct cfg80211_ops {
+ 	int	(*suspend)(struct wiphy *wiphy, struct cfg80211_wowlan *wow);
+@@ -4940,6 +4944,7 @@ struct cfg80211_ops {
+ 				    struct cfg80211_set_hw_timestamp *hwts);
+ 	int	(*set_ttlm)(struct wiphy *wiphy, struct net_device *dev,
+ 			    struct cfg80211_ttlm_params *params);
++	u32	(*get_radio_mask)(struct wiphy *wiphy, struct net_device *dev);
+ };
+ 
+ /*
+--- a/net/mac80211/util.c
++++ b/net/mac80211/util.c
+@@ -3930,6 +3930,7 @@ int ieee80211_check_combinations(struct
+ 	int total = 1;
+ 	struct iface_combination_params params = {
+ 		.radar_detect = radar_detect,
++		.radio_idx = -1,
+ 	};
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+@@ -4020,7 +4021,9 @@ int ieee80211_max_num_channels(struct ie
+ 	struct ieee80211_chanctx *ctx;
+ 	u32 max_num_different_channels = 1;
+ 	int err;
+-	struct iface_combination_params params = {0};
++	struct iface_combination_params params = {
++		.radio_idx = -1,
++	};
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+--- a/net/wireless/rdev-ops.h
++++ b/net/wireless/rdev-ops.h
+@@ -1542,4 +1542,16 @@ rdev_set_ttlm(struct cfg80211_registered
+ 
+ 	return ret;
+ }
++
++static inline u32
++rdev_get_radio_mask(struct cfg80211_registered_device *rdev,
++		    struct net_device *dev)
++{
++	struct wiphy *wiphy = &rdev->wiphy;
++
++	if (!rdev->ops->get_radio_mask)
++		return 0;
++
++	return rdev->ops->get_radio_mask(wiphy, dev);
++}
+ #endif /* __CFG80211_RDEV_OPS */
+--- a/net/wireless/util.c
++++ b/net/wireless/util.c
+@@ -2305,13 +2305,16 @@ static int cfg80211_wdev_bi(struct wirel
+ 
+ static void cfg80211_calculate_bi_data(struct wiphy *wiphy, u32 new_beacon_int,
+ 				       u32 *beacon_int_gcd,
+-				       bool *beacon_int_different)
++				       bool *beacon_int_different,
++				       int radio_idx)
+ {
++	struct cfg80211_registered_device *rdev;
+ 	struct wireless_dev *wdev;
+ 
+ 	*beacon_int_gcd = 0;
+ 	*beacon_int_different = false;
+ 
++	rdev = wiphy_to_rdev(wiphy);
+ 	list_for_each_entry(wdev, &wiphy->wdev_list, list) {
+ 		int wdev_bi;
+ 
+@@ -2319,6 +2322,11 @@ static void cfg80211_calculate_bi_data(s
+ 		if (wdev->valid_links)
+ 			continue;
+ 
++		/* skip wdevs not active on the given wiphy radio */
++		if (radio_idx >= 0 &&
++		    !(rdev_get_radio_mask(rdev, wdev->netdev) & BIT(radio_idx)))
++			continue;
++
+ 		wdev_bi = cfg80211_wdev_bi(wdev);
+ 
+ 		if (!wdev_bi)
+@@ -2366,14 +2374,19 @@ int cfg80211_iter_combinations(struct wi
+ 					    void *data),
+ 			       void *data)
+ {
++	const struct wiphy_radio *radio = NULL;
++	const struct ieee80211_iface_combination *c, *cs;
+ 	const struct ieee80211_regdomain *regdom;
+ 	enum nl80211_dfs_regions region = 0;
+-	int i, j, iftype;
++	int i, j, n, iftype;
+ 	int num_interfaces = 0;
+ 	u32 used_iftypes = 0;
+ 	u32 beacon_int_gcd;
+ 	bool beacon_int_different;
+ 
++	if (params->radio_idx >= 0)
++		radio = &wiphy->radio[params->radio_idx];
++
+ 	/*
+ 	 * This is a bit strange, since the iteration used to rely only on
+ 	 * the data given by the driver, but here it now relies on context,
+@@ -2385,7 +2398,8 @@ int cfg80211_iter_combinations(struct wi
+ 	 * interfaces (while being brought up) and channel/radar data.
+ 	 */
+ 	cfg80211_calculate_bi_data(wiphy, params->new_beacon_int,
+-				   &beacon_int_gcd, &beacon_int_different);
++				   &beacon_int_gcd, &beacon_int_different,
++				   params->radio_idx);
+ 
+ 	if (params->radar_detect) {
+ 		rcu_read_lock();
+@@ -2402,13 +2416,18 @@ int cfg80211_iter_combinations(struct wi
+ 			used_iftypes |= BIT(iftype);
+ 	}
+ 
+-	for (i = 0; i < wiphy->n_iface_combinations; i++) {
+-		const struct ieee80211_iface_combination *c;
++	if (radio) {
++		cs = radio->iface_combinations;
++		n = radio->n_iface_combinations;
++	} else {
++		cs = wiphy->iface_combinations;
++		n = wiphy->n_iface_combinations;
++	}
++	for (i = 0; i < n; i++) {
+ 		struct ieee80211_iface_limit *limits;
+ 		u32 all_iftypes = 0;
+ 
+-		c = &wiphy->iface_combinations[i];
+-
++		c = &cs[i];
+ 		if (num_interfaces > c->max_interfaces)
+ 			continue;
+ 		if (params->num_different_channels > c->num_different_channels)
diff --git a/package/kernel/mac80211/patches/subsys/343-wifi-cfg80211-add-helper-for-checking-if-a-chandef-i.patch b/package/kernel/mac80211/patches/subsys/343-wifi-cfg80211-add-helper-for-checking-if-a-chandef-i.patch
new file mode 100644
index 0000000000..d115dd2e54
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/343-wifi-cfg80211-add-helper-for-checking-if-a-chandef-i.patch
@@ -0,0 +1,69 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Fri, 7 Jun 2024 17:58:54 +0200
+Subject: [PATCH] wifi: cfg80211: add helper for checking if a chandef is
+ valid on a radio
+
+Check if the full channel width is in the radio's frequency range.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/include/net/cfg80211.h
++++ b/include/net/cfg80211.h
+@@ -6485,6 +6485,15 @@ static inline bool cfg80211_channel_is_p
+ }
+ 
+ /**
++ * cfg80211_radio_chandef_valid - Check if the radio supports the chandef
++ *
++ * @radio: wiphy radio
++ * @chandef: chandef for current channel
++ */
++bool cfg80211_radio_chandef_valid(const struct wiphy_radio *radio,
++				  const struct cfg80211_chan_def *chandef);
++
++/**
+  * ieee80211_get_response_rate - get basic rate for a given rate
+  *
+  * @sband: the band to look for rates in
+--- a/net/wireless/util.c
++++ b/net/wireless/util.c
+@@ -2884,3 +2884,38 @@ cfg80211_get_iftype_ext_capa(struct wiph
+ 	return NULL;
+ }
+ EXPORT_SYMBOL(cfg80211_get_iftype_ext_capa);
++
++static bool
++ieee80211_radio_freq_range_valid(const struct wiphy_radio *radio,
++				 u32 freq, u32 width)
++{
++	const struct wiphy_radio_freq_range *r;
++	int i;
++
++	for (i = 0; i < radio->n_freq_range; i++) {
++		r = &radio->freq_range[i];
++		if (freq - width / 2 >= r->start_freq &&
++		    freq + width / 2 <= r->end_freq)
++			return true;
++	}
++
++	return false;
++}
++
++bool cfg80211_radio_chandef_valid(const struct wiphy_radio *radio,
++				  const struct cfg80211_chan_def *chandef)
++{
++	u32 freq, width;
++
++	freq = ieee80211_chandef_to_khz(chandef);
++	width = nl80211_chan_width_to_mhz(chandef->width);
++	if (!ieee80211_radio_freq_range_valid(radio, freq, width))
++		return false;
++
++	freq = MHZ_TO_KHZ(chandef->center_freq2);
++	if (freq && !ieee80211_radio_freq_range_valid(radio, freq, width))
++		return false;
++
++	return true;
++}
++EXPORT_SYMBOL(cfg80211_radio_chandef_valid);
diff --git a/package/kernel/mac80211/patches/subsys/344-wifi-mac80211-add-support-for-DFS-with-multiple-radi.patch b/package/kernel/mac80211/patches/subsys/344-wifi-mac80211-add-support-for-DFS-with-multiple-radi.patch
new file mode 100644
index 0000000000..18634fe146
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/344-wifi-mac80211-add-support-for-DFS-with-multiple-radi.patch
@@ -0,0 +1,88 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Thu, 6 Jun 2024 12:19:08 +0200
+Subject: [PATCH] wifi: mac80211: add support for DFS with multiple
+ radios
+
+DFS can be supported with multi-channel combinations, as long as each DFS
+capable radio only supports one channel.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/main.c
++++ b/net/mac80211/main.c
+@@ -1084,6 +1084,27 @@ static int ieee80211_init_cipher_suites(
+ 	return 0;
+ }
+ 
++static bool
++ieee80211_ifcomb_check(const struct ieee80211_iface_combination *c, int n_comb)
++{
++	int i, j;
++
++	for (i = 0; i < n_comb; i++, c++) {
++		/* DFS is not supported with multi-channel combinations yet */
++		if (c->radar_detect_widths &&
++		    c->num_different_channels > 1)
++			return false;
++
++		/* mac80211 doesn't support more than one IBSS interface */
++		for (j = 0; j < c->n_limits; j++)
++			if ((c->limits[j].types & BIT(NL80211_IFTYPE_ADHOC)) &&
++			    c->limits[j].max > 1)
++				return false;
++	}
++
++	return true;
++}
++
+ int ieee80211_register_hw(struct ieee80211_hw *hw)
+ {
+ 	struct ieee80211_local *local = hw_to_local(hw);
+@@ -1173,17 +1194,20 @@ int ieee80211_register_hw(struct ieee802
+ 			if (comb->num_different_channels > 1)
+ 				return -EINVAL;
+ 		}
+-	} else {
+-		/* DFS is not supported with multi-channel combinations yet */
+-		for (i = 0; i < local->hw.wiphy->n_iface_combinations; i++) {
+-			const struct ieee80211_iface_combination *comb;
++	}
+ 
+-			comb = &local->hw.wiphy->iface_combinations[i];
++	if (hw->wiphy->n_radio) {
++		for (i = 0; i < hw->wiphy->n_radio; i++) {
++			const struct wiphy_radio *radio = &hw->wiphy->radio[i];
+ 
+-			if (comb->radar_detect_widths &&
+-			    comb->num_different_channels > 1)
++			if (!ieee80211_ifcomb_check(radio->iface_combinations,
++						    radio->n_iface_combinations))
+ 				return -EINVAL;
+ 		}
++	} else {
++		if (!ieee80211_ifcomb_check(hw->wiphy->iface_combinations,
++					    hw->wiphy->n_iface_combinations))
++			return -EINVAL;
+ 	}
+ 
+ 	/* Only HW csum features are currently compatible with mac80211 */
+@@ -1313,18 +1337,6 @@ int ieee80211_register_hw(struct ieee802
+ 	hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_MONITOR);
+ 	hw->wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR);
+ 
+-	/* mac80211 doesn't support more than one IBSS interface right now */
+-	for (i = 0; i < hw->wiphy->n_iface_combinations; i++) {
+-		const struct ieee80211_iface_combination *c;
+-		int j;
+-
+-		c = &hw->wiphy->iface_combinations[i];
+-
+-		for (j = 0; j < c->n_limits; j++)
+-			if ((c->limits[j].types & BIT(NL80211_IFTYPE_ADHOC)) &&
+-			    c->limits[j].max > 1)
+-				return -EINVAL;
+-	}
+ 
+ 	local->int_scan_req = kzalloc(sizeof(*local->int_scan_req) +
+ 				      sizeof(void *) * channels, GFP_KERNEL);
diff --git a/package/kernel/mac80211/patches/subsys/345-wifi-mac80211-add-radio-index-to-ieee80211_chanctx_c.patch b/package/kernel/mac80211/patches/subsys/345-wifi-mac80211-add-radio-index-to-ieee80211_chanctx_c.patch
new file mode 100644
index 0000000000..b832a2a124
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/345-wifi-mac80211-add-radio-index-to-ieee80211_chanctx_c.patch
@@ -0,0 +1,66 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Wed, 5 Jun 2024 10:41:34 +0200
+Subject: [PATCH] wifi: mac80211: add radio index to
+ ieee80211_chanctx_conf
+
+Will be used to explicitly assign a channel context to a wiphy radio.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/include/net/mac80211.h
++++ b/include/net/mac80211.h
+@@ -250,6 +250,7 @@ struct ieee80211_chan_req {
+  * @min_def: the minimum channel definition currently required.
+  * @ap: the channel definition the AP actually is operating as,
+  *	for use with (wider bandwidth) OFDMA
++ * @radio_idx: index of the wiphy radio used used for this channel
+  * @rx_chains_static: The number of RX chains that must always be
+  *	active on the channel to receive MIMO transmissions
+  * @rx_chains_dynamic: The number of RX chains that must be enabled
+@@ -264,6 +265,7 @@ struct ieee80211_chanctx_conf {
+ 	struct cfg80211_chan_def min_def;
+ 	struct cfg80211_chan_def ap;
+ 
++	int radio_idx;
+ 	u8 rx_chains_static, rx_chains_dynamic;
+ 
+ 	bool radar_enabled;
+--- a/net/mac80211/chan.c
++++ b/net/mac80211/chan.c
+@@ -623,7 +623,8 @@ ieee80211_chanctx_radar_required(struct
+ static struct ieee80211_chanctx *
+ ieee80211_alloc_chanctx(struct ieee80211_local *local,
+ 			const struct ieee80211_chan_req *chanreq,
+-			enum ieee80211_chanctx_mode mode)
++			enum ieee80211_chanctx_mode mode,
++			int radio_idx)
+ {
+ 	struct ieee80211_chanctx *ctx;
+ 
+@@ -641,6 +642,7 @@ ieee80211_alloc_chanctx(struct ieee80211
+ 	ctx->conf.rx_chains_dynamic = 1;
+ 	ctx->mode = mode;
+ 	ctx->conf.radar_enabled = false;
++	ctx->conf.radio_idx = radio_idx;
+ 	_ieee80211_recalc_chanctx_min_def(local, ctx, NULL);
+ 
+ 	return ctx;
+@@ -680,7 +682,7 @@ ieee80211_new_chanctx(struct ieee80211_l
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+-	ctx = ieee80211_alloc_chanctx(local, chanreq, mode);
++	ctx = ieee80211_alloc_chanctx(local, chanreq, mode, -1);
+ 	if (!ctx)
+ 		return ERR_PTR(-ENOMEM);
+ 
+@@ -1098,7 +1100,7 @@ int ieee80211_link_reserve_chanctx(struc
+ 			    !list_empty(&curr_ctx->reserved_links))
+ 				return -EBUSY;
+ 
+-			new_ctx = ieee80211_alloc_chanctx(local, chanreq, mode);
++			new_ctx = ieee80211_alloc_chanctx(local, chanreq, mode, -1);
+ 			if (!new_ctx)
+ 				return -ENOMEM;
+ 
diff --git a/package/kernel/mac80211/patches/subsys/346-wifi-mac80211-extend-ifcomb-check-functions-for-mult.patch b/package/kernel/mac80211/patches/subsys/346-wifi-mac80211-extend-ifcomb-check-functions-for-mult.patch
new file mode 100644
index 0000000000..168cf6fad0
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/346-wifi-mac80211-extend-ifcomb-check-functions-for-mult.patch
@@ -0,0 +1,322 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Tue, 4 Jun 2024 21:48:48 +0200
+Subject: [PATCH] wifi: mac80211: extend ifcomb check functions for
+ multi-radio
+
+Add support for counting global and per-radio max/current number of
+channels, as well as checking radio-specific interface combinations.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/cfg.c
++++ b/net/mac80211/cfg.c
+@@ -263,7 +263,7 @@ static int ieee80211_start_p2p_device(st
+ 
+ 	lockdep_assert_wiphy(sdata->local->hw.wiphy);
+ 
+-	ret = ieee80211_check_combinations(sdata, NULL, 0, 0);
++	ret = ieee80211_check_combinations(sdata, NULL, 0, 0, -1);
+ 	if (ret < 0)
+ 		return ret;
+ 
+@@ -285,7 +285,7 @@ static int ieee80211_start_nan(struct wi
+ 
+ 	lockdep_assert_wiphy(sdata->local->hw.wiphy);
+ 
+-	ret = ieee80211_check_combinations(sdata, NULL, 0, 0);
++	ret = ieee80211_check_combinations(sdata, NULL, 0, 0, -1);
+ 	if (ret < 0)
+ 		return ret;
+ 
+@@ -3992,7 +3992,7 @@ __ieee80211_channel_switch(struct wiphy
+ 		goto out;
+ 
+ 	/* if reservation is invalid then this will fail */
+-	err = ieee80211_check_combinations(sdata, NULL, chanctx->mode, 0);
++	err = ieee80211_check_combinations(sdata, NULL, chanctx->mode, 0, -1);
+ 	if (err) {
+ 		ieee80211_link_unreserve_chanctx(link_data);
+ 		goto out;
+@@ -5161,4 +5161,5 @@ const struct cfg80211_ops mac80211_confi
+ 	.del_link_station = ieee80211_del_link_station,
+ 	.set_hw_timestamp = ieee80211_set_hw_timestamp,
+ 	.set_ttlm = ieee80211_set_ttlm,
++	.get_radio_mask = ieee80211_get_radio_mask,
+ };
+--- a/net/mac80211/chan.c
++++ b/net/mac80211/chan.c
+@@ -47,24 +47,29 @@ int ieee80211_chanctx_refcount(struct ie
+ 	       ieee80211_chanctx_num_reserved(local, ctx);
+ }
+ 
+-static int ieee80211_num_chanctx(struct ieee80211_local *local)
++static int ieee80211_num_chanctx(struct ieee80211_local *local, int radio_idx)
+ {
+ 	struct ieee80211_chanctx *ctx;
+ 	int num = 0;
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+-	list_for_each_entry(ctx, &local->chanctx_list, list)
++	list_for_each_entry(ctx, &local->chanctx_list, list) {
++		if (radio_idx >= 0 && ctx->conf.radio_idx != radio_idx)
++			continue;
+ 		num++;
++	}
+ 
+ 	return num;
+ }
+ 
+-static bool ieee80211_can_create_new_chanctx(struct ieee80211_local *local)
++static bool ieee80211_can_create_new_chanctx(struct ieee80211_local *local,
++					     int radio_idx)
+ {
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+-	return ieee80211_num_chanctx(local) < ieee80211_max_num_channels(local);
++	return ieee80211_num_chanctx(local, radio_idx) <
++	       ieee80211_max_num_channels(local, radio_idx);
+ }
+ 
+ static struct ieee80211_chanctx *
+@@ -1045,7 +1050,7 @@ int ieee80211_link_reserve_chanctx(struc
+ 
+ 	new_ctx = ieee80211_find_reservation_chanctx(local, chanreq, mode);
+ 	if (!new_ctx) {
+-		if (ieee80211_can_create_new_chanctx(local)) {
++		if (ieee80211_can_create_new_chanctx(local, -1)) {
+ 			new_ctx = ieee80211_new_chanctx(local, chanreq, mode);
+ 			if (IS_ERR(new_ctx))
+ 				return PTR_ERR(new_ctx);
+@@ -1736,7 +1741,7 @@ int ieee80211_link_use_channel(struct ie
+ 	link->radar_required = ret;
+ 
+ 	ret = ieee80211_check_combinations(sdata, &chanreq->oper, mode,
+-					   radar_detect_width);
++					   radar_detect_width, -1);
+ 	if (ret < 0)
+ 		goto out;
+ 
+--- a/net/mac80211/ibss.c
++++ b/net/mac80211/ibss.c
+@@ -1745,7 +1745,7 @@ int ieee80211_ibss_join(struct ieee80211
+ 		IEEE80211_CHANCTX_SHARED : IEEE80211_CHANCTX_EXCLUSIVE;
+ 
+ 	ret = ieee80211_check_combinations(sdata, &params->chandef, chanmode,
+-					   radar_detect_width);
++					   radar_detect_width, -1);
+ 	if (ret < 0)
+ 		return ret;
+ 
+--- a/net/mac80211/ieee80211_i.h
++++ b/net/mac80211/ieee80211_i.h
+@@ -2596,8 +2596,9 @@ void ieee80211_recalc_dtim(struct ieee80
+ int ieee80211_check_combinations(struct ieee80211_sub_if_data *sdata,
+ 				 const struct cfg80211_chan_def *chandef,
+ 				 enum ieee80211_chanctx_mode chanmode,
+-				 u8 radar_detect);
+-int ieee80211_max_num_channels(struct ieee80211_local *local);
++				 u8 radar_detect, int radio_idx);
++int ieee80211_max_num_channels(struct ieee80211_local *local, int radio_idx);
++u32 ieee80211_get_radio_mask(struct wiphy *wiphy, struct net_device *dev);
+ void ieee80211_recalc_chanctx_chantype(struct ieee80211_local *local,
+ 				       struct ieee80211_chanctx *ctx);
+ 
+--- a/net/mac80211/iface.c
++++ b/net/mac80211/iface.c
+@@ -397,7 +397,7 @@ static int ieee80211_check_concurrent_if
+ 		}
+ 	}
+ 
+-	return ieee80211_check_combinations(sdata, NULL, 0, 0);
++	return ieee80211_check_combinations(sdata, NULL, 0, 0, -1);
+ }
+ 
+ static int ieee80211_check_queues(struct ieee80211_sub_if_data *sdata,
+--- a/net/mac80211/util.c
++++ b/net/mac80211/util.c
+@@ -3918,20 +3918,103 @@ static u8 ieee80211_chanctx_radar_detect
+ 	return radar_detect;
+ }
+ 
++static u32
++__ieee80211_get_radio_mask(struct ieee80211_sub_if_data *sdata)
++{
++	struct ieee80211_bss_conf *link_conf;
++	struct ieee80211_chanctx_conf *conf;
++	unsigned int link_id;
++	u32 mask = 0;
++
++	for_each_vif_active_link(&sdata->vif, link_conf, link_id) {
++		conf = sdata_dereference(link_conf->chanctx_conf, sdata);
++		if (!conf || conf->radio_idx < 0)
++			continue;
++
++		mask |= BIT(conf->radio_idx);
++	}
++
++	return mask;
++}
++
++u32 ieee80211_get_radio_mask(struct wiphy *wiphy, struct net_device *dev)
++{
++	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
++
++	return __ieee80211_get_radio_mask(sdata);
++}
++
++static bool
++ieee80211_sdata_uses_radio(struct ieee80211_sub_if_data *sdata, int radio_idx)
++{
++	if (radio_idx < 0)
++		return true;
++
++	return __ieee80211_get_radio_mask(sdata) & BIT(radio_idx);
++}
++
++static int
++ieee80211_fill_ifcomb_params(struct ieee80211_local *local,
++			     struct iface_combination_params *params,
++			     const struct cfg80211_chan_def *chandef,
++			     struct ieee80211_sub_if_data *sdata)
++{
++	struct ieee80211_sub_if_data *sdata_iter;
++	struct ieee80211_chanctx *ctx;
++	int total = !!sdata;
++
++	list_for_each_entry(ctx, &local->chanctx_list, list) {
++		if (ctx->replace_state == IEEE80211_CHANCTX_WILL_BE_REPLACED)
++			continue;
++
++		if (params->radio_idx >= 0 &&
++		    ctx->conf.radio_idx != params->radio_idx)
++			continue;
++
++		params->radar_detect |=
++			ieee80211_chanctx_radar_detect(local, ctx);
++
++		if (chandef && ctx->mode != IEEE80211_CHANCTX_EXCLUSIVE &&
++		    cfg80211_chandef_compatible(chandef, &ctx->conf.def))
++			continue;
++
++		params->num_different_channels++;
++	}
++
++	list_for_each_entry(sdata_iter, &local->interfaces, list) {
++		struct wireless_dev *wdev_iter;
++
++		wdev_iter = &sdata_iter->wdev;
++
++		if (sdata_iter == sdata ||
++		    !ieee80211_sdata_running(sdata_iter) ||
++		    cfg80211_iftype_allowed(local->hw.wiphy,
++					    wdev_iter->iftype, 0, 1))
++			continue;
++
++		if (!ieee80211_sdata_uses_radio(sdata_iter, params->radio_idx))
++			continue;
++
++		params->iftype_num[wdev_iter->iftype]++;
++		total++;
++	}
++
++	return total;
++}
++
+ int ieee80211_check_combinations(struct ieee80211_sub_if_data *sdata,
+ 				 const struct cfg80211_chan_def *chandef,
+ 				 enum ieee80211_chanctx_mode chanmode,
+-				 u8 radar_detect)
++				 u8 radar_detect, int radio_idx)
+ {
++	bool shared = chanmode == IEEE80211_CHANCTX_SHARED;
+ 	struct ieee80211_local *local = sdata->local;
+-	struct ieee80211_sub_if_data *sdata_iter;
+ 	enum nl80211_iftype iftype = sdata->wdev.iftype;
+-	struct ieee80211_chanctx *ctx;
+-	int total = 1;
+ 	struct iface_combination_params params = {
+ 		.radar_detect = radar_detect,
+-		.radio_idx = -1,
++		.radio_idx = radio_idx,
+ 	};
++	int total;
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+@@ -3968,37 +4051,9 @@ int ieee80211_check_combinations(struct
+ 	if (iftype != NL80211_IFTYPE_UNSPECIFIED)
+ 		params.iftype_num[iftype] = 1;
+ 
+-	list_for_each_entry(ctx, &local->chanctx_list, list) {
+-		if (ctx->replace_state == IEEE80211_CHANCTX_WILL_BE_REPLACED)
+-			continue;
+-		params.radar_detect |=
+-			ieee80211_chanctx_radar_detect(local, ctx);
+-		if (ctx->mode == IEEE80211_CHANCTX_EXCLUSIVE) {
+-			params.num_different_channels++;
+-			continue;
+-		}
+-		if (chandef && chanmode == IEEE80211_CHANCTX_SHARED &&
+-		    cfg80211_chandef_compatible(chandef,
+-						&ctx->conf.def))
+-			continue;
+-		params.num_different_channels++;
+-	}
+-
+-	list_for_each_entry_rcu(sdata_iter, &local->interfaces, list) {
+-		struct wireless_dev *wdev_iter;
+-
+-		wdev_iter = &sdata_iter->wdev;
+-
+-		if (sdata_iter == sdata ||
+-		    !ieee80211_sdata_running(sdata_iter) ||
+-		    cfg80211_iftype_allowed(local->hw.wiphy,
+-					    wdev_iter->iftype, 0, 1))
+-			continue;
+-
+-		params.iftype_num[wdev_iter->iftype]++;
+-		total++;
+-	}
+-
++	total = ieee80211_fill_ifcomb_params(local, &params,
++					     shared ? chandef : NULL,
++					     sdata);
+ 	if (total == 1 && !params.radar_detect)
+ 		return 0;
+ 
+@@ -4015,30 +4070,17 @@ ieee80211_iter_max_chans(const struct ie
+ 					  c->num_different_channels);
+ }
+ 
+-int ieee80211_max_num_channels(struct ieee80211_local *local)
++int ieee80211_max_num_channels(struct ieee80211_local *local, int radio_idx)
+ {
+-	struct ieee80211_sub_if_data *sdata;
+-	struct ieee80211_chanctx *ctx;
+ 	u32 max_num_different_channels = 1;
+ 	int err;
+ 	struct iface_combination_params params = {
+-		.radio_idx = -1,
++		.radio_idx = radio_idx,
+ 	};
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+-	list_for_each_entry(ctx, &local->chanctx_list, list) {
+-		if (ctx->replace_state == IEEE80211_CHANCTX_WILL_BE_REPLACED)
+-			continue;
+-
+-		params.num_different_channels++;
+-
+-		params.radar_detect |=
+-			ieee80211_chanctx_radar_detect(local, ctx);
+-	}
+-
+-	list_for_each_entry_rcu(sdata, &local->interfaces, list)
+-		params.iftype_num[sdata->wdev.iftype]++;
++	ieee80211_fill_ifcomb_params(local, &params, NULL, NULL);
+ 
+ 	err = cfg80211_iter_combinations(local->hw.wiphy, &params,
+ 					 ieee80211_iter_max_chans,
diff --git a/package/kernel/mac80211/patches/subsys/347-wifi-mac80211-move-code-in-ieee80211_link_reserve_ch.patch b/package/kernel/mac80211/patches/subsys/347-wifi-mac80211-move-code-in-ieee80211_link_reserve_ch.patch
new file mode 100644
index 0000000000..9a85067602
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/347-wifi-mac80211-move-code-in-ieee80211_link_reserve_ch.patch
@@ -0,0 +1,175 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Wed, 5 Jun 2024 10:49:22 +0200
+Subject: [PATCH] wifi: mac80211: move code in
+ ieee80211_link_reserve_chanctx to a helper
+
+Reduces indentation in preparation for further changes
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/chan.c
++++ b/net/mac80211/chan.c
+@@ -1033,6 +1033,71 @@ int ieee80211_link_unreserve_chanctx(str
+ 	return 0;
+ }
+ 
++static struct ieee80211_chanctx *
++ieee80211_replace_chanctx(struct ieee80211_local *local,
++			  const struct ieee80211_chan_req *chanreq,
++			  enum ieee80211_chanctx_mode mode,
++			  struct ieee80211_chanctx *curr_ctx)
++{
++	struct ieee80211_chanctx *new_ctx, *ctx;
++
++	if (!curr_ctx || (curr_ctx->replace_state ==
++			  IEEE80211_CHANCTX_WILL_BE_REPLACED) ||
++	    !list_empty(&curr_ctx->reserved_links)) {
++		/*
++		 * Another link already requested this context for a
++		 * reservation. Find another one hoping all links assigned
++		 * to it will also switch soon enough.
++		 *
++		 * TODO: This needs a little more work as some cases
++		 * (more than 2 chanctx capable devices) may fail which could
++		 * otherwise succeed provided some channel context juggling was
++		 * performed.
++		 *
++		 * Consider ctx1..3, link1..6, each ctx has 2 links. link1 and
++		 * link2 from ctx1 request new different chandefs starting 2
++		 * in-place reserations with ctx4 and ctx5 replacing ctx1 and
++		 * ctx2 respectively. Next link5 and link6 from ctx3 reserve
++		 * ctx4. If link3 and link4 remain on ctx2 as they are then this
++		 * fails unless `replace_ctx` from ctx5 is replaced with ctx3.
++		 */
++		list_for_each_entry(ctx, &local->chanctx_list, list) {
++			if (ctx->replace_state !=
++			    IEEE80211_CHANCTX_REPLACE_NONE)
++				continue;
++
++			if (!list_empty(&ctx->reserved_links))
++				continue;
++
++			curr_ctx = ctx;
++			break;
++		}
++	}
++
++	/*
++	 * If that's true then all available contexts already have reservations
++	 * and cannot be used.
++	 */
++	if (!curr_ctx || (curr_ctx->replace_state ==
++			  IEEE80211_CHANCTX_WILL_BE_REPLACED) ||
++	    !list_empty(&curr_ctx->reserved_links))
++		return ERR_PTR(-EBUSY);
++
++	new_ctx = ieee80211_alloc_chanctx(local, chanreq, mode, -1);
++	if (!new_ctx)
++		return ERR_PTR(-ENOMEM);
++
++	new_ctx->replace_ctx = curr_ctx;
++	new_ctx->replace_state = IEEE80211_CHANCTX_REPLACES_OTHER;
++
++	curr_ctx->replace_ctx = new_ctx;
++	curr_ctx->replace_state = IEEE80211_CHANCTX_WILL_BE_REPLACED;
++
++	list_add_rcu(&new_ctx->list, &local->chanctx_list);
++
++	return new_ctx;
++}
++
+ int ieee80211_link_reserve_chanctx(struct ieee80211_link_data *link,
+ 				   const struct ieee80211_chan_req *chanreq,
+ 				   enum ieee80211_chanctx_mode mode,
+@@ -1040,7 +1105,7 @@ int ieee80211_link_reserve_chanctx(struc
+ {
+ 	struct ieee80211_sub_if_data *sdata = link->sdata;
+ 	struct ieee80211_local *local = sdata->local;
+-	struct ieee80211_chanctx *new_ctx, *curr_ctx, *ctx;
++	struct ieee80211_chanctx *new_ctx, *curr_ctx;
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+@@ -1050,75 +1115,13 @@ int ieee80211_link_reserve_chanctx(struc
+ 
+ 	new_ctx = ieee80211_find_reservation_chanctx(local, chanreq, mode);
+ 	if (!new_ctx) {
+-		if (ieee80211_can_create_new_chanctx(local, -1)) {
++		if (ieee80211_can_create_new_chanctx(local, -1))
+ 			new_ctx = ieee80211_new_chanctx(local, chanreq, mode);
+-			if (IS_ERR(new_ctx))
+-				return PTR_ERR(new_ctx);
+-		} else {
+-			if (!curr_ctx ||
+-			    (curr_ctx->replace_state ==
+-			     IEEE80211_CHANCTX_WILL_BE_REPLACED) ||
+-			    !list_empty(&curr_ctx->reserved_links)) {
+-				/*
+-				 * Another link already requested this context
+-				 * for a reservation. Find another one hoping
+-				 * all links assigned to it will also switch
+-				 * soon enough.
+-				 *
+-				 * TODO: This needs a little more work as some
+-				 * cases (more than 2 chanctx capable devices)
+-				 * may fail which could otherwise succeed
+-				 * provided some channel context juggling was
+-				 * performed.
+-				 *
+-				 * Consider ctx1..3, link1..6, each ctx has 2
+-				 * links. link1 and link2 from ctx1 request new
+-				 * different chandefs starting 2 in-place
+-				 * reserations with ctx4 and ctx5 replacing
+-				 * ctx1 and ctx2 respectively. Next link5 and
+-				 * link6 from ctx3 reserve ctx4. If link3 and
+-				 * link4 remain on ctx2 as they are then this
+-				 * fails unless `replace_ctx` from ctx5 is
+-				 * replaced with ctx3.
+-				 */
+-				list_for_each_entry(ctx, &local->chanctx_list,
+-						    list) {
+-					if (ctx->replace_state !=
+-					    IEEE80211_CHANCTX_REPLACE_NONE)
+-						continue;
+-
+-					if (!list_empty(&ctx->reserved_links))
+-						continue;
+-
+-					curr_ctx = ctx;
+-					break;
+-				}
+-			}
+-
+-			/*
+-			 * If that's true then all available contexts already
+-			 * have reservations and cannot be used.
+-			 */
+-			if (!curr_ctx ||
+-			    (curr_ctx->replace_state ==
+-			     IEEE80211_CHANCTX_WILL_BE_REPLACED) ||
+-			    !list_empty(&curr_ctx->reserved_links))
+-				return -EBUSY;
+-
+-			new_ctx = ieee80211_alloc_chanctx(local, chanreq, mode, -1);
+-			if (!new_ctx)
+-				return -ENOMEM;
+-
+-			new_ctx->replace_ctx = curr_ctx;
+-			new_ctx->replace_state =
+-					IEEE80211_CHANCTX_REPLACES_OTHER;
+-
+-			curr_ctx->replace_ctx = new_ctx;
+-			curr_ctx->replace_state =
+-					IEEE80211_CHANCTX_WILL_BE_REPLACED;
+-
+-			list_add_rcu(&new_ctx->list, &local->chanctx_list);
+-		}
++		else
++			new_ctx = ieee80211_replace_chanctx(local, chanreq,
++							    mode, curr_ctx);
++		if (IS_ERR(new_ctx))
++			return PTR_ERR(new_ctx);
+ 	}
+ 
+ 	list_add(&link->reserved_chanctx_list, &new_ctx->reserved_links);
diff --git a/package/kernel/mac80211/patches/subsys/348-wifi-mac80211-add-wiphy-radio-assignment-and-validat.patch b/package/kernel/mac80211/patches/subsys/348-wifi-mac80211-add-wiphy-radio-assignment-and-validat.patch
new file mode 100644
index 0000000000..c559f070e8
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/348-wifi-mac80211-add-wiphy-radio-assignment-and-validat.patch
@@ -0,0 +1,132 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Wed, 5 Jun 2024 18:39:55 +0200
+Subject: [PATCH] wifi: mac80211: add wiphy radio assignment and
+ validation
+
+Validate number of channels and interface combinations per radio.
+Assign each channel context to a radio.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/chan.c
++++ b/net/mac80211/chan.c
+@@ -680,14 +680,15 @@ static int ieee80211_add_chanctx(struct
+ static struct ieee80211_chanctx *
+ ieee80211_new_chanctx(struct ieee80211_local *local,
+ 		      const struct ieee80211_chan_req *chanreq,
+-		      enum ieee80211_chanctx_mode mode)
++		      enum ieee80211_chanctx_mode mode,
++		      int radio_idx)
+ {
+ 	struct ieee80211_chanctx *ctx;
+ 	int err;
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+-	ctx = ieee80211_alloc_chanctx(local, chanreq, mode, -1);
++	ctx = ieee80211_alloc_chanctx(local, chanreq, mode, radio_idx);
+ 	if (!ctx)
+ 		return ERR_PTR(-ENOMEM);
+ 
+@@ -1040,6 +1041,8 @@ ieee80211_replace_chanctx(struct ieee802
+ 			  struct ieee80211_chanctx *curr_ctx)
+ {
+ 	struct ieee80211_chanctx *new_ctx, *ctx;
++	struct wiphy *wiphy = local->hw.wiphy;
++	const struct wiphy_radio *radio;
+ 
+ 	if (!curr_ctx || (curr_ctx->replace_state ==
+ 			  IEEE80211_CHANCTX_WILL_BE_REPLACED) ||
+@@ -1069,6 +1072,12 @@ ieee80211_replace_chanctx(struct ieee802
+ 			if (!list_empty(&ctx->reserved_links))
+ 				continue;
+ 
++			if (ctx->conf.radio_idx >= 0) {
++				radio = &wiphy->radio[ctx->conf.radio_idx];
++				if (!cfg80211_radio_chandef_valid(radio, &chanreq->oper))
++					continue;
++			}
++
+ 			curr_ctx = ctx;
+ 			break;
+ 		}
+@@ -1098,6 +1107,34 @@ ieee80211_replace_chanctx(struct ieee802
+ 	return new_ctx;
+ }
+ 
++static bool
++ieee80211_find_available_radio(struct ieee80211_local *local,
++			       const struct ieee80211_chan_req *chanreq,
++			       int *radio_idx)
++{
++	struct wiphy *wiphy = local->hw.wiphy;
++	const struct wiphy_radio *radio;
++	int i;
++
++	*radio_idx = -1;
++	if (!wiphy->n_radio)
++		return true;
++
++	for (i = 0; i < wiphy->n_radio; i++) {
++		radio = &wiphy->radio[i];
++		if (!cfg80211_radio_chandef_valid(radio, &chanreq->oper))
++			continue;
++
++		if (!ieee80211_can_create_new_chanctx(local, i))
++			continue;
++
++		*radio_idx = i;
++		return true;
++	}
++
++	return false;
++}
++
+ int ieee80211_link_reserve_chanctx(struct ieee80211_link_data *link,
+ 				   const struct ieee80211_chan_req *chanreq,
+ 				   enum ieee80211_chanctx_mode mode,
+@@ -1106,6 +1143,7 @@ int ieee80211_link_reserve_chanctx(struc
+ 	struct ieee80211_sub_if_data *sdata = link->sdata;
+ 	struct ieee80211_local *local = sdata->local;
+ 	struct ieee80211_chanctx *new_ctx, *curr_ctx;
++	int radio_idx;
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+ 
+@@ -1115,8 +1153,10 @@ int ieee80211_link_reserve_chanctx(struc
+ 
+ 	new_ctx = ieee80211_find_reservation_chanctx(local, chanreq, mode);
+ 	if (!new_ctx) {
+-		if (ieee80211_can_create_new_chanctx(local, -1))
+-			new_ctx = ieee80211_new_chanctx(local, chanreq, mode);
++		if (ieee80211_can_create_new_chanctx(local, -1) &&
++		    ieee80211_find_available_radio(local, chanreq, &radio_idx))
++			new_ctx = ieee80211_new_chanctx(local, chanreq, mode,
++							radio_idx);
+ 		else
+ 			new_ctx = ieee80211_replace_chanctx(local, chanreq,
+ 							    mode, curr_ctx);
+@@ -1724,6 +1764,7 @@ int ieee80211_link_use_channel(struct ie
+ 	struct ieee80211_local *local = sdata->local;
+ 	struct ieee80211_chanctx *ctx;
+ 	u8 radar_detect_width = 0;
++	int radio_idx;
+ 	int ret;
+ 
+ 	lockdep_assert_wiphy(local->hw.wiphy);
+@@ -1751,8 +1792,12 @@ int ieee80211_link_use_channel(struct ie
+ 	__ieee80211_link_release_channel(link);
+ 
+ 	ctx = ieee80211_find_chanctx(local, chanreq, mode);
+-	if (!ctx)
+-		ctx = ieee80211_new_chanctx(local, chanreq, mode);
++	if (!ctx) {
++		if (!ieee80211_find_available_radio(local, chanreq, &radio_idx))
++			ctx = ERR_PTR(-EBUSY);
++		else
++			ctx = ieee80211_new_chanctx(local, chanreq, mode, radio_idx);
++	}
+ 	if (IS_ERR(ctx)) {
+ 		ret = PTR_ERR(ctx);
+ 		goto out;
diff --git a/package/kernel/mac80211/patches/subsys/349-wifi-mac80211_hwsim-add-support-for-multi-radio-wiph.patch b/package/kernel/mac80211/patches/subsys/349-wifi-mac80211_hwsim-add-support-for-multi-radio-wiph.patch
new file mode 100644
index 0000000000..91fe6d83d9
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/349-wifi-mac80211_hwsim-add-support-for-multi-radio-wiph.patch
@@ -0,0 +1,199 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Tue, 11 Jun 2024 09:02:55 +0200
+Subject: [PATCH] wifi: mac80211_hwsim: add support for multi-radio wiphy
+
+This registers one wiphy radio per supported band. Number of different
+channels is set per radio.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/drivers/net/wireless/virtual/mac80211_hwsim.c
++++ b/drivers/net/wireless/virtual/mac80211_hwsim.c
+@@ -69,6 +69,10 @@ static bool mlo;
+ module_param(mlo, bool, 0444);
+ MODULE_PARM_DESC(mlo, "Support MLO");
+ 
++static bool multi_radio;
++module_param(multi_radio, bool, 0444);
++MODULE_PARM_DESC(mlo, "Support Multiple Radios per wiphy");
++
+ /**
+  * enum hwsim_regtest - the type of regulatory tests we offer
+  *
+@@ -669,6 +673,10 @@ struct mac80211_hwsim_data {
+ 	struct ieee80211_iface_limit if_limits[3];
+ 	int n_if_limits;
+ 
++	struct ieee80211_iface_combination if_combination_radio;
++	struct wiphy_radio_freq_range radio_range[NUM_NL80211_BANDS];
++	struct wiphy_radio radio[NUM_NL80211_BANDS];
++
+ 	u32 ciphers[ARRAY_SIZE(hwsim_ciphers)];
+ 
+ 	struct mac_address addresses[2];
+@@ -917,6 +925,7 @@ static const struct nla_policy hwsim_gen
+ 	[HWSIM_ATTR_MLO_SUPPORT] = { .type = NLA_FLAG },
+ 	[HWSIM_ATTR_PMSR_SUPPORT] = NLA_POLICY_NESTED(hwsim_pmsr_capa_policy),
+ 	[HWSIM_ATTR_PMSR_RESULT] = NLA_POLICY_NESTED(hwsim_pmsr_peers_result_policy),
++	[HWSIM_ATTR_MULTI_RADIO] = { .type = NLA_FLAG },
+ };
+ 
+ #if IS_REACHABLE(CONFIG_VIRTIO)
+@@ -4007,6 +4016,7 @@ struct hwsim_new_radio_params {
+ 	bool reg_strict;
+ 	bool p2p_device;
+ 	bool use_chanctx;
++	bool multi_radio;
+ 	bool destroy_on_close;
+ 	const char *hwname;
+ 	bool no_vif;
+@@ -4083,6 +4093,12 @@ static int append_radio_msg(struct sk_bu
+ 			return ret;
+ 	}
+ 
++	if (param->multi_radio) {
++		ret = nla_put_flag(skb, HWSIM_ATTR_MULTI_RADIO);
++		if (ret < 0)
++			return ret;
++	}
++
+ 	if (param->hwname) {
+ 		ret = nla_put(skb, HWSIM_ATTR_RADIO_NAME,
+ 			      strlen(param->hwname), param->hwname);
+@@ -5099,6 +5115,7 @@ static int mac80211_hwsim_new_radio(stru
+ 	struct net *net;
+ 	int idx, i;
+ 	int n_limits = 0;
++	int n_bands = 0;
+ 
+ 	if (WARN_ON(param->channels > 1 && !param->use_chanctx))
+ 		return -EINVAL;
+@@ -5202,22 +5219,22 @@ static int mac80211_hwsim_new_radio(stru
+ 		n_limits++;
+ 	}
+ 
++	data->if_combination.radar_detect_widths =
++				BIT(NL80211_CHAN_WIDTH_5) |
++				BIT(NL80211_CHAN_WIDTH_10) |
++				BIT(NL80211_CHAN_WIDTH_20_NOHT) |
++				BIT(NL80211_CHAN_WIDTH_20) |
++				BIT(NL80211_CHAN_WIDTH_40) |
++				BIT(NL80211_CHAN_WIDTH_80) |
++				BIT(NL80211_CHAN_WIDTH_160);
++
+ 	if (data->use_chanctx) {
+ 		hw->wiphy->max_scan_ssids = 255;
+ 		hw->wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
+ 		hw->wiphy->max_remain_on_channel_duration = 1000;
+-		data->if_combination.radar_detect_widths = 0;
+ 		data->if_combination.num_different_channels = data->channels;
+ 	} else {
+ 		data->if_combination.num_different_channels = 1;
+-		data->if_combination.radar_detect_widths =
+-					BIT(NL80211_CHAN_WIDTH_5) |
+-					BIT(NL80211_CHAN_WIDTH_10) |
+-					BIT(NL80211_CHAN_WIDTH_20_NOHT) |
+-					BIT(NL80211_CHAN_WIDTH_20) |
+-					BIT(NL80211_CHAN_WIDTH_40) |
+-					BIT(NL80211_CHAN_WIDTH_80) |
+-					BIT(NL80211_CHAN_WIDTH_160);
+ 	}
+ 
+ 	if (!n_limits) {
+@@ -5333,6 +5350,9 @@ static int mac80211_hwsim_new_radio(stru
+ 
+ 	for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
+ 		struct ieee80211_supported_band *sband = &data->bands[band];
++		struct wiphy_radio_freq_range *radio_range;
++		const struct ieee80211_channel *c;
++		struct wiphy_radio *radio;
+ 
+ 		sband->band = band;
+ 
+@@ -5406,8 +5426,36 @@ static int mac80211_hwsim_new_radio(stru
+ 		mac80211_hwsim_sband_capab(sband);
+ 
+ 		hw->wiphy->bands[band] = sband;
++
++		if (!param->multi_radio)
++			continue;
++
++		c = sband->channels;
++		radio_range = &data->radio_range[n_bands];
++		radio_range->start_freq = ieee80211_channel_to_khz(c) - 10000;
++
++		c += sband->n_channels - 1;
++		radio_range->end_freq = ieee80211_channel_to_khz(c) + 10000;
++
++		radio = &data->radio[n_bands++];
++		radio->freq_range = radio_range;
++		radio->n_freq_range = 1;
++		radio->iface_combinations = &data->if_combination_radio;
++		radio->n_iface_combinations = 1;
+ 	}
+ 
++	if (param->multi_radio) {
++		hw->wiphy->radio = data->radio;
++		hw->wiphy->n_radio = n_bands;
++
++		memcpy(&data->if_combination_radio, &data->if_combination,
++		       sizeof(data->if_combination));
++		data->if_combination.num_different_channels *= n_bands;
++	}
++
++	if (data->use_chanctx)
++		data->if_combination.radar_detect_widths = 0;
++
+ 	/* By default all radios belong to the first group */
+ 	data->group = 1;
+ 	mutex_init(&data->mutex);
+@@ -6025,6 +6073,9 @@ static int hwsim_new_radio_nl(struct sk_
+ 	else
+ 		param.use_chanctx = (param.channels > 1);
+ 
++	if (info->attrs[HWSIM_ATTR_MULTI_RADIO])
++		param.multi_radio = true;
++
+ 	if (info->attrs[HWSIM_ATTR_REG_HINT_ALPHA2])
+ 		param.reg_alpha2 =
+ 			nla_data(info->attrs[HWSIM_ATTR_REG_HINT_ALPHA2]);
+@@ -6105,7 +6156,7 @@ static int hwsim_new_radio_nl(struct sk_
+ 
+ 	param.mlo = info->attrs[HWSIM_ATTR_MLO_SUPPORT];
+ 
+-	if (param.mlo)
++	if (param.mlo || param.multi_radio)
+ 		param.use_chanctx = true;
+ 
+ 	if (info->attrs[HWSIM_ATTR_RADIO_NAME]) {
+@@ -6802,7 +6853,8 @@ static int __init init_mac80211_hwsim(vo
+ 
+ 		param.p2p_device = support_p2p_device;
+ 		param.mlo = mlo;
+-		param.use_chanctx = channels > 1 || mlo;
++		param.multi_radio = multi_radio;
++		param.use_chanctx = channels > 1 || mlo || multi_radio;
+ 		param.iftypes = HWSIM_IFTYPE_SUPPORT_MASK;
+ 		if (param.p2p_device)
+ 			param.iftypes |= BIT(NL80211_IFTYPE_P2P_DEVICE);
+--- a/drivers/net/wireless/virtual/mac80211_hwsim.h
++++ b/drivers/net/wireless/virtual/mac80211_hwsim.h
+@@ -157,6 +157,9 @@ enum hwsim_commands {
+  *	to provide details about peer measurement request (nl80211_peer_measurement_attrs)
+  * @HWSIM_ATTR_PMSR_RESULT: nested attributed used with %HWSIM_CMD_REPORT_PMSR
+  *	to provide peer measurement result (nl80211_peer_measurement_attrs)
++ * @HWSIM_ATTR_MULTI_RADIO: Register multiple wiphy radios (flag).
++ *	Adds one radio for each band. Number of supported channels will be set for
++ *	each radio instead of for the wiphy.
+  * @__HWSIM_ATTR_MAX: enum limit
+  */
+ enum hwsim_attrs {
+@@ -189,6 +192,7 @@ enum hwsim_attrs {
+ 	HWSIM_ATTR_PMSR_SUPPORT,
+ 	HWSIM_ATTR_PMSR_REQUEST,
+ 	HWSIM_ATTR_PMSR_RESULT,
++	HWSIM_ATTR_MULTI_RADIO,
+ 	__HWSIM_ATTR_MAX,
+ };
+ #define HWSIM_ATTR_MAX (__HWSIM_ATTR_MAX - 1)
diff --git a/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch b/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch
index 35fa961d21..e64ca1753b 100644
--- a/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch
+++ b/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch
@@ -18,7 +18,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 
 --- a/net/mac80211/sta_info.c
 +++ b/net/mac80211/sta_info.c
-@@ -2445,6 +2445,13 @@ static void sta_stats_decode_rate(struct
+@@ -2459,6 +2459,13 @@ static void sta_stats_decode_rate(struct
  
  		sband = local->hw.wiphy->bands[band];
  
diff --git a/package/kernel/mac80211/realtek.mk b/package/kernel/mac80211/realtek.mk
index 28ea6a6571..221158bee6 100644
--- a/package/kernel/mac80211/realtek.mk
+++ b/package/kernel/mac80211/realtek.mk
@@ -1,9 +1,10 @@
 PKG_DRIVERS += \
 	rtlwifi rtlwifi-pci rtlwifi-btcoexist rtlwifi-usb rtl8192c-common \
 	rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8723-common rtl8723be rtl8723bs rtl8821ae \
-	rtl8xxxu rtw88 rtw88-pci rtw88-usb rtw88-8821c rtw88-8822b rtw88-8822c \
+	rtl8xxxu rtw88 rtw88-pci rtw88-usb rtw88-sdio rtw88-8821c rtw88-8822b rtw88-8822c \
 	rtw88-8723d rtw88-8821ce rtw88-8821cu rtw88-8822be rtw88-8822bu \
-	rtw88-8822ce rtw88-8822cu rtw88-8723de
+	rtw88-8822ce rtw88-8822cu rtw88-8723de rtw88-8723ds rtw88-8723du \
+	rtw89 rtw89-pci rtw89-8851be rtw89-8852ae rtw89-8852be rtw89-8852ce
 
 config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI
 config-$(call config_package,rtlwifi-pci) += RTLWIFI_PCI
@@ -29,6 +30,7 @@ config-y += STAGING
 config-$(call config_package,rtw88) += RTW88 RTW88_CORE
 config-$(call config_package,rtw88-pci) += RTW88_PCI
 config-$(call config_package,rtw88-usb) += RTW88_USB
+config-$(call config_package,rtw88-sdio) += RTW88_SDIO
 config-$(call config_package,rtw88-8821c) += RTW88_8821C
 config-$(call config_package,rtw88-8821ce) += RTW88_8821CE
 config-$(call config_package,rtw88-8821cu) += RTW88_8821CU
@@ -40,9 +42,21 @@ config-$(call config_package,rtw88-8822ce) += RTW88_8822CE
 config-$(call config_package,rtw88-8822cu) += RTW88_8822CU
 config-$(call config_package,rtw88-8723d) += RTW88_8723D
 config-$(call config_package,rtw88-8723de) += RTW88_8723DE
+config-$(call config_package,rtw88-8723ds) += RTW88_8723DS
+config-$(call config_package,rtw88-8723du) += RTW88_8723DU
 config-$(CONFIG_PACKAGE_RTW88_DEBUG) += RTW88_DEBUG
 config-$(CONFIG_PACKAGE_RTW88_DEBUGFS) += RTW88_DEBUGFS
 
+config-$(call config_package,rtw89) += RTW89 RTW89_CORE
+config-$(call config_package,rtw89-pci) += RTW89_PCI
+config-$(call config_package,rtw89-8851be) += RTW89_8851B RTW89_8851BE
+config-$(call config_package,rtw89-8852ae) += RTW89_8852A RTW89_8852AE
+config-$(call config_package,rtw89-8852be) += RTW89_8852B RTW89_8852BE
+config-$(call config_package,rtw89-8852ce) += RTW89_8852C RTW89_8852CE
+config-$(CONFIG_PACKAGE_RTW89_DEBUG) += RTW89_DEBUG
+config-$(CONFIG_PACKAGE_RTW89_DEBUGFS) += RTW89_DEBUGFS
+config-$(CONFIG_PACKAGE_RTW89_DEBUGMSG) += RTW89_DEBUGMSG
+
 define KernelPackage/rtlwifi/config
 	config PACKAGE_RTLWIFI_DEBUG
 		bool "Realtek wireless debugging"
@@ -186,7 +200,7 @@ endef
 define KernelPackage/rtw88
   $(call KernelPackage/mac80211/Default)
   TITLE:=Realtek RTW88 common part
-  DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211
+  DEPENDS+= +kmod-mac80211
   FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko
   AUTOLOAD:=$(call AutoProbe,rtw88_core)
   HIDDEN:=1
@@ -201,6 +215,15 @@ define KernelPackage/rtw88-pci
   HIDDEN:=1
 endef
 
+define KernelPackage/rtw88-sdio
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTW88 SDIO chips support
+  DEPENDS+= +kmod-mmc +kmod-rtw88
+  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_sdio.ko
+  AUTOLOAD:=$(call AutoProbe,rtw88_sdio)
+  HIDDEN:=1
+endef
+
 define KernelPackage/rtw88-usb
   $(call KernelPackage/mac80211/Default)
   TITLE:=Realtek RTW88 USB chips support
@@ -299,7 +322,23 @@ define KernelPackage/rtw88-8723de
   TITLE:=Realtek RTL8723DE support
   DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8723d
   FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko
-  AUTOLOAD:=$(call AutoProbe,rtw88_8723)
+  AUTOLOAD:=$(call AutoProbe,rtw88_8723de)
+endef
+
+define KernelPackage/rtw88-8723ds
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTL8723DS support
+  DEPENDS+= +kmod-rtw88-sdio +kmod-rtw88-8723d
+  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723ds.ko
+  AUTOLOAD:=$(call AutoProbe,rtw88_8723ds)
+endef
+
+define KernelPackage/rtw88-8723du
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTL8723DU support
+  DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8723d
+  FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723du.ko
+  AUTOLOAD:=$(call AutoProbe,rtw88_8723du)
 endef
 
 define KernelPackage/rtl8723-common
@@ -331,3 +370,83 @@ define KernelPackage/rtl8723bs/description
  on the 1st gen Intel Compute Stick, the CHIP and many other Intel Atom and ARM
  based devices.
 endef
+
+define KernelPackage/rtw89/config
+	config PACKAGE_RTW89_DEBUG
+		bool "Realtek wireless debugging (rtw89)"
+		depends on PACKAGE_kmod-rtw89
+		help
+		  Enable debugging output for rtw89 devices.
+
+	config PACKAGE_RTW89_DEBUGFS
+		bool "Enable rtw89 debugfs support"
+		select KERNEL_DEBUG_FS
+		depends on PACKAGE_kmod-rtw89
+		help
+		  Select this to see extensive information about
+		  the internal state of rtw89 in debugfs.
+
+	config PACKAGE_RTW89_DEBUGMSG
+		bool "Realtek rtw89 debug message support"
+		depends on PACKAGE_kmod-rtw89
+		help
+		  Enable debug message support.
+endef
+
+define KernelPackage/rtw89
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTW89 core
+  DEPENDS+= +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT +kmod-mac80211
+  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_core.ko
+  AUTOLOAD:=$(call AutoProbe,rtw89_core)
+  HIDDEN:=1
+endef
+
+define KernelPackage/rtw89-pci
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTW89 PCI chips support
+  DEPENDS+= @PCI_SUPPORT +kmod-rtw89
+  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_pci.ko
+  AUTOLOAD:=$(call AutoProbe,rtw89_pci)
+  HIDDEN:=1
+endef
+
+define KernelPackage/rtw89-8851be
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTL8851BE support
+  DEPENDS+= +kmod-rtw89-pci +rtl8851be-firmware
+  FILES:= \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8851b.ko \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8851be.ko
+  AUTOLOAD:=$(call AutoProbe,rtw89_8851be)
+endef
+
+define KernelPackage/rtw89-8852ae
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTL8852AE support
+  DEPENDS+= +kmod-rtw89-pci +rtl8852ae-firmware
+  FILES:= \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852a.ko \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852ae.ko
+  AUTOLOAD:=$(call AutoProbe,rtw89_8852ae)
+endef
+
+define KernelPackage/rtw89-8852be
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTL8852BE support
+  DEPENDS+= +kmod-rtw89-pci +rtl8852be-firmware
+  FILES:= \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852b.ko \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852be.ko
+  AUTOLOAD:=$(call AutoProbe,rtw89_8852be)
+endef
+
+define KernelPackage/rtw89-8852ce
+  $(call KernelPackage/mac80211/Default)
+  TITLE:=Realtek RTL8852CE support
+  DEPENDS+= +kmod-rtw89-pci +rtl8852ce-firmware
+  FILES:= \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852c.ko \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852ce.ko
+  AUTOLOAD:=$(call AutoProbe,rtw89_8852ce)
+endef
diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index c6cce9cf9c..a96164b6d0 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-05-17
-PKG_SOURCE_VERSION:=513c131c6309712a51502870b041f45b4bd6a6d4
-PKG_MIRROR_HASH:=3e5d8ee6b8b122cc4e32668fdde0552a9fa23819b7ebdc758ecb63b5f761683a
+PKG_SOURCE_DATE:=2024-08-18
+PKG_SOURCE_VERSION:=0ac3041a9ac8f79aa0b859213bc223e0c471fcfb
+PKG_MIRROR_HASH:=758df7f12a240ab32b61f81e2982417c7449f1cb3b41d41de02e7af91314b195
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 PKG_USE_NINJA:=0
diff --git a/package/kernel/mwlwifi/patches/005-mac80211_update.patch b/package/kernel/mwlwifi/patches/005-mac80211_update.patch
index 92a8f2f70f..877053fdf1 100644
--- a/package/kernel/mwlwifi/patches/005-mac80211_update.patch
+++ b/package/kernel/mwlwifi/patches/005-mac80211_update.patch
@@ -1,14 +1,16 @@
 --- a/core.c
 +++ b/core.c
-@@ -718,7 +718,7 @@ static void mwl_chnl_switch_event(struct
+@@ -718,8 +718,8 @@ static void mwl_chnl_switch_event(struct
  		vif = container_of((void *)mwl_vif, struct ieee80211_vif,
  				   drv_priv);
  
 -		if (vif->csa_active)
+-			ieee80211_csa_finish(vif);
 +		if (vif->bss_conf.csa_active)
- 			ieee80211_csa_finish(vif);
++			ieee80211_csa_finish(vif, 0);
  	}
  	spin_unlock_bh(&priv->vif_lock);
+ 
 --- a/debugfs.c
 +++ b/debugfs.c
 @@ -498,9 +498,9 @@ static ssize_t mwl_debugfs_vif_read(stru
@@ -95,6 +97,27 @@
  	if (priv->chip_type == MWL8997)
  		ether_addr_copy(pcmd->start_cmd.bssid, mwl_vif->bssid);
  	pcmd->start_cmd.bss_type = 1;
+@@ -674,7 +678,7 @@ static int mwl_fwcmd_set_ap_beacon(struc
+ 	phy_ds_param_set = &pcmd->start_cmd.phy_param_set.ds_param_set;
+ 	phy_ds_param_set->elem_id = WLAN_EID_DS_PARAMS;
+ 	phy_ds_param_set->len = sizeof(phy_ds_param_set->current_chnl);
+-	phy_ds_param_set->current_chnl = bss_conf->chandef.chan->hw_value;
++	phy_ds_param_set->current_chnl = bss_conf->chanreq.oper.chan->hw_value;
+ 
+ 	pcmd->start_cmd.probe_delay = cpu_to_le16(10);
+ 	pcmd->start_cmd.cap_info = cpu_to_le16(mwl_vif->beacon_info.cap_info);
+@@ -768,9 +772,9 @@ static int mwl_fwcmd_set_country_code(st
+ 	bool enable = false;
+ 
+ 	if (b_inf->ie_country_ptr) {
+-		if (bss_conf->chandef.chan->band == NL80211_BAND_2GHZ)
++		if (bss_conf->chanreq.oper.chan->band == NL80211_BAND_2GHZ)
+ 			a_band = false;
+-		else if (bss_conf->chandef.chan->band == NL80211_BAND_5GHZ)
++		else if (bss_conf->chanreq.oper.chan->band == NL80211_BAND_5GHZ)
+ 			a_band = true;
+ 		else
+ 			return -EINVAL;
 @@ -2090,7 +2094,7 @@ int mwl_fwcmd_set_beacon(struct ieee8021
  	if (mwl_fwcmd_set_wsc_ie(hw, b_inf->ie_wsc_len, b_inf->ie_wsc_ptr))
  		goto err;
@@ -236,6 +259,15 @@
  	}
 --- a/hif/pcie/8864/tx.c
 +++ b/hif/pcie/8864/tx.c
+@@ -490,7 +490,7 @@ static void pcie_non_pfu_tx_done(struct
+ 				} else
+ 					memmove(dma_data->data - hdrlen, &dma_data->wh, hdrlen);
+ 				skb_pull(done_skb, sizeof(*dma_data) - hdrlen);
+-				ieee80211_tx_status(priv->hw, done_skb);
++				ieee80211_tx_status_skb(priv->hw, done_skb);
+ 				dev_kfree_skb_any(done_skb);
+ 				done_skb = NULL;
+ 			}
 @@ -743,7 +743,7 @@ void pcie_8864_tx_xmit(struct ieee80211_
  	index = SYSADPT_TX_WMM_QUEUES - index - 1;
  	txpriority = index;
@@ -245,9 +277,41 @@
  	  !(xmitcontrol & EAGLE_TXD_XMITCTRL_USE_MC_RATE) &&
  	    ieee80211_is_data_qos(wh->frame_control)) {
  		tid = qos & 0xf;
+@@ -925,4 +925,4 @@ void pcie_8864_tx_del_sta_amsdu_pkts(str
+ 		}
+ 	}
+ 	spin_unlock_bh(&sta_info->amsdu_lock);
+-}
+\ No newline at end of file
++}
 --- a/hif/pcie/8964/tx_ndp.c
 +++ b/hif/pcie/8964/tx_ndp.c
-@@ -607,7 +607,7 @@ void pcie_tx_xmit_ndp(struct ieee80211_h
+@@ -287,7 +287,7 @@ static inline int pcie_tx_skb_ndp(struct
+ 		skb_get(tx_skb);
+ 		pcie_tx_prepare_info(priv, tx_ctrl->rate, tx_info);
+ 		tx_ctrl->flags |= TX_CTRL_TYPE_DATA;
+-		ieee80211_tx_status(priv->hw, tx_skb);
++		ieee80211_tx_status_skb(priv->hw, tx_skb);
+ 	}
+ 
+ 	if (++tx_send_head_new >= MAX_NUM_TX_DESC)
+@@ -488,7 +488,7 @@ void pcie_tx_done_ndp(struct ieee80211_h
+ 		}
+ 
+ 		pcie_tx_prepare_info(priv, 0, tx_info);
+-		ieee80211_tx_status(hw, skb);
++		ieee80211_tx_status_skb(hw, skb);
+ 
+ bypass_ack:
+ 		if (++tx_done_tail >= MAX_TX_RING_DONE_SIZE)
+@@ -601,13 +601,13 @@ void pcie_tx_xmit_ndp(struct ieee80211_h
+ 			ack_skb = skb_copy(skb, GFP_ATOMIC);
+ 			ack_info = IEEE80211_SKB_CB(ack_skb);
+ 			pcie_tx_prepare_info(priv, 0, ack_info);
+-			ieee80211_tx_status(hw, ack_skb);
++			ieee80211_tx_status_skb(hw, ack_skb);
+ 		}
+ 
  		pcie_tx_encapsulate_frame(priv, skb, k_conf);
  	} else {
  		tid = qos & 0x7;
@@ -267,6 +331,15 @@
  		   pcie_priv->txbd_ring_size);
  
  	for (num = 0; num < PCIE_MAX_TXRX_BD; num++) {
+@@ -444,7 +444,7 @@ static void pcie_pfu_tx_done(struct mwl_
+ 				} else
+ 					memmove(dma_data->data - hdrlen, &dma_data->wh, hdrlen);
+ 				skb_pull(done_skb, sizeof(*pfu_dma) - hdrlen);
+-				ieee80211_tx_status(priv->hw, done_skb);
++				ieee80211_tx_status_skb(priv->hw, done_skb);
+ 			}
+ 		}
+ next:
 @@ -694,7 +694,7 @@ void pcie_8997_tx_xmit(struct ieee80211_
  	index = SYSADPT_TX_WMM_QUEUES - index - 1;
  	txpriority = index;
@@ -276,6 +349,13 @@
  	  !(xmitcontrol & EAGLE_TXD_XMITCTRL_USE_MC_RATE) &&
  	    ieee80211_is_data_qos(wh->frame_control)) {
  		tid = qos & 0xf;
+@@ -875,4 +875,4 @@ void pcie_8997_tx_del_sta_amsdu_pkts(str
+ 		}
+ 	}
+ 	spin_unlock_bh(&sta_info->amsdu_lock);
+-}
+\ No newline at end of file
++}
 --- a/mac80211.c
 +++ b/mac80211.c
 @@ -368,15 +368,15 @@ static void mwl_mac80211_bss_info_change
@@ -348,11 +428,15 @@
  				const struct ieee80211_tx_queue_params *params)
  {
  	struct mwl_priv *priv = hw->priv;
-@@ -934,4 +934,5 @@ const struct ieee80211_ops mwl_mac80211_
+@@ -934,4 +934,9 @@ const struct ieee80211_ops mwl_mac80211_
  	.pre_channel_switch = mwl_mac80211_chnl_switch,
  	.sw_scan_start      = mwl_mac80211_sw_scan_start,
  	.sw_scan_complete   = mwl_mac80211_sw_scan_complete,
 +	.wake_tx_queue	    = ieee80211_handle_wake_tx_queue,
++	.add_chanctx        = ieee80211_emulate_add_chanctx,
++	.remove_chanctx     = ieee80211_emulate_remove_chanctx,
++	.change_chanctx     = ieee80211_emulate_change_chanctx,
++	.switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
  };
 --- a/utils.c
 +++ b/utils.c
diff --git a/package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch b/package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch
new file mode 100644
index 0000000000..2cd167c8dd
--- /dev/null
+++ b/package/kernel/qca-ssdk/patches/0004-SSDK-set-OF-node-for-the-SFP-PHY.patch
@@ -0,0 +1,94 @@
+From 00d3c54c611143f57b632e4cd3b42b0a94d82307 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 25 Jun 2023 11:24:09 +0200
+Subject: [PATCH 3/3] SSDK: set OF node for the SFP PHY
+
+Currently, SSDK is creating a fake SFP PHY which has no OF node populated,
+thus making it impossible to pass it to NSS-DP so port can actually work.
+
+We eliminated QCA-s connecting of the PHY by manually creating a string
+and then matching by name and instead only support passing the PHY as
+phandle via phy-handle.
+
+So, lets just use the switch port node to which the SFP is connected to
+anyway and set it as the PHY device OF node so we can pass it to NSS-DP.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ include/hsl/phy/hsl_phy.h |  6 ++++++
+ src/hsl/phy/hsl_phy.c     | 14 ++++++++++++++
+ src/hsl/phy/sfp_phy.c     |  7 +++++++
+ src/init/ssdk_dts.c       |  7 +++++++
+ 4 files changed, 34 insertions(+)
+
+--- a/include/hsl/phy/hsl_phy.h
++++ b/include/hsl/phy/hsl_phy.h
+@@ -584,6 +584,7 @@ typedef struct {
+ 	a_bool_t port_link_status[SW_MAX_NR_PORT];
+ 	a_uint32_t port_mode[SW_MAX_NR_PORT];
+ 	a_uint32_t combo_phy_type[SW_MAX_NR_PORT];
++	struct device_node *port_node[SW_MAX_NR_PORT];
+ } phy_info_t;
+ /*qca808x_end*/
+ #define MALIBU5PORT_PHY         0x004DD0B1
+@@ -1038,3 +1039,8 @@ hsl_phydev_eee_update(a_uint32_t dev_id,
+ #endif				/* __cplusplus */
+ #endif				/* _HSL_PHY_H_ */
+ /*qca808x_end*/
++
++struct device_node*
++hsl_port_node_get(a_uint32_t dev_id, a_uint32_t port_id);
++void
++hsl_port_node_set(a_uint32_t dev_id, a_uint32_t port_id, struct device_node *port_node);
+--- a/src/hsl/phy/hsl_phy.c
++++ b/src/hsl/phy/hsl_phy.c
+@@ -3433,3 +3433,17 @@ hsl_phy_modify_debug(a_uint32_t dev_id,
+ 	return rv;
+ }
+ /*qca808x_end*/
++
++struct device_node*
++hsl_port_node_get(a_uint32_t dev_id, a_uint32_t port_id)
++{
++	return phy_info[dev_id]->port_node[port_id];
++}
++
++void
++hsl_port_node_set(a_uint32_t dev_id, a_uint32_t port_id, struct device_node *port_node)
++{
++	phy_info[dev_id]->port_node[port_id] = port_node;
++
++	return;
++}
+--- a/src/hsl/phy/sfp_phy.c
++++ b/src/hsl/phy/sfp_phy.c
+@@ -335,6 +335,13 @@ int sfp_phy_device_setup(a_uint32_t dev_
+ 	phy_device_register(phydev);
+ 
+ 	phydev->priv = priv;
++	/*
++	 * Set the PHY OF node in order to be able to later connect the
++	 * fake SFP PHY by passing it as a phandle in phy-handle.
++	 */
++	phydev->mdio.dev.of_node = hsl_port_node_get(dev_id, port);
++	if (!phydev->mdio.dev.of_node)
++		return SW_NOT_FOUND;
+ #if defined(IN_PHY_I2C_MODE)
+ 	if (hsl_port_phy_access_type_get(dev_id, port) == PHY_I2C_ACCESS) {
+ 		if(phydev->drv)
+--- a/src/init/ssdk_dts.c
++++ b/src/init/ssdk_dts.c
+@@ -784,6 +784,13 @@ static sw_error_t ssdk_dt_parse_phy_info
+ 			}
+ 		}
+ 		hsl_port_feature_set(dev_id, port_id, phy_features | PHY_F_INIT);
++
++		/*
++		* Save the port node so it can be passed as the
++		* fake SFP PHY OF node in order to be able to
++		* pass the SFP phy via phy-handle
++		*/
++		hsl_port_node_set(dev_id, port_id, port_node);
+ 	}
+ 
+ 	return rv;
diff --git a/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch b/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch
index db84ea1422..abd25d2214 100644
--- a/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch
+++ b/package/kernel/qca-ssdk/patches/102-qca-ssdk-support-selecting-PCS-channel-for-PORT3-on-.patch
@@ -125,7 +125,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
  #ifdef IN_UNIPHY
  static void ssdk_dt_parse_uniphy(a_uint32_t dev_id)
  {
-@@ -1347,6 +1373,7 @@ sw_error_t ssdk_dt_parse(ssdk_init_cfg *
+@@ -1354,6 +1380,7 @@ sw_error_t ssdk_dt_parse(ssdk_init_cfg *
  	rv = ssdk_dt_parse_access_mode(switch_node, ssdk_dt_priv);
  	SW_RTN_ON_ERROR(rv);
  	ssdk_dt_parse_mac_mode(*dev_id, switch_node, cfg);
diff --git a/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch b/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch
index 4422b67cf7..f144591d8d 100644
--- a/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch
+++ b/package/kernel/qca-ssdk/patches/103-hsl_phy-add-support-for-AQR114C-B0-PHY.patch
@@ -13,7 +13,7 @@ Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
 
 --- a/include/hsl/phy/hsl_phy.h
 +++ b/include/hsl/phy/hsl_phy.h
-@@ -612,6 +612,7 @@ typedef struct {
+@@ -613,6 +613,7 @@ typedef struct {
  #define AQUANTIA_PHY_113C_B0    0x31c31C12
  #define AQUANTIA_PHY_113C_B1    0x31c31C13
  #define AQUANTIA_PHY_112C       0x03a1b792
diff --git a/package/kernel/r8101/Makefile b/package/kernel/r8101/Makefile
new file mode 100644
index 0000000000..2a09855c05
--- /dev/null
+++ b/package/kernel/r8101/Makefile
@@ -0,0 +1,33 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=r8101
+PKG_VERSION:=1.039.00
+PKG_RELEASE:=2
+
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:=https://github.com/openwrt/rtl8101/releases/download/$(PKG_VERSION)
+PKG_HASH:=e64e1738e71d6717dd844bf771fea4691edae63e92d7d03bb5ad2ef08e56e72b
+
+PKG_BUILD_PARALLEL:=1
+PKG_LICENSE:=GPLv2
+PKG_MAINTAINER:=Alvaro Fernandez Rojas <noltari@gmail.com>
+
+include $(INCLUDE_DIR)/kernel.mk
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/r8101
+  SUBMENU:=Network Devices
+  TITLE:=Realtek RTL8101 PCI Fast Ethernet driver
+  DEPENDS:=@PCI_SUPPORT +kmod-libphy
+  FILES:=$(PKG_BUILD_DIR)/src/r8101.ko
+  AUTOLOAD:=$(call AutoProbe,r8101)
+  PROVIDES:=kmod-r8169
+endef
+
+define Build/Compile
+	+$(KERNEL_MAKE) $(PKG_JOBS) \
+		M="$(PKG_BUILD_DIR)/src" \
+		modules
+endef
+
+$(eval $(call KernelPackage,r8101))
diff --git a/package/kernel/r8101/patches/200-r8101-print-link-speed-and-duplex-mode.patch b/package/kernel/r8101/patches/200-r8101-print-link-speed-and-duplex-mode.patch
new file mode 100644
index 0000000000..e112d14168
--- /dev/null
+++ b/package/kernel/r8101/patches/200-r8101-print-link-speed-and-duplex-mode.patch
@@ -0,0 +1,100 @@
+From ec0de750e20073b23c91b67f4bc3ab71c50f0eed Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Sat, 17 Aug 2024 21:19:54 +0200
+Subject: [PATCH] r8101: print link speed and duplex mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Like other Ethernet drivers, print link speed and duplex mode
+when the interface is up. Formatting output at the same time.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ src/r8101.h   |  2 ++
+ src/r8101_n.c | 42 +++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 41 insertions(+), 3 deletions(-)
+
+--- a/src/r8101.h
++++ b/src/r8101.h
+@@ -1162,6 +1162,8 @@ enum RTL8101_register_content {
+         LinkStatus = 0x02,
+         FullDup = 0x01,
+ 
++#define RTL8101_FULL_DUPLEX_MASK (FullDup)
++
+         /* ResetCounterCommand */
+         CounterReset = 0x1,
+         /* DumpCounterCommand */
+--- a/src/r8101_n.c
++++ b/src/r8101_n.c
+@@ -39,6 +39,7 @@ This driver is modified from r8169.c in
+ #include <linux/module.h>
+ #include <linux/version.h>
+ #include <linux/pci.h>
++#include <linux/phy.h>
+ #include <linux/netdevice.h>
+ #include <linux/etherdevice.h>
+ #include <linux/delay.h>
+@@ -2838,6 +2839,34 @@ rtl8101_issue_offset_99_event(struct rtl
+         }
+ }
+ 
++static unsigned int rtl8101_phy_duplex(u8 status)
++{
++        unsigned int duplex = DUPLEX_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & RTL8101_FULL_DUPLEX_MASK)
++                        duplex = DUPLEX_FULL;
++                else
++                        duplex = DUPLEX_HALF;
++        }
++
++        return duplex;
++}
++
++static int rtl8101_phy_speed(u8 status)
++{
++        int speed = SPEED_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & _100bps)
++                        speed = SPEED_100;
++                else if (status & _10bps)
++                        speed = SPEED_10;
++        }
++
++        return speed;
++}
++
+ static void
+ rtl8101_check_link_status(struct net_device *dev)
+ {
+@@ -2913,8 +2942,15 @@ rtl8101_check_link_status(struct net_dev
+                         tp->phy_reg_aner = rtl8101_mdio_read(tp, MII_EXPANSION);
+                         tp->phy_reg_anlpar = rtl8101_mdio_read(tp, MII_LPA);
+ 
+-                        if (netif_msg_ifup(tp))
+-                                printk(KERN_INFO PFX "%s: link up\n", dev->name);
++                        if (netif_msg_ifup(tp)) {
++                                const u8 phy_status = RTL_R8(tp, PHYstatus);
++                                const unsigned int phy_duplex = rtl8101_phy_duplex(phy_status);
++                                const int phy_speed = rtl8101_phy_speed(phy_status);
++                                printk(KERN_INFO PFX "%s: Link is Up - %s/%s\n",
++                                       dev->name,
++                                       phy_speed_to_str(phy_speed),
++                                       phy_duplex_to_str(phy_duplex));
++                        }
+                 } else {
+                         if (tp->mcfg == CFG_METHOD_11 || tp->mcfg == CFG_METHOD_12 ||
+                             tp->mcfg == CFG_METHOD_13) {
+@@ -2925,7 +2961,7 @@ rtl8101_check_link_status(struct net_dev
+                                 rtl8101_mdio_write(tp, 0x1F, 0x0000);
+                         }
+                         if (netif_msg_ifdown(tp))
+-                                printk(KERN_INFO PFX "%s: link down\n", dev->name);
++                                printk(KERN_INFO PFX "%s: Link is Down\n", dev->name);
+ 
+                         tp->phy_reg_aner = 0;
+                         tp->phy_reg_anlpar = 0;
diff --git a/package/kernel/r8125/Makefile b/package/kernel/r8125/Makefile
new file mode 100644
index 0000000000..f05ec0d842
--- /dev/null
+++ b/package/kernel/r8125/Makefile
@@ -0,0 +1,46 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=r8125
+PKG_VERSION:=9.013.02
+PKG_RELEASE:=4
+
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:=https://github.com/openwrt/rtl8125/releases/download/$(PKG_VERSION)
+PKG_HASH:=d36410ee99c956f250d9cd08340d8c36567d190f420a8ee128ff6e51225aac0c
+
+PKG_BUILD_PARALLEL:=1
+PKG_LICENSE:=GPLv2
+PKG_MAINTAINER:=Alvaro Fernandez Rojas <noltari@gmail.com>
+
+include $(INCLUDE_DIR)/kernel.mk
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/r8125
+  SUBMENU:=Network Devices
+  TITLE:=Realtek RTL8125 PCI 2.5 Gigabit Ethernet driver
+  DEPENDS:=@PCI_SUPPORT +kmod-libphy
+  FILES:=$(PKG_BUILD_DIR)/src/r8125.ko
+  AUTOLOAD:=$(call AutoProbe,r8125)
+  PROVIDES:=kmod-r8169
+  VARIANT:=regular
+endef
+
+define KernelPackage/r8125-rss
+$(call KernelPackage/r8125)
+  TITLE+= (RSS)
+  VARIANT:=rss
+endef
+
+ifeq ($(BUILD_VARIANT),rss)
+  PKG_MAKE_FLAGS += ENABLE_RSS_SUPPORT=y
+endif
+
+define Build/Compile
+	+$(KERNEL_MAKE) $(PKG_JOBS) \
+		$(PKG_MAKE_FLAGS) \
+		M="$(PKG_BUILD_DIR)/src" \
+		modules
+endef
+
+$(eval $(call KernelPackage,r8125))
+$(eval $(call KernelPackage,r8125-rss))
diff --git a/package/kernel/r8125/patches/100-r8125_rss-silence-rxnfc-log.patch b/package/kernel/r8125/patches/100-r8125_rss-silence-rxnfc-log.patch
new file mode 100644
index 0000000000..58eb470037
--- /dev/null
+++ b/package/kernel/r8125/patches/100-r8125_rss-silence-rxnfc-log.patch
@@ -0,0 +1,26 @@
+From cd20cf48c0ec2a01fd9f512e25218a6ac8131794 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Sat, 17 Aug 2024 22:07:23 +0200
+Subject: [PATCH] r8125_rss: silence rxnfc log
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This log is noisy and useless, just ignore it.
+
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+---
+ src/r8125_rss.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/src/r8125_rss.c
++++ b/src/r8125_rss.c
+@@ -91,7 +91,7 @@ int rtl8125_get_rxnfc(struct net_device
+         struct rtl8125_private *tp = netdev_priv(dev);
+         int ret = -EOPNOTSUPP;
+ 
+-        netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
++        netif_dbg(tp, drv, tp->dev, "rss get rxnfc\n");
+ 
+         if (!(dev->features & NETIF_F_RXHASH))
+                 return ret;
diff --git a/package/kernel/r8125/patches/200-r8125-print-link-speed-and-duplex-mode.patch b/package/kernel/r8125/patches/200-r8125-print-link-speed-and-duplex-mode.patch
new file mode 100644
index 0000000000..df649c9ae9
--- /dev/null
+++ b/package/kernel/r8125/patches/200-r8125-print-link-speed-and-duplex-mode.patch
@@ -0,0 +1,100 @@
+From e351ac87bc3135e8555587e0bf80efb248ade0b7 Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus@jmu.edu.cn>
+Date: Sun, 4 Aug 2024 21:16:23 +0800
+Subject: [PATCH] r8125: print link speed and duplex mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Like other Ethernet drivers, print link speed and duplex mode
+when the interface is up. Formatting output at the same time.
+
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ src/r8125.h   |  2 ++
+ src/r8125_n.c | 46 +++++++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 45 insertions(+), 3 deletions(-)
+
+--- a/src/r8125.h
++++ b/src/r8125.h
+@@ -1563,6 +1563,8 @@ enum RTL8125_register_content {
+         LinkStatus = 0x02,
+         FullDup = 0x01,
+ 
++#define RTL8125_FULL_DUPLEX_MASK (_2500bpsF | _1000bpsF | FullDup)
++
+         /* DBG_reg */
+         Fix_Nak_1 = (1 << 4),
+         Fix_Nak_2 = (1 << 3),
+--- a/src/r8125_n.c
++++ b/src/r8125_n.c
+@@ -39,6 +39,7 @@
+ #include <linux/module.h>
+ #include <linux/version.h>
+ #include <linux/pci.h>
++#include <linux/phy.h>
+ #include <linux/netdevice.h>
+ #include <linux/etherdevice.h>
+ #include <linux/delay.h>
+@@ -5112,6 +5113,38 @@ rtl8125_link_down_patch(struct net_devic
+ #endif
+ }
+ 
++static unsigned int rtl8125_phy_duplex(u16 status)
++{
++        unsigned int duplex = DUPLEX_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & RTL8125_FULL_DUPLEX_MASK)
++                        duplex = DUPLEX_FULL;
++                else
++                        duplex = DUPLEX_HALF;
++        }
++
++        return duplex;
++}
++
++static int rtl8125_phy_speed(u16 status)
++{
++        int speed = SPEED_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & _2500bpsF)
++                        speed = SPEED_2500;
++                else if (status & _1000bpsF)
++                        speed = SPEED_1000;
++                else if (status & _100bps)
++                        speed = SPEED_100;
++                else if (status & _10bps)
++                        speed = SPEED_10;
++        }
++
++        return speed;
++}
++
+ static void
+ _rtl8125_check_link_status(struct net_device *dev)
+ {
+@@ -5120,11 +5153,18 @@ _rtl8125_check_link_status(struct net_de
+         if (tp->link_ok(dev)) {
+                 rtl8125_link_on_patch(dev);
+ 
+-                if (netif_msg_ifup(tp))
+-                        printk(KERN_INFO PFX "%s: link up\n", dev->name);
++                if (netif_msg_ifup(tp)) {
++                        const u16 phy_status = RTL_R16(tp, PHYstatus);
++                        const unsigned int phy_duplex = rtl8125_phy_duplex(phy_status);
++                        const int phy_speed = rtl8125_phy_speed(phy_status);
++                        printk(KERN_INFO PFX "%s: Link is Up - %s/%s\n",
++                                dev->name,
++                                phy_speed_to_str(phy_speed),
++                                phy_duplex_to_str(phy_duplex));
++                }
+         } else {
+                 if (netif_msg_ifdown(tp))
+-                        printk(KERN_INFO PFX "%s: link down\n", dev->name);
++                        printk(KERN_INFO PFX "%s: Link is Down\n", dev->name);
+ 
+                 rtl8125_link_down_patch(dev);
+         }
diff --git a/package/kernel/r8126/Makefile b/package/kernel/r8126/Makefile
new file mode 100644
index 0000000000..3cd77294b1
--- /dev/null
+++ b/package/kernel/r8126/Makefile
@@ -0,0 +1,46 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=r8126
+PKG_VERSION:=10.013.00
+PKG_RELEASE:=4
+
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:=https://github.com/openwrt/rtl8126/releases/download/$(PKG_VERSION)
+PKG_HASH:=b41bda6ff3bbb7d9bc5b81c5c21355f031587d3a3a5862abcd4d766e942272e7
+
+PKG_BUILD_PARALLEL:=1
+PKG_LICENSE:=GPLv2
+PKG_MAINTAINER:=Alvaro Fernandez Rojas <noltari@gmail.com>
+
+include $(INCLUDE_DIR)/kernel.mk
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/r8126
+  SUBMENU:=Network Devices
+  TITLE:=Realtek RTL8126 PCI 5 Gigabit Ethernet driver
+  DEPENDS:=@PCI_SUPPORT +kmod-libphy
+  FILES:=$(PKG_BUILD_DIR)/src/r8126.ko
+  AUTOLOAD:=$(call AutoProbe,r8126)
+  PROVIDES:=kmod-r8169
+  VARIANT:=regular
+endef
+
+define KernelPackage/r8126-rss
+$(call KernelPackage/r8126)
+  TITLE+= (RSS)
+  VARIANT:=rss
+endef
+
+ifeq ($(BUILD_VARIANT),rss)
+  PKG_MAKE_FLAGS += ENABLE_RSS_SUPPORT=y
+endif
+
+define Build/Compile
+	+$(KERNEL_MAKE) $(PKG_JOBS) \
+		$(PKG_MAKE_FLAGS) \
+		M="$(PKG_BUILD_DIR)/src" \
+		modules
+endef
+
+$(eval $(call KernelPackage,r8126))
+$(eval $(call KernelPackage,r8126-rss))
diff --git a/package/kernel/r8126/patches/001-r8126.h-use-BIT_ULL.patch b/package/kernel/r8126/patches/001-r8126.h-use-BIT_ULL.patch
new file mode 100644
index 0000000000..cfbf31fcbb
--- /dev/null
+++ b/package/kernel/r8126/patches/001-r8126.h-use-BIT_ULL.patch
@@ -0,0 +1,21 @@
+From 9649df50a239d1379cc8d9febd4854a0c7ca0731 Mon Sep 17 00:00:00 2001
+From: Mieczyslaw Nalewaj <namiltd@poczta.onet.pl>
+Date: Sat, 10 Aug 2024 17:42:44 +0200
+Subject: [PATCH] r8126.h: use BIT_ULL
+
+Fixes compilation on 32 bit systems.
+---
+ src/r8126.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/src/r8126.h
++++ b/src/r8126.h
+@@ -678,7 +678,7 @@ This is free software, and you are welco
+ #ifndef ADVERTISED_2500baseX_Full
+ #define ADVERTISED_2500baseX_Full  0x8000
+ #endif
+-#define RTK_ADVERTISED_5000baseX_Full  BIT(48)
++#define RTK_ADVERTISED_5000baseX_Full  BIT_ULL(48)
+ 
+ #define RTK_ADVERTISE_2500FULL  0x80
+ #define RTK_ADVERTISE_5000FULL  0x100
diff --git a/package/kernel/r8126/patches/100-r8126_rss-silence-rxnfc-log.patch b/package/kernel/r8126/patches/100-r8126_rss-silence-rxnfc-log.patch
new file mode 100644
index 0000000000..d06406004c
--- /dev/null
+++ b/package/kernel/r8126/patches/100-r8126_rss-silence-rxnfc-log.patch
@@ -0,0 +1,27 @@
+From cd20cf48c0ec2a01fd9f512e25218a6ac8131794 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Sat, 17 Aug 2024 22:07:23 +0200
+Subject: [PATCH] r8126_rss: silence rxnfc log
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This log is noisy and useless, just ignore it.
+
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ src/r8126_rss.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/src/r8126_rss.c
++++ b/src/r8126_rss.c
+@@ -91,7 +91,7 @@ int rtl8126_get_rxnfc(struct net_device
+         struct rtl8126_private *tp = netdev_priv(dev);
+         int ret = -EOPNOTSUPP;
+ 
+-        netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
++        netif_dbg(tp, drv, tp->dev, "rss get rxnfc\n");
+ 
+         if (!(dev->features & NETIF_F_RXHASH))
+                 return ret;
diff --git a/package/kernel/r8126/patches/200-r8126-print-link-speed-and-duplex-mode.patch b/package/kernel/r8126/patches/200-r8126-print-link-speed-and-duplex-mode.patch
new file mode 100644
index 0000000000..308d2494b3
--- /dev/null
+++ b/package/kernel/r8126/patches/200-r8126-print-link-speed-and-duplex-mode.patch
@@ -0,0 +1,102 @@
+From 5ca1d47e065c0318774a946ffdf76010c78cc164 Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus@jmu.edu.cn>
+Date: Sat, 10 Aug 2024 20:16:32 +0800
+Subject: [PATCH] r8126: print link speed and duplex mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Like other Ethernet drivers, print link speed and duplex mode
+when the interface is up. Formatting output at the same time.
+
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ src/r8126.h   |  2 ++
+ src/r8126_n.c | 48 +++++++++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 47 insertions(+), 3 deletions(-)
+
+--- a/src/r8126.h
++++ b/src/r8126.h
+@@ -1561,6 +1561,8 @@ enum RTL8126_register_content {
+         LinkStatus = 0x02,
+         FullDup = 0x01,
+ 
++#define RTL8126_FULL_DUPLEX_MASK (_5000bpsF | _2500bpsF | _1000bpsF | FullDup)
++
+         /* DBG_reg */
+         Fix_Nak_1 = (1 << 4),
+         Fix_Nak_2 = (1 << 3),
+--- a/src/r8126_n.c
++++ b/src/r8126_n.c
+@@ -39,6 +39,7 @@
+ #include <linux/module.h>
+ #include <linux/version.h>
+ #include <linux/pci.h>
++#include <linux/phy.h>
+ #include <linux/netdevice.h>
+ #include <linux/etherdevice.h>
+ #include <linux/delay.h>
+@@ -4740,6 +4741,40 @@ rtl8126_link_down_patch(struct net_devic
+ #endif
+ }
+ 
++static unsigned int rtl8126_phy_duplex(u16 status)
++{
++        unsigned int duplex = DUPLEX_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & RTL8126_FULL_DUPLEX_MASK)
++                        duplex = DUPLEX_FULL;
++                else
++                        duplex = DUPLEX_HALF;
++        }
++
++        return duplex;
++}
++
++static int rtl8126_phy_speed(u16 status)
++{
++        int speed = SPEED_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & _5000bpsF)
++                        speed = SPEED_5000;
++                else if (status & _2500bpsF)
++                        speed = SPEED_2500;
++                else if (status & _1000bpsF)
++                        speed = SPEED_1000;
++                else if (status & _100bps)
++                        speed = SPEED_100;
++                else if (status & _10bps)
++                        speed = SPEED_10;
++        }
++
++        return speed;
++}
++
+ static void
+ _rtl8126_check_link_status(struct net_device *dev)
+ {
+@@ -4748,11 +4783,18 @@ _rtl8126_check_link_status(struct net_de
+         if (tp->link_ok(dev)) {
+                 rtl8126_link_on_patch(dev);
+ 
+-                if (netif_msg_ifup(tp))
+-                        printk(KERN_INFO PFX "%s: link up\n", dev->name);
++                if (netif_msg_ifup(tp)) {
++                        const u16 phy_status = RTL_R16(tp, PHYstatus);
++                        const unsigned int phy_duplex = rtl8126_phy_duplex(phy_status);
++                        const int phy_speed = rtl8126_phy_speed(phy_status);
++                        printk(KERN_INFO PFX "%s: Link is Up - %s/%s\n",
++                                dev->name,
++                                phy_speed_to_str(phy_speed),
++                                phy_duplex_to_str(phy_duplex));
++                }
+         } else {
+                 if (netif_msg_ifdown(tp))
+-                        printk(KERN_INFO PFX "%s: link down\n", dev->name);
++                        printk(KERN_INFO PFX "%s: Link is Down\n", dev->name);
+ 
+                 rtl8126_link_down_patch(dev);
+         }
diff --git a/package/kernel/r8168/Makefile b/package/kernel/r8168/Makefile
new file mode 100644
index 0000000000..dc764bbf2c
--- /dev/null
+++ b/package/kernel/r8168/Makefile
@@ -0,0 +1,33 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=r8168
+PKG_VERSION:=8.053.00
+PKG_RELEASE:=2
+
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:=https://github.com/openwrt/rtl8168/releases/download/$(PKG_VERSION)
+PKG_HASH:=52f1e6200672b598a04d4ac21ac92a8a9e128b38208c7b03a464bfa93bbfcc8f
+
+PKG_BUILD_PARALLEL:=1
+PKG_LICENSE:=GPLv2
+PKG_MAINTAINER:=Alvaro Fernandez Rojas <noltari@gmail.com>
+
+include $(INCLUDE_DIR)/kernel.mk
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/r8168
+  SUBMENU:=Network Devices
+  TITLE:=Realtek RTL8168 PCI Gigabit Ethernet driver
+  DEPENDS:=@PCI_SUPPORT +kmod-libphy
+  FILES:=$(PKG_BUILD_DIR)/src/r8168.ko
+  AUTOLOAD:=$(call AutoProbe,r8168)
+  PROVIDES:=kmod-r8169
+endef
+
+define Build/Compile
+	+$(KERNEL_MAKE) $(PKG_JOBS) \
+		M="$(PKG_BUILD_DIR)/src" \
+		modules
+endef
+
+$(eval $(call KernelPackage,r8168))
diff --git a/package/kernel/r8168/patches/001-r8168_n-fix-proc_dump_rx_desc_2-on-32-bits.patch b/package/kernel/r8168/patches/001-r8168_n-fix-proc_dump_rx_desc_2-on-32-bits.patch
new file mode 100644
index 0000000000..b53819a0cb
--- /dev/null
+++ b/package/kernel/r8168/patches/001-r8168_n-fix-proc_dump_rx_desc_2-on-32-bits.patch
@@ -0,0 +1,28 @@
+From c0e1ae03f564f0e3db492ef2f25357b5da7977d7 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Sat, 10 Aug 2024 20:12:40 +0200
+Subject: [PATCH] r8168_n: fix proc_dump_rx_desc_2 on 32 bits
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+---
+ src/r8168_n.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/src/r8168_n.c
++++ b/src/r8168_n.c
+@@ -1655,9 +1655,9 @@ static int proc_dump_rx_desc_2(struct se
+                                                           j, k);
+                         for (i=0; i<(tp->RxDescLength/4); i++) {
+                                 if (!(i % 4))
+-                                        seq_printf(m, "\n%04llx ",
+-                                                   ((u64)pdword + (i * 4) -
+-                                                    (u64)tp->RxDescArray));
++                                        seq_printf(m, "\n%04x ",
++                                                   (u32) ((uintptr_t)pdword + (i * 4) -
++                                                    (uintptr_t)tp->RxDescArray));
+                                 seq_printf(m, "%08x ", pdword[i]);
+                         }
+                 }
diff --git a/package/kernel/r8168/patches/200-r8168-print-link-speed-and-duplex-mode.patch b/package/kernel/r8168/patches/200-r8168-print-link-speed-and-duplex-mode.patch
new file mode 100644
index 0000000000..0212ae9bc4
--- /dev/null
+++ b/package/kernel/r8168/patches/200-r8168-print-link-speed-and-duplex-mode.patch
@@ -0,0 +1,98 @@
+From 0078930e0c374d327cd3281e5e2f7ff97b40b335 Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus@jmu.edu.cn>
+Date: Sun, 4 Aug 2024 16:15:12 +0800
+Subject: [PATCH] r8168: print link speed and duplex mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Like other Ethernet drivers, print link speed and duplex mode
+when the interface is up. Formatting output at the same time.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
+---
+ src/r8168.h   |  2 ++
+ src/r8168_n.c | 44 +++++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 43 insertions(+), 3 deletions(-)
+
+--- a/src/r8168.h
++++ b/src/r8168.h
+@@ -1385,6 +1385,8 @@ enum RTL8168_register_content {
+         LinkStatus = 0x02,
+         FullDup = 0x01,
+ 
++#define RTL8168_FULL_DUPLEX_MASK (_1000bpsF | FullDup)
++
+         /* DBG_reg */
+         Fix_Nak_1 = (1 << 4),
+         Fix_Nak_2 = (1 << 3),
+--- a/src/r8168_n.c
++++ b/src/r8168_n.c
+@@ -43,6 +43,7 @@
+ #include <linux/module.h>
+ #include <linux/version.h>
+ #include <linux/pci.h>
++#include <linux/phy.h>
+ #include <linux/netdevice.h>
+ #include <linux/etherdevice.h>
+ #include <linux/delay.h>
+@@ -5373,6 +5374,36 @@ rtl8168_link_down_patch(struct net_devic
+ #endif
+ }
+ 
++static unsigned int rtl8168_phy_duplex(u8 status)
++{
++        unsigned int duplex = DUPLEX_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & RTL8168_FULL_DUPLEX_MASK)
++                        duplex = DUPLEX_FULL;
++                else
++                        duplex = DUPLEX_HALF;
++        }
++
++        return duplex;
++}
++
++static int rtl8168_phy_speed(u8 status)
++{
++        int speed = SPEED_UNKNOWN;
++
++        if (status & LinkStatus) {
++                if (status & _1000bpsF)
++                        speed = SPEED_1000;
++                else if (status & _100bps)
++                        speed = SPEED_100;
++                else if (status & _10bps)
++                        speed = SPEED_10;
++        }
++
++        return speed;
++}
++
+ static void
+ rtl8168_check_link_status(struct net_device *dev)
+ {
+@@ -5392,11 +5423,18 @@ rtl8168_check_link_status(struct net_dev
+                 if (link_status_on) {
+                         rtl8168_link_on_patch(dev);
+ 
+-                        if (netif_msg_ifup(tp))
+-                                printk(KERN_INFO PFX "%s: link up\n", dev->name);
++                        if (netif_msg_ifup(tp)) {
++                                const u8 phy_status = RTL_R8(tp, PHYstatus);
++                                const unsigned int phy_duplex = rtl8168_phy_duplex(phy_status);
++                                const int phy_speed = rtl8168_phy_speed(phy_status);
++                                printk(KERN_INFO PFX "%s: Link is Up - %s/%s\n",
++                                       dev->name,
++                                       phy_speed_to_str(phy_speed),
++                                       phy_duplex_to_str(phy_duplex));
++                        }
+                 } else {
+                         if (netif_msg_ifdown(tp))
+-                                printk(KERN_INFO PFX "%s: link down\n", dev->name);
++                                printk(KERN_INFO PFX "%s: Link is Down\n", dev->name);
+ 
+                         rtl8168_link_down_patch(dev);
+                 }
diff --git a/package/kernel/rtl8812au-ct/patches/009-fix-build-on-linux-6.7-kernel.patch b/package/kernel/rtl8812au-ct/patches/009-fix-build-on-linux-6.7-kernel.patch
new file mode 100644
index 0000000000..8a5c15427c
--- /dev/null
+++ b/package/kernel/rtl8812au-ct/patches/009-fix-build-on-linux-6.7-kernel.patch
@@ -0,0 +1,29 @@
+--- a/os_dep/linux/ioctl_cfg80211.c
++++ b/os_dep/linux/ioctl_cfg80211.c
+@@ -4020,6 +4020,18 @@ static int cfg80211_rtw_start_ap(struct
+ 	return ret;
+ }
+ 
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,7,0))|| defined(BUILD_OPENWRT)
++static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev,
++				      struct cfg80211_ap_update *info)
++{
++	int ret = 0;
++	_adapter *adapter = (_adapter *)rtw_netdev_priv(ndev);
++
++	DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
++
++	ret = rtw_add_beacon(adapter, info->beacon.head, info->beacon.head_len,
++			     info->beacon.tail, info->beacon.tail_len);
++#else
+ static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev,
+                                       struct cfg80211_beacon_data *info)
+ {
+@@ -4029,6 +4041,7 @@ static int cfg80211_rtw_change_beacon(st
+ 	DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
+ 
+ 	ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len);
++#endif
+ 
+ 	return ret;
+ }
diff --git a/package/libs/libbpf/Makefile b/package/libs/libbpf/Makefile
index 3b732e37bb..a6fe9831d7 100644
--- a/package/libs/libbpf/Makefile
+++ b/package/libs/libbpf/Makefile
@@ -8,11 +8,11 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=libbpf
-PKG_VERSION:=1.4.3
+PKG_VERSION:=1.4.5
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL:=https://github.com/libbpf/libbpf
-PKG_MIRROR_HASH:=53f2f290fced9663da309e9e03ddcb0b176a47d39d61639c74dbc555d6b979a8
+PKG_MIRROR_HASH:=09ad44597d170c12f9f710f7ac4bacfa2b01d110c45810ac0f16c6a3f5d51a0d
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_VERSION:=v$(PKG_VERSION)
 PKG_ABI_VERSION:=$(firstword $(subst .,$(space),$(PKG_VERSION)))
diff --git a/package/libs/libunistring/Makefile b/package/libs/libunistring/Makefile
index 9b41cc3ce3..f53b50a243 100644
--- a/package/libs/libunistring/Makefile
+++ b/package/libs/libunistring/Makefile
@@ -1,12 +1,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=libunistring
-PKG_VERSION:=1.1
+PKG_VERSION:=1.2
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@GNU/$(PKG_NAME)
-PKG_HASH:=827c1eb9cb6e7c738b171745dac0888aa58c5924df2e59239318383de0729b98
+PKG_HASH:=632bd65ed74a881ca8a0309a1001c428bd1cbd5cd7ddbf8cedcd2e65f4dcdc44
 
 PKG_BUILD_PARALLEL:=1
 PKG_INSTALL:=1
diff --git a/package/libs/ncurses/Makefile b/package/libs/ncurses/Makefile
index 4d8e685f35..0fcc388840 100644
--- a/package/libs/ncurses/Makefile
+++ b/package/libs/ncurses/Makefile
@@ -82,6 +82,7 @@ CONFIGURE_VARS += \
 HOST_CFLAGS += $(HOST_FPIC)
 
 HOST_CONFIGURE_ARGS += \
+	--enable-pc-files \
 	--without-cxx \
 	--without-cxx-binding \
 	--without-ada \
@@ -125,6 +126,7 @@ ifneq ($(HOST_OS),FreeBSD)
 		a/ansi \
 		a/alacritty \
 		d/dumb \
+		f/foot \
 		l/linux \
 		r/rxvt \
 		r/rxvt-unicode \
@@ -179,6 +181,8 @@ define Build/InstallDev
 	$(SED) 's,^\(prefix\|exec_prefix\)=.*,\1=$(STAGING_DIR)/usr,g' -e 's/$$$$INCS //g' \
 		$(2)/bin/ncursesw6-config
 	ln -sf $(STAGING_DIR)/host/bin/ncursesw6-config $(1)/usr/bin/ncursesw6-config
+	$(SED) 's,$(TOOLCHAIN_DIR),$(STAGING_DIR),g' \
+		$(1)/usr/lib/pkgconfig/ncursesw.pc
 endef
 
 define Host/Compile
diff --git a/package/libs/readline/Makefile b/package/libs/readline/Makefile
index 015a1ae2da..11b9e0172f 100644
--- a/package/libs/readline/Makefile
+++ b/package/libs/readline/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=readline
 PKG_VERSION:=8.2
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=@GNU/readline
@@ -48,9 +48,13 @@ endef
 HOST_CONFIGURE_ARGS += --disable-shared --with-pic
 CONFIGURE_ARGS += --with-curses --disable-install-examples
 
+HOST_CONFIGURE_VARS += \
+	bash_cv_termcap_lib=libncurses
+
 CONFIGURE_VARS += \
 	bash_cv_wcwidth_broken=no \
 	bash_cv_func_sigsetjmp=yes \
+	bash_cv_termcap_lib=libncursesw
 
 TARGET_CFLAGS += $(FPIC)
 HOST_CFLAGS += $(FPIC)
diff --git a/package/libs/readline/patches/010-ncursesw-first.patch b/package/libs/readline/patches/010-ncursesw-first.patch
new file mode 100644
index 0000000000..d66cc04622
--- /dev/null
+++ b/package/libs/readline/patches/010-ncursesw-first.patch
@@ -0,0 +1,20 @@
+--- a/configure
++++ b/configure
+@@ -7305,6 +7305,9 @@ TERMCAP_DEP=
+ elif test $bash_cv_termcap_lib = libncurses; then
+ TERMCAP_LIB=-lncurses
+ TERMCAP_DEP=
++elif test $bash_cv_termcap_lib = libncursesw; then
++TERMCAP_LIB=-lncursesw
++TERMCAP_DEP=
+ elif test $bash_cv_termcap_lib = libc; then
+ TERMCAP_LIB=
+ TERMCAP_DEP=
+@@ -7340,6 +7343,7 @@ case "$TERMCAP_LIB" in
+ -ltinfo)  TERMCAP_PKG_CONFIG_LIB=tinfo ;;
+ -lcurses) TERMCAP_PKG_CONFIG_LIB=ncurses ;;
+ -lncurses) TERMCAP_PKG_CONFIG_LIB=ncurses ;;
++-lncursesw) TERMCAP_PKG_CONFIG_LIB=ncursesw ;;
+ -ltermcap) TERMCAP_PKG_CONFIG_LIB=termcap ;;
+ *) TERMCAP_PKG_CONFIG_LIB=termcap ;;
+ esac
diff --git a/package/libs/wolfssl/Makefile b/package/libs/wolfssl/Makefile
index 60ba85e15f..bac4a8ef52 100644
--- a/package/libs/wolfssl/Makefile
+++ b/package/libs/wolfssl/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.7.0-stable
+PKG_VERSION:=5.7.2-stable
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
-PKG_HASH:=2de93e8af588ee856fe67a6d7fce23fc1b226b74d710b0e3946bc8061f6aa18f
+PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
 
 PKG_FIXUP:=libtool libtool-abiver
 PKG_INSTALL:=1
@@ -51,6 +51,8 @@ PKG_CONFIG_DEPENDS+=\
 
 include $(INCLUDE_DIR)/package.mk
 
+DISABLE_NLS:=
+
 define Package/libwolfssl/Default
   SECTION:=libs
   SUBMENU:=SSL
diff --git a/package/libs/wolfssl/patches/100-disable-hardening-check.patch b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
index 680d3588a6..174e657982 100644
--- a/package/libs/wolfssl/patches/100-disable-hardening-check.patch
+++ b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
@@ -1,6 +1,6 @@
 --- a/wolfssl/wolfcrypt/settings.h
 +++ b/wolfssl/wolfcrypt/settings.h
-@@ -2945,7 +2945,7 @@ extern void uITRON4_free(void *p) ;
+@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
  
  /* warning for not using harden build options (default with ./configure) */
  /* do not warn if big integer support is disabled */
diff --git a/package/network/config/netifd/Makefile b/package/network/config/netifd/Makefile
index d80c2eeed6..70833e3f36 100644
--- a/package/network/config/netifd/Makefile
+++ b/package/network/config/netifd/Makefile
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
-PKG_SOURCE_DATE:=2024-01-04
-PKG_SOURCE_VERSION:=f01345ec13b9b27ffd314d8689fb2d3f9c81a47d
-PKG_MIRROR_HASH:=b051aa94e6413f520b711372f8cae4574cad26cba880ff6ab2d415713d06e592
+PKG_SOURCE_DATE:=2024-08-01
+PKG_SOURCE_VERSION:=68c8a4f94cd3cfd654a52cbc8b57c5c9d99640dd
+PKG_MIRROR_HASH:=897481d6d4309b4a940b80cfe2392a0c0ccbef4d0024cb1a995b1f4780b69cde
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 
 PKG_LICENSE:=GPL-2.0
diff --git a/package/network/config/wifi-scripts/Makefile b/package/network/config/wifi-scripts/Makefile
index 8074f90105..ae41f74949 100644
--- a/package/network/config/wifi-scripts/Makefile
+++ b/package/network/config/wifi-scripts/Makefile
@@ -19,7 +19,7 @@ include $(INCLUDE_DIR)/package.mk
 define Package/wifi-scripts
   SECTION:=utils
   CATEGORY:=Base system
-  DEPENDS:=+netifd +ucode +ucode-mod-nl80211 +ucode-mod-ubus +ucode-mod-uci
+  DEPENDS:=+netifd +ucode +ucode-mod-nl80211 +ucode-mod-rtnl +ucode-mod-ubus +ucode-mod-uci
   TITLE:=Wi-Fi configuration scripts
   PKGARCH:=all
 endef
diff --git a/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh b/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh
index 763702e76b..40266db065 100644
--- a/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh
@@ -383,6 +383,9 @@ hostapd_common_add_bss_config() {
 	config_add_string fils_dhcp
 
 	config_add_int ocv
+
+	config_add_boolean apup
+	config_add_string apup_peer_ifname_prefix
 }
 
 hostapd_set_vlan_file() {
@@ -569,7 +572,7 @@ hostapd_set_bss_options() {
 		ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \
 		multicast_to_unicast_all proxy_arp per_sta_vif \
 		eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
-		vendor_elements fils ocv
+		vendor_elements fils ocv apup
 
 	set_default fils 0
 	set_default isolate 0
@@ -593,6 +596,7 @@ hostapd_set_bss_options() {
 	set_default airtime_bss_weight 0
 	set_default airtime_bss_limit 0
 	set_default eap_server 0
+	set_default apup 0
 
 	/usr/sbin/hostapd -vfils || fils=0
 
@@ -1163,6 +1167,16 @@ hostapd_set_bss_options() {
 		append bss_conf "per_sta_vif=$per_sta_vif" "$N"
 	fi
 
+	if [ "$apup" -gt 0 ]; then
+		append bss_conf "apup=$apup" "$N"
+
+		local apup_peer_ifname_prefix
+		json_get_vars apup_peer_ifname_prefix
+		if [ -n "$apup_peer_ifname_prefix" ] ; then
+			append bss_conf "apup_peer_ifname_prefix=$apup_peer_ifname_prefix" "$N"
+		fi
+	fi
+
 	json_get_values opts hostapd_bss_options
 	for val in $opts; do
 		append bss_conf "$val" "$N"
diff --git a/package/network/config/xfrm/Makefile b/package/network/config/xfrm/Makefile
index 777f20c77c..68f81df65b 100644
--- a/package/network/config/xfrm/Makefile
+++ b/package/network/config/xfrm/Makefile
@@ -2,7 +2,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=xfrm
-PKG_RELEASE:=4
+PKG_RELEASE:=5
 PKG_LICENSE:=GPL-2.0
 
 include $(INCLUDE_DIR)/package.mk
diff --git a/package/network/config/xfrm/files/xfrm.sh b/package/network/config/xfrm/files/xfrm.sh
index bdebd4b9c3..5fa33bffb0 100755
--- a/package/network/config/xfrm/files/xfrm.sh
+++ b/package/network/config/xfrm/files/xfrm.sh
@@ -14,27 +14,22 @@ proto_xfrm_setup() {
 	local tunlink ifid mtu zone multicast
 	json_get_vars tunlink ifid mtu zone multicast
 
-	[ -z "$tunlink" ] && {
-		proto_notify_error "$cfg" NO_TUNLINK
-		proto_block_restart "$cfg"
-		exit
-	}
-
 	[ -z "$ifid" ] && {
 		proto_notify_error "$cfg" NO_IFID
 		proto_block_restart "$cfg"
 		exit
 	}
 
-	( proto_add_host_dependency "$cfg" '' "$tunlink" )
-
 	proto_init_update "$cfg" 1
 
 	proto_add_tunnel
 	json_add_string mode "$mode"
 	json_add_int mtu "${mtu:-1280}"
 
-	json_add_string link "$tunlink"
+	[ -n "$tunlink" ] && {
+		( proto_add_host_dependency "$cfg" '' "$tunlink" )
+		json_add_string link "$tunlink"
+	}
 
 	json_add_boolean multicast "${multicast:-1}"
 
diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile
index 8cedef976b..b62592b724 100644
--- a/package/network/services/hostapd/Makefile
+++ b/package/network/services/hostapd/Makefile
@@ -5,7 +5,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=hostapd
-PKG_RELEASE:=2
+PKG_RELEASE:=3
 
 PKG_SOURCE_URL:=https://w1.fi/hostap.git
 PKG_SOURCE_PROTO:=git
@@ -87,7 +87,7 @@ DRIVER_MAKEOPTS= \
 	CONFIG_IEEE80211AC=$(HOSTAPD_IEEE80211AC) \
 	CONFIG_IEEE80211AX=$(HOSTAPD_IEEE80211AX) \
 	CONFIG_MBO=$(CONFIG_WPA_MBO_SUPPORT) \
-	CONFIG_UCODE=y
+	CONFIG_UCODE=y CONFIG_APUP=y
 
 ifeq ($(SSL_VARIANT),openssl)
   DRIVER_MAKEOPTS += CONFIG_TLS=openssl CONFIG_SAE=y
diff --git a/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch b/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch
new file mode 100644
index 0000000000..b6e4ef9571
--- /dev/null
+++ b/package/network/services/hostapd/patches/780-Implement-APuP-Access-Point-Micro-Peering.patch
@@ -0,0 +1,460 @@
+From 40041ecea334c0106c0e840a32aef92b0cbb004b Mon Sep 17 00:00:00 2001
+From: Gioacchino Mazzurco <gio@polymathes.cc>
+Date: Mon, 6 May 2024 13:53:48 +0200
+Subject: [PATCH 1/3] Implement APuP Access Point Micro Peering
+
+Access Point Micro Peering is a simpler and hopefully more useful successor to
+Ad Hoc, Wireless Distribution System, 802.11s mesh mode, Multi-AP and EasyMesh.
+When enabled almost plain APs communicate between them via 4-address mode,
+like in WDS but all of them are AP, so they can eventually communicate also with
+plain stations and more AP nodes in sight, without more trickery.
+APuP has low hardware requirements, just AP mode support + 4-address mode, and
+no more unnecessary complications, like hardcoded bridging or routing algorithm
+in WiFi stack.
+For each AP in sight an interface is created, and then it can be used as
+convenient in each case, bridging, routing etc.
+Those interfaces could be simply bridged in a trivial topology (which happens
+automatically if wds_bridge is not an empty string), or feeded to a
+routing daemon.
+
+Signed-off-by: Gioacchino Mazzurco <gio@polymathes.cc>
+---
+ hostapd/Makefile             |   5 ++
+ hostapd/config_file.c        |   9 +++
+ src/ap/ap_config.h           |  29 +++++++
+ src/ap/ap_drv_ops.c          |  26 ++++++
+ src/ap/ap_drv_ops.h          |   3 +
+ src/ap/apup.c                | 152 +++++++++++++++++++++++++++++++++++
+ src/ap/apup.h                |  24 ++++++
+ src/ap/ieee802_11.c          |  14 +++-
+ src/ap/ieee802_11.h          |   2 +
+ src/drivers/driver.h         |   2 +-
+ src/drivers/driver_nl80211.c |  14 +---
+ 11 files changed, 264 insertions(+), 16 deletions(-)
+ create mode 100644 src/ap/apup.c
+ create mode 100644 src/ap/apup.h
+
+diff --git a/hostapd/Makefile b/hostapd/Makefile
+index 73048c1297..c890a7f29c 100644
+--- a/hostapd/Makefile
++++ b/hostapd/Makefile
+@@ -1415,6 +1415,11 @@ ifdef CONFIG_NO_TKIP
+ CFLAGS += -DCONFIG_NO_TKIP
+ endif
+ 
++ifdef CONFIG_APUP
++CFLAGS += -DCONFIG_APUP
++OBJS += ../src/ap/apup.o
++endif
++
+ $(DESTDIR)$(BINDIR)/%: %
+ 	install -D $(<) $(@)
+ 
+diff --git a/hostapd/config_file.c b/hostapd/config_file.c
+index bba5b19164..ef906199ec 100644
+--- a/hostapd/config_file.c
++++ b/hostapd/config_file.c
+@@ -5058,6 +5058,15 @@ static int hostapd_config_fill(struct hostapd_config *conf,
+ 		bss->mld_indicate_disabled = atoi(pos);
+ #endif /* CONFIG_TESTING_OPTIONS */
+ #endif /* CONFIG_IEEE80211BE */
++#ifdef CONFIG_APUP
++	} else if (os_strcmp(buf, "apup") == 0) {
++		bss->apup = !!atoi(pos);
++		if (bss->apup)
++			bss->wds_sta = 1;
++	} else if (os_strcmp(buf, "apup_peer_ifname_prefix") == 0) {
++		os_strlcpy(bss->apup_peer_ifname_prefix,
++		           pos, sizeof(bss->apup_peer_ifname_prefix));
++#endif // def CONFIG_APUP
+ 	} else {
+ 		wpa_printf(MSG_ERROR,
+ 			   "Line %d: unknown configuration item '%s'",
+diff --git a/src/ap/ap_config.h b/src/ap/ap_config.h
+index 0e52a9990d..9102db5ed0 100644
+--- a/src/ap/ap_config.h
++++ b/src/ap/ap_config.h
+@@ -970,6 +970,35 @@ struct hostapd_bss_config {
+ 	bool mld_indicate_disabled;
+ #endif /* CONFIG_TESTING_OPTIONS */
+ #endif /* CONFIG_IEEE80211BE */
++
++#ifdef CONFIG_APUP
++	/**
++	 * Access Point Micro Peering
++	 * A simpler and more useful successor to Ad Hoc,
++	 * Wireless Distribution System, 802.11s mesh mode, Multi-AP and EasyMesh.
++	 *
++	 * Almost plain APs communicate between them via 4-address mode, like in WDS
++	 * but all of them are AP, so they can eventually communicate also with
++	 * plain stations and more AP nodes in sight.
++	 * Low hardware requirements, just AP mode support + 4-address mode, and no
++	 * more unnecessary complications, like hardcoded bridging or routing
++	 * algorithm in WiFi stack.
++	 * For each AP in sight an interface is created, and then it can be used as
++	 * convenient in each case, bridging, routing etc.
++	 */
++	bool apup;
++
++	/**
++	 * In 4-address mode each peer AP in sight is associated to its own
++	 * interface so we have more flexibility in "user-space".
++	 * Those interfaces could be simply bridged in a trivial topology (which
++	 * happens automatically if wds_bridge is not an empty string), or feeded to
++	 * a routing daemon.
++	 *
++	 * If not defined interface names are generated following the WDS convention.
++	 */
++	char apup_peer_ifname_prefix[IFNAMSIZ + 1];
++#endif /* CONFIG_APUP */
+ };
+ 
+ /**
+diff --git a/src/ap/ap_drv_ops.c b/src/ap/ap_drv_ops.c
+index e7396d9aea..05460e3d73 100644
+--- a/src/ap/ap_drv_ops.c
++++ b/src/ap/ap_drv_ops.c
+@@ -382,9 +382,35 @@ int hostapd_set_wds_sta(struct hostapd_data *hapd, char *ifname_wds,
+ 			const u8 *addr, int aid, int val)
+ {
+ 	const char *bridge = NULL;
++	char ifName[IFNAMSIZ + 1];
++
++	int mRet = 0;
+ 
+ 	if (hapd->driver == NULL || hapd->driver->set_wds_sta == NULL)
+ 		return -1;
++
++#ifdef CONFIG_APUP
++	if (hapd->conf->apup && hapd->conf->apup_peer_ifname_prefix[0]) {
++		mRet = os_snprintf(
++		            ifName, sizeof(ifName), "%s%d",
++		            hapd->conf->apup_peer_ifname_prefix, aid);
++	}
++	else
++#endif // def CONFIG_APUP
++		mRet = os_snprintf(
++		            ifName, sizeof(ifName), "%s.sta%d",
++		            hapd->conf->iface, aid);
++
++	if (mRet >= (int) sizeof(ifName))
++		wpa_printf(MSG_WARNING,
++		           "nl80211: WDS interface name was truncated");
++	else if (mRet < 0)
++		return mRet;
++
++	// Pass back to the caller the resulting interface name
++	if (ifname_wds)
++		os_strlcpy(ifname_wds, ifName, IFNAMSIZ + 1);
++
+ 	if (hapd->conf->wds_bridge[0])
+ 		bridge = hapd->conf->wds_bridge;
+ 	return hapd->driver->set_wds_sta(hapd->drv_priv, addr, aid, val,
+diff --git a/src/ap/ap_drv_ops.h b/src/ap/ap_drv_ops.h
+index fa89d2398e..ab4dc8eb16 100644
+--- a/src/ap/ap_drv_ops.h
++++ b/src/ap/ap_drv_ops.h
+@@ -33,6 +33,9 @@ int hostapd_set_drv_ieee8021x(struct hostapd_data *hapd, const char *ifname,
+ 			      int enabled);
+ int hostapd_vlan_if_add(struct hostapd_data *hapd, const char *ifname);
+ int hostapd_vlan_if_remove(struct hostapd_data *hapd, const char *ifname);
++
++/** @param val as per nl80211 driver implementation, 1 means add 0 means remove
++ */
+ int hostapd_set_wds_sta(struct hostapd_data *hapd, char *ifname_wds,
+ 			const u8 *addr, int aid, int val);
+ 
+diff --git a/src/ap/apup.c b/src/ap/apup.c
+new file mode 100644
+index 0000000000..3575f1b6c6
+--- /dev/null
++++ b/src/ap/apup.c
+@@ -0,0 +1,152 @@
++/*
++ * hostapd / APuP Access Point Micro Peering
++ *
++ * Copyright (C) 2023-2024  Gioacchino Mazzurco <gio@polymathes.cc>
++ *
++ * This software may be distributed under the terms of the BSD license.
++ * See README for more details.
++ */
++
++/* Be extremely careful altering include order, move just one in the wrong place
++ * and you will start getting a bunch of error of undefined bool, size_t etc. */
++
++#include "utils/includes.h"
++#include "utils/common.h"
++#include "utils/os.h"
++
++#include "apup.h"
++
++#include "drivers/driver.h"
++#include "wpa_auth.h"
++#include "ap_mlme.h"
++#include "ieee802_11.h"
++#include "ap_drv_ops.h"
++#include "sta_info.h"
++
++void apup_process_beacon(struct hostapd_data *hapd,
++              const struct ieee80211_mgmt *mgmt, size_t len,
++              const struct ieee802_11_elems *elems )
++{
++	if (!os_memcmp(hapd->own_addr, mgmt->bssid, ETH_ALEN))
++	{
++		wpa_printf(MSG_WARNING,
++		           "apup_process_beacon(...) own beacon elems.ssid %.*s",
++		           (int) elems->ssid_len, elems->ssid);
++		return;
++	}
++
++	if (elems->ssid_len != hapd->conf->ssid.ssid_len ||
++	        os_memcmp(elems->ssid, hapd->conf->ssid.ssid, elems->ssid_len))
++		return;
++
++	struct sta_info* sta_ret = ap_get_sta(hapd, mgmt->bssid);
++	if (sta_ret)
++		return;
++
++	sta_ret = ap_sta_add(hapd, mgmt->bssid);
++
++	/* TODO: this has been added just to making compiler happy after breaking
++	 * changes introduced in 11a607d121df512e010148bedcb4263a03329dc7 to support
++	 * IEEE80211BE Multi Link Operation. Look at that commit with more time and
++	 * understand what could be a proper implementation in this context too
++	 */
++	const u8 *mld_link_addr = NULL;
++	bool mld_link_sta = false;
++
++	/* First add the station without more information */
++	int aRet = hostapd_sta_add(
++	            hapd, mgmt->bssid, sta_ret->aid, 0,
++	            NULL, 0, 0, NULL, NULL, NULL, 0, NULL, 0, NULL,
++	            sta_ret->flags, 0, 0, 0,
++	            0, // 0 add, 1 set
++	            mld_link_addr, mld_link_sta);
++
++	sta_ret->flags |= WLAN_STA_AUTH;
++	wpa_auth_sm_event(sta_ret->wpa_sm, WPA_AUTH);
++
++	/* TODO: Investigate if supporting WPA or other encryption method is
++	 * possible */
++	sta_ret->auth_alg = WLAN_AUTH_OPEN;
++	mlme_authenticate_indication(hapd, sta_ret);
++
++	sta_ret->capability = le_to_host16(mgmt->u.beacon.capab_info);
++
++	if (sta_ret->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
++		sta_ret->flags |= WLAN_STA_SHORT_PREAMBLE;
++	else
++		sta_ret->flags &= ~WLAN_STA_SHORT_PREAMBLE;
++
++	hostapd_copy_supp_rates(hapd, sta_ret, elems);
++
++	/* Whithout this flag copy_sta_[v]ht_capab will disable [V]HT
++	 * capabilities even if available */
++	if (elems->ht_capabilities || elems->vht_capabilities)
++		sta_ret->flags |= WLAN_STA_WMM;
++
++	copy_sta_ht_capab(hapd, sta_ret, elems->ht_capabilities);
++#ifdef CONFIG_IEEE80211AC
++	copy_sta_vht_capab(hapd, sta_ret, elems->vht_capabilities);
++	copy_sta_vht_oper(hapd, sta_ret, elems->vht_operation);
++	copy_sta_vendor_vht(hapd, sta_ret, elems->vendor_vht, elems->vendor_vht_len);
++#endif // def CONFIG_IEEE80211AC
++#ifdef CONFIG_IEEE80211AX
++	copy_sta_he_capab(hapd, sta_ret, IEEE80211_MODE_AP,
++	                  elems->he_capabilities, elems->he_capabilities_len);
++	copy_sta_he_6ghz_capab(hapd, sta_ret,  elems->he_6ghz_band_cap);
++#endif // def CONFIG_IEEE80211AX
++#ifdef CONFIG_IEEE80211BE
++	copy_sta_eht_capab(hapd, sta_ret,
++	                   IEEE80211_MODE_AP, // TODO: Make sure is the right value
++	                   elems->he_capabilities, elems->he_capabilities_len,
++	                   elems->eht_capabilities, elems->eht_capabilities_len);
++#endif //def CONFIG_IEEE80211BE
++
++	update_ht_state(hapd, sta_ret);
++
++	if (hostapd_get_aid(hapd, sta_ret) < 0)
++	{
++		wpa_printf(MSG_INFO, "apup_process_beacon(...) No room for more AIDs");
++		return;
++	}
++
++	sta_ret->flags |= WLAN_STA_ASSOC_REQ_OK;
++
++	/* Make sure that the previously registered inactivity timer will not
++	 * remove the STA immediately. */
++	sta_ret->timeout_next = STA_NULLFUNC;
++
++	sta_ret->flags |= WLAN_STA_AUTH | WLAN_STA_ASSOC;
++
++	/* Then set the paramethers */
++	int sRet = hostapd_sta_add(
++	            hapd, mgmt->bssid, sta_ret->aid,
++	            sta_ret->capability,
++	            sta_ret->supported_rates, sta_ret->supported_rates_len,
++	            0, // u16 listen_interval TODO ?
++	            sta_ret->ht_capabilities,
++	            sta_ret->vht_capabilities,
++	            sta_ret->he_capab, sta_ret->he_capab_len,
++	            sta_ret->eht_capab, sta_ret->eht_capab_len,
++	            sta_ret->he_6ghz_capab,
++	            sta_ret->flags,
++	            0, // u8 qosinfo
++	            sta_ret->vht_opmode,
++	            0, // int supp_p2p_ps
++	            1, // 0 add, 1 set
++	            mld_link_addr, mld_link_sta);
++
++	ap_sta_set_authorized(hapd, sta_ret, 1);
++	hostapd_set_sta_flags(hapd, sta_ret);
++
++	char mIfname[IFNAMSIZ + 1];
++	os_memset(mIfname, 0, IFNAMSIZ + 1);
++
++	// last param 1 means add 0 means remove
++	int mRet = hostapd_set_wds_sta(
++	            hapd, mIfname, mgmt->bssid, sta_ret->aid, 1);
++
++	wpa_printf(MSG_INFO,
++	           "apup_process_beacon(...) Added APuP peer at %s with flags: %d,"
++	           " capabilities %d",
++	           mIfname, sta_ret->flags, sta_ret->capability);
++}
+diff --git a/src/ap/apup.h b/src/ap/apup.h
+new file mode 100644
+index 0000000000..a14a283bb4
+--- /dev/null
++++ b/src/ap/apup.h
+@@ -0,0 +1,24 @@
++/*
++ * hostapd / APuP Access Point Micro Peering
++ *
++ * Copyright (C) 2023-2024  Gioacchino Mazzurco <gio@polymathes.cc>
++ *
++ * This software may be distributed under the terms of the BSD license.
++ * See README for more details.
++ */
++
++/* Be extremely careful altering include order, move just one in the wrong place
++ * and you will start getting a bunch of error of undefined bool, size_t etc. */
++
++#include "utils/includes.h"
++#include "utils/common.h"
++
++#include "hostapd.h"
++#include "common/ieee802_11_defs.h"
++
++/** When beacons from other Access Point are received, if the SSID is matching
++ * add them as APuP peers (aka WDS STA to our own AP) the same happens on the
++ * peer when receiving our beacons */
++void apup_process_beacon(struct hostapd_data *hapd,
++              const struct ieee80211_mgmt *mgmt, size_t len,
++              const struct ieee802_11_elems *elems );
+diff --git a/src/ap/ieee802_11.c b/src/ap/ieee802_11.c
+index 1c4dd22da1..09254f18f2 100644
+--- a/src/ap/ieee802_11.c
++++ b/src/ap/ieee802_11.c
+@@ -59,6 +59,9 @@
+ #include "nan_usd_ap.h"
+ #include "pasn/pasn_common.h"
+ 
++#ifdef CONFIG_APUP
++#	include "apup.h"
++#endif // def CONFIG_APUP
+ 
+ #ifdef CONFIG_FILS
+ static struct wpabuf *
+@@ -3469,8 +3472,8 @@ static u16 check_multi_ap(struct hostapd_data *hapd, struct sta_info *sta,
+ }
+ 
+ 
+-static u16 copy_supp_rates(struct hostapd_data *hapd, struct sta_info *sta,
+-			   struct ieee802_11_elems *elems)
++u16 hostapd_copy_supp_rates(struct hostapd_data *hapd, struct sta_info *sta,
++			   const struct ieee802_11_elems *elems)
+ {
+ 	/* Supported rates not used in IEEE 802.11ad/DMG */
+ 	if (hapd->iface->current_mode &&
+@@ -3855,7 +3858,7 @@ static int __check_assoc_ies(struct hostapd_data *hapd, struct sta_info *sta,
+ 			       elems->ext_capab_len);
+ 	if (resp != WLAN_STATUS_SUCCESS)
+ 		return resp;
+-	resp = copy_supp_rates(hapd, sta, elems);
++	resp = hostapd_copy_supp_rates(hapd, sta, elems);
+ 	if (resp != WLAN_STATUS_SUCCESS)
+ 		return resp;
+ 
+@@ -5927,6 +5930,11 @@ static void handle_beacon(struct hostapd_data *hapd,
+ 				      0);
+ 
+ 	ap_list_process_beacon(hapd->iface, mgmt, &elems, fi);
++
++#ifdef CONFIG_APUP
++	if (hapd->conf->apup)
++		apup_process_beacon(hapd, mgmt, len, &elems);
++#endif // def CONFIG_APUP
+ }
+ 
+ 
+diff --git a/src/ap/ieee802_11.h b/src/ap/ieee802_11.h
+index a35486d464..0861bef82e 100644
+--- a/src/ap/ieee802_11.h
++++ b/src/ap/ieee802_11.h
+@@ -108,6 +108,8 @@ int hostapd_process_ml_assoc_req_addr(struct hostapd_data *hapd,
+ 				      const u8 *basic_mle, size_t basic_mle_len,
+ 				      u8 *mld_addr);
+ int hostapd_get_aid(struct hostapd_data *hapd, struct sta_info *sta);
++u16 hostapd_copy_supp_rates(struct hostapd_data *hapd, struct sta_info *sta,
++		      const struct ieee802_11_elems *elems);
+ u16 copy_sta_ht_capab(struct hostapd_data *hapd, struct sta_info *sta,
+ 		      const u8 *ht_capab);
+ u16 copy_sta_vendor_vht(struct hostapd_data *hapd, struct sta_info *sta,
+diff --git a/src/drivers/driver.h b/src/drivers/driver.h
+index 1bbb9672cd..8d26561e97 100644
+--- a/src/drivers/driver.h
++++ b/src/drivers/driver.h
+@@ -3976,7 +3976,7 @@ struct wpa_driver_ops {
+ 	 * Returns: 0 on success, -1 on failure
+ 	 */
+ 	int (*set_wds_sta)(void *priv, const u8 *addr, int aid, int val,
+-			   const char *bridge_ifname, char *ifname_wds);
++			   const char *bridge_ifname, const char *ifname_wds);
+ 
+ 	/**
+ 	 * send_action - Transmit an Action frame
+diff --git a/src/drivers/driver_nl80211.c b/src/drivers/driver_nl80211.c
+index aeb1e6beef..b6e4ddd86d 100644
+--- a/src/drivers/driver_nl80211.c
++++ b/src/drivers/driver_nl80211.c
+@@ -8415,24 +8415,14 @@ static int have_ifidx(struct wpa_driver_nl80211_data *drv, int ifidx,
+ 
+ 
+ static int i802_set_wds_sta(void *priv, const u8 *addr, int aid, int val,
+-			    const char *bridge_ifname, char *ifname_wds)
++			    const char *bridge_ifname, const char *ifname_wds)
+ {
+ 	struct i802_bss *bss = priv;
+ 	struct wpa_driver_nl80211_data *drv = bss->drv;
+-	char name[IFNAMSIZ + 1];
++	const char *name = ifname_wds; // Kept to reduce changes to the minimum
+ 	union wpa_event_data event;
+ 	int ret;
+ 
+-	ret = os_snprintf(name, sizeof(name), "%s.sta%d", bss->ifname, aid);
+-	if (ret >= (int) sizeof(name))
+-		wpa_printf(MSG_WARNING,
+-			   "nl80211: WDS interface name was truncated");
+-	else if (ret < 0)
+-		return ret;
+-
+-	if (ifname_wds)
+-		os_strlcpy(ifname_wds, name, IFNAMSIZ + 1);
+-
+ 	wpa_printf(MSG_DEBUG, "nl80211: Set WDS STA addr=" MACSTR
+ 		   " aid=%d val=%d name=%s", MAC2STR(addr), aid, val, name);
+ 	if (val) {
+-- 
+2.44.2
+
diff --git a/package/network/services/hostapd/patches/790-APuP-add-ubus-notification-when-a-peer-comes-up.patch b/package/network/services/hostapd/patches/790-APuP-add-ubus-notification-when-a-peer-comes-up.patch
new file mode 100644
index 0000000000..3746dde00a
--- /dev/null
+++ b/package/network/services/hostapd/patches/790-APuP-add-ubus-notification-when-a-peer-comes-up.patch
@@ -0,0 +1,81 @@
+From 9a265f70b5e4e048c568564aed5f9ac4a4fd76b0 Mon Sep 17 00:00:00 2001
+From: Gioacchino Mazzurco <gio@polymathes.cc>
+Date: Tue, 7 May 2024 10:37:54 +0200
+Subject: [PATCH 2/3] APuP add ubus notification when a peer comes up
+
+The notification ones get looks like
+{ "apup-newpeer": {"address":"02:0a:ab:45:5a:ab","ifname":"wlan0.peer1"} }
+
+Signed-off-by: Gioacchino Mazzurco <gio@polymathes.cc>
+---
+ src/ap/apup.c |  8 ++++++++
+ src/ap/ubus.c | 15 +++++++++++++++
+ src/ap/ubus.h |  5 +++++
+ 3 files changed, 28 insertions(+)
+
+diff --git a/src/ap/apup.c b/src/ap/apup.c
+index 3575f1b6c6..3a3991f4d6 100644
+--- a/src/ap/apup.c
++++ b/src/ap/apup.c
+@@ -23,6 +23,10 @@
+ #include "ap_drv_ops.h"
+ #include "sta_info.h"
+ 
++#ifdef UBUS_SUPPORT
++#	include "ubus.h"
++#endif
++
+ void apup_process_beacon(struct hostapd_data *hapd,
+               const struct ieee80211_mgmt *mgmt, size_t len,
+               const struct ieee802_11_elems *elems )
+@@ -149,4 +153,8 @@ void apup_process_beacon(struct hostapd_data *hapd,
+ 	           "apup_process_beacon(...) Added APuP peer at %s with flags: %d,"
+ 	           " capabilities %d",
+ 	           mIfname, sta_ret->flags, sta_ret->capability);
++
++#ifdef UBUS_SUPPORT
++	hostapd_ubus_notify_apup_newpeer(hapd, mgmt->bssid, mIfname);
++#endif
+ }
+diff --git a/src/ap/ubus.c b/src/ap/ubus.c
+index 8689494bcf..f21516fc3c 100644
+--- a/src/ap/ubus.c
++++ b/src/ap/ubus.c
+@@ -2004,3 +2004,18 @@ int hostapd_ubus_notify_bss_transition_query(
+ 	return ureq.resp;
+ #endif
+ }
++
++#ifdef CONFIG_APUP
++void hostapd_ubus_notify_apup_newpeer(
++	struct hostapd_data *hapd, const u8 *addr, const char *ifname)
++{
++	if (!hapd->ubus.obj.has_subscribers)
++		return;
++
++	blob_buf_init(&b, 0);
++	blobmsg_add_macaddr(&b, "address", addr);
++	blobmsg_add_string(&b, "ifname", ifname);
++
++	ubus_notify(ctx, &hapd->ubus.obj, "apup-newpeer", b.head, -1);
++}
++#endif // def CONFIG_APUP
+diff --git a/src/ap/ubus.h b/src/ap/ubus.h
+index 22767d67ee..1c65e4dcb9 100644
+--- a/src/ap/ubus.h
++++ b/src/ap/ubus.h
+@@ -71,6 +71,11 @@ int hostapd_ubus_notify_bss_transition_query(
+ void hostapd_ubus_notify_authorized(struct hostapd_data *hapd, struct sta_info *sta,
+ 				    const char *auth_alg);
+ 
++#ifdef CONFIG_APUP
++void hostapd_ubus_notify_apup_newpeer(
++	struct hostapd_data *hapd, const u8 *addr, const char *ifname);
++#endif // def CONFIG_APUP
++
+ #else
+ 
+ struct hostapd_ubus_bss {};
+-- 
+2.44.2
+
diff --git a/package/network/services/hostapd/patches/800-APuP-add-ucode-hook-for-when-a-peer-comes-up.patch b/package/network/services/hostapd/patches/800-APuP-add-ucode-hook-for-when-a-peer-comes-up.patch
new file mode 100644
index 0000000000..c3e3633060
--- /dev/null
+++ b/package/network/services/hostapd/patches/800-APuP-add-ucode-hook-for-when-a-peer-comes-up.patch
@@ -0,0 +1,79 @@
+From aaeb60b39a72774c651187208ec47efd0daeb75b Mon Sep 17 00:00:00 2001
+From: Gioacchino Mazzurco <gio@polymathes.cc>
+Date: Tue, 7 May 2024 11:54:23 +0200
+Subject: [PATCH 3/3] APuP add ucode hook for when a peer comes up
+
+Signed-off-by: Gioacchino Mazzurco <gio@polymathes.cc>
+---
+ src/ap/apup.c  |  8 ++++++++
+ src/ap/ucode.c | 17 +++++++++++++++++
+ src/ap/ucode.h |  4 ++++
+ 3 files changed, 29 insertions(+)
+
+diff --git a/src/ap/apup.c b/src/ap/apup.c
+index 3a3991f4d6..f736ddc8e3 100644
+--- a/src/ap/apup.c
++++ b/src/ap/apup.c
+@@ -27,6 +27,10 @@
+ #	include "ubus.h"
+ #endif
+ 
++#ifdef UCODE_SUPPORT
++#	include "ucode.h"
++#endif
++
+ void apup_process_beacon(struct hostapd_data *hapd,
+               const struct ieee80211_mgmt *mgmt, size_t len,
+               const struct ieee802_11_elems *elems )
+@@ -157,4 +161,8 @@ void apup_process_beacon(struct hostapd_data *hapd,
+ #ifdef UBUS_SUPPORT
+ 	hostapd_ubus_notify_apup_newpeer(hapd, mgmt->bssid, mIfname);
+ #endif
++
++#ifdef UCODE_SUPPORT
++	hostapd_ucode_apup_newpeer(hapd, mIfname);
++#endif
+ }
+diff --git a/src/ap/ucode.c b/src/ap/ucode.c
+index d344190208..391002feae 100644
+--- a/src/ap/ucode.c
++++ b/src/ap/ucode.c
+@@ -811,3 +811,20 @@ void hostapd_ucode_free_bss(struct hostapd_data *hapd)
+ 	ucv_put(wpa_ucode_call(2));
+ 	ucv_gc(vm);
+ }
++
++#ifdef CONFIG_APUP
++void hostapd_ucode_apup_newpeer(struct hostapd_data *hapd, const char *ifname)
++{
++	uc_value_t *val;
++
++	if (wpa_ucode_call_prepare("apup_newpeer"))
++		return;
++
++	val = hostapd_ucode_bss_get_uval(hapd);
++	uc_value_push(ucv_get(ucv_string_new(hapd->conf->iface))); // BSS ifname
++	uc_value_push(ucv_get(val));
++	uc_value_push(ucv_get(ucv_string_new(ifname))); // APuP peer ifname
++	ucv_put(wpa_ucode_call(2));
++	ucv_gc(vm);
++}
++#endif // def CONFIG_APUP
+diff --git a/src/ap/ucode.h b/src/ap/ucode.h
+index d00b787169..c9bdde6516 100644
+--- a/src/ap/ucode.h
++++ b/src/ap/ucode.h
+@@ -27,6 +27,10 @@ void hostapd_ucode_add_bss(struct hostapd_data *hapd);
+ void hostapd_ucode_free_bss(struct hostapd_data *hapd);
+ void hostapd_ucode_reload_bss(struct hostapd_data *hapd);
+ 
++#ifdef CONFIG_APUP
++void hostapd_ucode_apup_newpeer(struct hostapd_data *hapd, const char *ifname);
++#endif // def CONFIG_APUP
++
+ #else
+ 
+ static inline int hostapd_ucode_init(struct hapd_interfaces *ifaces)
+-- 
+2.44.2
+
diff --git a/package/network/services/hostapd/patches/800-SAE-Check-for-invalid-Rejected-Groups-element-length.patch b/package/network/services/hostapd/patches/800-SAE-Check-for-invalid-Rejected-Groups-element-length.patch
new file mode 100644
index 0000000000..97402887bf
--- /dev/null
+++ b/package/network/services/hostapd/patches/800-SAE-Check-for-invalid-Rejected-Groups-element-length.patch
@@ -0,0 +1,43 @@
+From 364c2da8741f0979dae497551e70b94c0e6c8636 Mon Sep 17 00:00:00 2001
+From: Jouni Malinen <j@w1.fi>
+Date: Sun, 7 Jul 2024 11:46:49 +0300
+Subject: [PATCH] SAE: Check for invalid Rejected Groups element length
+ explicitly
+
+Instead of practically ignoring an odd octet at the end of the element,
+check for such invalid case explicitly. This is needed to avoid a
+potential group downgrade attack.
+
+Signed-off-by: Jouni Malinen <j@w1.fi>
+---
+ src/ap/ieee802_11.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+--- a/src/ap/ieee802_11.c
++++ b/src/ap/ieee802_11.c
+@@ -1229,7 +1229,7 @@ static int check_sae_rejected_groups(str
+ 				     struct sae_data *sae)
+ {
+ 	const struct wpabuf *groups;
+-	size_t i, count;
++	size_t i, count, len;
+ 	const u8 *pos;
+ 
+ 	if (!sae->tmp)
+@@ -1239,7 +1239,15 @@ static int check_sae_rejected_groups(str
+ 		return 0;
+ 
+ 	pos = wpabuf_head(groups);
+-	count = wpabuf_len(groups) / 2;
++	len = wpabuf_len(groups);
++	if (len & 1) {
++		wpa_printf(MSG_DEBUG,
++			   "SAE: Invalid length of the Rejected Groups element payload: %zu",
++			   len);
++		return 1;
++	}
++
++	count = len / 2;
+ 	for (i = 0; i < count; i++) {
+ 		int enabled;
+ 		u16 group;
diff --git a/package/network/services/hostapd/patches/801-SAE-Check-for-invalid-Rejected-Groups-element-length.patch b/package/network/services/hostapd/patches/801-SAE-Check-for-invalid-Rejected-Groups-element-length.patch
new file mode 100644
index 0000000000..8d88a4aa13
--- /dev/null
+++ b/package/network/services/hostapd/patches/801-SAE-Check-for-invalid-Rejected-Groups-element-length.patch
@@ -0,0 +1,42 @@
+From 593a7c2f8c93edd6b552f2d42e28164464b4e6ff Mon Sep 17 00:00:00 2001
+From: Jouni Malinen <j@w1.fi>
+Date: Tue, 9 Jul 2024 23:33:38 +0300
+Subject: [PATCH] SAE: Check for invalid Rejected Groups element length
+ explicitly on STA
+
+Instead of practically ignoring an odd octet at the end of the element,
+check for such invalid case explicitly. This is needed to avoid a
+potential group downgrade attack.
+
+Fixes: 444d76f74f65 ("SAE: Check that peer's rejected groups are not enabled")
+Signed-off-by: Jouni Malinen <j@w1.fi>
+---
+ wpa_supplicant/sme.c | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/wpa_supplicant/sme.c
++++ b/wpa_supplicant/sme.c
+@@ -1561,14 +1561,21 @@ static int sme_sae_is_group_enabled(stru
+ static int sme_check_sae_rejected_groups(struct wpa_supplicant *wpa_s,
+ 					 const struct wpabuf *groups)
+ {
+-	size_t i, count;
++	size_t i, count, len;
+ 	const u8 *pos;
+ 
+ 	if (!groups)
+ 		return 0;
+ 
+ 	pos = wpabuf_head(groups);
+-	count = wpabuf_len(groups) / 2;
++	len = wpabuf_len(groups);
++	if (len & 1) {
++		wpa_printf(MSG_DEBUG,
++			   "SAE: Invalid length of the Rejected Groups element payload: %zu",
++			   len);
++		return 1;
++	}
++	count = len / 2;
+ 	for (i = 0; i < count; i++) {
+ 		int enabled;
+ 		u16 group;
diff --git a/package/network/services/hostapd/patches/802-SAE-Reject-invalid-Rejected-Groups-element-in-the-pa.patch b/package/network/services/hostapd/patches/802-SAE-Reject-invalid-Rejected-Groups-element-in-the-pa.patch
new file mode 100644
index 0000000000..572a3f721f
--- /dev/null
+++ b/package/network/services/hostapd/patches/802-SAE-Reject-invalid-Rejected-Groups-element-in-the-pa.patch
@@ -0,0 +1,30 @@
+From 9716bf1160beb677e965d9e6475d6c9e162e8374 Mon Sep 17 00:00:00 2001
+From: Jouni Malinen <j@w1.fi>
+Date: Tue, 9 Jul 2024 23:34:34 +0300
+Subject: [PATCH] SAE: Reject invalid Rejected Groups element in the parser
+
+There is no need to depend on all uses (i.e., both hostapd and
+wpa_supplicant) to verify that the length of the Rejected Groups field
+in the Rejected Groups element is valid (i.e., a multiple of two octets)
+since the common parser can reject the message when detecting this.
+
+Signed-off-by: Jouni Malinen <j@w1.fi>
+---
+ src/common/sae.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/src/common/sae.c
++++ b/src/common/sae.c
+@@ -2120,6 +2120,12 @@ static int sae_parse_rejected_groups(str
+ 		return WLAN_STATUS_UNSPECIFIED_FAILURE;
+ 	epos++; /* skip ext ID */
+ 	len--;
++	if (len & 1) {
++		wpa_printf(MSG_DEBUG,
++			   "SAE: Invalid length of the Rejected Groups element payload: %u",
++			   len);
++		return WLAN_STATUS_UNSPECIFIED_FAILURE;
++	}
+ 
+ 	wpabuf_free(sae->tmp->peer_rejected_groups);
+ 	sae->tmp->peer_rejected_groups = wpabuf_alloc(len);
diff --git a/package/network/services/uhttpd/Makefile b/package/network/services/uhttpd/Makefile
index a373e62820..ea76fa65ea 100644
--- a/package/network/services/uhttpd/Makefile
+++ b/package/network/services/uhttpd/Makefile
@@ -8,7 +8,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=uhttpd
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uhttpd.git
diff --git a/package/network/services/uhttpd/files/uhttpd.config b/package/network/services/uhttpd/files/uhttpd.config
index a9b8ff3d15..ce76fe6b6b 100644
--- a/package/network/services/uhttpd/files/uhttpd.config
+++ b/package/network/services/uhttpd/files/uhttpd.config
@@ -123,8 +123,8 @@ config uhttpd main
 # Defaults for automatic certificate and key generation
 config cert defaults
 
-	# Validity time
-	option days		730
+	# Validity time, 397 days is maximum allowed by CA/Browser forum
+	option days		397
 
 	# key type: rsa or ec
 	option key_type		ec
diff --git a/package/network/services/uhttpd/files/uhttpd.init b/package/network/services/uhttpd/files/uhttpd.init
index c4d0025d69..c6e0b210c5 100755
--- a/package/network/services/uhttpd/files/uhttpd.init
+++ b/package/network/services/uhttpd/files/uhttpd.init
@@ -56,8 +56,9 @@ generate_keys() {
 	[ -x "$PX5G_BIN" ] && GENKEY_CMD="$PX5G_BIN selfsigned -der"
 	[ -n "$GENKEY_CMD" ] && {
 		$GENKEY_CMD \
-			-days ${days:-730} -newkey ${KEY_OPTS} -keyout "${UHTTPD_KEY}.new" -out "${UHTTPD_CERT}.new" \
-			-subj /C="${country:-ZZ}"/ST="${state:-Somewhere}"/L="${location:-Unknown}"/O="${organization:-OpenWrt$UNIQUEID}"/CN="${commonname:-OpenWrt}"
+			-days ${days:-397} -newkey ${KEY_OPTS} -keyout "${UHTTPD_KEY}.new" -out "${UHTTPD_CERT}.new" \
+			-subj /C="${country:-ZZ}"/ST="${state:-Somewhere}"/L="${location:-Unknown}"/O="${organization:-OpenWrt$UNIQUEID}"/CN="${commonname:-OpenWrt}" \
+			-addext extendedKeyUsage=serverAuth -addext subjectAltName=DNS:"${commonname:-OpenWrt}"
 		sync
 		mv "${UHTTPD_KEY}.new" "${UHTTPD_KEY}"
 		mv "${UHTTPD_CERT}.new" "${UHTTPD_CERT}"
@@ -203,6 +204,9 @@ start_instance()
 			append_arg "$cfg" cert "-C"
 			append_arg "$cfg" key  "-K"
 
+			procd_append_param file "$UHTTPD_CERT"
+			procd_append_param file "$UHTTPD_KEY"
+
 			for listen in $https; do
 				procd_append_param command -s "$listen"
 			done
diff --git a/package/network/utils/iwinfo/Makefile b/package/network/utils/iwinfo/Makefile
index 33661941a6..06005d3c6d 100644
--- a/package/network/utils/iwinfo/Makefile
+++ b/package/network/utils/iwinfo/Makefile
@@ -11,9 +11,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git
-PKG_SOURCE_DATE:=2024-03-23
-PKG_SOURCE_VERSION:=79a96150647110fb03852bc321bd37159d63ae1a
-PKG_MIRROR_HASH:=0bf6230019f80a05ae2a49722f3ecb2a9000da7ae0d398fd0e163d168ee8b494
+PKG_SOURCE_DATE:=2024-07-06
+PKG_SOURCE_VERSION:=215820132b943b700d56441ecbd5a4efa09edc7c
+PKG_MIRROR_HASH:=f815ee1e0bde98f80a5de9f2711d5044479f936c07e21fc47d3a7f97955e7883
 PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
 PKG_LICENSE:=GPL-2.0
 
diff --git a/package/system/apk/Makefile b/package/system/apk/Makefile
index a372e7cc9c..b8fdc05104 100644
--- a/package/system/apk/Makefile
+++ b/package/system/apk/Makefile
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=https://gitlab.alpinelinux.org/alpine/apk-tools.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-05-23
-PKG_SOURCE_VERSION:=6052bfef57a81d82451b4cad86f78a2d01959767
-PKG_MIRROR_HASH:=bf14da82cc363ee32a956dd880343018361079018a48701dc2b05cb88c18010e
+PKG_SOURCE_DATE:=2024-08-06
+PKG_SOURCE_VERSION:=54caa31be633efc5f655700b77af290124f71689
+PKG_MIRROR_HASH:=f3be762deac4f1469a4a2839691175e78019cb44295089befafa279a3390067c
 
 PKG_VERSION=3.0.0_pre$(subst -,,$(PKG_SOURCE_DATE))
 
diff --git a/package/system/fstools/Makefile b/package/system/fstools/Makefile
index 29d4726af7..419cdfff9a 100644
--- a/package/system/fstools/Makefile
+++ b/package/system/fstools/Makefile
@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/fstools.git
-PKG_MIRROR_HASH:=cf9e09885954e0e43b58126ce4b6f5552462cf1495b89330ce4e66056249787e
-PKG_SOURCE_DATE:=2024-01-22
-PKG_SOURCE_VERSION:=08cd7083cac4bddf88459efa0881ee52858e7d0a
+PKG_MIRROR_HASH:=5f04ce2b346d9a48468180dd9601ca0fcc83896ebf5466855578e766646e14a1
+PKG_SOURCE_DATE:=2024-07-14
+PKG_SOURCE_VERSION:=408c2cc48e6694446c89da7f8121b399063e1067
 CMAKE_INSTALL:=1
 
 PKG_LICENSE:=GPL-2.0
diff --git a/package/system/mtd/src/Makefile b/package/system/mtd/src/Makefile
index 57922f3309..c04affc026 100644
--- a/package/system/mtd/src/Makefile
+++ b/package/system/mtd/src/Makefile
@@ -12,7 +12,7 @@ obj.gemini = $(obj.wrgg)
 obj.brcm = trx.o
 obj.bcm47xx = $(obj.brcm)
 obj.bcm53xx = $(obj.brcm) $(obj.seama)
-obj.mediatek = $(obj.brcm)
+obj.mediatek = $(obj.brcm) linksys_bootcount.o
 obj.bcm63xx = imagetag.o
 obj.bmips = imagetag.o
 obj.ramips = $(obj.brcm) $(obj.seama) $(obj.tpl) $(obj.wrg) linksys_bootcount.o
diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
index dca6684df8..faf72a407d 100644
--- a/package/system/procd/Makefile
+++ b/package/system/procd/Makefile
@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
-PKG_MIRROR_HASH:=ad1e0d6c2549b2ebec57705c33b231e7c02042dd65c3134f62bf528cf2516efb
-PKG_SOURCE_DATE:=2024-03-30
-PKG_SOURCE_VERSION:=946552a7b598a0b88db6101e864679554ec4f221
+PKG_MIRROR_HASH:=9a0f7a5dfc883e7ea2f7f779e2e68f93507477ca780945219f808b145db5e71d
+PKG_SOURCE_DATE:=2024-07-07
+PKG_SOURCE_VERSION:=f230c11771875adc1f74bef013e8cea1fa1867bc
 CMAKE_INSTALL:=1
 
 PKG_LICENSE:=GPL-2.0
diff --git a/package/utils/busybox/Config-defaults.in b/package/utils/busybox/Config-defaults.in
index 515bea3d1d..f88f395e2c 100644
--- a/package/utils/busybox/Config-defaults.in
+++ b/package/utils/busybox/Config-defaults.in
@@ -1801,7 +1801,7 @@ config BUSYBOX_DEFAULT_FEATURE_SETPRIV_CAPABILITY_NAMES
 	default n
 config BUSYBOX_DEFAULT_SETSID
 	bool
-	default n
+	default y
 config BUSYBOX_DEFAULT_SWAPON
 	bool
 	default y
diff --git a/package/utils/dns320l-mcu/Makefile b/package/utils/dns320l-mcu/Makefile
index 724a664a8b..5124f5323d 100644
--- a/package/utils/dns320l-mcu/Makefile
+++ b/package/utils/dns320l-mcu/Makefile
@@ -11,6 +11,8 @@ PKG_MIRROR_HASH:=e0f186a0c139ccfac3d311f49e2fecdbd02fa3f9fe6ced4b1ce0baa603d49fc
 PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
 PKG_LICENSE:=GPL-3.0+
 
+PKG_FLAGS:=nonshared
+
 include $(INCLUDE_DIR)/package.mk
 
 define Package/dns320l-mcu
diff --git a/package/utils/firmware-utils/Makefile b/package/utils/firmware-utils/Makefile
index 2d9dbc5fce..3dcac6bcf1 100644
--- a/package/utils/firmware-utils/Makefile
+++ b/package/utils/firmware-utils/Makefile
@@ -11,6 +11,7 @@ PKG_SOURCE_DATE:=2024-06-20
 PKG_SOURCE_VERSION:=6ac44974185a3e7dc7848e97b964339948e817a7
 PKG_MIRROR_HASH:=ee5b29f45593750a6806cfa7cad3fd766b321b44107a6b481b890efe82a7dbf5
 
+PKG_FLAGS:=nonshared
 PKG_BUILD_DEPENDS:=openssl zlib
 
 include $(INCLUDE_DIR)/package.mk
diff --git a/package/utils/fitblk/Makefile b/package/utils/fitblk/Makefile
index 4da4dc46f1..8fb6e14c7e 100644
--- a/package/utils/fitblk/Makefile
+++ b/package/utils/fitblk/Makefile
@@ -1,7 +1,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=fitblk
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 PKG_LICENSE:=GPL-2.0-only
 PKG_MAINTAINER:=Daniel Golle <daniel@makrotopia.org>
 
@@ -36,6 +36,8 @@ endef
 define Package/fitblk/install
 	$(INSTALL_DIR) $(1)/usr/sbin
 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/fitblk $(1)/usr/sbin/
+	$(INSTALL_DIR) $(1)/lib/upgrade
+	$(INSTALL_DATA) ./files/fit.sh $(1)/lib/upgrade
 endef
 
 $(eval $(call BuildPackage,fitblk))
diff --git a/package/utils/fitblk/files/fit.sh b/package/utils/fitblk/files/fit.sh
new file mode 100644
index 0000000000..b715a15ddf
--- /dev/null
+++ b/package/utils/fitblk/files/fit.sh
@@ -0,0 +1,63 @@
+export_fitblk_bootdev() {
+	[ -e /sys/firmware/devicetree/base/chosen/rootdisk ] || return
+
+	local rootdisk="$(cat /sys/firmware/devicetree/base/chosen/rootdisk)"
+	local handle bootdev
+
+	for handle in /sys/class/mtd/mtd*/of_node/volumes/*/phandle; do
+		[ ! -e "$handle" ] && continue
+		if [ "$rootdisk" = "$(cat "$handle")" ]; then
+			if [ -e "${handle%/phandle}/volname" ]; then
+				export CI_KERNPART="$(cat "${handle%/phandle}/volname")"
+			elif [ -e "${handle%/phandle}/volid" ]; then
+				export CI_KERNVOLID="$(cat "${handle%/phandle}/volid")"
+			else
+				return
+			fi
+			export CI_UBIPART="$(cat "${handle%%/of_node*}/name")"
+			export CI_METHOD="ubi"
+			return
+		fi
+	done
+
+	for handle in /sys/class/mtd/mtd*/of_node/phandle; do
+		[ ! -e "$handle" ] && continue
+		if [ "$rootdisk" = "$(cat $handle)" ]; then
+			bootdev="${handle%/of_node/phandle}"
+			bootdev="${bootdev#/sys/class/mtd/}"
+			export PART_NAME="/dev/$bootdev"
+			export CI_METHOD="default"
+			return
+		fi
+	done
+
+	for handle in /sys/class/block/*/of_node/phandle; do
+		[ ! -e "$handle" ] && continue
+		if [ "$rootdisk" = "$(cat $handle)" ]; then
+			bootdev="${handle%/of_node/phandle}"
+			bootdev="${bootdev#/sys/class/block/}"
+			export EMMC_KERN_DEV="/dev/$bootdev"
+			export CI_METHOD="emmc"
+			return
+		fi
+	done
+}
+
+fit_do_upgrade() {
+	export_fitblk_bootdev
+	[ -n "$CI_METHOD" ] || return 1
+	[ -e /dev/fit0 ] && fitblk /dev/fit0
+	[ -e /dev/fitrw ] && fitblk /dev/fitrw
+
+	case "$CI_METHOD" in
+	emmc)
+		emmc_do_upgrade "$1"
+		;;
+	default)
+		default_do_upgrade "$1"
+		;;
+	ubi)
+		nand_do_upgrade "$1"
+		;;
+	esac
+}
diff --git a/package/utils/omnia-mcutool/Makefile b/package/utils/omnia-mcutool/Makefile
new file mode 100644
index 0000000000..493649b961
--- /dev/null
+++ b/package/utils/omnia-mcutool/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (C) 2016-2024 CZ.NIC z.s.p.o. (http://www.nic.cz/)
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=omnia-mcutool
+PKG_VERSION:=0.3-rc3
+PKG_RELEASE:=1
+
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:=https://gitlab.nic.cz/turris/$(PKG_NAME)/-/archive/$(PKG_VERSION)/
+PKG_HASH:=80bc6a01ab86d51ebfdbddf77d74eead999a9bf7dbd08ca1fd4e8e1910eaf192
+
+PKG_MAINTAINER:=Marek Mojik <marek.mojik@nic.cz>
+PKG_LICENSE:=GPL-2.0-or-later
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/omnia-mcutool
+  SECTION:=utils
+  CATEGORY:=Utilities
+  URL:=https://gitlab.nic.cz/turris/$(PKG_NAME)
+  TITLE:=CZ.NIC Turris Omnia MCU utility
+  DEPENDS:=+libopenssl +omnia-mcu-firmware @TARGET_mvebu_cortexa9_DEVICE_cznic_turris-omnia
+endef
+
+define Package/omnia-mcutool/description
+The omnia-mcutool utility is mainly used to upgrade the firmware on the
+microcontroller on the Turris Omnia router. It can also show state of MCU
+settings and configure MCU options (GPIOs, LEDs, power).
+endef
+
+TARGET_LDFLAGS += -lcrypto
+
+define Build/Compile
+	$(MAKE) -C $(PKG_BUILD_DIR) \
+		CC="$(TARGET_CC)" \
+		CFLAGS="$(TARGET_CFLAGS) -Wall" \
+		LDFLAGS="$(TARGET_LDFLAGS)" \
+		MCUTOOL_VERSION="$(PKG_VERSION)"
+endef
+
+define Package/omnia-mcutool/install
+	$(INSTALL_DIR) $(1)/usr/bin
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/omnia-mcutool $(1)/usr/bin/
+endef
+
+$(eval $(call BuildPackage,omnia-mcutool))
diff --git a/package/utils/px5g-mbedtls/Makefile b/package/utils/px5g-mbedtls/Makefile
index 14c9f684a9..6addbbab12 100644
--- a/package/utils/px5g-mbedtls/Makefile
+++ b/package/utils/px5g-mbedtls/Makefile
@@ -8,7 +8,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=px5g-mbedtls
-PKG_RELEASE:=10
+PKG_RELEASE:=11
 PKG_LICENSE:=LGPL-2.1
 
 PKG_BUILD_FLAGS:=no-mips16
diff --git a/package/utils/px5g-mbedtls/px5g-mbedtls.c b/package/utils/px5g-mbedtls/px5g-mbedtls.c
index 85abe7dc73..63f54bd9aa 100644
--- a/package/utils/px5g-mbedtls/px5g-mbedtls.c
+++ b/package/utils/px5g-mbedtls/px5g-mbedtls.c
@@ -38,8 +38,13 @@
 #include <mbedtls/ecp.h>
 #include <mbedtls/rsa.h>
 #include <mbedtls/pk.h>
+#include <mbedtls/asn1.h>
+#include <mbedtls/oid.h>
 
-#define PX5G_VERSION "0.2"
+#define SET_OID(x, oid) \
+	do { x.len = MBEDTLS_OID_SIZE(oid); x.p = (unsigned char *) oid; } while (0)
+
+#define PX5G_VERSION "0.3"
 #define PX5G_COPY "Copyright (c) 2009 Steven Barth <steven@midlink.org>"
 #define PX5G_LICENSE "Licensed under the GNU Lesser General Public License v2.1"
 
@@ -193,6 +198,16 @@ int selfsigned(char **arg)
 	mbedtls_pk_context key;
 	mbedtls_x509write_cert cert;
 	mbedtls_mpi serial;
+	mbedtls_x509_san_list *san_list = NULL, *san_prev = NULL, *san_cur = NULL;
+	/*support
+	- MBEDTLS_X509_SAN_DNS_NAME
+	- MBEDTLS_X509_SAN_IP_ADDRESS
+	- MBEDTLS_X509_SAN_RFC822_NAME
+	- MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER
+	*/
+	mbedtls_asn1_sequence *eku = NULL, *ext_key_usage = NULL;
+	char *sanval, *santype;
+	uint8_t ipaddr[16] = { 0 };
 
 	char *subject = "";
 	unsigned int ksize = 512;
@@ -267,8 +282,56 @@ int selfsigned(char **arg)
 				oldc = delim + 1;
 			} while(*delim);
 			arg++;
+		} else if (!strcmp(*arg, "-addext") && arg[1]) {
+			mbedtls_asn1_sequence **tail = &eku;
+			if (!strncmp(arg[1], "extendedKeyUsage=", strlen("extendedKeyUsage="))) {
+				ext_key_usage = calloc(1, sizeof(mbedtls_asn1_sequence));
+				ext_key_usage->buf.tag = MBEDTLS_ASN1_OID;
+				if (!strncmp(arg[1] + strlen("extendedKeyUsage="), "serverAuth", strlen("serverAuth"))) {
+					SET_OID(ext_key_usage->buf, MBEDTLS_OID_SERVER_AUTH);
+				} else if (!strncmp(arg[1] + strlen("extendedKeyUsage="), "any", strlen("any"))) {
+					SET_OID(ext_key_usage->buf, MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE);
+				} // there are other extendedKeyUsage OIDs but none conceivably useful here
+				*tail = ext_key_usage;
+				tail = &ext_key_usage->next;
+				arg++;
+			} else if (!strncmp(arg[1], "subjectAltName=", strlen("subjectAltName=")) && strchr(arg[1], ':') != NULL) {
+				santype = strchr(arg[1], '=') + 1;
+				sanval = strchr(arg[1], ':') + 1;
+				//build sAN list
+				san_cur = calloc(1, sizeof(mbedtls_x509_san_list));
+				san_cur->next = NULL;
+				if (!strncmp(santype, "DNS:", strlen("DNS:"))) {
+					san_cur->node.type = MBEDTLS_X509_SAN_DNS_NAME;
+					san_cur->node.san.unstructured_name.p = (unsigned char *) sanval;
+					san_cur->node.san.unstructured_name.len = strlen(sanval);
+				} else if (!strncmp(santype, "EMAIL:", strlen("EMAIL:"))) {
+					san_cur->node.type = MBEDTLS_X509_SAN_RFC822_NAME;
+					san_cur->node.san.unstructured_name.p = (unsigned char *) sanval;
+					san_cur->node.san.unstructured_name.len = strlen(sanval);
+				} else if (!strncmp(santype, "IP:", strlen("IP:"))) {
+					san_cur->node.type = MBEDTLS_X509_SAN_IP_ADDRESS;
+					mbedtls_x509_crt_parse_cn_inet_pton(sanval, ipaddr);
+					san_cur->node.san.unstructured_name.p = (unsigned char *) ipaddr;
+					san_cur->node.san.unstructured_name.len = sizeof(ipaddr);
+				} else if (!strncmp(santype, "URI:", strlen("URI:"))) {
+					san_cur->node.type = MBEDTLS_X509_SAN_UNIFORM_RESOURCE_IDENTIFIER;
+					san_cur->node.san.unstructured_name.p = (unsigned char *) sanval;
+					san_cur->node.san.unstructured_name.len = strlen(sanval);
+				}
+				else fprintf(stderr, "No match to subjectAltName content type.\n");
+			arg++;
+			}
 		}
 		arg++;
+
+		//set the pointers in our san_list linked list
+		if (san_prev == NULL) {
+			san_list = san_cur;
+		} else {
+			san_prev->next = san_cur;
+		}
+		san_prev = san_cur;
 	}
 	gen_key(&key, rsa, ksize, exp, curve, pem);
 
@@ -295,6 +358,8 @@ int selfsigned(char **arg)
 	mbedtls_x509write_crt_set_basic_constraints(&cert, 0, -1);
 	mbedtls_x509write_crt_set_subject_key_identifier(&cert);
 	mbedtls_x509write_crt_set_authority_key_identifier(&cert);
+	mbedtls_x509write_crt_set_subject_alternative_name(&cert, san_list);
+	mbedtls_x509write_crt_set_ext_key_usage(&cert, ext_key_usage);
 
 	_urandom(NULL, (void *) buf, 8);
 	for (len = 0; len < 8; len++)
diff --git a/package/utils/ucode/Makefile b/package/utils/ucode/Makefile
index 40dba3b46c..aa7a28483d 100644
--- a/package/utils/ucode/Makefile
+++ b/package/utils/ucode/Makefile
@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=https://github.com/jow-/ucode.git
-PKG_SOURCE_DATE:=2024-06-18
-PKG_SOURCE_VERSION:=4dd98370ef558a62a9afd10ad6aa1cc658cf7339
-PKG_MIRROR_HASH:=c2cf650a3597457203040feebd6a9bff21be2dc55f80553cf998cff2c0d00244
+PKG_SOURCE_DATE:=2024-07-11
+PKG_SOURCE_VERSION:=1a8a0bcf725520820802ad433db22d8f64fbed6c
+PKG_MIRROR_HASH:=0a859c97457a019adc73b028c19e2b334271b2c4de28337f1a18fd35438af3d3
 PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
 PKG_LICENSE:=ISC
 
diff --git a/package/utils/util-linux/Makefile b/package/utils/util-linux/Makefile
index 0e04ec8caf..83f3a8c842 100644
--- a/package/utils/util-linux/Makefile
+++ b/package/utils/util-linux/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=util-linux
-PKG_VERSION:=2.40.1
+PKG_VERSION:=2.40.2
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.40
-PKG_HASH:=59e676aa53ccb44b6c39f0ffe01a8fa274891c91bef1474752fad92461def24f
+PKG_HASH:=d78b37a66f5922d70edf3bdfb01a6b33d34ed3c3cafd6628203b2a2b67c8e8b3
 PKG_CPE_ID:=cpe:/a:kernel:util-linux
 
 PKG_LICENSE:=GPL-2.0-only
diff --git a/package/utils/util-linux/patches/0001-meson-Fix-build-python-option.patch b/package/utils/util-linux/patches/0001-meson-Fix-build-python-option.patch
deleted file mode 100644
index e84fe5e705..0000000000
--- a/package/utils/util-linux/patches/0001-meson-Fix-build-python-option.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From b66b70d62e50923502aeb3f6420a5f9c20f769d3 Mon Sep 17 00:00:00 2001
-From: Jordan Williams <jordan@jwillikers.com>
-Date: Thu, 9 May 2024 15:57:12 -0500
-Subject: [PATCH] meson: Fix build-python option
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The build-python option is for controlling whether or not pylibmount is
-built.
-Unfortunately, commit b6799cc rendered the option unused.
-This change uses the build-python option again.
-
-Signed-off-by: Jordan Williams <jordan@jwillikers.com>
-Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
----
- libmount/python/meson.build | 40 ++++++++++++++++++-------------------
- 1 file changed, 20 insertions(+), 20 deletions(-)
-
-diff --git a/libmount/python/meson.build b/libmount/python/meson.build
-index 72985eca6b21..5dcdf807da89 100644
---- a/libmount/python/meson.build
-+++ b/libmount/python/meson.build
-@@ -1,4 +1,6 @@
--build_python = python.found()
-+if get_option('build-python').disabled()
-+  subdir_done()
-+endif
- 
- pylibmount_sources = '''
-   pylibmount.c
diff --git a/rules.mk b/rules.mk
index 91ed9b2085..ae20742bd7 100644
--- a/rules.mk
+++ b/rules.mk
@@ -245,8 +245,8 @@ export PKG_CONFIG
 HOSTCC:=$(STAGING_DIR_HOST)/bin/gcc
 HOSTCXX:=$(STAGING_DIR_HOST)/bin/g++
 HOST_CPPFLAGS:=-I$(STAGING_DIR_HOST)/include $(if $(IS_PACKAGE_BUILD),-I$(STAGING_DIR_HOSTPKG)/include -I$(STAGING_DIR)/host/include)
-HOST_CXXFLAGS:=
 HOST_CFLAGS:=-O2 $(HOST_CPPFLAGS)
+HOST_CXXFLAGS:=$(HOST_CFLAGS)
 HOST_LDFLAGS:=-L$(STAGING_DIR_HOST)/lib $(if $(IS_PACKAGE_BUILD),-L$(STAGING_DIR_HOSTPKG)/lib -L$(STAGING_DIR)/host/lib)
 
 BUILD_KEY=$(TOPDIR)/key-build
diff --git a/target/imagebuilder/Makefile b/target/imagebuilder/Makefile
index 7fd2aa0920..7127df5ebc 100644
--- a/target/imagebuilder/Makefile
+++ b/target/imagebuilder/Makefile
@@ -112,6 +112,9 @@ endif
 	-cp $(LINUX_DIR)/.config $(IB_LDIR)/
 	rm -f $(IB_KDIR)/root.*
 	rm -f $(IB_KDIR)/vmlinux.debug
+	# remove any file for initramfs and Per Device Rootfs initramfs files
+	rm -f $(IB_KDIR)/vmlinux-initramfs*
+	rm -f $(IB_KDIR)/Image-initramfs*
 	if [ -x $(LINUX_DIR)/scripts/dtc/dtc ]; then \
 		$(INSTALL_DIR) $(IB_LDIR)/scripts/dtc; \
 		$(INSTALL_BIN) $(LINUX_DIR)/scripts/dtc/dtc $(IB_LDIR)/scripts/dtc/dtc; \
diff --git a/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi b/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi
index 9d98776626..7c9faa883f 100644
--- a/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi
+++ b/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi
@@ -224,7 +224,7 @@
 
 	rtl8367b {
 		compatible = "realtek,rtl8367b";
-		realtek,extif0 = <1 2 1 1 1 1 1 1 2>;
+		realtek,extif = <5 1 2 1 1 1 1 1 1 2>;
 		mii-bus = <&mdio0>;
 	};
 };
diff --git a/target/linux/archs38/Makefile b/target/linux/archs38/Makefile
index e352c58957..0b3feb9889 100644
--- a/target/linux/archs38/Makefile
+++ b/target/linux/archs38/Makefile
@@ -11,7 +11,7 @@ BOARDNAME:=Synopsys DesignWare ARC HS38
 FEATURES:=source-only
 SUBTARGETS:=generic
 
-KERNEL_PATCHVER:=6.1
+KERNEL_PATCHVER:=6.6
 
 DEVICE_TYPE:=basic
 
diff --git a/target/linux/archs38/config-6.1 b/target/linux/archs38/config-6.6
index 9fe6ba2932..5eb67e1043 100644
--- a/target/linux/archs38/config-6.1
+++ b/target/linux/archs38/config-6.6
@@ -46,6 +46,7 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 CONFIG_BLK_DEV_SD=y
+CONFIG_BUFFER_HEAD=y
 CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
 CONFIG_CC_NO_ARRAY_BOUNDS=y
 CONFIG_CLK_HSDK=y
@@ -55,6 +56,7 @@ CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
 CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_RMAP=y
 CONFIG_CRC16=y
 CONFIG_CRYPTO_CRC32C=y
@@ -62,9 +64,11 @@ CONFIG_CRYPTO_DRBG=y
 CONFIG_CRYPTO_DRBG_HMAC=y
 CONFIG_CRYPTO_DRBG_MENU=y
 CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_GENIV=y
 CONFIG_CRYPTO_HMAC=y
 CONFIG_CRYPTO_JITTERENTROPY=y
 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
 CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
 CONFIG_CRYPTO_LIB_SHA1=y
 CONFIG_CRYPTO_LIB_SHA256=y
@@ -73,6 +77,7 @@ CONFIG_CRYPTO_RNG=y
 CONFIG_CRYPTO_RNG2=y
 CONFIG_CRYPTO_RNG_DEFAULT=y
 CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA3=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DMADEVICES=y
@@ -89,19 +94,21 @@ CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_EXT4_FS=y
 CONFIG_FAT_FS=y
 CONFIG_FB=y
-CONFIG_FB_CMDLINE=y
+CONFIG_FB_CORE=y
+CONFIG_FB_IOMEM_FOPS=y
 CONFIG_FIXED_PHY=y
 CONFIG_FS_IOMAP=y
 CONFIG_FS_MBCACHE=y
 CONFIG_FS_POSIX_ACL=y
+CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
 CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_FW_LOADER_SYSFS=y
-CONFIG_GCC11_NO_ARRAY_BOUNDS=y
-CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
+CONFIG_GCC10_NO_ARRAY_BOUNDS=y
 CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_IOREMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_SHOW=y
 CONFIG_GENERIC_PCI_IOMAP=y
@@ -142,6 +149,7 @@ CONFIG_ISA_ARCV2=y
 CONFIG_JBD2=y
 CONFIG_KALLSYMS=y
 CONFIG_KERNEL_GZIP=y
+CONFIG_LEGACY_DIRECT_IO=y
 CONFIG_LIBFDT=y
 CONFIG_LINUX_LINK_BASE=0x90000000
 CONFIG_LINUX_RAM_BASE=0x80000000
@@ -152,7 +160,6 @@ CONFIG_LOCK_SPIN_ON_OWNER=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
-CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MICREL_PHY=y
 CONFIG_MIGRATION=y
@@ -166,16 +173,21 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_PLTFM=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_USE_ELF_RELA=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_NAMESPACES=y
 CONFIG_NATIONAL_PHY=y
 CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_EGRESS=y
 CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_HANDSHAKE=y
+CONFIG_NET_INGRESS=y
 CONFIG_NET_NS=y
 CONFIG_NET_PTP_CLASSIFY=y
 CONFIG_NET_SELFTESTS=y
+CONFIG_NET_XGRESS=y
 CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
@@ -196,7 +208,6 @@ CONFIG_PADATA=y
 CONFIG_PAGE_POOL=y
 CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
-CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y
 CONFIG_PCS_XPCS=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -247,7 +258,7 @@ CONFIG_SPI_DESIGNWARE=y
 CONFIG_SPI_DW_MMIO=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
-CONFIG_SRCU=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_STACKTRACE=y
 # CONFIG_STANDALONE is not set
 CONFIG_STMMAC_ETH=y
@@ -264,5 +275,6 @@ CONFIG_UNINLINE_SPIN_UNLOCK=y
 CONFIG_USB_SUPPORT=y
 # CONFIG_USER_NS is not set
 CONFIG_VFAT_FS=y
+CONFIG_VIDEO_CMDLINE=y
 CONFIG_WATCHDOG_CORE=y
 CONFIG_XPS=y
diff --git a/target/linux/archs38/generic/target.mk b/target/linux/archs38/generic/target.mk
index 7642c6b261..dfe0474fd8 100644
--- a/target/linux/archs38/generic/target.mk
+++ b/target/linux/archs38/generic/target.mk
@@ -1,5 +1,5 @@
 BOARDNAME:=Generic
-FEATURES += ext4 usb ramdisk
+FEATURES += ext4 usb ramdisk rootfs-part
 
 define Target/Description
 	Build firmware images for ARC HS38 based boards.
diff --git a/target/linux/armsr/patches-6.1/701-v6.2-0001-net-dpaa2-eth-don-t-use-ENOTSUPP-error-code.patch b/target/linux/armsr/patches-6.1/701-v6.2-0001-net-dpaa2-eth-don-t-use-ENOTSUPP-error-code.patch
index ec72f91d0f..f173cad7ef 100644
--- a/target/linux/armsr/patches-6.1/701-v6.2-0001-net-dpaa2-eth-don-t-use-ENOTSUPP-error-code.patch
+++ b/target/linux/armsr/patches-6.1/701-v6.2-0001-net-dpaa2-eth-don-t-use-ENOTSUPP-error-code.patch
@@ -22,7 +22,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
-@@ -3614,7 +3614,7 @@ static int dpaa2_eth_setup_dpni(struct f
+@@ -3618,7 +3618,7 @@ static int dpaa2_eth_setup_dpni(struct f
  		dev_err(dev, "DPNI version %u.%u not supported, need >= %u.%u\n",
  			priv->dpni_ver_major, priv->dpni_ver_minor,
  			DPNI_VER_MAJOR, DPNI_VER_MINOR);
diff --git a/target/linux/armsr/patches-6.1/701-v6.2-0005-net-dpaa2-eth-assign-priv-mac-after-dpaa2_mac_connec.patch b/target/linux/armsr/patches-6.1/701-v6.2-0005-net-dpaa2-eth-assign-priv-mac-after-dpaa2_mac_connec.patch
index c31a470182..bd27c8be20 100644
--- a/target/linux/armsr/patches-6.1/701-v6.2-0005-net-dpaa2-eth-assign-priv-mac-after-dpaa2_mac_connec.patch
+++ b/target/linux/armsr/patches-6.1/701-v6.2-0005-net-dpaa2-eth-assign-priv-mac-after-dpaa2_mac_connec.patch
@@ -49,7 +49,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
-@@ -4444,9 +4444,8 @@ static int dpaa2_eth_connect_mac(struct
+@@ -4448,9 +4448,8 @@ static int dpaa2_eth_connect_mac(struct
  	err = dpaa2_mac_open(mac);
  	if (err)
  		goto err_free_mac;
@@ -60,7 +60,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  		err = dpaa2_mac_connect(mac);
  		if (err && err != -EPROBE_DEFER)
  			netdev_err(priv->net_dev, "Error connecting to the MAC endpoint: %pe",
-@@ -4455,11 +4454,12 @@ static int dpaa2_eth_connect_mac(struct
+@@ -4459,11 +4458,12 @@ static int dpaa2_eth_connect_mac(struct
  			goto err_close_mac;
  	}
  
@@ -74,7 +74,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  err_free_mac:
  	kfree(mac);
  	return err;
-@@ -4467,15 +4467,18 @@ err_free_mac:
+@@ -4471,15 +4471,18 @@ err_free_mac:
  
  static void dpaa2_eth_disconnect_mac(struct dpaa2_eth_priv *priv)
  {
diff --git a/target/linux/armsr/patches-6.1/701-v6.2-0009-net-dpaa2-eth-connect-to-MAC-before-requesting-the-e.patch b/target/linux/armsr/patches-6.1/701-v6.2-0009-net-dpaa2-eth-connect-to-MAC-before-requesting-the-e.patch
index 4e39e9a0ac..246cd633ba 100644
--- a/target/linux/armsr/patches-6.1/701-v6.2-0009-net-dpaa2-eth-connect-to-MAC-before-requesting-the-e.patch
+++ b/target/linux/armsr/patches-6.1/701-v6.2-0009-net-dpaa2-eth-connect-to-MAC-before-requesting-the-e.patch
@@ -33,7 +33,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
-@@ -4711,6 +4711,10 @@ static int dpaa2_eth_probe(struct fsl_mc
+@@ -4715,6 +4715,10 @@ static int dpaa2_eth_probe(struct fsl_mc
  	}
  #endif
  
@@ -44,7 +44,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	err = dpaa2_eth_setup_irqs(dpni_dev);
  	if (err) {
  		netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
-@@ -4723,10 +4727,6 @@ static int dpaa2_eth_probe(struct fsl_mc
+@@ -4727,10 +4731,6 @@ static int dpaa2_eth_probe(struct fsl_mc
  		priv->do_link_poll = true;
  	}
  
@@ -55,7 +55,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	err = dpaa2_eth_dl_alloc(priv);
  	if (err)
  		goto err_dl_register;
-@@ -4762,13 +4762,13 @@ err_dl_port_add:
+@@ -4766,13 +4766,13 @@ err_dl_port_add:
  err_dl_trap_register:
  	dpaa2_eth_dl_free(priv);
  err_dl_register:
@@ -71,7 +71,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	dpaa2_eth_free_rings(priv);
  err_alloc_rings:
  err_csum:
-@@ -4816,9 +4816,6 @@ static int dpaa2_eth_remove(struct fsl_m
+@@ -4820,9 +4820,6 @@ static int dpaa2_eth_remove(struct fsl_m
  #endif
  
  	unregister_netdev(net_dev);
@@ -81,7 +81,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  
  	dpaa2_eth_dl_port_del(priv);
  	dpaa2_eth_dl_traps_unregister(priv);
-@@ -4829,6 +4826,9 @@ static int dpaa2_eth_remove(struct fsl_m
+@@ -4833,6 +4830,9 @@ static int dpaa2_eth_remove(struct fsl_m
  	else
  		fsl_mc_free_irqs(ls_dev);
  
diff --git a/target/linux/armsr/patches-6.1/701-v6.2-0010-net-dpaa2-eth-serialize-changes-to-priv-mac-with-a-m.patch b/target/linux/armsr/patches-6.1/701-v6.2-0010-net-dpaa2-eth-serialize-changes-to-priv-mac-with-a-m.patch
index 9b068ce8f5..553870d8ec 100644
--- a/target/linux/armsr/patches-6.1/701-v6.2-0010-net-dpaa2-eth-serialize-changes-to-priv-mac-with-a-m.patch
+++ b/target/linux/armsr/patches-6.1/701-v6.2-0010-net-dpaa2-eth-serialize-changes-to-priv-mac-with-a-m.patch
@@ -121,7 +121,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  
  	return -EOPNOTSUPP;
  }
-@@ -4454,7 +4474,9 @@ static int dpaa2_eth_connect_mac(struct
+@@ -4458,7 +4478,9 @@ static int dpaa2_eth_connect_mac(struct
  			goto err_close_mac;
  	}
  
@@ -131,7 +131,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  
  	return 0;
  
-@@ -4467,9 +4489,12 @@ err_free_mac:
+@@ -4471,9 +4493,12 @@ err_free_mac:
  
  static void dpaa2_eth_disconnect_mac(struct dpaa2_eth_priv *priv)
  {
@@ -145,7 +145,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  
  	if (!mac)
  		return;
-@@ -4488,6 +4513,7 @@ static irqreturn_t dpni_irq0_handler_thr
+@@ -4492,6 +4517,7 @@ static irqreturn_t dpni_irq0_handler_thr
  	struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
  	struct net_device *net_dev = dev_get_drvdata(dev);
  	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
@@ -153,7 +153,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	int err;
  
  	err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
-@@ -4505,7 +4531,12 @@ static irqreturn_t dpni_irq0_handler_thr
+@@ -4509,7 +4535,12 @@ static irqreturn_t dpni_irq0_handler_thr
  		dpaa2_eth_update_tx_fqids(priv);
  
  		rtnl_lock();
@@ -167,7 +167,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  			dpaa2_eth_disconnect_mac(priv);
  		else
  			dpaa2_eth_connect_mac(priv);
-@@ -4606,6 +4637,8 @@ static int dpaa2_eth_probe(struct fsl_mc
+@@ -4610,6 +4641,8 @@ static int dpaa2_eth_probe(struct fsl_mc
  	priv = netdev_priv(net_dev);
  	priv->net_dev = net_dev;
  
diff --git a/target/linux/armsr/patches-6.1/701-v6.2-0012-net-dpaa2-mac-move-rtnl_lock-only-around-phylink.patch b/target/linux/armsr/patches-6.1/701-v6.2-0012-net-dpaa2-mac-move-rtnl_lock-only-around-phylink.patch
index 521c9d4a54..5de2137002 100644
--- a/target/linux/armsr/patches-6.1/701-v6.2-0012-net-dpaa2-mac-move-rtnl_lock-only-around-phylink.patch
+++ b/target/linux/armsr/patches-6.1/701-v6.2-0012-net-dpaa2-mac-move-rtnl_lock-only-around-phylink.patch
@@ -34,7 +34,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
-@@ -4530,7 +4530,6 @@ static irqreturn_t dpni_irq0_handler_thr
+@@ -4534,7 +4534,6 @@ static irqreturn_t dpni_irq0_handler_thr
  		dpaa2_eth_set_mac_addr(netdev_priv(net_dev));
  		dpaa2_eth_update_tx_fqids(priv);
  
@@ -42,7 +42,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  		/* We can avoid locking because the "endpoint changed" IRQ
  		 * handler is the only one who changes priv->mac at runtime,
  		 * so we are not racing with anyone.
-@@ -4540,7 +4539,6 @@ static irqreturn_t dpni_irq0_handler_thr
+@@ -4544,7 +4543,6 @@ static irqreturn_t dpni_irq0_handler_thr
  			dpaa2_eth_disconnect_mac(priv);
  		else
  			dpaa2_eth_connect_mac(priv);
@@ -50,7 +50,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  	}
  
  	return IRQ_HANDLED;
-@@ -4859,9 +4857,7 @@ static int dpaa2_eth_remove(struct fsl_m
+@@ -4863,9 +4861,7 @@ static int dpaa2_eth_remove(struct fsl_m
  	else
  		fsl_mc_free_irqs(ls_dev);
  
diff --git a/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts b/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts
index 77eeedc588..0124ddff87 100644
--- a/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts
+++ b/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts
@@ -78,7 +78,7 @@
 		compatible = "realtek,rtl8367";
 		gpio-sda = <&gpio 1 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio 6 GPIO_ACTIVE_HIGH>;
-		realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <9 1 0 1 1 1 1 1 1 2>;
 
 		mdio-bus {
 			#address-cells = <1>;
diff --git a/target/linux/ath79/dts/ar9344_huawei_ap6010dn.dts b/target/linux/ath79/dts/ar9344_huawei_ap6010dn.dts
new file mode 100644
index 0000000000..2f2e6e2331
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_huawei_ap6010dn.dts
@@ -0,0 +1,243 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "ar9344.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Huawei AP6010DN";
+	compatible = "huawei,ap6010dn", "qca,ar9344";
+
+	chosen {
+		bootargs = "console=ttyS0,9600n8";
+	};
+
+	aliases {
+		led-boot = &led_function_green;
+		led-failsafe = &led_function_red;
+		led-running = &led_function_green;
+		led-upgrade = &led_function_red;
+		label-mac-device = &eth0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_function_green: led-status-green {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_function_red: led-status-red {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		};
+
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		restart {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+
+	watchdog {
+		pinctrl-names = "default";
+		pinctrl-0 = <&wdt_gpio15>;
+
+		compatible = "linux,wdt-gpio";
+		gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		hw_algo = "toggle";
+		hw_margin_ms = <100>;
+		always-running;
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+		devices = <&fwconcat0 &fwconcat1>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "firmware";
+				reg = <0x0 0x1e00000>;
+				compatible = "openwrt,uimage", "denx,uimage";
+			};
+		};
+	};
+};
+
+&spi {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot-a";
+				reg = <0x0 0x80000>;
+				read-only;
+			};
+
+			partition@80000 {
+				label = "BootupA";
+				reg = <0x80000 0x20000>;
+			};
+
+			partition@a0000 {
+				label = "BootupB";
+				reg = <0xa0000 0x20000>;
+			};
+
+			partition@c0000 {
+				label = "u-boot-env";
+				reg = <0xc0000 0x20000>;
+				read-only;
+			};
+
+			partition@e0000 {
+				label = "BoardData";
+				reg = <0xe0000 0x20000>;
+				read-only;
+			};
+
+			// In the vendor layout, there are the "SysImageA" (12 MiB)
+			// and the "ConfigA" (3 MiB) partitions here.
+			fwconcat0: partition@100000 {
+				label = "fwconcat0";
+				reg = <0x100000 0xf00000>;
+			};
+
+			partition@1000000 {
+				label = "u-boot-b";
+				reg = <0x1000000 0x80000>;
+				read-only;
+			};
+
+			partition@1080000 {
+				label = "ResultA";
+				reg = <0x1080000 0x20000>;
+				read-only;
+			};
+
+			partition@10a0000 {
+				label = "ResultB";
+				reg = <0x10a0000 0x20000>;
+				read-only;
+			};
+
+			// In the vendor layout, there are the "SysImageB" (12 MiB)
+			// and the "ConfigB" (3 MiB) partitions here.
+			fwconcat1: partition@10c0000 {
+				label = "fwconcat1";
+				reg = <0x10c0000 0xf00000>;
+			};
+
+			art: partition@1fc0000 {
+				label = "art";
+				reg = <0x1fc0000 0x40000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_art_2005b: macaddr@2005b {
+						compatible = "mac-base";
+						reg = <0x2005b 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+
+					cal_art_1000: cal@1000 {
+						reg = <0x1000 0x440>;
+					};
+
+					cal_art_5000: cal@5000 {
+						reg = <0x5000 0x844>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&wmac {
+	status = "okay";
+
+	nvmem-cells = <&macaddr_art_2005b 1>, <&cal_art_1000>;
+	nvmem-cell-names = "mac-address", "calibration";
+};
+
+&pcie {
+	status = "okay";
+
+	ath9k: wifi@0,0 {
+		compatible = "pci168c,0033";
+		reg = <0x0000 0 0 0 0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		nvmem-cells = <&macaddr_art_2005b 2>, <&cal_art_5000>;
+		nvmem-cell-names = "mac-address", "calibration";
+	};
+};
+
+&ref {
+	clock-frequency = <40000000>;
+};
+
+&eth0 {
+	status = "okay";
+
+	nvmem-cells = <&macaddr_art_2005b 0>;
+	nvmem-cell-names = "mac-address";
+
+	pll-data = <0x06000000 0x04000101 0x0c001313>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&phy>;
+
+	gmac-config {
+		device = <&gmac>;
+		rgmii-gmac0 = <1>;
+		rxdv-delay = <3>;
+		rxd-delay = <3>;
+	};
+};
+
+&mdio0 {
+	status = "okay";
+
+	phy: ethernet-phy@18 {
+		reg = <0x4>;
+	};
+};
+
+&pinmux {
+	wdt_gpio15: pinmux_wdt_gpio15 {
+		pinctrl-single,bits = <0xc 0x0 0xFF000000>;
+	};
+};
+
+&wdt {
+	status = "disabled";
+};
diff --git a/target/linux/ath79/dts/ar9344_nec_aterm.dtsi b/target/linux/ath79/dts/ar9344_nec_aterm.dtsi
new file mode 100644
index 0000000000..dfe2b064b7
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_nec_aterm.dtsi
@@ -0,0 +1,300 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+#include "ar9344.dtsi"
+
+/ {
+	aliases {
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	chosen {
+		/*
+		 * don't specify bootargs property in DeviceTree to
+		 * enable a console with a default baudrate (9600)
+		 * or passed console= parameter from the bootloader
+		 */
+		/delete-property/ bootargs;
+		stdout-path = &uart;
+	};
+
+	keys: keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&jtag_disable_pins>;
+
+		button-eco {
+			label = "eco";
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+			debounce-interval = <60>;
+		};
+
+		switch-ap {
+			label = "ap";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+			debounce-interval = <60>;
+		};
+
+		button-reset {
+			label = "reset";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+			debounce-interval = <60>;
+		};
+
+		button-wps {
+			label = "wps";
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+			debounce-interval = <60>;
+		};
+	};
+
+	ath9k_leds: ath9k-leds {
+		/* all LEDs are connected to ath9k chip (AR938x) */
+		compatible = "gpio-leds";
+
+		led_power_green: led-0 {
+			gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_POWER;
+			default-state = "on";
+		};
+
+		led-1 {
+			gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_POWER;
+		};
+
+		led-2 {
+			gpios = <&ath9k 2 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WAN_ONLINE;
+		};
+
+		led-3 {
+			gpios = <&ath9k 3 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WAN_ONLINE;
+		};
+
+		led-4 {
+			gpios = <&ath9k 4 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		led-5 {
+			gpios = <&ath9k 5 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+		};
+
+		led-6 {
+			gpios = <&ath9k 6 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led-7 {
+			gpios = <&ath9k 7 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+		};
+
+		led-8 {
+			gpios = <&ath9k 12 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = "tv";
+		};
+
+		led-9 {
+			gpios = <&ath9k 13 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_RED>;
+			function = "tv";
+		};
+	};
+
+	regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "usb-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio 20 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+};
+
+&ref {
+	clock-frequency = <40000000>;
+};
+
+&spi {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/*
+			 * since the OEM bootloader requires unknown
+			 * filesystem on firmware area, needs to be
+			 * replaced to u-boot before OpenWrt installation
+			 */
+			partition@0 {
+				label = "bootloader";
+				reg = <0x000000 0x020000>;
+			};
+
+			/* not compatible with u-boot */
+			partition@20000 {
+				label = "config";
+				reg = <0x020000 0x010000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_config_6: macaddr@6 {
+						reg = <0x6 0x6>;
+					};
+				};
+			};
+
+			partition@30000 {
+				label = "art";
+				reg = <0x030000 0x010000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					cal_art_1000: calibration@1000 {
+						reg = <0x1000 0x440>;
+					};
+
+					cal_art_5000: calibration@5000 {
+						reg = <0x5000 0x440>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&mdio0 {
+	status = "okay";
+
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+
+		qca,ar8327-initvals = <
+			0x04 0x07a00000 /* PORT0_PAD_MODE_CTRL */
+			0x08 0x00000000 /* PORT5_PAD_MODE_CTRL */
+			0x0c 0x00000000 /* PORT6_PAD_MODE_CTRL */
+			0x10 0x81000080 /* POWER_ON_STRAP */
+			0x50 0xcf37cf37 /* LED_CTRL0 */
+			0x54 0x00000000 /* LED_CTRL1 */
+			0x58 0x00000000 /* LED_CTRL2 */
+			0x5c 0x03ffff00 /* LED_CTRL3 */
+			0x7c 0x0000007e /* PORT0_STATUS */
+		>;
+	};
+};
+
+&eth0 {
+	status = "okay";
+
+	pll-data = <0x06000000 0x00000101 0x00001616>;
+
+	phy-mode = "rgmii";
+	phy-handle = <&phy0>;
+
+	nvmem-cells = <&macaddr_config_6>;
+	nvmem-cell-names = "mac-address";
+
+	gmac-config {
+		device = <&gmac>;
+
+		rgmii-gmac0 = <1>;
+		rxdv-delay = <0>;
+		rxd-delay = <0>;
+		txd-delay = <0>;
+		txen-delay = <0>;
+	};
+};
+
+&gpio {
+	switch-reset {
+		gpio-hog;
+		gpios = <13 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
+};
+
+&pcie {
+	status = "okay";
+
+	ath9k: wifi@0,0 {
+		compatible = "pci168c,0030";
+		reg = <0x0000 0 0 0 0>;
+		#gpio-cells = <2>;
+		gpio-controller;
+
+		nvmem-cells = <&cal_art_5000>;
+		nvmem-cell-names = "calibration";
+
+		usb-hub-reset {
+			gpio-hog;
+			gpios = <10 GPIO_ACTIVE_HIGH>;
+			output-high;
+		};
+	};
+};
+
+&usb_phy {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	dr_mode = "host";
+
+	/delete-node/ port@1;
+
+	/* NEC uPD720114 */
+	hub@1 {
+		compatible = "usb0409,005a";
+		reg = <1>;
+	};
+};
+
+&wmac {
+	status = "okay";
+
+	nvmem-cells = <&cal_art_1000>;
+	nvmem-cell-names = "calibration";
+};
diff --git a/target/linux/ath79/dts/ar9344_nec_wg600hp.dts b/target/linux/ath79/dts/ar9344_nec_wg600hp.dts
new file mode 100644
index 0000000000..e586dce7ca
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_nec_wg600hp.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "ar9344_nec_aterm.dtsi"
+
+/ {
+	compatible = "nec,wg600hp", "qca,ar9344";
+	model = "NEC Aterm WG600HP";
+};
+
+&partitions {
+	partition@40000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x040000 0x7c0000>;
+	};
+};
diff --git a/target/linux/ath79/dts/ar9344_nec_wr8750n.dts b/target/linux/ath79/dts/ar9344_nec_wr8750n.dts
new file mode 100644
index 0000000000..47e49dddc5
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_nec_wr8750n.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "ar9344_nec_aterm.dtsi"
+
+/ {
+	compatible = "nec,wr8750n", "qca,ar9344";
+	model = "NEC Aterm WR8750N";
+};
+
+&partitions {
+	partition@40000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x040000 0x7c0000>;
+	};
+};
diff --git a/target/linux/ath79/dts/ar9344_nec_wr9500n.dts b/target/linux/ath79/dts/ar9344_nec_wr9500n.dts
new file mode 100644
index 0000000000..1919e09829
--- /dev/null
+++ b/target/linux/ath79/dts/ar9344_nec_wr9500n.dts
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "ar9344_nec_aterm.dtsi"
+
+/ {
+	compatible = "nec,wr9500n", "qca,ar9344";
+	model = "NEC Aterm WR9500N";
+};
+
+&keys {
+	switch-converter {
+		label = "cnv";
+		gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+		linux,code = <BTN_2>;
+		debounce-interval = <60>;
+	};
+};
+
+&ath9k_leds {
+	led-10 {
+		gpios = <&ath9k 14 GPIO_ACTIVE_LOW>;
+		color = <LED_COLOR_ID_GREEN>;
+		function = "converter";
+	};
+
+	led-11 {
+		gpios = <&ath9k 15 GPIO_ACTIVE_LOW>;
+		color = <LED_COLOR_ID_RED>;
+		function = "converter";
+	};
+};
+
+&partitions {
+	partition@40000 {
+		compatible = "denx,uimage";
+		label = "firmware";
+		reg = <0x040000 0xfc0000>;
+	};
+};
diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index f63e93f978..c6fcea1abd 100644
--- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -1162,33 +1162,10 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 {
 	struct ag71xx *ag = netdev_priv(dev);
 
+	if (ag->phy_dev == NULL)
+		return -ENODEV;
 
-	switch (cmd) {
-	case SIOCSIFHWADDR:
-		if (copy_from_user
-			((void*)dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr)))
-			return -EFAULT;
-		return 0;
-
-	case SIOCGIFHWADDR:
-		if (copy_to_user
-			(ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr)))
-			return -EFAULT;
-		return 0;
-
-	case SIOCGMIIPHY:
-	case SIOCGMIIREG:
-	case SIOCSMIIREG:
-		if (ag->phy_dev == NULL)
-			break;
-
-		return phy_mii_ioctl(ag->phy_dev, ifr, cmd);
-
-	default:
-		break;
-	}
-
-	return -EOPNOTSUPP;
+	return phy_mii_ioctl(ag->phy_dev, ifr, cmd);
 }
 
 static void ag71xx_oom_timer_handler(struct timer_list *t)
@@ -1501,7 +1478,7 @@ static const struct net_device_ops ag71xx_netdev_ops = {
 	.ndo_open		= ag71xx_open,
 	.ndo_stop		= ag71xx_stop,
 	.ndo_start_xmit		= ag71xx_hard_start_xmit,
-	.ndo_do_ioctl		= ag71xx_do_ioctl,
+	.ndo_eth_ioctl		= ag71xx_do_ioctl,
 	.ndo_tx_timeout		= ag71xx_tx_timeout,
 	.ndo_change_mtu		= ag71xx_change_mtu,
 	.ndo_set_mac_address	= eth_mac_addr,
diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network
index 7905d6e496..ccb296a62a 100644
--- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
@@ -52,6 +52,7 @@ ath79_setup_interfaces()
 	glinet,gl-ar300m-lite|\
 	glinet,gl-usb150|\
 	hak5,wifi-pineapple-nano|\
+	huawei,ap6010dn|\
 	meraki,mr16|\
 	netgear,ex7300|\
 	netgear,ex7300-v2|\
diff --git a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh
index 076a785cbf..c61c48b00e 100644
--- a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh
@@ -68,7 +68,8 @@ platform_do_upgrade() {
 		ROOTFS_FILE="root.squashfs"
 		platform_do_upgrade_failsafe_datachk "$1"
 		;;
-	huawei,ap5030dn)
+	huawei,ap5030dn|\
+	huawei,ap6010dn)
 		# Store beginning address of the "firmware" partition
 		# as KernelA address and KernelB address, each to BootupA & BootupB
 		# This is the address from which the bootloader will try to load the kernel.
diff --git a/target/linux/ath79/image/common-nec.mk b/target/linux/ath79/image/common-nec.mk
new file mode 100644
index 0000000000..7981a72d8e
--- /dev/null
+++ b/target/linux/ath79/image/common-nec.mk
@@ -0,0 +1,25 @@
+DEVICE_VARS += NEC_FW_TYPE
+
+define Build/nec-usbaterm-fw
+  $(STAGING_DIR_HOST)/bin/nec-usbatermfw $@.new -t $(NEC_FW_TYPE) $(1)
+  mv $@.new $@
+endef
+
+define Device/nec-netbsd-aterm
+  DEVICE_VENDOR := NEC
+  LOADER_TYPE := bin
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+  ARTIFACTS := uboot.bin
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+  COMPILE := loader-$(1).bin
+  COMPILE/loader-$(1).bin := loader-okli-compile
+  ARTIFACTS += initramfs-factory.bin
+  ARTIFACT/initramfs-factory.bin := append-image-stage initramfs-kernel.bin | \
+	pad-to 4 skip=16 | \
+	nec-usbaterm-fw -f 0x0003 -d $$(KDIR)/loader-$(1).bin -d $$$$@ | check-size
+endif
+  UBOOT_PATH := $$(STAGING_DIR_IMAGE)/$$(SOC)_nec_aterm-u-boot.bin
+  ARTIFACT/uboot.bin := append-uboot | check-size 128k
+  DEVICE_PACKAGES := kmod-usb2 -uboot-envtools
+endef
diff --git a/target/linux/ath79/image/generic-ubnt.mk b/target/linux/ath79/image/generic-ubnt.mk
index f7bab4b697..2faf51949a 100644
--- a/target/linux/ath79/image/generic-ubnt.mk
+++ b/target/linux/ath79/image/generic-ubnt.mk
@@ -24,6 +24,7 @@ define Device/ubnt_amplifi-router-hd
   UBNT_TYPE := AFi-R
   UBNT_VERSION := 3.6.3
   SOC := qca9563
+  DEVICE_VENDOR := Ubiquiti
   DEVICE_MODEL := AmpliFi Router HD
   UBNT_CHIP := qca956x
   DEVICE_PACKAGES += kmod-ath10k-ct-smallbuffers ath10k-firmware-qca988x-ct kmod-usb2
diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
index f6dba8604d..00aa688156 100644
--- a/target/linux/ath79/image/generic.mk
+++ b/target/linux/ath79/image/generic.mk
@@ -1806,6 +1806,21 @@ define Device/huawei_ap5030dn
 endef
 TARGET_DEVICES += huawei_ap5030dn
 
+define Device/huawei_ap6010dn
+  SOC := ar9344
+  DEVICE_VENDOR := Huawei
+  DEVICE_MODEL := AP6010DN
+  LOADER_TYPE := bin
+  LOADER_FLASH_OFFS := 0x111DC0
+  KERNEL_SIZE := 15360k
+  IMAGE_SIZE := 30720k
+  COMPILE := loader-$(1).bin
+  COMPILE/loader-$(1).bin := loader-okli-compile | pad-to 64k | uImage none
+  KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x4f4b4c49 | loader-okli $(1) 8128
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+endef
+TARGET_DEVICES += huawei_ap6010dn
+
 define Device/iodata_etg3-r
   SOC := ar9342
   DEVICE_VENDOR := I-O DATA
diff --git a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h
index e7d7683973..9dc7c0f817 100644
--- a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h
+++ b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h
@@ -670,6 +670,7 @@
 #define AR934X_GPIO_FUNC_SPI_CS_0_EN	BIT(13)
 
 #define AR934X_GPIO_OUT_GPIO		0x00
+#define AR934X_GPIO_OUTSEL_CLK_OBS4 0x14
 
 #define QCA955X_GPIO_OUTSEL_CLK_OBS5		0x54
 
diff --git a/target/linux/ath79/image/lzma-loader/src/board.c b/target/linux/ath79/image/lzma-loader/src/board.c
index 13926e9b1e..0d92f3174b 100644
--- a/target/linux/ath79/image/lzma-loader/src/board.c
+++ b/target/linux/ath79/image/lzma-loader/src/board.c
@@ -182,34 +182,107 @@ static inline void mr18_init(void)
 static inline void mr18_init(void) { }
 #endif
 
-#ifdef CONFIG_BOARD_HUAWEI_AP5030DN
-static inline void ap5030dn_init(void)
+#if defined(CONFIG_BOARD_HUAWEI_AP5030DN) || defined(CONFIG_BOARD_HUAWEI_AP6010DN)
+static inline void huawei_ap_init(void)
 {
-	const unsigned int ap5030dn_watchdog_gpio = 15;
+	const unsigned int watchdog_gpio = 15;
 	unsigned int gpiobase, reg;
 
 	gpiobase = KSEG1ADDR(AR71XX_GPIO_BASE);
 
-	printf("Huawei AP5030DN\n");
+	printf("Huawei AP\n");
 
 	reg = READREG(gpiobase + AR71XX_GPIO_REG_OE);
 	WRITEREG(gpiobase + AR71XX_GPIO_REG_OE,
-			reg & ~(1 << ap5030dn_watchdog_gpio));
+			reg & ~(1 << watchdog_gpio));
 
 	/* Set GPIO15 MUX to output CLK_OBS5 (= CPU_CLK/4)
-	 * to keep the watchdog happy until wdt-gpio takes over
+	 * or CLK_OBS4 (= AHB_CLK/2) to keep the watchdog happy
+	 * until wdt-gpio takes over
 	 */
 	reg = READREG(gpiobase + AR934X_GPIO_REG_OUT_FUNC3);
+#if defined(CONFIG_BOARD_HUAWEI_AP5030DN)
 	WRITEREG(gpiobase + AR934X_GPIO_REG_OUT_FUNC3,
 			reg | (QCA955X_GPIO_OUTSEL_CLK_OBS5 << 24));
+#else if defined(CONFIG_BOARD_HUAWEI_AP6010DN)
+	WRITEREG(gpiobase + AR934X_GPIO_REG_OUT_FUNC3,
+			reg | (AR934X_GPIO_OUTSEL_CLK_OBS4 << 24));
+#endif
+}
+#else
+static inline void huawei_ap_init(void) {}
+#endif
+
+#if defined(CONFIG_BOARD_NEC_WG600HP) || \
+    defined(CONFIG_BOARD_NEC_WR8750N) || \
+    defined(CONFIG_BOARD_NEC_WR9500N)
+
+#define AR934X_PLL_SWITCH_CLK_CTRL_REG			0x24
+#define AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL	BIT(0)
+
+static inline void nec_aterm_init(void)
+{
+	unsigned int reg, val;
+
+	printf("NEC Aterm series (AR9344)\n");
+
+	/* set REFCLK=40MHz to switch PLL */
+	reg = KSEG1ADDR(AR71XX_PLL_BASE);
+	val = READREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG);
+	val &= ~AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL;
+	WRITEREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG, val);
+
+	reg = KSEG1ADDR(AR71XX_RESET_BASE);
+#ifndef LOADADDR
+	/*
+	 * This is for initramfs-factory image.
+	 * When the system was reset by power source or FULL_CHIP_RESET
+	 * and started from the OEM bootloader with a dummy tp data
+	 * (this loader), reset again by timeout of the watchdog timer
+	 * to load an actual OpenWrt initramfs image in firmware block
+	 * in a factory image.
+	 * Note: On the stock firmware, TP block contains a POST function
+	 *       and sub commands of "tp" command.
+	 *
+	 * Behaviors of OEM bootloader:
+	 *
+	 * - reset by watchdog (ex.: rebooting on the stock firmware):
+	 *   called as "SOFT-RESET", boot a firmware without POST
+	 *
+	 * - reset by FULL_CHIP_RESET (or powering on):
+	 *   called as "HARD-RESET", run POST and boot a firmware
+	 */
+	printf("\n## booted with dummy tp (lzma-loader),"
+	       " waiting reset... (count: 0x%08x) ##\n",
+	       READREG(reg + AR71XX_RESET_REG_WDOG));
+	while (1);
+#endif
+	/*
+	 * set maximum watchdog count to avoid reset while
+	 * booting from stock bootloader
+	 */
+	WRITEREG(reg + AR71XX_RESET_REG_WDOG, 0xffffffff);
+
+	/*
+	 * deassert some RESET bits not handled by drivers
+	 * and mainline U-Boot
+	 *
+	 * - ETH_SWITCH(_ANALOG): eth0
+	 * - RTC                : wmac
+	 */
+	val = READREG(reg + AR934X_RESET_REG_RESET_MODULE);
+	val &= ~(AR934X_RESET_ETH_SWITCH | AR934X_RESET_ETH_SWITCH_ANALOG |
+		 AR934X_RESET_RTC);
+	WRITEREG(reg + AR934X_RESET_REG_RESET_MODULE, val);
 }
 #else
-static inline void ap5030dn_init(void) { }
+static inline void nec_aterm_init(void) {}
 #endif
 
 void board_init(void)
 {
 	tlwr1043nd_init();
 	mr18_init();
-	ap5030dn_init();
+	huawei_ap_init();
+	nec_aterm_init();
 }
diff --git a/target/linux/ath79/image/tiny.mk b/target/linux/ath79/image/tiny.mk
index 955d0fbff2..53111119d8 100644
--- a/target/linux/ath79/image/tiny.mk
+++ b/target/linux/ath79/image/tiny.mk
@@ -1,4 +1,5 @@
 include ./common-buffalo.mk
+include ./common-nec.mk
 include ./common-senao.mk
 
 define Device/buffalo_whr-g301n
@@ -120,6 +121,36 @@ define Device/engenius_enh202-v1
 endef
 TARGET_DEVICES += engenius_enh202-v1
 
+define Device/nec_wg600hp
+  DEVICE_MODEL := Aterm WG600HP
+  SOC := ar9344
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7936k
+  NEC_FW_TYPE := H044
+  $(Device/nec-netbsd-aterm)
+endef
+TARGET_DEVICES += nec_wg600hp
+
+define Device/nec_wr8750n
+  SOC := ar9344
+  DEVICE_MODEL := Aterm WR8750N
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7936k
+  NEC_FW_TYPE := H033a
+  $(Device/nec-netbsd-aterm)
+endef
+TARGET_DEVICES += nec_wr8750n
+
+define Device/nec_wr9500n
+  SOC := ar9344
+  DEVICE_MODEL := Aterm WR9500N
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 16128k
+  NEC_FW_TYPE := H033
+  $(Device/nec-netbsd-aterm)
+endef
+TARGET_DEVICES += nec_wr9500n
+
 define Device/pqi_air-pen
   SOC := ar9330
   DEVICE_VENDOR := PQI
diff --git a/target/linux/ath79/patches-6.6/317-MIPS-pci-ar724x-clear-power-down-of-pll-on-AR934x.patch b/target/linux/ath79/patches-6.6/317-MIPS-pci-ar724x-clear-power-down-of-pll-on-AR934x.patch
new file mode 100644
index 0000000000..dfb7e483a7
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/317-MIPS-pci-ar724x-clear-power-down-of-pll-on-AR934x.patch
@@ -0,0 +1,34 @@
+From f2ca10b22ace3ce53b4e3f189bf1dd53a4482475 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Fri, 26 Apr 2024 23:53:58 +0900
+Subject: [PATCH 1/2] MIPS: pci-ar724x: clear power down of pll on AR934x
+
+Fix PCIe initialization on AR934x by clearing PLL_PWD bit in addition to
+PPL_RESET bit of AR724x.
+
+Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+---
+
+--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+@@ -347,6 +347,8 @@
+ #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL	BIT(21)
+ #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL	BIT(24)
+ 
++#define AR934X_PLL_PCIE_CONFIG_PLL_PWD		BIT(30)
++
+ #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL	BIT(6)
+ 
+ #define QCA953X_PLL_CPU_CONFIG_REG		0x00
+--- a/arch/mips/pci/pci-ar724x.c
++++ b/arch/mips/pci/pci-ar724x.c
+@@ -360,7 +360,8 @@ static void ar724x_pci_hw_init(struct ar
+ 	} else {
+ 		/* remove the reset of the PCIE PLL */
+ 		ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+-		ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
++		ppl &= ~(AR934X_PLL_PCIE_CONFIG_PLL_PWD |
++			 AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET);
+ 		ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ 
+ 		/* deassert bypass for the PCIE PLL */
diff --git a/target/linux/ath79/patches-6.6/318-MIPS-pci-ar724x-deassert-the-reset-of-PCIe-endpoint.patch b/target/linux/ath79/patches-6.6/318-MIPS-pci-ar724x-deassert-the-reset-of-PCIe-endpoint.patch
new file mode 100644
index 0000000000..c906bdbbb6
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/318-MIPS-pci-ar724x-deassert-the-reset-of-PCIe-endpoint.patch
@@ -0,0 +1,41 @@
+From 859c93981a8994ffa69967b44b247d2e7d6a01f1 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Fri, 26 Apr 2024 23:54:57 +0900
+Subject: [PATCH 2/2] MIPS: pci-ar724x: deassert the reset of PCIe endpoint
+
+Fix PCIe initialization by de-assertion of PCIe endpoint reset.
+
+Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+---
+
+--- a/arch/mips/pci/pci-ar724x.c
++++ b/arch/mips/pci/pci-ar724x.c
+@@ -25,6 +25,7 @@
+ 
+ #define AR724X_PCI_APP_LTSSM_ENABLE	BIT(0)
+ 
++#define AR724X_PCI_RESET_EP_RESET_L	BIT(2)
+ #define AR724X_PCI_RESET_LINK_UP	BIT(0)
+ 
+ #define AR724X_PCI_INT_DEV0		BIT(14)
+@@ -340,7 +341,7 @@ static void ar724x_pci_irq_init(struct a
+ 
+ static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc)
+ {
+-	u32 ppl, app;
++	u32 ppl, rst, app;
+ 	int wait = 0;
+ 
+ 	/* deassert PCIe host controller and PCIe PHY reset */
+@@ -370,6 +371,11 @@ static void ar724x_pci_hw_init(struct ar
+ 		ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ 	}
+ 
++	/* deassert the reset state of the PCIE endpoint */
++	rst = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET);
++	rst |= AR724X_PCI_RESET_EP_RESET_L;
++	__raw_writel(rst, apc->ctrl_base + AR724X_PCI_REG_RESET);
++
+ 	/* set PCIE Application Control to ready */
+ 	app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
+ 	app |= AR724X_PCI_APP_LTSSM_ENABLE;
diff --git a/target/linux/ath79/patches-6.6/330-missing-registers.patch b/target/linux/ath79/patches-6.6/330-missing-registers.patch
index 74789437ec..d05e741c7e 100644
--- a/target/linux/ath79/patches-6.6/330-missing-registers.patch
+++ b/target/linux/ath79/patches-6.6/330-missing-registers.patch
@@ -7,7 +7,7 @@ Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for
 
 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -1231,6 +1231,10 @@
+@@ -1233,6 +1233,10 @@
  #define AR934X_ETH_CFG_RDV_DELAY        BIT(16)
  #define AR934X_ETH_CFG_RDV_DELAY_MASK   0x3
  #define AR934X_ETH_CFG_RDV_DELAY_SHIFT  16
diff --git a/target/linux/ath79/patches-6.6/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/target/linux/ath79/patches-6.6/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch
index c2f228dfe1..5d9c77c69f 100644
--- a/target/linux/ath79/patches-6.6/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch
+++ b/target/linux/ath79/patches-6.6/331-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch
@@ -16,7 +16,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 
 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -1251,7 +1251,12 @@
+@@ -1253,7 +1253,12 @@
   */
  
  #define QCA955X_GMAC_REG_ETH_CFG	0x00
@@ -29,7 +29,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  
  #define QCA955X_ETH_CFG_RGMII_EN	BIT(0)
  #define QCA955X_ETH_CFG_MII_GE0		BIT(1)
-@@ -1273,9 +1278,58 @@
+@@ -1275,9 +1280,58 @@
  #define QCA955X_ETH_CFG_TXE_DELAY_MASK	0x3
  #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT	20
  
diff --git a/target/linux/ath79/patches-6.6/332-ath79-sgmii-config.patch b/target/linux/ath79/patches-6.6/332-ath79-sgmii-config.patch
index a6a50e4a8a..6f6217ce75 100644
--- a/target/linux/ath79/patches-6.6/332-ath79-sgmii-config.patch
+++ b/target/linux/ath79/patches-6.6/332-ath79-sgmii-config.patch
@@ -21,7 +21,7 @@ Submitted-by: David Bauer <mail@david-bauer.net>
 
 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -1380,5 +1380,6 @@
+@@ -1382,5 +1382,6 @@
  
  #define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT	0
  #define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK	0x7
diff --git a/target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch
new file mode 100644
index 0000000000..a3bdf890c4
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/340-register_gpio_driver_earlier.patch
@@ -0,0 +1,26 @@
+From: John Crispin <john@phrozen.org>
+Subject: ath79: Register GPIO driver earlier
+
+HACK: register the GPIO driver earlier to ensure that gpio_request calls
+from mach files succeed.
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/gpio/gpio-ath79.c                     | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpio/gpio-ath79.c
++++ b/drivers/gpio/gpio-ath79.c
+@@ -300,7 +300,11 @@ static struct platform_driver ath79_gpio
+ 	.probe = ath79_gpio_probe,
+ };
+ 
+-module_platform_driver(ath79_gpio_driver);
++static int __init ath79_gpio_init(void)
++{
++	return platform_driver_register(&ath79_gpio_driver);
++}
++postcore_initcall(ath79_gpio_init);
+ 
+ MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support");
+ MODULE_LICENSE("GPL v2");
diff --git a/target/linux/ath79/patches-6.6/360-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-6.6/360-MIPS-ath79-export-UART1-reference-clock.patch
index b24ff21692..ae2f5aa0cd 100644
--- a/target/linux/ath79/patches-6.6/360-MIPS-ath79-export-UART1-reference-clock.patch
+++ b/target/linux/ath79/patches-6.6/360-MIPS-ath79-export-UART1-reference-clock.patch
@@ -45,8 +45,8 @@ Submitted-by: Daniel Golle <daniel@makrotopia.org>
  		goto err_iounmap;
 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -348,6 +348,7 @@
- #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL	BIT(24)
+@@ -350,6 +350,7 @@
+ #define AR934X_PLL_PCIE_CONFIG_PLL_PWD		BIT(30)
  
  #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL	BIT(6)
 +#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL	BIT(7)
diff --git a/target/linux/ath79/patches-6.6/430-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-6.6/430-mtd-ar934x-nand-driver.patch
index 603750cbe9..fc4c3804a7 100644
--- a/target/linux/ath79/patches-6.6/430-mtd-ar934x-nand-driver.patch
+++ b/target/linux/ath79/patches-6.6/430-mtd-ar934x-nand-driver.patch
@@ -9,7 +9,7 @@ SVN-Revision: 33385
 
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
-@@ -543,4 +543,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
+@@ -542,4 +542,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
  	  load time (assuming you build diskonchip as a module) with the module
  	  parameter "inftl_bbt_write=1".
  
diff --git a/target/linux/ath79/patches-6.6/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch b/target/linux/ath79/patches-6.6/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch
index 980c265fe6..330c0d139b 100644
--- a/target/linux/ath79/patches-6.6/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch
+++ b/target/linux/ath79/patches-6.6/810-ath79-ignore-the-abused-interrupt-map-on-pcie-node.patch
@@ -22,7 +22,7 @@ Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
 
 --- a/drivers/of/irq.c
 +++ b/drivers/of/irq.c
-@@ -86,6 +86,8 @@ EXPORT_SYMBOL_GPL(of_irq_find_parent);
+@@ -89,6 +89,8 @@ EXPORT_SYMBOL_GPL(of_irq_find_parent);
   * drawing board.
   */
  static const char * const of_irq_imap_abusers[] = {
diff --git a/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch b/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch
index 49a65ec622..c09a095236 100644
--- a/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch
+++ b/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch
@@ -259,7 +259,7 @@ SVN-Revision: 35130
  #include <linux/uaccess.h>
  #include <linux/ipv6.h>
  #include <linux/icmpv6.h>
-@@ -897,10 +898,10 @@ static void tcp_v6_send_response(const s
+@@ -893,10 +894,10 @@ static void tcp_v6_send_response(const s
  	topt = (__be32 *)(t1 + 1);
  
  	if (tsecr) {
@@ -350,7 +350,7 @@ SVN-Revision: 35130
  	list_for_each_entry(p, head, list) {
 --- a/net/ipv4/tcp_output.c
 +++ b/net/ipv4/tcp_output.c
-@@ -620,48 +620,53 @@ static void tcp_options_write(struct tcp
+@@ -622,48 +622,53 @@ static void tcp_options_write(struct tcp
  	u16 options = opts->options;	/* mungable copy */
  
  	if (unlikely(OPTION_MD5 & options)) {
@@ -427,7 +427,7 @@ SVN-Revision: 35130
  	}
  
  	if (unlikely(opts->num_sack_blocks)) {
-@@ -669,16 +674,17 @@ static void tcp_options_write(struct tcp
+@@ -671,16 +676,17 @@ static void tcp_options_write(struct tcp
  			tp->duplicate_sack : tp->selective_acks;
  		int this_sack;
  
@@ -451,7 +451,7 @@ SVN-Revision: 35130
  		}
  
  		tp->rx_opt.dsack = 0;
-@@ -691,13 +697,14 @@ static void tcp_options_write(struct tcp
+@@ -693,13 +699,14 @@ static void tcp_options_write(struct tcp
  
  		if (foc->exp) {
  			len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len;
@@ -751,7 +751,7 @@ SVN-Revision: 35130
  EXPORT_SYMBOL(xfrm_parse_spi);
 --- a/net/ipv4/tcp_input.c
 +++ b/net/ipv4/tcp_input.c
-@@ -4188,14 +4188,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -4225,14 +4225,16 @@ static bool tcp_parse_aligned_timestamp(
  {
  	const __be32 *ptr = (const __be32 *)(th + 1);
  
diff --git a/target/linux/ath79/patches-6.6/910-mikrotik-rb4xx.patch b/target/linux/ath79/patches-6.6/910-mikrotik-rb4xx.patch
index 980f29eef1..674cc2fe66 100644
--- a/target/linux/ath79/patches-6.6/910-mikrotik-rb4xx.patch
+++ b/target/linux/ath79/patches-6.6/910-mikrotik-rb4xx.patch
@@ -97,7 +97,7 @@ Submitted-by: Christopher Hill <ch6574@gmail.com>
  obj-$(CONFIG_GPIO_RDA)			+= gpio-rda.o
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
-@@ -551,4 +551,11 @@ config MTD_NAND_AR934X
+@@ -550,4 +550,11 @@ config MTD_NAND_AR934X
  	  Enables support for NAND controller on Qualcomm Atheros SoCs.
  	  This controller is found on AR934x and QCA955x SoCs.
  
diff --git a/target/linux/ath79/patches-6.6/911-mikrotik-rb91x.patch b/target/linux/ath79/patches-6.6/911-mikrotik-rb91x.patch
index e610a4ff14..ddb7b52cbe 100644
--- a/target/linux/ath79/patches-6.6/911-mikrotik-rb91x.patch
+++ b/target/linux/ath79/patches-6.6/911-mikrotik-rb91x.patch
@@ -73,7 +73,7 @@ Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
  obj-$(CONFIG_GPIO_RDA)			+= gpio-rda.o
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
-@@ -558,4 +558,10 @@ config MTD_NAND_RB4XX
+@@ -557,4 +557,10 @@ config MTD_NAND_RB4XX
  	  Enables support for the NAND flash chip on Mikrotik Routerboard
  	  RB4xx series.
  
diff --git a/target/linux/ath79/tiny/base-files/etc/board.d/02_network b/target/linux/ath79/tiny/base-files/etc/board.d/02_network
index fa2ea3aa6f..a204e820ca 100644
--- a/target/linux/ath79/tiny/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/tiny/base-files/etc/board.d/02_network
@@ -69,6 +69,13 @@ ath79_setup_interfaces()
 		ucidef_add_switch "switch0" \
 			"0@eth1" "4:lan:1"
 		;;
+	nec,wg600hp|\
+	nec,wr8750n|\
+	nec,wr9500n|\
+	tplink,tl-wr941n-v7-cn)
+		ucidef_add_switch "switch0" \
+			"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
+		;;
 	tplink,tl-mr3220-v1|\
 	tplink,tl-mr3420-v1|\
 	tplink,tl-mr3420-v3|\
@@ -105,10 +112,6 @@ ath79_setup_interfaces()
 	tplink,tl-wr941-v2)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
 		;;
-	tplink,tl-wr941n-v7-cn)
-		ucidef_add_switch "switch0" \
-			"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
-		;;
 	ubnt,airrouter)
 		ucidef_set_interface_wan "eth1"
 		ucidef_add_switch "switch0" \
@@ -152,6 +155,12 @@ ath79_setup_macs()
 	ubnt,picostation-m)
 		label_mac=$(cat /sys/class/ieee80211/phy0/macaddress)
 		;;
+	nec,wg600hp|\
+	nec,wr8750n|\
+	nec,wr9500n)
+		wan_mac=$(mtd_get_mac_binary config 0xc)
+		label_mac=$wan_mac
+		;;
 	tplink,tl-wr941-v2|\
 	tplink,tl-wr941n-v7-cn)
 		base_mac=$(mtd_get_mac_binary u-boot 0x1fc00)
diff --git a/target/linux/ath79/tiny/base-files/lib/upgrade/platform.sh b/target/linux/ath79/tiny/base-files/lib/upgrade/platform.sh
index eb8441c6d2..8fc0efcfbd 100644
--- a/target/linux/ath79/tiny/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ath79/tiny/base-files/lib/upgrade/platform.sh
@@ -9,7 +9,23 @@ RAMFS_COPY_BIN='fw_setenv'
 RAMFS_COPY_DATA='/etc/fw_env.config'
 
 platform_check_image() {
-	return 0
+	local board=$(board_name)
+
+	case "$board" in
+	nec,wg600hp|\
+	nec,wr8750n|\
+	nec,wr9500n)
+		local uboot_mtd=$(find_mtd_part "bootloader")
+
+		# check "U-Boot <year>.<month>" string in the "bootloader" partition
+		if ! grep -q "U-Boot [0-9]\{4\}\.[0-9]\{2\}" $uboot_mtd; then
+			v "The bootloader doesn't seem to be replaced to U-Boot!"
+			return 1
+		fi
+		;;
+	*)
+		return 0
+	esac
 }
 
 platform_do_upgrade() {
diff --git a/target/linux/bcm27xx/bcm2708/config-6.6 b/target/linux/bcm27xx/bcm2708/config-6.6
index cd978837ea..2b99291189 100644
--- a/target/linux/bcm27xx/bcm2708/config-6.6
+++ b/target/linux/bcm27xx/bcm2708/config-6.6
@@ -204,6 +204,7 @@ CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HWMON=y
 CONFIG_HW_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_BCM2835=y
@@ -366,6 +367,7 @@ CONFIG_THERMAL=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
 CONFIG_THREAD_INFO_IN_TASK=y
 CONFIG_TICK_CPU_ACCOUNTING=y
diff --git a/target/linux/bcm27xx/bcm2709/config-6.6 b/target/linux/bcm27xx/bcm2709/config-6.6
index 1a034b3e71..d074bc862f 100644
--- a/target/linux/bcm27xx/bcm2709/config-6.6
+++ b/target/linux/bcm27xx/bcm2709/config-6.6
@@ -262,6 +262,7 @@ CONFIG_HIGHPTE=y
 CONFIG_HOTPLUG_CORE_SYNC=y
 CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_HWMON=y
 CONFIG_HW_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_BCM2835=y
@@ -461,6 +462,7 @@ CONFIG_THERMAL=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
 CONFIG_THREAD_INFO_IN_TASK=y
 CONFIG_TICK_CPU_ACCOUNTING=y
diff --git a/target/linux/bcm27xx/bcm2710/config-6.6 b/target/linux/bcm27xx/bcm2710/config-6.6
index 4ab0e03ee2..b2aca5a89c 100644
--- a/target/linux/bcm27xx/bcm2710/config-6.6
+++ b/target/linux/bcm27xx/bcm2710/config-6.6
@@ -268,6 +268,7 @@ CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HOTPLUG_CORE_SYNC=y
 CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_HWMON=y
 CONFIG_HW_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_BCM2835=y
@@ -459,6 +460,7 @@ CONFIG_THERMAL=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
 CONFIG_THERMAL_WRITABLE_TRIPS=y
 CONFIG_THREAD_INFO_IN_TASK=y
diff --git a/target/linux/bcm27xx/bcm2711/config-6.6 b/target/linux/bcm27xx/bcm2711/config-6.6
index 915fe29cae..fe9f52368e 100644
--- a/target/linux/bcm27xx/bcm2711/config-6.6
+++ b/target/linux/bcm27xx/bcm2711/config-6.6
@@ -269,6 +269,7 @@ CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HOTPLUG_CORE_SYNC=y
 CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_HWMON=y
 CONFIG_HW_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_IPROC_RNG200=y
@@ -465,6 +466,7 @@ CONFIG_THERMAL=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
 CONFIG_THERMAL_WRITABLE_TRIPS=y
 CONFIG_THREAD_INFO_IN_TASK=y
diff --git a/target/linux/bcm27xx/bcm2712/config-6.6 b/target/linux/bcm27xx/bcm2712/config-6.6
index f61986338b..d4a27e17f7 100644
--- a/target/linux/bcm27xx/bcm2712/config-6.6
+++ b/target/linux/bcm27xx/bcm2712/config-6.6
@@ -583,6 +583,7 @@ CONFIG_THERMAL=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
 CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
 CONFIG_THERMAL_WRITABLE_TRIPS=y
 CONFIG_THREAD_INFO_IN_TASK=y
diff --git a/target/linux/bcm27xx/config-6.6 b/target/linux/bcm27xx/config-6.6
index 55f5523ab5..b44aa9f8a9 100644
--- a/target/linux/bcm27xx/config-6.6
+++ b/target/linux/bcm27xx/config-6.6
@@ -23,6 +23,7 @@
 # CONFIG_RASPBERRYPI_GPIOMEM is not set
 # CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_V2 is not set
 # CONFIG_SENSORS_RP1_ADC is not set
+# CONFIG_SPI_RP2040_GPIO_BRIDGE is not set
 # CONFIG_VIDEO_AD5398 is not set
 # CONFIG_VIDEO_ARDUCAM_64MP is not set
 # CONFIG_VIDEO_ARDUCAM_PIVARIETY is not set
diff --git a/target/linux/bcm27xx/image/Makefile b/target/linux/bcm27xx/image/Makefile
index 23bc3a35c9..279adee239 100644
--- a/target/linux/bcm27xx/image/Makefile
+++ b/target/linux/bcm27xx/image/Makefile
@@ -201,7 +201,7 @@ define Device/rpi-5
 	cypress-firmware-43455-sdio \
 	brcmfmac-nvram-43455-sdio \
 	kmod-brcmfmac wpad-basic-mbedtls \
-	kmod-hwmon-pwmfan kmod-thermal
+	kmod-hwmon-pwmfan
   IMAGE/sysupgrade.img.gz := boot-common | sdcard-img | gzip | append-metadata
   IMAGE/factory.img.gz := boot-common | sdcard-img | gzip
 endef
diff --git a/target/linux/bcm27xx/patches-6.6/950-0092-MMC-added-alternative-MMC-driver.patch b/target/linux/bcm27xx/patches-6.6/950-0092-MMC-added-alternative-MMC-driver.patch
index 3b3b8e3b57..499b2a7da3 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0092-MMC-added-alternative-MMC-driver.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0092-MMC-added-alternative-MMC-driver.patch
@@ -1993,7 +1993,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  
  #define MAX_TUNING_LOOP 40
  
-@@ -3209,7 +3209,7 @@ static void sdhci_timeout_timer(struct t
+@@ -3212,7 +3212,7 @@ static void sdhci_timeout_timer(struct t
  	spin_lock_irqsave(&host->lock, flags);
  
  	if (host->cmd && !sdhci_data_line_cmd(host->cmd)) {
@@ -2002,7 +2002,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  		       mmc_hostname(host->mmc));
  		sdhci_err_stats_inc(host, REQ_TIMEOUT);
  		sdhci_dumpregs(host);
-@@ -3232,7 +3232,7 @@ static void sdhci_timeout_data_timer(str
+@@ -3235,7 +3235,7 @@ static void sdhci_timeout_data_timer(str
  
  	if (host->data || host->data_cmd ||
  	    (host->cmd && sdhci_data_line_cmd(host->cmd))) {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0103-Improve-__copy_to_user-and-__copy_from_user-performa.patch b/target/linux/bcm27xx/patches-6.6/950-0103-Improve-__copy_to_user-and-__copy_from_user-performa.patch
index 2d546c7502..92fd35d936 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0103-Improve-__copy_to_user-and-__copy_from_user-performa.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0103-Improve-__copy_to_user-and-__copy_from_user-performa.patch
@@ -99,7 +99,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  #endif
 --- a/arch/arm/include/asm/uaccess.h
 +++ b/arch/arm/include/asm/uaccess.h
-@@ -509,6 +509,9 @@ do {									\
+@@ -499,6 +499,9 @@ do {									\
  extern unsigned long __must_check
  arm_copy_from_user(void *to, const void __user *from, unsigned long n);
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch b/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
index 0474076e77..b55df94070 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
@@ -17583,7 +17583,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  	 * For devices with more than one control interface, we assume the
 --- a/sound/usb/quirks.c
 +++ b/sound/usb/quirks.c
-@@ -2185,6 +2185,8 @@ static const struct usb_audio_quirk_flag
+@@ -2189,6 +2189,8 @@ static const struct usb_audio_quirk_flag
  		   QUIRK_FLAG_ALIGN_TRANSFER),
  	DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */
  		   QUIRK_FLAG_ALIGN_TRANSFER),
diff --git a/target/linux/bcm27xx/patches-6.6/950-0113-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch b/target/linux/bcm27xx/patches-6.6/950-0113-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch
index 14f92dfadd..1a84fb14b1 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0113-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0113-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch
@@ -10,7 +10,7 @@ Subject: [PATCH 0113/1085] ARM64: Force hardware emulation of deprecated
 
 --- a/arch/arm64/kernel/armv8_deprecated.c
 +++ b/arch/arm64/kernel/armv8_deprecated.c
-@@ -539,9 +539,14 @@ static void __init register_insn_emulati
+@@ -542,9 +542,14 @@ static void __init register_insn_emulati
  
  	switch (insn->status) {
  	case INSN_DEPRECATED:
diff --git a/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch b/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
index 73baf3312b..a5352c6c48 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
@@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1487,6 +1487,109 @@ command_cleanup:
+@@ -1497,6 +1497,109 @@ command_cleanup:
  }
  
  /*
@@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
   * non-error returns are a promise to giveback() the urb later
   * we drop ownership so next owner (or urb unlink) can get it
   */
-@@ -5316,6 +5419,7 @@ static const struct hc_driver xhci_hc_dr
+@@ -5326,6 +5429,7 @@ static const struct hc_driver xhci_hc_dr
  	.endpoint_reset =	xhci_endpoint_reset,
  	.check_bandwidth =	xhci_check_bandwidth,
  	.reset_bandwidth =	xhci_reset_bandwidth,
diff --git a/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch b/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
index 957ed42407..1e5bb6059d 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1576,7 +1576,7 @@ static void xhci_fixup_endpoint(struct u
+@@ -1586,7 +1586,7 @@ static void xhci_fixup_endpoint(struct u
  		return;
  	}
  	ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index);
diff --git a/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch b/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch
index a64754310d..c3c3353f91 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch
@@ -33,7 +33,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
  #define USB_VENDOR_ID_BELKIN		0x050d
  #define USB_DEVICE_ID_FLIP_KVM		0x3201
  
-@@ -1405,6 +1408,9 @@
+@@ -1407,6 +1410,9 @@
  #define USB_VENDOR_ID_XIAOMI		0x2717
  #define USB_DEVICE_ID_MI_SILENT_MOUSE	0x5014
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0277-kbuild-Silence-unavoidable-dtc-overlay-warnings.patch b/target/linux/bcm27xx/patches-6.6/950-0277-kbuild-Silence-unavoidable-dtc-overlay-warnings.patch
index b5e790665e..2e3de46259 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0277-kbuild-Silence-unavoidable-dtc-overlay-warnings.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0277-kbuild-Silence-unavoidable-dtc-overlay-warnings.patch
@@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/scripts/Makefile.lib
 +++ b/scripts/Makefile.lib
-@@ -428,6 +428,12 @@ cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ;
+@@ -432,6 +432,12 @@ cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ;
  	$(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
  		-i $(dir $<) $(DTC_FLAGS) \
  		-Wno-interrupts_property \
diff --git a/target/linux/bcm27xx/patches-6.6/950-0301-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch b/target/linux/bcm27xx/patches-6.6/950-0301-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch
index 15162cf6df..d5cee828b0 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0301-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0301-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch
@@ -15,7 +15,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
 
 --- a/drivers/gpu/drm/panel/panel-simple.c
 +++ b/drivers/gpu/drm/panel/panel-simple.c
-@@ -3375,6 +3375,31 @@ static const struct panel_desc rocktech_
+@@ -3376,6 +3376,31 @@ static const struct panel_desc rocktech_
  	.connector_type = DRM_MODE_CONNECTOR_DPI,
  };
  
@@ -47,7 +47,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  static const struct display_timing rocktech_rk070er9427_timing = {
  	.pixelclock = { 26400000, 33300000, 46800000 },
  	.hactive = { 800, 800, 800 },
-@@ -4426,6 +4451,9 @@ static const struct of_device_id platfor
+@@ -4427,6 +4452,9 @@ static const struct of_device_id platfor
  		.compatible = "rocktech,rk043fn48h",
  		.data = &rocktech_rk043fn48h,
  	}, {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0343-drm-panel-simple-add-Geekworm-MZP280-Panel.patch b/target/linux/bcm27xx/patches-6.6/950-0343-drm-panel-simple-add-Geekworm-MZP280-Panel.patch
index f6a3746e8d..d5a071364a 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0343-drm-panel-simple-add-Geekworm-MZP280-Panel.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0343-drm-panel-simple-add-Geekworm-MZP280-Panel.patch
@@ -46,7 +46,7 @@ Acked-by: Maxime Ripard <maxime@cerno.tech>
  static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
  	.clock = 9000,
  	.hdisplay = 480,
-@@ -4301,6 +4327,9 @@ static const struct of_device_id platfor
+@@ -4302,6 +4328,9 @@ static const struct of_device_id platfor
  		.compatible = "friendlyarm,hd702e",
  		.data = &friendlyarm_hd702e,
  	}, {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0359-mm-page_alloc-cma-introduce-a-customisable-threshold.patch b/target/linux/bcm27xx/patches-6.6/950-0359-mm-page_alloc-cma-introduce-a-customisable-threshold.patch
index 9b5cba8dab..8c39ae9931 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0359-mm-page_alloc-cma-introduce-a-customisable-threshold.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0359-mm-page_alloc-cma-introduce-a-customisable-threshold.patch
@@ -48,7 +48,7 @@ Signed-off-by: David Plowman <david.plowman@raspberrypi.com>
  /*
   * A cached value of the page's pageblock's migratetype, used when the page is
   * put on a pcplist. Used to avoid the pageblock migratetype lookup when
-@@ -2090,12 +2111,13 @@ __rmqueue(struct zone *zone, unsigned in
+@@ -2095,12 +2116,13 @@ __rmqueue(struct zone *zone, unsigned in
  	if (IS_ENABLED(CONFIG_CMA)) {
  		/*
  		 * Balance movable allocations between regular and CMA areas by
diff --git a/target/linux/bcm27xx/patches-6.6/950-0398-drm-panel-panel-ilitek9881c-Use-cansleep-methods.patch b/target/linux/bcm27xx/patches-6.6/950-0398-drm-panel-panel-ilitek9881c-Use-cansleep-methods.patch
deleted file mode 100644
index 8e68d404f6..0000000000
--- a/target/linux/bcm27xx/patches-6.6/950-0398-drm-panel-panel-ilitek9881c-Use-cansleep-methods.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 79f7bcfff7a02fd32019cac8df7908dd61e1c7f7 Mon Sep 17 00:00:00 2001
-From: Mark Williams <mwp@mwp.id.au>
-Date: Wed, 7 Dec 2022 18:20:40 -0700
-Subject: [PATCH 0398/1085] drm/panel: panel-ilitek9881c: Use cansleep methods
-
-Use cansleep version of gpiod_set_value so external IO drivers (like
-via I2C) can be used.
-
-Signed-off-by: Mark Williams <mwp@mwp.id.au>
----
- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
-+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
-@@ -1107,10 +1107,10 @@ static int ili9881c_prepare(struct drm_p
- 	msleep(5);
- 
- 	/* And reset it */
--	gpiod_set_value(ctx->reset, 1);
-+	gpiod_set_value_cansleep(ctx->reset, 1);
- 	msleep(20);
- 
--	gpiod_set_value(ctx->reset, 0);
-+	gpiod_set_value_cansleep(ctx->reset, 0);
- 	msleep(20);
- 
- 	for (i = 0; i < ctx->desc->init_length; i++) {
-@@ -1165,7 +1165,7 @@ static int ili9881c_unprepare(struct drm
- 
- 	mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
- 	regulator_disable(ctx->power);
--	gpiod_set_value(ctx->reset, 1);
-+	gpiod_set_value_cansleep(ctx->reset, 1);
- 
- 	return 0;
- }
diff --git a/target/linux/bcm27xx/patches-6.6/950-0401-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch b/target/linux/bcm27xx/patches-6.6/950-0401-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch
index a7eaaf102a..d8376a3fe5 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0401-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0401-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch
@@ -165,7 +165,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  static const struct drm_display_mode innolux_at070tn92_mode = {
  	.clock = 33333,
  	.hdisplay = 800,
-@@ -4351,6 +4383,9 @@ static const struct of_device_id platfor
+@@ -4352,6 +4384,9 @@ static const struct of_device_id platfor
  		.compatible = "innolux,at043tn24",
  		.data = &innolux_at043tn24,
  	}, {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0416-gpio-pca953x-Add-ti-tca9554-compatible-string.patch b/target/linux/bcm27xx/patches-6.6/950-0416-gpio-pca953x-Add-ti-tca9554-compatible-string.patch
index b9ec31caa5..aa11729b71 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0416-gpio-pca953x-Add-ti-tca9554-compatible-string.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0416-gpio-pca953x-Add-ti-tca9554-compatible-string.patch
@@ -10,7 +10,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/drivers/gpio/gpio-pca953x.c
 +++ b/drivers/gpio/gpio-pca953x.c
-@@ -1345,6 +1345,7 @@ static const struct of_device_id pca953x
+@@ -1347,6 +1347,7 @@ static const struct of_device_id pca953x
  	{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
  	{ .compatible = "ti,tca9538", .data = OF_953X( 8, PCA_INT), },
  	{ .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
diff --git a/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch b/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
index 9aa16d6b25..bcf94f9a6e 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
@@ -20,7 +20,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4659,6 +4659,7 @@ static const struct {
+@@ -4693,6 +4693,7 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
@@ -28,7 +28,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  	int ret = 0;
  	bool invalid_bdaddr;
  	size_t i;
-@@ -4687,7 +4688,8 @@ static int hci_dev_setup_sync(struct hci
+@@ -4721,7 +4722,8 @@ static int hci_dev_setup_sync(struct hci
  			 test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
  	if (!ret) {
  		if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) &&
diff --git a/target/linux/bcm27xx/patches-6.6/950-0490-input-ads7846-Add-missing-spi_device_id-strings.patch b/target/linux/bcm27xx/patches-6.6/950-0490-input-ads7846-Add-missing-spi_device_id-strings.patch
deleted file mode 100644
index 1b0a29a777..0000000000
--- a/target/linux/bcm27xx/patches-6.6/950-0490-input-ads7846-Add-missing-spi_device_id-strings.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 3b391ceadf0d4ab5ce45f98d2f1d41f40e5aedd7 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Fri, 1 Sep 2023 12:23:30 +0100
-Subject: [PATCH 0490/1085] input: ads7846: Add missing spi_device_id strings
-
-The SPI core logs error messages if a compatible string device
-name is not also present as an spi_device_id.
-
-No spi_device_id values are specified by the driver, therefore
-we get 4 log lines every time it is loaded:
-SPI driver ads7846 has no spi_device_id for ti,tsc2046
-SPI driver ads7846 has no spi_device_id for ti,ads7843
-SPI driver ads7846 has no spi_device_id for ti,ads7845
-SPI driver ads7846 has no spi_device_id for ti,ads7873
-
-Add the spi_device_id values for these devices.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/input/touchscreen/ads7846.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/drivers/input/touchscreen/ads7846.c
-+++ b/drivers/input/touchscreen/ads7846.c
-@@ -1114,6 +1114,16 @@ static const struct of_device_id ads7846
- };
- MODULE_DEVICE_TABLE(of, ads7846_dt_ids);
- 
-+static const struct spi_device_id ads7846_spi_ids[] = {
-+	{ "tsc2046", 0 },
-+	{ "ads7843", 0 },
-+	{ "ads7845", 0 },
-+	{ "ads7846", 0 },
-+	{ "ads7873", 0 },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(spi, ads7846_spi_ids);
-+
- static const struct ads7846_platform_data *ads7846_get_props(struct device *dev)
- {
- 	struct ads7846_platform_data *pdata;
-@@ -1390,6 +1400,7 @@ static struct spi_driver ads7846_driver
- 		.pm	= pm_sleep_ptr(&ads7846_pm),
- 		.of_match_table = ads7846_dt_ids,
- 	},
-+	.id_table	= ads7846_spi_ids,
- 	.probe		= ads7846_probe,
- 	.remove		= ads7846_remove,
- };
diff --git a/target/linux/bcm27xx/patches-6.6/950-0513-mmc-brcmstb-add-support-for-BCM2712.patch b/target/linux/bcm27xx/patches-6.6/950-0513-mmc-brcmstb-add-support-for-BCM2712.patch
index 2b0cbcd26f..5ecdd9cd18 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0513-mmc-brcmstb-add-support-for-BCM2712.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0513-mmc-brcmstb-add-support-for-BCM2712.patch
@@ -63,7 +63,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  
  #include "sdhci-cqhci.h"
  #include "sdhci-pltfm.h"
-@@ -26,18 +28,43 @@
+@@ -27,18 +29,43 @@
  
  #define BRCMSTB_PRIV_FLAGS_HAS_CQE		BIT(0)
  #define BRCMSTB_PRIV_FLAGS_GATE_CLOCK		BIT(1)
@@ -107,7 +107,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	struct sdhci_ops *ops;
  	const unsigned int flags;
  };
-@@ -94,6 +121,124 @@ static void sdhci_brcmstb_set_clock(stru
+@@ -95,6 +122,124 @@ static void sdhci_brcmstb_set_clock(stru
  	sdhci_enable_clk(host, clk);
  }
  
@@ -232,7 +232,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  static void sdhci_brcmstb_set_uhs_signaling(struct sdhci_host *host,
  					    unsigned int timing)
  {
-@@ -123,6 +268,146 @@ static void sdhci_brcmstb_set_uhs_signal
+@@ -124,6 +269,146 @@ static void sdhci_brcmstb_set_uhs_signal
  	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
  }
  
@@ -379,7 +379,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  static void sdhci_brcmstb_dumpregs(struct mmc_host *mmc)
  {
  	sdhci_dumpregs(mmc_priv(mmc));
-@@ -155,6 +440,21 @@ static struct sdhci_ops sdhci_brcmstb_op
+@@ -156,6 +441,21 @@ static struct sdhci_ops sdhci_brcmstb_op
  	.set_uhs_signaling = sdhci_set_uhs_signaling,
  };
  
@@ -401,7 +401,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  static struct sdhci_ops sdhci_brcmstb_ops_7216 = {
  	.set_clock = sdhci_brcmstb_set_clock,
  	.set_bus_width = sdhci_set_bus_width,
-@@ -179,10 +479,16 @@ static const struct brcmstb_match_priv m
+@@ -180,10 +480,16 @@ static const struct brcmstb_match_priv m
  	.ops = &sdhci_brcmstb_ops_7216,
  };
  
@@ -418,7 +418,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	{},
  };
  
-@@ -255,6 +561,8 @@ static int sdhci_brcmstb_probe(struct pl
+@@ -256,6 +562,8 @@ static int sdhci_brcmstb_probe(struct pl
  	struct sdhci_brcmstb_priv *priv;
  	u32 actual_clock_mhz;
  	struct sdhci_host *host;
@@ -427,7 +427,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	struct clk *clk;
  	struct clk *base_clk = NULL;
  	int res;
-@@ -283,6 +591,11 @@ static int sdhci_brcmstb_probe(struct pl
+@@ -284,6 +592,11 @@ static int sdhci_brcmstb_probe(struct pl
  		match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
  	}
  
@@ -439,7 +439,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	/* Map in the non-standard CFG registers */
  	priv->cfg_regs = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
  	if (IS_ERR(priv->cfg_regs)) {
-@@ -295,6 +608,43 @@ static int sdhci_brcmstb_probe(struct pl
+@@ -296,6 +609,43 @@ static int sdhci_brcmstb_probe(struct pl
  	if (res)
  		goto err;
  
@@ -483,7 +483,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	/*
  	 * Automatic clock gating does not work for SD cards that may
  	 * voltage switch so only enable it for non-removable devices.
-@@ -311,6 +661,13 @@ static int sdhci_brcmstb_probe(struct pl
+@@ -312,6 +662,13 @@ static int sdhci_brcmstb_probe(struct pl
  	    (host->mmc->caps2 & MMC_CAP2_HS400_ES))
  		host->mmc_host_ops.hs400_enhanced_strobe = match_priv->hs400es;
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0514-sdhci-Add-SD-Express-hook.patch b/target/linux/bcm27xx/patches-6.6/950-0514-sdhci-Add-SD-Express-hook.patch
index 377e5a2385..17c7d2f965 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0514-sdhci-Add-SD-Express-hook.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0514-sdhci-Add-SD-Express-hook.patch
@@ -26,7 +26,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR
  static int dwcmshc_rk35xx_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
 --- a/drivers/mmc/host/sdhci.c
 +++ b/drivers/mmc/host/sdhci.c
-@@ -3047,6 +3047,15 @@ static void sdhci_card_event(struct mmc_
+@@ -3050,6 +3050,15 @@ static void sdhci_card_event(struct mmc_
  	spin_unlock_irqrestore(&host->lock, flags);
  }
  
@@ -42,7 +42,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR
  static const struct mmc_host_ops sdhci_ops = {
  	.request	= sdhci_request,
  	.post_req	= sdhci_post_req,
-@@ -3062,6 +3071,7 @@ static const struct mmc_host_ops sdhci_o
+@@ -3065,6 +3074,7 @@ static const struct mmc_host_ops sdhci_o
  	.execute_tuning			= sdhci_execute_tuning,
  	.card_event			= sdhci_card_event,
  	.card_busy	= sdhci_card_busy,
@@ -50,7 +50,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR
  };
  
  /*****************************************************************************\
-@@ -4580,6 +4590,15 @@ int sdhci_setup_host(struct sdhci_host *
+@@ -4583,6 +4593,15 @@ int sdhci_setup_host(struct sdhci_host *
  	    !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50))
  		mmc->caps |= MMC_CAP_UHS_DDR50;
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index 4baa0a18d8..d01a37d690 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -212,7 +212,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	},
 --- a/drivers/usb/dwc3/core.c
 +++ b/drivers/usb/dwc3/core.c
-@@ -1163,6 +1163,24 @@ static void dwc3_config_threshold(struct
+@@ -1181,6 +1181,24 @@ static void dwc3_config_threshold(struct
  	}
  }
  
@@ -237,7 +237,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  /**
   * dwc3_core_init - Low-level initialization of DWC3 Core
   * @dwc: Pointer to our controller context structure
-@@ -1228,6 +1246,8 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1246,6 +1264,8 @@ static int dwc3_core_init(struct dwc3 *d
  
  	dwc3_set_incr_burst_type(dwc);
  
@@ -246,7 +246,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	ret = dwc3_phy_power_on(dwc);
  	if (ret)
  		goto err_exit_phy;
-@@ -1302,6 +1322,24 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1320,6 +1340,24 @@ static int dwc3_core_init(struct dwc3 *d
  
  	dwc3_config_threshold(dwc);
  
@@ -271,7 +271,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	return 0;
  
  err_power_off_phy:
-@@ -1445,6 +1483,7 @@ static void dwc3_get_properties(struct d
+@@ -1463,6 +1501,7 @@ static void dwc3_get_properties(struct d
  	u8			tx_thr_num_pkt_prd = 0;
  	u8			tx_max_burst_prd = 0;
  	u8			tx_fifo_resize_max_num;
@@ -279,7 +279,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	const char		*usb_psy_name;
  	int			ret;
  
-@@ -1467,6 +1506,9 @@ static void dwc3_get_properties(struct d
+@@ -1485,6 +1524,9 @@ static void dwc3_get_properties(struct d
  	 */
  	tx_fifo_resize_max_num = 6;
  
@@ -289,7 +289,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	dwc->maximum_speed = usb_get_maximum_speed(dev);
  	dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev);
  	dwc->dr_mode = usb_get_dr_mode(dev);
-@@ -1588,6 +1630,9 @@ static void dwc3_get_properties(struct d
+@@ -1606,6 +1648,9 @@ static void dwc3_get_properties(struct d
  	dwc->dis_split_quirk = device_property_read_bool(dev,
  				"snps,dis-split-quirk");
  
@@ -299,7 +299,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
  	dwc->tx_de_emphasis = tx_de_emphasis;
  
-@@ -1605,6 +1650,8 @@ static void dwc3_get_properties(struct d
+@@ -1623,6 +1668,8 @@ static void dwc3_get_properties(struct d
  	dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd;
  	dwc->tx_max_burst_prd = tx_max_burst_prd;
  
@@ -308,7 +308,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	dwc->imod_interval = 0;
  
  	dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num;
-@@ -1880,6 +1927,12 @@ static int dwc3_probe(struct platform_de
+@@ -1898,6 +1945,12 @@ static int dwc3_probe(struct platform_de
  
  	dwc3_get_properties(dwc);
  
@@ -341,7 +341,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
   * @hsphy_interface: "utmi" or "ulpi"
   * @connected: true when we're connected to a host, false otherwise
   * @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1293,6 +1297,7 @@ struct dwc3 {
+@@ -1294,6 +1298,7 @@ struct dwc3 {
  	u8			tx_max_burst_prd;
  	u8			tx_fifo_resize_max_num;
  	u8			clear_stall_protocol;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0526-mfd-Add-rp1-driver.patch b/target/linux/bcm27xx/patches-6.6/950-0526-mfd-Add-rp1-driver.patch
index 764a38ff19..b900c1edae 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0526-mfd-Add-rp1-driver.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0526-mfd-Add-rp1-driver.patch
@@ -39,11 +39,11 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  	depends on I2C && OF
 --- a/drivers/mfd/Makefile
 +++ b/drivers/mfd/Makefile
-@@ -285,3 +285,5 @@ rsmu-i2c-objs			:= rsmu_core.o rsmu_i2c.
- rsmu-spi-objs			:= rsmu_core.o rsmu_spi.o
- obj-$(CONFIG_MFD_RSMU_I2C)	+= rsmu-i2c.o
- obj-$(CONFIG_MFD_RSMU_SPI)	+= rsmu-spi.o
-+ 
+@@ -283,3 +283,5 @@ obj-$(CONFIG_MFD_ATC260X_I2C)	+= atc260x
+ 
+ obj-$(CONFIG_MFD_RSMU_I2C)	+= rsmu_i2c.o rsmu_core.o
+ obj-$(CONFIG_MFD_RSMU_SPI)	+= rsmu_spi.o rsmu_core.o
++
 +obj-$(CONFIG_MFD_RP1)		+= rp1.o
 --- /dev/null
 +++ b/drivers/mfd/rp1.c
diff --git a/target/linux/bcm27xx/patches-6.6/950-0636-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch b/target/linux/bcm27xx/patches-6.6/950-0636-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch
index ea841d4248..b72020d7e4 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0636-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0636-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch
@@ -16,7 +16,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
 
 --- a/drivers/gpu/drm/panel/panel-simple.c
 +++ b/drivers/gpu/drm/panel/panel-simple.c
-@@ -3437,11 +3437,11 @@ static const struct panel_desc rocktech_
+@@ -3438,11 +3438,11 @@ static const struct panel_desc rocktech_
  };
  
  static const struct drm_display_mode raspberrypi_7inch_mode = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0679-drm-fb-helper-Look-up-preferred-fbdev-node-number-fr.patch b/target/linux/bcm27xx/patches-6.6/950-0679-drm-fb-helper-Look-up-preferred-fbdev-node-number-fr.patch
index 5ccd9497e7..f1eafeefe7 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0679-drm-fb-helper-Look-up-preferred-fbdev-node-number-fr.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0679-drm-fb-helper-Look-up-preferred-fbdev-node-number-fr.patch
@@ -15,7 +15,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
 
 --- a/drivers/gpu/drm/drm_fb_helper.c
 +++ b/drivers/gpu/drm/drm_fb_helper.c
-@@ -1837,7 +1837,7 @@ __drm_fb_helper_initial_config_and_unloc
+@@ -1840,7 +1840,7 @@ __drm_fb_helper_initial_config_and_unloc
  	struct drm_device *dev = fb_helper->dev;
  	struct fb_info *info;
  	unsigned int width, height;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0714-spi-dw-dma-Get-the-last-DMA-scoop-out-of-the-FIFO.patch b/target/linux/bcm27xx/patches-6.6/950-0714-spi-dw-dma-Get-the-last-DMA-scoop-out-of-the-FIFO.patch
deleted file mode 100644
index 2a2ba5d037..0000000000
--- a/target/linux/bcm27xx/patches-6.6/950-0714-spi-dw-dma-Get-the-last-DMA-scoop-out-of-the-FIFO.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 6aab06ff9f81e186b1a02b53b514e691472e5a61 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.com>
-Date: Tue, 7 Nov 2023 14:49:47 +0000
-Subject: [PATCH 0714/1085] spi: dw-dma: Get the last DMA scoop out of the FIFO
-
-With a DMA FIFO threshold greater than 1 (encoded as 0), it is possible
-for data in the FIFO to be inaccessible, causing the transfer to fail
-after a timeout. If the transfer includes a transmission, reduce the
-RX threshold when the TX completes, otherwise use 1 for the whole
-transfer (inefficient, but not catastrophic at SPI data rates).
-
-See: https://github.com/raspberrypi/linux/issues/5696
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.com>
----
- drivers/spi/spi-dw-dma.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/spi/spi-dw-dma.c
-+++ b/drivers/spi/spi-dw-dma.c
-@@ -315,8 +315,10 @@ static void dw_spi_dma_tx_done(void *arg
- 	struct dw_spi *dws = arg;
- 
- 	clear_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy);
--	if (test_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy))
-+	if (test_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy)) {
-+		dw_writel(dws, DW_SPI_DMARDLR, 0);
- 		return;
-+	}
- 
- 	complete(&dws->dma_completion);
- }
-@@ -642,6 +644,8 @@ static int dw_spi_dma_transfer(struct dw
- 
- 	nents = max(xfer->tx_sg.nents, xfer->rx_sg.nents);
- 
-+	dw_writel(dws, DW_SPI_DMARDLR, xfer->tx_buf ? (dws->rxburst - 1) : 0);
-+
- 	/*
- 	 * Execute normal DMA-based transfer (which submits the Rx and Tx SG
- 	 * lists directly to the DMA engine at once) if either full hardware
diff --git a/target/linux/bcm27xx/patches-6.6/950-0716-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch b/target/linux/bcm27xx/patches-6.6/950-0716-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch
index 77361dc84c..aacc0e7653 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0716-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0716-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch
@@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
  
  	return true;
-@@ -3306,6 +3312,11 @@ static void sdhci_cmd_irq(struct sdhci_h
+@@ -3309,6 +3315,11 @@ static void sdhci_cmd_irq(struct sdhci_h
  		if (intmask & SDHCI_INT_TIMEOUT) {
  			host->cmd->error = -ETIMEDOUT;
  			sdhci_err_stats_inc(host, CMD_TIMEOUT);
diff --git a/target/linux/bcm27xx/patches-6.6/950-0757-drm-panel-add-panel-dsi.patch b/target/linux/bcm27xx/patches-6.6/950-0757-drm-panel-add-panel-dsi.patch
index d421386183..989fe3315f 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0757-drm-panel-add-panel-dsi.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0757-drm-panel-add-panel-dsi.patch
@@ -23,7 +23,7 @@ Signed-off-by: Timon Skerutsch <kernel@diodes-delight.com>
  
  /**
   * struct panel_desc - Describes a simple panel.
-@@ -4874,6 +4875,9 @@ static const struct panel_desc_dsi osd10
+@@ -4875,6 +4876,9 @@ static const struct panel_desc_dsi osd10
  	.lanes = 4,
  };
  
@@ -33,7 +33,7 @@ Signed-off-by: Timon Skerutsch <kernel@diodes-delight.com>
  static const struct of_device_id dsi_of_match[] = {
  	{
  		.compatible = "auo,b080uan01",
-@@ -4897,20 +4901,137 @@ static const struct of_device_id dsi_of_
+@@ -4898,20 +4902,137 @@ static const struct of_device_id dsi_of_
  		.compatible = "osddisplays,osd101t2045-53ts",
  		.data = &osd101t2045_53ts
  	}, {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0835-mmc-sdhci-brcmstb-remove-32-bit-accessors-for-BCM271.patch b/target/linux/bcm27xx/patches-6.6/950-0835-mmc-sdhci-brcmstb-remove-32-bit-accessors-for-BCM271.patch
index 88361d889e..04ca482a63 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0835-mmc-sdhci-brcmstb-remove-32-bit-accessors-for-BCM271.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0835-mmc-sdhci-brcmstb-remove-32-bit-accessors-for-BCM271.patch
@@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	default ARCH_BRCMSTB || BMIPS_GENERIC
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -49,10 +49,6 @@ struct sdhci_brcmstb_priv {
+@@ -50,10 +50,6 @@ struct sdhci_brcmstb_priv {
  	unsigned int flags;
  	struct clk *base_clk;
  	u32 base_freq_hz;
@@ -37,7 +37,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	struct regulator *sde_1v8;
  	struct device_node *sde_pcie;
  	void *__iomem sde_ioaddr;
-@@ -121,113 +117,6 @@ static void sdhci_brcmstb_set_clock(stru
+@@ -122,113 +118,6 @@ static void sdhci_brcmstb_set_clock(stru
  	sdhci_enable_clk(host, clk);
  }
  
@@ -151,7 +151,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  static void sdhci_brcmstb_set_power(struct sdhci_host *host, unsigned char mode,
  				  unsigned short vdd)
  {
-@@ -441,12 +330,6 @@ static struct sdhci_ops sdhci_brcmstb_op
+@@ -442,12 +331,6 @@ static struct sdhci_ops sdhci_brcmstb_op
  };
  
  static struct sdhci_ops sdhci_brcmstb_ops_2712 = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
index 612179f5e4..3028b82619 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/usb/dwc3/core.c
 +++ b/drivers/usb/dwc3/core.c
-@@ -1312,6 +1312,9 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1330,6 +1330,9 @@ static int dwc3_core_init(struct dwc3 *d
  		if (dwc->parkmode_disable_hs_quirk)
  			reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS;
  
@@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  		if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) &&
  		    (dwc->maximum_speed == USB_SPEED_HIGH ||
  		     dwc->maximum_speed == USB_SPEED_FULL))
-@@ -1610,6 +1613,8 @@ static void dwc3_get_properties(struct d
+@@ -1628,6 +1631,8 @@ static void dwc3_get_properties(struct d
  				"snps,parkmode-disable-ss-quirk");
  	dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev,
  				"snps,parkmode-disable-hs-quirk");
@@ -62,7 +62,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
   * @tx_de_emphasis: Tx de-emphasis value
   *	0	- -6dB de-emphasis
-@@ -1341,6 +1344,7 @@ struct dwc3 {
+@@ -1342,6 +1345,7 @@ struct dwc3 {
  	unsigned		ulpi_ext_vbus_drv:1;
  	unsigned		parkmode_disable_ss_quirk:1;
  	unsigned		parkmode_disable_hs_quirk:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0891-drivers-mmc-sdhci-brcmstb-fix-usage-of-SD_PIN_SEL-on.patch b/target/linux/bcm27xx/patches-6.6/950-0891-drivers-mmc-sdhci-brcmstb-fix-usage-of-SD_PIN_SEL-on.patch
index 1ccb6e6a1f..1880914986 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0891-drivers-mmc-sdhci-brcmstb-fix-usage-of-SD_PIN_SEL-on.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0891-drivers-mmc-sdhci-brcmstb-fix-usage-of-SD_PIN_SEL-on.patch
@@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -38,7 +38,8 @@
+@@ -39,7 +39,8 @@
  
  #define SDIO_CFG_SD_PIN_SEL			0x44
  #define  SDIO_CFG_SD_PIN_SEL_MASK		0x3
@@ -32,7 +32,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  
  #define SDIO_CFG_MAX_50MHZ_MODE			0x1ac
  #define  SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE	BIT(31)
-@@ -102,6 +103,42 @@ static void sdhci_brcmstb_hs400es(struct
+@@ -103,6 +104,42 @@ static void sdhci_brcmstb_hs400es(struct
  	writel(reg, host->ioaddr + SDHCI_VENDOR);
  }
  
@@ -75,7 +75,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  static void sdhci_brcmstb_set_clock(struct sdhci_host *host, unsigned int clock)
  {
  	u16 clk;
-@@ -161,22 +198,16 @@ static void sdhci_brcmstb_cfginit_2712(s
+@@ -162,22 +199,16 @@ static void sdhci_brcmstb_cfginit_2712(s
  {
  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  	struct sdhci_brcmstb_priv *brcmstb_priv = sdhci_pltfm_priv(pltfm_host);
@@ -102,7 +102,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  		reg = readl(brcmstb_priv->cfg_regs + SDIO_CFG_MAX_50MHZ_MODE);
  		reg &= ~SDIO_CFG_MAX_50MHZ_MODE_ENABLE;
  		reg |= SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE;
-@@ -190,12 +221,6 @@ static void sdhci_brcmstb_cfginit_2712(s
+@@ -191,12 +222,6 @@ static void sdhci_brcmstb_cfginit_2712(s
  		reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV;
  		reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN;
  		writel(reg, brcmstb_priv->cfg_regs + SDIO_CFG_CTRL);
@@ -115,7 +115,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	}
  }
  
-@@ -330,7 +355,7 @@ static struct sdhci_ops sdhci_brcmstb_op
+@@ -331,7 +356,7 @@ static struct sdhci_ops sdhci_brcmstb_op
  };
  
  static struct sdhci_ops sdhci_brcmstb_ops_2712 = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0981-drivers-sdhci-brcmstb-set-CQE-timer-clock-frequency.patch b/target/linux/bcm27xx/patches-6.6/950-0981-drivers-sdhci-brcmstb-set-CQE-timer-clock-frequency.patch
index fec43e0be6..cd3417e194 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0981-drivers-sdhci-brcmstb-set-CQE-timer-clock-frequency.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0981-drivers-sdhci-brcmstb-set-CQE-timer-clock-frequency.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -41,6 +41,9 @@
+@@ -42,6 +42,9 @@
  #define  SDIO_CFG_SD_PIN_SEL_SD			BIT(1)
  #define  SDIO_CFG_SD_PIN_SEL_MMC		BIT(0)
  
@@ -27,7 +27,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  #define SDIO_CFG_MAX_50MHZ_MODE			0x1ac
  #define  SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE	BIT(31)
  #define  SDIO_CFG_MAX_50MHZ_MODE_ENABLE		BIT(0)
-@@ -201,7 +204,7 @@ static void sdhci_brcmstb_cfginit_2712(s
+@@ -202,7 +205,7 @@ static void sdhci_brcmstb_cfginit_2712(s
  	u32 uhs_mask = (MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104);
  	u32 hsemmc_mask = (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS200_1_2V_SDR |
  			   MMC_CAP2_HS400_1_8V | MMC_CAP2_HS400_1_2V);
@@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  
  	/*
  	* If we support a speed that requires tuning,
-@@ -222,6 +225,11 @@ static void sdhci_brcmstb_cfginit_2712(s
+@@ -223,6 +226,11 @@ static void sdhci_brcmstb_cfginit_2712(s
  		reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN;
  		writel(reg, brcmstb_priv->cfg_regs + SDIO_CFG_CTRL);
  	}
@@ -48,7 +48,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  }
  
  static int bcm2712_init_sd_express(struct sdhci_host *host, struct mmc_ios *ios)
-@@ -493,6 +501,8 @@ static int sdhci_brcmstb_probe(struct pl
+@@ -494,6 +502,8 @@ static int sdhci_brcmstb_probe(struct pl
  		return PTR_ERR(host);
  
  	pltfm_host = sdhci_priv(host);
@@ -57,7 +57,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	priv = sdhci_pltfm_priv(pltfm_host);
  	if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
  		priv->flags |= BRCMSTB_PRIV_FLAGS_HAS_CQE;
-@@ -623,7 +633,6 @@ add_host:
+@@ -627,7 +637,6 @@ add_host:
  	if (res)
  		goto err;
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0986-Revert-net-usb-ax88179_178a-avoid-two-consecutive-de.patch b/target/linux/bcm27xx/patches-6.6/950-0986-Revert-net-usb-ax88179_178a-avoid-two-consecutive-de.patch
index 518aab3fa4..29ba36f7a0 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0986-Revert-net-usb-ax88179_178a-avoid-two-consecutive-de.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0986-Revert-net-usb-ax88179_178a-avoid-two-consecutive-de.patch
@@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/drivers/net/usb/ax88179_178a.c
 +++ b/drivers/net/usb/ax88179_178a.c
-@@ -1319,6 +1319,8 @@ static int ax88179_bind(struct usbnet *d
+@@ -1320,6 +1320,8 @@ static int ax88179_bind(struct usbnet *d
  
  	ax88179_reset(dev);
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0988-drivers-sdhci-brcmstb-work-around-mystery-CQE-CMD_ID.patch b/target/linux/bcm27xx/patches-6.6/950-0988-drivers-sdhci-brcmstb-work-around-mystery-CQE-CMD_ID.patch
index 342328ea2b..0e018a8242 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0988-drivers-sdhci-brcmstb-work-around-mystery-CQE-CMD_ID.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0988-drivers-sdhci-brcmstb-work-around-mystery-CQE-CMD_ID.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -338,6 +338,7 @@ static void sdhci_brcmstb_dumpregs(struc
+@@ -339,6 +339,7 @@ static void sdhci_brcmstb_dumpregs(struc
  static void sdhci_brcmstb_cqe_enable(struct mmc_host *mmc)
  {
  	struct sdhci_host *host = mmc_priv(mmc);
@@ -25,7 +25,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	u32 reg;
  
  	reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
-@@ -347,6 +348,9 @@ static void sdhci_brcmstb_cqe_enable(str
+@@ -348,6 +349,9 @@ static void sdhci_brcmstb_cqe_enable(str
  	}
  
  	sdhci_cqe_enable(mmc);
diff --git a/target/linux/bcm27xx/patches-6.6/950-1020-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS400es-a.patch b/target/linux/bcm27xx/patches-6.6/950-1020-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS400es-a.patch
index 110c705c64..d1cf7811b0 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1020-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS400es-a.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1020-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS400es-a.patch
@@ -14,7 +14,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -400,6 +400,8 @@ static const struct brcmstb_match_priv m
+@@ -401,6 +401,8 @@ static const struct brcmstb_match_priv m
  };
  
  static const struct brcmstb_match_priv match_priv_2712 = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1069-drm-panel-simple-Fix-7inch-panel-mode-for-misalignme.patch b/target/linux/bcm27xx/patches-6.6/950-1069-drm-panel-simple-Fix-7inch-panel-mode-for-misalignme.patch
index 29f4fb78af..6a413ec90b 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1069-drm-panel-simple-Fix-7inch-panel-mode-for-misalignme.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1069-drm-panel-simple-Fix-7inch-panel-mode-for-misalignme.patch
@@ -16,7 +16,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
 
 --- a/drivers/gpu/drm/panel/panel-simple.c
 +++ b/drivers/gpu/drm/panel/panel-simple.c
-@@ -3420,11 +3420,11 @@ static const struct drm_display_mode ras
+@@ -3421,11 +3421,11 @@ static const struct drm_display_mode ras
  	.hdisplay = 800,
  	.hsync_start = 800 + 59,
  	.hsync_end = 800 + 59 + 2,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1070-drm-panel-simple-Increase-pixel-clock-on-Pi-7inch-pa.patch b/target/linux/bcm27xx/patches-6.6/950-1070-drm-panel-simple-Increase-pixel-clock-on-Pi-7inch-pa.patch
index 30f56faf4d..68129c8de9 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1070-drm-panel-simple-Increase-pixel-clock-on-Pi-7inch-pa.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1070-drm-panel-simple-Increase-pixel-clock-on-Pi-7inch-pa.patch
@@ -21,7 +21,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
 
 --- a/drivers/gpu/drm/panel/panel-simple.c
 +++ b/drivers/gpu/drm/panel/panel-simple.c
-@@ -3416,11 +3416,11 @@ static const struct panel_desc rocktech_
+@@ -3417,11 +3417,11 @@ static const struct panel_desc rocktech_
  };
  
  static const struct drm_display_mode raspberrypi_7inch_mode = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1112-mmc-sdhci-brcmstb-add-hs400_downgrade-callback-for-b.patch b/target/linux/bcm27xx/patches-6.6/950-1112-mmc-sdhci-brcmstb-add-hs400_downgrade-callback-for-b.patch
index 3238a62827..0c9a842ce6 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1112-mmc-sdhci-brcmstb-add-hs400_downgrade-callback-for-b.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1112-mmc-sdhci-brcmstb-add-hs400_downgrade-callback-for-b.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -197,6 +197,20 @@ static void sdhci_brcmstb_set_uhs_signal
+@@ -198,6 +198,20 @@ static void sdhci_brcmstb_set_uhs_signal
  	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
  }
  
@@ -38,7 +38,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host)
  {
  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-@@ -215,6 +229,8 @@ static void sdhci_brcmstb_cfginit_2712(s
+@@ -216,6 +230,8 @@ static void sdhci_brcmstb_cfginit_2712(s
  		reg &= ~SDIO_CFG_MAX_50MHZ_MODE_ENABLE;
  		reg |= SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE;
  		writel(reg, brcmstb_priv->cfg_regs + SDIO_CFG_MAX_50MHZ_MODE);
diff --git a/target/linux/bcm27xx/patches-6.6/950-1116-mmc-sdhci-extend-maximum-ADMA-transfer-length-to-4Mi.patch b/target/linux/bcm27xx/patches-6.6/950-1116-mmc-sdhci-extend-maximum-ADMA-transfer-length-to-4Mi.patch
index 812d43b6cf..f0756b5945 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1116-mmc-sdhci-extend-maximum-ADMA-transfer-length-to-4Mi.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1116-mmc-sdhci-extend-maximum-ADMA-transfer-length-to-4Mi.patch
@@ -24,7 +24,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	BUG_ON(data->blksz > host->mmc->max_blk_size);
  	BUG_ON(data->blocks > 65535);
  
-@@ -4724,11 +4724,16 @@ int sdhci_setup_host(struct sdhci_host *
+@@ -4727,11 +4727,16 @@ int sdhci_setup_host(struct sdhci_host *
  	spin_lock_init(&host->lock);
  
  	/*
diff --git a/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch b/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch
index f521711977..6b772084fb 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1133-drivers-mmc-sdhci-brcmstb-improve-bcm2712-card-remov.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -365,8 +365,21 @@ static void sdhci_brcmstb_cqe_enable(str
+@@ -366,8 +366,21 @@ static void sdhci_brcmstb_cqe_enable(str
  
  	sdhci_cqe_enable(mmc);
  
@@ -41,7 +41,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  }
  
  static const struct cqhci_host_ops sdhci_brcmstb_cqhci_ops = {
-@@ -386,7 +399,7 @@ static struct sdhci_ops sdhci_brcmstb_op
+@@ -387,7 +400,7 @@ static struct sdhci_ops sdhci_brcmstb_op
  	.set_clock = sdhci_bcm2712_set_clock,
  	.set_power = sdhci_brcmstb_set_power,
  	.set_bus_width = sdhci_set_bus_width,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch b/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch
index 113b3fdf53..b05a8276df 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch
@@ -25,7 +25,7 @@ Signed-off-by: Dom Cobley <popcornmix@gmail.com>
 
 --- a/fs/ntfs3/fslog.c
 +++ b/fs/ntfs3/fslog.c
-@@ -3907,6 +3907,8 @@ check_restart_area:
+@@ -3914,6 +3914,8 @@ check_restart_area:
  		log->l_size = log->orig_file_size;
  		log->page_size = norm_file_page(t32, &log->l_size,
  						t32 == DefaultLogPageSize);
diff --git a/target/linux/bcm27xx/patches-6.6/950-1142-fixup-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS4.patch b/target/linux/bcm27xx/patches-6.6/950-1142-fixup-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS4.patch
index fb08ba1ad5..227d54cbbf 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1142-fixup-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS4.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1142-fixup-drivers-mmc-sdhci-brcmstb-bcm2712-supports-HS4.patch
@@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/drivers/mmc/host/sdhci-brcmstb.c
 +++ b/drivers/mmc/host/sdhci-brcmstb.c
-@@ -429,7 +429,6 @@ static const struct brcmstb_match_priv m
+@@ -430,7 +430,6 @@ static const struct brcmstb_match_priv m
  };
  
  static const struct brcmstb_match_priv match_priv_2712 = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1146-drivers-dwc_otg-use-C11-style-variable-array-declara.patch b/target/linux/bcm27xx/patches-6.6/950-1146-drivers-dwc_otg-use-C11-style-variable-array-declara.patch
new file mode 100644
index 0000000000..b5f117f7f7
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1146-drivers-dwc_otg-use-C11-style-variable-array-declara.patch
@@ -0,0 +1,260 @@
+From 65fddc7301f52470fd846acede96d240a1902e67 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Fri, 5 Jul 2024 14:00:38 +0100
+Subject: [PATCH 1146/1215] drivers: dwc_otg: use C11 style variable array
+ declarations
+
+The kernel C standard changed in 5.18.
+
+Remove a layer of indirection around the FIQ bounce buffers, be consistent
+with pointers to FIQ bounce buffers, and remove open-coded 32-bit clamping
+of DMA addresses.
+
+Also remove a pointless fiq_state initialisation loop.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c  | 12 ++++----
+ drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h  |  8 ++---
+ drivers/usb/host/dwc_otg/dwc_otg_hcd.c      | 34 ++++++++++-----------
+ drivers/usb/host/dwc_otg/dwc_otg_hcd.h      |  4 +--
+ drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c |  4 +--
+ 5 files changed, 28 insertions(+), 34 deletions(-)
+
+--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c
++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c
+@@ -240,8 +240,8 @@ static int notrace fiq_increment_dma_buf
+ 	hcdma_data_t hcdma;
+ 	int i = st->channel[n].dma_info.index;
+ 	int len;
+-	struct fiq_dma_blob *blob =
+-		(struct fiq_dma_blob *)(uintptr_t)st->dma_base;
++	struct fiq_dma_channel *split_dma =
++		(struct fiq_dma_channel *)(uintptr_t)st->dma_base;
+ 
+ 	len = fiq_get_xfer_len(st, n);
+ 	fiq_print(FIQDBG_INT, st, "LEN: %03d", len);
+@@ -250,7 +250,7 @@ static int notrace fiq_increment_dma_buf
+ 	if (i > 6)
+ 		BUG();
+ 
+-	hcdma.d32 = (u32)(uintptr_t)&blob->channel[n].index[i].buf[0];
++	hcdma.d32 = lower_32_bits((uintptr_t)&split_dma[n].index[i].buf[0]);
+ 	FIQ_WRITE(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA, hcdma.d32);
+ 	st->channel[n].dma_info.index = i;
+ 	return 0;
+@@ -290,8 +290,8 @@ static int notrace fiq_iso_out_advance(s
+ 	hcsplt_data_t hcsplt;
+ 	hctsiz_data_t hctsiz;
+ 	hcdma_data_t hcdma;
+-	struct fiq_dma_blob *blob =
+-		(struct fiq_dma_blob *)(uintptr_t)st->dma_base;
++	struct fiq_dma_channel *split_dma =
++		(struct fiq_dma_channel *)(uintptr_t)st->dma_base;
+ 	int last = 0;
+ 	int i = st->channel[n].dma_info.index;
+ 
+@@ -303,7 +303,7 @@ static int notrace fiq_iso_out_advance(s
+ 		last = 1;
+ 
+ 	/* New DMA address - address of bounce buffer referred to in index */
+-	hcdma.d32 = (u32)(uintptr_t)blob->channel[n].index[i].buf;
++	hcdma.d32 = lower_32_bits((uintptr_t)&split_dma[n].index[i].buf[0]);
+ 	//hcdma.d32 = FIQ_READ(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA);
+ 	//hcdma.d32 += st->channel[n].dma_info.slot_len[i];
+ 	fiq_print(FIQDBG_INT, st, "LAST: %01d ", last);
+--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h
++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h
+@@ -263,10 +263,6 @@ struct fiq_dma_channel {
+ 	struct fiq_split_dma_slot index[6];
+ } __attribute__((packed));
+ 
+-struct fiq_dma_blob {
+-	struct fiq_dma_channel channel[0];
+-} __attribute__((packed));
+-
+ /**
+  * struct fiq_hs_isoc_info - USB2.0 isochronous data
+  * @iso_frame:	Pointer to the array of OTG URB iso_frame_descs.
+@@ -352,7 +348,7 @@ struct fiq_state {
+ 	mphi_regs_t mphi_regs;
+ 	void *dwc_regs_base;
+ 	dma_addr_t dma_base;
+-	struct fiq_dma_blob *fiq_dmab;
++	struct fiq_dma_channel *fiq_dmab;
+ 	void *dummy_send;
+ 	dma_addr_t dummy_send_dma;
+ 	gintmsk_data_t gintmsk_saved;
+@@ -365,7 +361,7 @@ struct fiq_state {
+ 	char * buffer;
+ 	unsigned int bufsiz;
+ #endif
+-	struct fiq_channel_state channel[0];
++	struct fiq_channel_state channel[];
+ };
+ 
+ #ifdef CONFIG_ARM64
+--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
+@@ -58,6 +58,7 @@ static int last_sel_trans_num_avail_hc_a
+ static int last_sel_trans_num_avail_hc_at_end = 0;
+ #endif /* DEBUG_HOST_CHANNELS */
+ 
++static_assert(FIQ_PASSTHROUGH == 0);
+ 
+ dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void)
+ {
+@@ -876,7 +877,7 @@ void dwc_otg_hcd_power_up(void *ptr)
+ void dwc_otg_cleanup_fiq_channel(dwc_otg_hcd_t *hcd, uint32_t num)
+ {
+ 	struct fiq_channel_state *st = &hcd->fiq_state->channel[num];
+-	struct fiq_dma_blob *blob = hcd->fiq_dmab;
++	struct fiq_dma_channel *split_dma = hcd->fiq_dmab;
+ 	int i;
+ 
+ 	st->fsm = FIQ_PASSTHROUGH;
+@@ -898,7 +899,7 @@ void dwc_otg_cleanup_fiq_channel(dwc_otg
+ 	st->hs_isoc_info.iso_desc = NULL;
+ 	st->hs_isoc_info.nrframes = 0;
+ 
+-	DWC_MEMSET(&blob->channel[num].index[0], 0x6b, 1128);
++	DWC_MEMSET(&split_dma[num].index[0], 0x6b, 1128);
+ }
+ 
+ /**
+@@ -1045,9 +1046,6 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd
+ 		spin_lock_init(&hcd->fiq_state->lock);
+ #endif
+ 
+-		for (i = 0; i < num_channels; i++) {
+-			hcd->fiq_state->channel[i].fsm = FIQ_PASSTHROUGH;
+-		}
+ 		hcd->fiq_state->dummy_send = DWC_DMA_ALLOC_ATOMIC(dev, 16,
+ 							 &hcd->fiq_state->dummy_send_dma);
+ 
+@@ -1561,7 +1559,7 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h
+ 	int frame_length, i = 0;
+ 	uint8_t *ptr = NULL;
+ 	dwc_hc_t *hc = qh->channel;
+-	struct fiq_dma_blob *blob;
++	struct fiq_dma_channel *split_dma;
+ 	struct dwc_otg_hcd_iso_packet_desc *frame_desc;
+ 
+ 	for (i = 0; i < 6; i++) {
+@@ -1576,10 +1574,10 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h
+ 		 * Pointer arithmetic on hcd->fiq_state->dma_base (a dma_addr_t)
+ 		 * to point it to the correct offset in the allocated buffers.
+ 		 */
+-		blob = (struct fiq_dma_blob *)
++		split_dma = (struct fiq_dma_channel *)
+ 			(uintptr_t)hcd->fiq_state->dma_base;
+-		st->hcdma_copy.d32 =(u32)(uintptr_t)
+-			blob->channel[hc->hc_num].index[0].buf;
++		st->hcdma_copy.d32 = lower_32_bits((uintptr_t)
++			&split_dma[hc->hc_num].index[0].buf[0]);
+ 
+ 		/* Calculate the max number of CSPLITS such that the FIQ can time out
+ 		 * a transaction if it fails.
+@@ -1600,7 +1598,7 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h
+ 			frame_length = frame_desc->length;
+ 
+ 			/* Virtual address for bounce buffers */
+-			blob = hcd->fiq_dmab;
++			split_dma = hcd->fiq_dmab;
+ 
+ 			ptr = qtd->urb->buf + frame_desc->offset;
+ 			if (frame_length == 0) {
+@@ -1613,11 +1611,11 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h
+ 			} else {
+ 				do {
+ 					if (frame_length <= 188) {
+-						dwc_memcpy(&blob->channel[hc->hc_num].index[i].buf[0], ptr, frame_length);
++						dwc_memcpy(&split_dma[hc->hc_num].index[i].buf[0], ptr, frame_length);
+ 						st->dma_info.slot_len[i] = frame_length;
+ 						ptr += frame_length;
+ 					} else {
+-						dwc_memcpy(&blob->channel[hc->hc_num].index[i].buf[0], ptr, 188);
++						dwc_memcpy(&split_dma[hc->hc_num].index[i].buf[0], ptr, 188);
+ 						st->dma_info.slot_len[i] = 188;
+ 						ptr += 188;
+ 					}
+@@ -1634,10 +1632,10 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h
+ 			 * dma_addr_t) to point it to the correct offset in the
+ 			 * allocated buffers.
+ 			 */
+-			blob = (struct fiq_dma_blob *)
++			split_dma = (struct fiq_dma_channel *)
+ 				(uintptr_t)hcd->fiq_state->dma_base;
+-			st->hcdma_copy.d32 = (u32)(uintptr_t)
+-				blob->channel[hc->hc_num].index[0].buf;
++			st->hcdma_copy.d32 = lower_32_bits((uintptr_t)
++				&split_dma[hc->hc_num].index[0].buf[0]);
+ 
+ 			/* fixup xfersize to the actual packet size */
+ 			st->hctsiz_copy.b.pid = 0;
+@@ -1917,14 +1915,14 @@ int fiq_fsm_queue_split_transaction(dwc_
+ 			if (hc->align_buff) {
+ 				st->hcdma_copy.d32 = hc->align_buff;
+ 			} else {
+-				st->hcdma_copy.d32 = ((unsigned long) hc->xfer_buff & 0xFFFFFFFF);
++				st->hcdma_copy.d32 = lower_32_bits((uintptr_t)hc->xfer_buff);
+ 			}
+ 		}
+ 	} else {
+ 		if (hc->align_buff) {
+ 			st->hcdma_copy.d32 = hc->align_buff;
+ 		} else {
+-			st->hcdma_copy.d32 = ((unsigned long) hc->xfer_buff & 0xFFFFFFFF);
++			st->hcdma_copy.d32 = lower_32_bits((uintptr_t)hc->xfer_buff);
+ 		}
+ 	}
+ 	/* The FIQ depends upon no other interrupts being enabled except channel halt.
+@@ -1944,7 +1942,7 @@ int fiq_fsm_queue_split_transaction(dwc_
+ 		if (hc->align_buff) {
+ 			st->hcdma_copy.d32 = hc->align_buff;
+ 		} else {
+-			st->hcdma_copy.d32 = ((unsigned long) hc->xfer_buff & 0xFFFFFFFF);
++			st->hcdma_copy.d32 = lower_32_bits((uintptr_t)hc->xfer_buff);
+ 		}
+ 	}
+ 	DWC_WRITE_REG32(&hc_regs->hcdma, st->hcdma_copy.d32);
+--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.h
++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.h
+@@ -88,7 +88,7 @@ struct dwc_otg_hcd_urb {
+ 	uint32_t flags;
+ 	uint16_t interval;
+ 	struct dwc_otg_hcd_pipe_info pipe_info;
+-	struct dwc_otg_hcd_iso_packet_desc iso_descs[0];
++	struct dwc_otg_hcd_iso_packet_desc iso_descs[];
+ };
+ 
+ static inline uint8_t dwc_otg_hcd_get_ep_num(struct dwc_otg_hcd_pipe_info *pipe)
+@@ -592,7 +592,7 @@ struct dwc_otg_hcd {
+ 	struct fiq_state *fiq_state;
+ 
+ 	/** Virtual address for split transaction DMA bounce buffers */
+-	struct fiq_dma_blob *fiq_dmab;
++	struct fiq_dma_channel *fiq_dmab;
+ 
+ #ifdef DEBUG
+ 	uint32_t frrem_samples;
+--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
+@@ -2332,7 +2332,7 @@ void dwc_otg_fiq_unmangle_isoc(dwc_otg_h
+ int dwc_otg_fiq_unsetup_per_dma(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh, dwc_otg_qtd_t *qtd, uint32_t num)
+ {
+ 	dwc_hc_t *hc = qh->channel;
+-	struct fiq_dma_blob *blob = hcd->fiq_dmab;
++	struct fiq_dma_channel *split_dma = hcd->fiq_dmab;
+ 	struct fiq_channel_state *st = &hcd->fiq_state->channel[num];
+ 	uint8_t *ptr = NULL;
+ 	int index = 0, len = 0;
+@@ -2352,7 +2352,7 @@ int dwc_otg_fiq_unsetup_per_dma(dwc_otg_
+ 
+ 		for (i = 0; i < st->dma_info.index; i++) {
+ 			len += st->dma_info.slot_len[i];
+-			dwc_memcpy(ptr, &blob->channel[num].index[i].buf[0], st->dma_info.slot_len[i]);
++			dwc_memcpy(ptr, &split_dma[num].index[i].buf[0], st->dma_info.slot_len[i]);
+ 			ptr += st->dma_info.slot_len[i];
+ 		}
+ 		return len;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1147-media-uapi-pixfmt-luma-Document-MIPI-CSI-2-packing.patch b/target/linux/bcm27xx/patches-6.6/950-1147-media-uapi-pixfmt-luma-Document-MIPI-CSI-2-packing.patch
new file mode 100644
index 0000000000..14d0a79a73
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1147-media-uapi-pixfmt-luma-Document-MIPI-CSI-2-packing.patch
@@ -0,0 +1,27 @@
+From 8dea9155ab081289edd618f8373d5f980d5bb664 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 23 Feb 2024 10:40:47 +0100
+Subject: [PATCH 1147/1215] media: uapi: pixfmt-luma: Document MIPI CSI-2
+ packing
+
+The Y10P, Y12P and Y14P format variants are packed according to
+the RAW10, RAW12 and RAW14 formats as defined by the MIPI CSI-2
+specification. Document it.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Naushir Patuck <naush@raspberrypi.com>
+---
+ Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst
++++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst
+@@ -161,3 +161,7 @@ are often referred to as greyscale forma
+     For Y012 and Y12 formats, Y012 places its data in the 12 high bits, with
+     padding zeros in the 4 low bits, in contrast to the Y12 format, which has
+     its padding located in the most significant bits of the 16 bit word.
++
++    The 'P' variations of the Y10, Y12 and Y14 formats are packed according to
++    the RAW10, RAW12 and RAW14 packing scheme as defined by the MIPI CSI-2
++    specification.
diff --git a/target/linux/bcm27xx/patches-6.6/950-1148-media-uapi-Add-a-pixel-format-for-BGR48-and-RGB48.patch b/target/linux/bcm27xx/patches-6.6/950-1148-media-uapi-Add-a-pixel-format-for-BGR48-and-RGB48.patch
new file mode 100644
index 0000000000..2f459044a3
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1148-media-uapi-Add-a-pixel-format-for-BGR48-and-RGB48.patch
@@ -0,0 +1,101 @@
+From 814c088cb7183f79ba68c8f9459505e2ac4dde3a Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 26 Jan 2024 15:03:18 +0100
+Subject: [PATCH 1148/1215] media: uapi: Add a pixel format for BGR48 and RGB48
+
+Add BGR48 and RGB48 16-bit per component image formats.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
+Reviewed-by: Naushir Patuck <naush@raspberrypi.com>
+---
+ .../userspace-api/media/v4l/pixfmt-rgb.rst    | 54 +++++++++++++++++++
+ drivers/media/v4l2-core/v4l2-common.c         |  2 +
+ include/uapi/linux/videodev2.h                |  2 +
+ 3 files changed, 58 insertions(+)
+
+--- a/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst
++++ b/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst
+@@ -996,6 +996,60 @@ arranged in little endian order.
+ 
+     \normalsize
+ 
++16 Bits Per Component
++=====================
++
++These formats store an RGB triplet in six bytes, with 16 bits per component
++stored in memory in little endian byte order. They are named based on the order
++of the RGB components as stored in memory. For instance, RGB48 stores R\
++:sub:`7:0` and R\ :sub:`15:8` in bytes 0 and 1 respectively. This differs from
++the DRM format nomenclature that instead uses the order of components as seen in
++the 48-bits little endian word.
++
++.. raw:: latex
++
++    \small
++
++.. flat-table:: RGB Formats With 16 Bits Per Component
++    :header-rows:  1
++
++    * - Identifier
++      - Code
++      - Byte 0
++      - Byte 1
++      - Byte 2
++      - Byte 3
++      - Byte 4
++      - Byte 5
++
++    * .. _V4L2-PIX-FMT-BGR48:
++
++      - ``V4L2_PIX_FMT_BGR48``
++      - 'BGR6'
++
++      - B\ :sub:`7-0`
++      - B\ :sub:`15-8`
++      - G\ :sub:`7-0`
++      - G\ :sub:`15-8`
++      - R\ :sub:`7-0`
++      - R\ :sub:`15-8`
++
++    * .. _V4L2-PIX-FMT-RGB48:
++
++      - ``V4L2_PIX_FMT_RGB48``
++      - 'RGB6'
++
++      - R\ :sub:`7-0`
++      - R\ :sub:`15-8`
++      - G\ :sub:`7-0`
++      - G\ :sub:`15-8`
++      - B\ :sub:`7-0`
++      - B\ :sub:`15-8`
++
++.. raw:: latex
++
++    \normalsize
++
+ Deprecated RGB Formats
+ ======================
+ 
+--- a/drivers/media/v4l2-core/v4l2-common.c
++++ b/drivers/media/v4l2-core/v4l2-common.c
+@@ -253,6 +253,8 @@ const struct v4l2_format_info *v4l2_form
+ 		{ .format = V4L2_PIX_FMT_RGB555,  .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 },
+ 		{ .format = V4L2_PIX_FMT_BGR666,  .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 },
+ 		{ .format = V4L2_PIX_FMT_BGR48_12, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 6, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 },
++		{ .format = V4L2_PIX_FMT_BGR48, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 6, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 },
++		{ .format = V4L2_PIX_FMT_RGB48, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 6, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 },
+ 		{ .format = V4L2_PIX_FMT_ABGR64_12, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 },
+ 
+ 		/* YUV packed formats */
+--- a/include/uapi/linux/videodev2.h
++++ b/include/uapi/linux/videodev2.h
+@@ -587,6 +587,8 @@ struct v4l2_pix_format {
+ 
+ /* RGB formats (6 or 8 bytes per pixel) */
+ #define V4L2_PIX_FMT_BGR48_12    v4l2_fourcc('B', '3', '1', '2') /* 48  BGR 12-bit per component */
++#define V4L2_PIX_FMT_BGR48       v4l2_fourcc('B', 'G', 'R', '6') /* 48  BGR 16-bit per component */
++#define V4L2_PIX_FMT_RGB48       v4l2_fourcc('R', 'G', 'B', '6') /* 48  RGB 16-bit per component */
+ #define V4L2_PIX_FMT_ABGR64_12   v4l2_fourcc('B', '4', '1', '2') /* 64  BGRA 12-bit per component */
+ 
+ /* RGB formats (6 bytes per pixel) */
diff --git a/target/linux/bcm27xx/patches-6.6/950-1149-media-uapi-Add-Raspberry-Pi-PiSP-Back-End-uAPI.patch b/target/linux/bcm27xx/patches-6.6/950-1149-media-uapi-Add-Raspberry-Pi-PiSP-Back-End-uAPI.patch
new file mode 100644
index 0000000000..a59bcb1e97
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1149-media-uapi-Add-Raspberry-Pi-PiSP-Back-End-uAPI.patch
@@ -0,0 +1,1171 @@
+From be6996ad702fac96b36ea209ae04a71bd1c6e1d4 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 24 May 2024 15:18:21 +0200
+Subject: [PATCH 1149/1215] media: uapi: Add Raspberry Pi PiSP Back End uAPI
+
+Add the Raspberry Pi PiSP Back End uAPI header.
+
+The header defines the data type used to configure the PiSP Back End
+ISP.
+
+The detailed description of the types and of the ISP configuration
+procedure is available at
+https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ MAINTAINERS                                   |   7 +
+ .../linux/media/raspberrypi/pisp_be_config.h  | 927 ++++++++++++++++++
+ .../linux/media/raspberrypi/pisp_common.h     | 199 ++++
+ 3 files changed, 1133 insertions(+)
+ create mode 100644 include/uapi/linux/media/raspberrypi/pisp_be_config.h
+ create mode 100644 include/uapi/linux/media/raspberrypi/pisp_common.h
+
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -18032,6 +18032,13 @@ L:	linux-wireless@vger.kernel.org
+ S:	Orphan
+ F:	drivers/net/wireless/legacy/ray*
+ 
++RASPBERRY PI PISP BACK END
++M:	Jacopo Mondi <jacopo.mondi@ideasonboard.com>
++L:	Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
++L:	linux-media@vger.kernel.org
++S:	Maintained
++F:	include/uapi/linux/media/raspberrypi/
++
+ RC-CORE / LIRC FRAMEWORK
+ M:	Sean Young <sean@mess.org>
+ L:	linux-media@vger.kernel.org
+--- /dev/null
++++ b/include/uapi/linux/media/raspberrypi/pisp_be_config.h
+@@ -0,0 +1,927 @@
++/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
++/*
++ * PiSP Back End configuration definitions.
++ *
++ * Copyright (C) 2021 - Raspberry Pi Ltd
++ *
++ */
++#ifndef _UAPI_PISP_BE_CONFIG_H_
++#define _UAPI_PISP_BE_CONFIG_H_
++
++#include <linux/types.h>
++
++#include "pisp_common.h"
++
++/* byte alignment for inputs */
++#define PISP_BACK_END_INPUT_ALIGN 4u
++/* alignment for compressed inputs */
++#define PISP_BACK_END_COMPRESSED_ALIGN 8u
++/* minimum required byte alignment for outputs */
++#define PISP_BACK_END_OUTPUT_MIN_ALIGN 16u
++/* preferred byte alignment for outputs */
++#define PISP_BACK_END_OUTPUT_MAX_ALIGN 64u
++
++/* minimum allowed tile width anywhere in the pipeline */
++#define PISP_BACK_END_MIN_TILE_WIDTH 16u
++/* minimum allowed tile width anywhere in the pipeline */
++#define PISP_BACK_END_MIN_TILE_HEIGHT 16u
++
++#define PISP_BACK_END_NUM_OUTPUTS 2
++#define PISP_BACK_END_HOG_OUTPUT 1
++
++#define PISP_BACK_END_NUM_TILES 64
++
++enum pisp_be_bayer_enable {
++	PISP_BE_BAYER_ENABLE_INPUT = 0x000001,
++	PISP_BE_BAYER_ENABLE_DECOMPRESS = 0x000002,
++	PISP_BE_BAYER_ENABLE_DPC = 0x000004,
++	PISP_BE_BAYER_ENABLE_GEQ = 0x000008,
++	PISP_BE_BAYER_ENABLE_TDN_INPUT = 0x000010,
++	PISP_BE_BAYER_ENABLE_TDN_DECOMPRESS = 0x000020,
++	PISP_BE_BAYER_ENABLE_TDN = 0x000040,
++	PISP_BE_BAYER_ENABLE_TDN_COMPRESS = 0x000080,
++	PISP_BE_BAYER_ENABLE_TDN_OUTPUT = 0x000100,
++	PISP_BE_BAYER_ENABLE_SDN = 0x000200,
++	PISP_BE_BAYER_ENABLE_BLC = 0x000400,
++	PISP_BE_BAYER_ENABLE_STITCH_INPUT = 0x000800,
++	PISP_BE_BAYER_ENABLE_STITCH_DECOMPRESS = 0x001000,
++	PISP_BE_BAYER_ENABLE_STITCH = 0x002000,
++	PISP_BE_BAYER_ENABLE_STITCH_COMPRESS = 0x004000,
++	PISP_BE_BAYER_ENABLE_STITCH_OUTPUT = 0x008000,
++	PISP_BE_BAYER_ENABLE_WBG = 0x010000,
++	PISP_BE_BAYER_ENABLE_CDN = 0x020000,
++	PISP_BE_BAYER_ENABLE_LSC = 0x040000,
++	PISP_BE_BAYER_ENABLE_TONEMAP = 0x080000,
++	PISP_BE_BAYER_ENABLE_CAC = 0x100000,
++	PISP_BE_BAYER_ENABLE_DEBIN = 0x200000,
++	PISP_BE_BAYER_ENABLE_DEMOSAIC = 0x400000,
++};
++
++enum pisp_be_rgb_enable {
++	PISP_BE_RGB_ENABLE_INPUT = 0x000001,
++	PISP_BE_RGB_ENABLE_CCM = 0x000002,
++	PISP_BE_RGB_ENABLE_SAT_CONTROL = 0x000004,
++	PISP_BE_RGB_ENABLE_YCBCR = 0x000008,
++	PISP_BE_RGB_ENABLE_FALSE_COLOUR = 0x000010,
++	PISP_BE_RGB_ENABLE_SHARPEN = 0x000020,
++	/* Preferred colours would occupy 0x000040 */
++	PISP_BE_RGB_ENABLE_YCBCR_INVERSE = 0x000080,
++	PISP_BE_RGB_ENABLE_GAMMA = 0x000100,
++	PISP_BE_RGB_ENABLE_CSC0 = 0x000200,
++	PISP_BE_RGB_ENABLE_CSC1 = 0x000400,
++	PISP_BE_RGB_ENABLE_DOWNSCALE0 = 0x001000,
++	PISP_BE_RGB_ENABLE_DOWNSCALE1 = 0x002000,
++	PISP_BE_RGB_ENABLE_RESAMPLE0 = 0x008000,
++	PISP_BE_RGB_ENABLE_RESAMPLE1 = 0x010000,
++	PISP_BE_RGB_ENABLE_OUTPUT0 = 0x040000,
++	PISP_BE_RGB_ENABLE_OUTPUT1 = 0x080000,
++	PISP_BE_RGB_ENABLE_HOG = 0x200000
++};
++
++#define PISP_BE_RGB_ENABLE_CSC(i) (PISP_BE_RGB_ENABLE_CSC0 << (i))
++#define PISP_BE_RGB_ENABLE_DOWNSCALE(i) (PISP_BE_RGB_ENABLE_DOWNSCALE0 << (i))
++#define PISP_BE_RGB_ENABLE_RESAMPLE(i) (PISP_BE_RGB_ENABLE_RESAMPLE0 << (i))
++#define PISP_BE_RGB_ENABLE_OUTPUT(i) (PISP_BE_RGB_ENABLE_OUTPUT0 << (i))
++
++/*
++ * We use the enable flags to show when blocks are "dirty", but we need some
++ * extra ones too.
++ */
++enum pisp_be_dirty {
++	PISP_BE_DIRTY_GLOBAL = 0x0001,
++	PISP_BE_DIRTY_SH_FC_COMBINE = 0x0002,
++	PISP_BE_DIRTY_CROP = 0x0004
++};
++
++/**
++ * struct pisp_be_global_config - PiSP global enable bitmaps
++ * @bayer_enables:	Bayer input enable flags
++ * @rgb_enables:	RGB output enable flags
++ * @bayer_order:	Bayer input format ordering
++ * @pad:		Padding bytes
++ */
++struct pisp_be_global_config {
++	__u32 bayer_enables;
++	__u32 rgb_enables;
++	__u8 bayer_order;
++	__u8 pad[3];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_input_buffer_config - PiSP Back End input buffer
++ * @addr:		Input buffer address
++ */
++struct pisp_be_input_buffer_config {
++	/* low 32 bits followed by high 32 bits (for each of up to 3 planes) */
++	__u32 addr[3][2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_dpc_config - PiSP Back End DPC config
++ *
++ * Defective Pixel Correction configuration
++ *
++ * @coeff_level:	Coefficient for the darkest neighbouring pixel value
++ * @coeff_range:	Coefficient for the range of pixels for this Bayer channel
++ * @pad:		Padding byte
++ * @flags:		DPC configuration flags
++ */
++struct pisp_be_dpc_config {
++	__u8 coeff_level;
++	__u8 coeff_range;
++	__u8 pad;
++#define PISP_BE_DPC_FLAG_FOLDBACK 1
++	__u8 flags;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_geq_config - PiSP Back End GEQ config
++ *
++ * Green Equalisation configuration
++ *
++ * @offset:		Offset value for threshold calculation
++ * @slope_sharper:	Slope/Sharper configuration
++ * @min:		Minimum value the threshold may have
++ * @max:		Maximum value the threshold may have
++ */
++struct pisp_be_geq_config {
++	__u16 offset;
++#define PISP_BE_GEQ_SHARPER BIT(15)
++#define PISP_BE_GEQ_SLOPE ((1 << 10) - 1)
++	/* top bit is the "sharper" flag, slope value is bottom 10 bits */
++	__u16 slope_sharper;
++	__u16 min;
++	__u16 max;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_tdn_input_buffer_config - PiSP Back End TDN input buffer
++ * @addr:		TDN input buffer address
++ */
++struct pisp_be_tdn_input_buffer_config {
++	/* low 32 bits followed by high 32 bits */
++	__u32 addr[2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_tdn_config - PiSP Back End TDN config
++ *
++ * Temporal Denoise configuration
++ *
++ * @black_level:	Black level value subtracted from pixels
++ * @ratio:		Multiplier for the LTA input frame
++ * @noise_constant:	Constant offset value used in noise estimation
++ * @noise_slope:	Noise estimation multiplier
++ * @threshold:		Threshold for TDN operations
++ * @reset:		Disable TDN operations
++ * @pad:		Padding byte
++ */
++struct pisp_be_tdn_config {
++	__u16 black_level;
++	__u16 ratio;
++	__u16 noise_constant;
++	__u16 noise_slope;
++	__u16 threshold;
++	__u8 reset;
++	__u8 pad;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_tdn_output_buffer_config - PiSP Back End TDN output buffer
++ * @addr:		TDN output buffer address
++ */
++struct pisp_be_tdn_output_buffer_config {
++	/* low 32 bits followed by high 32 bits */
++	__u32 addr[2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_sdn_config - PiSP Back End SDN config
++ *
++ * Spatial Denoise configuration
++ *
++ * @black_level:	Black level subtracted from pixel for noise estimation
++ * @leakage:		Proportion of the original undenoised value to mix in
++ *			denoised output
++ * @pad:		Padding byte
++ * @noise_constant:	Noise constant used for noise estimation
++ * @noise_slope:	Noise slope value used for noise estimation
++ * @noise_constant2:	Second noise constant used for noise estimation
++ * @noise_slope2:	Second slope value used for noise estimation
++ */
++struct pisp_be_sdn_config {
++	__u16 black_level;
++	__u8 leakage;
++	__u8 pad;
++	__u16 noise_constant;
++	__u16 noise_slope;
++	__u16 noise_constant2;
++	__u16 noise_slope2;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_stitch_input_buffer_config - PiSP Back End Stitch input
++ * @addr:		Stitch input buffer address
++ */
++struct pisp_be_stitch_input_buffer_config {
++	/* low 32 bits followed by high 32 bits */
++	__u32 addr[2];
++} __attribute__((packed));
++
++#define PISP_BE_STITCH_STREAMING_LONG 0x8000
++#define PISP_BE_STITCH_EXPOSURE_RATIO_MASK 0x7fff
++
++/**
++ * struct pisp_be_stitch_config - PiSP Back End Stitch config
++ *
++ * Stitch block configuration
++ *
++ * @threshold_lo:		Low threshold value
++ * @threshold_diff_power:	Low and high threshold difference
++ * @pad:			Padding bytes
++ * @exposure_ratio:		Multiplier to convert long exposure pixels into
++ *				short exposure pixels
++ * @motion_threshold_256:	Motion threshold above which short exposure
++ *				pixels are used
++ * @motion_threshold_recip:	Reciprocal of motion_threshold_256 value
++ */
++struct pisp_be_stitch_config {
++	__u16 threshold_lo;
++	__u8 threshold_diff_power;
++	__u8 pad;
++
++	/* top bit indicates whether streaming input is the long exposure */
++	__u16 exposure_ratio;
++
++	__u8 motion_threshold_256;
++	__u8 motion_threshold_recip;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_stitch_output_buffer_config - PiSP Back End Stitch output
++ * @addr:		Stitch input buffer address
++ */
++struct pisp_be_stitch_output_buffer_config {
++	/* low 32 bits followed by high 32 bits */
++	__u32 addr[2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_cdn_config - PiSP Back End CDN config
++ *
++ * Colour Denoise configuration
++ *
++ * @thresh:		Constant for noise estimation
++ * @iir_strength:	Relative strength of the IIR part of the filter
++ * @g_adjust:		Proportion of the change assigned to the G channel
++ */
++struct pisp_be_cdn_config {
++	__u16 thresh;
++	__u8 iir_strength;
++	__u8 g_adjust;
++} __attribute__((packed));
++
++#define PISP_BE_LSC_LOG_GRID_SIZE 5
++#define PISP_BE_LSC_GRID_SIZE (1 << PISP_BE_LSC_LOG_GRID_SIZE)
++#define PISP_BE_LSC_STEP_PRECISION 18
++
++/**
++ * struct pisp_be_lsc_config - PiSP Back End LSC config
++ *
++ * Lens Shading Correction configuration
++ *
++ * @grid_step_x:	Reciprocal of cell size width
++ * @grid_step_y:	Reciprocal of cell size height
++ * @lut_packed:		Jointly-coded RGB gains for each LSC grid
++ */
++struct pisp_be_lsc_config {
++	/* (1<<18) / grid_cell_width */
++	__u16 grid_step_x;
++	/* (1<<18) / grid_cell_height */
++	__u16 grid_step_y;
++	/* RGB gains jointly encoded in 32 bits */
++#define PISP_BE_LSC_LUT_SIZE	(PISP_BE_LSC_GRID_SIZE + 1)
++	__u32 lut_packed[PISP_BE_LSC_LUT_SIZE][PISP_BE_LSC_LUT_SIZE];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_lsc_extra - PiSP Back End LSC Extra config
++ * @offset_x:		Horizontal offset into the LSC table of this tile
++ * @offset_y:		Vertical offset into the LSC table of this tile
++ */
++struct pisp_be_lsc_extra {
++	__u16 offset_x;
++	__u16 offset_y;
++} __attribute__((packed));
++
++#define PISP_BE_CAC_LOG_GRID_SIZE 3
++#define PISP_BE_CAC_GRID_SIZE (1 << PISP_BE_CAC_LOG_GRID_SIZE)
++#define PISP_BE_CAC_STEP_PRECISION 20
++
++/**
++ * struct pisp_be_cac_config - PiSP Back End CAC config
++ *
++ * Chromatic Aberration Correction config
++ *
++ * @grid_step_x:	Reciprocal of cell size width
++ * @grid_step_y:	Reciprocal of cell size height
++ * @lut:		Pixel shift for the CAC grid
++ */
++struct pisp_be_cac_config {
++	/* (1<<20) / grid_cell_width */
++	__u16 grid_step_x;
++	/* (1<<20) / grid_cell_height */
++	__u16 grid_step_y;
++	/* [gridy][gridx][rb][xy] */
++#define PISP_BE_CAC_LUT_SIZE		(PISP_BE_CAC_GRID_SIZE + 1)
++	__s8 lut[PISP_BE_CAC_LUT_SIZE][PISP_BE_CAC_LUT_SIZE][2][2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_cac_extra - PiSP Back End CAC extra config
++ * @offset_x:		Horizontal offset into the CAC table of this tile
++ * @offset_y:		Horizontal offset into the CAC table of this tile
++ */
++struct pisp_be_cac_extra {
++	__u16 offset_x;
++	__u16 offset_y;
++} __attribute__((packed));
++
++#define PISP_BE_DEBIN_NUM_COEFFS 4
++
++/**
++ * struct pisp_be_debin_config - PiSP Back End Debin config
++ *
++ * Debinning configuration
++ *
++ * @coeffs:		Filter coefficients for debinning
++ * @h_enable:		Horizontal debinning enable
++ * @v_enable:		Vertical debinning enable
++ * @pad:		Padding bytes
++ */
++struct pisp_be_debin_config {
++	__s8 coeffs[PISP_BE_DEBIN_NUM_COEFFS];
++	__s8 h_enable;
++	__s8 v_enable;
++	__s8 pad[2];
++} __attribute__((packed));
++
++#define PISP_BE_TONEMAP_LUT_SIZE 64
++
++/**
++ * struct pisp_be_tonemap_config - PiSP Back End Tonemap config
++ *
++ * Tonemapping configuration
++ *
++ * @detail_constant:	Constant value for threshold calculation
++ * @detail_slope:	Slope value for threshold calculation
++ * @iir_strength:	Relative strength of the IIR fiter
++ * @strength:		Strength factor
++ * @lut:		Look-up table for tonemap curve
++ */
++struct pisp_be_tonemap_config {
++	__u16 detail_constant;
++	__u16 detail_slope;
++	__u16 iir_strength;
++	__u16 strength;
++	__u32 lut[PISP_BE_TONEMAP_LUT_SIZE];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_demosaic_config - PiSP Back End Demosaic config
++ *
++ * Demosaic configuration
++ *
++ * @sharper:		Use other Bayer channels to increase sharpness
++ * @fc_mode:		Built-in false colour suppression mode
++ * @pad:		Padding bytes
++ */
++struct pisp_be_demosaic_config {
++	__u8 sharper;
++	__u8 fc_mode;
++	__u8 pad[2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_ccm_config - PiSP Back End CCM config
++ *
++ * Colour Correction Matrix configuration
++ *
++ * @coeffs:		Matrix coefficients
++ * @pad:		Padding bytes
++ * @offsets:		Offsets triplet
++ */
++struct pisp_be_ccm_config {
++	__s16 coeffs[9];
++	__u8 pad[2];
++	__s32 offsets[3];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_sat_control_config - PiSP Back End SAT config
++ *
++ * Saturation Control configuration
++ *
++ * @shift_r:		Left shift for Red colour channel
++ * @shift_g:		Left shift for Green colour channel
++ * @shift_b:		Left shift for Blue colour channel
++ * @pad:		Padding byte
++ */
++struct pisp_be_sat_control_config {
++	__u8 shift_r;
++	__u8 shift_g;
++	__u8 shift_b;
++	__u8 pad;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_false_colour_config - PiSP Back End False Colour config
++ *
++ * False Colour configuration
++ *
++ * @distance:		Distance of neighbouring pixels, either 1 or 2
++ * @pad:		Padding bytes
++ */
++struct pisp_be_false_colour_config {
++	__u8 distance;
++	__u8 pad[3];
++} __attribute__((packed));
++
++#define PISP_BE_SHARPEN_SIZE 5
++#define PISP_BE_SHARPEN_FUNC_NUM_POINTS 9
++
++/**
++ * struct pisp_be_sharpen_config - PiSP Back End Sharpening config
++ *
++ * Sharpening configuration
++ *
++ * @kernel0:		Coefficient for filter 0
++ * @pad0:		Padding byte
++ * @kernel1:		Coefficient for filter 1
++ * @pad1:		Padding byte
++ * @kernel2:		Coefficient for filter 2
++ * @pad2:		Padding byte
++ * @kernel3:		Coefficient for filter 3
++ * @pad3:		Padding byte
++ * @kernel4:		Coefficient for filter 4
++ * @pad4:		Padding byte
++ * @threshold_offset0:	Offset for filter 0 response calculation
++ * @threshold_slope0:	Slope multiplier for the filter 0 response calculation
++ * @scale0:		Scale factor for filter 0 response calculation
++ * @pad5:		Padding byte
++ * @threshold_offset1:	Offset for filter 0 response calculation
++ * @threshold_slope1:	Slope multiplier for the filter 0 response calculation
++ * @scale1:		Scale factor for filter 0 response calculation
++ * @pad6:		Padding byte
++ * @threshold_offset2:	Offset for filter 0 response calculation
++ * @threshold_slope2:	Slope multiplier for the filter 0 response calculation
++ * @scale2:		Scale factor for filter 0 response calculation
++ * @pad7:		Padding byte
++ * @threshold_offset3:	Offset for filter 0 response calculation
++ * @threshold_slope3:	Slope multiplier for the filter 0 response calculation
++ * @scale3:		Scale factor for filter 0 response calculation
++ * @pad8:		Padding byte
++ * @threshold_offset4:	Offset for filter 0 response calculation
++ * @threshold_slope4:	Slope multiplier for the filter 0 response calculation
++ * @scale4:		Scale factor for filter 0 response calculation
++ * @pad9:		Padding byte
++ * @positive_strength:	Factor to scale the positive sharpening strength
++ * @positive_pre_limit:	Maximum allowed possible positive sharpening value
++ * @positive_func:	Gain factor applied to positive sharpening response
++ * @positive_limit:	Final gain factor applied to positive sharpening
++ * @negative_strength:	Factor to scale the negative sharpening strength
++ * @negative_pre_limit:	Maximum allowed possible negative sharpening value
++ * @negative_func:	Gain factor applied to negative sharpening response
++ * @negative_limit:	Final gain factor applied to negative sharpening
++ * @enables:		Filter enable mask
++ * @white:		White output pixel filter mask
++ * @black:		Black output pixel filter mask
++ * @grey:		Grey output pixel filter mask
++ */
++struct pisp_be_sharpen_config {
++	__s8 kernel0[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
++	__s8 pad0[3];
++	__s8 kernel1[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
++	__s8 pad1[3];
++	__s8 kernel2[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
++	__s8 pad2[3];
++	__s8 kernel3[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
++	__s8 pad3[3];
++	__s8 kernel4[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
++	__s8 pad4[3];
++	__u16 threshold_offset0;
++	__u16 threshold_slope0;
++	__u16 scale0;
++	__u16 pad5;
++	__u16 threshold_offset1;
++	__u16 threshold_slope1;
++	__u16 scale1;
++	__u16 pad6;
++	__u16 threshold_offset2;
++	__u16 threshold_slope2;
++	__u16 scale2;
++	__u16 pad7;
++	__u16 threshold_offset3;
++	__u16 threshold_slope3;
++	__u16 scale3;
++	__u16 pad8;
++	__u16 threshold_offset4;
++	__u16 threshold_slope4;
++	__u16 scale4;
++	__u16 pad9;
++	__u16 positive_strength;
++	__u16 positive_pre_limit;
++	__u16 positive_func[PISP_BE_SHARPEN_FUNC_NUM_POINTS];
++	__u16 positive_limit;
++	__u16 negative_strength;
++	__u16 negative_pre_limit;
++	__u16 negative_func[PISP_BE_SHARPEN_FUNC_NUM_POINTS];
++	__u16 negative_limit;
++	__u8 enables;
++	__u8 white;
++	__u8 black;
++	__u8 grey;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_sh_fc_combine_config - PiSP Back End Sharpening and
++ *					 False Colour config
++ *
++ * Sharpening and False Colour configuration
++ *
++ * @y_factor:		Control amount of desaturation of pixels being darkened
++ * @c1_factor:		Control amount of brightening of a pixel for the Cb
++ *			channel
++ * @c2_factor:		Control amount of brightening of a pixel for the Cr
++ *			channel
++ * @pad:		Padding byte
++ */
++struct pisp_be_sh_fc_combine_config {
++	__u8 y_factor;
++	__u8 c1_factor;
++	__u8 c2_factor;
++	__u8 pad;
++} __attribute__((packed));
++
++#define PISP_BE_GAMMA_LUT_SIZE 64
++
++/**
++ * struct pisp_be_gamma_config - PiSP Back End Gamma configuration
++ * @lut:		Gamma curve look-up table
++ */
++struct pisp_be_gamma_config {
++	__u32 lut[PISP_BE_GAMMA_LUT_SIZE];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_crop_config - PiSP Back End Crop config
++ *
++ * Crop configuration
++ *
++ * @offset_x:		Number of pixels cropped from the left of the tile
++ * @offset_y:		Number of pixels cropped from the top of the tile
++ * @width:		Width of the cropped tile output
++ * @height:		Height of the cropped tile output
++ */
++struct pisp_be_crop_config {
++	__u16 offset_x, offset_y;
++	__u16 width, height;
++} __attribute__((packed));
++
++#define PISP_BE_RESAMPLE_FILTER_SIZE 96
++
++/**
++ * struct pisp_be_resample_config - PiSP Back End Resampling config
++ *
++ * Resample configuration
++ *
++ * @scale_factor_h:	Horizontal scale factor
++ * @scale_factor_v:	Vertical scale factor
++ * @coef:		Resample coefficients
++ */
++struct pisp_be_resample_config {
++	__u16 scale_factor_h, scale_factor_v;
++	__s16 coef[PISP_BE_RESAMPLE_FILTER_SIZE];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_resample_extra - PiSP Back End Resample config
++ *
++ * Resample configuration
++ *
++ * @scaled_width:	Width in pixels of the scaled output
++ * @scaled_height:	Height in pixels of the scaled output
++ * @initial_phase_h:	Initial horizontal phase
++ * @initial_phase_v:	Initial vertical phase
++ */
++struct pisp_be_resample_extra {
++	__u16 scaled_width;
++	__u16 scaled_height;
++	__s16 initial_phase_h[3];
++	__s16 initial_phase_v[3];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_downscale_config - PiSP Back End Downscale config
++ *
++ * Downscale configuration
++ *
++ * @scale_factor_h:	Horizontal scale factor
++ * @scale_factor_v:	Vertical scale factor
++ * @scale_recip_h:	Horizontal reciprocal factor
++ * @scale_recip_v:	Vertical reciprocal factor
++ */
++struct pisp_be_downscale_config {
++	__u16 scale_factor_h;
++	__u16 scale_factor_v;
++	__u16 scale_recip_h;
++	__u16 scale_recip_v;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_downscale_extra - PiSP Back End Downscale Extra config
++ * @scaled_width:	Scaled image width
++ * @scaled_height:	Scaled image height
++ */
++struct pisp_be_downscale_extra {
++	__u16 scaled_width;
++	__u16 scaled_height;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_hog_config - PiSP Back End HOG config
++ *
++ * Histogram of Oriented Gradients configuration
++ *
++ * @compute_signed:	Set 0 for unsigned gradients, 1 for signed
++ * @channel_mix:	Channels proportions to use
++ * @stride:		Stride in bytes between blocks directly below
++ */
++struct pisp_be_hog_config {
++	__u8 compute_signed;
++	__u8 channel_mix[3];
++	__u32 stride;
++} __attribute__((packed));
++
++struct pisp_be_axi_config {
++	__u8 r_qos; /* Read QoS */
++	__u8 r_cache_prot; /* Read { prot[2:0], cache[3:0] } */
++	__u8 w_qos; /* Write QoS */
++	__u8 w_cache_prot; /* Write { prot[2:0], cache[3:0] } */
++} __attribute__((packed));
++
++/**
++ * enum pisp_be_transform - PiSP Back End Transform flags
++ * @PISP_BE_TRANSFORM_NONE:	No transform
++ * @PISP_BE_TRANSFORM_HFLIP:	Horizontal flip
++ * @PISP_BE_TRANSFORM_VFLIP:	Vertical flip
++ * @PISP_BE_TRANSFORM_ROT180:	180 degress rotation
++ */
++enum pisp_be_transform {
++	PISP_BE_TRANSFORM_NONE = 0x0,
++	PISP_BE_TRANSFORM_HFLIP = 0x1,
++	PISP_BE_TRANSFORM_VFLIP = 0x2,
++	PISP_BE_TRANSFORM_ROT180 =
++		(PISP_BE_TRANSFORM_HFLIP | PISP_BE_TRANSFORM_VFLIP)
++};
++
++struct pisp_be_output_format_config {
++	struct pisp_image_format_config image;
++	__u8 transform;
++	__u8 pad[3];
++	__u16 lo;
++	__u16 hi;
++	__u16 lo2;
++	__u16 hi2;
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_output_buffer_config - PiSP Back End Output buffer
++ * @addr:		Output buffer address
++ */
++struct pisp_be_output_buffer_config {
++	/* low 32 bits followed by high 32 bits (for each of 3 planes) */
++	__u32 addr[3][2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_hog_buffer_config - PiSP Back End HOG buffer
++ * @addr:		HOG buffer address
++ */
++struct pisp_be_hog_buffer_config {
++	/* low 32 bits followed by high 32 bits */
++	__u32 addr[2];
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_config - RaspberryPi PiSP Back End Processing configuration
++ *
++ * @global:			Global PiSP configuration
++ * @input_format:		Input image format
++ * @decompress:			Decompress configuration
++ * @dpc:			Defective Pixel Correction configuration
++ * @geq:			Green Equalisation configuration
++ * @tdn_input_format:		Temporal Denoise input format
++ * @tdn_decompress:		Temporal Denoise decompress configuration
++ * @tdn:			Temporal Denoise configuration
++ * @tdn_compress:		Temporal Denoise compress configuration
++ * @tdn_output_format:		Temporal Denoise output format
++ * @sdn:			Spatial Denoise configuration
++ * @blc:			Black Level Correction configuration
++ * @stitch_compress:		Stitch compress configuration
++ * @stitch_output_format:	Stitch output format
++ * @stitch_input_format:	Stitch input format
++ * @stitch_decompress:		Stitch decompress configuration
++ * @stitch:			Stitch configuration
++ * @lsc:			Lens Shading Correction configuration
++ * @wbg:			White Balance Gain configuration
++ * @cdn:			Colour Denoise configuration
++ * @cac:			Colour Aberration Correction configuration
++ * @debin:			Debinning configuration
++ * @tonemap:			Tonemapping configuration
++ * @demosaic:			Demosaicing configuration
++ * @ccm:			Colour Correction Matrix configuration
++ * @sat_control:		Saturation Control configuration
++ * @ycbcr:			YCbCr colour correction configuration
++ * @sharpen:			Sharpening configuration
++ * @false_colour:		False colour correction
++ * @sh_fc_combine:		Sharpening and False Colour correction
++ * @ycbcr_inverse:		Inverse YCbCr colour correction
++ * @gamma:			Gamma curve configuration
++ * @csc:			Color Space Conversion configuration
++ * @downscale:			Downscale configuration
++ * @resample:			Resampling configuration
++ * @output_format:		Output format configuration
++ * @hog:			HOG configuration
++ */
++struct pisp_be_config {
++	struct pisp_be_global_config global;
++	struct pisp_image_format_config input_format;
++	struct pisp_decompress_config decompress;
++	struct pisp_be_dpc_config dpc;
++	struct pisp_be_geq_config geq;
++	struct pisp_image_format_config tdn_input_format;
++	struct pisp_decompress_config tdn_decompress;
++	struct pisp_be_tdn_config tdn;
++	struct pisp_compress_config tdn_compress;
++	struct pisp_image_format_config tdn_output_format;
++	struct pisp_be_sdn_config sdn;
++	struct pisp_bla_config blc;
++	struct pisp_compress_config stitch_compress;
++	struct pisp_image_format_config stitch_output_format;
++	struct pisp_image_format_config stitch_input_format;
++	struct pisp_decompress_config stitch_decompress;
++	struct pisp_be_stitch_config stitch;
++	struct pisp_be_lsc_config lsc;
++	struct pisp_wbg_config wbg;
++	struct pisp_be_cdn_config cdn;
++	struct pisp_be_cac_config cac;
++	struct pisp_be_debin_config debin;
++	struct pisp_be_tonemap_config tonemap;
++	struct pisp_be_demosaic_config demosaic;
++	struct pisp_be_ccm_config ccm;
++	struct pisp_be_sat_control_config sat_control;
++	struct pisp_be_ccm_config ycbcr;
++	struct pisp_be_sharpen_config sharpen;
++	struct pisp_be_false_colour_config false_colour;
++	struct pisp_be_sh_fc_combine_config sh_fc_combine;
++	struct pisp_be_ccm_config ycbcr_inverse;
++	struct pisp_be_gamma_config gamma;
++	struct pisp_be_ccm_config csc[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_downscale_config downscale[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_resample_config resample[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_output_format_config
++				output_format[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_hog_config hog;
++} __attribute__((packed));
++
++/**
++ * enum pisp_tile_edge - PiSP Back End Tile position
++ * @PISP_LEFT_EDGE:		Left edge tile
++ * @PISP_RIGHT_EDGE:		Right edge tile
++ * @PISP_TOP_EDGE:		Top edge tile
++ * @PISP_BOTTOM_EDGE:		Bottom edge tile
++ */
++enum pisp_tile_edge {
++	PISP_LEFT_EDGE = (1 << 0),
++	PISP_RIGHT_EDGE = (1 << 1),
++	PISP_TOP_EDGE = (1 << 2),
++	PISP_BOTTOM_EDGE = (1 << 3)
++};
++
++/**
++ * struct pisp_tile - Raspberry Pi PiSP Back End tile configuration
++ *
++ * Tile parameters: each set of tile parameters is a 160-bytes block of data
++ * which contains the tile processing parameters.
++ *
++ * @edge:			Edge tile flag
++ * @pad0:			Padding bytes
++ * @input_addr_offset:		Top-left pixel offset, in bytes
++ * @input_addr_offset2:		Top-left pixel offset, in bytes for the second/
++ *				third image planes
++ * @input_offset_x:		Horizontal offset in pixels of this tile in the
++ *				input image
++ * @input_offset_y:		Vertical offset in pixels of this tile in the
++ *				input image
++ * @input_width:		Width in pixels of this tile
++ * @input_height:		Height in pixels of the this tile
++ * @tdn_input_addr_offset:	TDN input image offset, in bytes
++ * @tdn_output_addr_offset:	TDN output image offset, in bytes
++ * @stitch_input_addr_offset:	Stitch input image offset, in bytes
++ * @stitch_output_addr_offset:	Stitch output image offset, in bytes
++ * @lsc_grid_offset_x:		Horizontal offset in the LSC table for this tile
++ * @lsc_grid_offset_y:		Vertical offset in the LSC table for this tile
++ * @cac_grid_offset_x:		Horizontal offset in the CAC table for this tile
++ * @cac_grid_offset_y:		Horizontal offset in the CAC table for this tile
++ * @crop_x_start:		Number of pixels cropped from the left of the
++ *				tile
++ * @crop_x_end:			Number of pixels cropped from the right of the
++ *				tile
++ * @crop_y_start:		Number of pixels cropped from the top of the
++ *				tile
++ * @crop_y_end:			Number of pixels cropped from the bottom of the
++ *				tile
++ * @downscale_phase_x:		Initial horizontal phase in pixels
++ * @downscale_phase_y:		Initial vertical phase in pixels
++ * @resample_in_width:		Width in pixels of the tile entering the
++ *				Resample block
++ * @resample_in_height:		Height in pixels of the tile entering the
++ *				Resample block
++ * @resample_phase_x:		Initial horizontal phase for the Resample block
++ * @resample_phase_y:		Initial vertical phase for the Resample block
++ * @output_offset_x:		Horizontal offset in pixels where the tile will
++ *				be written into the output image
++ * @output_offset_y:		Vertical offset in pixels where the tile will be
++ *				written into the output image
++ * @output_width:		Width in pixels in the output image of this tile
++ * @output_height:		Height in pixels in the output image of this tile
++ * @output_addr_offset:		Offset in bytes into the output buffer
++ * @output_addr_offset2:	Offset in bytes into the output buffer for the
++ *				second and third plane
++ * @output_hog_addr_offset:	Offset in bytes into the HOG buffer where
++ *				results of this tile are to be written
++ */
++struct pisp_tile {
++	__u8 edge; /* enum pisp_tile_edge */
++	__u8 pad0[3];
++	/* 4 bytes */
++	__u32 input_addr_offset;
++	__u32 input_addr_offset2;
++	__u16 input_offset_x;
++	__u16 input_offset_y;
++	__u16 input_width;
++	__u16 input_height;
++	/* 20 bytes */
++	__u32 tdn_input_addr_offset;
++	__u32 tdn_output_addr_offset;
++	__u32 stitch_input_addr_offset;
++	__u32 stitch_output_addr_offset;
++	/* 36 bytes */
++	__u32 lsc_grid_offset_x;
++	__u32 lsc_grid_offset_y;
++	/* 44 bytes */
++	__u32 cac_grid_offset_x;
++	__u32 cac_grid_offset_y;
++	/* 52 bytes */
++	__u16 crop_x_start[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 crop_x_end[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 crop_y_start[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 crop_y_end[PISP_BACK_END_NUM_OUTPUTS];
++	/* 68 bytes */
++	/* Ordering is planes then branches */
++	__u16 downscale_phase_x[3 * PISP_BACK_END_NUM_OUTPUTS];
++	__u16 downscale_phase_y[3 * PISP_BACK_END_NUM_OUTPUTS];
++	/* 92 bytes */
++	__u16 resample_in_width[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 resample_in_height[PISP_BACK_END_NUM_OUTPUTS];
++	/* 100 bytes */
++	/* Ordering is planes then branches */
++	__u16 resample_phase_x[3 * PISP_BACK_END_NUM_OUTPUTS];
++	__u16 resample_phase_y[3 * PISP_BACK_END_NUM_OUTPUTS];
++	/* 124 bytes */
++	__u16 output_offset_x[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 output_offset_y[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 output_width[PISP_BACK_END_NUM_OUTPUTS];
++	__u16 output_height[PISP_BACK_END_NUM_OUTPUTS];
++	/* 140 bytes */
++	__u32 output_addr_offset[PISP_BACK_END_NUM_OUTPUTS];
++	__u32 output_addr_offset2[PISP_BACK_END_NUM_OUTPUTS];
++	/* 156 bytes */
++	__u32 output_hog_addr_offset;
++	/* 160 bytes */
++} __attribute__((packed));
++
++/**
++ * struct pisp_be_tiles_config - Raspberry Pi PiSP Back End configuration
++ * @tiles:	Tile descriptors
++ * @num_tiles:	Number of tiles
++ * @config:	PiSP Back End configuration
++ */
++struct pisp_be_tiles_config {
++	struct pisp_tile tiles[PISP_BACK_END_NUM_TILES];
++	__u32 num_tiles;
++	struct pisp_be_config config;
++} __attribute__((packed));
++
++#endif /* _UAPI_PISP_BE_CONFIG_H_ */
+--- /dev/null
++++ b/include/uapi/linux/media/raspberrypi/pisp_common.h
+@@ -0,0 +1,199 @@
++/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
++/*
++ * RP1 PiSP common definitions.
++ *
++ * Copyright (C) 2021 - Raspberry Pi Ltd.
++ *
++ */
++#ifndef _UAPI_PISP_COMMON_H_
++#define _UAPI_PISP_COMMON_H_
++
++#include <linux/types.h>
++
++struct pisp_image_format_config {
++	/* size in pixels */
++	__u16 width;
++	__u16 height;
++	/* must match struct pisp_image_format below */
++	__u32 format;
++	__s32 stride;
++	/* some planar image formats will need a second stride */
++	__s32 stride2;
++} __attribute__((packed));
++
++enum pisp_bayer_order {
++	/*
++	 * Note how bayer_order&1 tells you if G is on the even pixels of the
++	 * checkerboard or not, and bayer_order&2 tells you if R is on the even
++	 * rows or is swapped with B. Note that if the top (of the 8) bits is
++	 * set, this denotes a monochrome or greyscale image, and the lower bits
++	 * should all be ignored.
++	 */
++	PISP_BAYER_ORDER_RGGB = 0,
++	PISP_BAYER_ORDER_GBRG = 1,
++	PISP_BAYER_ORDER_BGGR = 2,
++	PISP_BAYER_ORDER_GRBG = 3,
++	PISP_BAYER_ORDER_GREYSCALE = 128
++};
++
++enum pisp_image_format {
++	/*
++	 * Precise values are mostly tbd. Generally these will be portmanteau
++	 * values comprising bit fields and flags. This format must be shared
++	 * throughout the PiSP.
++	 */
++	PISP_IMAGE_FORMAT_BPS_8 = 0x00000000,
++	PISP_IMAGE_FORMAT_BPS_10 = 0x00000001,
++	PISP_IMAGE_FORMAT_BPS_12 = 0x00000002,
++	PISP_IMAGE_FORMAT_BPS_16 = 0x00000003,
++	PISP_IMAGE_FORMAT_BPS_MASK = 0x00000003,
++
++	PISP_IMAGE_FORMAT_PLANARITY_INTERLEAVED = 0x00000000,
++	PISP_IMAGE_FORMAT_PLANARITY_SEMI_PLANAR = 0x00000010,
++	PISP_IMAGE_FORMAT_PLANARITY_PLANAR = 0x00000020,
++	PISP_IMAGE_FORMAT_PLANARITY_MASK = 0x00000030,
++
++	PISP_IMAGE_FORMAT_SAMPLING_444 = 0x00000000,
++	PISP_IMAGE_FORMAT_SAMPLING_422 = 0x00000100,
++	PISP_IMAGE_FORMAT_SAMPLING_420 = 0x00000200,
++	PISP_IMAGE_FORMAT_SAMPLING_MASK = 0x00000300,
++
++	PISP_IMAGE_FORMAT_ORDER_NORMAL = 0x00000000,
++	PISP_IMAGE_FORMAT_ORDER_SWAPPED = 0x00001000,
++
++	PISP_IMAGE_FORMAT_SHIFT_0 = 0x00000000,
++	PISP_IMAGE_FORMAT_SHIFT_1 = 0x00010000,
++	PISP_IMAGE_FORMAT_SHIFT_2 = 0x00020000,
++	PISP_IMAGE_FORMAT_SHIFT_3 = 0x00030000,
++	PISP_IMAGE_FORMAT_SHIFT_4 = 0x00040000,
++	PISP_IMAGE_FORMAT_SHIFT_5 = 0x00050000,
++	PISP_IMAGE_FORMAT_SHIFT_6 = 0x00060000,
++	PISP_IMAGE_FORMAT_SHIFT_7 = 0x00070000,
++	PISP_IMAGE_FORMAT_SHIFT_8 = 0x00080000,
++	PISP_IMAGE_FORMAT_SHIFT_MASK = 0x000f0000,
++
++	PISP_IMAGE_FORMAT_UNCOMPRESSED = 0x00000000,
++	PISP_IMAGE_FORMAT_COMPRESSION_MODE_1 = 0x01000000,
++	PISP_IMAGE_FORMAT_COMPRESSION_MODE_2 = 0x02000000,
++	PISP_IMAGE_FORMAT_COMPRESSION_MODE_3 = 0x03000000,
++	PISP_IMAGE_FORMAT_COMPRESSION_MASK = 0x03000000,
++
++	PISP_IMAGE_FORMAT_HOG_SIGNED = 0x04000000,
++	PISP_IMAGE_FORMAT_HOG_UNSIGNED = 0x08000000,
++	PISP_IMAGE_FORMAT_INTEGRAL_IMAGE = 0x10000000,
++	PISP_IMAGE_FORMAT_WALLPAPER_ROLL = 0x20000000,
++	PISP_IMAGE_FORMAT_THREE_CHANNEL = 0x40000000,
++
++	/* Lastly a few specific instantiations of the above. */
++	PISP_IMAGE_FORMAT_SINGLE_16 = PISP_IMAGE_FORMAT_BPS_16,
++	PISP_IMAGE_FORMAT_THREE_16 = PISP_IMAGE_FORMAT_BPS_16 |
++				     PISP_IMAGE_FORMAT_THREE_CHANNEL
++};
++
++#define PISP_IMAGE_FORMAT_bps_8(fmt)                                           \
++	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_8)
++#define PISP_IMAGE_FORMAT_bps_10(fmt)                                          \
++	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_10)
++#define PISP_IMAGE_FORMAT_bps_12(fmt)                                          \
++	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_12)
++#define PISP_IMAGE_FORMAT_bps_16(fmt)                                          \
++	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_16)
++#define PISP_IMAGE_FORMAT_bps(fmt)                                             \
++	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) ?                                \
++	       8 + (2 << (((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) - 1)) : 8)
++#define PISP_IMAGE_FORMAT_shift(fmt)                                           \
++	(((fmt) & PISP_IMAGE_FORMAT_SHIFT_MASK) / PISP_IMAGE_FORMAT_SHIFT_1)
++#define PISP_IMAGE_FORMAT_three_channel(fmt)                                   \
++	((fmt) & PISP_IMAGE_FORMAT_THREE_CHANNEL)
++#define PISP_IMAGE_FORMAT_single_channel(fmt)                                  \
++	(!((fmt) & PISP_IMAGE_FORMAT_THREE_CHANNEL))
++#define PISP_IMAGE_FORMAT_compressed(fmt)                                      \
++	(((fmt) & PISP_IMAGE_FORMAT_COMPRESSION_MASK) !=                       \
++	 PISP_IMAGE_FORMAT_UNCOMPRESSED)
++#define PISP_IMAGE_FORMAT_sampling_444(fmt)                                    \
++	(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) ==                          \
++	 PISP_IMAGE_FORMAT_SAMPLING_444)
++#define PISP_IMAGE_FORMAT_sampling_422(fmt)                                    \
++	(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) ==                          \
++	 PISP_IMAGE_FORMAT_SAMPLING_422)
++#define PISP_IMAGE_FORMAT_sampling_420(fmt)                                    \
++	(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) ==                          \
++	 PISP_IMAGE_FORMAT_SAMPLING_420)
++#define PISP_IMAGE_FORMAT_order_normal(fmt)                                    \
++	(!((fmt) & PISP_IMAGE_FORMAT_ORDER_SWAPPED))
++#define PISP_IMAGE_FORMAT_order_swapped(fmt)                                   \
++	((fmt) & PISP_IMAGE_FORMAT_ORDER_SWAPPED)
++#define PISP_IMAGE_FORMAT_interleaved(fmt)                                     \
++	(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) ==                         \
++	 PISP_IMAGE_FORMAT_PLANARITY_INTERLEAVED)
++#define PISP_IMAGE_FORMAT_semiplanar(fmt)                                      \
++	(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) ==                         \
++	 PISP_IMAGE_FORMAT_PLANARITY_SEMI_PLANAR)
++#define PISP_IMAGE_FORMAT_planar(fmt)                                          \
++	(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) ==                         \
++	 PISP_IMAGE_FORMAT_PLANARITY_PLANAR)
++#define PISP_IMAGE_FORMAT_wallpaper(fmt)                                       \
++	((fmt) & PISP_IMAGE_FORMAT_WALLPAPER_ROLL)
++#define PISP_IMAGE_FORMAT_HOG(fmt)                                             \
++	((fmt) &                                                               \
++	 (PISP_IMAGE_FORMAT_HOG_SIGNED | PISP_IMAGE_FORMAT_HOG_UNSIGNED))
++
++#define PISP_WALLPAPER_WIDTH 128 /* in bytes */
++
++struct pisp_bla_config {
++	__u16 black_level_r;
++	__u16 black_level_gr;
++	__u16 black_level_gb;
++	__u16 black_level_b;
++	__u16 output_black_level;
++	__u8 pad[2];
++} __attribute__((packed));
++
++struct pisp_wbg_config {
++	__u16 gain_r;
++	__u16 gain_g;
++	__u16 gain_b;
++	__u8 pad[2];
++} __attribute__((packed));
++
++struct pisp_compress_config {
++	/* value subtracted from incoming data */
++	__u16 offset;
++	__u8 pad;
++	/* 1 => Companding; 2 => Delta (recommended); 3 => Combined (for HDR) */
++	__u8 mode;
++} __attribute__((packed));
++
++struct pisp_decompress_config {
++	/* value added to reconstructed data */
++	__u16 offset;
++	__u8 pad;
++	/* 1 => Companding; 2 => Delta (recommended); 3 => Combined (for HDR) */
++	__u8 mode;
++} __attribute__((packed));
++
++enum pisp_axi_flags {
++	/*
++	 * round down bursts to end at a 32-byte boundary, to align following
++	 * bursts
++	 */
++	PISP_AXI_FLAG_ALIGN = 128,
++	/* for FE writer: force WSTRB high, to pad output to 16-byte boundary */
++	PISP_AXI_FLAG_PAD = 64,
++	/* for FE writer: Use Output FIFO level to trigger "panic" */
++	PISP_AXI_FLAG_PANIC = 32,
++};
++
++struct pisp_axi_config {
++	/*
++	 * burst length minus one, which must be in the range 0:15; OR'd with
++	 * flags
++	 */
++	__u8 maxlen_flags;
++	/* { prot[2:0], cache[3:0] } fields, echoed on AXI bus */
++	__u8 cache_prot;
++	/* QoS field(s) (4x4 bits for FE writer; 4 bits for other masters) */
++	__u16 qos;
++} __attribute__((packed));
++
++#endif /* _UAPI_PISP_COMMON_H_ */
diff --git a/target/linux/bcm27xx/patches-6.6/950-1150-media-uapi-Document-meta-pixel-format-for-PiSP-BE-co.patch b/target/linux/bcm27xx/patches-6.6/950-1150-media-uapi-Document-meta-pixel-format-for-PiSP-BE-co.patch
new file mode 100644
index 0000000000..0ee62a7d33
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1150-media-uapi-Document-meta-pixel-format-for-PiSP-BE-co.patch
@@ -0,0 +1,86 @@
+From 7ca73020a5b26599d539083e413784e79891107e Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 26 Jan 2024 15:04:59 +0100
+Subject: [PATCH 1150/1215] media: uapi: Document meta pixel format for PiSP BE
+ config
+
+Add format description for the PiSP Back End configuration parameter
+buffer.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Reviewed-by: Naushir Patuck <naush@raspberrypi.com>
+---
+ .../userspace-api/media/v4l/meta-formats.rst  |  1 +
+ .../media/v4l/metafmt-pisp-be.rst             | 56 +++++++++++++++++++
+ 2 files changed, 57 insertions(+)
+ create mode 100644 Documentation/userspace-api/media/v4l/metafmt-pisp-be.rst
+
+--- a/Documentation/userspace-api/media/v4l/meta-formats.rst
++++ b/Documentation/userspace-api/media/v4l/meta-formats.rst
+@@ -15,6 +15,7 @@ These formats are used for the :ref:`met
+     metafmt-bcm2835-isp-stats
+     metafmt-d4xx
+     metafmt-intel-ipu3
++    metafmt-pisp-be
+     metafmt-rkisp1
+     metafmt-sensor-data
+     metafmt-uvc
+--- /dev/null
++++ b/Documentation/userspace-api/media/v4l/metafmt-pisp-be.rst
+@@ -0,0 +1,56 @@
++.. SPDX-License-Identifier: GPL-2.0
++
++.. _v4l2-meta-fmt-rpi-be-cfg:
++
++************************
++V4L2_META_FMT_RPI_BE_CFG
++************************
++
++Raspberry Pi PiSP Back End configuration format
++===============================================
++
++The Raspberry Pi PiSP Back End memory-to-memory image signal processor is
++configured by userspace by providing a buffer of configuration parameters
++to the `pispbe-config` output video device node using the
++:c:type:`v4l2_meta_format` interface.
++
++The PiSP Back End processes images in tiles, and its configuration requires
++specifying two different sets of parameters by populating the members of
++:c:type:`pisp_be_tiles_config` defined in the ``pisp_be_config.h`` header file.
++
++The `Raspberry Pi PiSP technical specification
++<https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf>`_
++provide detailed description of the ISP back end configuration and programming
++model.
++
++Global configuration data
++-------------------------
++
++The global configuration data describe how the pixels in a particular image are
++to be processed and is therefore shared across all the tiles of the image. So
++for example, LSC (Lens Shading Correction) or Denoise parameters would be common
++across all tiles from the same frame.
++
++Global configuration data are passed to the ISP by populating the member of
++:c:type:`pisp_be_config`.
++
++Tile parameters
++---------------
++
++As the ISP processes images in tiles, each set of tiles parameters describe how
++a single tile in an image is going to be processed. A single set of tile
++parameters consist of 160 bytes of data and to process a batch of tiles several
++sets of tiles parameters are required.
++
++Tiles parameters are passed to the ISP by populating the member of
++``pisp_tile`` and the ``num_tiles`` fields of :c:type:`pisp_be_tiles_config`.
++
++Raspberry Pi PiSP Back End uAPI data types
++==========================================
++
++This section describes the data types exposed to userspace by the Raspberry Pi
++PiSP Back End. The section is informative only, for a detailed description of
++each field refer to the `Raspberry Pi PiSP technical specification
++<https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf>`_.
++
++.. kernel-doc:: include/uapi/linux/media/raspberrypi/pisp_be_config.h
diff --git a/target/linux/bcm27xx/patches-6.6/950-1151-media-uapi-Document-PiSP-Compressed-RAW-Bayer-format.patch b/target/linux/bcm27xx/patches-6.6/950-1151-media-uapi-Document-PiSP-Compressed-RAW-Bayer-format.patch
new file mode 100644
index 0000000000..aa4b003e5b
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1151-media-uapi-Document-PiSP-Compressed-RAW-Bayer-format.patch
@@ -0,0 +1,106 @@
+From 5d6318f242cce5f9b5677baedde736a2b81061df Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Wed, 17 Jan 2024 11:21:50 +0200
+Subject: [PATCH 1151/1215] media: uapi: Document PiSP Compressed RAW Bayer
+ formats
+
+Document the Raspberry Pi compressed RAW Bayer formats.
+
+The compression algorithm description is provided by Nick Hollinghurst
+<nick.hollinghurst@raspberrypi.com> from Raspberry Pi.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Reviewed-by: Naushir Patuck <naush@raspberrypi.com>
+---
+ .../userspace-api/media/v4l/pixfmt-bayer.rst  |  1 +
+ .../media/v4l/pixfmt-srggb8-pisp-comp.rst     | 74 +++++++++++++++++++
+ 2 files changed, 75 insertions(+)
+ create mode 100644 Documentation/userspace-api/media/v4l/pixfmt-srggb8-pisp-comp.rst
+
+--- a/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst
++++ b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst
+@@ -20,6 +20,7 @@ orders. See also `the Wikipedia article
+     :maxdepth: 1
+ 
+     pixfmt-srggb8
++    pixfmt-srggb8-pisp-comp
+     pixfmt-srggb10
+     pixfmt-srggb10p
+     pixfmt-srggb10alaw8
+--- /dev/null
++++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb8-pisp-comp.rst
+@@ -0,0 +1,74 @@
++.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
++
++.. _v4l2-pix-fmt-pisp-comp1-rggb:
++.. _v4l2-pix-fmt-pisp-comp1-grbg:
++.. _v4l2-pix-fmt-pisp-comp1-gbrg:
++.. _v4l2-pix-fmt-pisp-comp1-bggr:
++.. _v4l2-pix-fmt-pisp-comp1-mono:
++.. _v4l2-pix-fmt-pisp-comp2-rggb:
++.. _v4l2-pix-fmt-pisp-comp2-grbg:
++.. _v4l2-pix-fmt-pisp-comp2-gbrg:
++.. _v4l2-pix-fmt-pisp-comp2-bggr:
++.. _v4l2-pix-fmt-pisp-comp2-mono:
++
++**************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
++V4L2_PIX_FMT_PISP_COMP1_RGGB ('PC1R'), V4L2_PIX_FMT_PISP_COMP1_GRBG ('PC1G'), V4L2_PIX_FMT_PISP_COMP1_GBRG ('PC1g'), V4L2_PIX_FMT_PISP_COMP1_BGGR ('PC1B), V4L2_PIX_FMT_PISP_COMP1_MONO ('PC1M'), V4L2_PIX_FMT_PISP_COMP2_RGGB ('PC2R'), V4L2_PIX_FMT_PISP_COMP2_GRBG ('PC2G'), V4L2_PIX_FMT_PISP_COMP2_GBRG ('PC2g'), V4L2_PIX_FMT_PISP_COMP2_BGGR ('PC2B), V4L2_PIX_FMT_PISP_COMP2_MONO ('PC2M')
++**************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
++
++================================================
++Raspberry Pi PiSP compressed 8-bit Bayer formats
++================================================
++
++Description
++===========
++
++The Raspberry Pi ISP (PiSP) uses a family of three fixed-rate compressed Bayer
++formats. A black-level offset may be subtracted to improve compression
++efficiency; the nominal black level and amount of offset must be signalled out
++of band. Each scanline is padded to a multiple of 8 pixels wide, and each block
++of 8 horizontally-contiguous pixels is coded using 8 bytes.
++
++Mode 1 uses a quantization and delta-based coding scheme which preserves up to
++12 significant bits. Mode 2 is a simple sqrt-like companding scheme with 6 PWL
++chords, preserving up to 12 significant bits. Mode 3 combines both companding
++(with 4 chords) and the delta scheme, preserving up to 14 significant bits.
++
++The remainder of this description applies to Modes 1 and 3.
++
++Each block of 8 pixels is separated into even and odd phases of 4 pixels,
++coded independently by 32-bit words at successive locations in memory.
++The two LS bits of each 32-bit word give its "quantization mode".
++
++In quantization mode 0, the lowest 321 quantization levels are multiples of
++FSD/4096 and the remaining levels are successive multiples of FSD/2048.
++Quantization modes 1 and 2 use linear quantization with step sizes of
++FSD/1024 and FSD/512 respectively. Each of the four pixels is quantized
++independently, with rounding to the nearest level.
++In quantization mode 2 where the middle two samples have quantized values
++(q1,q2) both in the range [384..511], they are coded using 9 bits for q1
++followed by 7 bits for (q2 & 127). Otherwise, for quantization modes
++0, 1 and 2: a 9-bit field encodes MIN(q1,q2) which must be in the range
++[0..511] and a 7-bit field encodes (q2-q1+64) which must be in [0..127].
++
++Each of the outer samples (q0,q3) is encoded using a 7-bit field based
++on its inner neighbour q1 or q2. In quantization mode 2 where the inner
++sample has a quantized value in the range [448..511], the field value is
++(q0-384). Otherwise for quantization modes 0, 1 and 2: The outer sample
++is encoded as (q0-MAX(0,q1-64)). q3 is likewise coded based on q2.
++Each of these values must be in the range [0..127]. All these fields
++of 2, 9, 7, 7, 7 bits respectively are packed in little-endian order
++to give a 32-bit word with LE byte order.
++
++Quantization mode 3 has a "7.5-bit" escape, used when none of the above
++encodings will fit. Each pixel value is quantized to the nearest of 176
++levels, where the lowest 95 levels are multiples of FSD/256 and the
++remaining levels are multiples of FSD/128 (level 175 represents values
++very close to FSD and may require saturating arithmetic to decode).
++
++Each pair of quantized pixels (q0,q1) or (q2,q3) is jointly coded
++by a 15-bit field: 2816*(q0>>4) + 16*q1 + (q0&15).
++Three fields of 2, 15, 15 bits are packed in LE order {15,15,2}.
++
++An implementation of a software decoder of compressed formats is available
++in `Raspberry Pi camera applications code base
++<https://github.com/raspberrypi/rpicam-apps/blob/main/image/dng.cpp>`_.
diff --git a/target/linux/bcm27xx/patches-6.6/950-1152-media-dt-bindings-Add-bindings-for-Raspberry-Pi-PiSP.patch b/target/linux/bcm27xx/patches-6.6/950-1152-media-dt-bindings-Add-bindings-for-Raspberry-Pi-PiSP.patch
new file mode 100644
index 0000000000..30c5cb3506
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1152-media-dt-bindings-Add-bindings-for-Raspberry-Pi-PiSP.patch
@@ -0,0 +1,97 @@
+From c38a898c6877c6722ebfecea99f42e5a84c3e453 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Thu, 25 Jan 2024 16:42:33 +0100
+Subject: [PATCH 1152/1215] media: dt-bindings: Add bindings for Raspberry Pi
+ PiSP Back End
+
+Add bindings for the Raspberry Pi PiSP Back End memory-to-memory image
+signal processor.
+
+Datasheet:
+https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Naushir Patuck <naush@raspberrypi.com>
+---
+ .../bindings/media/raspberrypi,pispbe.yaml    | 63 +++++++++++++++++++
+ MAINTAINERS                                   |  1 +
+ 2 files changed, 64 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/media/raspberrypi,pispbe.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/media/raspberrypi,pispbe.yaml
+@@ -0,0 +1,63 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/media/raspberrypi,pispbe.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Raspberry Pi PiSP Image Signal Processor (ISP) Back End
++
++maintainers:
++  - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
++  - Jacopo Mondi <jacopo.mondi@ideasonboard.com>
++
++description: |
++  The Raspberry Pi PiSP Image Signal Processor (ISP) Back End is an image
++  processor that fetches images in Bayer or Grayscale format from DRAM memory
++  in tiles and produces images consumable by applications.
++
++  The full ISP documentation is available at
++  https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf
++
++properties:
++  compatible:
++    items:
++      - enum:
++          - brcm,bcm2712-pispbe
++      - const: raspberrypi,pispbe
++
++  reg:
++    maxItems: 1
++
++  interrupts:
++    maxItems: 1
++
++  clocks:
++    maxItems: 1
++
++  iommus:
++    maxItems: 1
++
++required:
++  - compatible
++  - reg
++  - interrupts
++  - clocks
++
++additionalProperties: false
++
++examples:
++  - |
++    #include <dt-bindings/interrupt-controller/arm-gic.h>
++
++    soc {
++        #address-cells = <2>;
++        #size-cells = <2>;
++
++        isp@880000  {
++             compatible = "brcm,bcm2712-pispbe", "raspberrypi,pispbe";
++             reg = <0x10 0x00880000 0x0 0x4000>;
++             interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
++             clocks = <&firmware_clocks 7>;
++             iommus = <&iommu2>;
++        };
++    };
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -18037,6 +18037,7 @@ M:	Jacopo Mondi <jacopo.mondi@ideasonboa
+ L:	Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
+ L:	linux-media@vger.kernel.org
+ S:	Maintained
++F:	Documentation/devicetree/bindings/media/raspberrypi,pispbe.yaml
+ F:	include/uapi/linux/media/raspberrypi/
+ 
+ RC-CORE / LIRC FRAMEWORK
diff --git a/target/linux/bcm27xx/patches-6.6/950-1153-media-admin-guide-Document-the-Raspberry-Pi-PiSP-BE.patch b/target/linux/bcm27xx/patches-6.6/950-1153-media-admin-guide-Document-the-Raspberry-Pi-PiSP-BE.patch
new file mode 100644
index 0000000000..f443cc78c7
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1153-media-admin-guide-Document-the-Raspberry-Pi-PiSP-BE.patch
@@ -0,0 +1,162 @@
+From d68e76260316002869aea1b0edf4be399bb592b8 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Mon, 29 Jan 2024 17:23:55 +0100
+Subject: [PATCH 1153/1215] media: admin-guide: Document the Raspberry Pi PiSP
+ BE
+
+Add documentation for the PiSP Back End memory-to-memory ISP.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ .../admin-guide/media/raspberrypi-pisp-be.dot |  20 ++++
+ .../admin-guide/media/raspberrypi-pisp-be.rst | 109 ++++++++++++++++++
+ .../admin-guide/media/v4l-drivers.rst         |   1 +
+ 3 files changed, 130 insertions(+)
+ create mode 100644 Documentation/admin-guide/media/raspberrypi-pisp-be.dot
+ create mode 100644 Documentation/admin-guide/media/raspberrypi-pisp-be.rst
+
+--- /dev/null
++++ b/Documentation/admin-guide/media/raspberrypi-pisp-be.dot
+@@ -0,0 +1,20 @@
++digraph board {
++	rankdir=TB
++	n00000001 [label="{{<port0> 0 | <port1> 1 | <port2> 2 | <port7> 7} | pispbe\n | {<port3> 3 | <port4> 4 | <port5> 5 | <port6> 6}}", shape=Mrecord, style=filled, fillcolor=green]
++	n00000001:port3 -> n0000001c [style=bold]
++	n00000001:port4 -> n00000022 [style=bold]
++	n00000001:port5 -> n00000028 [style=bold]
++	n00000001:port6 -> n0000002e [style=bold]
++	n0000000a [label="pispbe-input\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
++	n0000000a -> n00000001:port0 [style=bold]
++	n00000010 [label="pispbe-tdn_input\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
++	n00000010 -> n00000001:port1 [style=bold]
++	n00000016 [label="pispbe-stitch_input\n/dev/video2", shape=box, style=filled, fillcolor=yellow]
++	n00000016 -> n00000001:port2 [style=bold]
++	n0000001c [label="pispbe-output0\n/dev/video3", shape=box, style=filled, fillcolor=yellow]
++	n00000022 [label="pispbe-output1\n/dev/video4", shape=box, style=filled, fillcolor=yellow]
++	n00000028 [label="pispbe-tdn_output\n/dev/video5", shape=box, style=filled, fillcolor=yellow]
++	n0000002e [label="pispbe-stitch_output\n/dev/video6", shape=box, style=filled, fillcolor=yellow]
++	n00000034 [label="pispbe-config\n/dev/video7", shape=box, style=filled, fillcolor=yellow]
++	n00000034 -> n00000001:port7 [style=bold]
++}
+--- /dev/null
++++ b/Documentation/admin-guide/media/raspberrypi-pisp-be.rst
+@@ -0,0 +1,109 @@
++.. SPDX-License-Identifier: GPL-2.0
++
++=========================================================
++Raspberry Pi PiSP Back End Memory-to-Memory ISP (pisp-be)
++=========================================================
++
++The PiSP Back End
++=================
++
++The PiSP Back End is a memory-to-memory Image Signal Processor (ISP) which reads
++image data from DRAM memory and performs image processing as specified by the
++application through the parameters in a configuration buffer, before writing
++pixel data back to memory through two distinct output channels.
++
++The ISP registers and programming model are documented in the `Raspberry Pi
++Image Signal Processor (PiSP) Specification document`_
++
++The PiSP Back End ISP processes images in tiles. The handling of image
++tessellation and the computation of low-level configuration parameters is
++realized by a free software library called `libpisp
++<https://github.com/raspberrypi/libpisp>`_.
++
++The full image processing pipeline, which involves capturing RAW Bayer data from
++an image sensor through a MIPI CSI-2 compatible capture interface, storing them
++in DRAM memory and processing them in the PiSP Back End to obtain images usable
++by an application is implemented in `libcamera <https://libcamera.org>`_ as
++part of the Raspberry Pi platform support.
++
++The pisp-be driver
++==================
++
++The Raspberry Pi PiSP Back End (pisp-be) driver is located under
++drivers/media/platform/raspberrypi/pisp-be. It uses the `V4L2 API` to register
++a number of video capture and output devices, the `V4L2 subdev API` to register
++a subdevice for the ISP that connects the video devices in a single media graph
++realized using the `Media Controller (MC) API`.
++
++The media topology registered by the `pisp-be` driver is represented below:
++
++.. _pips-be-topology:
++
++.. kernel-figure:: raspberrypi-pisp-be.dot
++    :alt:   Diagram of the default media pipeline topology
++    :align: center
++
++
++The media graph registers the following video device nodes:
++
++- pispbe-input: output device for images to be submitted to the ISP for
++  processing.
++- pispbe-tdn_input: output device for temporal denoise.
++- pispbe-stitch_input: output device for image stitching (HDR).
++- pispbe-output0: first capture device for processed images.
++- pispbe-output1: second capture device for processed images.
++- pispbe-tdn_output: capture device for temporal denoise.
++- pispbe-stitch_output: capture device for image stitching (HDR).
++- pispbe-config: output device for ISP configuration parameters.
++
++pispbe-input
++------------
++
++Images to be processed by the ISP are queued to the `pispbe-input` output device
++node. For a list of image formats supported as input to the ISP refer to the
++`Raspberry Pi Image Signal Processor (PiSP) Specification document`_.
++
++pispbe-tdn_input, pispbe-tdn_output
++-----------------------------------
++
++The `pispbe-tdn_input` output video device receives images to be processed by
++the temporal denoise block which are captured from the `pispbe-tdn_output`
++capture video device. Userspace is responsible for maintaining queues on both
++devices, and ensuring that buffers completed on the output are queued to the
++input.
++
++pispbe-stitch_input, pispbe-stitch_output
++-----------------------------------------
++
++To realize HDR (high dynamic range) image processing the image stitching and
++tonemapping blocks are used. The `pispbe-stitch_output` writes images to memory
++and the `pispbe-stitch_input` receives the previously written frame to process
++it along with the current input image. Userspace is responsible for maintaining
++queues on both devices, and ensuring that buffers completed on the output are
++queued to the input.
++
++pispbe-output0, pispbe-output1
++------------------------------
++
++The two capture devices write to memory the pixel data as processed by the ISP.
++
++pispbe-config
++-------------
++
++The `pispbe-config` output video devices receives a buffer of configuration
++parameters that define the desired image processing to be performed by the ISP.
++
++The format of the ISP configuration parameter is defined by
++:c:type:`pisp_be_tiles_config` C structure and the meaning of each parameter is
++described in the `Raspberry Pi Image Signal Processor (PiSP) Specification
++document`_.
++
++ISP configuration
++=================
++
++The ISP configuration is described solely by the content of the parameters
++buffer. The only parameter that userspace needs to configure using the V4L2 API
++is the image format on the output and capture video devices for validation of
++the content of the parameters buffer.
++
++.. _Raspberry Pi Image Signal Processor (PiSP) Specification document: https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf
+--- a/Documentation/admin-guide/media/v4l-drivers.rst
++++ b/Documentation/admin-guide/media/v4l-drivers.rst
+@@ -21,6 +21,7 @@ Video4Linux (V4L) driver-specific docume
+ 	omap4_camera
+ 	philips
+ 	qcom_camss
++	raspberrypi-pisp-be
+ 	rcar-fdp1
+ 	rkisp1
+ 	saa7134
diff --git a/target/linux/bcm27xx/patches-6.6/950-1154-media-pisp-be-Backport-the-mainline-PiSP-BE-driver.patch b/target/linux/bcm27xx/patches-6.6/950-1154-media-pisp-be-Backport-the-mainline-PiSP-BE-driver.patch
new file mode 100644
index 0000000000..a0123995fe
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1154-media-pisp-be-Backport-the-mainline-PiSP-BE-driver.patch
@@ -0,0 +1,2927 @@
+From c75989589bf77530f4013e0bc799169504c69937 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Thu, 27 Jun 2024 11:41:22 +0200
+Subject: [PATCH 1154/1215] media: pisp-be: Backport the mainline PiSP BE
+ driver
+
+Backport to rpi-6.6.y the mainline version of the PiSP BE driver.
+
+The backported version of the driver corresponds to the one available
+at:
+https://lore.kernel.org/all/20240626181440.195137-1-jacopo.mondi@ideasonboard.com/
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ .../platform/raspberrypi/pisp_be/Kconfig      |    4 +-
+ .../platform/raspberrypi/pisp_be/pisp_be.c    | 1288 +++++++----------
+ .../raspberrypi/pisp_be/pisp_be_config.h      |  533 -------
+ .../raspberrypi/pisp_be/pisp_be_formats.h     |   44 +-
+ 4 files changed, 572 insertions(+), 1297 deletions(-)
+ delete mode 100644 drivers/media/platform/raspberrypi/pisp_be/pisp_be_config.h
+
+--- a/drivers/media/platform/raspberrypi/pisp_be/Kconfig
++++ b/drivers/media/platform/raspberrypi/pisp_be/Kconfig
+@@ -1,10 +1,10 @@
+ config VIDEO_RASPBERRYPI_PISP_BE
+ 	tristate "Raspberry Pi PiSP Backend (BE) ISP driver"
+-	depends on VIDEO_DEV && PM
++	depends on V4L_PLATFORM_DRIVERS
++	depends on VIDEO_DEV
+ 	select VIDEO_V4L2_SUBDEV_API
+ 	select MEDIA_CONTROLLER
+ 	select VIDEOBUF2_DMA_CONTIG
+-	select V4L2_FWNODE
+ 	help
+ 	  Say Y here to enable support for the PiSP Backend (BE) ISP driver.
+ 
+--- a/drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
++++ b/drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
+@@ -1,12 +1,14 @@
+ // SPDX-License-Identifier: GPL-2.0
+ /*
+  * PiSP Back End driver.
+- * Copyright (c) 2021-2022 Raspberry Pi Limited.
++ * Copyright (c) 2021-2024 Raspberry Pi Limited.
+  *
+  */
+ #include <linux/clk.h>
+ #include <linux/interrupt.h>
+ #include <linux/io.h>
++#include <linux/kernel.h>
++#include <linux/lockdep.h>
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+@@ -15,49 +17,39 @@
+ #include <media/videobuf2-dma-contig.h>
+ #include <media/videobuf2-vmalloc.h>
+ 
+-#include "pisp_be_config.h"
+-#include "pisp_be_formats.h"
+-
+-MODULE_DESCRIPTION("PiSP Back End driver");
+-MODULE_AUTHOR("David Plowman <david.plowman@raspberrypi.com>");
+-MODULE_AUTHOR("Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>");
+-MODULE_LICENSE("GPL v2");
++#include <uapi/linux/media/raspberrypi/pisp_be_config.h>
+ 
+-/* Offset to use when registering the /dev/videoX node */
+-#define PISPBE_VIDEO_NODE_OFFSET 20
++#include "pisp_be_formats.h"
+ 
+ /* Maximum number of config buffers possible */
+ #define PISP_BE_NUM_CONFIG_BUFFERS VB2_MAX_FRAME
+ 
+-/*
+- * We want to support 2 independent instances allowing 2 simultaneous users
+- * of the ISP-BE (of course they share hardware, platform resources and mutex).
+- * Each such instance comprises a group of device nodes representing input
+- * and output queues, and a media controller device node to describe them.
+- */
+-#define PISPBE_NUM_NODE_GROUPS 2
+-
+ #define PISPBE_NAME "pispbe"
+ 
+ /* Some ISP-BE registers */
+-#define PISP_BE_VERSION_OFFSET (0x0)
+-#define PISP_BE_CONTROL_OFFSET (0x4)
+-#define PISP_BE_TILE_ADDR_LO_OFFSET (0x8)
+-#define PISP_BE_TILE_ADDR_HI_OFFSET (0xc)
+-#define PISP_BE_STATUS_OFFSET (0x10)
+-#define PISP_BE_BATCH_STATUS_OFFSET (0x14)
+-#define PISP_BE_INTERRUPT_EN_OFFSET (0x18)
+-#define PISP_BE_INTERRUPT_STATUS_OFFSET (0x1c)
+-#define PISP_BE_AXI_OFFSET (0x20)
+-#define PISP_BE_CONFIG_BASE_OFFSET (0x40)
+-#define PISP_BE_IO_INPUT_ADDR0_LO_OFFSET (PISP_BE_CONFIG_BASE_OFFSET)
+-#define PISP_BE_GLOBAL_BAYER_ENABLE_OFFSET (PISP_BE_CONFIG_BASE_OFFSET + 0x70)
+-#define PISP_BE_GLOBAL_RGB_ENABLE_OFFSET (PISP_BE_CONFIG_BASE_OFFSET + 0x74)
+-#define N_HW_ADDRESSES 14
+-#define N_HW_ENABLES 2
++#define PISP_BE_VERSION_REG		0x0
++#define PISP_BE_CONTROL_REG		0x4
++#define PISP_BE_CONTROL_COPY_CONFIG	BIT(1)
++#define PISP_BE_CONTROL_QUEUE_JOB	BIT(0)
++#define PISP_BE_CONTROL_NUM_TILES(n)	((n) << 16)
++#define PISP_BE_TILE_ADDR_LO_REG	0x8
++#define PISP_BE_TILE_ADDR_HI_REG	0xc
++#define PISP_BE_STATUS_REG		0x10
++#define PISP_BE_STATUS_QUEUED		BIT(0)
++#define PISP_BE_BATCH_STATUS_REG	0x14
++#define PISP_BE_INTERRUPT_EN_REG	0x18
++#define PISP_BE_INTERRUPT_STATUS_REG	0x1c
++#define PISP_BE_AXI_REG			0x20
++#define PISP_BE_CONFIG_BASE_REG		0x40
++#define PISP_BE_IO_ADDR_LOW(n)		(PISP_BE_CONFIG_BASE_REG + 8 * (n))
++#define PISP_BE_IO_ADDR_HIGH(n)		(PISP_BE_IO_ADDR_LOW((n)) + 4)
++#define PISP_BE_GLOBAL_BAYER_ENABLE	0xb0
++#define PISP_BE_GLOBAL_RGB_ENABLE	0xb4
++#define N_HW_ADDRESSES			13
++#define N_HW_ENABLES			2
+ 
+-#define PISP_BE_VERSION_2712C1 0x02252700
+-#define PISP_BE_VERSION_MINOR_BITS 0xF
++#define PISP_BE_VERSION_2712		0x02252700
++#define PISP_BE_VERSION_MINOR_BITS	0xf
+ 
+ /*
+  * This maps our nodes onto the inputs/outputs of the actual PiSP Back End.
+@@ -65,11 +57,10 @@ MODULE_LICENSE("GPL v2");
+  * context it means an input to the hardware (source image or metadata).
+  * Elsewhere it means an output from the hardware.
+  */
+-enum node_ids {
++enum pispbe_node_ids {
+ 	MAIN_INPUT_NODE,
+ 	TDN_INPUT_NODE,
+ 	STITCH_INPUT_NODE,
+-	HOG_OUTPUT_NODE,
+ 	OUTPUT0_NODE,
+ 	OUTPUT1_NODE,
+ 	TDN_OUTPUT_NODE,
+@@ -78,13 +69,13 @@ enum node_ids {
+ 	PISPBE_NUM_NODES
+ };
+ 
+-struct node_description {
++struct pispbe_node_description {
+ 	const char *ent_name;
+ 	enum v4l2_buf_type buf_type;
+ 	unsigned int caps;
+ };
+ 
+-static const struct node_description node_desc[PISPBE_NUM_NODES] = {
++static const struct pispbe_node_description node_desc[PISPBE_NUM_NODES] = {
+ 	/* MAIN_INPUT_NODE */
+ 	{
+ 		.ent_name = PISPBE_NAME "-input",
+@@ -103,12 +94,6 @@ static const struct node_description nod
+ 		.buf_type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
+ 		.caps = V4L2_CAP_VIDEO_OUTPUT_MPLANE,
+ 	},
+-	/* HOG_OUTPUT_NODE */
+-	{
+-		.ent_name = PISPBE_NAME "-hog_output",
+-		.buf_type = V4L2_BUF_TYPE_META_CAPTURE,
+-		.caps = V4L2_CAP_META_CAPTURE,
+-	},
+ 	/* OUTPUT0_NODE */
+ 	{
+ 		.ent_name = PISPBE_NAME "-output0",
+@@ -147,14 +132,12 @@ static const struct node_description nod
+ 	((desc)->buf_type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE))
+ 
+ #define NODE_IS_META(node) ( \
+-	((node)->buf_type == V4L2_BUF_TYPE_META_OUTPUT) || \
+-	((node)->buf_type == V4L2_BUF_TYPE_META_CAPTURE))
++	((node)->buf_type == V4L2_BUF_TYPE_META_OUTPUT))
+ #define NODE_IS_OUTPUT(node) ( \
+ 	((node)->buf_type == V4L2_BUF_TYPE_META_OUTPUT) || \
+ 	((node)->buf_type == V4L2_BUF_TYPE_VIDEO_OUTPUT) || \
+ 	((node)->buf_type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE))
+ #define NODE_IS_CAPTURE(node) ( \
+-	((node)->buf_type == V4L2_BUF_TYPE_META_CAPTURE) || \
+ 	((node)->buf_type == V4L2_BUF_TYPE_VIDEO_CAPTURE) || \
+ 	((node)->buf_type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE))
+ #define NODE_IS_MPLANE(node) ( \
+@@ -173,9 +156,12 @@ struct pispbe_node {
+ 	struct media_pad pad;
+ 	struct media_intf_devnode *intf_devnode;
+ 	struct media_link *intf_link;
+-	struct pispbe_node_group *node_group;
++	struct pispbe_dev *pispbe;
++	/* Video device lock */
+ 	struct mutex node_lock;
++	/* vb2_queue lock */
+ 	struct mutex queue_lock;
++	/* Protect pispbe_node->ready_queue and pispbe_buffer->ready_list */
+ 	spinlock_t ready_lock;
+ 	struct list_head ready_queue;
+ 	struct vb2_queue queue;
+@@ -186,29 +172,10 @@ struct pispbe_node {
+ /* For logging only, use the entity name with "pispbe" and separator removed */
+ #define NODE_NAME(node) \
+ 		(node_desc[(node)->id].ent_name + sizeof(PISPBE_NAME))
+-#define NODE_GET_V4L2(node) ((node)->node_group->v4l2_dev)
+-
+-/*
+- * Node group structure, which comprises all the input and output nodes that a
+- * single PiSP client will need, along with its own v4l2 and media devices.
+- */
+-struct pispbe_node_group {
+-	unsigned int id;
+-	struct v4l2_device v4l2_dev;
+-	struct v4l2_subdev sd;
+-	struct pispbe_dev *pispbe;
+-	struct media_device mdev;
+-	struct pispbe_node node[PISPBE_NUM_NODES];
+-	u32 streaming_map; /* bitmap of which nodes are streaming */
+-	struct media_pad pad[PISPBE_NUM_NODES]; /* output pads first */
+-	struct pisp_be_tiles_config *config;
+-	dma_addr_t config_dma_addr;
+-	unsigned int sequence;
+-};
+ 
+ /* Records details of the jobs currently running or queued on the h/w. */
+ struct pispbe_job {
+-	struct pispbe_node_group *node_group;
++	bool valid;
+ 	/*
+ 	 * An array of buffer pointers - remember it's source buffers first,
+ 	 * then captures, then metadata last.
+@@ -216,85 +183,66 @@ struct pispbe_job {
+ 	struct pispbe_buffer *buf[PISPBE_NUM_NODES];
+ };
+ 
++struct pispbe_hw_enables {
++	u32 bayer_enables;
++	u32 rgb_enables;
++};
++
++/* Records a job configuration and memory addresses. */
++struct pispbe_job_descriptor {
++	dma_addr_t hw_dma_addrs[N_HW_ADDRESSES];
++	struct pisp_be_tiles_config *config;
++	struct pispbe_hw_enables hw_enables;
++	dma_addr_t tiles;
++};
++
+ /*
+  * Structure representing the entire PiSP Back End device, comprising several
+- * node groups which share platform resources and a mutex for the actual HW.
++ * nodes which share platform resources and a mutex for the actual HW.
+  */
+ struct pispbe_dev {
+ 	struct device *dev;
+-	struct pispbe_node_group node_group[PISPBE_NUM_NODE_GROUPS];
+-	int hw_busy; /* non-zero if a job is queued or is being started */
+-	struct pispbe_job queued_job, running_job;
++	struct pispbe_dev *pispbe;
++	struct pisp_be_tiles_config *config;
+ 	void __iomem *be_reg_base;
+ 	struct clk *clk;
++	struct v4l2_device v4l2_dev;
++	struct v4l2_subdev sd;
++	struct media_device mdev;
++	struct media_pad pad[PISPBE_NUM_NODES]; /* output pads first */
++	struct pispbe_node node[PISPBE_NUM_NODES];
++	dma_addr_t config_dma_addr;
++	unsigned int sequence;
++	u32 streaming_map;
++	struct pispbe_job queued_job, running_job;
++	spinlock_t hw_lock; /* protects "hw_busy" flag and streaming_map */
++	bool hw_busy; /* non-zero if a job is queued or is being started */
+ 	int irq;
+ 	u32 hw_version;
+ 	u8 done, started;
+-	spinlock_t hw_lock; /* protects "hw_busy" flag and streaming_map */
+ };
+ 
+-static inline u32 read_reg(struct pispbe_dev *pispbe, unsigned int offset)
++static u32 pispbe_rd(struct pispbe_dev *pispbe, unsigned int offset)
+ {
+ 	return readl(pispbe->be_reg_base + offset);
+ }
+ 
+-static inline void write_reg(struct pispbe_dev *pispbe, unsigned int offset,
+-			     u32 val)
++static void pispbe_wr(struct pispbe_dev *pispbe, unsigned int offset, u32 val)
+ {
+ 	writel(val, pispbe->be_reg_base + offset);
+ }
+ 
+-/* Check and initialize hardware. */
+-static int hw_init(struct pispbe_dev *pispbe)
+-{
+-	u32 u;
+-
+-	/* Check the HW is present and has a known version */
+-	u = read_reg(pispbe, PISP_BE_VERSION_OFFSET);
+-	dev_info(pispbe->dev, "pispbe_probe: HW version:  0x%08x", u);
+-	pispbe->hw_version = u;
+-	if ((u & ~PISP_BE_VERSION_MINOR_BITS) != PISP_BE_VERSION_2712C1)
+-		return -ENODEV;
+-
+-	/* Clear leftover interrupts */
+-	write_reg(pispbe, PISP_BE_INTERRUPT_STATUS_OFFSET, 0xFFFFFFFFu);
+-	u = read_reg(pispbe, PISP_BE_BATCH_STATUS_OFFSET);
+-	dev_info(pispbe->dev, "pispbe_probe: BatchStatus: 0x%08x", u);
+-	pispbe->done = (uint8_t)u;
+-	pispbe->started = (uint8_t)(u >> 8);
+-	u = read_reg(pispbe, PISP_BE_STATUS_OFFSET);
+-	dev_info(pispbe->dev, "pispbe_probe: Status:      0x%08x", u);
+-	if (u != 0 || pispbe->done != pispbe->started) {
+-		dev_err(pispbe->dev, "pispbe_probe: HW is stuck or busy\n");
+-		return -EBUSY;
+-	}
+-	/*
+-	 * AXI QOS=0, CACHE=4'b0010, PROT=3'b011
+-	 * Also set "chicken bits" 22:20 which enable sub-64-byte bursts
+-	 * and AXI AWID/BID variability (on versions which support this).
+-	 */
+-	write_reg(pispbe, PISP_BE_AXI_OFFSET, 0x32703200u);
+-
+-	/* Enable both interrupt flags */
+-	write_reg(pispbe, PISP_BE_INTERRUPT_EN_OFFSET, 0x00000003u);
+-	return 0;
+-}
+-
+ /*
+  * Queue a job to the h/w. If the h/w is idle it will begin immediately.
+  * Caller must ensure it is "safe to queue", i.e. we don't already have a
+  * queued, unstarted job.
+  */
+-static void hw_queue_job(struct pispbe_dev *pispbe,
+-			 dma_addr_t hw_dma_addrs[N_HW_ADDRESSES],
+-			 u32 hw_enables[N_HW_ENABLES],
+-			 struct pisp_be_config *config, dma_addr_t tiles,
+-			 unsigned int num_tiles)
++static void pispbe_queue_job(struct pispbe_dev *pispbe,
++			     struct pispbe_job_descriptor *job)
+ {
+ 	unsigned int begin, end;
+-	unsigned int u;
+ 
+-	if (read_reg(pispbe, PISP_BE_STATUS_OFFSET) & 1)
++	if (pispbe_rd(pispbe, PISP_BE_STATUS_REG) & PISP_BE_STATUS_QUEUED)
+ 		dev_err(pispbe->dev, "ERROR: not safe to queue new job!\n");
+ 
+ 	/*
+@@ -303,51 +251,49 @@ static void hw_queue_job(struct pispbe_d
+ 	 * and we don't want to modify (or be vulnerable to modifications of)
+ 	 * the mmap'd buffer.
+ 	 */
+-	for (u = 0; u < N_HW_ADDRESSES; ++u) {
+-		write_reg(pispbe, PISP_BE_IO_INPUT_ADDR0_LO_OFFSET + 8 * u,
+-			  (u32)(hw_dma_addrs[u]));
+-		write_reg(pispbe, PISP_BE_IO_INPUT_ADDR0_LO_OFFSET + 8 * u + 4,
+-			  (u32)(hw_dma_addrs[u] >> 32));
+-	}
+-	write_reg(pispbe, PISP_BE_GLOBAL_BAYER_ENABLE_OFFSET, hw_enables[0]);
+-	write_reg(pispbe, PISP_BE_GLOBAL_RGB_ENABLE_OFFSET, hw_enables[1]);
++	for (unsigned int u = 0; u < N_HW_ADDRESSES; ++u) {
++		pispbe_wr(pispbe, PISP_BE_IO_ADDR_LOW(u),
++			  lower_32_bits(job->hw_dma_addrs[u]));
++		pispbe_wr(pispbe, PISP_BE_IO_ADDR_HIGH(u),
++			  upper_32_bits(job->hw_dma_addrs[u]));
++	}
++	pispbe_wr(pispbe, PISP_BE_GLOBAL_BAYER_ENABLE,
++		  job->hw_enables.bayer_enables);
++	pispbe_wr(pispbe, PISP_BE_GLOBAL_RGB_ENABLE,
++		  job->hw_enables.rgb_enables);
+ 
+-	/*
+-	 * Everything else is as supplied by the user. XXX Buffer sizes not
+-	 * checked!
+-	 */
++	/* Everything else is as supplied by the user. */
+ 	begin =	offsetof(struct pisp_be_config, global.bayer_order) /
+-								sizeof(u32);
+-	end = offsetof(struct pisp_be_config, axi) / sizeof(u32);
+-	for (u = begin; u < end; u++) {
+-		unsigned int val = ((u32 *)config)[u];
+-
+-		write_reg(pispbe, PISP_BE_CONFIG_BASE_OFFSET + 4 * u, val);
+-	}
++		sizeof(u32);
++	end = sizeof(struct pisp_be_config) / sizeof(u32);
++	for (unsigned int u = begin; u < end; u++)
++		pispbe_wr(pispbe, PISP_BE_CONFIG_BASE_REG + sizeof(u32) * u,
++			  ((u32 *)job->config)[u]);
+ 
+ 	/* Read back the addresses -- an error here could be fatal */
+-	for (u = 0; u < N_HW_ADDRESSES; ++u) {
+-		unsigned int offset = PISP_BE_IO_INPUT_ADDR0_LO_OFFSET + 8 * u;
+-		u64 along = read_reg(pispbe, offset);
+-
+-		along += ((u64)read_reg(pispbe, offset + 4)) << 32;
+-		if (along != (u64)(hw_dma_addrs[u])) {
+-			dev_err(pispbe->dev,
++	for (unsigned int u = 0; u < N_HW_ADDRESSES; ++u) {
++		unsigned int offset = PISP_BE_IO_ADDR_LOW(u);
++		u64 along = pispbe_rd(pispbe, offset);
++
++		along += ((u64)pispbe_rd(pispbe, offset + 4)) << 32;
++		if (along != (u64)(job->hw_dma_addrs[u])) {
++			dev_dbg(pispbe->dev,
+ 				"ISP BE config error: check if ISP RAMs enabled?\n");
+ 			return;
+ 		}
+ 	}
+ 
+ 	/*
+-	 * Write tile pointer to hardware. XXX Tile offsets and sizes not
+-	 * checked (and even if checked, the user could subsequently modify
+-	 * them)!
++	 * Write tile pointer to hardware. The IOMMU should prevent
++	 * out-of-bounds offsets reaching non-ISP buffers.
+ 	 */
+-	write_reg(pispbe, PISP_BE_TILE_ADDR_LO_OFFSET, (u32)tiles);
+-	write_reg(pispbe, PISP_BE_TILE_ADDR_HI_OFFSET, (u32)(tiles >> 32));
++	pispbe_wr(pispbe, PISP_BE_TILE_ADDR_LO_REG, lower_32_bits(job->tiles));
++	pispbe_wr(pispbe, PISP_BE_TILE_ADDR_HI_REG, upper_32_bits(job->tiles));
+ 
+ 	/* Enqueue the job */
+-	write_reg(pispbe, PISP_BE_CONTROL_OFFSET, 3 + 65536 * num_tiles);
++	pispbe_wr(pispbe, PISP_BE_CONTROL_REG,
++		  PISP_BE_CONTROL_COPY_CONFIG | PISP_BE_CONTROL_QUEUE_JOB |
++		  PISP_BE_CONTROL_NUM_TILES(job->config->num_tiles));
+ }
+ 
+ struct pispbe_buffer {
+@@ -356,8 +302,8 @@ struct pispbe_buffer {
+ 	unsigned int config_index;
+ };
+ 
+-static int get_addr_3(dma_addr_t addr[3], struct pispbe_buffer *buf,
+-		      struct pispbe_node *node)
++static int pispbe_get_planes_addr(dma_addr_t addr[3], struct pispbe_buffer *buf,
++				  struct pispbe_node *node)
+ {
+ 	unsigned int num_planes = node->format.fmt.pix_mp.num_planes;
+ 	unsigned int plane_factor = 0;
+@@ -367,22 +313,20 @@ static int get_addr_3(dma_addr_t addr[3]
+ 	if (!buf || !node->pisp_format)
+ 		return 0;
+ 
+-	WARN_ON(!NODE_IS_MPLANE(node));
+-
+ 	/*
+ 	 * Determine the base plane size. This will not be the same
+ 	 * as node->format.fmt.pix_mp.plane_fmt[0].sizeimage for a single
+ 	 * plane buffer in an mplane format.
+ 	 */
+ 	size = node->format.fmt.pix_mp.plane_fmt[0].bytesperline *
+-					node->format.fmt.pix_mp.height;
++	       node->format.fmt.pix_mp.height;
+ 
+-	for (p = 0; p < num_planes && p < 3; p++) {
++	for (p = 0; p < num_planes && p < PISPBE_MAX_PLANES; p++) {
+ 		addr[p] = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, p);
+ 		plane_factor += node->pisp_format->plane_factor[p];
+ 	}
+ 
+-	for (; p < MAX_PLANES && node->pisp_format->plane_factor[p]; p++) {
++	for (; p < PISPBE_MAX_PLANES && node->pisp_format->plane_factor[p]; p++) {
+ 		/*
+ 		 * Calculate the address offset of this plane as needed
+ 		 * by the hardware. This is specifically for non-mplane
+@@ -396,41 +340,41 @@ static int get_addr_3(dma_addr_t addr[3]
+ 	return num_planes;
+ }
+ 
+-static dma_addr_t get_addr(struct pispbe_buffer *buf)
++static dma_addr_t pispbe_get_addr(struct pispbe_buffer *buf)
+ {
+ 	if (buf)
+ 		return vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
++
+ 	return 0;
+ }
+ 
+-static void
+-fixup_addrs_enables(dma_addr_t addrs[N_HW_ADDRESSES],
+-		    u32 hw_enables[N_HW_ENABLES],
+-		    struct pisp_be_tiles_config *config,
+-		    struct pispbe_buffer *buf[PISPBE_NUM_NODES],
+-		    struct pispbe_node_group *node_group)
+-{
+-	int ret, i;
++static void pispbe_xlate_addrs(struct pispbe_dev *pispbe,
++			       struct pispbe_job_descriptor *job,
++			       struct pispbe_buffer *buf[PISPBE_NUM_NODES])
++{
++	struct pispbe_hw_enables *hw_en = &job->hw_enables;
++	struct pisp_be_tiles_config *config = job->config;
++	dma_addr_t *addrs = job->hw_dma_addrs;
++	int ret;
+ 
+ 	/* Take a copy of the "enable" bitmaps so we can modify them. */
+-	hw_enables[0] = config->config.global.bayer_enables;
+-	hw_enables[1] = config->config.global.rgb_enables;
++	hw_en->bayer_enables = config->config.global.bayer_enables;
++	hw_en->rgb_enables = config->config.global.rgb_enables;
+ 
+ 	/*
+ 	 * Main input first. There are 3 address pointers, corresponding to up
+ 	 * to 3 planes.
+ 	 */
+-	ret = get_addr_3(addrs, buf[MAIN_INPUT_NODE],
+-			 &node_group->node[MAIN_INPUT_NODE]);
++	ret = pispbe_get_planes_addr(addrs, buf[MAIN_INPUT_NODE],
++				     &pispbe->node[MAIN_INPUT_NODE]);
+ 	if (ret <= 0) {
+ 		/*
+ 		 * This shouldn't happen; pispbe_schedule_internal should insist
+ 		 * on an input.
+ 		 */
+-		dev_warn(node_group->pispbe->dev,
+-			"ISP-BE missing input\n");
+-		hw_enables[0] = 0;
+-		hw_enables[1] = 0;
++		dev_warn(pispbe->dev, "ISP-BE missing input\n");
++		hw_en->bayer_enables = 0;
++		hw_en->rgb_enables = 0;
+ 		return;
+ 	}
+ 
+@@ -439,118 +383,114 @@ fixup_addrs_enables(dma_addr_t addrs[N_H
+ 	 * used with Bayer input. Input enables must match the requirements
+ 	 * of the processing stages, otherwise the hardware can lock up!
+ 	 */
+-	if (hw_enables[0] & PISP_BE_BAYER_ENABLE_INPUT) {
+-		addrs[3] = get_addr(buf[TDN_INPUT_NODE]);
++	if (hw_en->bayer_enables & PISP_BE_BAYER_ENABLE_INPUT) {
++		addrs[3] = pispbe_get_addr(buf[TDN_INPUT_NODE]);
+ 		if (addrs[3] == 0 ||
+-		    !(hw_enables[0] & PISP_BE_BAYER_ENABLE_TDN_INPUT) ||
+-		    !(hw_enables[0] & PISP_BE_BAYER_ENABLE_TDN) ||
++		    !(hw_en->bayer_enables & PISP_BE_BAYER_ENABLE_TDN_INPUT) ||
++		    !(hw_en->bayer_enables & PISP_BE_BAYER_ENABLE_TDN) ||
+ 		    (config->config.tdn.reset & 1)) {
+-			hw_enables[0] &= ~(PISP_BE_BAYER_ENABLE_TDN_INPUT |
+-					   PISP_BE_BAYER_ENABLE_TDN_DECOMPRESS);
++			hw_en->bayer_enables &=
++				~(PISP_BE_BAYER_ENABLE_TDN_INPUT |
++				  PISP_BE_BAYER_ENABLE_TDN_DECOMPRESS);
+ 			if (!(config->config.tdn.reset & 1))
+-				hw_enables[0] &= ~PISP_BE_BAYER_ENABLE_TDN;
++				hw_en->bayer_enables &=
++					~PISP_BE_BAYER_ENABLE_TDN;
+ 		}
+ 
+-		addrs[4] = get_addr(buf[STITCH_INPUT_NODE]);
++		addrs[4] = pispbe_get_addr(buf[STITCH_INPUT_NODE]);
+ 		if (addrs[4] == 0 ||
+-		    !(hw_enables[0] & PISP_BE_BAYER_ENABLE_STITCH_INPUT) ||
+-		    !(hw_enables[0] & PISP_BE_BAYER_ENABLE_STITCH)) {
+-			hw_enables[0] &=
++		    !(hw_en->bayer_enables & PISP_BE_BAYER_ENABLE_STITCH_INPUT) ||
++		    !(hw_en->bayer_enables & PISP_BE_BAYER_ENABLE_STITCH)) {
++			hw_en->bayer_enables &=
+ 				~(PISP_BE_BAYER_ENABLE_STITCH_INPUT |
+ 				  PISP_BE_BAYER_ENABLE_STITCH_DECOMPRESS |
+ 				  PISP_BE_BAYER_ENABLE_STITCH);
+ 		}
+ 
+-		addrs[5] = get_addr(buf[TDN_OUTPUT_NODE]);
++		addrs[5] = pispbe_get_addr(buf[TDN_OUTPUT_NODE]);
+ 		if (addrs[5] == 0)
+-			hw_enables[0] &= ~(PISP_BE_BAYER_ENABLE_TDN_COMPRESS |
+-					   PISP_BE_BAYER_ENABLE_TDN_OUTPUT);
++			hw_en->bayer_enables &=
++				~(PISP_BE_BAYER_ENABLE_TDN_COMPRESS |
++				  PISP_BE_BAYER_ENABLE_TDN_OUTPUT);
+ 
+-		addrs[6] = get_addr(buf[STITCH_OUTPUT_NODE]);
++		addrs[6] = pispbe_get_addr(buf[STITCH_OUTPUT_NODE]);
+ 		if (addrs[6] == 0)
+-			hw_enables[0] &=
++			hw_en->bayer_enables &=
+ 				~(PISP_BE_BAYER_ENABLE_STITCH_COMPRESS |
+ 				  PISP_BE_BAYER_ENABLE_STITCH_OUTPUT);
+ 	} else {
+ 		/* No Bayer input? Disable entire Bayer pipe (else lockup) */
+-		hw_enables[0] = 0;
++		hw_en->bayer_enables = 0;
+ 	}
+ 
+ 	/* Main image output channels. */
+-	for (i = 0; i < PISP_BACK_END_NUM_OUTPUTS; i++) {
+-		ret = get_addr_3(addrs + 7 + 3 * i, buf[OUTPUT0_NODE + i],
+-				 &node_group->node[OUTPUT0_NODE + i]);
++	for (unsigned int i = 0; i < PISP_BACK_END_NUM_OUTPUTS; i++) {
++		ret = pispbe_get_planes_addr(addrs + 7 + 3 * i,
++					     buf[OUTPUT0_NODE + i],
++					     &pispbe->node[OUTPUT0_NODE + i]);
+ 		if (ret <= 0)
+-			hw_enables[1] &= ~(PISP_BE_RGB_ENABLE_OUTPUT0 << i);
++			hw_en->rgb_enables &= ~(PISP_BE_RGB_ENABLE_OUTPUT0 << i);
+ 	}
+-
+-	/* HoG output (always single plane). */
+-	addrs[13] = get_addr(buf[HOG_OUTPUT_NODE]);
+-	if (addrs[13] == 0)
+-		hw_enables[1] &= ~PISP_BE_RGB_ENABLE_HOG;
+ }
+ 
+ /*
+- * Internal function. Called from pispbe_schedule_one/all. Returns non-zero if
+- * we started a job.
++ * Prepare a job description to be submitted to the HW.
++ *
++ * To schedule a job, we need all streaming nodes (apart from Output0,
++ * Output1, Tdn and Stitch) to have a buffer ready, which must
++ * include at least a config buffer and a main input image.
+  *
+- * Warning: needs to be called with hw_lock taken, and releases it if it
+- * schedules a job.
++ * For Output0, Output1, Tdn and Stitch, a buffer only needs to be
++ * available if the blocks are enabled in the config.
++ *
++ * Needs to be called with hw_lock held.
++ *
++ * Returns 0 if a job has been successfully prepared, < 0 otherwise.
+  */
+-static int pispbe_schedule_internal(struct pispbe_node_group *node_group,
+-				    unsigned long flags)
++static int pispbe_prepare_job(struct pispbe_dev *pispbe,
++			      struct pispbe_job_descriptor *job)
+ {
+-	struct pisp_be_tiles_config *config_tiles_buffer;
+-	struct pispbe_dev *pispbe = node_group->pispbe;
+-	struct pispbe_buffer *buf[PISPBE_NUM_NODES];
+-	dma_addr_t hw_dma_addrs[N_HW_ADDRESSES];
+-	dma_addr_t tiles;
+-	u32 hw_enables[N_HW_ENABLES];
+-	struct pispbe_node *node;
+-	unsigned long flags1;
++	struct pispbe_buffer *buf[PISPBE_NUM_NODES] = {};
+ 	unsigned int config_index;
+-	int i;
++	struct pispbe_node *node;
++	unsigned long flags;
++
++	lockdep_assert_held(&pispbe->hw_lock);
++
++	memset(job, 0, sizeof(struct pispbe_job_descriptor));
+ 
+-	/*
+-	 * To schedule a job, we need all streaming nodes (apart from Output0,
+-	 * Output1, Tdn and Stitch) to have a buffer ready, which must
+-	 * include at least a config buffer and a main input image.
+-	 *
+-	 * For Output0, Output1, Tdn and Stitch, a buffer only needs to be
+-	 * available if the blocks are enabled in the config.
+-	 *
+-	 * (Note that streaming_map is protected by hw_lock, which is held.)
+-	 */
+ 	if (((BIT(CONFIG_NODE) | BIT(MAIN_INPUT_NODE)) &
+-		node_group->streaming_map) !=
+-			(BIT(CONFIG_NODE) | BIT(MAIN_INPUT_NODE))) {
+-		dev_dbg(pispbe->dev, "Nothing to do\n");
+-		return 0;
+-	}
++		pispbe->streaming_map) !=
++			(BIT(CONFIG_NODE) | BIT(MAIN_INPUT_NODE)))
++		return -ENODEV;
+ 
+-	node = &node_group->node[CONFIG_NODE];
+-	spin_lock_irqsave(&node->ready_lock, flags1);
+-	buf[CONFIG_NODE] =
+-	   list_first_entry_or_null(&node->ready_queue, struct pispbe_buffer,
+-				    ready_list);
+-	spin_unlock_irqrestore(&node->ready_lock, flags1);
++	node = &pispbe->node[CONFIG_NODE];
++	spin_lock_irqsave(&node->ready_lock, flags);
++	buf[CONFIG_NODE] = list_first_entry_or_null(&node->ready_queue,
++						    struct pispbe_buffer,
++						    ready_list);
++	if (buf[CONFIG_NODE]) {
++		list_del(&buf[CONFIG_NODE]->ready_list);
++		pispbe->queued_job.buf[CONFIG_NODE] = buf[CONFIG_NODE];
++	}
++	spin_unlock_irqrestore(&node->ready_lock, flags);
+ 
+ 	/* Exit early if no config buffer has been queued. */
+ 	if (!buf[CONFIG_NODE])
+-		return 0;
++		return -ENODEV;
+ 
+ 	config_index = buf[CONFIG_NODE]->vb.vb2_buf.index;
+-	config_tiles_buffer = &node_group->config[config_index];
+-	tiles = (dma_addr_t)node_group->config_dma_addr +
+-			config_index * sizeof(struct pisp_be_tiles_config) +
+-			offsetof(struct pisp_be_tiles_config, tiles);
++	job->config = &pispbe->config[config_index];
++	job->tiles = pispbe->config_dma_addr +
++		     config_index * sizeof(struct pisp_be_tiles_config) +
++		     offsetof(struct pisp_be_tiles_config, tiles);
+ 
+ 	/* remember: srcimages, captures then metadata */
+-	for (i = 0; i < PISPBE_NUM_NODES; i++) {
++	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++) {
+ 		unsigned int bayer_en =
+-			config_tiles_buffer->config.global.bayer_enables;
++			job->config->config.global.bayer_enables;
+ 		unsigned int rgb_en =
+-			config_tiles_buffer->config.global.rgb_enables;
++			job->config->config.global.rgb_enables;
+ 		bool ignore_buffers = false;
+ 
+ 		/* Config node is handled outside the loop above. */
+@@ -558,7 +498,7 @@ static int pispbe_schedule_internal(stru
+ 			continue;
+ 
+ 		buf[i] = NULL;
+-		if (!(node_group->streaming_map & BIT(i)))
++		if (!(pispbe->streaming_map & BIT(i)))
+ 			continue;
+ 
+ 		if ((!(rgb_en & PISP_BE_RGB_ENABLE_OUTPUT0) &&
+@@ -578,119 +518,103 @@ static int pispbe_schedule_internal(stru
+ 			 * global enables aren't set for these blocks. If a
+ 			 * buffer has been provided, we dequeue it back to the
+ 			 * user with the other in-use buffers.
+-			 *
+ 			 */
+ 			ignore_buffers = true;
+ 		}
+ 
+-		node = &node_group->node[i];
++		node = &pispbe->node[i];
+ 
+-		spin_lock_irqsave(&node->ready_lock, flags1);
++		/* Pull a buffer from each V4L2 queue to form the queued job */
++		spin_lock_irqsave(&node->ready_lock, flags);
+ 		buf[i] = list_first_entry_or_null(&node->ready_queue,
+ 						  struct pispbe_buffer,
+ 						  ready_list);
+-		spin_unlock_irqrestore(&node->ready_lock, flags1);
+-		if (!buf[i] && !ignore_buffers) {
+-			dev_dbg(pispbe->dev, "Nothing to do\n");
+-			return 0;
+-		}
+-	}
+-
+-	/* Pull a buffer from each V4L2 queue to form the queued job */
+-	for (i = 0; i < PISPBE_NUM_NODES; i++) {
+ 		if (buf[i]) {
+-			node = &node_group->node[i];
+-
+-			spin_lock_irqsave(&node->ready_lock, flags1);
+ 			list_del(&buf[i]->ready_list);
+-			spin_unlock_irqrestore(&node->ready_lock,
+-					       flags1);
++			pispbe->queued_job.buf[i] = buf[i];
+ 		}
+-		pispbe->queued_job.buf[i] = buf[i];
++		spin_unlock_irqrestore(&node->ready_lock, flags);
++
++		if (!buf[i] && !ignore_buffers)
++			goto err_return_buffers;
+ 	}
+ 
+-	pispbe->queued_job.node_group = node_group;
+-	pispbe->hw_busy = 1;
+-	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+-
+-	/*
+-	 * We can kick the job off without the hw_lock, as this can
+-	 * never run again until hw_busy is cleared, which will happen
+-	 * only when the following job has been queued.
+-	 */
+-	dev_dbg(pispbe->dev, "Have buffers - starting hardware\n");
++	pispbe->queued_job.valid = true;
+ 
+ 	/* Convert buffers to DMA addresses for the hardware */
+-	fixup_addrs_enables(hw_dma_addrs, hw_enables,
+-			    config_tiles_buffer, buf, node_group);
+-	/*
+-	 * This could be a spot to fill in the
+-	 * buf[i]->vb.vb2_buf.planes[j].bytesused fields?
+-	 */
+-	i = config_tiles_buffer->num_tiles;
+-	if (i <= 0 || i > PISP_BACK_END_NUM_TILES ||
+-	    !((hw_enables[0] | hw_enables[1]) &
+-	      PISP_BE_BAYER_ENABLE_INPUT)) {
+-		/*
+-		 * Bad job. We can't let it proceed as it could lock up
+-		 * the hardware, or worse!
+-		 *
+-		 * XXX How to deal with this most cleanly? For now, just
+-		 * force num_tiles to 0, which causes the H/W to do
+-		 * something bizarre but survivable. It increments
+-		 * (started,done) counters by more than 1, but we seem
+-		 * to survive...
+-		 */
+-		dev_err(pispbe->dev, "PROBLEM: Bad job");
+-		i = 0;
+-	}
+-	hw_queue_job(pispbe, hw_dma_addrs, hw_enables,
+-		     &config_tiles_buffer->config, tiles, i);
++	pispbe_xlate_addrs(pispbe, job, buf);
+ 
+-	return 1;
+-}
++	return 0;
+ 
+-/* Try and schedule a job for just a single node group. */
+-static void pispbe_schedule_one(struct pispbe_node_group *node_group)
+-{
+-	struct pispbe_dev *pispbe = node_group->pispbe;
+-	unsigned long flags;
+-	int ret;
++err_return_buffers:
++	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++) {
++		struct pispbe_node *n =  &pispbe->node[i];
+ 
+-	spin_lock_irqsave(&pispbe->hw_lock, flags);
+-	if (pispbe->hw_busy) {
+-		spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+-		return;
++		if (!buf[i])
++			continue;
++
++		/* Return the buffer to the ready_list queue */
++		spin_lock_irqsave(&n->ready_lock, flags);
++		list_add(&buf[i]->ready_list, &n->ready_queue);
++		spin_unlock_irqrestore(&n->ready_lock, flags);
+ 	}
+ 
+-	/* A non-zero return means the lock was released. */
+-	ret = pispbe_schedule_internal(node_group, flags);
+-	if (!ret)
+-		spin_unlock_irqrestore(&pispbe->hw_lock, flags);
++	memset(&pispbe->queued_job, 0, sizeof(pispbe->queued_job));
++
++	return -ENODEV;
+ }
+ 
+-/* Try and schedule a job for any of the node groups. */
+-static void pispbe_schedule_any(struct pispbe_dev *pispbe, int clear_hw_busy)
++static void pispbe_schedule(struct pispbe_dev *pispbe, bool clear_hw_busy)
+ {
++	struct pispbe_job_descriptor job;
+ 	unsigned long flags;
++	int ret;
+ 
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+ 
+ 	if (clear_hw_busy)
+-		pispbe->hw_busy = 0;
+-	if (pispbe->hw_busy == 0) {
+-		unsigned int i;
++		pispbe->hw_busy = false;
+ 
+-		for (i = 0; i < PISPBE_NUM_NODE_GROUPS; i++) {
+-			/*
+-			 * A non-zero return from pispbe_schedule_internal means
+-			 * the lock was released.
+-			 */
+-			if (pispbe_schedule_internal(&pispbe->node_group[i],
+-						     flags))
+-				return;
+-		}
++	if (pispbe->hw_busy)
++		goto unlock_and_return;
++
++	ret = pispbe_prepare_job(pispbe, &job);
++	if (ret)
++		goto unlock_and_return;
++
++	/*
++	 * We can kick the job off without the hw_lock, as this can
++	 * never run again until hw_busy is cleared, which will happen
++	 * only when the following job has been queued and an interrupt
++	 * is rised.
++	 */
++	pispbe->hw_busy = true;
++	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
++
++	if (job.config->num_tiles <= 0 ||
++	    job.config->num_tiles > PISP_BACK_END_NUM_TILES ||
++	    !((job.hw_enables.bayer_enables | job.hw_enables.rgb_enables) &
++	      PISP_BE_BAYER_ENABLE_INPUT)) {
++		/*
++		 * Bad job. We can't let it proceed as it could lock up
++		 * the hardware, or worse!
++		 *
++		 * For now, just force num_tiles to 0, which causes the
++		 * H/W to do something bizarre but survivable. It
++		 * increments (started,done) counters by more than 1,
++		 * but we seem to survive...
++		 */
++		dev_dbg(pispbe->dev, "Bad job: invalid number of tiles: %u\n",
++			job.config->num_tiles);
++		job.config->num_tiles = 0;
+ 	}
++
++	pispbe_queue_job(pispbe, &job);
++
++	return;
++
++unlock_and_return:
++	/* No job has been queued, just release the lock and return. */
+ 	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+ }
+ 
+@@ -699,62 +623,53 @@ static void pispbe_isr_jobdone(struct pi
+ {
+ 	struct pispbe_buffer **buf = job->buf;
+ 	u64 ts = ktime_get_ns();
+-	int i;
+ 
+-	for (i = 0; i < PISPBE_NUM_NODES; i++) {
++	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++) {
+ 		if (buf[i]) {
+ 			buf[i]->vb.vb2_buf.timestamp = ts;
+-			buf[i]->vb.sequence = job->node_group->sequence;
++			buf[i]->vb.sequence = pispbe->sequence;
+ 			vb2_buffer_done(&buf[i]->vb.vb2_buf,
+ 					VB2_BUF_STATE_DONE);
+ 		}
+ 	}
+ 
+-	job->node_group->sequence++;
++	pispbe->sequence++;
+ }
+ 
+ static irqreturn_t pispbe_isr(int irq, void *dev)
+ {
+ 	struct pispbe_dev *pispbe = (struct pispbe_dev *)dev;
++	bool can_queue_another = false;
+ 	u8 started, done;
+-	int can_queue_another = 0;
+ 	u32 u;
+ 
+-	u = read_reg(pispbe, PISP_BE_INTERRUPT_STATUS_OFFSET);
++	u = pispbe_rd(pispbe, PISP_BE_INTERRUPT_STATUS_REG);
+ 	if (u == 0)
+ 		return IRQ_NONE;
+ 
+-	write_reg(pispbe, PISP_BE_INTERRUPT_STATUS_OFFSET, u);
+-	dev_dbg(pispbe->dev, "Hardware interrupt\n");
+-	u = read_reg(pispbe, PISP_BE_BATCH_STATUS_OFFSET);
++	pispbe_wr(pispbe, PISP_BE_INTERRUPT_STATUS_REG, u);
++	u = pispbe_rd(pispbe, PISP_BE_BATCH_STATUS_REG);
+ 	done = (uint8_t)u;
+ 	started = (uint8_t)(u >> 8);
+-	dev_dbg(pispbe->dev,
+-		"H/W started %d done %d, previously started %d done %d\n",
+-		(int)started, (int)done, (int)pispbe->started,
+-		(int)pispbe->done);
+ 
+ 	/*
+ 	 * Be aware that done can go up by 2 and started by 1 when: a job that
+ 	 * we previously saw "start" now finishes, and we then queued a new job
+ 	 * which we see both start and finish "simultaneously".
+ 	 */
+-	if (pispbe->running_job.node_group && pispbe->done != done) {
++	if (pispbe->running_job.valid && pispbe->done != done) {
+ 		pispbe_isr_jobdone(pispbe, &pispbe->running_job);
+ 		memset(&pispbe->running_job, 0, sizeof(pispbe->running_job));
+ 		pispbe->done++;
+-		dev_dbg(pispbe->dev, "Job done (1)\n");
+ 	}
+ 
+ 	if (pispbe->started != started) {
+ 		pispbe->started++;
+ 		can_queue_another = 1;
+-		dev_dbg(pispbe->dev, "Job started\n");
+ 
+-		if (pispbe->done != done && pispbe->queued_job.node_group) {
++		if (pispbe->done != done && pispbe->queued_job.valid) {
+ 			pispbe_isr_jobdone(pispbe, &pispbe->queued_job);
+ 			pispbe->done++;
+-			dev_dbg(pispbe->dev, "Job done (2)\n");
+ 		} else {
+ 			pispbe->running_job = pispbe->queued_job;
+ 		}
+@@ -763,74 +678,81 @@ static irqreturn_t pispbe_isr(int irq, v
+ 	}
+ 
+ 	if (pispbe->done != done || pispbe->started != started) {
+-		dev_err(pispbe->dev, "PROBLEM: counters not matching!\n");
++		dev_dbg(pispbe->dev,
++			"Job counters not matching: done = %u, expected %u - started = %u, expected %u\n",
++			pispbe->done, done, pispbe->started, started);
+ 		pispbe->started = started;
+ 		pispbe->done = done;
+ 	}
+ 
+ 	/* check if there's more to do before going to sleep */
+-	pispbe_schedule_any(pispbe, can_queue_another);
++	pispbe_schedule(pispbe, can_queue_another);
+ 
+ 	return IRQ_HANDLED;
+ }
+ 
+-static int pisp_be_validate_config(struct pispbe_node_group *node_group,
++static int pisp_be_validate_config(struct pispbe_dev *pispbe,
+ 				   struct pisp_be_tiles_config *config)
+ {
+ 	u32 bayer_enables = config->config.global.bayer_enables;
+ 	u32 rgb_enables = config->config.global.rgb_enables;
+-	struct device *dev = node_group->pispbe->dev;
++	struct device *dev = pispbe->dev;
+ 	struct v4l2_format *fmt;
+-	unsigned int bpl, size, i, j;
++	unsigned int bpl, size;
+ 
+ 	if (!(bayer_enables & PISP_BE_BAYER_ENABLE_INPUT) ==
+ 	    !(rgb_enables & PISP_BE_RGB_ENABLE_INPUT)) {
+-		dev_err(dev, "%s: Not one input enabled\n", __func__);
++		dev_dbg(dev, "%s: Not one input enabled\n", __func__);
+ 		return -EIO;
+ 	}
+ 
+ 	/* Ensure output config strides and buffer sizes match the V4L2 formats. */
+-	fmt = &node_group->node[TDN_OUTPUT_NODE].format;
++	fmt = &pispbe->node[TDN_OUTPUT_NODE].format;
+ 	if (bayer_enables & PISP_BE_BAYER_ENABLE_TDN_OUTPUT) {
+ 		bpl = config->config.tdn_output_format.stride;
+ 		size = bpl * config->config.tdn_output_format.height;
++
+ 		if (fmt->fmt.pix_mp.plane_fmt[0].bytesperline < bpl) {
+-			dev_err(dev, "%s: bpl mismatch on tdn_output\n",
++			dev_dbg(dev, "%s: bpl mismatch on tdn_output\n",
+ 				__func__);
+ 			return -EINVAL;
+ 		}
++
+ 		if (fmt->fmt.pix_mp.plane_fmt[0].sizeimage < size) {
+-			dev_err(dev, "%s: size mismatch on tdn_output\n",
++			dev_dbg(dev, "%s: size mismatch on tdn_output\n",
+ 				__func__);
+ 			return -EINVAL;
+ 		}
+ 	}
+ 
+-	fmt = &node_group->node[STITCH_OUTPUT_NODE].format;
++	fmt = &pispbe->node[STITCH_OUTPUT_NODE].format;
+ 	if (bayer_enables & PISP_BE_BAYER_ENABLE_STITCH_OUTPUT) {
+ 		bpl = config->config.stitch_output_format.stride;
+ 		size = bpl * config->config.stitch_output_format.height;
++
+ 		if (fmt->fmt.pix_mp.plane_fmt[0].bytesperline < bpl) {
+-			dev_err(dev, "%s: bpl mismatch on stitch_output\n",
++			dev_dbg(dev, "%s: bpl mismatch on stitch_output\n",
+ 				__func__);
+ 			return -EINVAL;
+ 		}
++
+ 		if (fmt->fmt.pix_mp.plane_fmt[0].sizeimage < size) {
+-			dev_err(dev, "%s: size mismatch on stitch_output\n",
++			dev_dbg(dev, "%s: size mismatch on stitch_output\n",
+ 				__func__);
+ 			return -EINVAL;
+ 		}
+ 	}
+ 
+-	for (j = 0; j < PISP_BACK_END_NUM_OUTPUTS; j++) {
++	for (unsigned int j = 0; j < PISP_BACK_END_NUM_OUTPUTS; j++) {
+ 		if (!(rgb_enables & PISP_BE_RGB_ENABLE_OUTPUT(j)))
+ 			continue;
++
+ 		if (config->config.output_format[j].image.format &
+ 		    PISP_IMAGE_FORMAT_WALLPAPER_ROLL)
+ 			continue; /* TODO: Size checks for wallpaper formats */
+ 
+-		fmt = &node_group->node[OUTPUT0_NODE + j].format;
+-		for (i = 0; i < fmt->fmt.pix_mp.num_planes; i++) {
++		fmt = &pispbe->node[OUTPUT0_NODE + j].format;
++		for (unsigned int i = 0; i < fmt->fmt.pix_mp.num_planes; i++) {
+ 			bpl = !i ? config->config.output_format[j].image.stride
+ 			    : config->config.output_format[j].image.stride2;
+ 			size = bpl * config->config.output_format[j].image.height;
+@@ -838,13 +760,15 @@ static int pisp_be_validate_config(struc
+ 			if (config->config.output_format[j].image.format &
+ 						PISP_IMAGE_FORMAT_SAMPLING_420)
+ 				size >>= 1;
++
+ 			if (fmt->fmt.pix_mp.plane_fmt[i].bytesperline < bpl) {
+-				dev_err(dev, "%s: bpl mismatch on output %d\n",
++				dev_dbg(dev, "%s: bpl mismatch on output %d\n",
+ 					__func__, j);
+ 				return -EINVAL;
+ 			}
++
+ 			if (fmt->fmt.pix_mp.plane_fmt[i].sizeimage < size) {
+-				dev_err(dev, "%s: size mismatch on output\n",
++				dev_dbg(dev, "%s: size mismatch on output\n",
+ 					__func__);
+ 				return -EINVAL;
+ 			}
+@@ -859,32 +783,32 @@ static int pispbe_node_queue_setup(struc
+ 				   struct device *alloc_devs[])
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(q);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
++	unsigned int num_planes = NODE_IS_MPLANE(node) ?
++				  node->format.fmt.pix_mp.num_planes : 1;
+ 
+-	*nplanes = 1;
+-	if (NODE_IS_MPLANE(node)) {
+-		unsigned int i;
+-
+-		*nplanes = node->format.fmt.pix_mp.num_planes;
+-		for (i = 0; i < *nplanes; i++) {
+-			unsigned int size =
+-				node->format.fmt.pix_mp.plane_fmt[i].sizeimage;
+-			if (sizes[i] && sizes[i] < size) {
+-				dev_err(pispbe->dev, "%s: size %u < %u\n",
+-					__func__, sizes[i], size);
++	if (*nplanes) {
++		if (*nplanes != num_planes)
++			return -EINVAL;
++
++		for (unsigned int i = 0; i < *nplanes; i++) {
++			unsigned int size = NODE_IS_MPLANE(node) ?
++				node->format.fmt.pix_mp.plane_fmt[i].sizeimage :
++				node->format.fmt.meta.buffersize;
++
++			if (sizes[i] < size)
+ 				return -EINVAL;
+-			}
+-			sizes[i] = size;
+ 		}
+-	} else if (NODE_IS_META(node)) {
+-		sizes[0] = node->format.fmt.meta.buffersize;
+-		/*
+-		 * Limit the config node buffer count to the number of internal
+-		 * buffers allocated.
+-		 */
+-		if (node->id == CONFIG_NODE)
+-			*nbuffers = min_t(unsigned int, *nbuffers,
+-					  PISP_BE_NUM_CONFIG_BUFFERS);
++
++		return 0;
++	}
++
++	*nplanes = num_planes;
++	for (unsigned int i = 0; i < *nplanes; i++) {
++		unsigned int size = NODE_IS_MPLANE(node) ?
++				node->format.fmt.pix_mp.plane_fmt[i].sizeimage :
++				node->format.fmt.meta.buffersize;
++		sizes[i] = size;
+ 	}
+ 
+ 	dev_dbg(pispbe->dev,
+@@ -897,19 +821,17 @@ static int pispbe_node_queue_setup(struc
+ static int pispbe_node_buffer_prepare(struct vb2_buffer *vb)
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(vb->vb2_queue);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	unsigned long size = 0;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 	unsigned int num_planes = NODE_IS_MPLANE(node) ?
+-					node->format.fmt.pix_mp.num_planes : 1;
+-	unsigned int i;
++				  node->format.fmt.pix_mp.num_planes : 1;
+ 
+-	for (i = 0; i < num_planes; i++) {
+-		size = NODE_IS_MPLANE(node)
+-			? node->format.fmt.pix_mp.plane_fmt[i].sizeimage
+-			: node->format.fmt.meta.buffersize;
++	for (unsigned int i = 0; i < num_planes; i++) {
++		unsigned long size = NODE_IS_MPLANE(node) ?
++				node->format.fmt.pix_mp.plane_fmt[i].sizeimage :
++				node->format.fmt.meta.buffersize;
+ 
+ 		if (vb2_plane_size(vb, i) < size) {
+-			dev_err(pispbe->dev,
++			dev_dbg(pispbe->dev,
+ 				"data will not fit into plane %d (%lu < %lu)\n",
+ 				i, vb2_plane_size(vb, i), size);
+ 			return -EINVAL;
+@@ -919,11 +841,12 @@ static int pispbe_node_buffer_prepare(st
+ 	}
+ 
+ 	if (node->id == CONFIG_NODE) {
+-		void *dst = &node->node_group->config[vb->index];
++		void *dst = &node->pispbe->config[vb->index];
+ 		void *src = vb2_plane_vaddr(vb, 0);
+ 
+ 		memcpy(dst, src, sizeof(struct pisp_be_tiles_config));
+-		return pisp_be_validate_config(node->node_group, dst);
++
++		return pisp_be_validate_config(pispbe, dst);
+ 	}
+ 
+ 	return 0;
+@@ -936,8 +859,7 @@ static void pispbe_node_buffer_queue(str
+ 	struct pispbe_buffer *buffer =
+ 		container_of(vbuf, struct pispbe_buffer, vb);
+ 	struct pispbe_node *node = vb2_get_drv_priv(buf->vb2_queue);
+-	struct pispbe_node_group *node_group = node->node_group;
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 	unsigned long flags;
+ 
+ 	dev_dbg(pispbe->dev, "%s: for node %s\n", __func__, NODE_NAME(node));
+@@ -947,44 +869,53 @@ static void pispbe_node_buffer_queue(str
+ 
+ 	/*
+ 	 * Every time we add a buffer, check if there's now some work for the hw
+-	 * to do, but only for this client.
++	 * to do.
+ 	 */
+-	pispbe_schedule_one(node_group);
++	pispbe_schedule(pispbe, false);
+ }
+ 
+ static int pispbe_node_start_streaming(struct vb2_queue *q, unsigned int count)
+ {
+-	unsigned long flags;
+ 	struct pispbe_node *node = vb2_get_drv_priv(q);
+-	struct pispbe_node_group *node_group = node->node_group;
+-	struct pispbe_dev *pispbe = node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_buffer *buf, *tmp;
++	unsigned long flags;
+ 	int ret;
+ 
+ 	ret = pm_runtime_resume_and_get(pispbe->dev);
+ 	if (ret < 0)
+-		return ret;
++		goto err_return_buffers;
+ 
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+-	node->node_group->streaming_map |=  BIT(node->id);
+-	node->node_group->sequence = 0;
++	node->pispbe->streaming_map |=  BIT(node->id);
++	node->pispbe->sequence = 0;
+ 	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+ 
+ 	dev_dbg(pispbe->dev, "%s: for node %s (count %u)\n",
+ 		__func__, NODE_NAME(node), count);
+-	dev_dbg(pispbe->dev, "Nodes streaming for this group now 0x%x\n",
+-		node->node_group->streaming_map);
++	dev_dbg(pispbe->dev, "Nodes streaming now 0x%x\n",
++		node->pispbe->streaming_map);
+ 
+ 	/* Maybe we're ready to run. */
+-	pispbe_schedule_one(node_group);
++	pispbe_schedule(pispbe, false);
+ 
+ 	return 0;
++
++err_return_buffers:
++	spin_lock_irqsave(&pispbe->hw_lock, flags);
++	list_for_each_entry_safe(buf, tmp, &node->ready_queue, ready_list) {
++		list_del(&buf->ready_list);
++		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
++	}
++	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
++
++	return ret;
+ }
+ 
+ static void pispbe_node_stop_streaming(struct vb2_queue *q)
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(q);
+-	struct pispbe_node_group *node_group = node->node_group;
+-	struct pispbe_dev *pispbe = node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 	struct pispbe_buffer *buf;
+ 	unsigned long flags;
+ 
+@@ -994,7 +925,8 @@ static void pispbe_node_stop_streaming(s
+ 	 * partial set of buffers was queued and cannot be run. For now, just
+ 	 * cancel all buffers stuck in the "ready queue", then wait for any
+ 	 * running job.
+-	 * XXX This may return buffers out of order.
++	 *
++	 * This may return buffers out of order.
+ 	 */
+ 	dev_dbg(pispbe->dev, "%s: for node %s\n", __func__, NODE_NAME(node));
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+@@ -1016,14 +948,14 @@ static void pispbe_node_stop_streaming(s
+ 	vb2_wait_for_all_buffers(&node->queue);
+ 
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+-	node_group->streaming_map &= ~BIT(node->id);
++	pispbe->streaming_map &= ~BIT(node->id);
+ 	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+ 
+ 	pm_runtime_mark_last_busy(pispbe->dev);
+ 	pm_runtime_put_autosuspend(pispbe->dev);
+ 
+-	dev_dbg(pispbe->dev, "Nodes streaming for this group now 0x%x\n",
+-		node_group->streaming_map);
++	dev_dbg(pispbe->dev, "Nodes streaming now 0x%x\n",
++		pispbe->streaming_map);
+ }
+ 
+ static const struct vb2_ops pispbe_node_queue_ops = {
+@@ -1047,22 +979,15 @@ static int pispbe_node_querycap(struct f
+ 				struct v4l2_capability *cap)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	strscpy(cap->driver, PISPBE_NAME, sizeof(cap->driver));
+ 	strscpy(cap->card, PISPBE_NAME, sizeof(cap->card));
+-	snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
+-		 dev_name(pispbe->dev));
+-
+-	cap->capabilities = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
+-			    V4L2_CAP_VIDEO_OUTPUT_MPLANE |
+-			    V4L2_CAP_STREAMING | V4L2_CAP_DEVICE_CAPS |
+-			    V4L2_CAP_META_OUTPUT | V4L2_CAP_META_CAPTURE;
+-	cap->device_caps = node->vfd.device_caps;
+ 
+ 	dev_dbg(pispbe->dev, "Caps for node %s: %x and %x (dev %x)\n",
+ 		NODE_NAME(node), cap->capabilities, cap->device_caps,
+ 		node->vfd.device_caps);
++
+ 	return 0;
+ }
+ 
+@@ -1070,17 +995,19 @@ static int pispbe_node_g_fmt_vid_cap(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (!NODE_IS_CAPTURE(node) || NODE_IS_META(node)) {
+-		dev_err(pispbe->dev,
++		dev_dbg(pispbe->dev,
+ 			"Cannot get capture fmt for output node %s\n",
+ 			NODE_NAME(node));
+ 		return -EINVAL;
+ 	}
++
+ 	*f = node->format;
+ 	dev_dbg(pispbe->dev, "Get capture format for node %s\n",
+ 		NODE_NAME(node));
++
+ 	return 0;
+ }
+ 
+@@ -1088,17 +1015,19 @@ static int pispbe_node_g_fmt_vid_out(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (NODE_IS_CAPTURE(node) || NODE_IS_META(node)) {
+-		dev_err(pispbe->dev,
++		dev_dbg(pispbe->dev,
+ 			"Cannot get capture fmt for output node %s\n",
+ 			 NODE_NAME(node));
+ 		return -EINVAL;
+ 	}
++
+ 	*f = node->format;
+ 	dev_dbg(pispbe->dev, "Get output format for node %s\n",
+ 		NODE_NAME(node));
++
+ 	return 0;
+ }
+ 
+@@ -1106,98 +1035,42 @@ static int pispbe_node_g_fmt_meta_out(st
+ 				      struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (!NODE_IS_META(node) || NODE_IS_CAPTURE(node)) {
+-		dev_err(pispbe->dev,
++		dev_dbg(pispbe->dev,
+ 			"Cannot get capture fmt for meta output node %s\n",
+ 			NODE_NAME(node));
+ 		return -EINVAL;
+ 	}
+-	*f = node->format;
+-	dev_dbg(pispbe->dev, "Get output format for meta node %s\n",
+-		NODE_NAME(node));
+-	return 0;
+-}
+ 
+-static int pispbe_node_g_fmt_meta_cap(struct file *file, void *priv,
+-				      struct v4l2_format *f)
+-{
+-	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-
+-	if (!NODE_IS_META(node) || NODE_IS_OUTPUT(node)) {
+-		dev_err(pispbe->dev,
+-			"Cannot get capture fmt for meta output node %s\n",
+-			NODE_NAME(node));
+-		return -EINVAL;
+-	}
+ 	*f = node->format;
+ 	dev_dbg(pispbe->dev, "Get output format for meta node %s\n",
+ 		NODE_NAME(node));
+-	return 0;
+-}
+-
+-static int verify_be_pix_format(const struct v4l2_format *f,
+-				struct pispbe_node *node)
+-{
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	unsigned int nplanes = f->fmt.pix_mp.num_planes;
+-	unsigned int i;
+-
+-	if (f->fmt.pix_mp.width == 0 || f->fmt.pix_mp.height == 0) {
+-		dev_err(pispbe->dev, "Details incorrect for output node %s\n",
+-			NODE_NAME(node));
+-		return -EINVAL;
+-	}
+-
+-	if (nplanes == 0 || nplanes > MAX_PLANES) {
+-		dev_err(pispbe->dev,
+-			"Bad number of planes for output node %s, req =%d\n",
+-			NODE_NAME(node), nplanes);
+-		return -EINVAL;
+-	}
+-
+-	for (i = 0; i < nplanes; i++) {
+-		const struct v4l2_plane_pix_format *p;
+-
+-		p = &f->fmt.pix_mp.plane_fmt[i];
+-		if (p->bytesperline == 0 || p->sizeimage == 0) {
+-			dev_err(pispbe->dev,
+-				"Invalid plane %d for output node %s\n",
+-				i, NODE_NAME(node));
+-			return -EINVAL;
+-		}
+-	}
+ 
+ 	return 0;
+ }
+ 
+-static const struct pisp_be_format *find_format(unsigned int fourcc)
++static const struct pisp_be_format *pispbe_find_fmt(unsigned int fourcc)
+ {
+-	const struct pisp_be_format *fmt;
+-	unsigned int i;
+-
+-	for (i = 0; i < ARRAY_SIZE(supported_formats); i++) {
+-		fmt = &supported_formats[i];
+-		if (fmt->fourcc == fourcc)
+-			return fmt;
++	for (unsigned int i = 0; i < ARRAY_SIZE(supported_formats); i++) {
++		if (supported_formats[i].fourcc == fourcc)
++			return &supported_formats[i];
+ 	}
+ 
+ 	return NULL;
+ }
+ 
+-static void set_plane_params(struct v4l2_format *f,
+-			     const struct pisp_be_format *fmt)
++static void pispbe_set_plane_params(struct v4l2_format *f,
++				    const struct pisp_be_format *fmt)
+ {
+ 	unsigned int nplanes = f->fmt.pix_mp.num_planes;
+ 	unsigned int total_plane_factor = 0;
+-	unsigned int i;
+ 
+-	for (i = 0; i < MAX_PLANES; i++)
++	for (unsigned int i = 0; i < PISPBE_MAX_PLANES; i++)
+ 		total_plane_factor += fmt->plane_factor[i];
+ 
+-	for (i = 0; i < nplanes; i++) {
++	for (unsigned int i = 0; i < nplanes; i++) {
+ 		struct v4l2_plane_pix_format *p = &f->fmt.pix_mp.plane_fmt[i];
+ 		unsigned int bpl, plane_size;
+ 
+@@ -1217,28 +1090,25 @@ static void set_plane_params(struct v4l2
+ 	}
+ }
+ 
+-static int try_format(struct v4l2_format *f, struct pispbe_node *node)
++static void pispbe_try_format(struct v4l2_format *f, struct pispbe_node *node)
+ {
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
++	u32 pixfmt = f->fmt.pix_mp.pixelformat;
+ 	const struct pisp_be_format *fmt;
+-	unsigned int i;
+ 	bool is_rgb;
+-	u32 pixfmt = f->fmt.pix_mp.pixelformat;
+ 
+ 	dev_dbg(pispbe->dev,
+-		"%s: [%s] req %ux%u " V4L2_FOURCC_CONV ", planes %d\n",
++		"%s: [%s] req %ux%u %p4cc, planes %d\n",
+ 		__func__, NODE_NAME(node), f->fmt.pix_mp.width,
+-		f->fmt.pix_mp.height, V4L2_FOURCC_CONV_ARGS(pixfmt),
++		f->fmt.pix_mp.height, &pixfmt,
+ 		f->fmt.pix_mp.num_planes);
+ 
+-	if (pixfmt == V4L2_PIX_FMT_RPI_BE)
+-		return verify_be_pix_format(f, node);
+-
+-	fmt = find_format(pixfmt);
++	fmt = pispbe_find_fmt(pixfmt);
+ 	if (!fmt) {
+-		dev_dbg(pispbe->dev, "%s: [%s] Format not found, defaulting to YUV420\n",
++		dev_dbg(pispbe->dev,
++			"%s: [%s] Format not found, defaulting to YUV420\n",
+ 			__func__, NODE_NAME(node));
+-		fmt = find_format(V4L2_PIX_FMT_YUV420);
++		fmt = pispbe_find_fmt(V4L2_PIX_FMT_YUV420);
+ 	}
+ 
+ 	f->fmt.pix_mp.pixelformat = fmt->fourcc;
+@@ -1254,7 +1124,8 @@ static int try_format(struct v4l2_format
+ 	 * not supported. This also catches the case when the "default"
+ 	 * colour space was requested (as that's never in the mask).
+ 	 */
+-	if (!(V4L2_COLORSPACE_MASK(f->fmt.pix_mp.colorspace) & fmt->colorspace_mask))
++	if (!(V4L2_COLORSPACE_MASK(f->fmt.pix_mp.colorspace) &
++	    fmt->colorspace_mask))
+ 		f->fmt.pix_mp.colorspace = fmt->colorspace_default;
+ 
+ 	/* In all cases, we only support the defaults for these: */
+@@ -1269,9 +1140,9 @@ static int try_format(struct v4l2_format
+ 					      f->fmt.pix_mp.ycbcr_enc);
+ 
+ 	/* Set plane size and bytes/line for each plane. */
+-	set_plane_params(f, fmt);
++	pispbe_set_plane_params(f, fmt);
+ 
+-	for (i = 0; i < f->fmt.pix_mp.num_planes; i++) {
++	for (unsigned int i = 0; i < f->fmt.pix_mp.num_planes; i++) {
+ 		dev_dbg(pispbe->dev,
+ 			"%s: [%s] calc plane %d, %ux%u, depth %u, bpl %u size %u\n",
+ 			__func__, NODE_NAME(node), i, f->fmt.pix_mp.width,
+@@ -1279,27 +1150,22 @@ static int try_format(struct v4l2_format
+ 			f->fmt.pix_mp.plane_fmt[i].bytesperline,
+ 			f->fmt.pix_mp.plane_fmt[i].sizeimage);
+ 	}
+-
+-	return 0;
+ }
+ 
+ static int pispbe_node_try_fmt_vid_cap(struct file *file, void *priv,
+ 				       struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	int ret;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (!NODE_IS_CAPTURE(node) || NODE_IS_META(node)) {
+-		dev_err(pispbe->dev,
++		dev_dbg(pispbe->dev,
+ 			"Cannot set capture fmt for output node %s\n",
+ 			NODE_NAME(node));
+ 		return -EINVAL;
+ 	}
+ 
+-	ret = try_format(f, node);
+-	if (ret < 0)
+-		return ret;
++	pispbe_try_format(f, node);
+ 
+ 	return 0;
+ }
+@@ -1308,19 +1174,16 @@ static int pispbe_node_try_fmt_vid_out(s
+ 				       struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	int ret;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (!NODE_IS_OUTPUT(node) || NODE_IS_META(node)) {
+-		dev_err(pispbe->dev,
++		dev_dbg(pispbe->dev,
+ 			"Cannot set capture fmt for output node %s\n",
+ 			NODE_NAME(node));
+ 		return -EINVAL;
+ 	}
+ 
+-	ret = try_format(f, node);
+-	if (ret < 0)
+-		return ret;
++	pispbe_try_format(f, node);
+ 
+ 	return 0;
+ }
+@@ -1329,10 +1192,10 @@ static int pispbe_node_try_fmt_meta_out(
+ 					struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (!NODE_IS_META(node) || NODE_IS_CAPTURE(node)) {
+-		dev_err(pispbe->dev,
++		dev_dbg(pispbe->dev,
+ 			"Cannot set capture fmt for meta output node %s\n",
+ 			NODE_NAME(node));
+ 		return -EINVAL;
+@@ -1344,43 +1207,26 @@ static int pispbe_node_try_fmt_meta_out(
+ 	return 0;
+ }
+ 
+-static int pispbe_node_try_fmt_meta_cap(struct file *file, void *priv,
+-					struct v4l2_format *f)
+-{
+-	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-
+-	if (!NODE_IS_META(node) || NODE_IS_OUTPUT(node)) {
+-		dev_err(pispbe->dev,
+-			"Cannot set capture fmt for meta output node %s\n",
+-			NODE_NAME(node));
+-		return -EINVAL;
+-	}
+-
+-	f->fmt.meta.dataformat = V4L2_PIX_FMT_RPI_BE;
+-	if (!f->fmt.meta.buffersize)
+-		f->fmt.meta.buffersize = BIT(20);
+-
+-	return 0;
+-}
+-
+ static int pispbe_node_s_fmt_vid_cap(struct file *file, void *priv,
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	int ret = pispbe_node_try_fmt_vid_cap(file, priv, f);
++	struct pispbe_dev *pispbe = node->pispbe;
++	int ret;
+ 
++	ret = pispbe_node_try_fmt_vid_cap(file, priv, f);
+ 	if (ret < 0)
+ 		return ret;
+ 
++	if (vb2_is_busy(&node->queue))
++		return -EBUSY;
++
+ 	node->format = *f;
+-	node->pisp_format = find_format(f->fmt.pix_mp.pixelformat);
++	node->pisp_format = pispbe_find_fmt(f->fmt.pix_mp.pixelformat);
++
++	dev_dbg(pispbe->dev, "Set capture format for node %s to %p4cc\n",
++		NODE_NAME(node), &f->fmt.pix_mp.pixelformat);
+ 
+-	dev_dbg(pispbe->dev,
+-		"Set capture format for node %s to " V4L2_FOURCC_CONV "\n",
+-		NODE_NAME(node),
+-		V4L2_FOURCC_CONV_ARGS(f->fmt.pix_mp.pixelformat));
+ 	return 0;
+ }
+ 
+@@ -1388,19 +1234,22 @@ static int pispbe_node_s_fmt_vid_out(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	int ret = pispbe_node_try_fmt_vid_out(file, priv, f);
++	struct pispbe_dev *pispbe = node->pispbe;
++	int ret;
+ 
++	ret = pispbe_node_try_fmt_vid_out(file, priv, f);
+ 	if (ret < 0)
+ 		return ret;
+ 
++	if (vb2_is_busy(&node->queue))
++		return -EBUSY;
++
+ 	node->format = *f;
+-	node->pisp_format = find_format(f->fmt.pix_mp.pixelformat);
++	node->pisp_format = pispbe_find_fmt(f->fmt.pix_mp.pixelformat);
++
++	dev_dbg(pispbe->dev, "Set output format for node %s to %p4cc\n",
++		NODE_NAME(node), &f->fmt.pix_mp.pixelformat);
+ 
+-	dev_dbg(pispbe->dev,
+-		"Set output format for node %s to " V4L2_FOURCC_CONV "\n",
+-		NODE_NAME(node),
+-		V4L2_FOURCC_CONV_ARGS(f->fmt.pix_mp.pixelformat));
+ 	return 0;
+ }
+ 
+@@ -1408,39 +1257,22 @@ static int pispbe_node_s_fmt_meta_out(st
+ 				      struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	int ret = pispbe_node_try_fmt_meta_out(file, priv, f);
++	struct pispbe_dev *pispbe = node->pispbe;
++	int ret;
+ 
++	ret = pispbe_node_try_fmt_meta_out(file, priv, f);
+ 	if (ret < 0)
+ 		return ret;
+ 
++	if (vb2_is_busy(&node->queue))
++		return -EBUSY;
++
+ 	node->format = *f;
+ 	node->pisp_format = &meta_out_supported_formats[0];
+ 
+-	dev_dbg(pispbe->dev,
+-		"Set output format for meta node %s to " V4L2_FOURCC_CONV "\n",
+-		NODE_NAME(node),
+-		V4L2_FOURCC_CONV_ARGS(f->fmt.meta.dataformat));
+-	return 0;
+-}
+-
+-static int pispbe_node_s_fmt_meta_cap(struct file *file, void *priv,
+-				      struct v4l2_format *f)
+-{
+-	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-	int ret = pispbe_node_try_fmt_meta_cap(file, priv, f);
+-
+-	if (ret < 0)
+-		return ret;
+-
+-	node->format = *f;
+-	node->pisp_format = find_format(f->fmt.meta.dataformat);
++	dev_dbg(pispbe->dev, "Set output format for meta node %s to %p4cc\n",
++		NODE_NAME(node), &f->fmt.meta.dataformat);
+ 
+-	dev_dbg(pispbe->dev,
+-		"Set capture format for meta node %s to " V4L2_FOURCC_CONV "\n",
+-		NODE_NAME(node),
+-		V4L2_FOURCC_CONV_ARGS(f->fmt.meta.dataformat));
+ 	return 0;
+ }
+ 
+@@ -1456,10 +1288,7 @@ static int pispbe_node_enum_fmt(struct f
+ 		if (f->index)
+ 			return -EINVAL;
+ 
+-		if (NODE_IS_OUTPUT(node))
+-			f->pixelformat = V4L2_META_FMT_RPI_BE_CFG;
+-		else
+-			f->pixelformat = V4L2_PIX_FMT_RPI_BE;
++		f->pixelformat = V4L2_META_FMT_RPI_BE_CFG;
+ 		f->flags = 0;
+ 		return 0;
+ 	}
+@@ -1477,13 +1306,13 @@ static int pispbe_enum_framesizes(struct
+ 				  struct v4l2_frmsizeenum *fsize)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
++	struct pispbe_dev *pispbe = node->pispbe;
+ 
+ 	if (NODE_IS_META(node) || fsize->index)
+ 		return -EINVAL;
+ 
+-	if (!find_format(fsize->pixel_format)) {
+-		dev_err(pispbe->dev, "Invalid pixel code: %x\n",
++	if (!pispbe_find_fmt(fsize->pixel_format)) {
++		dev_dbg(pispbe->dev, "Invalid pixel code: %x\n",
+ 			fsize->pixel_format);
+ 		return -EINVAL;
+ 	}
+@@ -1500,49 +1329,19 @@ static int pispbe_enum_framesizes(struct
+ 	return 0;
+ }
+ 
+-static int pispbe_node_streamon(struct file *file, void *priv,
+-				enum v4l2_buf_type type)
+-{
+-	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->node_group->pispbe;
+-
+-	/* Do we need a node->stream_lock mutex? */
+-
+-	dev_dbg(pispbe->dev, "Stream on for node %s\n", NODE_NAME(node));
+-
+-	/* Do we care about the type? Each node has only one queue. */
+-
+-	INIT_LIST_HEAD(&node->ready_queue);
+-
+-	/* locking should be handled by the queue->lock? */
+-	return vb2_streamon(&node->queue, type);
+-}
+-
+-static int pispbe_node_streamoff(struct file *file, void *priv,
+-				 enum v4l2_buf_type type)
+-{
+-	struct pispbe_node *node = video_drvdata(file);
+-
+-	return vb2_streamoff(&node->queue, type);
+-}
+-
+ static const struct v4l2_ioctl_ops pispbe_node_ioctl_ops = {
+ 	.vidioc_querycap = pispbe_node_querycap,
+ 	.vidioc_g_fmt_vid_cap_mplane = pispbe_node_g_fmt_vid_cap,
+ 	.vidioc_g_fmt_vid_out_mplane = pispbe_node_g_fmt_vid_out,
+ 	.vidioc_g_fmt_meta_out = pispbe_node_g_fmt_meta_out,
+-	.vidioc_g_fmt_meta_cap = pispbe_node_g_fmt_meta_cap,
+ 	.vidioc_try_fmt_vid_cap_mplane = pispbe_node_try_fmt_vid_cap,
+ 	.vidioc_try_fmt_vid_out_mplane = pispbe_node_try_fmt_vid_out,
+ 	.vidioc_try_fmt_meta_out = pispbe_node_try_fmt_meta_out,
+-	.vidioc_try_fmt_meta_cap = pispbe_node_try_fmt_meta_cap,
+ 	.vidioc_s_fmt_vid_cap_mplane = pispbe_node_s_fmt_vid_cap,
+ 	.vidioc_s_fmt_vid_out_mplane = pispbe_node_s_fmt_vid_out,
+ 	.vidioc_s_fmt_meta_out = pispbe_node_s_fmt_meta_out,
+-	.vidioc_s_fmt_meta_cap = pispbe_node_s_fmt_meta_cap,
+ 	.vidioc_enum_fmt_vid_cap = pispbe_node_enum_fmt,
+ 	.vidioc_enum_fmt_vid_out = pispbe_node_enum_fmt,
+-	.vidioc_enum_fmt_meta_cap = pispbe_node_enum_fmt,
+ 	.vidioc_enum_fmt_meta_out = pispbe_node_enum_fmt,
+ 	.vidioc_enum_framesizes = pispbe_enum_framesizes,
+ 	.vidioc_create_bufs = vb2_ioctl_create_bufs,
+@@ -1552,8 +1351,8 @@ static const struct v4l2_ioctl_ops pispb
+ 	.vidioc_dqbuf = vb2_ioctl_dqbuf,
+ 	.vidioc_expbuf = vb2_ioctl_expbuf,
+ 	.vidioc_reqbufs = vb2_ioctl_reqbufs,
+-	.vidioc_streamon = pispbe_node_streamon,
+-	.vidioc_streamoff = pispbe_node_streamoff,
++	.vidioc_streamon = vb2_ioctl_streamon,
++	.vidioc_streamoff = vb2_ioctl_streamoff,
+ };
+ 
+ static const struct video_device pispbe_videodev = {
+@@ -1565,7 +1364,7 @@ static const struct video_device pispbe_
+ 	.release = video_device_release_empty,
+ };
+ 
+-static void node_set_default_format(struct pispbe_node *node)
++static void pispbe_node_def_fmt(struct pispbe_node *node)
+ {
+ 	if (NODE_IS_META(node) && NODE_IS_OUTPUT(node)) {
+ 		/* Config node */
+@@ -1574,44 +1373,35 @@ static void node_set_default_format(stru
+ 		f->fmt.meta.dataformat = V4L2_META_FMT_RPI_BE_CFG;
+ 		f->fmt.meta.buffersize = sizeof(struct pisp_be_tiles_config);
+ 		f->type = node->buf_type;
+-	} else if (NODE_IS_META(node) && NODE_IS_CAPTURE(node)) {
+-		/* HOG output node */
+-		struct v4l2_format *f = &node->format;
+-
+-		f->fmt.meta.dataformat = V4L2_PIX_FMT_RPI_BE;
+-		f->fmt.meta.buffersize = BIT(20);
+-		f->type = node->buf_type;
+ 	} else {
+-		struct v4l2_format f = {0};
+-
+-		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_YUV420;
+-		f.fmt.pix_mp.width = 1920;
+-		f.fmt.pix_mp.height = 1080;
+-		f.type = node->buf_type;
+-		try_format(&f, node);
++		struct v4l2_format f = {
++			.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_YUV420,
++			.fmt.pix_mp.width = 1920,
++			.fmt.pix_mp.height = 1080,
++			.type = node->buf_type,
++		};
++		pispbe_try_format(&f, node);
+ 		node->format = f;
+ 	}
+ 
+-	node->pisp_format = find_format(node->format.fmt.pix_mp.pixelformat);
++	node->pisp_format = pispbe_find_fmt(node->format.fmt.pix_mp.pixelformat);
+ }
+ 
+ /*
+  * Initialise a struct pispbe_node and register it as /dev/video<N>
+  * to represent one of the PiSP Back End's input or output streams.
+  */
+-static int
+-pispbe_init_node(struct pispbe_node_group *node_group, unsigned int id)
++static int pispbe_init_node(struct pispbe_dev *pispbe, unsigned int id)
+ {
+ 	bool output = NODE_DESC_IS_OUTPUT(&node_desc[id]);
+-	struct pispbe_node *node = &node_group->node[id];
+-	struct pispbe_dev *pispbe = node_group->pispbe;
++	struct pispbe_node *node = &pispbe->node[id];
+ 	struct media_entity *entity = &node->vfd.entity;
+ 	struct video_device *vdev = &node->vfd;
+ 	struct vb2_queue *q = &node->queue;
+ 	int ret;
+ 
+ 	node->id = id;
+-	node->node_group = node_group;
++	node->pispbe = pispbe;
+ 	node->buf_type = node_desc[id].buf_type;
+ 
+ 	mutex_init(&node->node_lock);
+@@ -1620,7 +1410,7 @@ pispbe_init_node(struct pispbe_node_grou
+ 	spin_lock_init(&node->ready_lock);
+ 
+ 	node->format.type = node->buf_type;
+-	node_set_default_format(node);
++	pispbe_node_def_fmt(node);
+ 
+ 	q->type = node->buf_type;
+ 	q->io_modes = VB2_MMAP | VB2_DMABUF;
+@@ -1629,19 +1419,19 @@ pispbe_init_node(struct pispbe_node_grou
+ 	q->ops = &pispbe_node_queue_ops;
+ 	q->buf_struct_size = sizeof(struct pispbe_buffer);
+ 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+-	q->dev = node->node_group->pispbe->dev;
++	q->dev = pispbe->dev;
+ 	/* get V4L2 to handle node->queue locking */
+ 	q->lock = &node->queue_lock;
+ 
+ 	ret = vb2_queue_init(q);
+ 	if (ret < 0) {
+ 		dev_err(pispbe->dev, "vb2_queue_init failed\n");
+-		return ret;
++		goto err_mutex_destroy;
+ 	}
+ 
+ 	*vdev = pispbe_videodev; /* default initialization */
+ 	strscpy(vdev->name, node_desc[id].ent_name, sizeof(vdev->name));
+-	vdev->v4l2_dev = &node_group->v4l2_dev;
++	vdev->v4l2_dev = &pispbe->v4l2_dev;
+ 	vdev->vfl_dir = output ? VFL_DIR_TX : VFL_DIR_RX;
+ 	/* get V4L2 to serialise our ioctls */
+ 	vdev->lock = &node->node_lock;
+@@ -1657,8 +1447,7 @@ pispbe_init_node(struct pispbe_node_grou
+ 		goto err_unregister_queue;
+ 	}
+ 
+-	ret = video_register_device(vdev, VFL_TYPE_VIDEO,
+-				    PISPBE_VIDEO_NODE_OFFSET);
++	ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
+ 	if (ret) {
+ 		dev_err(pispbe->dev,
+ 			"Failed to register video %s device node\n",
+@@ -1668,25 +1457,28 @@ pispbe_init_node(struct pispbe_node_grou
+ 	video_set_drvdata(vdev, node);
+ 
+ 	if (output)
+-		ret = media_create_pad_link(entity, 0, &node_group->sd.entity,
++		ret = media_create_pad_link(entity, 0, &pispbe->sd.entity,
+ 					    id, MEDIA_LNK_FL_IMMUTABLE |
+ 					    MEDIA_LNK_FL_ENABLED);
+ 	else
+-		ret = media_create_pad_link(&node_group->sd.entity, id, entity,
++		ret = media_create_pad_link(&pispbe->sd.entity, id, entity,
+ 					    0, MEDIA_LNK_FL_IMMUTABLE |
+ 					    MEDIA_LNK_FL_ENABLED);
+ 	if (ret)
+ 		goto err_unregister_video_dev;
+ 
+-	dev_info(pispbe->dev,
+-		 "%s device node registered as /dev/video%d\n",
+-		 NODE_NAME(node), node->vfd.num);
++	dev_dbg(pispbe->dev, "%s device node registered as /dev/video%d\n",
++		NODE_NAME(node), node->vfd.num);
++
+ 	return 0;
+ 
+ err_unregister_video_dev:
+ 	video_unregister_device(&node->vfd);
+ err_unregister_queue:
+ 	vb2_queue_release(&node->queue);
++err_mutex_destroy:
++	mutex_destroy(&node->node_lock);
++	mutex_destroy(&node->queue_lock);
+ 	return ret;
+ }
+ 
+@@ -1698,11 +1490,9 @@ static const struct v4l2_subdev_ops pisp
+ 	.pad = &pispbe_pad_ops,
+ };
+ 
+-static int pispbe_init_subdev(struct pispbe_node_group *node_group)
++static int pispbe_init_subdev(struct pispbe_dev *pispbe)
+ {
+-	struct pispbe_dev *pispbe = node_group->pispbe;
+-	struct v4l2_subdev *sd = &node_group->sd;
+-	unsigned int i;
++	struct v4l2_subdev *sd = &pispbe->sd;
+ 	int ret;
+ 
+ 	v4l2_subdev_init(sd, &pispbe_sd_ops);
+@@ -1711,17 +1501,17 @@ static int pispbe_init_subdev(struct pis
+ 	sd->dev = pispbe->dev;
+ 	strscpy(sd->name, PISPBE_NAME, sizeof(sd->name));
+ 
+-	for (i = 0; i < PISPBE_NUM_NODES; i++)
+-		node_group->pad[i].flags =
++	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++)
++		pispbe->pad[i].flags =
+ 			NODE_DESC_IS_OUTPUT(&node_desc[i]) ?
+ 			MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE;
+ 
+ 	ret = media_entity_pads_init(&sd->entity, PISPBE_NUM_NODES,
+-				     node_group->pad);
++				     pispbe->pad);
+ 	if (ret)
+ 		goto error;
+ 
+-	ret = v4l2_device_register_subdev(&node_group->v4l2_dev, sd);
++	ret = v4l2_device_register_subdev(&pispbe->v4l2_dev, sd);
+ 	if (ret)
+ 		goto error;
+ 
+@@ -1732,45 +1522,36 @@ error:
+ 	return ret;
+ }
+ 
+-static int pispbe_init_group(struct pispbe_dev *pispbe, unsigned int id)
++static int pispbe_init_devices(struct pispbe_dev *pispbe)
+ {
+-	struct pispbe_node_group *node_group = &pispbe->node_group[id];
+ 	struct v4l2_device *v4l2_dev;
+ 	struct media_device *mdev;
+-	unsigned int num_registered = 0;
++	unsigned int num_regist;
+ 	int ret;
+ 
+-	node_group->id = id;
+-	node_group->pispbe = pispbe;
+-	node_group->streaming_map = 0;
+-
+-	dev_info(pispbe->dev, "Register nodes for group %u\n", id);
+-
+ 	/* Register v4l2_device and media_device */
+-	mdev = &node_group->mdev;
+-	mdev->hw_revision = node_group->pispbe->hw_version;
+-	mdev->dev = node_group->pispbe->dev;
++	mdev = &pispbe->mdev;
++	mdev->hw_revision = pispbe->hw_version;
++	mdev->dev = pispbe->dev;
+ 	strscpy(mdev->model, PISPBE_NAME, sizeof(mdev->model));
+-	snprintf(mdev->bus_info, sizeof(mdev->bus_info),
+-		 "platform:%s", dev_name(node_group->pispbe->dev));
+ 	media_device_init(mdev);
+ 
+-	v4l2_dev = &node_group->v4l2_dev;
+-	v4l2_dev->mdev = &node_group->mdev;
++	v4l2_dev = &pispbe->v4l2_dev;
++	v4l2_dev->mdev = &pispbe->mdev;
+ 	strscpy(v4l2_dev->name, PISPBE_NAME, sizeof(v4l2_dev->name));
+ 
+-	ret = v4l2_device_register(pispbe->dev, &node_group->v4l2_dev);
++	ret = v4l2_device_register(pispbe->dev, v4l2_dev);
+ 	if (ret)
+ 		goto err_media_dev_cleanup;
+ 
+ 	/* Register the PISPBE subdevice. */
+-	ret = pispbe_init_subdev(node_group);
++	ret = pispbe_init_subdev(pispbe);
+ 	if (ret)
+ 		goto err_unregister_v4l2;
+ 
+ 	/* Create device video nodes */
+-	for (; num_registered < PISPBE_NUM_NODES; num_registered++) {
+-		ret = pispbe_init_node(node_group, num_registered);
++	for (num_regist = 0; num_regist < PISPBE_NUM_NODES; num_regist++) {
++		ret = pispbe_init_node(pispbe, num_regist);
+ 		if (ret)
+ 			goto err_unregister_nodes;
+ 	}
+@@ -1779,12 +1560,12 @@ static int pispbe_init_group(struct pisp
+ 	if (ret)
+ 		goto err_unregister_nodes;
+ 
+-	node_group->config =
++	pispbe->config =
+ 		dma_alloc_coherent(pispbe->dev,
+ 				   sizeof(struct pisp_be_tiles_config) *
+ 					PISP_BE_NUM_CONFIG_BUFFERS,
+-				   &node_group->config_dma_addr, GFP_KERNEL);
+-	if (!node_group->config) {
++				   &pispbe->config_dma_addr, GFP_KERNEL);
++	if (!pispbe->config) {
+ 		dev_err(pispbe->dev, "Unable to allocate cached config buffers.\n");
+ 		ret = -ENOMEM;
+ 		goto err_unregister_mdev;
+@@ -1795,12 +1576,12 @@ static int pispbe_init_group(struct pisp
+ err_unregister_mdev:
+ 	media_device_unregister(mdev);
+ err_unregister_nodes:
+-	while (num_registered-- > 0) {
+-		video_unregister_device(&node_group->node[num_registered].vfd);
+-		vb2_queue_release(&node_group->node[num_registered].queue);
++	while (num_regist-- > 0) {
++		video_unregister_device(&pispbe->node[num_regist].vfd);
++		vb2_queue_release(&pispbe->node[num_regist].queue);
+ 	}
+-	v4l2_device_unregister_subdev(&node_group->sd);
+-	media_entity_cleanup(&node_group->sd.entity);
++	v4l2_device_unregister_subdev(&pispbe->sd);
++	media_entity_cleanup(&pispbe->sd.entity);
+ err_unregister_v4l2:
+ 	v4l2_device_unregister(v4l2_dev);
+ err_media_dev_cleanup:
+@@ -1808,32 +1589,31 @@ err_media_dev_cleanup:
+ 	return ret;
+ }
+ 
+-static void pispbe_destroy_node_group(struct pispbe_node_group *node_group)
++static void pispbe_destroy_devices(struct pispbe_dev *pispbe)
+ {
+-	struct pispbe_dev *pispbe = node_group->pispbe;
+-	int i;
+-
+-	if (node_group->config) {
+-		dma_free_coherent(node_group->pispbe->dev,
++	if (pispbe->config) {
++		dma_free_coherent(pispbe->dev,
+ 				  sizeof(struct pisp_be_tiles_config) *
+ 					PISP_BE_NUM_CONFIG_BUFFERS,
+-				  node_group->config,
+-				  node_group->config_dma_addr);
++				  pispbe->config,
++				  pispbe->config_dma_addr);
+ 	}
+ 
+-	dev_info(pispbe->dev, "Unregister from media controller\n");
++	dev_dbg(pispbe->dev, "Unregister from media controller\n");
+ 
+-	v4l2_device_unregister_subdev(&node_group->sd);
+-	media_entity_cleanup(&node_group->sd.entity);
+-	media_device_unregister(&node_group->mdev);
++	v4l2_device_unregister_subdev(&pispbe->sd);
++	media_entity_cleanup(&pispbe->sd.entity);
++	media_device_unregister(&pispbe->mdev);
+ 
+-	for (i = PISPBE_NUM_NODES - 1; i >= 0; i--) {
+-		video_unregister_device(&node_group->node[i].vfd);
+-		vb2_queue_release(&node_group->node[i].queue);
++	for (int i = PISPBE_NUM_NODES - 1; i >= 0; i--) {
++		video_unregister_device(&pispbe->node[i].vfd);
++		vb2_queue_release(&pispbe->node[i].queue);
++		mutex_destroy(&pispbe->node[i].node_lock);
++		mutex_destroy(&pispbe->node[i].queue_lock);
+ 	}
+ 
+-	media_device_cleanup(&node_group->mdev);
+-	v4l2_device_unregister(&node_group->v4l2_dev);
++	media_device_cleanup(&pispbe->mdev);
++	v4l2_device_unregister(&pispbe->v4l2_dev);
+ }
+ 
+ static int pispbe_runtime_suspend(struct device *dev)
+@@ -1862,13 +1642,48 @@ static int pispbe_runtime_resume(struct
+ 	return 0;
+ }
+ 
+-/*
+- * Probe the ISP-BE hardware block, as a single platform device.
+- * This will instantiate multiple "node groups" each with many device nodes.
+- */
++static int pispbe_hw_init(struct pispbe_dev *pispbe)
++{
++	u32 u;
++
++	/* Check the HW is present and has a known version */
++	u = pispbe_rd(pispbe, PISP_BE_VERSION_REG);
++	dev_dbg(pispbe->dev, "pispbe_probe: HW version:  0x%08x", u);
++	pispbe->hw_version = u;
++	if ((u & ~PISP_BE_VERSION_MINOR_BITS) != PISP_BE_VERSION_2712)
++		return -ENODEV;
++
++	/* Clear leftover interrupts */
++	pispbe_wr(pispbe, PISP_BE_INTERRUPT_STATUS_REG, 0xFFFFFFFFu);
++	u = pispbe_rd(pispbe, PISP_BE_BATCH_STATUS_REG);
++	dev_dbg(pispbe->dev, "pispbe_probe: BatchStatus: 0x%08x", u);
++
++	pispbe->done = (uint8_t)u;
++	pispbe->started = (uint8_t)(u >> 8);
++	u = pispbe_rd(pispbe, PISP_BE_STATUS_REG);
++	dev_dbg(pispbe->dev, "pispbe_probe: Status:      0x%08x", u);
++
++	if (u != 0 || pispbe->done != pispbe->started) {
++		dev_err(pispbe->dev, "pispbe_probe: HW is stuck or busy\n");
++		return -EBUSY;
++	}
++
++	/*
++	 * AXI QOS=0, CACHE=4'b0010, PROT=3'b011
++	 * Also set "chicken bits" 22:20 which enable sub-64-byte bursts
++	 * and AXI AWID/BID variability (on versions which support this).
++	 */
++	pispbe_wr(pispbe, PISP_BE_AXI_REG, 0x32703200u);
++
++	/* Enable both interrupt flags */
++	pispbe_wr(pispbe, PISP_BE_INTERRUPT_EN_REG, 0x00000003u);
++
++	return 0;
++}
++
++/* Probe the ISP-BE hardware block, as a single platform device. */
+ static int pispbe_probe(struct platform_device *pdev)
+ {
+-	unsigned int num_groups = 0;
+ 	struct pispbe_dev *pispbe;
+ 	int ret;
+ 
+@@ -1913,55 +1728,43 @@ static int pispbe_probe(struct platform_
+ 	pm_runtime_use_autosuspend(pispbe->dev);
+ 	pm_runtime_enable(pispbe->dev);
+ 
+-	ret = pm_runtime_resume_and_get(pispbe->dev);
++	ret = pispbe_runtime_resume(pispbe->dev);
+ 	if (ret)
+ 		goto pm_runtime_disable_err;
+ 
+-	pispbe->hw_busy = 0;
++	pispbe->hw_busy = false;
+ 	spin_lock_init(&pispbe->hw_lock);
+-	ret = hw_init(pispbe);
++	ret = pispbe_hw_init(pispbe);
+ 	if (ret)
+-		goto pm_runtime_put_err;
++		goto pm_runtime_suspend_err;
+ 
+-	/*
+-	 * Initialise and register devices for each node_group, including media
+-	 * device
+-	 */
+-	for (num_groups = 0;
+-	     num_groups < PISPBE_NUM_NODE_GROUPS;
+-	     num_groups++) {
+-		ret = pispbe_init_group(pispbe, num_groups);
+-		if (ret)
+-			goto disable_nodes_err;
+-	}
++	ret = pispbe_init_devices(pispbe);
++	if (ret)
++		goto disable_devs_err;
+ 
+ 	pm_runtime_mark_last_busy(pispbe->dev);
+ 	pm_runtime_put_autosuspend(pispbe->dev);
+ 
+ 	return 0;
+ 
+-disable_nodes_err:
+-	while (num_groups-- > 0)
+-		pispbe_destroy_node_group(&pispbe->node_group[num_groups]);
+-pm_runtime_put_err:
+-	pm_runtime_put(pispbe->dev);
++disable_devs_err:
++	pispbe_destroy_devices(pispbe);
++pm_runtime_suspend_err:
++	pispbe_runtime_suspend(pispbe->dev);
+ pm_runtime_disable_err:
+ 	pm_runtime_dont_use_autosuspend(pispbe->dev);
+ 	pm_runtime_disable(pispbe->dev);
+ 
+-	dev_err(&pdev->dev, "%s: returning %d", __func__, ret);
+-
+ 	return ret;
+ }
+ 
+ static int pispbe_remove(struct platform_device *pdev)
+ {
+ 	struct pispbe_dev *pispbe = platform_get_drvdata(pdev);
+-	int i;
+ 
+-	for (i = PISPBE_NUM_NODE_GROUPS - 1; i >= 0; i--)
+-		pispbe_destroy_node_group(&pispbe->node_group[i]);
++	pispbe_destroy_devices(pispbe);
+ 
++	pispbe_runtime_suspend(pispbe->dev);
+ 	pm_runtime_dont_use_autosuspend(pispbe->dev);
+ 	pm_runtime_disable(pispbe->dev);
+ 
+@@ -1991,3 +1794,8 @@ static struct platform_driver pispbe_pdr
+ };
+ 
+ module_platform_driver(pispbe_pdrv);
++
++MODULE_DESCRIPTION("PiSP Back End driver");
++MODULE_AUTHOR("David Plowman <david.plowman@raspberrypi.com>");
++MODULE_AUTHOR("Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>");
++MODULE_LICENSE("GPL");
+--- a/drivers/media/platform/raspberrypi/pisp_be/pisp_be_config.h
++++ /dev/null
+@@ -1,533 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
+-/*
+- * PiSP Back End configuration definitions.
+- *
+- * Copyright (C) 2021 - Raspberry Pi Ltd
+- *
+- */
+-#ifndef _PISP_BE_CONFIG_H_
+-#define _PISP_BE_CONFIG_H_
+-
+-#include <linux/types.h>
+-
+-#include <media/raspberrypi/pisp_common.h>
+-
+-/* byte alignment for inputs */
+-#define PISP_BACK_END_INPUT_ALIGN 4u
+-/* alignment for compressed inputs */
+-#define PISP_BACK_END_COMPRESSED_ALIGN 8u
+-/* minimum required byte alignment for outputs */
+-#define PISP_BACK_END_OUTPUT_MIN_ALIGN 16u
+-/* preferred byte alignment for outputs */
+-#define PISP_BACK_END_OUTPUT_MAX_ALIGN 64u
+-
+-/* minimum allowed tile width anywhere in the pipeline */
+-#define PISP_BACK_END_MIN_TILE_WIDTH 16u
+-/* minimum allowed tile width anywhere in the pipeline */
+-#define PISP_BACK_END_MIN_TILE_HEIGHT 16u
+-
+-#define PISP_BACK_END_NUM_OUTPUTS 2
+-#define PISP_BACK_END_HOG_OUTPUT 1
+-
+-#define PISP_BACK_END_NUM_TILES 64
+-
+-enum pisp_be_bayer_enable {
+-	PISP_BE_BAYER_ENABLE_INPUT = 0x000001,
+-	PISP_BE_BAYER_ENABLE_DECOMPRESS = 0x000002,
+-	PISP_BE_BAYER_ENABLE_DPC = 0x000004,
+-	PISP_BE_BAYER_ENABLE_GEQ = 0x000008,
+-	PISP_BE_BAYER_ENABLE_TDN_INPUT = 0x000010,
+-	PISP_BE_BAYER_ENABLE_TDN_DECOMPRESS = 0x000020,
+-	PISP_BE_BAYER_ENABLE_TDN = 0x000040,
+-	PISP_BE_BAYER_ENABLE_TDN_COMPRESS = 0x000080,
+-	PISP_BE_BAYER_ENABLE_TDN_OUTPUT = 0x000100,
+-	PISP_BE_BAYER_ENABLE_SDN = 0x000200,
+-	PISP_BE_BAYER_ENABLE_BLC = 0x000400,
+-	PISP_BE_BAYER_ENABLE_STITCH_INPUT = 0x000800,
+-	PISP_BE_BAYER_ENABLE_STITCH_DECOMPRESS = 0x001000,
+-	PISP_BE_BAYER_ENABLE_STITCH = 0x002000,
+-	PISP_BE_BAYER_ENABLE_STITCH_COMPRESS = 0x004000,
+-	PISP_BE_BAYER_ENABLE_STITCH_OUTPUT = 0x008000,
+-	PISP_BE_BAYER_ENABLE_WBG = 0x010000,
+-	PISP_BE_BAYER_ENABLE_CDN = 0x020000,
+-	PISP_BE_BAYER_ENABLE_LSC = 0x040000,
+-	PISP_BE_BAYER_ENABLE_TONEMAP = 0x080000,
+-	PISP_BE_BAYER_ENABLE_CAC = 0x100000,
+-	PISP_BE_BAYER_ENABLE_DEBIN = 0x200000,
+-	PISP_BE_BAYER_ENABLE_DEMOSAIC = 0x400000,
+-};
+-
+-enum pisp_be_rgb_enable {
+-	PISP_BE_RGB_ENABLE_INPUT = 0x000001,
+-	PISP_BE_RGB_ENABLE_CCM = 0x000002,
+-	PISP_BE_RGB_ENABLE_SAT_CONTROL = 0x000004,
+-	PISP_BE_RGB_ENABLE_YCBCR = 0x000008,
+-	PISP_BE_RGB_ENABLE_FALSE_COLOUR = 0x000010,
+-	PISP_BE_RGB_ENABLE_SHARPEN = 0x000020,
+-	/* Preferred colours would occupy 0x000040 */
+-	PISP_BE_RGB_ENABLE_YCBCR_INVERSE = 0x000080,
+-	PISP_BE_RGB_ENABLE_GAMMA = 0x000100,
+-	PISP_BE_RGB_ENABLE_CSC0 = 0x000200,
+-	PISP_BE_RGB_ENABLE_CSC1 = 0x000400,
+-	PISP_BE_RGB_ENABLE_DOWNSCALE0 = 0x001000,
+-	PISP_BE_RGB_ENABLE_DOWNSCALE1 = 0x002000,
+-	PISP_BE_RGB_ENABLE_RESAMPLE0 = 0x008000,
+-	PISP_BE_RGB_ENABLE_RESAMPLE1 = 0x010000,
+-	PISP_BE_RGB_ENABLE_OUTPUT0 = 0x040000,
+-	PISP_BE_RGB_ENABLE_OUTPUT1 = 0x080000,
+-	PISP_BE_RGB_ENABLE_HOG = 0x200000
+-};
+-
+-#define PISP_BE_RGB_ENABLE_CSC(i) (PISP_BE_RGB_ENABLE_CSC0 << (i))
+-#define PISP_BE_RGB_ENABLE_DOWNSCALE(i) (PISP_BE_RGB_ENABLE_DOWNSCALE0 << (i))
+-#define PISP_BE_RGB_ENABLE_RESAMPLE(i) (PISP_BE_RGB_ENABLE_RESAMPLE0 << (i))
+-#define PISP_BE_RGB_ENABLE_OUTPUT(i) (PISP_BE_RGB_ENABLE_OUTPUT0 << (i))
+-
+-/*
+- * We use the enable flags to show when blocks are "dirty", but we need some
+- * extra ones too.
+- */
+-enum pisp_be_dirty {
+-	PISP_BE_DIRTY_GLOBAL = 0x0001,
+-	PISP_BE_DIRTY_SH_FC_COMBINE = 0x0002,
+-	PISP_BE_DIRTY_CROP = 0x0004
+-};
+-
+-struct pisp_be_global_config {
+-	u32 bayer_enables;
+-	u32 rgb_enables;
+-	u8 bayer_order;
+-	u8 pad[3];
+-};
+-
+-struct pisp_be_input_buffer_config {
+-	/* low 32 bits followed by high 32 bits (for each of up to 3 planes) */
+-	u32 addr[3][2];
+-};
+-
+-struct pisp_be_dpc_config {
+-	u8 coeff_level;
+-	u8 coeff_range;
+-	u8 pad;
+-#define PISP_BE_DPC_FLAG_FOLDBACK 1
+-	u8 flags;
+-};
+-
+-struct pisp_be_geq_config {
+-	u16 offset;
+-#define PISP_BE_GEQ_SHARPER BIT(15)
+-#define PISP_BE_GEQ_SLOPE ((1 << 10) - 1)
+-	/* top bit is the "sharper" flag, slope value is bottom 10 bits */
+-	u16 slope_sharper;
+-	u16 min;
+-	u16 max;
+-};
+-
+-struct pisp_be_tdn_input_buffer_config {
+-	/* low 32 bits followed by high 32 bits */
+-	u32 addr[2];
+-};
+-
+-struct pisp_be_tdn_config {
+-	u16 black_level;
+-	u16 ratio;
+-	u16 noise_constant;
+-	u16 noise_slope;
+-	u16 threshold;
+-	u8 reset;
+-	u8 pad;
+-};
+-
+-struct pisp_be_tdn_output_buffer_config {
+-	/* low 32 bits followed by high 32 bits */
+-	u32 addr[2];
+-};
+-
+-struct pisp_be_sdn_config {
+-	u16 black_level;
+-	u8 leakage;
+-	u8 pad;
+-	u16 noise_constant;
+-	u16 noise_slope;
+-	u16 noise_constant2;
+-	u16 noise_slope2;
+-};
+-
+-struct pisp_be_stitch_input_buffer_config {
+-	/* low 32 bits followed by high 32 bits */
+-	u32 addr[2];
+-};
+-
+-#define PISP_BE_STITCH_STREAMING_LONG 0x8000
+-#define PISP_BE_STITCH_EXPOSURE_RATIO_MASK 0x7fff
+-
+-struct pisp_be_stitch_config {
+-	u16 threshold_lo;
+-	u8 threshold_diff_power;
+-	u8 pad;
+-
+-	/* top bit indicates whether streaming input is the long exposure */
+-	u16 exposure_ratio;
+-
+-	u8 motion_threshold_256;
+-	u8 motion_threshold_recip;
+-};
+-
+-struct pisp_be_stitch_output_buffer_config {
+-	/* low 32 bits followed by high 32 bits */
+-	u32 addr[2];
+-};
+-
+-struct pisp_be_cdn_config {
+-	u16 thresh;
+-	u8 iir_strength;
+-	u8 g_adjust;
+-};
+-
+-#define PISP_BE_LSC_LOG_GRID_SIZE 5
+-#define PISP_BE_LSC_GRID_SIZE (1 << PISP_BE_LSC_LOG_GRID_SIZE)
+-#define PISP_BE_LSC_STEP_PRECISION 18
+-
+-struct pisp_be_lsc_config {
+-	/* (1<<18) / grid_cell_width */
+-	u16 grid_step_x;
+-	/* (1<<18) / grid_cell_height */
+-	u16 grid_step_y;
+-	/* RGB gains jointly encoded in 32 bits */
+-	u32 lut_packed[PISP_BE_LSC_GRID_SIZE + 1]
+-			   [PISP_BE_LSC_GRID_SIZE + 1];
+-};
+-
+-struct pisp_be_lsc_extra {
+-	u16 offset_x;
+-	u16 offset_y;
+-};
+-
+-#define PISP_BE_CAC_LOG_GRID_SIZE 3
+-#define PISP_BE_CAC_GRID_SIZE (1 << PISP_BE_CAC_LOG_GRID_SIZE)
+-#define PISP_BE_CAC_STEP_PRECISION 20
+-
+-struct pisp_be_cac_config {
+-	/* (1<<20) / grid_cell_width */
+-	u16 grid_step_x;
+-	/* (1<<20) / grid_cell_height */
+-	u16 grid_step_y;
+-	/* [gridy][gridx][rb][xy] */
+-	s8 lut[PISP_BE_CAC_GRID_SIZE + 1][PISP_BE_CAC_GRID_SIZE + 1][2][2];
+-};
+-
+-struct pisp_be_cac_extra {
+-	u16 offset_x;
+-	u16 offset_y;
+-};
+-
+-#define PISP_BE_DEBIN_NUM_COEFFS 4
+-
+-struct pisp_be_debin_config {
+-	s8 coeffs[PISP_BE_DEBIN_NUM_COEFFS];
+-	s8 h_enable;
+-	s8 v_enable;
+-	s8 pad[2];
+-};
+-
+-#define PISP_BE_TONEMAP_LUT_SIZE 64
+-
+-struct pisp_be_tonemap_config {
+-	u16 detail_constant;
+-	u16 detail_slope;
+-	u16 iir_strength;
+-	u16 strength;
+-	u32 lut[PISP_BE_TONEMAP_LUT_SIZE];
+-};
+-
+-struct pisp_be_demosaic_config {
+-	u8 sharper;
+-	u8 fc_mode;
+-	u8 pad[2];
+-};
+-
+-struct pisp_be_ccm_config {
+-	s16 coeffs[9];
+-	u8 pad[2];
+-	s32 offsets[3];
+-};
+-
+-struct pisp_be_sat_control_config {
+-	u8 shift_r;
+-	u8 shift_g;
+-	u8 shift_b;
+-	u8 pad;
+-};
+-
+-struct pisp_be_false_colour_config {
+-	u8 distance;
+-	u8 pad[3];
+-};
+-
+-#define PISP_BE_SHARPEN_SIZE 5
+-#define PISP_BE_SHARPEN_FUNC_NUM_POINTS 9
+-
+-struct pisp_be_sharpen_config {
+-	s8 kernel0[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
+-	s8 pad0[3];
+-	s8 kernel1[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
+-	s8 pad1[3];
+-	s8 kernel2[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
+-	s8 pad2[3];
+-	s8 kernel3[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
+-	s8 pad3[3];
+-	s8 kernel4[PISP_BE_SHARPEN_SIZE * PISP_BE_SHARPEN_SIZE];
+-	s8 pad4[3];
+-	u16 threshold_offset0;
+-	u16 threshold_slope0;
+-	u16 scale0;
+-	u16 pad5;
+-	u16 threshold_offset1;
+-	u16 threshold_slope1;
+-	u16 scale1;
+-	u16 pad6;
+-	u16 threshold_offset2;
+-	u16 threshold_slope2;
+-	u16 scale2;
+-	u16 pad7;
+-	u16 threshold_offset3;
+-	u16 threshold_slope3;
+-	u16 scale3;
+-	u16 pad8;
+-	u16 threshold_offset4;
+-	u16 threshold_slope4;
+-	u16 scale4;
+-	u16 pad9;
+-	u16 positive_strength;
+-	u16 positive_pre_limit;
+-	u16 positive_func[PISP_BE_SHARPEN_FUNC_NUM_POINTS];
+-	u16 positive_limit;
+-	u16 negative_strength;
+-	u16 negative_pre_limit;
+-	u16 negative_func[PISP_BE_SHARPEN_FUNC_NUM_POINTS];
+-	u16 negative_limit;
+-	u8 enables;
+-	u8 white;
+-	u8 black;
+-	u8 grey;
+-};
+-
+-struct pisp_be_sh_fc_combine_config {
+-	u8 y_factor;
+-	u8 c1_factor;
+-	u8 c2_factor;
+-	u8 pad;
+-};
+-
+-#define PISP_BE_GAMMA_LUT_SIZE 64
+-
+-struct pisp_be_gamma_config {
+-	u32 lut[PISP_BE_GAMMA_LUT_SIZE];
+-};
+-
+-struct pisp_be_crop_config {
+-	u16 offset_x, offset_y;
+-	u16 width, height;
+-};
+-
+-#define PISP_BE_RESAMPLE_FILTER_SIZE 96
+-
+-struct pisp_be_resample_config {
+-	u16 scale_factor_h, scale_factor_v;
+-	s16 coef[PISP_BE_RESAMPLE_FILTER_SIZE];
+-};
+-
+-struct pisp_be_resample_extra {
+-	u16 scaled_width;
+-	u16 scaled_height;
+-	s16 initial_phase_h[3];
+-	s16 initial_phase_v[3];
+-};
+-
+-struct pisp_be_downscale_config {
+-	u16 scale_factor_h;
+-	u16 scale_factor_v;
+-	u16 scale_recip_h;
+-	u16 scale_recip_v;
+-};
+-
+-struct pisp_be_downscale_extra {
+-	u16 scaled_width;
+-	u16 scaled_height;
+-};
+-
+-struct pisp_be_hog_config {
+-	u8 compute_signed;
+-	u8 channel_mix[3];
+-	u32 stride;
+-};
+-
+-struct pisp_be_axi_config {
+-	u8 r_qos; /* Read QoS */
+-	u8 r_cache_prot; /* Read { prot[2:0], cache[3:0] } */
+-	u8 w_qos; /* Write QoS */
+-	u8 w_cache_prot; /* Write { prot[2:0], cache[3:0] } */
+-};
+-
+-enum pisp_be_transform {
+-	PISP_BE_TRANSFORM_NONE = 0x0,
+-	PISP_BE_TRANSFORM_HFLIP = 0x1,
+-	PISP_BE_TRANSFORM_VFLIP = 0x2,
+-	PISP_BE_TRANSFORM_ROT180 =
+-		(PISP_BE_TRANSFORM_HFLIP | PISP_BE_TRANSFORM_VFLIP)
+-};
+-
+-struct pisp_be_output_format_config {
+-	struct pisp_image_format_config image;
+-	u8 transform;
+-	u8 pad[3];
+-	u16 lo;
+-	u16 hi;
+-	u16 lo2;
+-	u16 hi2;
+-};
+-
+-struct pisp_be_output_buffer_config {
+-	/* low 32 bits followed by high 32 bits (for each of 3 planes) */
+-	u32 addr[3][2];
+-};
+-
+-struct pisp_be_hog_buffer_config {
+-	/* low 32 bits followed by high 32 bits */
+-	u32 addr[2];
+-};
+-
+-struct pisp_be_config {
+-	/* I/O configuration: */
+-	struct pisp_be_input_buffer_config input_buffer;
+-	struct pisp_be_tdn_input_buffer_config tdn_input_buffer;
+-	struct pisp_be_stitch_input_buffer_config stitch_input_buffer;
+-	struct pisp_be_tdn_output_buffer_config tdn_output_buffer;
+-	struct pisp_be_stitch_output_buffer_config stitch_output_buffer;
+-	struct pisp_be_output_buffer_config
+-				output_buffer[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_hog_buffer_config hog_buffer;
+-	/* Processing configuration: */
+-	struct pisp_be_global_config global;
+-	struct pisp_image_format_config input_format;
+-	struct pisp_decompress_config decompress;
+-	struct pisp_be_dpc_config dpc;
+-	struct pisp_be_geq_config geq;
+-	struct pisp_image_format_config tdn_input_format;
+-	struct pisp_decompress_config tdn_decompress;
+-	struct pisp_be_tdn_config tdn;
+-	struct pisp_compress_config tdn_compress;
+-	struct pisp_image_format_config tdn_output_format;
+-	struct pisp_be_sdn_config sdn;
+-	struct pisp_bla_config blc;
+-	struct pisp_compress_config stitch_compress;
+-	struct pisp_image_format_config stitch_output_format;
+-	struct pisp_image_format_config stitch_input_format;
+-	struct pisp_decompress_config stitch_decompress;
+-	struct pisp_be_stitch_config stitch;
+-	struct pisp_be_lsc_config lsc;
+-	struct pisp_wbg_config wbg;
+-	struct pisp_be_cdn_config cdn;
+-	struct pisp_be_cac_config cac;
+-	struct pisp_be_debin_config debin;
+-	struct pisp_be_tonemap_config tonemap;
+-	struct pisp_be_demosaic_config demosaic;
+-	struct pisp_be_ccm_config ccm;
+-	struct pisp_be_sat_control_config sat_control;
+-	struct pisp_be_ccm_config ycbcr;
+-	struct pisp_be_sharpen_config sharpen;
+-	struct pisp_be_false_colour_config false_colour;
+-	struct pisp_be_sh_fc_combine_config sh_fc_combine;
+-	struct pisp_be_ccm_config ycbcr_inverse;
+-	struct pisp_be_gamma_config gamma;
+-	struct pisp_be_ccm_config csc[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_downscale_config downscale[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_resample_config resample[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_output_format_config
+-				output_format[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_hog_config hog;
+-	struct pisp_be_axi_config axi;
+-	/* Non-register fields: */
+-	struct pisp_be_lsc_extra lsc_extra;
+-	struct pisp_be_cac_extra cac_extra;
+-	struct pisp_be_downscale_extra
+-				downscale_extra[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_resample_extra resample_extra[PISP_BACK_END_NUM_OUTPUTS];
+-	struct pisp_be_crop_config crop;
+-	struct pisp_image_format_config hog_format;
+-	u32 dirty_flags_bayer; /* these use pisp_be_bayer_enable */
+-	u32 dirty_flags_rgb; /* use pisp_be_rgb_enable */
+-	u32 dirty_flags_extra; /* these use pisp_be_dirty_t */
+-};
+-
+-/*
+- * We also need a tile structure to describe the size of the tiles going
+- * through the pipeline.
+- */
+-
+-enum pisp_tile_edge {
+-	PISP_LEFT_EDGE = (1 << 0),
+-	PISP_RIGHT_EDGE = (1 << 1),
+-	PISP_TOP_EDGE = (1 << 2),
+-	PISP_BOTTOM_EDGE = (1 << 3)
+-};
+-
+-struct pisp_tile {
+-	u8 edge; // enum pisp_tile_edge
+-	u8 pad0[3];
+-	// 4 bytes
+-	u32 input_addr_offset;
+-	u32 input_addr_offset2;
+-	u16 input_offset_x;
+-	u16 input_offset_y;
+-	u16 input_width;
+-	u16 input_height;
+-	// 20 bytes
+-	u32 tdn_input_addr_offset;
+-	u32 tdn_output_addr_offset;
+-	u32 stitch_input_addr_offset;
+-	u32 stitch_output_addr_offset;
+-	// 36 bytes
+-	u32 lsc_grid_offset_x;
+-	u32 lsc_grid_offset_y;
+-	// 44 bytes
+-	u32 cac_grid_offset_x;
+-	u32 cac_grid_offset_y;
+-	// 52 bytes
+-	u16 crop_x_start[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 crop_x_end[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 crop_y_start[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 crop_y_end[PISP_BACK_END_NUM_OUTPUTS];
+-	// 68 bytes
+-	/* Ordering is planes then branches */
+-	u16 downscale_phase_x[3 * PISP_BACK_END_NUM_OUTPUTS];
+-	u16 downscale_phase_y[3 * PISP_BACK_END_NUM_OUTPUTS];
+-	// 92 bytes
+-	u16 resample_in_width[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 resample_in_height[PISP_BACK_END_NUM_OUTPUTS];
+-	// 100 bytes
+-	/* Ordering is planes then branches */
+-	u16 resample_phase_x[3 * PISP_BACK_END_NUM_OUTPUTS];
+-	u16 resample_phase_y[3 * PISP_BACK_END_NUM_OUTPUTS];
+-	// 124 bytes
+-	u16 output_offset_x[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 output_offset_y[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 output_width[PISP_BACK_END_NUM_OUTPUTS];
+-	u16 output_height[PISP_BACK_END_NUM_OUTPUTS];
+-	// 140 bytes
+-	u32 output_addr_offset[PISP_BACK_END_NUM_OUTPUTS];
+-	u32 output_addr_offset2[PISP_BACK_END_NUM_OUTPUTS];
+-	// 156 bytes
+-	u32 output_hog_addr_offset;
+-	// 160 bytes
+-};
+-
+-static_assert(sizeof(struct pisp_tile) == 160);
+-
+-struct pisp_be_tiles_config {
+-	struct pisp_be_config config;
+-	struct pisp_tile tiles[PISP_BACK_END_NUM_TILES];
+-	int num_tiles;
+-};
+-
+-#endif /* _PISP_BE_CONFIG_H_ */
+--- a/drivers/media/platform/raspberrypi/pisp_be/pisp_be_formats.h
++++ b/drivers/media/platform/raspberrypi/pisp_be/pisp_be_formats.h
+@@ -2,7 +2,7 @@
+ /*
+  * PiSP Back End driver image format definitions.
+  *
+- * Copyright (c) 2021 Raspberry Pi Ltd
++ * Copyright (c) 2021-2024 Raspberry Pi Ltd
+  */
+ 
+ #ifndef _PISP_BE_FORMATS_
+@@ -11,15 +11,15 @@
+ #include <linux/bits.h>
+ #include <linux/videodev2.h>
+ 
+-#define MAX_PLANES 3
+-#define P3(x) ((x) * 8)
++#define PISPBE_MAX_PLANES	3
++#define P3(x)			((x) * 8)
+ 
+ struct pisp_be_format {
+ 	unsigned int fourcc;
+ 	unsigned int align;
+ 	unsigned int bit_depth;
+ 	/* 0P3 factor for plane sizing */
+-	unsigned int plane_factor[MAX_PLANES];
++	unsigned int plane_factor[PISPBE_MAX_PLANES];
+ 	unsigned int num_planes;
+ 	unsigned int colorspace_mask;
+ 	enum v4l2_colorspace colorspace_default;
+@@ -27,14 +27,19 @@ struct pisp_be_format {
+ 
+ #define V4L2_COLORSPACE_MASK(colorspace) BIT(colorspace)
+ 
+-#define V4L2_COLORSPACE_MASK_JPEG V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_JPEG)
+-#define V4L2_COLORSPACE_MASK_SMPTE170M V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_SMPTE170M)
+-#define V4L2_COLORSPACE_MASK_REC709 V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_REC709)
+-#define V4L2_COLORSPACE_MASK_SRGB V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_SRGB)
+-#define V4L2_COLORSPACE_MASK_RAW V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_RAW)
++#define V4L2_COLORSPACE_MASK_JPEG	\
++	V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_JPEG)
++#define V4L2_COLORSPACE_MASK_SMPTE170M	\
++	V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_SMPTE170M)
++#define V4L2_COLORSPACE_MASK_REC709	\
++	V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_REC709)
++#define V4L2_COLORSPACE_MASK_SRGB	\
++	V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_SRGB)
++#define V4L2_COLORSPACE_MASK_RAW	\
++	V4L2_COLORSPACE_MASK(V4L2_COLORSPACE_RAW)
+ 
+ /*
+- * All three colour spaces JPEG, SMPTE170M and REC709 are fundamentally sRGB
++ * All three colour spaces SRGB, SMPTE170M and REC709 are fundamentally sRGB
+  * underneath (as near as makes no difference to us), just with different YCbCr
+  * encodings. Therefore the ISP can generate sRGB on its main output and any of
+  * the others on its low resolution output. Applications should, when using both
+@@ -43,9 +48,9 @@ struct pisp_be_format {
+  * producing an RGB format. In turn this requires us to allow all these colour
+  * spaces for every YUV/RGB output format.
+  */
+-#define V4L2_COLORSPACE_MASK_ALL_SRGB (V4L2_COLORSPACE_MASK_JPEG |	\
+-				       V4L2_COLORSPACE_MASK_SRGB |	\
+-				       V4L2_COLORSPACE_MASK_SMPTE170M |	\
++#define V4L2_COLORSPACE_MASK_ALL_SRGB (V4L2_COLORSPACE_MASK_JPEG	| \
++				       V4L2_COLORSPACE_MASK_SRGB	| \
++				       V4L2_COLORSPACE_MASK_SMPTE170M	| \
+ 				       V4L2_COLORSPACE_MASK_REC709)
+ 
+ static const struct pisp_be_format supported_formats[] = {
+@@ -58,7 +63,7 @@ static const struct pisp_be_format suppo
+ 		.plane_factor	    = { P3(1), P3(0.25), P3(0.25) },
+ 		.num_planes	    = 1,
+ 		.colorspace_mask    = V4L2_COLORSPACE_MASK_ALL_SRGB,
+-		.colorspace_default = V4L2_COLORSPACE_JPEG,
++		.colorspace_default = V4L2_COLORSPACE_SMPTE170M,
+ 	},
+ 	{
+ 		.fourcc		    = V4L2_PIX_FMT_YVU420,
+@@ -132,7 +137,7 @@ static const struct pisp_be_format suppo
+ 		.plane_factor	    = { P3(1), P3(0.25), P3(0.25) },
+ 		.num_planes	    = 3,
+ 		.colorspace_mask    = V4L2_COLORSPACE_MASK_ALL_SRGB,
+-		.colorspace_default = V4L2_COLORSPACE_JPEG,
++		.colorspace_default = V4L2_COLORSPACE_SMPTE170M,
+ 	},
+ 	{
+ 		.fourcc		    = V4L2_PIX_FMT_NV12M,
+@@ -168,7 +173,7 @@ static const struct pisp_be_format suppo
+ 		.plane_factor	    = { P3(1), P3(0.5), P3(0.5) },
+ 		.num_planes	    = 3,
+ 		.colorspace_mask    = V4L2_COLORSPACE_MASK_ALL_SRGB,
+-		.colorspace_default = V4L2_COLORSPACE_JPEG,
++		.colorspace_default = V4L2_COLORSPACE_SMPTE170M,
+ 	},
+ 	{
+ 		.fourcc		    = V4L2_PIX_FMT_YVU422M,
+@@ -186,7 +191,7 @@ static const struct pisp_be_format suppo
+ 		.plane_factor	    = { P3(1), P3(1), P3(1) },
+ 		.num_planes	    = 3,
+ 		.colorspace_mask    = V4L2_COLORSPACE_MASK_ALL_SRGB,
+-		.colorspace_default = V4L2_COLORSPACE_JPEG,
++		.colorspace_default = V4L2_COLORSPACE_SMPTE170M,
+ 	},
+ 	{
+ 		.fourcc		    = V4L2_PIX_FMT_YVU444M,
+@@ -502,11 +507,6 @@ static const struct pisp_be_format suppo
+ 		.colorspace_mask    = V4L2_COLORSPACE_MASK_RAW,
+ 		.colorspace_default = V4L2_COLORSPACE_RAW,
+ 	},
+-	/* Opaque BE format for HW verification. */
+-	{
+-		.fourcc		    = V4L2_PIX_FMT_RPI_BE,
+-		.align		    = 32,
+-	},
+ };
+ 
+ static const struct pisp_be_format meta_out_supported_formats[] = {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1155-media-uapi-pisp_be_config-Drop-BIT-from-uAPI.patch b/target/linux/bcm27xx/patches-6.6/950-1155-media-uapi-pisp_be_config-Drop-BIT-from-uAPI.patch
new file mode 100644
index 0000000000..f59c02c5b1
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1155-media-uapi-pisp_be_config-Drop-BIT-from-uAPI.patch
@@ -0,0 +1,29 @@
+From b58aeea7e2e3afd4fb3b6dcbe5e382b2244b33a4 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Thu, 27 Jun 2024 13:40:29 +0200
+Subject: [PATCH 1155/1215] media: uapi: pisp_be_config: Drop BIT() from uAPI
+
+The pisp_be_config.h uAPI header file contains a bit-field definition
+that uses the BIT() helper macro.
+
+As the BIT() identifier is not defined in userspace, drop it from the
+uAPI header.
+
+Fixes: c6c49bac8770 ("media: uapi: Add Raspberry Pi PiSP Back End uAPI")
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
+---
+ include/uapi/linux/media/raspberrypi/pisp_be_config.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/uapi/linux/media/raspberrypi/pisp_be_config.h
++++ b/include/uapi/linux/media/raspberrypi/pisp_be_config.h
+@@ -146,7 +146,7 @@ struct pisp_be_dpc_config {
+  */
+ struct pisp_be_geq_config {
+ 	__u16 offset;
+-#define PISP_BE_GEQ_SHARPER BIT(15)
++#define PISP_BE_GEQ_SHARPER (1U << 15)
+ #define PISP_BE_GEQ_SLOPE ((1 << 10) - 1)
+ 	/* top bit is the "sharper" flag, slope value is bottom 10 bits */
+ 	__u16 slope_sharper;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1156-media-uapi-pisp_common-Add-32-bpp-format-test.patch b/target/linux/bcm27xx/patches-6.6/950-1156-media-uapi-pisp_common-Add-32-bpp-format-test.patch
new file mode 100644
index 0000000000..0cb94fe933
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1156-media-uapi-pisp_common-Add-32-bpp-format-test.patch
@@ -0,0 +1,32 @@
+From 7c36a1feb61d964055bee777efc1db60790aa215 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Thu, 27 Jun 2024 16:07:43 +0200
+Subject: [PATCH 1156/1215] media: uapi: pisp_common: Add 32 bpp format test
+
+Add definition and test for 32-bits image formats to the pisp_common.h
+uAPI header.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ include/uapi/linux/media/raspberrypi/pisp_common.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/include/uapi/linux/media/raspberrypi/pisp_common.h
++++ b/include/uapi/linux/media/raspberrypi/pisp_common.h
+@@ -72,6 +72,8 @@ enum pisp_image_format {
+ 	PISP_IMAGE_FORMAT_SHIFT_8 = 0x00080000,
+ 	PISP_IMAGE_FORMAT_SHIFT_MASK = 0x000f0000,
+ 
++	PISP_IMAGE_FORMAT_BPP_32 = 0x00100000,
++
+ 	PISP_IMAGE_FORMAT_UNCOMPRESSED = 0x00000000,
+ 	PISP_IMAGE_FORMAT_COMPRESSION_MODE_1 = 0x01000000,
+ 	PISP_IMAGE_FORMAT_COMPRESSION_MODE_2 = 0x02000000,
+@@ -134,6 +136,7 @@ enum pisp_image_format {
+ 	 PISP_IMAGE_FORMAT_PLANARITY_PLANAR)
+ #define PISP_IMAGE_FORMAT_wallpaper(fmt)                                       \
+ 	((fmt) & PISP_IMAGE_FORMAT_WALLPAPER_ROLL)
++#define PISP_IMAGE_FORMAT_bpp_32(fmt) ((fmt) & PISP_IMAGE_FORMAT_BPP_32)
+ #define PISP_IMAGE_FORMAT_HOG(fmt)                                             \
+ 	((fmt) &                                                               \
+ 	 (PISP_IMAGE_FORMAT_HOG_SIGNED | PISP_IMAGE_FORMAT_HOG_UNSIGNED))
diff --git a/target/linux/bcm27xx/patches-6.6/950-1157-media-uapi-Capitalize-all-macros.patch b/target/linux/bcm27xx/patches-6.6/950-1157-media-uapi-Capitalize-all-macros.patch
new file mode 100644
index 0000000000..fac2ccf163
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1157-media-uapi-Capitalize-all-macros.patch
@@ -0,0 +1,89 @@
+From 20a3671be178fd98aac08931d809e689eaa7a9d9 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 28 Jun 2024 10:10:10 +0200
+Subject: [PATCH 1157/1215] media: uapi: Capitalize all macros
+
+The macro used to inspect an image format characteristic use a mixture
+of capitalized and non-capitalized letters, which is rather unusual for
+the Linux kernel style.
+
+Capitalize all identifiers.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ .../linux/media/raspberrypi/pisp_common.h     | 38 +++++++++----------
+ 1 file changed, 19 insertions(+), 19 deletions(-)
+
+--- a/include/uapi/linux/media/raspberrypi/pisp_common.h
++++ b/include/uapi/linux/media/raspberrypi/pisp_common.h
+@@ -92,51 +92,51 @@ enum pisp_image_format {
+ 				     PISP_IMAGE_FORMAT_THREE_CHANNEL
+ };
+ 
+-#define PISP_IMAGE_FORMAT_bps_8(fmt)                                           \
++#define PISP_IMAGE_FORMAT_BPS_8(fmt)                                           \
+ 	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_8)
+-#define PISP_IMAGE_FORMAT_bps_10(fmt)                                          \
++#define PISP_IMAGE_FORMAT_BPS_10(fmt)                                          \
+ 	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_10)
+-#define PISP_IMAGE_FORMAT_bps_12(fmt)                                          \
++#define PISP_IMAGE_FORMAT_BPS_12(fmt)                                          \
+ 	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_12)
+-#define PISP_IMAGE_FORMAT_bps_16(fmt)                                          \
++#define PISP_IMAGE_FORMAT_BPS_16(fmt)                                          \
+ 	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) == PISP_IMAGE_FORMAT_BPS_16)
+-#define PISP_IMAGE_FORMAT_bps(fmt)                                             \
++#define PISP_IMAGE_FORMAT_BPS(fmt)                                             \
+ 	(((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) ?                                \
+ 	       8 + (2 << (((fmt) & PISP_IMAGE_FORMAT_BPS_MASK) - 1)) : 8)
+-#define PISP_IMAGE_FORMAT_shift(fmt)                                           \
++#define PISP_IMAGE_FORMAT_SHIFT(fmt)                                           \
+ 	(((fmt) & PISP_IMAGE_FORMAT_SHIFT_MASK) / PISP_IMAGE_FORMAT_SHIFT_1)
+-#define PISP_IMAGE_FORMAT_three_channel(fmt)                                   \
++#define PISP_IMAGE_FORMAT_THREE_CHANNEL(fmt)                                   \
+ 	((fmt) & PISP_IMAGE_FORMAT_THREE_CHANNEL)
+-#define PISP_IMAGE_FORMAT_single_channel(fmt)                                  \
++#define PISP_IMAGE_FORMAT_SINGLE_CHANNEL(fmt)                                  \
+ 	(!((fmt) & PISP_IMAGE_FORMAT_THREE_CHANNEL))
+-#define PISP_IMAGE_FORMAT_compressed(fmt)                                      \
++#define PISP_IMAGE_FORMAT_COMPRESSED(fmt)                                      \
+ 	(((fmt) & PISP_IMAGE_FORMAT_COMPRESSION_MASK) !=                       \
+ 	 PISP_IMAGE_FORMAT_UNCOMPRESSED)
+-#define PISP_IMAGE_FORMAT_sampling_444(fmt)                                    \
++#define PISP_IMAGE_FORMAT_SAMPLING_444(fmt)                                    \
+ 	(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) ==                          \
+ 	 PISP_IMAGE_FORMAT_SAMPLING_444)
+-#define PISP_IMAGE_FORMAT_sampling_422(fmt)                                    \
++#define PISP_IMAGE_FORMAT_SAMPLING_422(fmt)                                    \
+ 	(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) ==                          \
+ 	 PISP_IMAGE_FORMAT_SAMPLING_422)
+-#define PISP_IMAGE_FORMAT_sampling_420(fmt)                                    \
++#define PISP_IMAGE_FORMAT_SAMPLING_420(fmt)                                    \
+ 	(((fmt) & PISP_IMAGE_FORMAT_SAMPLING_MASK) ==                          \
+ 	 PISP_IMAGE_FORMAT_SAMPLING_420)
+-#define PISP_IMAGE_FORMAT_order_normal(fmt)                                    \
++#define PISP_IMAGE_FORMAT_ORDER_NORMAL(fmt)                                    \
+ 	(!((fmt) & PISP_IMAGE_FORMAT_ORDER_SWAPPED))
+-#define PISP_IMAGE_FORMAT_order_swapped(fmt)                                   \
++#define PISP_IMAGE_FORMAT_ORDER_SWAPPED(fmt)                                   \
+ 	((fmt) & PISP_IMAGE_FORMAT_ORDER_SWAPPED)
+-#define PISP_IMAGE_FORMAT_interleaved(fmt)                                     \
++#define PISP_IMAGE_FORMAT_INTERLEAVED(fmt)                                     \
+ 	(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) ==                         \
+ 	 PISP_IMAGE_FORMAT_PLANARITY_INTERLEAVED)
+-#define PISP_IMAGE_FORMAT_semiplanar(fmt)                                      \
++#define PISP_IMAGE_FORMAT_SEMIPLANAR(fmt)                                      \
+ 	(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) ==                         \
+ 	 PISP_IMAGE_FORMAT_PLANARITY_SEMI_PLANAR)
+-#define PISP_IMAGE_FORMAT_planar(fmt)                                          \
++#define PISP_IMAGE_FORMAT_PLANAR(fmt)                                          \
+ 	(((fmt) & PISP_IMAGE_FORMAT_PLANARITY_MASK) ==                         \
+ 	 PISP_IMAGE_FORMAT_PLANARITY_PLANAR)
+-#define PISP_IMAGE_FORMAT_wallpaper(fmt)                                       \
++#define PISP_IMAGE_FORMAT_WALLPAPER(fmt)                                       \
+ 	((fmt) & PISP_IMAGE_FORMAT_WALLPAPER_ROLL)
+-#define PISP_IMAGE_FORMAT_bpp_32(fmt) ((fmt) & PISP_IMAGE_FORMAT_BPP_32)
++#define PISP_IMAGE_FORMAT_BPP_32(fmt) ((fmt) & PISP_IMAGE_FORMAT_BPP_32)
+ #define PISP_IMAGE_FORMAT_HOG(fmt)                                             \
+ 	((fmt) &                                                               \
+ 	 (PISP_IMAGE_FORMAT_HOG_SIGNED | PISP_IMAGE_FORMAT_HOG_UNSIGNED))
diff --git a/target/linux/bcm27xx/patches-6.6/950-1158-media-uapi-pisp_be_config-Re-sort-pisp_be_tiles_conf.patch b/target/linux/bcm27xx/patches-6.6/950-1158-media-uapi-pisp_be_config-Re-sort-pisp_be_tiles_conf.patch
new file mode 100644
index 0000000000..49ff9d73ff
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1158-media-uapi-pisp_be_config-Re-sort-pisp_be_tiles_conf.patch
@@ -0,0 +1,30 @@
+From ce89955e44f3ab41262b02d8e1e65c3455d66c4d Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 28 Jun 2024 13:59:40 +0200
+Subject: [PATCH 1158/1215] media: uapi: pisp_be_config: Re-sort
+ pisp_be_tiles_config
+
+The order of the members of pisp_be_tiles_config is relevant
+as the driver logic assumes 'config' to be at offset 0.
+
+Re-sort the member to match the driver's expectations.
+
+Fixes: c6c49bac8770 ("media: uapi: Add Raspberry Pi PiSP Back End uAPI")
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ include/uapi/linux/media/raspberrypi/pisp_be_config.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/uapi/linux/media/raspberrypi/pisp_be_config.h
++++ b/include/uapi/linux/media/raspberrypi/pisp_be_config.h
+@@ -919,9 +919,9 @@ struct pisp_tile {
+  * @config:	PiSP Back End configuration
+  */
+ struct pisp_be_tiles_config {
++	struct pisp_be_config config;
+ 	struct pisp_tile tiles[PISP_BACK_END_NUM_TILES];
+ 	__u32 num_tiles;
+-	struct pisp_be_config config;
+ } __attribute__((packed));
+ 
+ #endif /* _UAPI_PISP_BE_CONFIG_H_ */
diff --git a/target/linux/bcm27xx/patches-6.6/950-1159-media-uapi-pisp_be_config-Add-extra-config-fields.patch b/target/linux/bcm27xx/patches-6.6/950-1159-media-uapi-pisp_be_config-Add-extra-config-fields.patch
new file mode 100644
index 0000000000..d18d12ec67
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1159-media-uapi-pisp_be_config-Add-extra-config-fields.patch
@@ -0,0 +1,82 @@
+From abf30420f943d03cc28fec38612d2c5f5e6edf1f Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 28 Jun 2024 14:11:14 +0200
+Subject: [PATCH 1159/1215] media: uapi: pisp_be_config: Add extra config
+ fields
+
+Complete the pisp_be_config strcture by adding fields that even if not
+written to the HW are relevant to complete the uAPI and put it in par
+with the BSP driver.
+
+Fixes: c6c49bac8770 ("media: uapi: Add Raspberry Pi PiSP Back End uAPI")
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ .../linux/media/raspberrypi/pisp_be_config.h  | 41 +++++++++++++++++++
+ 1 file changed, 41 insertions(+)
+
+--- a/include/uapi/linux/media/raspberrypi/pisp_be_config.h
++++ b/include/uapi/linux/media/raspberrypi/pisp_be_config.h
+@@ -716,6 +716,13 @@ struct pisp_be_hog_buffer_config {
+ /**
+  * struct pisp_be_config - RaspberryPi PiSP Back End Processing configuration
+  *
++ * @input_buffer:		Input buffer addresses
++ * @tdn_input_buffer:		TDN input buffer addresses
++ * @stitch_input_buffer:	Stitch input buffer addresses
++ * @tdn_output_buffer:		TDN output buffer addresses
++ * @stitch_output_buffer:	Stitch output buffer addresses
++ * @output_buffer:		Output buffers addresses
++ * @hog_buffer:			HOG buffer addresses
+  * @global:			Global PiSP configuration
+  * @input_format:		Input image format
+  * @decompress:			Decompress configuration
+@@ -753,8 +760,30 @@ struct pisp_be_hog_buffer_config {
+  * @resample:			Resampling configuration
+  * @output_format:		Output format configuration
+  * @hog:			HOG configuration
++ * @axi:			AXI bus configuration
++ * @lsc_extra:			LSC extra info
++ * @cac_extra:			CAC extra info
++ * @downscale_extra:		Downscaler extra info
++ * @resample_extra:		Resample extra info
++ * @crop:			Crop configuration
++ * @hog_format:			HOG format info
++ * @dirty_flags_bayer:		Bayer enable dirty flags
++ *				(:c:type:`pisp_be_bayer_enable`)
++ * @dirty_flags_rgb:		RGB enable dirty flags
++ *				(:c:type:`pisp_be_rgb_enable`)
++ * @dirty_flags_extra:		Extra dirty flags
+  */
+ struct pisp_be_config {
++	/* I/O configuration: */
++	struct pisp_be_input_buffer_config input_buffer;
++	struct pisp_be_tdn_input_buffer_config tdn_input_buffer;
++	struct pisp_be_stitch_input_buffer_config stitch_input_buffer;
++	struct pisp_be_tdn_output_buffer_config tdn_output_buffer;
++	struct pisp_be_stitch_output_buffer_config stitch_output_buffer;
++	struct pisp_be_output_buffer_config
++				output_buffer[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_hog_buffer_config hog_buffer;
++	/* Processing configuration: */
+ 	struct pisp_be_global_config global;
+ 	struct pisp_image_format_config input_format;
+ 	struct pisp_decompress_config decompress;
+@@ -793,6 +822,18 @@ struct pisp_be_config {
+ 	struct pisp_be_output_format_config
+ 				output_format[PISP_BACK_END_NUM_OUTPUTS];
+ 	struct pisp_be_hog_config hog;
++	struct pisp_be_axi_config axi;
++	/* Non-register fields: */
++	struct pisp_be_lsc_extra lsc_extra;
++	struct pisp_be_cac_extra cac_extra;
++	struct pisp_be_downscale_extra
++				downscale_extra[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_resample_extra resample_extra[PISP_BACK_END_NUM_OUTPUTS];
++	struct pisp_be_crop_config crop;
++	struct pisp_image_format_config hog_format;
++	__u32 dirty_flags_bayer; /* these use pisp_be_bayer_enable */
++	__u32 dirty_flags_rgb; /* use pisp_be_rgb_enable */
++	__u32 dirty_flags_extra; /* these use pisp_be_dirty_t */
+ } __attribute__((packed));
+ 
+ /**
diff --git a/target/linux/bcm27xx/patches-6.6/950-1160-media-pisp_be-Re-introduce-multi-context-support.patch b/target/linux/bcm27xx/patches-6.6/950-1160-media-pisp_be-Re-introduce-multi-context-support.patch
new file mode 100644
index 0000000000..ad667a1e69
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1160-media-pisp_be-Re-introduce-multi-context-support.patch
@@ -0,0 +1,886 @@
+From 033e037013f2c092501a03bb1bf5bbf7b4045aa0 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+Date: Fri, 28 Jun 2024 17:26:26 +0200
+Subject: [PATCH 1160/1215] media: pisp_be: Re-introduce multi-context support
+
+Re-introduce multi-context support that was dropped from the
+mainline driver version.
+
+Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
+---
+ .../platform/raspberrypi/pisp_be/pisp_be.c    | 355 ++++++++++--------
+ 1 file changed, 208 insertions(+), 147 deletions(-)
+
+--- a/drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
++++ b/drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
+@@ -24,6 +24,14 @@
+ /* Maximum number of config buffers possible */
+ #define PISP_BE_NUM_CONFIG_BUFFERS VB2_MAX_FRAME
+ 
++/*
++ * We want to support 2 independent instances allowing 2 simultaneous users
++ * of the ISP-BE (of course they share hardware, platform resources and mutex).
++ * Each such instance comprises a group of device nodes representing input
++ * and output queues, and a media controller device node to describe them.
++ */
++#define PISPBE_NUM_NODE_GROUPS 2
++
+ #define PISPBE_NAME "pispbe"
+ 
+ /* Some ISP-BE registers */
+@@ -156,7 +164,7 @@ struct pispbe_node {
+ 	struct media_pad pad;
+ 	struct media_intf_devnode *intf_devnode;
+ 	struct media_link *intf_link;
+-	struct pispbe_dev *pispbe;
++	struct pispbe_node_group *node_group;
+ 	/* Video device lock */
+ 	struct mutex node_lock;
+ 	/* vb2_queue lock */
+@@ -173,9 +181,27 @@ struct pispbe_node {
+ #define NODE_NAME(node) \
+ 		(node_desc[(node)->id].ent_name + sizeof(PISPBE_NAME))
+ 
++/*
++ * Node group structure, which comprises all the input and output nodes that a
++ * single PiSP client will need, along with its own v4l2 and media devices.
++ */
++struct pispbe_node_group {
++	unsigned int id;
++	struct v4l2_device v4l2_dev;
++	struct v4l2_subdev sd;
++	struct pispbe_dev *pispbe;
++	struct media_device mdev;
++	struct pispbe_node node[PISPBE_NUM_NODES];
++	u32 streaming_map; /* bitmap of which nodes are streaming */
++	struct media_pad pad[PISPBE_NUM_NODES]; /* output pads first */
++	struct pisp_be_tiles_config *config;
++	dma_addr_t config_dma_addr;
++	unsigned int sequence;
++};
++
+ /* Records details of the jobs currently running or queued on the h/w. */
+ struct pispbe_job {
+-	bool valid;
++	struct pispbe_node_group *node_group;
+ 	/*
+ 	 * An array of buffer pointers - remember it's source buffers first,
+ 	 * then captures, then metadata last.
+@@ -198,22 +224,13 @@ struct pispbe_job_descriptor {
+ 
+ /*
+  * Structure representing the entire PiSP Back End device, comprising several
+- * nodes which share platform resources and a mutex for the actual HW.
++ * nodes groups which share platform resources and a mutex for the actual HW.
+  */
+ struct pispbe_dev {
+ 	struct device *dev;
+-	struct pispbe_dev *pispbe;
+-	struct pisp_be_tiles_config *config;
+ 	void __iomem *be_reg_base;
+ 	struct clk *clk;
+-	struct v4l2_device v4l2_dev;
+-	struct v4l2_subdev sd;
+-	struct media_device mdev;
+-	struct media_pad pad[PISPBE_NUM_NODES]; /* output pads first */
+-	struct pispbe_node node[PISPBE_NUM_NODES];
+-	dma_addr_t config_dma_addr;
+-	unsigned int sequence;
+-	u32 streaming_map;
++	struct pispbe_node_group node_group[PISPBE_NUM_NODE_GROUPS];
+ 	struct pispbe_job queued_job, running_job;
+ 	spinlock_t hw_lock; /* protects "hw_busy" flag and streaming_map */
+ 	bool hw_busy; /* non-zero if a job is queued or is being started */
+@@ -348,9 +365,9 @@ static dma_addr_t pispbe_get_addr(struct
+ 	return 0;
+ }
+ 
+-static void pispbe_xlate_addrs(struct pispbe_dev *pispbe,
+-			       struct pispbe_job_descriptor *job,
+-			       struct pispbe_buffer *buf[PISPBE_NUM_NODES])
++static void pispbe_xlate_addrs(struct pispbe_job_descriptor *job,
++			       struct pispbe_buffer *buf[PISPBE_NUM_NODES],
++			       struct pispbe_node_group *node_group)
+ {
+ 	struct pispbe_hw_enables *hw_en = &job->hw_enables;
+ 	struct pisp_be_tiles_config *config = job->config;
+@@ -366,13 +383,13 @@ static void pispbe_xlate_addrs(struct pi
+ 	 * to 3 planes.
+ 	 */
+ 	ret = pispbe_get_planes_addr(addrs, buf[MAIN_INPUT_NODE],
+-				     &pispbe->node[MAIN_INPUT_NODE]);
++				     &node_group->node[MAIN_INPUT_NODE]);
+ 	if (ret <= 0) {
+ 		/*
+ 		 * This shouldn't happen; pispbe_schedule_internal should insist
+ 		 * on an input.
+ 		 */
+-		dev_warn(pispbe->dev, "ISP-BE missing input\n");
++		dev_warn(node_group->pispbe->dev, "ISP-BE missing input\n");
+ 		hw_en->bayer_enables = 0;
+ 		hw_en->rgb_enables = 0;
+ 		return;
+@@ -427,7 +444,7 @@ static void pispbe_xlate_addrs(struct pi
+ 	for (unsigned int i = 0; i < PISP_BACK_END_NUM_OUTPUTS; i++) {
+ 		ret = pispbe_get_planes_addr(addrs + 7 + 3 * i,
+ 					     buf[OUTPUT0_NODE + i],
+-					     &pispbe->node[OUTPUT0_NODE + i]);
++					     &node_group->node[OUTPUT0_NODE + i]);
+ 		if (ret <= 0)
+ 			hw_en->rgb_enables &= ~(PISP_BE_RGB_ENABLE_OUTPUT0 << i);
+ 	}
+@@ -447,10 +464,11 @@ static void pispbe_xlate_addrs(struct pi
+  *
+  * Returns 0 if a job has been successfully prepared, < 0 otherwise.
+  */
+-static int pispbe_prepare_job(struct pispbe_dev *pispbe,
++static int pispbe_prepare_job(struct pispbe_node_group *node_group,
+ 			      struct pispbe_job_descriptor *job)
+ {
+ 	struct pispbe_buffer *buf[PISPBE_NUM_NODES] = {};
++	struct pispbe_dev *pispbe = node_group->pispbe;
+ 	unsigned int config_index;
+ 	struct pispbe_node *node;
+ 	unsigned long flags;
+@@ -460,11 +478,11 @@ static int pispbe_prepare_job(struct pis
+ 	memset(job, 0, sizeof(struct pispbe_job_descriptor));
+ 
+ 	if (((BIT(CONFIG_NODE) | BIT(MAIN_INPUT_NODE)) &
+-		pispbe->streaming_map) !=
++		node_group->streaming_map) !=
+ 			(BIT(CONFIG_NODE) | BIT(MAIN_INPUT_NODE)))
+ 		return -ENODEV;
+ 
+-	node = &pispbe->node[CONFIG_NODE];
++	node = &node_group->node[CONFIG_NODE];
+ 	spin_lock_irqsave(&node->ready_lock, flags);
+ 	buf[CONFIG_NODE] = list_first_entry_or_null(&node->ready_queue,
+ 						    struct pispbe_buffer,
+@@ -480,8 +498,8 @@ static int pispbe_prepare_job(struct pis
+ 		return -ENODEV;
+ 
+ 	config_index = buf[CONFIG_NODE]->vb.vb2_buf.index;
+-	job->config = &pispbe->config[config_index];
+-	job->tiles = pispbe->config_dma_addr +
++	job->config = &node_group->config[config_index];
++	job->tiles = node_group->config_dma_addr +
+ 		     config_index * sizeof(struct pisp_be_tiles_config) +
+ 		     offsetof(struct pisp_be_tiles_config, tiles);
+ 
+@@ -498,7 +516,7 @@ static int pispbe_prepare_job(struct pis
+ 			continue;
+ 
+ 		buf[i] = NULL;
+-		if (!(pispbe->streaming_map & BIT(i)))
++		if (!(node_group->streaming_map & BIT(i)))
+ 			continue;
+ 
+ 		if ((!(rgb_en & PISP_BE_RGB_ENABLE_OUTPUT0) &&
+@@ -522,7 +540,7 @@ static int pispbe_prepare_job(struct pis
+ 			ignore_buffers = true;
+ 		}
+ 
+-		node = &pispbe->node[i];
++		node = &node_group->node[i];
+ 
+ 		/* Pull a buffer from each V4L2 queue to form the queued job */
+ 		spin_lock_irqsave(&node->ready_lock, flags);
+@@ -539,16 +557,16 @@ static int pispbe_prepare_job(struct pis
+ 			goto err_return_buffers;
+ 	}
+ 
+-	pispbe->queued_job.valid = true;
++	pispbe->queued_job.node_group = node_group;
+ 
+ 	/* Convert buffers to DMA addresses for the hardware */
+-	pispbe_xlate_addrs(pispbe, job, buf);
++	pispbe_xlate_addrs(job, buf, node_group);
+ 
+ 	return 0;
+ 
+ err_return_buffers:
+ 	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++) {
+-		struct pispbe_node *n =  &pispbe->node[i];
++		struct pispbe_node *n =  &node_group->node[i];
+ 
+ 		if (!buf[i])
+ 			continue;
+@@ -564,11 +582,12 @@ err_return_buffers:
+ 	return -ENODEV;
+ }
+ 
+-static void pispbe_schedule(struct pispbe_dev *pispbe, bool clear_hw_busy)
++static void pispbe_schedule(struct pispbe_dev *pispbe,
++			    struct pispbe_node_group *node_group,
++			    bool clear_hw_busy)
+ {
+ 	struct pispbe_job_descriptor job;
+ 	unsigned long flags;
+-	int ret;
+ 
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+ 
+@@ -578,40 +597,53 @@ static void pispbe_schedule(struct pispb
+ 	if (pispbe->hw_busy)
+ 		goto unlock_and_return;
+ 
+-	ret = pispbe_prepare_job(pispbe, &job);
+-	if (ret)
+-		goto unlock_and_return;
++	for (unsigned int i = 0; i < PISPBE_NUM_NODE_GROUPS; i++) {
++		int ret;
+ 
+-	/*
+-	 * We can kick the job off without the hw_lock, as this can
+-	 * never run again until hw_busy is cleared, which will happen
+-	 * only when the following job has been queued and an interrupt
+-	 * is rised.
+-	 */
+-	pispbe->hw_busy = true;
+-	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
++		/* Schedule jobs only for a specific group. */
++		if (node_group && &pispbe->node_group[i] != node_group)
++			continue;
+ 
+-	if (job.config->num_tiles <= 0 ||
+-	    job.config->num_tiles > PISP_BACK_END_NUM_TILES ||
+-	    !((job.hw_enables.bayer_enables | job.hw_enables.rgb_enables) &
+-	      PISP_BE_BAYER_ENABLE_INPUT)) {
+ 		/*
+-		 * Bad job. We can't let it proceed as it could lock up
+-		 * the hardware, or worse!
+-		 *
+-		 * For now, just force num_tiles to 0, which causes the
+-		 * H/W to do something bizarre but survivable. It
+-		 * increments (started,done) counters by more than 1,
+-		 * but we seem to survive...
++		 * Prepare a job for this group, if the group is not ready
++		 * continue and try with the next one.
+ 		 */
+-		dev_dbg(pispbe->dev, "Bad job: invalid number of tiles: %u\n",
+-			job.config->num_tiles);
+-		job.config->num_tiles = 0;
+-	}
++		ret = pispbe_prepare_job(&pispbe->node_group[i], &job);
++		if (ret)
++			continue;
++
++		/*
++		 * We can kick the job off without the hw_lock, as this can
++		 * never run again until hw_busy is cleared, which will happen
++		 * only when the following job has been queued and an interrupt
++		 * is rised.
++		 */
++		pispbe->hw_busy = true;
++		spin_unlock_irqrestore(&pispbe->hw_lock, flags);
++
++		if (job.config->num_tiles <= 0 ||
++		    job.config->num_tiles > PISP_BACK_END_NUM_TILES ||
++		    !((job.hw_enables.bayer_enables |
++		       job.hw_enables.rgb_enables) &
++		      PISP_BE_BAYER_ENABLE_INPUT)) {
++			/*
++			 * Bad job. We can't let it proceed as it could lock up
++			 * the hardware, or worse!
++			 *
++			 * For now, just force num_tiles to 0, which causes the
++			 * H/W to do something bizarre but survivable. It
++			 * increments (started,done) counters by more than 1,
++			 * but we seem to survive...
++			 */
++			dev_dbg(pispbe->dev, "Bad job: invalid number of tiles: %u\n",
++				job.config->num_tiles);
++			job.config->num_tiles = 0;
++		}
+ 
+-	pispbe_queue_job(pispbe, &job);
++		pispbe_queue_job(pispbe, &job);
+ 
+-	return;
++		return;
++	}
+ 
+ unlock_and_return:
+ 	/* No job has been queued, just release the lock and return. */
+@@ -627,13 +659,13 @@ static void pispbe_isr_jobdone(struct pi
+ 	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++) {
+ 		if (buf[i]) {
+ 			buf[i]->vb.vb2_buf.timestamp = ts;
+-			buf[i]->vb.sequence = pispbe->sequence;
++			buf[i]->vb.sequence = job->node_group->sequence;
+ 			vb2_buffer_done(&buf[i]->vb.vb2_buf,
+ 					VB2_BUF_STATE_DONE);
+ 		}
+ 	}
+ 
+-	pispbe->sequence++;
++	job->node_group->sequence++;
+ }
+ 
+ static irqreturn_t pispbe_isr(int irq, void *dev)
+@@ -657,7 +689,7 @@ static irqreturn_t pispbe_isr(int irq, v
+ 	 * we previously saw "start" now finishes, and we then queued a new job
+ 	 * which we see both start and finish "simultaneously".
+ 	 */
+-	if (pispbe->running_job.valid && pispbe->done != done) {
++	if (pispbe->running_job.node_group && pispbe->done != done) {
+ 		pispbe_isr_jobdone(pispbe, &pispbe->running_job);
+ 		memset(&pispbe->running_job, 0, sizeof(pispbe->running_job));
+ 		pispbe->done++;
+@@ -667,7 +699,7 @@ static irqreturn_t pispbe_isr(int irq, v
+ 		pispbe->started++;
+ 		can_queue_another = 1;
+ 
+-		if (pispbe->done != done && pispbe->queued_job.valid) {
++		if (pispbe->done != done && pispbe->queued_job.node_group) {
+ 			pispbe_isr_jobdone(pispbe, &pispbe->queued_job);
+ 			pispbe->done++;
+ 		} else {
+@@ -686,17 +718,17 @@ static irqreturn_t pispbe_isr(int irq, v
+ 	}
+ 
+ 	/* check if there's more to do before going to sleep */
+-	pispbe_schedule(pispbe, can_queue_another);
++	pispbe_schedule(pispbe, NULL, can_queue_another);
+ 
+ 	return IRQ_HANDLED;
+ }
+ 
+-static int pisp_be_validate_config(struct pispbe_dev *pispbe,
++static int pisp_be_validate_config(struct pispbe_node_group *node_group,
+ 				   struct pisp_be_tiles_config *config)
+ {
+ 	u32 bayer_enables = config->config.global.bayer_enables;
+ 	u32 rgb_enables = config->config.global.rgb_enables;
+-	struct device *dev = pispbe->dev;
++	struct device *dev = node_group->pispbe->dev;
+ 	struct v4l2_format *fmt;
+ 	unsigned int bpl, size;
+ 
+@@ -707,7 +739,7 @@ static int pisp_be_validate_config(struc
+ 	}
+ 
+ 	/* Ensure output config strides and buffer sizes match the V4L2 formats. */
+-	fmt = &pispbe->node[TDN_OUTPUT_NODE].format;
++	fmt = &node_group->node[TDN_OUTPUT_NODE].format;
+ 	if (bayer_enables & PISP_BE_BAYER_ENABLE_TDN_OUTPUT) {
+ 		bpl = config->config.tdn_output_format.stride;
+ 		size = bpl * config->config.tdn_output_format.height;
+@@ -725,7 +757,7 @@ static int pisp_be_validate_config(struc
+ 		}
+ 	}
+ 
+-	fmt = &pispbe->node[STITCH_OUTPUT_NODE].format;
++	fmt = &node_group->node[STITCH_OUTPUT_NODE].format;
+ 	if (bayer_enables & PISP_BE_BAYER_ENABLE_STITCH_OUTPUT) {
+ 		bpl = config->config.stitch_output_format.stride;
+ 		size = bpl * config->config.stitch_output_format.height;
+@@ -751,7 +783,7 @@ static int pisp_be_validate_config(struc
+ 		    PISP_IMAGE_FORMAT_WALLPAPER_ROLL)
+ 			continue; /* TODO: Size checks for wallpaper formats */
+ 
+-		fmt = &pispbe->node[OUTPUT0_NODE + j].format;
++		fmt = &node_group->node[OUTPUT0_NODE + j].format;
+ 		for (unsigned int i = 0; i < fmt->fmt.pix_mp.num_planes; i++) {
+ 			bpl = !i ? config->config.output_format[j].image.stride
+ 			    : config->config.output_format[j].image.stride2;
+@@ -783,7 +815,7 @@ static int pispbe_node_queue_setup(struc
+ 				   struct device *alloc_devs[])
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(q);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	unsigned int num_planes = NODE_IS_MPLANE(node) ?
+ 				  node->format.fmt.pix_mp.num_planes : 1;
+ 
+@@ -821,7 +853,7 @@ static int pispbe_node_queue_setup(struc
+ static int pispbe_node_buffer_prepare(struct vb2_buffer *vb)
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(vb->vb2_queue);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	unsigned int num_planes = NODE_IS_MPLANE(node) ?
+ 				  node->format.fmt.pix_mp.num_planes : 1;
+ 
+@@ -841,12 +873,12 @@ static int pispbe_node_buffer_prepare(st
+ 	}
+ 
+ 	if (node->id == CONFIG_NODE) {
+-		void *dst = &node->pispbe->config[vb->index];
++		void *dst = &node->node_group->config[vb->index];
+ 		void *src = vb2_plane_vaddr(vb, 0);
+ 
+ 		memcpy(dst, src, sizeof(struct pisp_be_tiles_config));
+ 
+-		return pisp_be_validate_config(pispbe, dst);
++		return pisp_be_validate_config(node->node_group, dst);
+ 	}
+ 
+ 	return 0;
+@@ -859,7 +891,8 @@ static void pispbe_node_buffer_queue(str
+ 	struct pispbe_buffer *buffer =
+ 		container_of(vbuf, struct pispbe_buffer, vb);
+ 	struct pispbe_node *node = vb2_get_drv_priv(buf->vb2_queue);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_node_group *node_group = node->node_group;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	unsigned long flags;
+ 
+ 	dev_dbg(pispbe->dev, "%s: for node %s\n", __func__, NODE_NAME(node));
+@@ -869,15 +902,16 @@ static void pispbe_node_buffer_queue(str
+ 
+ 	/*
+ 	 * Every time we add a buffer, check if there's now some work for the hw
+-	 * to do.
++	 * to do, but only for this client.
+ 	 */
+-	pispbe_schedule(pispbe, false);
++	pispbe_schedule(node_group->pispbe, node_group, false);
+ }
+ 
+ static int pispbe_node_start_streaming(struct vb2_queue *q, unsigned int count)
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(q);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_node_group *node_group = node->node_group;
++	struct pispbe_dev *pispbe = node_group->pispbe;
+ 	struct pispbe_buffer *buf, *tmp;
+ 	unsigned long flags;
+ 	int ret;
+@@ -887,17 +921,17 @@ static int pispbe_node_start_streaming(s
+ 		goto err_return_buffers;
+ 
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+-	node->pispbe->streaming_map |=  BIT(node->id);
+-	node->pispbe->sequence = 0;
++	node->node_group->streaming_map |=  BIT(node->id);
++	node->node_group->sequence = 0;
+ 	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+ 
+ 	dev_dbg(pispbe->dev, "%s: for node %s (count %u)\n",
+ 		__func__, NODE_NAME(node), count);
+-	dev_dbg(pispbe->dev, "Nodes streaming now 0x%x\n",
+-		node->pispbe->streaming_map);
++	dev_dbg(pispbe->dev, "Nodes streaming for this group now 0x%x\n",
++		node->node_group->streaming_map);
+ 
+ 	/* Maybe we're ready to run. */
+-	pispbe_schedule(pispbe, false);
++	pispbe_schedule(node_group->pispbe, node_group, false);
+ 
+ 	return 0;
+ 
+@@ -915,7 +949,8 @@ err_return_buffers:
+ static void pispbe_node_stop_streaming(struct vb2_queue *q)
+ {
+ 	struct pispbe_node *node = vb2_get_drv_priv(q);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_node_group *node_group = node->node_group;
++	struct pispbe_dev *pispbe = node_group->pispbe;
+ 	struct pispbe_buffer *buf;
+ 	unsigned long flags;
+ 
+@@ -948,14 +983,14 @@ static void pispbe_node_stop_streaming(s
+ 	vb2_wait_for_all_buffers(&node->queue);
+ 
+ 	spin_lock_irqsave(&pispbe->hw_lock, flags);
+-	pispbe->streaming_map &= ~BIT(node->id);
++	node_group->streaming_map &= ~BIT(node->id);
+ 	spin_unlock_irqrestore(&pispbe->hw_lock, flags);
+ 
+ 	pm_runtime_mark_last_busy(pispbe->dev);
+ 	pm_runtime_put_autosuspend(pispbe->dev);
+ 
+-	dev_dbg(pispbe->dev, "Nodes streaming now 0x%x\n",
+-		pispbe->streaming_map);
++	dev_dbg(pispbe->dev, "Nodes streaming for this group now 0x%x\n",
++		node_group->streaming_map);
+ }
+ 
+ static const struct vb2_ops pispbe_node_queue_ops = {
+@@ -979,7 +1014,7 @@ static int pispbe_node_querycap(struct f
+ 				struct v4l2_capability *cap)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	strscpy(cap->driver, PISPBE_NAME, sizeof(cap->driver));
+ 	strscpy(cap->card, PISPBE_NAME, sizeof(cap->card));
+@@ -995,7 +1030,7 @@ static int pispbe_node_g_fmt_vid_cap(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (!NODE_IS_CAPTURE(node) || NODE_IS_META(node)) {
+ 		dev_dbg(pispbe->dev,
+@@ -1015,7 +1050,7 @@ static int pispbe_node_g_fmt_vid_out(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (NODE_IS_CAPTURE(node) || NODE_IS_META(node)) {
+ 		dev_dbg(pispbe->dev,
+@@ -1035,7 +1070,7 @@ static int pispbe_node_g_fmt_meta_out(st
+ 				      struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (!NODE_IS_META(node) || NODE_IS_CAPTURE(node)) {
+ 		dev_dbg(pispbe->dev,
+@@ -1092,7 +1127,7 @@ static void pispbe_set_plane_params(stru
+ 
+ static void pispbe_try_format(struct v4l2_format *f, struct pispbe_node *node)
+ {
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	u32 pixfmt = f->fmt.pix_mp.pixelformat;
+ 	const struct pisp_be_format *fmt;
+ 	bool is_rgb;
+@@ -1156,7 +1191,7 @@ static int pispbe_node_try_fmt_vid_cap(s
+ 				       struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (!NODE_IS_CAPTURE(node) || NODE_IS_META(node)) {
+ 		dev_dbg(pispbe->dev,
+@@ -1174,7 +1209,7 @@ static int pispbe_node_try_fmt_vid_out(s
+ 				       struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (!NODE_IS_OUTPUT(node) || NODE_IS_META(node)) {
+ 		dev_dbg(pispbe->dev,
+@@ -1192,7 +1227,7 @@ static int pispbe_node_try_fmt_meta_out(
+ 					struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (!NODE_IS_META(node) || NODE_IS_CAPTURE(node)) {
+ 		dev_dbg(pispbe->dev,
+@@ -1211,7 +1246,7 @@ static int pispbe_node_s_fmt_vid_cap(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	int ret;
+ 
+ 	ret = pispbe_node_try_fmt_vid_cap(file, priv, f);
+@@ -1234,7 +1269,7 @@ static int pispbe_node_s_fmt_vid_out(str
+ 				     struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	int ret;
+ 
+ 	ret = pispbe_node_try_fmt_vid_out(file, priv, f);
+@@ -1257,7 +1292,7 @@ static int pispbe_node_s_fmt_meta_out(st
+ 				      struct v4l2_format *f)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 	int ret;
+ 
+ 	ret = pispbe_node_try_fmt_meta_out(file, priv, f);
+@@ -1306,7 +1341,7 @@ static int pispbe_enum_framesizes(struct
+ 				  struct v4l2_frmsizeenum *fsize)
+ {
+ 	struct pispbe_node *node = video_drvdata(file);
+-	struct pispbe_dev *pispbe = node->pispbe;
++	struct pispbe_dev *pispbe = node->node_group->pispbe;
+ 
+ 	if (NODE_IS_META(node) || fsize->index)
+ 		return -EINVAL;
+@@ -1391,17 +1426,19 @@ static void pispbe_node_def_fmt(struct p
+  * Initialise a struct pispbe_node and register it as /dev/video<N>
+  * to represent one of the PiSP Back End's input or output streams.
+  */
+-static int pispbe_init_node(struct pispbe_dev *pispbe, unsigned int id)
++static int pispbe_init_node(struct pispbe_node_group *node_group,
++			    unsigned int id)
+ {
+ 	bool output = NODE_DESC_IS_OUTPUT(&node_desc[id]);
+-	struct pispbe_node *node = &pispbe->node[id];
++	struct pispbe_node *node = &node_group->node[id];
+ 	struct media_entity *entity = &node->vfd.entity;
++	struct pispbe_dev *pispbe = node_group->pispbe;
+ 	struct video_device *vdev = &node->vfd;
+ 	struct vb2_queue *q = &node->queue;
+ 	int ret;
+ 
+ 	node->id = id;
+-	node->pispbe = pispbe;
++	node->node_group = node_group;
+ 	node->buf_type = node_desc[id].buf_type;
+ 
+ 	mutex_init(&node->node_lock);
+@@ -1419,7 +1456,7 @@ static int pispbe_init_node(struct pispb
+ 	q->ops = &pispbe_node_queue_ops;
+ 	q->buf_struct_size = sizeof(struct pispbe_buffer);
+ 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+-	q->dev = pispbe->dev;
++	q->dev = node->node_group->pispbe->dev;
+ 	/* get V4L2 to handle node->queue locking */
+ 	q->lock = &node->queue_lock;
+ 
+@@ -1431,7 +1468,7 @@ static int pispbe_init_node(struct pispb
+ 
+ 	*vdev = pispbe_videodev; /* default initialization */
+ 	strscpy(vdev->name, node_desc[id].ent_name, sizeof(vdev->name));
+-	vdev->v4l2_dev = &pispbe->v4l2_dev;
++	vdev->v4l2_dev = &node_group->v4l2_dev;
+ 	vdev->vfl_dir = output ? VFL_DIR_TX : VFL_DIR_RX;
+ 	/* get V4L2 to serialise our ioctls */
+ 	vdev->lock = &node->node_lock;
+@@ -1457,11 +1494,11 @@ static int pispbe_init_node(struct pispb
+ 	video_set_drvdata(vdev, node);
+ 
+ 	if (output)
+-		ret = media_create_pad_link(entity, 0, &pispbe->sd.entity,
++		ret = media_create_pad_link(entity, 0, &node_group->sd.entity,
+ 					    id, MEDIA_LNK_FL_IMMUTABLE |
+ 					    MEDIA_LNK_FL_ENABLED);
+ 	else
+-		ret = media_create_pad_link(&pispbe->sd.entity, id, entity,
++		ret = media_create_pad_link(&node_group->sd.entity, id, entity,
+ 					    0, MEDIA_LNK_FL_IMMUTABLE |
+ 					    MEDIA_LNK_FL_ENABLED);
+ 	if (ret)
+@@ -1490,9 +1527,10 @@ static const struct v4l2_subdev_ops pisp
+ 	.pad = &pispbe_pad_ops,
+ };
+ 
+-static int pispbe_init_subdev(struct pispbe_dev *pispbe)
++static int pispbe_init_subdev(struct pispbe_node_group *node_group)
+ {
+-	struct v4l2_subdev *sd = &pispbe->sd;
++	struct pispbe_dev *pispbe = node_group->pispbe;
++	struct v4l2_subdev *sd = &node_group->sd;
+ 	int ret;
+ 
+ 	v4l2_subdev_init(sd, &pispbe_sd_ops);
+@@ -1502,16 +1540,16 @@ static int pispbe_init_subdev(struct pis
+ 	strscpy(sd->name, PISPBE_NAME, sizeof(sd->name));
+ 
+ 	for (unsigned int i = 0; i < PISPBE_NUM_NODES; i++)
+-		pispbe->pad[i].flags =
++		node_group->pad[i].flags =
+ 			NODE_DESC_IS_OUTPUT(&node_desc[i]) ?
+ 			MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE;
+ 
+ 	ret = media_entity_pads_init(&sd->entity, PISPBE_NUM_NODES,
+-				     pispbe->pad);
++				     node_group->pad);
+ 	if (ret)
+ 		goto error;
+ 
+-	ret = v4l2_device_register_subdev(&pispbe->v4l2_dev, sd);
++	ret = v4l2_device_register_subdev(&node_group->v4l2_dev, sd);
+ 	if (ret)
+ 		goto error;
+ 
+@@ -1522,36 +1560,43 @@ error:
+ 	return ret;
+ }
+ 
+-static int pispbe_init_devices(struct pispbe_dev *pispbe)
++static int pispbe_init_group(struct pispbe_dev *pispbe, unsigned int id)
+ {
++	struct pispbe_node_group *node_group = &pispbe->node_group[id];
+ 	struct v4l2_device *v4l2_dev;
+ 	struct media_device *mdev;
+ 	unsigned int num_regist;
+ 	int ret;
+ 
++	node_group->id = id;
++	node_group->pispbe = pispbe;
++	node_group->streaming_map = 0;
++
++	dev_dbg(pispbe->dev, "Register nodes for group %u\n", id);
++
+ 	/* Register v4l2_device and media_device */
+-	mdev = &pispbe->mdev;
+-	mdev->hw_revision = pispbe->hw_version;
+-	mdev->dev = pispbe->dev;
++	mdev = &node_group->mdev;
++	mdev->hw_revision = node_group->pispbe->hw_version;
++	mdev->dev = node_group->pispbe->dev;
+ 	strscpy(mdev->model, PISPBE_NAME, sizeof(mdev->model));
+ 	media_device_init(mdev);
+ 
+-	v4l2_dev = &pispbe->v4l2_dev;
+-	v4l2_dev->mdev = &pispbe->mdev;
++	v4l2_dev = &node_group->v4l2_dev;
++	v4l2_dev->mdev = &node_group->mdev;
+ 	strscpy(v4l2_dev->name, PISPBE_NAME, sizeof(v4l2_dev->name));
+ 
+-	ret = v4l2_device_register(pispbe->dev, v4l2_dev);
++	ret = v4l2_device_register(pispbe->dev, &node_group->v4l2_dev);
+ 	if (ret)
+ 		goto err_media_dev_cleanup;
+ 
+ 	/* Register the PISPBE subdevice. */
+-	ret = pispbe_init_subdev(pispbe);
++	ret = pispbe_init_subdev(node_group);
+ 	if (ret)
+ 		goto err_unregister_v4l2;
+ 
+ 	/* Create device video nodes */
+ 	for (num_regist = 0; num_regist < PISPBE_NUM_NODES; num_regist++) {
+-		ret = pispbe_init_node(pispbe, num_regist);
++		ret = pispbe_init_node(node_group, num_regist);
+ 		if (ret)
+ 			goto err_unregister_nodes;
+ 	}
+@@ -1560,12 +1605,12 @@ static int pispbe_init_devices(struct pi
+ 	if (ret)
+ 		goto err_unregister_nodes;
+ 
+-	pispbe->config =
++	node_group->config =
+ 		dma_alloc_coherent(pispbe->dev,
+ 				   sizeof(struct pisp_be_tiles_config) *
+ 					PISP_BE_NUM_CONFIG_BUFFERS,
+-				   &pispbe->config_dma_addr, GFP_KERNEL);
+-	if (!pispbe->config) {
++				   &node_group->config_dma_addr, GFP_KERNEL);
++	if (!node_group->config) {
+ 		dev_err(pispbe->dev, "Unable to allocate cached config buffers.\n");
+ 		ret = -ENOMEM;
+ 		goto err_unregister_mdev;
+@@ -1577,11 +1622,11 @@ err_unregister_mdev:
+ 	media_device_unregister(mdev);
+ err_unregister_nodes:
+ 	while (num_regist-- > 0) {
+-		video_unregister_device(&pispbe->node[num_regist].vfd);
+-		vb2_queue_release(&pispbe->node[num_regist].queue);
++		video_unregister_device(&node_group->node[num_regist].vfd);
++		vb2_queue_release(&node_group->node[num_regist].queue);
+ 	}
+-	v4l2_device_unregister_subdev(&pispbe->sd);
+-	media_entity_cleanup(&pispbe->sd.entity);
++	v4l2_device_unregister_subdev(&node_group->sd);
++	media_entity_cleanup(&node_group->sd.entity);
+ err_unregister_v4l2:
+ 	v4l2_device_unregister(v4l2_dev);
+ err_media_dev_cleanup:
+@@ -1589,31 +1634,33 @@ err_media_dev_cleanup:
+ 	return ret;
+ }
+ 
+-static void pispbe_destroy_devices(struct pispbe_dev *pispbe)
++static void pispbe_destroy_node_group(struct pispbe_node_group *node_group)
+ {
+-	if (pispbe->config) {
+-		dma_free_coherent(pispbe->dev,
++	struct pispbe_dev *pispbe = node_group->pispbe;
++
++	if (node_group->config) {
++		dma_free_coherent(node_group->pispbe->dev,
+ 				  sizeof(struct pisp_be_tiles_config) *
+ 					PISP_BE_NUM_CONFIG_BUFFERS,
+-				  pispbe->config,
+-				  pispbe->config_dma_addr);
++				  node_group->config,
++				  node_group->config_dma_addr);
+ 	}
+ 
+ 	dev_dbg(pispbe->dev, "Unregister from media controller\n");
+ 
+-	v4l2_device_unregister_subdev(&pispbe->sd);
+-	media_entity_cleanup(&pispbe->sd.entity);
+-	media_device_unregister(&pispbe->mdev);
++	v4l2_device_unregister_subdev(&node_group->sd);
++	media_entity_cleanup(&node_group->sd.entity);
++	media_device_unregister(&node_group->mdev);
+ 
+ 	for (int i = PISPBE_NUM_NODES - 1; i >= 0; i--) {
+-		video_unregister_device(&pispbe->node[i].vfd);
+-		vb2_queue_release(&pispbe->node[i].queue);
+-		mutex_destroy(&pispbe->node[i].node_lock);
+-		mutex_destroy(&pispbe->node[i].queue_lock);
++		video_unregister_device(&node_group->node[i].vfd);
++		vb2_queue_release(&node_group->node[i].queue);
++		mutex_destroy(&node_group->node[i].node_lock);
++		mutex_destroy(&node_group->node[i].queue_lock);
+ 	}
+ 
+-	media_device_cleanup(&pispbe->mdev);
+-	v4l2_device_unregister(&pispbe->v4l2_dev);
++	media_device_cleanup(&node_group->mdev);
++	v4l2_device_unregister(&node_group->v4l2_dev);
+ }
+ 
+ static int pispbe_runtime_suspend(struct device *dev)
+@@ -1681,9 +1728,13 @@ static int pispbe_hw_init(struct pispbe_
+ 	return 0;
+ }
+ 
+-/* Probe the ISP-BE hardware block, as a single platform device. */
++/*
++ * Probe the ISP-BE hardware block, as a single platform device.
++ * This will instantiate multiple "node groups" each with many device nodes.
++ */
+ static int pispbe_probe(struct platform_device *pdev)
+ {
++	unsigned int num_groups = 0;
+ 	struct pispbe_dev *pispbe;
+ 	int ret;
+ 
+@@ -1738,17 +1789,26 @@ static int pispbe_probe(struct platform_
+ 	if (ret)
+ 		goto pm_runtime_suspend_err;
+ 
+-	ret = pispbe_init_devices(pispbe);
+-	if (ret)
+-		goto disable_devs_err;
++	/*
++	 * Initialise and register devices for each node_group, including media
++	 * device
++	 */
++	for (num_groups = 0;
++	     num_groups < PISPBE_NUM_NODE_GROUPS;
++	     num_groups++) {
++		ret = pispbe_init_group(pispbe, num_groups);
++		if (ret)
++			goto disable_nodes_err;
++	}
+ 
+ 	pm_runtime_mark_last_busy(pispbe->dev);
+ 	pm_runtime_put_autosuspend(pispbe->dev);
+ 
+ 	return 0;
+ 
+-disable_devs_err:
+-	pispbe_destroy_devices(pispbe);
++disable_nodes_err:
++	while (num_groups-- > 0)
++		pispbe_destroy_node_group(&pispbe->node_group[num_groups]);
+ pm_runtime_suspend_err:
+ 	pispbe_runtime_suspend(pispbe->dev);
+ pm_runtime_disable_err:
+@@ -1762,7 +1822,8 @@ static int pispbe_remove(struct platform
+ {
+ 	struct pispbe_dev *pispbe = platform_get_drvdata(pdev);
+ 
+-	pispbe_destroy_devices(pispbe);
++	for (int i = PISPBE_NUM_NODE_GROUPS - 1; i >= 0; i--)
++		pispbe_destroy_node_group(&pispbe->node_group[i]);
+ 
+ 	pispbe_runtime_suspend(pispbe->dev);
+ 	pm_runtime_dont_use_autosuspend(pispbe->dev);
diff --git a/target/linux/bcm27xx/patches-6.6/950-1161-media-pisp_be-Re-introduce-video-node-offset.patch b/target/linux/bcm27xx/patches-6.6/950-1161-media-pisp_be-Re-introduce-video-node-offset.patch
new file mode 100644
index 0000000000..0586f5c620
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1161-media-pisp_be-Re-introduce-video-node-offset.patch
@@ -0,0 +1,36 @@
+From f372f2854279828a33b9b3debc233d366fb4c124 Mon Sep 17 00:00:00 2001
+From: Naushir Patuck <naush@raspberrypi.com>
+Date: Mon, 8 Jul 2024 11:47:49 +0100
+Subject: [PATCH 1161/1215] media: pisp_be: Re-introduce video node offset
+
+Offset the backend dev-nodes starting at /dev/video20
+onwards to maintain backward compatibility with the
+pre-upstreamed kernel driver.
+
+Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
+---
+ drivers/media/platform/raspberrypi/pisp_be/pisp_be.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
++++ b/drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
+@@ -21,6 +21,9 @@
+ 
+ #include "pisp_be_formats.h"
+ 
++/* Offset to use when registering the /dev/videoX node */
++#define PISPBE_VIDEO_NODE_OFFSET 20
++
+ /* Maximum number of config buffers possible */
+ #define PISP_BE_NUM_CONFIG_BUFFERS VB2_MAX_FRAME
+ 
+@@ -1484,7 +1487,8 @@ static int pispbe_init_node(struct pispb
+ 		goto err_unregister_queue;
+ 	}
+ 
+-	ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
++	ret = video_register_device(vdev, VFL_TYPE_VIDEO,
++				    PISPBE_VIDEO_NODE_OFFSET);
+ 	if (ret) {
+ 		dev_err(pispbe->dev,
+ 			"Failed to register video %s device node\n",
diff --git a/target/linux/bcm27xx/patches-6.6/950-1163-dts-Make-camN_reg-and-camN_reg_gpio-overrides-generi.patch b/target/linux/bcm27xx/patches-6.6/950-1163-dts-Make-camN_reg-and-camN_reg_gpio-overrides-generi.patch
new file mode 100644
index 0000000000..38c1d3b9b6
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1163-dts-Make-camN_reg-and-camN_reg_gpio-overrides-generi.patch
@@ -0,0 +1,158 @@
+From 6e4ad40811170653431fc40a6fdc3f486863b40f Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Thu, 4 Jul 2024 18:15:00 +0100
+Subject: [PATCH 1163/1215] dts: Make camN_reg and camN_reg_gpio overrides
+ generic
+
+The camera regulator GPIO can be used for other purposes,
+so the camN_reg override to allow disabling is potentially
+useful on any platform.
+camN_gpio is less useful, but isn't invalid.
+
+Move these overrides from the CM dt files to bcm270x-rpi.dtsi
+and bcm2712-rpi.dtsi.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+---
+ .../arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi |  4 ----
+ .../arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts |  4 ----
+ arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi   |  7 +++++++
+ .../arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts |  4 ----
+ .../arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts |  7 -------
+ .../boot/dts/broadcom/bcm2711-rpi-cm4s.dts    |  5 -----
+ arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi   |  8 ++++++++
+ arch/arm/boot/dts/overlays/README             | 20 +++++++++----------
+ 8 files changed, 25 insertions(+), 34 deletions(-)
+
+--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi
++++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dtsi
+@@ -19,9 +19,5 @@ i2c_vc: &i2c0 {
+ 		act_led_gpio = <&led_act>,"gpios:4";
+ 		act_led_activelow = <&led_act>,"gpios:8";
+ 		act_led_trigger = <&led_act>,"linux,default-trigger";
+-		cam0_reg = <&cam0_reg>,"status";
+-		cam0_reg_gpio = <&cam0_reg>,"gpio:4";
+-		cam1_reg = <&cam1_reg>,"status";
+-		cam1_reg_gpio = <&cam1_reg>,"gpio:4";
+ 	};
+ };
+--- a/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts
++++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts
+@@ -211,9 +211,5 @@ i2c_csi_dsi0: &i2c0 {
+ 		act_led_gpio = <&led_act>,"gpios:4";
+ 		act_led_activelow = <&led_act>,"gpios:8";
+ 		act_led_trigger = <&led_act>,"linux,default-trigger";
+-		cam0_reg = <&cam0_reg>,"status";
+-		cam0_reg_gpio = <&cam0_reg>,"gpio:4";
+-		cam1_reg = <&cam1_reg>,"status";
+-		cam1_reg_gpio = <&cam1_reg>,"gpio:4";
+ 	};
+ };
+--- a/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi
++++ b/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi
+@@ -111,6 +111,13 @@
+ 			    <&csi0>, "sync-gpios:4",
+ 			    <&csi0>, "sync-gpios:8=", <GPIO_ACTIVE_LOW>;
+ 
++		cam0_reg = <&cam0_reg>,"status";
++		cam0_reg_gpio = <&cam0_reg>,"gpio:4",
++				<&cam0_reg>,"gpio:0=", <&gpio>;
++		cam1_reg = <&cam1_reg>,"status";
++		cam1_reg_gpio = <&cam1_reg>,"gpio:4",
++				<&cam1_reg>,"gpio:0=", <&gpio>;
++
+ 		strict_gpiod = <&chosen>, "bootargs=pinctrl_bcm2835.persist_gpio_outputs=n";
+ 	};
+ };
+--- a/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts
++++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts
+@@ -211,9 +211,5 @@ i2c_csi_dsi0: &i2c0 {
+ 		act_led_gpio = <&led_act>,"gpios:4";
+ 		act_led_activelow = <&led_act>,"gpios:8";
+ 		act_led_trigger = <&led_act>,"linux,default-trigger";
+-		cam0_reg = <&cam0_reg>,"status";
+-		cam0_reg_gpio = <&cam0_reg>,"gpio:4";
+-		cam1_reg = <&cam1_reg>,"status";
+-		cam1_reg_gpio = <&cam1_reg>,"gpio:4";
+ 	};
+ };
+--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts
++++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts
+@@ -498,13 +498,6 @@ i2c_csi_dsi0: &i2c0 {
+ 			<&ant2>, "output-high?=off",
+ 			<&ant2>, "output-low?=on";
+ 
+-		cam0_reg = <&cam0_reg>,"status";
+-		cam0_reg_gpio = <&cam0_reg>,"gpio:4",
+-				  <&cam0_reg>,"gpio:0=", <&gpio>;
+-		cam1_reg = <&cam1_reg>,"status";
+-		cam1_reg_gpio = <&cam1_reg>,"gpio:4",
+-				  <&cam1_reg>,"gpio:0=", <&gpio>;
+-
+ 		pcie_tperst_clk_ms = <&pcie0>,"brcm,tperst-clk-ms:0";
+ 	};
+ };
+--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts
++++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts
+@@ -289,10 +289,5 @@ i2c_csi_dsi0: &i2c0 {
+ 		act_led_gpio = <&led_act>,"gpios:4";
+ 		act_led_activelow = <&led_act>,"gpios:8";
+ 		act_led_trigger = <&led_act>,"linux,default-trigger";
+-
+-		cam0_reg = <&cam0_reg>,"status";
+-		cam0_reg_gpio = <&cam0_reg>,"gpio:4";
+-		cam1_reg = <&cam1_reg>,"status";
+-		cam1_reg_gpio = <&cam1_reg>,"gpio:4";
+ 	};
+ };
+--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi
++++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi
+@@ -106,6 +106,14 @@
+ 		nvmem_priv_rw = <&nvmem_priv>,"rw?";
+ 		nvmem_mac_rw = <&nvmem_mac>,"rw?";
+ 		strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n";
++
++		cam0_reg = <&cam0_reg>,"status";
++		cam0_reg_gpio = <&cam0_reg>,"gpio:4",
++				<&cam0_reg>,"gpio:0=", <&gpio>;
++		cam1_reg = <&cam1_reg>,"status";
++		cam1_reg_gpio = <&cam1_reg>,"gpio:4",
++				<&cam1_reg>,"gpio:0=", <&gpio>;
++
+ 	};
+ };
+ 
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -171,21 +171,21 @@ Params:
+         button_debounce         Set the debounce delay (in ms) on the power/
+                                 shutdown button (default 50ms)
+ 
+-        cam0_reg                Enables CAM 0 regulator.
+-                                Only required on CM1 & 3.
++        cam0_reg                Controls CAM 0 regulator.
++                                Disabled by default on CM1 & 3.
++                                Enabled by default on all other boards.
+ 
+         cam0_reg_gpio           Set GPIO for CAM 0 regulator.
+-                                Default 31 on CM1, 3, and 4S.
+-                                Default of GPIO expander 5 on CM4, but override
+-                                switches to normal GPIO.
++                                NB override switches to the normal GPIO driver,
++                                even if the original was on the GPIO expander.
+ 
+-        cam1_reg                Enables CAM 1 regulator.
+-                                Only required on CM1 & 3.
++        cam1_reg                Controls CAM 1 regulator.
++                                Disabled by default on CM1 & 3.
++                                Enabled by default on all other boards.
+ 
+         cam1_reg_gpio           Set GPIO for CAM 1 regulator.
+-                                Default 3 on CM1, 3, and 4S.
+-                                Default of GPIO expander 5 on CM4, but override
+-                                switches to normal GPIO.
++                                NB override switches to the normal GPIO driver,
++                                even if the original was on the GPIO expander.
+ 
+         cam0_sync               Enable a GPIO to reflect frame sync from CSI0,
+                                 going high on frame start, and low on frame end.
diff --git a/target/linux/bcm27xx/patches-6.6/950-1164-spi-dt-bindings-Add-RPI-RP2040-GPIO-Bridge.patch b/target/linux/bcm27xx/patches-6.6/950-1164-spi-dt-bindings-Add-RPI-RP2040-GPIO-Bridge.patch
new file mode 100644
index 0000000000..487e508ea4
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1164-spi-dt-bindings-Add-RPI-RP2040-GPIO-Bridge.patch
@@ -0,0 +1,108 @@
+From afd949f5f64d224cf7a016ef933257842bc170ab Mon Sep 17 00:00:00 2001
+From: Richard Oliver <richard.oliver@raspberrypi.com>
+Date: Fri, 24 May 2024 10:34:45 +0100
+Subject: [PATCH 1164/1215] spi: dt-bindings: Add RPI RP2040 GPIO Bridge
+
+Add YAML device tree bindings for the Raspberry Pi RP2040 GPIO Bridge.
+
+Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
+---
+ .../spi/raspberrypi,rp2040-gpio-bridge.yaml   | 77 +++++++++++++++++++
+ MAINTAINERS                                   |  5 ++
+ 2 files changed, 82 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/spi/raspberrypi,rp2040-gpio-bridge.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/spi/raspberrypi,rp2040-gpio-bridge.yaml
+@@ -0,0 +1,77 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/spi/raspberrypi,rp2040-gpio-bridge.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Raspberry Pi RP2040 GPIO Bridge
++
++maintainers:
++  - Raspberry Pi <kernel-list@raspberrypi.com>
++
++description: |-
++  The Raspberry Pi PR2040 GPIO bridge can be used as a GPIO expander and
++  Tx-only SPI master.
++
++properties:
++  reg:
++    description: I2C slave address
++    const: 0x40
++
++  compatible:
++    const: raspberrypi,rp2040-gpio-bridge
++
++  power-supply:
++    description: Phandle to the regulator that powers the RP2040.
++
++  '#address-cells':
++    const: 1
++
++  '#size-cells':
++    const: 0
++
++  '#gpio-cells':
++    const: 2
++
++  gpio-controller: true
++
++  fast_xfer_requires_i2c_lock:
++    description: Set if I2C bus should be locked during fast transfer.
++
++  fast_xfer_recv_gpio_base:
++    description: RP2040 GPIO base for fast transfer pair.
++
++  fast_xfer-gpios:
++    description: RP1 GPIOs to use for fast transfer clock and data.
++
++required:
++  - reg
++  - compatible
++  - power-supply
++  - '#gpio-cells'
++  - gpio-controller
++
++additionalProperties: false
++
++examples:
++  - |
++    i2c {
++      #address-cells = <1>;
++      #size-cells = <0>;
++
++      spi@40 {
++        reg = <0x40>;
++        compatible = "raspberrypi,rp2040-gpio-bridge";
++        status = "disabled";
++        #address-cells = <1>;
++        #size-cells = <0>;
++
++        power-supply = <&cam_dummy_reg>;
++
++        #gpio-cells = <2>;
++        gpio-controller;
++      };
++    };
++
++...
++
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -18027,6 +18027,11 @@ F:	drivers/ras/
+ F:	include/linux/ras.h
+ F:	include/ras/ras_event.h
+ 
++RASPBERRY PI RP2040 GPIO BRIDGE DRIVER
++M:	Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
++S:	Maintained
++F:	Documentation/devicetree/bindings/spi/raspberrypi,rp2040-gpio-bridge.yaml
++
+ RAYLINK/WEBGEAR 802.11 WIRELESS LAN DRIVER
+ L:	linux-wireless@vger.kernel.org
+ S:	Orphan
diff --git a/target/linux/bcm27xx/patches-6.6/950-1165-spi-Add-a-driver-for-the-RPI-RP2040-GPIO-bridge.patch b/target/linux/bcm27xx/patches-6.6/950-1165-spi-Add-a-driver-for-the-RPI-RP2040-GPIO-bridge.patch
new file mode 100644
index 0000000000..68e2ef6007
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1165-spi-Add-a-driver-for-the-RPI-RP2040-GPIO-bridge.patch
@@ -0,0 +1,1288 @@
+From 99ae83f1944f47d4338ef7a6f02536927fc6ce57 Mon Sep 17 00:00:00 2001
+From: Richard Oliver <richard.oliver@raspberrypi.com>
+Date: Tue, 21 May 2024 13:47:23 +0100
+Subject: [PATCH 1165/1215] spi: Add a driver for the RPI RP2040 GPIO bridge
+
+The Raspberry Pi RP2040 GPIO bridge is an I2C-attached device exposing
+both a Tx-only SPI controller, and a GPIO controller.
+
+Due to the relative difference in transfer rates between standard-mode
+I2C and SPI, the GPIO bridge makes use of 12 MiB of non-volatile storage
+to cache repeated transfers. This cache is arranged in ~8 KiB blocks and
+is addressed by the MD5 digest of the data contained therein.
+
+Optionally, this driver is able to take advantage of Raspberry Pi RP1
+GPIOs to achieve faster than I2C data transfer rates.
+
+Signed-off-by: Richard Oliver <richard.oliver@raspberrypi.com>
+---
+ MAINTAINERS                          |    1 +
+ drivers/spi/Kconfig                  |   12 +
+ drivers/spi/Makefile                 |    1 +
+ drivers/spi/spi-rp2040-gpio-bridge.c | 1219 ++++++++++++++++++++++++++
+ 4 files changed, 1233 insertions(+)
+ create mode 100644 drivers/spi/spi-rp2040-gpio-bridge.c
+
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -18031,6 +18031,7 @@ RASPBERRY PI RP2040 GPIO BRIDGE DRIVER
+ M:	Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
+ S:	Maintained
+ F:	Documentation/devicetree/bindings/spi/raspberrypi,rp2040-gpio-bridge.yaml
++F:	drivers/spi/spi-rp2040-gpio-bridge.c
+ 
+ RAYLINK/WEBGEAR 802.11 WIRELESS LAN DRIVER
+ L:	linux-wireless@vger.kernel.org
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -846,6 +846,18 @@ config SPI_RB4XX
+ 	help
+ 	  SPI controller driver for the Mikrotik RB4xx series boards.
+ 
++config SPI_RP2040_GPIO_BRIDGE
++	tristate "Raspberry Pi RP2040 GPIO Bridge"
++	depends on I2C && SPI && GPIOLIB
++	help
++	  Support for the Raspberry Pi RP2040 GPIO bridge.
++
++	  This driver provides support for the Raspberry Pi PR2040 GPIO bridge.
++	  It can be used as a GPIO expander and a Tx-only SPI master.
++
++	  Optionally, this driver is able to take advantage of Raspberry Pi RP1
++	  GPIOs to achieve faster than I2C data transfer rates.
++
+ config SPI_RPCIF
+ 	tristate "Renesas RPC-IF SPI driver"
+ 	depends on RENESAS_RPCIF
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -115,6 +115,7 @@ obj-$(CONFIG_SPI_ROCKCHIP)		+= spi-rockc
+ obj-$(CONFIG_SPI_ROCKCHIP_SFC)		+= spi-rockchip-sfc.o
+ obj-$(CONFIG_SPI_RB4XX)			+= spi-rb4xx.o
+ obj-$(CONFIG_MACH_REALTEK_RTL)		+= spi-realtek-rtl.o
++obj-$(CONFIG_SPI_RP2040_GPIO_BRIDGE)	+= spi-rp2040-gpio-bridge.o
+ obj-$(CONFIG_SPI_RPCIF)			+= spi-rpc-if.o
+ obj-$(CONFIG_SPI_RSPI)			+= spi-rspi.o
+ obj-$(CONFIG_SPI_RZV2M_CSI)		+= spi-rzv2m-csi.o
+--- /dev/null
++++ b/drivers/spi/spi-rp2040-gpio-bridge.c
+@@ -0,0 +1,1219 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * RP2040 GPIO Bridge
++ *
++ * Copyright (C) 2023, 2024, Raspberry Pi Ltd
++ */
++
++#include <crypto/hash.h>
++#include <linux/crypto.h>
++#include <linux/delay.h>
++#include <linux/firmware.h>
++#include <linux/gpio/driver.h>
++#include <linux/i2c.h>
++#include <linux/kernel.h>
++#include <linux/minmax.h>
++#include <linux/of_address.h>
++#include <linux/pm_runtime.h>
++#include <linux/spi/spi.h>
++#include <linux/stddef.h>
++#include <linux/types.h>
++
++#define MODULE_NAME "rp2040-gpio-bridge"
++
++#define I2C_RETRIES 4U
++
++#define ONE_KIB 1024U
++#define MD5_SUFFIX_SIZE 9U
++
++#define RP2040_GBDG_FLASH_BLOCK_SIZE (8U * ONE_KIB)
++#define RP2040_GBDG_BLOCK_SIZE (RP2040_GBDG_FLASH_BLOCK_SIZE - MD5_SUFFIX_SIZE)
++
++/*
++ * 1MiB transfer size is an arbitrary limit
++ * Max value is 4173330 (using a single manifest)
++ */
++#define MAX_TRANSFER_SIZE (1024U * ONE_KIB)
++
++#define HALF_BUFFER (4U * ONE_KIB)
++
++#define STATUS_SIZE 4
++#define MD5_DIGEST_SIZE 16
++#define VERSION_SIZE 4
++#define ID_SIZE 8
++#define TOTAL_RD_HDR_SIZE \
++	(STATUS_SIZE + MD5_DIGEST_SIZE + VERSION_SIZE + ID_SIZE)
++
++struct rp2040_gbdg_device_info {
++	u8 md5[MD5_DIGEST_SIZE];
++	u64 id;
++	u32 version;
++	u32 status;
++};
++
++static_assert(sizeof(struct rp2040_gbdg_device_info) == TOTAL_RD_HDR_SIZE);
++
++#define MANIFEST_UNIT_SIZE 16
++static_assert(MD5_DIGEST_SIZE == MANIFEST_UNIT_SIZE);
++#define MANIFEST_HEADER_UNITS 1
++#define MANIFEST_DATA_UNITS \
++	DIV_ROUND_UP(MAX_TRANSFER_SIZE, RP2040_GBDG_BLOCK_SIZE)
++
++#define STATUS_BUSY 0x01
++
++#define DIRECT_PREFIX 0x00
++#define DIRECT_CMD_CS 0x07
++#define DIRECT_CMD_EMIT 0x08
++
++#define WRITE_DATA_PREFIX 0x80
++#define WRITE_DATA_PREFIX_SIZE 1
++
++#define FIXED_SIZE_CMD_PREFIX 0x81
++
++#define WRITE_DATA_UPPER_PREFIX 0x82
++#define WRITE_DATA_UPPER_PREFIX_SIZE 1
++
++#define NUM_GPIO 24
++
++enum rp2040_gbdg_fixed_size_commands {
++	/* 10-byte commands */
++	CMD_SAVE_CACHE = 0x07,
++	CMD_SEND_RB = 0x08,
++	CMD_GPIO_ST_CL = 0x0b,
++	CMD_GPIO_OE = 0x0c,
++	CMD_DAT_RECV = 0x0d,
++	CMD_DAT_EMIT = 0x0e,
++	/* 18-byte commands */
++	CMD_READ_CSUM = 0x11,
++	CMD_SEND_MANI = 0x13,
++};
++
++struct rp2040_gbdg {
++	struct spi_controller *controller;
++
++	struct i2c_client *client;
++	struct crypto_shash *shash;
++	struct shash_desc *shash_desc;
++
++	struct regulator *regulator;
++
++	struct gpio_chip gc;
++	u32 gpio_requested;
++	u32 gpio_direction;
++
++	bool fast_xfer_requires_i2c_lock;
++	struct gpio_descs *fast_xfer_gpios;
++	u32 fast_xfer_recv_gpio_base;
++	u8 fast_xfer_data_index;
++	u8 fast_xfer_clock_index;
++	void __iomem *gpio_base;
++	void __iomem *rio_base;
++
++	bool bypass_cache;
++
++	u8 buffer[2 + HALF_BUFFER];
++	u8 manifest_prep[(MANIFEST_HEADER_UNITS + MANIFEST_DATA_UNITS) *
++			 MANIFEST_UNIT_SIZE];
++};
++
++static int rp2040_gbdg_gpio_dir_in(struct gpio_chip *gc, unsigned int offset);
++static void rp2040_gbdg_gpio_set(struct gpio_chip *gc, unsigned int offset,
++				 int value);
++static int rp2040_gbdg_fast_xfer(struct rp2040_gbdg *priv_data, const u8 *data,
++				 size_t len);
++
++static int rp2040_gbdg_rp1_calc_offsets(u8 gpio, size_t *bank_offset,
++					u8 *shift_offset)
++{
++	if (!bank_offset || !shift_offset || gpio >= 54)
++		return -EINVAL;
++	if (gpio < 28) {
++		*bank_offset = 0x0000;
++		*shift_offset = gpio;
++	} else if (gpio < 34) {
++		*bank_offset = 0x4000;
++		*shift_offset = gpio - 28;
++	} else {
++		*bank_offset = 0x8000;
++		*shift_offset = gpio - 34;
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_calc_mux_offset(u8 gpio, size_t *offset)
++{
++	size_t bank_offset;
++	u8 shift_offset;
++	int ret;
++
++	ret = rp2040_gbdg_rp1_calc_offsets(gpio, &bank_offset, &shift_offset);
++	if (ret)
++		return ret;
++	*offset = bank_offset + shift_offset * 8 + 0x4;
++
++	return 0;
++}
++
++static int rp2040_gbdg_rp1_read_mux(struct rp2040_gbdg *priv_data, u8 gpio,
++				    u32 *data)
++{
++	size_t offset;
++	int ret;
++
++	ret = rp2040_gbdg_calc_mux_offset(gpio, &offset);
++	if (ret)
++		return ret;
++
++	*data = readl(priv_data->gpio_base + offset);
++
++	return 0;
++}
++
++static int rp2040_gbdg_rp1_write_mux(struct rp2040_gbdg *priv_data, u8 gpio,
++				     u32 val)
++{
++	size_t offset;
++	int ret;
++
++	ret = rp2040_gbdg_calc_mux_offset(gpio, &offset);
++	if (ret)
++		return ret;
++
++	writel(val, priv_data->gpio_base + offset);
++
++	return 0;
++}
++
++static size_t rp2040_gbdg_max_transfer_size(struct spi_device *spi)
++{
++	return MAX_TRANSFER_SIZE;
++}
++
++static int rp2040_gbdg_get_device_info(struct i2c_client *client,
++				       struct rp2040_gbdg_device_info *info)
++{
++	u8 buf[TOTAL_RD_HDR_SIZE];
++	u8 retries = I2C_RETRIES;
++	u8 *read_pos = buf;
++	size_t field_size;
++	int ret;
++
++	do {
++		ret = i2c_master_recv(client, buf, sizeof(buf));
++		if (!retries--)
++			break;
++	} while (ret == -ETIMEDOUT);
++
++	if (ret != sizeof(buf))
++		return ret < 0 ? ret : -EIO;
++
++	field_size = sizeof_field(struct rp2040_gbdg_device_info, status);
++	memcpy(&info->status, read_pos, field_size);
++	read_pos += field_size;
++
++	field_size = sizeof_field(struct rp2040_gbdg_device_info, md5);
++	memcpy(&info->md5, read_pos, field_size);
++	read_pos += field_size;
++
++	field_size = sizeof_field(struct rp2040_gbdg_device_info, version);
++	memcpy(&info->version, read_pos, field_size);
++	read_pos += field_size;
++
++	field_size = sizeof_field(struct rp2040_gbdg_device_info, id);
++	memcpy(&info->id, read_pos, field_size);
++
++	return 0;
++}
++
++static int rp2040_gbdg_poll_device_info(struct i2c_client *client,
++					struct rp2040_gbdg_device_info *info)
++{
++	struct rp2040_gbdg_device_info itnl;
++	int ret;
++
++	itnl.status = STATUS_BUSY;
++
++	while (itnl.status & STATUS_BUSY) {
++		ret = rp2040_gbdg_get_device_info(client, &itnl);
++		if (ret)
++			return ret;
++	}
++	memcpy(info, &itnl, sizeof(itnl));
++
++	return 0;
++}
++
++static int rp2040_gbdg_get_buffer_hash(struct i2c_client *client, u8 *md5)
++{
++	struct rp2040_gbdg_device_info info;
++	int ret;
++
++	ret = rp2040_gbdg_poll_device_info(client, &info);
++	if (ret)
++		return ret;
++
++	memcpy(md5, info.md5, MD5_DIGEST_SIZE);
++
++	return 0;
++}
++
++static int rp2040_gbdg_wait_until_free(struct i2c_client *client, u8 *status)
++{
++	struct rp2040_gbdg_device_info info;
++	int ret;
++
++	ret = rp2040_gbdg_poll_device_info(client, &info);
++	if (ret)
++		return ret;
++
++	if (status)
++		*status = info.status;
++
++	return 0;
++}
++
++static int rp2040_gbdg_i2c_send(struct i2c_client *client, const u8 *buf,
++				size_t len)
++{
++	u8 retries = I2C_RETRIES;
++	int ret;
++
++	ret = rp2040_gbdg_wait_until_free(client, NULL);
++	if (ret) {
++		dev_err(&client->dev,
++			"%s() rp2040_gbdg_wait_until_free failed\n", __func__);
++		return ret;
++	}
++
++	do {
++		ret = i2c_master_send(client, buf, len);
++		if (!retries--)
++			break;
++	} while (ret == -ETIMEDOUT);
++
++	if (ret != len) {
++		dev_err(&client->dev, "%s() i2c_master_send returned %d\n",
++			__func__, ret);
++		return ret < 0 ? ret : -EIO;
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_10byte_cmd(struct i2c_client *client, u8 cmd, u32 addr,
++				  u32 len)
++{
++	u8 buffer[10];
++
++	buffer[0] = FIXED_SIZE_CMD_PREFIX;
++	buffer[1] = cmd;
++	memcpy(&buffer[2], &addr, sizeof(addr));
++	memcpy(&buffer[6], &len, sizeof(len));
++
++	return rp2040_gbdg_i2c_send(client, buffer, sizeof(buffer));
++}
++
++static int rp2040_gbdg_18byte_cmd(struct i2c_client *client, u8 cmd,
++				  const u8 *digest)
++{
++	u8 buffer[18];
++
++	buffer[0] = FIXED_SIZE_CMD_PREFIX;
++	buffer[1] = cmd;
++	memcpy(&buffer[2], digest, MD5_DIGEST_SIZE);
++
++	return rp2040_gbdg_i2c_send(client, buffer, sizeof(buffer));
++}
++
++static int rp2040_gbdg_block_hash(struct rp2040_gbdg *priv_data, const u8 *data,
++				  size_t len, u8 *out)
++{
++	size_t remaining = RP2040_GBDG_BLOCK_SIZE;
++	size_t pad;
++	int ret;
++
++	static const u8 padding[64] = {
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF,
++	};
++
++	if (len > RP2040_GBDG_BLOCK_SIZE) {
++		return -EMSGSIZE;
++	} else if (len == RP2040_GBDG_BLOCK_SIZE) {
++		return crypto_shash_digest(priv_data->shash_desc, data, len,
++					   out);
++	} else {
++		ret = crypto_shash_init(priv_data->shash_desc);
++		if (ret)
++			return ret;
++
++		ret = crypto_shash_update(priv_data->shash_desc, data, len);
++		if (ret)
++			return ret;
++		remaining -= len;
++
++		/* Pad up-to a 64-byte boundary, unless that takes us over. */
++		pad = round_up(len, 64);
++		if (pad != len && pad < RP2040_GBDG_BLOCK_SIZE) {
++			ret = crypto_shash_update(priv_data->shash_desc,
++						  padding, pad - len);
++			if (ret)
++				return ret;
++			remaining -= (pad - len);
++		}
++
++		/* Pad up-to RP2040_GBDG_BLOCK_SIZE in, preferably, 64-byte chunks */
++		while (remaining) {
++			pad = min_t(size_t, remaining, (size_t)64U);
++			ret = crypto_shash_update(priv_data->shash_desc,
++						  padding, pad);
++			if (ret)
++				return ret;
++			remaining -= pad;
++		}
++		return crypto_shash_final(priv_data->shash_desc, out);
++	}
++}
++
++static int rp2040_gbdg_set_remote_buffer_fast(struct rp2040_gbdg *priv_data,
++					      const u8 *data, unsigned int len)
++{
++	struct i2c_client *client = priv_data->client;
++	int ret;
++
++	if (len > RP2040_GBDG_BLOCK_SIZE)
++		return -EMSGSIZE;
++	if (!priv_data->fast_xfer_gpios)
++		return -EIO;
++
++	ret = rp2040_gbdg_10byte_cmd(client, CMD_DAT_RECV,
++				     priv_data->fast_xfer_recv_gpio_base, len);
++	if (ret) {
++		dev_err(&client->dev, "%s() failed to enter fast data mode\n",
++			__func__);
++		return ret;
++	}
++
++	return rp2040_gbdg_fast_xfer(priv_data, data, len);
++}
++
++static int rp2040_gbdg_set_remote_buffer_i2c(struct rp2040_gbdg *priv_data,
++					     const u8 *data, unsigned int len)
++{
++	struct i2c_client *client = priv_data->client;
++	unsigned int write_len;
++	int ret;
++
++	if (len > RP2040_GBDG_BLOCK_SIZE)
++		return -EMSGSIZE;
++
++	priv_data->buffer[0] = WRITE_DATA_PREFIX;
++	write_len = min(len, HALF_BUFFER);
++	memcpy(&priv_data->buffer[1], data, write_len);
++
++	ret = rp2040_gbdg_i2c_send(client, priv_data->buffer, write_len + 1);
++	if (ret)
++		return ret;
++
++	len -= write_len;
++	data += write_len;
++
++	if (!len)
++		return 0;
++
++	priv_data->buffer[0] = WRITE_DATA_UPPER_PREFIX;
++	memcpy(&priv_data->buffer[1], data, len);
++	ret = rp2040_gbdg_i2c_send(client, priv_data->buffer, len + 1);
++
++	return ret;
++}
++
++static int rp2040_gbdg_set_remote_buffer(struct rp2040_gbdg *priv_data,
++					 const u8 *data, unsigned int len)
++{
++	if (priv_data->fast_xfer_gpios)
++		return rp2040_gbdg_set_remote_buffer_fast(priv_data, data, len);
++	else
++		return rp2040_gbdg_set_remote_buffer_i2c(priv_data, data, len);
++}
++
++/* Loads data by checksum if available or resorts to sending byte-by-byte */
++static int rp2040_gbdg_load_block_remote(struct rp2040_gbdg *priv_data,
++					 const void *data, unsigned int len,
++					 u8 *digest, bool persist)
++{
++	u8 ascii_digest[MD5_DIGEST_SIZE * 2 + 1] = { 0 };
++	struct i2c_client *client = priv_data->client;
++	u8 remote_digest[MD5_DIGEST_SIZE];
++	u8 local_digest[MD5_DIGEST_SIZE];
++	int ret;
++
++	if (len > RP2040_GBDG_BLOCK_SIZE)
++		return -EMSGSIZE;
++
++	ret = rp2040_gbdg_block_hash(priv_data, data, len, local_digest);
++	if (ret)
++		return ret;
++
++	if (digest)
++		memcpy(digest, local_digest, MD5_DIGEST_SIZE);
++
++	/* Check if the RP2040 has the data already */
++	ret = rp2040_gbdg_18byte_cmd(client, CMD_READ_CSUM, local_digest);
++	if (ret)
++		return ret;
++
++	ret = rp2040_gbdg_get_buffer_hash(client, remote_digest);
++	if (ret)
++		return ret;
++
++	if (memcmp(local_digest, remote_digest, MD5_DIGEST_SIZE)) {
++		bin2hex(ascii_digest, local_digest, MD5_DIGEST_SIZE);
++		dev_info(&client->dev, "%s() device missing data: %s\n",
++			 __func__, ascii_digest);
++		/*
++		 * N.B. We're fine to send (the potentially shorter) transfer->len
++		 * number of bytes here as the RP2040 will pad with 0xFF up to buffer
++		 * size once we stop sending.
++		 */
++		ret = rp2040_gbdg_set_remote_buffer(priv_data, data, len);
++		if (ret)
++			return ret;
++
++		/* Make sure the data actually arrived. */
++		ret = rp2040_gbdg_get_buffer_hash(client, remote_digest);
++		if (memcmp(local_digest, remote_digest, MD5_DIGEST_SIZE)) {
++			dev_err(&priv_data->client->dev,
++				"%s() unable to send data to device\n",
++				__func__);
++			return -EREMOTEIO;
++		}
++
++		if (persist) {
++			dev_info(&client->dev,
++				 "%s() sent missing data to device, saving\n",
++				 __func__);
++			ret = rp2040_gbdg_10byte_cmd(client, CMD_SAVE_CACHE, 0,
++						     0);
++			if (ret)
++				return ret;
++		}
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_transfer_block(struct rp2040_gbdg *priv_data,
++				      const void *data, unsigned int len)
++{
++	struct i2c_client *client = priv_data->client;
++	int ret;
++
++	if (len > RP2040_GBDG_BLOCK_SIZE)
++		return -EMSGSIZE;
++
++	ret = rp2040_gbdg_load_block_remote(priv_data, data, len, NULL, true);
++	if (ret)
++		return ret;
++
++	/* Remote rambuffer now has correct contents, send it */
++	ret = rp2040_gbdg_10byte_cmd(client, CMD_SEND_RB, 0, len);
++	if (ret)
++		return ret;
++
++	/*
++	 * Wait for data to have actually completed sending as we may be de-asserting CS too quickly
++	 * otherwise.
++	 */
++	ret = rp2040_gbdg_wait_until_free(client, NULL);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
++static int rp2040_gbdg_transfer_manifest(struct rp2040_gbdg *priv_data,
++					 const u8 *data, unsigned int len)
++{
++	struct i2c_client *client = priv_data->client;
++	static const char magic[] = "DATA_MANFST";
++	unsigned int remaining = len;
++	const u32 data_length = len;
++	u8 digest[MD5_DIGEST_SIZE];
++	u8 *digest_write_pos;
++	u8 status;
++	int ret;
++
++	memcpy(priv_data->manifest_prep, magic, sizeof(magic));
++	memcpy(priv_data->manifest_prep + sizeof(magic), &data_length,
++	       sizeof(data_length));
++	digest_write_pos =
++		priv_data->manifest_prep + sizeof(magic) + sizeof(data_length);
++
++	while (remaining) {
++		unsigned int size = min(remaining, RP2040_GBDG_BLOCK_SIZE);
++
++		ret = rp2040_gbdg_block_hash(priv_data, data, size,
++					     digest_write_pos);
++		if (ret)
++			return ret;
++
++		remaining -= size;
++		data += size;
++		digest_write_pos += MD5_DIGEST_SIZE;
++	}
++
++	ret = rp2040_gbdg_load_block_remote(
++		priv_data, priv_data->manifest_prep,
++		digest_write_pos - priv_data->manifest_prep, digest, true);
++	if (ret)
++		return ret;
++
++	dev_info(&client->dev, "%s() issue CMD_SEND_MANI\n", __func__);
++	ret = rp2040_gbdg_18byte_cmd(client, CMD_SEND_MANI, digest);
++	if (ret)
++		return ret;
++
++	ret = rp2040_gbdg_wait_until_free(client, &status);
++	if (ret)
++		return ret;
++
++	dev_info(&client->dev, "%s() SEND_MANI response: %02x\n", __func__,
++		 status);
++
++	return status;
++}
++
++/* Precondition: correctly initialised fast_xfer_*, gpio_base, rio_base */
++static int rp2040_gbdg_fast_xfer(struct rp2040_gbdg *priv_data, const u8 *data,
++				 size_t len)
++{
++	struct i2c_client *client = priv_data->client;
++	void __iomem *clock_toggle;
++	void __iomem *data_set;
++	size_t clock_bank;
++	size_t data_bank;
++	u8 clock_offset;
++	u8 data_offset;
++	u32 clock_mux;
++	u32 data_mux;
++
++	if (priv_data->fast_xfer_requires_i2c_lock)
++		i2c_lock_bus(client->adapter, I2C_LOCK_ROOT_ADAPTER);
++
++	rp2040_gbdg_rp1_read_mux(priv_data, priv_data->fast_xfer_data_index,
++				 &data_mux);
++	rp2040_gbdg_rp1_read_mux(priv_data, priv_data->fast_xfer_clock_index,
++				 &clock_mux);
++
++	gpiod_direction_output(priv_data->fast_xfer_gpios->desc[0], 1);
++	gpiod_direction_output(priv_data->fast_xfer_gpios->desc[1], 0);
++
++	rp2040_gbdg_rp1_calc_offsets(priv_data->fast_xfer_data_index,
++				     &data_bank, &data_offset);
++	rp2040_gbdg_rp1_calc_offsets(priv_data->fast_xfer_clock_index,
++				     &clock_bank, &clock_offset);
++
++	data_set = priv_data->rio_base + data_bank + 0x2000; /* SET offset */
++	clock_toggle =
++		priv_data->rio_base + clock_bank + 0x1000; /* XOR offset */
++
++	while (len--) {
++		/* MSB first ordering */
++		u32 d = ~(*data++) << 4U;
++		/*
++		 * Clock out each bit of data, LSB first
++		 * (DDR, achieves approx 5 Mbps)
++		 */
++		for (size_t i = 0; i < 8; i++) {
++			/* Branchless set/clr data */
++			writel(1 << data_offset,
++			       data_set + ((d <<= 1) & 0x1000) /* CLR offset */
++			);
++
++			/* Toggle the clock */
++			writel(1 << clock_offset, clock_toggle);
++		}
++	}
++
++	rp2040_gbdg_rp1_write_mux(priv_data, priv_data->fast_xfer_data_index,
++				  data_mux);
++	rp2040_gbdg_rp1_write_mux(priv_data, priv_data->fast_xfer_clock_index,
++				  clock_mux);
++
++	if (priv_data->fast_xfer_requires_i2c_lock)
++		i2c_unlock_bus(client->adapter, I2C_LOCK_ROOT_ADAPTER);
++
++	return 0;
++}
++
++static int rp2040_gbdg_transfer_bypass(struct rp2040_gbdg *priv_data,
++				       const u8 *data, unsigned int length)
++{
++	int ret;
++	u8 *buf;
++
++	if (priv_data->fast_xfer_gpios) {
++		ret = rp2040_gbdg_10byte_cmd(
++			priv_data->client, CMD_DAT_EMIT,
++			priv_data->fast_xfer_recv_gpio_base, length);
++		return ret ? ret :
++			     rp2040_gbdg_fast_xfer(priv_data, data, length);
++	}
++
++	buf = priv_data->buffer;
++
++	while (length) {
++		unsigned int xfer = min(length, HALF_BUFFER);
++
++		buf[0] = DIRECT_PREFIX;
++		buf[1] = DIRECT_CMD_EMIT;
++		memcpy(&buf[2], data, xfer);
++		ret = rp2040_gbdg_i2c_send(priv_data->client, buf, xfer + 2);
++		if (ret)
++			return ret;
++		length -= xfer;
++		data += xfer;
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_transfer_cached(struct rp2040_gbdg *priv_data,
++				       const u8 *data, unsigned int length)
++{
++	int ret;
++
++	/*
++	 * Caching mechanism divides data into '8KiB - 9' (8183 byte)
++	 * 'RP2040_GBDG_BLOCK_SIZE' blocks.
++	 *
++	 * If there's a large amount of data to send, instead, attempt to make use
++	 * of a manifest.
++	 */
++	if (length > (2 * RP2040_GBDG_BLOCK_SIZE)) {
++		if (!rp2040_gbdg_transfer_manifest(priv_data, data, length))
++			return 0;
++	}
++
++	while (length) {
++		unsigned int xfer = min(length, RP2040_GBDG_BLOCK_SIZE);
++
++		ret = rp2040_gbdg_transfer_block(priv_data, data, xfer);
++		if (ret)
++			return ret;
++		length -= xfer;
++		data += xfer;
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_transfer_one(struct spi_controller *ctlr,
++				    struct spi_device *spi,
++				    struct spi_transfer *transfer)
++{
++	/* All transfers are performed in a synchronous manner. As such, return '0'
++	 * on success or -ve on failure. (Returning +ve indicates async xfer)
++	 */
++
++	struct rp2040_gbdg *priv_data = spi_controller_get_devdata(ctlr);
++
++	if (priv_data->bypass_cache) {
++		return rp2040_gbdg_transfer_bypass(priv_data, transfer->tx_buf,
++						   transfer->len);
++	} else {
++		return rp2040_gbdg_transfer_cached(priv_data, transfer->tx_buf,
++						   transfer->len);
++	}
++}
++
++static void rp2040_gbdg_set_cs(struct spi_device *spi, bool enable)
++{
++	static const char disable_cs[] = { DIRECT_PREFIX, DIRECT_CMD_CS, 0x00 };
++	static const char enable_cs[] = { DIRECT_PREFIX, DIRECT_CMD_CS, 0x10 };
++	struct rp2040_gbdg *p_data;
++
++	p_data = spi_controller_get_devdata(spi->controller);
++
++	/*
++	 * 'enable' is inverted and instead describes the logic level of an
++	 * active-low CS.
++	 */
++	rp2040_gbdg_i2c_send(p_data->client, enable ? disable_cs : enable_cs,
++			     3);
++}
++
++static int rp2040_gbdg_gpio_request(struct gpio_chip *gc, unsigned int offset)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++	u32 pattern;
++	int ret;
++
++	if (offset >= NUM_GPIO)
++		return -EINVAL;
++
++	pattern = (1 << (offset + 8));
++	if (pattern & priv_data->gpio_requested)
++		return -EBUSY;
++
++	/* Resume if previously no gpio requested */
++	if (!priv_data->gpio_requested) {
++		ret = pm_runtime_resume_and_get(&priv_data->client->dev);
++		if (ret) {
++			dev_err(&priv_data->client->dev,
++				"%s(%u) unable to resume\n", __func__, offset);
++			return ret;
++		}
++	}
++
++	priv_data->gpio_requested |= pattern;
++
++	return 0;
++}
++
++static void rp2040_gbdg_gpio_free(struct gpio_chip *gc, unsigned int offset)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++	u32 pattern;
++	int ret;
++
++	if (offset >= NUM_GPIO || !priv_data->gpio_requested)
++		return;
++
++	pattern = (1 << (offset + 8));
++
++	priv_data->gpio_requested &= ~pattern;
++	rp2040_gbdg_gpio_dir_in(gc, offset);
++	rp2040_gbdg_gpio_set(gc, offset, 0);
++
++	if (!priv_data->gpio_requested) {
++		ret = pm_runtime_put_autosuspend(&priv_data->client->dev);
++		if (ret) {
++			dev_err(&priv_data->client->dev,
++				"%s(%u) unable to put_autosuspend\n", __func__,
++				offset);
++		}
++	}
++}
++
++static int rp2040_gbdg_gpio_get_direction(struct gpio_chip *gc,
++					  unsigned int offset)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++
++	if (offset >= NUM_GPIO)
++		return -EINVAL;
++
++	return (priv_data->gpio_direction & (1 << (offset + 8))) ?
++		       GPIO_LINE_DIRECTION_IN :
++		       GPIO_LINE_DIRECTION_OUT;
++}
++
++static int rp2040_gbdg_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++	struct i2c_client *client = priv_data->client;
++
++	if (offset >= NUM_GPIO)
++		return -EINVAL;
++
++	priv_data->gpio_direction |= (1 << (offset + 8));
++
++	return rp2040_gbdg_10byte_cmd(client, CMD_GPIO_OE,
++				      ~priv_data->gpio_direction,
++				      priv_data->gpio_direction);
++}
++
++static int rp2040_gbdg_gpio_dir_out(struct gpio_chip *gc, unsigned int offset,
++				    int value)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++	struct i2c_client *client = priv_data->client;
++	u32 pattern;
++	int ret;
++
++	if (offset >= NUM_GPIO)
++		return -EINVAL;
++
++	pattern = (1 << (offset + 8));
++
++	ret = rp2040_gbdg_10byte_cmd(client, CMD_GPIO_ST_CL,
++				     value ? pattern : 0, !value ? pattern : 0);
++	if (ret) {
++		dev_err(&client->dev, "%s(%u, %d) could not ST_CL\n", __func__,
++			offset, value);
++		return ret;
++	}
++
++	priv_data->gpio_direction &= ~pattern;
++	ret = rp2040_gbdg_10byte_cmd(client, CMD_GPIO_OE,
++				     ~priv_data->gpio_direction,
++				     priv_data->gpio_direction);
++
++	return ret;
++}
++
++static int rp2040_gbdg_gpio_get(struct gpio_chip *gc, unsigned int offset)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++	struct i2c_client *client = priv_data->client;
++	struct rp2040_gbdg_device_info info;
++	int ret;
++
++	if (offset >= NUM_GPIO)
++		return -EINVAL;
++
++	ret = rp2040_gbdg_get_device_info(client, &info);
++	if (ret)
++		return ret;
++
++	return info.status & (1 << (offset + 8)) ? 1 : 0;
++}
++
++static void rp2040_gbdg_gpio_set(struct gpio_chip *gc, unsigned int offset,
++				 int value)
++{
++	struct rp2040_gbdg *priv_data = gpiochip_get_data(gc);
++	struct i2c_client *client = priv_data->client;
++	u32 pattern;
++
++	if (offset >= NUM_GPIO)
++		return;
++
++	pattern = (1 << (offset + 8));
++	rp2040_gbdg_10byte_cmd(client, CMD_GPIO_ST_CL, value ? pattern : 0,
++			       !value ? pattern : 0);
++}
++
++static int rp2040_gbdg_get_regulator(struct device *dev,
++				     struct rp2040_gbdg *rp2040_gbdg)
++{
++	struct regulator *reg = devm_regulator_get(dev, "power");
++
++	if (IS_ERR(reg))
++		return PTR_ERR(reg);
++
++	rp2040_gbdg->regulator = reg;
++
++	return 0;
++}
++
++static void rp2040_gbdg_parse_dt(struct rp2040_gbdg *rp2040_gbdg)
++{
++	struct i2c_client *client = rp2040_gbdg->client;
++	struct of_phandle_args of_args[2] = { 0 };
++	struct device *dev = &client->dev;
++	struct device_node *dn;
++
++	rp2040_gbdg->bypass_cache =
++		of_property_read_bool(client->dev.of_node, "bypass-cache");
++
++	/* Optionally configure fast_xfer if RP1 is being used */
++	if (of_parse_phandle_with_args(client->dev.of_node, "fast_xfer-gpios",
++				       "#gpio-cells", 0, &of_args[0]) ||
++	    of_parse_phandle_with_args(client->dev.of_node, "fast_xfer-gpios",
++				       "#gpio-cells", 1, &of_args[1])) {
++		dev_info(dev, "Could not parse fast_xfer-gpios phandles\n");
++		goto node_put;
++	}
++
++	if (of_args[0].np != of_args[1].np) {
++		dev_info(
++			dev,
++			"fast_xfer-gpios are not provided by the same controller\n");
++		goto node_put;
++	}
++	dn = of_args[0].np;
++	if (!of_device_is_compatible(dn, "raspberrypi,rp1-gpio")) {
++		dev_info(dev, "fast_xfer-gpios controller is not an rp1\n");
++		goto node_put;
++	}
++	if (of_args[0].args_count != 2 || of_args[1].args_count != 2) {
++		dev_info(dev, "of_args count is %d\n", of_args[0].args_count);
++		goto node_put;
++	}
++
++	if (of_property_read_u32_index(
++		    client->dev.of_node, "fast_xfer_recv_gpio_base", 0,
++		    &rp2040_gbdg->fast_xfer_recv_gpio_base)) {
++		dev_info(dev, "Could not read fast_xfer_recv_gpio_base\n");
++		goto node_put;
++	}
++
++	rp2040_gbdg->fast_xfer_gpios =
++		devm_gpiod_get_array_optional(dev, "fast_xfer", GPIOD_ASIS);
++	if (!rp2040_gbdg->fast_xfer_gpios) {
++		dev_info(dev, "Could not acquire fast_xfer-gpios\n");
++		goto node_put;
++	}
++
++	rp2040_gbdg->fast_xfer_data_index = of_args[0].args[0];
++	rp2040_gbdg->fast_xfer_clock_index = of_args[1].args[0];
++	rp2040_gbdg->fast_xfer_requires_i2c_lock = of_property_read_bool(
++		client->dev.of_node, "fast_xfer_requires_i2c_lock");
++
++	rp2040_gbdg->gpio_base = of_iomap(dn, 0);
++	if (IS_ERR_OR_NULL(rp2040_gbdg->gpio_base)) {
++		dev_info(&client->dev, "%s() unable to map gpio_base\n",
++			 __func__);
++		rp2040_gbdg->gpio_base = NULL;
++		devm_gpiod_put_array(dev, rp2040_gbdg->fast_xfer_gpios);
++		rp2040_gbdg->fast_xfer_gpios = NULL;
++		goto node_put;
++	}
++
++	rp2040_gbdg->rio_base = of_iomap(dn, 1);
++	if (IS_ERR_OR_NULL(rp2040_gbdg->rio_base)) {
++		dev_info(&client->dev, "%s() unable to map rio_base\n",
++			 __func__);
++		rp2040_gbdg->rio_base = NULL;
++		iounmap(rp2040_gbdg->gpio_base);
++		rp2040_gbdg->gpio_base = NULL;
++		devm_gpiod_put_array(dev, rp2040_gbdg->fast_xfer_gpios);
++		rp2040_gbdg->fast_xfer_gpios = NULL;
++		goto node_put;
++	}
++
++node_put:
++	if (of_args[0].np)
++		of_node_put(of_args[0].np);
++	if (of_args[1].np)
++		of_node_put(of_args[1].np);
++}
++
++static int rp2040_gbdg_power_off(struct rp2040_gbdg *rp2040_gbdg)
++{
++	struct device *dev = &rp2040_gbdg->client->dev;
++	int ret;
++
++	ret = regulator_disable(rp2040_gbdg->regulator);
++	if (ret) {
++		dev_err(dev, "%s: Could not disable regulator\n", __func__);
++		return ret;
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_power_on(struct rp2040_gbdg *rp2040_gbdg)
++{
++	struct device *dev = &rp2040_gbdg->client->dev;
++	int ret;
++
++	ret = regulator_enable(rp2040_gbdg->regulator);
++	if (ret) {
++		dev_err(dev, "%s: Could not enable regulator\n", __func__);
++		return ret;
++	}
++
++	return 0;
++}
++
++static int rp2040_gbdg_probe(struct i2c_client *client)
++{
++	struct rp2040_gbdg_device_info info;
++	struct spi_controller *controller;
++	struct device *dev = &client->dev;
++	struct rp2040_gbdg *rp2040_gbdg;
++	struct device_node *np;
++	int ret;
++
++	np = dev->of_node;
++
++	controller = devm_spi_alloc_master(dev, sizeof(struct rp2040_gbdg));
++	if (!controller)
++		return dev_err_probe(dev, ENOMEM,
++				     "could not alloc spi controller\n");
++
++	rp2040_gbdg = spi_controller_get_devdata(controller);
++	i2c_set_clientdata(client, rp2040_gbdg);
++	rp2040_gbdg->controller = controller;
++	rp2040_gbdg->client = client;
++
++	ret = rp2040_gbdg_get_regulator(dev, rp2040_gbdg);
++	if (ret < 0)
++		return dev_err_probe(dev, ret, "Cannot get regulator\n");
++
++	ret = rp2040_gbdg_power_on(rp2040_gbdg);
++	if (ret)
++		return dev_err_probe(dev, ret, "Could not power on device\n");
++
++	pm_runtime_set_active(dev);
++	pm_runtime_get_noresume(dev);
++	pm_runtime_enable(dev);
++	pm_runtime_set_autosuspend_delay(dev, 1000);
++	pm_runtime_use_autosuspend(dev);
++
++	ret = rp2040_gbdg_get_device_info(client, &info);
++	if (ret) {
++		dev_err(dev, "Could not get device info\n");
++		goto err_pm;
++	}
++
++	dev_info(dev, "%s() found dev ID: %llx, fw ver. %u\n", __func__,
++		 info.id, info.version);
++
++	rp2040_gbdg->shash = crypto_alloc_shash("md5", 0, 0);
++	if (IS_ERR(rp2040_gbdg->shash)) {
++		ret = PTR_ERR(rp2040_gbdg->shash);
++		dev_err(dev, "Could not allocate shash\n");
++		goto err_pm;
++	}
++
++	if (crypto_shash_digestsize(rp2040_gbdg->shash) != MD5_DIGEST_SIZE) {
++		ret = -EINVAL;
++		dev_err(dev, "error: Unexpected hash digest size\n");
++		goto err_shash;
++	}
++
++	rp2040_gbdg->shash_desc =
++		devm_kmalloc(dev,
++			     sizeof(struct shash_desc) +
++				     crypto_shash_descsize(rp2040_gbdg->shash),
++			     0);
++
++	if (!rp2040_gbdg->shash_desc) {
++		ret = -ENOMEM;
++		dev_err(dev,
++			"error: Could not allocate memory for shash_desc\n");
++		goto err_shash;
++	}
++	rp2040_gbdg->shash_desc->tfm = rp2040_gbdg->shash;
++
++	controller->bus_num = -1;
++	controller->num_chipselect = 1;
++	controller->mode_bits = SPI_CPOL | SPI_CPHA;
++	controller->bits_per_word_mask = SPI_BPW_MASK(8);
++	controller->min_speed_hz = 35000000;
++	controller->max_speed_hz = 35000000;
++	controller->max_transfer_size = rp2040_gbdg_max_transfer_size;
++	controller->max_message_size = rp2040_gbdg_max_transfer_size;
++	controller->transfer_one = rp2040_gbdg_transfer_one;
++	controller->set_cs = rp2040_gbdg_set_cs;
++
++	controller->dev.of_node = np;
++	controller->auto_runtime_pm = true;
++
++	ret = devm_spi_register_controller(dev, controller);
++	if (ret) {
++		dev_err(dev, "error: Could not register SPI controller\n");
++		goto err_shash;
++	}
++
++	memset(&rp2040_gbdg->gc, 0, sizeof(struct gpio_chip));
++	rp2040_gbdg->gc.parent = dev;
++	rp2040_gbdg->gc.label = MODULE_NAME;
++	rp2040_gbdg->gc.owner = THIS_MODULE;
++	rp2040_gbdg->gc.base = -1;
++	rp2040_gbdg->gc.ngpio = NUM_GPIO;
++
++	rp2040_gbdg->gc.request = rp2040_gbdg_gpio_request;
++	rp2040_gbdg->gc.free = rp2040_gbdg_gpio_free;
++	rp2040_gbdg->gc.get_direction = rp2040_gbdg_gpio_get_direction;
++	rp2040_gbdg->gc.direction_input = rp2040_gbdg_gpio_dir_in;
++	rp2040_gbdg->gc.direction_output = rp2040_gbdg_gpio_dir_out;
++	rp2040_gbdg->gc.get = rp2040_gbdg_gpio_get;
++	rp2040_gbdg->gc.set = rp2040_gbdg_gpio_set;
++	rp2040_gbdg->gc.can_sleep = true;
++
++	rp2040_gbdg->gpio_requested = 0;
++
++	/* Coming out of reset, all GPIOs are inputs */
++	rp2040_gbdg->gpio_direction = ~0;
++
++	ret = devm_gpiochip_add_data(dev, &rp2040_gbdg->gc, rp2040_gbdg);
++	if (ret) {
++		dev_err(dev, "error: Could not add data to gpiochip\n");
++		goto err_shash;
++	}
++
++	rp2040_gbdg_parse_dt(rp2040_gbdg);
++
++	pm_runtime_mark_last_busy(dev);
++	pm_runtime_put_autosuspend(dev);
++
++	return 0;
++
++err_shash:
++	crypto_free_shash(rp2040_gbdg->shash);
++err_pm:
++	pm_runtime_disable(dev);
++	pm_runtime_put_noidle(dev);
++	rp2040_gbdg_power_off(rp2040_gbdg);
++
++	return ret;
++}
++
++static void rp2040_gbdg_remove(struct i2c_client *client)
++{
++	struct rp2040_gbdg *priv_data = i2c_get_clientdata(client);
++
++	crypto_free_shash(priv_data->shash);
++
++	if (priv_data->gpio_base) {
++		iounmap(priv_data->gpio_base);
++		priv_data->gpio_base = NULL;
++	}
++	if (priv_data->rio_base) {
++		iounmap(priv_data->rio_base);
++		priv_data->rio_base = NULL;
++	}
++
++	pm_runtime_disable(&client->dev);
++	if (!pm_runtime_status_suspended(&client->dev))
++		rp2040_gbdg_power_off(priv_data);
++	pm_runtime_set_suspended(&client->dev);
++}
++
++static const struct i2c_device_id rp2040_gbdg_id[] = {
++	{ "rp2040-gpio-bridge", 0 },
++	{},
++};
++MODULE_DEVICE_TABLE(i2c, rp2040_gbdg_id);
++
++static const struct of_device_id rp2040_gbdg_of_match[] = {
++	{ .compatible = "raspberrypi,rp2040-gpio-bridge" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, rp2040_gbdg_of_match);
++
++static int rp2040_gbdg_runtime_suspend(struct device *dev)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++
++	return rp2040_gbdg_power_off(i2c_get_clientdata(client));
++}
++
++static int rp2040_gbdg_runtime_resume(struct device *dev)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++
++	return rp2040_gbdg_power_on(i2c_get_clientdata(client));
++}
++
++static const struct dev_pm_ops rp2040_gbdg_pm_ops = { SET_RUNTIME_PM_OPS(
++	rp2040_gbdg_runtime_suspend, rp2040_gbdg_runtime_resume, NULL) };
++
++static struct i2c_driver rp2040_gbdg_driver = {
++	.driver = {
++		.name = MODULE_NAME,
++		.of_match_table = of_match_ptr(rp2040_gbdg_of_match),
++		.pm = &rp2040_gbdg_pm_ops,
++	},
++	.probe = rp2040_gbdg_probe,
++	.remove = rp2040_gbdg_remove,
++	.id_table = rp2040_gbdg_id,
++};
++
++module_i2c_driver(rp2040_gbdg_driver);
++
++MODULE_AUTHOR("Richard Oliver <richard.oliver@raspberrypi.com>");
++MODULE_DESCRIPTION("Raspberry Pi RP2040 GPIO Bridge");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/bcm27xx/patches-6.6/950-1166-dmaengine-dw-axi-dmac-Honour-snps-block-size.patch b/target/linux/bcm27xx/patches-6.6/950-1166-dmaengine-dw-axi-dmac-Honour-snps-block-size.patch
new file mode 100644
index 0000000000..85b1cf6448
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1166-dmaengine-dw-axi-dmac-Honour-snps-block-size.patch
@@ -0,0 +1,52 @@
+From 475cddaba6b02584157e1c128a5a6858770a3d06 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 10 Jul 2024 14:47:17 +0100
+Subject: [PATCH 1166/1215] dmaengine: dw-axi-dmac: Honour snps,block-size
+
+The snps,block-size DT property declares the maximum block size for each
+channel of the dw-axi-dmac. However, the driver ignores these when
+setting max_seg_size and uses MAX_BLOCK_SIZE (4096) instead.
+
+To take advantage of the efficiencies of larger blocks, calculate the
+minimum block size across all channels and use that instead.
+
+See: https://github.com/raspberrypi/linux/issues/6256
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 15 ++++++++++++++-
+ 1 file changed, 14 insertions(+), 1 deletion(-)
+
+--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
++++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+@@ -1470,6 +1470,7 @@ static int dw_probe(struct platform_devi
+ 	struct dw_axi_dma *dw;
+ 	struct dw_axi_dma_hcfg *hdata;
+ 	struct reset_control *resets;
++	unsigned int max_seg_size;
+ 	unsigned int flags;
+ 	u32 i;
+ 	int ret;
+@@ -1585,9 +1586,21 @@ static int dw_probe(struct platform_devi
+ 	 * Synopsis DesignWare AxiDMA datasheet mentioned Maximum
+ 	 * supported blocks is 1024. Device register width is 4 bytes.
+ 	 * Therefore, set constraint to 1024 * 4.
++	 * However, if all channels specify a greater value, use that instead.
+ 	 */
++
+ 	dw->dma.dev->dma_parms = &dw->dma_parms;
+-	dma_set_max_seg_size(&pdev->dev, MAX_BLOCK_SIZE);
++	max_seg_size = UINT_MAX;
++	for (i = 0; i < dw->hdata->nr_channels; i++) {
++		unsigned int block_size = chip->dw->hdata->block_size[i];
++
++		if (!block_size)
++			block_size = MAX_BLOCK_SIZE;
++		max_seg_size = min(block_size, max_seg_size);
++	}
++
++	dma_set_max_seg_size(&pdev->dev, max_seg_size);
++
+ 	platform_set_drvdata(pdev, chip);
+ 
+ 	pm_runtime_enable(chip->dev);
diff --git a/target/linux/bcm27xx/patches-6.6/950-1167-mmc-restrict-posted-write-counts-for-SD-cards-in-CQ-.patch b/target/linux/bcm27xx/patches-6.6/950-1167-mmc-restrict-posted-write-counts-for-SD-cards-in-CQ-.patch
new file mode 100644
index 0000000000..2ba494958e
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1167-mmc-restrict-posted-write-counts-for-SD-cards-in-CQ-.patch
@@ -0,0 +1,157 @@
+From e6c1e862b2b8150a419f4208e5bd7749662b16a1 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Thu, 20 Jun 2024 14:31:20 +0100
+Subject: [PATCH 1167/1215] mmc: restrict posted write counts for SD cards in
+ CQ mode
+
+Command Queueing requires Write Cache and Power off Notification support
+from the card - but using the write cache forms a contract with the host
+whereby the card expects to be told about impending power-down.
+
+The implication is that (for performance) the card can do unsafe things
+with pending write data - including reordering what gets committed to
+nonvolatile storage at what time.
+
+Exposed SD slots and platforms powered by hotpluggable means (i.e.
+Raspberry Pis) can't guarantee that surprise removal won't happen.
+
+To limit the scope for cards to invent new ways to trash filesystems,
+limit pending writes to 1 (equivalent to the non-CQ behaviour).
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/mmc/core/block.c | 11 +++++++++--
+ drivers/mmc/core/mmc.c   |  1 +
+ drivers/mmc/core/queue.c |  9 +++++++++
+ drivers/mmc/core/queue.h |  1 +
+ drivers/mmc/core/sd.c    |  8 ++++++++
+ include/linux/mmc/card.h |  2 ++
+ 6 files changed, 30 insertions(+), 2 deletions(-)
+
+--- a/drivers/mmc/core/block.c
++++ b/drivers/mmc/core/block.c
+@@ -1555,6 +1555,8 @@ static void mmc_blk_cqe_complete_rq(stru
+ 
+ 	spin_lock_irqsave(&mq->lock, flags);
+ 
++	if (req_op(req) == REQ_OP_WRITE)
++		mq->pending_writes--;
+ 	mq->in_flight[issue_type] -= 1;
+ 
+ 	put_card = (mmc_tot_in_flight(mq) == 0);
+@@ -2071,6 +2073,8 @@ static void mmc_blk_mq_complete_rq(struc
+ 	struct mmc_queue_req *mqrq = req_to_mmc_queue_req(req);
+ 	unsigned int nr_bytes = mqrq->brq.data.bytes_xfered;
+ 
++	if (req_op(req) == REQ_OP_WRITE)
++		mq->pending_writes--;
+ 	if (nr_bytes) {
+ 		if (blk_update_request(req, BLK_STS_OK, nr_bytes))
+ 			blk_mq_requeue_request(req, true);
+@@ -2165,13 +2169,16 @@ static void mmc_blk_mq_poll_completion(s
+ 	mmc_blk_urgent_bkops(mq, mqrq);
+ }
+ 
+-static void mmc_blk_mq_dec_in_flight(struct mmc_queue *mq, enum mmc_issue_type issue_type)
++static void mmc_blk_mq_dec_in_flight(struct mmc_queue *mq, enum mmc_issue_type issue_type,
++				     struct request *req)
+ {
+ 	unsigned long flags;
+ 	bool put_card;
+ 
+ 	spin_lock_irqsave(&mq->lock, flags);
+ 
++	if (req_op(req) == REQ_OP_WRITE)
++		mq->pending_writes--;
+ 	mq->in_flight[issue_type] -= 1;
+ 
+ 	put_card = (mmc_tot_in_flight(mq) == 0);
+@@ -2205,7 +2212,7 @@ static void mmc_blk_mq_post_req(struct m
+ 			blk_mq_complete_request(req);
+ 	}
+ 
+-	mmc_blk_mq_dec_in_flight(mq, issue_type);
++	mmc_blk_mq_dec_in_flight(mq, issue_type, req);
+ }
+ 
+ void mmc_blk_mq_recovery(struct mmc_queue *mq)
+--- a/drivers/mmc/core/mmc.c
++++ b/drivers/mmc/core/mmc.c
+@@ -1922,6 +1922,7 @@ static int mmc_init_card(struct mmc_host
+ 				pr_info("%s: Host Software Queue enabled\n",
+ 					mmc_hostname(host));
+ 			}
++			card->max_posted_writes = card->ext_csd.cmdq_depth;
+ 		}
+ 	}
+ 
+--- a/drivers/mmc/core/queue.c
++++ b/drivers/mmc/core/queue.c
+@@ -268,6 +268,11 @@ static blk_status_t mmc_mq_queue_rq(stru
+ 			spin_unlock_irq(&mq->lock);
+ 			return BLK_STS_RESOURCE;
+ 		}
++		if (host->cqe_enabled && req_op(req) == REQ_OP_WRITE &&
++		    mq->pending_writes >= card->max_posted_writes) {
++			spin_unlock_irq(&mq->lock);
++			return BLK_STS_RESOURCE;
++		}
+ 		break;
+ 	default:
+ 		/*
+@@ -284,6 +289,8 @@ static blk_status_t mmc_mq_queue_rq(stru
+ 	/* Parallel dispatch of requests is not supported at the moment */
+ 	mq->busy = true;
+ 
++	if (req_op(req) == REQ_OP_WRITE)
++		mq->pending_writes++;
+ 	mq->in_flight[issue_type] += 1;
+ 	get_card = (mmc_tot_in_flight(mq) == 1);
+ 	cqe_retune_ok = (mmc_cqe_qcnt(mq) == 1);
+@@ -323,6 +330,8 @@ static blk_status_t mmc_mq_queue_rq(stru
+ 		bool put_card = false;
+ 
+ 		spin_lock_irq(&mq->lock);
++		if (req_op(req) == REQ_OP_WRITE)
++			mq->pending_writes--;
+ 		mq->in_flight[issue_type] -= 1;
+ 		if (mmc_tot_in_flight(mq) == 0)
+ 			put_card = true;
+--- a/drivers/mmc/core/queue.h
++++ b/drivers/mmc/core/queue.h
+@@ -79,6 +79,7 @@ struct mmc_queue {
+ 	struct request_queue	*queue;
+ 	spinlock_t		lock;
+ 	int			in_flight[MMC_ISSUE_MAX];
++	int			pending_writes;
+ 	unsigned int		cqe_busy;
+ #define MMC_CQE_DCMD_BUSY	BIT(0)
+ 	bool			busy;
+--- a/drivers/mmc/core/sd.c
++++ b/drivers/mmc/core/sd.c
+@@ -1104,6 +1104,14 @@ static int sd_parse_ext_reg_perf(struct
+ 		pr_debug("%s: Command Queue supported depth %u\n",
+ 			 mmc_hostname(card->host),
+ 			 card->ext_csd.cmdq_depth);
++		/*
++		 * If CQ is enabled, there is a contract between host and card such that VDD will
++		 * be maintained and removed only if a power off notification is provided.
++		 * An SD card in an accessible slot means surprise removal is a possibility.
++		 * As a middle ground, limit max posted writes to 1 unless the card is "hardwired".
++		 */
++		if (mmc_card_is_removable(card->host))
++			card->max_posted_writes = 1;
+ 	}
+ 
+ 	card->ext_perf.fno = fno;
+--- a/include/linux/mmc/card.h
++++ b/include/linux/mmc/card.h
+@@ -343,6 +343,8 @@ struct mmc_card {
+ 	unsigned int    nr_parts;
+ 
+ 	struct workqueue_struct *complete_wq;	/* Private workqueue */
++
++	unsigned int		max_posted_writes; /* command queue posted write limit */
+ };
+ 
+ static inline bool mmc_large_sector(struct mmc_card *card)
diff --git a/target/linux/bcm27xx/patches-6.6/950-1168-fixup-mmc-restrict-posted-write-counts-for-SD-cards-.patch b/target/linux/bcm27xx/patches-6.6/950-1168-fixup-mmc-restrict-posted-write-counts-for-SD-cards-.patch
new file mode 100644
index 0000000000..4f1d02c74d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1168-fixup-mmc-restrict-posted-write-counts-for-SD-cards-.patch
@@ -0,0 +1,70 @@
+From 19682239a60c1b53cad8319eaeb58e71d4213cee Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Mon, 15 Jul 2024 13:38:38 +0100
+Subject: [PATCH 1168/1215] fixup: mmc: restrict posted write counts for SD
+ cards in CQ mode
+
+Leaving card->max_posted_writes unintialised was a bad thing to do.
+
+Also, cqe_enable is 1 if hsq is enabled as hsq substitutes the cqhci
+implementation with its own.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/mmc/core/mmc.c   |  1 +
+ drivers/mmc/core/queue.c |  2 +-
+ drivers/mmc/core/sd.c    | 14 ++++++++------
+ 3 files changed, 10 insertions(+), 7 deletions(-)
+
+--- a/drivers/mmc/core/mmc.c
++++ b/drivers/mmc/core/mmc.c
+@@ -1663,6 +1663,7 @@ static int mmc_init_card(struct mmc_host
+ 		card->ocr = ocr;
+ 		card->type = MMC_TYPE_MMC;
+ 		card->rca = 1;
++		card->max_posted_writes = 1;
+ 		memcpy(card->raw_cid, cid, sizeof(card->raw_cid));
+ 	}
+ 
+--- a/drivers/mmc/core/queue.c
++++ b/drivers/mmc/core/queue.c
+@@ -268,7 +268,7 @@ static blk_status_t mmc_mq_queue_rq(stru
+ 			spin_unlock_irq(&mq->lock);
+ 			return BLK_STS_RESOURCE;
+ 		}
+-		if (host->cqe_enabled && req_op(req) == REQ_OP_WRITE &&
++		if (!host->hsq_enabled && host->cqe_enabled && req_op(req) == REQ_OP_WRITE &&
+ 		    mq->pending_writes >= card->max_posted_writes) {
+ 			spin_unlock_irq(&mq->lock);
+ 			return BLK_STS_RESOURCE;
+--- a/drivers/mmc/core/sd.c
++++ b/drivers/mmc/core/sd.c
+@@ -1105,13 +1105,14 @@ static int sd_parse_ext_reg_perf(struct
+ 			 mmc_hostname(card->host),
+ 			 card->ext_csd.cmdq_depth);
+ 		/*
+-		 * If CQ is enabled, there is a contract between host and card such that VDD will
+-		 * be maintained and removed only if a power off notification is provided.
+-		 * An SD card in an accessible slot means surprise removal is a possibility.
+-		 * As a middle ground, limit max posted writes to 1 unless the card is "hardwired".
++		 * If CQ is enabled, there is a contract between host and card such that
++		 * VDD will be maintained and removed only if a power off notification
++		 * is provided. An SD card in an accessible slot means surprise removal
++		 * is a possibility. As a middle ground, keep the default maximum of 1
++		 * posted write unless the card is "hardwired".
+ 		 */
+-		if (mmc_card_is_removable(card->host))
+-			card->max_posted_writes = 1;
++		if (!mmc_card_is_removable(card->host))
++			card->max_posted_writes = card->ext_csd.cmdq_depth;
+ 	}
+ 
+ 	card->ext_perf.fno = fno;
+@@ -1383,6 +1384,7 @@ retry:
+ 
+ 		card->ocr = ocr;
+ 		card->type = MMC_TYPE_SD;
++		card->max_posted_writes = 1;
+ 		memcpy(card->raw_cid, cid, sizeof(card->raw_cid));
+ 	}
+ 
diff --git a/target/linux/bcm27xx/patches-6.6/950-1169-mmc-brcmstb-don-t-squash-card-busy-detection-on-bcm2.patch b/target/linux/bcm27xx/patches-6.6/950-1169-mmc-brcmstb-don-t-squash-card-busy-detection-on-bcm2.patch
new file mode 100644
index 0000000000..0d4d6cba19
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1169-mmc-brcmstb-don-t-squash-card-busy-detection-on-bcm2.patch
@@ -0,0 +1,28 @@
+From 1abc413af44652d6a76d5b5c2afe90788595008e Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Mon, 15 Jul 2024 13:57:01 +0100
+Subject: [PATCH 1169/1215] mmc: brcmstb: don't squash card-busy detection on
+ bcm2712
+
+Commit 485d9421719b  ("mmc: sdhci-brcmstb: check R1_STATUS for
+erase/trim/discard") introduced a new flag and defaulted to disabling
+card busy detection across all platforms with this controller.
+
+This is required for IO voltage switching, as the card drives CMD low
+while the switch is in progress.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/mmc/host/sdhci-brcmstb.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mmc/host/sdhci-brcmstb.c
++++ b/drivers/mmc/host/sdhci-brcmstb.c
+@@ -430,6 +430,7 @@ static const struct brcmstb_match_priv m
+ };
+ 
+ static const struct brcmstb_match_priv match_priv_2712 = {
++	.flags = BRCMSTB_MATCH_FLAGS_USE_CARD_BUSY,
+ 	.hs400es = sdhci_brcmstb_hs400es,
+ 	.cfginit = sdhci_brcmstb_cfginit_2712,
+ 	.ops = &sdhci_brcmstb_ops_2712,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1172-Revert-Update-DAC8x-to-support-384khz-6187.patch b/target/linux/bcm27xx/patches-6.6/950-1172-Revert-Update-DAC8x-to-support-384khz-6187.patch
new file mode 100644
index 0000000000..1923b7aec0
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1172-Revert-Update-DAC8x-to-support-384khz-6187.patch
@@ -0,0 +1,25 @@
+From 31eb43be8cad2818b4458cf1fd2dfa60031ee5f4 Mon Sep 17 00:00:00 2001
+From: Matthew <sirfragles@gmail.com>
+Date: Tue, 16 Jul 2024 11:20:54 +0200
+Subject: [PATCH 1172/1215] Revert "Update DAC8x to support 384khz (#6187)"
+
+This reverts commit dd7a15472b18d4bce738bb9213443c140473833b.
+---
+ sound/soc/bcm/rpi-simple-soundcard.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/bcm/rpi-simple-soundcard.c
++++ b/sound/soc/bcm/rpi-simple-soundcard.c
+@@ -324,10 +324,10 @@ static int hifiberry_dac8x_init(struct s
+ 	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
+ 
+ 	/* override the defaults to reflect 4 x PCM5102A on the card
+-	 * and limit the sample rate to 384ksps
++	 * and limit the sample rate to 192ksps
+ 	 */
+ 	codec_dai->driver->playback.channels_max = 8;
+-	codec_dai->driver->playback.rates = SNDRV_PCM_RATE_8000_384000;
++	codec_dai->driver->playback.rates = SNDRV_PCM_RATE_8000_192000;
+ 
+ 	return 0;
+ }
diff --git a/target/linux/bcm27xx/patches-6.6/950-1176-dt-bindings-clk-rp1-Add-clocks-representing-MIPI-DSI.patch b/target/linux/bcm27xx/patches-6.6/950-1176-dt-bindings-clk-rp1-Add-clocks-representing-MIPI-DSI.patch
new file mode 100644
index 0000000000..af740bd305
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1176-dt-bindings-clk-rp1-Add-clocks-representing-MIPI-DSI.patch
@@ -0,0 +1,25 @@
+From 3224569a3e279bbeae4e975dfa1a890f3f595239 Mon Sep 17 00:00:00 2001
+From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+Date: Fri, 10 May 2024 15:18:44 +0100
+Subject: [PATCH 1176/1215] dt-bindings: clk: rp1: Add clocks representing MIPI
+ DSI byteclock
+
+Define two new RP1 clocks, representing the MIPI DSI byteclock
+sources for the dividers used to generate MIPI[01] DPI pixel clocks.
+(Previously they were represented by "fake" fixed clocks sources).
+
+Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+---
+ include/dt-bindings/clock/rp1.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/include/dt-bindings/clock/rp1.h
++++ b/include/dt-bindings/clock/rp1.h
+@@ -54,3 +54,7 @@
+ /* Extra PLL output channels - RP1B0 only */
+ #define RP1_PLL_VIDEO_PRI_PH		43
+ #define RP1_PLL_AUDIO_TERN		44
++
++/* MIPI clocks managed by the DSI driver */
++#define RP1_CLK_MIPI0_DSI_BYTECLOCK	45
++#define RP1_CLK_MIPI1_DSI_BYTECLOCK	46
diff --git a/target/linux/bcm27xx/patches-6.6/950-1177-clk-clk-rp1-Add-varsrc-clocks-to-represent-MIPI-byte.patch b/target/linux/bcm27xx/patches-6.6/950-1177-clk-clk-rp1-Add-varsrc-clocks-to-represent-MIPI-byte.patch
new file mode 100644
index 0000000000..564ef84c9e
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1177-clk-clk-rp1-Add-varsrc-clocks-to-represent-MIPI-byte.patch
@@ -0,0 +1,132 @@
+From 126560c909f38f00c08dd5f35f50c981d5e25e1f Mon Sep 17 00:00:00 2001
+From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+Date: Fri, 10 May 2024 15:30:44 +0100
+Subject: [PATCH 1177/1215] clk: clk-rp1: Add "varsrc" clocks to represent MIPI
+ byte clocks
+
+Add a new class of clocks to RP1 to represent clock sources whose
+frequency changes at run-time as a side-effect of some other driver.
+Specifically this is for the two MIPI DSI byte-clock sources.
+
+Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+---
+ drivers/clk/clk-rp1.c | 73 +++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 73 insertions(+)
+
+--- a/drivers/clk/clk-rp1.c
++++ b/drivers/clk/clk-rp1.c
+@@ -394,6 +394,11 @@ struct rp1_clock {
+ 	unsigned long cached_rate;
+ };
+ 
++struct rp1_varsrc {
++	struct clk_hw hw;
++	struct rp1_clockman *clockman;
++	unsigned long rate;
++};
+ 
+ struct rp1_clk_change {
+ 	struct clk_hw *hw;
+@@ -1414,6 +1419,34 @@ static void rp1_clk_debug_init(struct cl
+ 	rp1_debugfs_regset(clockman, 0, regs, i, dentry);
+ }
+ 
++static int rp1_varsrc_set_rate(struct clk_hw *hw,
++			       unsigned long rate, unsigned long parent_rate)
++{
++	struct rp1_varsrc *varsrc = container_of(hw, struct rp1_varsrc, hw);
++
++	/*
++	 * "varsrc" exists purely to let clock dividers know the frequency
++	 * of an externally-managed clock source (such as MIPI DSI byte-clock)
++	 * which may change at run-time as a side-effect of some other driver.
++	 */
++	varsrc->rate = rate;
++	return 0;
++}
++
++static unsigned long rp1_varsrc_recalc_rate(struct clk_hw *hw,
++					    unsigned long parent_rate)
++{
++	struct rp1_varsrc *varsrc = container_of(hw, struct rp1_varsrc, hw);
++
++	return varsrc->rate;
++}
++
++static long rp1_varsrc_round_rate(struct clk_hw *hw, unsigned long rate,
++				  unsigned long *parent_rate)
++{
++	return rate;
++}
++
+ static const struct clk_ops rp1_pll_core_ops = {
+ 	.is_prepared = rp1_pll_core_is_on,
+ 	.prepare = rp1_pll_core_on,
+@@ -1464,6 +1497,12 @@ static const struct clk_ops rp1_clk_ops
+ 	.debug_init = rp1_clk_debug_init,
+ };
+ 
++static const struct clk_ops rp1_varsrc_ops = {
++	.set_rate = rp1_varsrc_set_rate,
++	.recalc_rate = rp1_varsrc_recalc_rate,
++	.round_rate = rp1_varsrc_round_rate,
++};
++
+ static bool rp1_clk_is_claimed(const char *name);
+ 
+ static struct clk_hw *rp1_register_pll_core(struct rp1_clockman *clockman,
+@@ -1647,6 +1686,35 @@ static struct clk_hw *rp1_register_clock
+ 	return &clock->hw;
+ }
+ 
++static struct clk_hw *rp1_register_varsrc(struct rp1_clockman *clockman,
++					  const void *data)
++{
++	const char *name = *(char const * const *)data;
++	struct rp1_varsrc *clock;
++	struct clk_init_data init;
++	int ret;
++
++	memset(&init, 0, sizeof(init));
++	init.parent_names = &ref_clock;
++	init.num_parents = 1;
++	init.name = name;
++	init.flags = CLK_IGNORE_UNUSED;
++	init.ops = &rp1_varsrc_ops;
++
++	clock = devm_kzalloc(clockman->dev, sizeof(*clock), GFP_KERNEL);
++	if (!clock)
++		return NULL;
++
++	clock->clockman = clockman;
++	clock->hw.init = &init;
++
++	ret = devm_clk_hw_register(clockman->dev, &clock->hw);
++	if (ret)
++		return ERR_PTR(ret);
++
++	return &clock->hw;
++}
++
+ struct rp1_clk_desc {
+ 	struct clk_hw *(*clk_register)(struct rp1_clockman *clockman,
+ 				       const void *data);
+@@ -1676,6 +1744,8 @@ struct rp1_clk_desc {
+ 					  &(struct rp1_clock_data)	\
+ 					  {__VA_ARGS__})
+ 
++#define REGISTER_VARSRC(n)	_REGISTER(&rp1_register_varsrc,	&(const char *){n})
++
+ static const struct rp1_clk_desc clk_desc_array[] = {
+ 	[RP1_PLL_SYS_CORE] = REGISTER_PLL_CORE(
+ 				.name = "pll_sys_core",
+@@ -2318,6 +2388,9 @@ static const struct rp1_clk_desc clk_des
+ 				.max_freq = 200 * MHz,
+ 				.fc0_src = FC_NUM(3, 6),
+ 				),
++
++	[RP1_CLK_MIPI0_DSI_BYTECLOCK] = REGISTER_VARSRC("clksrc_mipi0_dsi_byteclk"),
++	[RP1_CLK_MIPI1_DSI_BYTECLOCK] = REGISTER_VARSRC("clksrc_mipi1_dsi_byteclk"),
+ };
+ 
+ static bool rp1_clk_claimed[ARRAY_SIZE(clk_desc_array)];
diff --git a/target/linux/bcm27xx/patches-6.6/950-1178-dts-rp1-DSI-drivers-to-use-newly-defined-MIPI-byte-s.patch b/target/linux/bcm27xx/patches-6.6/950-1178-dts-rp1-DSI-drivers-to-use-newly-defined-MIPI-byte-s.patch
new file mode 100644
index 0000000000..7e6032dd1f
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1178-dts-rp1-DSI-drivers-to-use-newly-defined-MIPI-byte-s.patch
@@ -0,0 +1,92 @@
+From 9a108c82b6f6526e0aa8a19befa1ed3f31f8fe52 Mon Sep 17 00:00:00 2001
+From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+Date: Fri, 10 May 2024 15:42:29 +0100
+Subject: [PATCH 1178/1215] dts: rp1: DSI drivers to use newly defined MIPI
+ byte source clocks.
+
+Remove the "dummy" 72MHz fixed clock sources and associate DSI driver
+with the new "variable" clock sources now defined in RP1 clocks.
+
+Also add PLLSYS clock to DSI, which it will need as an alternative
+clock source in those cases where DPI pixclock > DSI byteclock.
+
+Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+---
+ arch/arm/boot/dts/broadcom/rp1.dtsi | 50 +++++++++--------------------
+ 1 file changed, 15 insertions(+), 35 deletions(-)
+
+--- a/arch/arm/boot/dts/broadcom/rp1.dtsi
++++ b/arch/arm/boot/dts/broadcom/rp1.dtsi
+@@ -1109,16 +1109,15 @@
+ 
+ 			interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
+ 
+-			clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,  // required, config bus clock
+-				 <&rp1_clocks RP1_CLK_MIPI0_DPI>,  // required, pixel clock
+-				 <&clksrc_mipi0_dsi_byteclk>,    // internal, parent for divide
+-				 <&clk_xosc>;                    // hardwired to DSI "refclk"
+-			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk";
++			clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
++				 <&rp1_clocks RP1_CLK_MIPI0_DPI>,
++				 <&rp1_clocks RP1_CLK_MIPI0_DSI_BYTECLOCK>,
++				 <&clk_xosc>,                // hardwired to DSI "refclk"
++				 <&rp1_clocks RP1_PLL_SYS>;  // alternate parent for divide
++			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
+ 
+-			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
+-					  <&rp1_clocks RP1_CLK_MIPI0_DPI>;
++			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+ 			assigned-clock-rates = <25000000>;
+-			assigned-clock-parents = <0>, <&clksrc_mipi0_dsi_byteclk>;
+ 		};
+ 
+ 		rp1_dsi1: dsi@128000 {
+@@ -1130,16 +1129,15 @@
+ 
+ 			interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
+ 
+-			clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,  // required, config bus clock
+-				 <&rp1_clocks RP1_CLK_MIPI1_DPI>,  // required, pixel clock
+-				 <&clksrc_mipi1_dsi_byteclk>,    // internal, parent for divide
+-				 <&clk_xosc>;                    // hardwired to DSI "refclk"
+-			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk";
++			clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
++				 <&rp1_clocks RP1_CLK_MIPI1_DPI>,
++				 <&rp1_clocks RP1_CLK_MIPI1_DSI_BYTECLOCK>,
++				 <&clk_xosc>,               // hardwired to DSI "refclk"
++				 <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide
++			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
+ 
+-			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
+-					  <&rp1_clocks RP1_CLK_MIPI1_DPI>;
++			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+ 			assigned-clock-rates = <25000000>;
+-			assigned-clock-parents = <0>, <&clksrc_mipi1_dsi_byteclk>;
+ 		};
+ 
+ 		/* VEC and DPI both need to control PLL_VIDEO and cannot work together;   */
+@@ -1216,24 +1214,6 @@
+ 		clock-output-names = "core";
+ 		clock-frequency = <50000000>;
+ 	};
+-	clksrc_mipi0_dsi_byteclk: clksrc_mipi0_dsi_byteclk {
+-		// This clock is synthesized by MIPI0 D-PHY, when DSI is running.
+-		// Its frequency is not known a priori (until a panel driver attaches)
+-		// so assign a made-up frequency of 72MHz so it can be divided for DPI.
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "clksrc_mipi0_dsi_byteclk";
+-		clock-frequency = <72000000>;
+-	};
+-	clksrc_mipi1_dsi_byteclk: clksrc_mipi1_dsi_byteclk {
+-		// This clock is synthesized by MIPI1 D-PHY, when DSI is running.
+-		// Its frequency is not known a priori (until a panel driver attaches)
+-		// so assign a made-up frequency of 72MHz so it can be divided for DPI.
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "clksrc_mipi1_dsi_byteclk";
+-		clock-frequency = <72000000>;
+-	};
+ 	/* GPIO derived clock sources. Each GPIO with a GPCLK function
+ 	 * can drive its output from the respective GPCLK
+ 	 * generator, and provide a clock source to other internal
diff --git a/target/linux/bcm27xx/patches-6.6/950-1179-drm-rp1-rp1-dsi-Switch-to-PLL_SYS-source-for-DPI-whe.patch b/target/linux/bcm27xx/patches-6.6/950-1179-drm-rp1-rp1-dsi-Switch-to-PLL_SYS-source-for-DPI-whe.patch
new file mode 100644
index 0000000000..a80af9839d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1179-drm-rp1-rp1-dsi-Switch-to-PLL_SYS-source-for-DPI-whe.patch
@@ -0,0 +1,313 @@
+From f5de8d46da4b40f2180be502c1e547fe8c9b2ac2 Mon Sep 17 00:00:00 2001
+From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+Date: Fri, 10 May 2024 15:48:15 +0100
+Subject: [PATCH 1179/1215] drm: rp1: rp1-dsi: Switch to PLL_SYS source for DPI
+ when 8 * lanes > bpp
+
+To support 4 lanes, re-parent DPI clock source between DSI byteclock
+(using the new "variable sources" defined in clk-rp1) and PLL_SYS.
+This is to cover cases in which byteclock < pixclock <= 200MHz.
+
+Tidying: All frequencies now in Hz (not kHz), where DSI speed is now
+represented by byteclock to simplify arithmetic. Clamp DPI and byte
+clocks to their legal ranges; fix up HSTX timeout to avoid an unsafe
+assumption that it would return to LP state for every scanline.
+
+Because of RP1's clock topology, the ratio between DSI and DPI clocks
+may not be exact with 3 or 4 lanes, leading to slightly irregular
+timings each time DSI switches between HS and LP states. Tweak to
+inhibit LP during Horizontal BP when sync pulses were requested.
+
+Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
+---
+ drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c     |   3 +-
+ drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.h     |   3 +-
+ drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dsi.c | 130 +++++++++++++---------
+ 3 files changed, 80 insertions(+), 56 deletions(-)
+
+--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c
++++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.c
+@@ -54,6 +54,7 @@ static void rp1_dsi_bridge_pre_enable(st
+ 	struct rp1_dsi *dsi = bridge_to_rp1_dsi(bridge);
+ 
+ 	rp1dsi_dsi_setup(dsi, &dsi->pipe.crtc.state->adjusted_mode);
++	dsi->dsi_running = true;
+ }
+ 
+ static void rp1_dsi_bridge_enable(struct drm_bridge *bridge,
+@@ -443,7 +444,7 @@ static int rp1dsi_platform_probe(struct
+ 	/* Hardware resources */
+ 	for (i = 0; i < RP1DSI_NUM_CLOCKS; i++) {
+ 		static const char * const myclocknames[RP1DSI_NUM_CLOCKS] = {
+-			"cfgclk", "dpiclk", "byteclk", "refclk"
++			"cfgclk", "dpiclk", "byteclk", "refclk", "pllsys"
+ 		};
+ 		dsi->clocks[i] = devm_clk_get(dev, myclocknames[i]);
+ 		if (IS_ERR(dsi->clocks[i])) {
+--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.h
++++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi.h
+@@ -30,7 +30,8 @@
+ #define RP1DSI_CLOCK_DPI     1
+ #define RP1DSI_CLOCK_BYTE    2
+ #define RP1DSI_CLOCK_REF     3
+-#define RP1DSI_NUM_CLOCKS    4
++#define RP1DSI_CLOCK_PLLSYS  4
++#define RP1DSI_NUM_CLOCKS    5
+ 
+ /* ---------------------------------------------------------------------- */
+ 
+--- a/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dsi.c
++++ b/drivers/gpu/drm/rp1/rp1-dsi/rp1_dsi_dsi.c
+@@ -7,6 +7,7 @@
+ 
+ #include <linux/delay.h>
+ #include <linux/errno.h>
++#include <linux/math64.h>
+ #include <linux/platform_device.h>
+ #include <linux/rp1_platform.h>
+ #include "drm/drm_print.h"
+@@ -1111,7 +1112,7 @@ static void dphy_transaction(struct rp1_
+ 	DSI_WRITE(DSI_PHY_TST_CTRL0, DPHY_CTRL0_PHY_TESTCLK_BITS);
+ }
+ 
+-static uint8_t dphy_get_div(u32 refclk_khz, u32 vco_freq_khz, u32 *ptr_m, u32 *ptr_n)
++static u64 dphy_get_div(u32 refclk, u64 vco_freq, u32 *ptr_m, u32 *ptr_n)
+ {
+ 	/*
+ 	 * See pg 77-78 of dphy databook
+@@ -1124,19 +1125,23 @@ static uint8_t dphy_get_div(u32 refclk_k
+ 	 * In practice, given a 50MHz reference clock, it can produce any
+ 	 * multiple of 10MHz, 11.1111MHz, 12.5MHz, 14.286MHz or 16.667MHz
+ 	 * with < 1% error for all frequencies above 495MHz.
++	 *
++	 * vco_freq should be set to the lane bit rate (not the MIPI clock
++	 * which is half of this). These frequencies are now measured in Hz.
++	 * They should fit within u32, but u64 is needed for calculations.
+ 	 */
+ 
+-	static const u32 REF_DIVN_MAX = 40000u;
+-	static const u32 REF_DIVN_MIN =  5000u;
+-	u32 best_n, best_m, best_err = 0x7fffffff;
+-	unsigned int n;
++	static const u32 REF_DIVN_MAX = 40000000;
++	static const u32 REF_DIVN_MIN =  5000000;
++	u32 n, best_n, best_m;
++	u64 best_err = vco_freq;
+ 
+-	for (n = 1 + refclk_khz / REF_DIVN_MAX; n * REF_DIVN_MIN <= refclk_khz && n < 100; ++n) {
+-		u32 half_m = (n * vco_freq_khz + refclk_khz) / (2 * refclk_khz);
++	for (n = 1 + refclk / REF_DIVN_MAX; n * REF_DIVN_MIN <= refclk && n < 100; ++n) {
++		u32 half_m = DIV_U64_ROUND_CLOSEST(n * vco_freq, 2 * refclk);
+ 
+ 		if (half_m < 150) {
+-			u32 f = (2 * half_m * refclk_khz) / n;
+-			u32 err = (f > vco_freq_khz) ? f - vco_freq_khz : vco_freq_khz - f;
++			u64 f = div_u64(mul_u32_u32(2 * half_m, refclk), n);
++			u64 err = (f > vco_freq) ? f - vco_freq : vco_freq - f;
+ 
+ 			if (err < best_err) {
+ 				best_n = n;
+@@ -1148,12 +1153,12 @@ static uint8_t dphy_get_div(u32 refclk_k
+ 		}
+ 	}
+ 
+-	if (64 * best_err < vco_freq_khz) { /* tolerate small error */
+-		*ptr_n = best_n;
+-		*ptr_m = best_m;
+-		return 1;
+-	}
+-	return 0;
++	if (64 * best_err >= vco_freq)
++		return 0;
++
++	*ptr_n = best_n;
++	*ptr_m = best_m;
++	return div_u64(mul_u32_u32(best_m, refclk), best_n);
+ }
+ 
+ struct hsfreq_range {
+@@ -1226,13 +1231,14 @@ static void dphy_set_hsfreqrange(struct
+ 			 hsfreq_table[i].hsfreqrange << 1);
+ }
+ 
+-static void dphy_configure_pll(struct rp1_dsi *dsi, u32 refclk_khz, u32 vco_freq_khz)
++static u32 dphy_configure_pll(struct rp1_dsi *dsi, u32 refclk, u32 vco_freq)
+ {
+ 	u32 m = 0;
+ 	u32 n = 0;
++	u32 actual_vco_freq = dphy_get_div(refclk, vco_freq, &m, &n);
+ 
+-	if (dphy_get_div(refclk_khz, vco_freq_khz, &m, &n)) {
+-		dphy_set_hsfreqrange(dsi, vco_freq_khz / 1000);
++	if (actual_vco_freq) {
++		dphy_set_hsfreqrange(dsi, actual_vco_freq / 1000000);
+ 		/* Program m,n from registers */
+ 		dphy_transaction(dsi, DPHY_PLL_DIV_CTRL_OFFSET, 0x30);
+ 		/* N (program N-1) */
+@@ -1242,18 +1248,21 @@ static void dphy_configure_pll(struct rp
+ 		/* M[4:0] (program M-1) */
+ 		dphy_transaction(dsi, DPHY_PLL_LOOP_DIV_OFFSET, ((m - 1) & 0x1F));
+ 		drm_dbg_driver(dsi->drm,
+-			       "DPHY: vco freq want %dkHz got %dkHz = %d * (%dkHz / %d), hsfreqrange = 0x%02x\r\n",
+-			       vco_freq_khz, refclk_khz * m / n, m, refclk_khz,
+-			       n, hsfreq_table[dsi->hsfreq_index].hsfreqrange);
++			       "DPHY: vco freq want %uHz got %uHz = %d * (%uHz / %d), hsfreqrange = 0x%02x\n",
++			       vco_freq, actual_vco_freq, m, refclk, n,
++			       hsfreq_table[dsi->hsfreq_index].hsfreqrange);
+ 	} else {
+-		drm_info(dsi->drm,
+-			 "rp1dsi: Error configuring DPHY PLL! %dkHz = %d * (%dkHz / %d)\r\n",
+-			 vco_freq_khz, m, refclk_khz, n);
++		drm_warn(dsi->drm,
++			 "rp1dsi: Error configuring DPHY PLL %uHz\n", vco_freq);
+ 	}
++
++	return actual_vco_freq;
+ }
+ 
+-static void dphy_init_khz(struct rp1_dsi *dsi, u32 ref_freq, u32 vco_freq)
++static u32 dphy_init(struct rp1_dsi *dsi, u32 ref_freq, u32 vco_freq)
+ {
++	u32 actual_vco_freq;
++
+ 	/* Reset the PHY */
+ 	DSI_WRITE(DSI_PHYRSTZ, 0);
+ 	DSI_WRITE(DSI_PHY_TST_CTRL0, DPHY_CTRL0_PHY_TESTCLK_BITS);
+@@ -1263,13 +1272,15 @@ static void dphy_init_khz(struct rp1_dsi
+ 	DSI_WRITE(DSI_PHY_TST_CTRL0, DPHY_CTRL0_PHY_TESTCLK_BITS);
+ 	udelay(1);
+ 	/* Since we are in DSI (not CSI2) mode here, start the PLL */
+-	dphy_configure_pll(dsi, ref_freq, vco_freq);
++	actual_vco_freq = dphy_configure_pll(dsi, ref_freq, vco_freq);
+ 	udelay(1);
+ 	/* Unreset */
+ 	DSI_WRITE(DSI_PHYRSTZ, DSI_PHYRSTZ_SHUTDOWNZ_BITS);
+ 	udelay(1);
+ 	DSI_WRITE(DSI_PHYRSTZ, (DSI_PHYRSTZ_SHUTDOWNZ_BITS | DSI_PHYRSTZ_RSTZ_BITS));
+ 	udelay(1); /* so we can see PLL coming up? */
++
++	return actual_vco_freq;
+ }
+ 
+ void rp1dsi_mipicfg_setup(struct rp1_dsi *dsi)
+@@ -1290,23 +1301,30 @@ static unsigned long rp1dsi_refclk_freq(
+ 	return u;
+ }
+ 
+-static void rp1dsi_dpiclk_start(struct rp1_dsi *dsi, unsigned int bpp, unsigned int lanes)
++static void rp1dsi_dpiclk_start(struct rp1_dsi *dsi, u32 byte_clock,
++				unsigned int bpp, unsigned int lanes)
+ {
+-	unsigned long u;
+-
+-	if (dsi->clocks[RP1DSI_CLOCK_DPI]) {
+-		u = (dsi->clocks[RP1DSI_CLOCK_BYTE]) ?
+-				clk_get_rate(dsi->clocks[RP1DSI_CLOCK_BYTE]) : 0;
+-		drm_info(dsi->drm,
+-			 "rp1dsi: Nominal byte clock %lu; scale by %u/%u",
+-			 u, 4 * lanes, (bpp >> 1));
+-		if (u < 1 || u >= (1ul << 28))
+-			u = 72000000ul; /* default DUMMY frequency for byteclock */
++	/* Dummy clk_set_rate() to declare the actual DSI byte-clock rate */
++	clk_set_rate(dsi->clocks[RP1DSI_CLOCK_BYTE], byte_clock);
+ 
++	/*
++	 * Prefer the DSI byte-clock source where possible, so that DSI and DPI
++	 * clocks will be in an exact ratio and downstream devices can recover
++	 * perfect timings. But when DPI clock is faster, fall back on PLL_SYS.
++	 * To defeat rounding errors, specify explicitly which source to use.
++	 */
++	if (bpp >= 8 * lanes)
+ 		clk_set_parent(dsi->clocks[RP1DSI_CLOCK_DPI], dsi->clocks[RP1DSI_CLOCK_BYTE]);
+-		clk_set_rate(dsi->clocks[RP1DSI_CLOCK_DPI], (4 * lanes * u) / (bpp >> 1));
+-		clk_prepare_enable(dsi->clocks[RP1DSI_CLOCK_DPI]);
+-	}
++	else if (dsi->clocks[RP1DSI_CLOCK_PLLSYS])
++		clk_set_parent(dsi->clocks[RP1DSI_CLOCK_DPI], dsi->clocks[RP1DSI_CLOCK_PLLSYS]);
++
++	clk_set_rate(dsi->clocks[RP1DSI_CLOCK_DPI], (4 * lanes * byte_clock) / (bpp >> 1));
++	clk_prepare_enable(dsi->clocks[RP1DSI_CLOCK_DPI]);
++	drm_info(dsi->drm,
++		 "rp1dsi: Nominal Byte clock %u DPI clock %lu (parent rate %lu)",
++		 byte_clock,
++		 clk_get_rate(dsi->clocks[RP1DSI_CLOCK_DPI]),
++		 clk_get_rate(clk_get_parent(dsi->clocks[RP1DSI_CLOCK_DPI])));
+ }
+ 
+ static void rp1dsi_dpiclk_stop(struct rp1_dsi *dsi)
+@@ -1336,18 +1354,21 @@ static u32 get_colorcode(enum mipi_dsi_p
+ 	return 0x005;
+ }
+ 
+-/* Maximum frequency for LP escape clock (20MHz), and some magic numbers */
+-#define RP1DSI_ESC_CLK_KHZ      20000
+-#define RP1DSI_TO_CLK_DIV           5
+-#define RP1DSI_HSTX_TO_MIN      0x200
+-#define RP1DSI_LPRX_TO_VAL      0x400
++/* Frequency limits for DPI, HS and LP clocks, and some magic numbers */
++#define RP1DSI_DPI_MAX_KHZ     200000
++#define RP1DSI_BYTE_CLK_MIN  10000000
++#define RP1DSI_BYTE_CLK_MAX 187500000
++#define RP1DSI_ESC_CLK_MAX   20000000
++#define RP1DSI_TO_CLK_DIV        0x50
++#define RP1DSI_LPRX_TO_VAL       0x40
+ #define RP1DSI_BTA_TO_VAL       0xd00
+ 
+ void rp1dsi_dsi_setup(struct rp1_dsi *dsi, struct drm_display_mode const *mode)
+ {
+ 	u32 timeout, mask, vid_mode_cfg;
+-	int lane_kbps;
+ 	unsigned int bpp = mipi_dsi_pixel_format_to_bpp(dsi->display_format);
++	u32 byte_clock = clamp((bpp * 125 * min(mode->clock, RP1DSI_DPI_MAX_KHZ)) / dsi->lanes,
++			       RP1DSI_BYTE_CLK_MIN, RP1DSI_BYTE_CLK_MAX);
+ 
+ 	DSI_WRITE(DSI_PHY_IF_CFG, dsi->lanes - 1);
+ 	DSI_WRITE(DSI_DPI_CFG_POL, 0);
+@@ -1360,6 +1381,8 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
+ 	vid_mode_cfg = 0xbf00;
+ 	if (!(dsi->display_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE))
+ 		vid_mode_cfg |= 0x01;
++	else if (8 * dsi->lanes > bpp)
++		vid_mode_cfg &= ~0x400; /* PULSE && inexact DPICLK => fix HBP time */
+ 	if (dsi->display_flags & MIPI_DSI_MODE_VIDEO_BURST)
+ 		vid_mode_cfg |= 0x02;
+ 	DSI_WRITE(DSI_VID_MODE_CFG, vid_mode_cfg);
+@@ -1369,15 +1392,14 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
+ 	DSI_WRITE(DSI_MODE_CFG, 1);
+ 
+ 	/* Set timeouts and clock dividers */
+-	DSI_WRITE(DSI_TO_CNT_CFG,
+-		  (max((bpp * mode->htotal) / (7 * RP1DSI_TO_CLK_DIV * dsi->lanes),
+-		       RP1DSI_HSTX_TO_MIN) << 16) |
+-		  RP1DSI_LPRX_TO_VAL);
++	timeout = (bpp * mode->htotal * mode->vdisplay) / (7 * RP1DSI_TO_CLK_DIV * dsi->lanes);
++	if (timeout > 0xFFFFu)
++		timeout = 0;
++	DSI_WRITE(DSI_TO_CNT_CFG, (timeout << 16) | RP1DSI_LPRX_TO_VAL);
+ 	DSI_WRITE(DSI_BTA_TO_CNT, RP1DSI_BTA_TO_VAL);
+-	lane_kbps = (bpp *  mode->clock) / dsi->lanes;
+ 	DSI_WRITE(DSI_CLKMGR_CFG,
+ 		  (RP1DSI_TO_CLK_DIV << 8) |
+-		  max(2, lane_kbps / (8 * RP1DSI_ESC_CLK_KHZ) + 1));
++		  max(2u, 1u + byte_clock / RP1DSI_ESC_CLK_MAX));
+ 
+ 	/* Configure video timings */
+ 	DSI_WRITE(DSI_VID_PKT_SIZE, mode->hdisplay);
+@@ -1394,7 +1416,7 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
+ 	DSI_WRITE(DSI_VID_VACTIVE_LINES, mode->vdisplay);
+ 
+ 	/* Init PHY */
+-	dphy_init_khz(dsi, rp1dsi_refclk_freq(dsi) / 1000, lane_kbps);
++	byte_clock = dphy_init(dsi, rp1dsi_refclk_freq(dsi), 8 * byte_clock) >> 3;
+ 
+ 	DSI_WRITE(DSI_PHY_TMR_LPCLK_CFG,
+ 		  (hsfreq_table[dsi->hsfreq_index].clk_lp2hs << DSI_PHY_TMR_LP2HS_LSB) |
+@@ -1418,7 +1440,7 @@ void rp1dsi_dsi_setup(struct rp1_dsi *ds
+ 	DSI_WRITE(DSI_PWR_UP, 0x1);		/* power up */
+ 
+ 	/* Now it should be safe to start the external DPI clock divider */
+-	rp1dsi_dpiclk_start(dsi, bpp, dsi->lanes);
++	rp1dsi_dpiclk_start(dsi, byte_clock, bpp, dsi->lanes);
+ 
+ 	/* Wait for all lane(s) to be in Stopstate */
+ 	mask = (1 << 4);
diff --git a/target/linux/bcm27xx/patches-6.6/950-1180-arm64-dts-Move-bcm2712-and-rp1-here.patch b/target/linux/bcm27xx/patches-6.6/950-1180-arm64-dts-Move-bcm2712-and-rp1-here.patch
new file mode 100644
index 0000000000..2856bb5cd8
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1180-arm64-dts-Move-bcm2712-and-rp1-here.patch
@@ -0,0 +1,9749 @@
+From 10c77e119eaaa2677009dea58cf69a8e5383925b Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 17 Jul 2024 17:27:36 +0100
+Subject: [PATCH 1180/1215] arm64: dts: Move bcm2712 and rp1 here
+
+It is pointless having the bcm2712 family of dts files and rp1.dtsi
+in the arch/arm directory tree, since they then require placeholders
+to include them in arch/arm64 where they are built. The files have
+no dependencies on other files in the arch/arm tree, so simply move
+them here.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ .../arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 867 ------------------
+ .../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts    |  20 -
+ .../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts    |  10 -
+ .../boot/dts/broadcom/bcm2712d0-rpi-5-b.dts   | 107 ---
+ .../boot/dts/broadcom/bcm2712-rpi-5-b.dts     | 867 +++++++++++++++++-
+ .../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts    |  20 +-
+ .../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts    |  10 +-
+ .../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi    |  10 +-
+ .../boot/dts/broadcom/bcm2712-rpi.dtsi        |   0
+ .../boot/dts/broadcom/bcm2712.dtsi            |   0
+ .../boot/dts/broadcom/bcm2712d0-rpi-5-b.dts   | 107 ++-
+ .../{arm => arm64}/boot/dts/broadcom/rp1.dtsi |   0
+ 12 files changed, 1002 insertions(+), 1016 deletions(-)
+ delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+ delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
+ delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
+ delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
+ rename arch/{arm => arm64}/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi (98%)
+ rename arch/{arm => arm64}/boot/dts/broadcom/bcm2712-rpi.dtsi (100%)
+ rename arch/{arm => arm64}/boot/dts/broadcom/bcm2712.dtsi (100%)
+ rename arch/{arm => arm64}/boot/dts/broadcom/rp1.dtsi (100%)
+
+--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts
++++ /dev/null
+@@ -1,867 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-/dts-v1/;
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/clock/rp1.h>
+-#include <dt-bindings/interrupt-controller/irq.h>
+-#include <dt-bindings/mfd/rp1.h>
+-#include <dt-bindings/pwm/pwm.h>
+-#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
+-
+-#define i2c0 _i2c0
+-#define i2c3 _i2c3
+-#define i2c4 _i2c4
+-#define i2c5 _i2c5
+-#define i2c6 _i2c6
+-#define i2c8 _i2c8
+-#define i2s _i2s
+-#define pwm0 _pwm0
+-#define pwm1 _pwm1
+-#define spi0 _spi0
+-#define spi3 _spi3
+-#define spi4 _spi4
+-#define spi5 _spi5
+-#define spi6 _spi6
+-#define uart0 _uart0
+-#define uart2 _uart2
+-#define uart5 _uart5
+-
+-#include "bcm2712.dtsi"
+-
+-#undef i2c0
+-#undef i2c3
+-#undef i2c4
+-#undef i2c5
+-#undef i2c6
+-#undef i2c8
+-#undef i2s
+-#undef pwm0
+-#undef pwm1
+-#undef spi0
+-#undef spi3
+-#undef spi4
+-#undef spi5
+-#undef spi6
+-#undef uart0
+-#undef uart2
+-#undef uart3
+-#undef uart4
+-#undef uart5
+-
+-/ {
+-	compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
+-	model = "Raspberry Pi 5";
+-
+-	/* Will be filled by the bootloader */
+-	memory@0 {
+-		device_type = "memory";
+-		reg = <0 0 0x28000000>;
+-	};
+-
+-	leds: leds {
+-		compatible = "gpio-leds";
+-
+-		led_pwr: led-pwr {
+-			label = "PWR";
+-			gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
+-			default-state = "off";
+-			linux,default-trigger = "none";
+-		};
+-
+-		led_act: led-act {
+-			label = "ACT";
+-			gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
+-			default-state = "off";
+-			linux,default-trigger = "mmc0";
+-		};
+-	};
+-
+-	sd_io_1v8_reg: sd_io_1v8_reg {
+-		compatible = "regulator-gpio";
+-		regulator-name = "vdd-sd-io";
+-		regulator-min-microvolt = <1800000>;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-boot-on;
+-		regulator-always-on;
+-		regulator-settling-time-us = <5000>;
+-		gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
+-		states = <1800000 0x1
+-			  3300000 0x0>;
+-		status = "okay";
+-	};
+-
+-	sd_vcc_reg: sd_vcc_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "vcc-sd";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-boot-on;
+-		enable-active-high;
+-		gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
+-		status = "okay";
+-	};
+-
+-	wl_on_reg: wl_on_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "wl-on-regulator";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		pinctrl-0 = <&wl_on_pins>;
+-		pinctrl-names = "default";
+-
+-		gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
+-
+-		startup-delay-us = <150000>;
+-		enable-active-high;
+-	};
+-
+-	clocks: clocks {
+-	};
+-
+-	cam1_clk: cam1_clk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		status = "disabled";
+-	};
+-
+-	cam0_clk: cam0_clk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		status = "disabled";
+-	};
+-
+-	cam0_reg: cam0_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "cam0_reg";
+-		enable-active-high;
+-		status = "okay";
+-		gpio = <&rp1_gpio 34 0>;  // CD0_IO0_MICCLK, to MIPI 0 connector
+-	};
+-
+-	cam1_reg: cam1_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "cam1_reg";
+-		enable-active-high;
+-		status = "okay";
+-		gpio = <&rp1_gpio 46 0>;  // CD1_IO0_MICCLK, to MIPI 1 connector
+-	};
+-
+-	cam_dummy_reg: cam_dummy_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "cam-dummy-reg";
+-		status = "okay";
+-	};
+-
+-	dummy: dummy {
+-		// A target for unwanted overlay fragments
+-	};
+-
+-
+-	// A few extra labels to keep overlays happy
+-
+-	i2c0if: i2c0if {};
+-	i2c0mux: i2c0mux {};
+-};
+-
+-rp1_target: &pcie2 {
+-	brcm,enable-mps-rcb;
+-	brcm,vdm-qos-map = <0xbbaa9888>;
+-	aspm-no-l0s;
+-	status = "okay";
+-};
+-
+-&pcie1 {
+-	brcm,vdm-qos-map = <0x33333333>;
+-};
+-
+-// Add some labels to 2712 device
+-
+-// The system UART
+-uart10: &_uart0 { status = "okay"; };
+-
+-// The system SPI for the bootloader EEPROM
+-spi10: &_spi0 { status = "okay"; };
+-
+-i2c_rp1boot: &_i2c3 { };
+-
+-#include "rp1.dtsi"
+-
+-&rp1 {
+-	// PCIe address space layout:
+-	// 00_00000000-00_00xxxxxx = RP1 peripherals
+-	// 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
+-
+-	// outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
+-	// This is the RP1 peripheral space
+-	ranges = <0xc0 0x40000000
+-		  0x02000000 0x00 0x00000000
+-		  0x00 0x00400000>;
+-
+-	dma-ranges =
+-	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
+-		     <0x10 0x00000000
+-		      0x43000000 0x10 0x00000000
+-		      0x10 0x00000000>,
+-
+-	// inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
+-	// This allows the RP1 DMA controller to address RP1 hardware
+-		     <0xc0 0x40000000
+-		      0x02000000 0x0 0x00000000
+-		      0x0 0x00400000>,
+-
+-	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
+-		     <0x00 0x00000000
+-		      0x02000000 0x10 0x00000000
+-		      0x10 0x00000000>;
+-};
+-
+-// Expose RP1 nodes as system nodes with labels
+-
+-&rp1_dma  {
+-	status = "okay";
+-};
+-
+-&rp1_eth {
+-	status = "okay";
+-	phy-handle = <&phy1>;
+-	phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
+-	phy-reset-duration = <5>;
+-
+-	phy1: ethernet-phy@1 {
+-		reg = <0x1>;
+-		brcm,powerdown-enable;
+-	};
+-};
+-
+-gpio: &rp1_gpio {
+-	status = "okay";
+-};
+-
+-aux: &dummy {};
+-
+-&rp1_usb0 {
+-	pinctrl-0 = <&usb_vbus_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&rp1_usb1 {
+-	status = "okay";
+-};
+-
+-#include "bcm2712-rpi.dtsi"
+-
+-i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
+-	pinctrl-0 = <&rp1_i2c6_38_39>;
+-	pinctrl-names = "default";
+-	clock-frequency = <100000>;
+-};
+-
+-i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only
+-	pinctrl-0 = <&rp1_i2c4_40_41>;
+-	pinctrl-names = "default";
+-	clock-frequency = <100000>;
+-};
+-
+-i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
+-
+-csi0: &rp1_csi0 { };
+-csi1: &rp1_csi1 { };
+-dsi0: &rp1_dsi0 { };
+-dsi1: &rp1_dsi1 { };
+-dpi: &rp1_dpi { };
+-vec: &rp1_vec { };
+-dpi_gpio0:              &rp1_dpi_24bit_gpio0        { };
+-dpi_gpio1:              &rp1_dpi_24bit_gpio2        { };
+-dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
+-dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
+-dpi_18bit_gpio0:        &rp1_dpi_18bit_gpio0        { };
+-dpi_18bit_gpio2:        &rp1_dpi_18bit_gpio2        { };
+-dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
+-dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
+-dpi_16bit_gpio0:        &rp1_dpi_16bit_gpio0        { };
+-dpi_16bit_gpio2:        &rp1_dpi_16bit_gpio2        { };
+-
+-/* Add the IOMMUs for some RP1 bus masters */
+-
+-&csi0 {
+-	iommus = <&iommu5>;
+-};
+-
+-&csi1 {
+-	iommus = <&iommu5>;
+-};
+-
+-&dsi0 {
+-	iommus = <&iommu5>;
+-};
+-
+-&dsi1 {
+-	iommus = <&iommu5>;
+-};
+-
+-&dpi {
+-	iommus = <&iommu5>;
+-};
+-
+-&vec {
+-	iommus = <&iommu5>;
+-};
+-
+-&ddc0 {
+-	status = "disabled";
+-};
+-
+-&ddc1 {
+-	status = "disabled";
+-};
+-
+-&hdmi0 {
+-	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
+-	clock-names = "hdmi", "bvb", "audio", "cec";
+-	status = "disabled";
+-};
+-
+-&hdmi1 {
+-	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
+-	clock-names = "hdmi", "bvb", "audio", "cec";
+-	status = "disabled";
+-};
+-
+-&hvs {
+-	clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
+-	clock-names = "core", "disp";
+-};
+-
+-&mop {
+-	status = "disabled";
+-};
+-
+-&moplet {
+-	status = "disabled";
+-};
+-
+-&pixelvalve0 {
+-	status = "disabled";
+-};
+-
+-&pixelvalve1 {
+-	status = "disabled";
+-};
+-
+-&disp_intr {
+-	status = "disabled";
+-};
+-
+-/* SDIO1 is used to drive the SD card */
+-&sdio1 {
+-	pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>;
+-	pinctrl-names = "default";
+-	vqmmc-supply = <&sd_io_1v8_reg>;
+-	vmmc-supply = <&sd_vcc_reg>;
+-	bus-width = <4>;
+-	sd-uhs-sdr50;
+-	sd-uhs-ddr50;
+-	sd-uhs-sdr104;
+-	cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>;
+-	//no-1-8-v;
+-	status = "okay";
+-};
+-
+-&pinctrl_aon {
+-	emmc_aon_cd_pins: emmc_aon_cd_pins {
+-		function = "sd_card_g";
+-		pins = "aon_gpio5";
+-		bias-pull-up;
+-	};
+-
+-	/* Slight hack - only one PWM pin (status LED) is usable */
+-	aon_pwm_1pin: aon_pwm_1pin {
+-		function = "aon_pwm";
+-		pins = "aon_gpio9";
+-	};
+-};
+-
+-&pinctrl {
+-	pwr_button_pins: pwr_button_pins {
+-		function = "gpio";
+-		pins = "gpio20";
+-		bias-pull-up;
+-	};
+-
+-	wl_on_pins: wl_on_pins {
+-		function = "gpio";
+-		pins = "gpio28";
+-	};
+-
+-	bt_shutdown_pins: bt_shutdown_pins {
+-		function = "gpio";
+-		pins = "gpio29";
+-	};
+-
+-	emmc_sd_pulls: emmc_sd_pulls {
+-		pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";
+-		bias-pull-up;
+-	};
+-};
+-
+-/* uarta communicates with the BT module */
+-&uarta {
+-	uart-has-rtscts;
+-	auto-flow-control;
+-	status = "okay";
+-	clock-frequency = <96000000>;
+-	pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
+-	pinctrl-names = "default";
+-
+-	bluetooth: bluetooth {
+-		compatible = "brcm,bcm43438-bt";
+-		max-speed = <3000000>;
+-		shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
+-		local-bd-address = [ 00 00 00 00 00 00 ];
+-	};
+-};
+-
+-&i2c_rp1boot {
+-	clock-frequency = <400000>;
+-	pinctrl-0 = <&i2c3_m4_agpio0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-/ {
+-	chosen: chosen {
+-		bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe";
+-		stdout-path = "serial10:115200n8";
+-	};
+-
+-	fan: cooling_fan {
+-		status = "disabled";
+-		compatible = "pwm-fan";
+-		#cooling-cells = <2>;
+-		cooling-min-state = <0>;
+-		cooling-max-state = <3>;
+-		cooling-levels = <0 75 125 175 250>;
+-		pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
+-		rpm-regmap = <&rp1_pwm1>;
+-		rpm-offset = <0x3c>;
+-	};
+-
+-	pwr_button {
+-		compatible = "gpio-keys";
+-
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pwr_button_pins>;
+-		status = "okay";
+-
+-		pwr_key: pwr {
+-			label = "pwr_button";
+-			// linux,code = <205>; // KEY_SUSPEND
+-			linux,code = <116>; // KEY_POWER
+-			gpios = <&gio 20 GPIO_ACTIVE_LOW>;
+-			debounce-interval = <50>; // ms
+-		};
+-	};
+-};
+-
+-&usb {
+-	power-domains = <&power RPI_POWER_DOMAIN_USB>;
+-};
+-
+-/* SDIO2 drives the WLAN interface */
+-&sdio2 {
+-	pinctrl-0 = <&sdio2_30_pins>;
+-	pinctrl-names = "default";
+-	bus-width = <4>;
+-	vmmc-supply = <&wl_on_reg>;
+-	sd-uhs-ddr50;
+-	non-removable;
+-	status = "okay";
+-	#address-cells = <1>;
+-	#size-cells = <0>;
+-
+-	wifi: wifi@1 {
+-		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+-		local-mac-address = [00 00 00 00 00 00];
+-	};
+-};
+-
+-&rpivid {
+-	status = "okay";
+-};
+-
+-&pinctrl {
+-	spi10_gpio2: spi10_gpio2 {
+-		function = "vc_spi0";
+-		pins = "gpio2", "gpio3", "gpio4";
+-		bias-disable;
+-	};
+-
+-	spi10_cs_gpio1: spi10_cs_gpio1 {
+-		function = "gpio";
+-		pins = "gpio1";
+-		bias-pull-up;
+-	};
+-};
+-
+-spi10_pins: &spi10_gpio2 {};
+-spi10_cs_pins: &spi10_cs_gpio1 {};
+-
+-&spi10 {
+-	pinctrl-names = "default";
+-	cs-gpios = <&gio 1 1>;
+-	pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
+-
+-	spidev10: spidev@0 {
+-		compatible = "spidev";
+-		reg = <0>;	/* CE0 */
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		spi-max-frequency = <20000000>;
+-		status = "okay";
+-	};
+-};
+-
+-// =============================================
+-// Board specific stuff here
+-
+-&gio_aon {
+-	// Don't use GIO_AON as an interrupt controller because it will
+-	// clash with the firmware monitoring the PMIC interrupt via the VPU.
+-
+-	/delete-property/ interrupt-controller;
+-};
+-
+-&main_aon_irq {
+-	// Don't use the MAIN_AON_IRQ interrupt controller because it will
+-	// clash with the firmware monitoring the PMIC interrupt via the VPU.
+-
+-	status = "disabled";
+-};
+-
+-&rp1_pwm1 {
+-	status = "disabled";
+-	pinctrl-0 = <&rp1_pwm1_gpio45>;
+-	pinctrl-names = "default";
+-};
+-
+-&thermal_trips {
+-	cpu_tepid: cpu-tepid {
+-		temperature = <50000>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-
+-	cpu_warm: cpu-warm {
+-		temperature = <60000>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-
+-	cpu_hot: cpu-hot {
+-		temperature = <67500>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-
+-	cpu_vhot: cpu-vhot {
+-		temperature = <75000>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-};
+-
+-&cooling_maps {
+-	tepid {
+-		trip = <&cpu_tepid>;
+-		cooling-device = <&fan 1 1>;
+-	};
+-
+-	warm {
+-		trip = <&cpu_warm>;
+-		cooling-device = <&fan 2 2>;
+-	};
+-
+-	hot {
+-		trip = <&cpu_hot>;
+-		cooling-device = <&fan 3 3>;
+-	};
+-
+-	vhot {
+-		trip = <&cpu_vhot>;
+-		cooling-device = <&fan 4 4>;
+-	};
+-
+-	melt {
+-		trip = <&cpu_crit>;
+-		cooling-device = <&fan 4 4>;
+-	};
+-};
+-
+-&gio {
+-	// The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
+-	// to reduce the clutter in gpioinfo/pinctrl
+-	brcm,gpio-bank-widths = <32 4>;
+-
+-	gpio-line-names =
+-		"-", // GPIO_000
+-		"2712_BOOT_CS_N", // GPIO_001
+-		"2712_BOOT_MISO", // GPIO_002
+-		"2712_BOOT_MOSI", // GPIO_003
+-		"2712_BOOT_SCLK", // GPIO_004
+-		"-", // GPIO_005
+-		"-", // GPIO_006
+-		"-", // GPIO_007
+-		"-", // GPIO_008
+-		"-", // GPIO_009
+-		"-", // GPIO_010
+-		"-", // GPIO_011
+-		"-", // GPIO_012
+-		"-", // GPIO_013
+-		"PCIE_SDA", // GPIO_014
+-		"PCIE_SCL", // GPIO_015
+-		"-", // GPIO_016
+-		"-", // GPIO_017
+-		"-", // GPIO_018
+-		"-", // GPIO_019
+-		"PWR_GPIO", // GPIO_020
+-		"2712_G21_FS", // GPIO_021
+-		"-", // GPIO_022
+-		"-", // GPIO_023
+-		"BT_RTS", // GPIO_024
+-		"BT_CTS", // GPIO_025
+-		"BT_TXD", // GPIO_026
+-		"BT_RXD", // GPIO_027
+-		"WL_ON", // GPIO_028
+-		"BT_ON", // GPIO_029
+-		"WIFI_SDIO_CLK", // GPIO_030
+-		"WIFI_SDIO_CMD", // GPIO_031
+-		"WIFI_SDIO_D0", // GPIO_032
+-		"WIFI_SDIO_D1", // GPIO_033
+-		"WIFI_SDIO_D2", // GPIO_034
+-		"WIFI_SDIO_D3"; // GPIO_035
+-};
+-
+-&gio_aon {
+-	gpio-line-names =
+-		"RP1_SDA", // AON_GPIO_00
+-		"RP1_SCL", // AON_GPIO_01
+-		"RP1_RUN", // AON_GPIO_02
+-		"SD_IOVDD_SEL", // AON_GPIO_03
+-		"SD_PWR_ON", // AON_GPIO_04
+-		"SD_CDET_N", // AON_GPIO_05
+-		"SD_FLG_N", // AON_GPIO_06
+-		"-", // AON_GPIO_07
+-		"2712_WAKE", // AON_GPIO_08
+-		"2712_STAT_LED", // AON_GPIO_09
+-		"-", // AON_GPIO_10
+-		"-", // AON_GPIO_11
+-		"PMIC_INT", // AON_GPIO_12
+-		"UART_TX_FS", // AON_GPIO_13
+-		"UART_RX_FS", // AON_GPIO_14
+-		"-", // AON_GPIO_15
+-		"-", // AON_GPIO_16
+-
+-		// Pad bank0 out to 32 entries
+-		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+-
+-		"HDMI0_SCL", // AON_SGPIO_00
+-		"HDMI0_SDA", // AON_SGPIO_01
+-		"HDMI1_SCL", // AON_SGPIO_02
+-		"HDMI1_SDA", // AON_SGPIO_03
+-		"PMIC_SCL", // AON_SGPIO_04
+-		"PMIC_SDA"; // AON_SGPIO_05
+-
+-	rp1_run_hog {
+-		gpio-hog;
+-		gpios = <2 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "RP1 RUN pin";
+-	};
+-};
+-
+-&rp1_gpio {
+-	gpio-line-names =
+-		"ID_SDA", // GPIO0
+-		"ID_SCL", // GPIO1
+-		"GPIO2", // GPIO2
+-		"GPIO3", // GPIO3
+-		"GPIO4", // GPIO4
+-		"GPIO5", // GPIO5
+-		"GPIO6", // GPIO6
+-		"GPIO7", // GPIO7
+-		"GPIO8", // GPIO8
+-		"GPIO9", // GPIO9
+-		"GPIO10", // GPIO10
+-		"GPIO11", // GPIO11
+-		"GPIO12", // GPIO12
+-		"GPIO13", // GPIO13
+-		"GPIO14", // GPIO14
+-		"GPIO15", // GPIO15
+-		"GPIO16", // GPIO16
+-		"GPIO17", // GPIO17
+-		"GPIO18", // GPIO18
+-		"GPIO19", // GPIO19
+-		"GPIO20", // GPIO20
+-		"GPIO21", // GPIO21
+-		"GPIO22", // GPIO22
+-		"GPIO23", // GPIO23
+-		"GPIO24", // GPIO24
+-		"GPIO25", // GPIO25
+-		"GPIO26", // GPIO26
+-		"GPIO27", // GPIO27
+-
+-		"PCIE_RP1_WAKE", // GPIO28
+-		"FAN_TACH", // GPIO29
+-		"HOST_SDA", // GPIO30
+-		"HOST_SCL", // GPIO31
+-		"ETH_RST_N", // GPIO32
+-		"-", // GPIO33
+-
+-		"CD0_IO0_MICCLK", // GPIO34
+-		"CD0_IO0_MICDAT0", // GPIO35
+-		"RP1_PCIE_CLKREQ_N", // GPIO36
+-		"-", // GPIO37
+-		"CD0_SDA", // GPIO38
+-		"CD0_SCL", // GPIO39
+-		"CD1_SDA", // GPIO40
+-		"CD1_SCL", // GPIO41
+-		"USB_VBUS_EN", // GPIO42
+-		"USB_OC_N", // GPIO43
+-		"RP1_STAT_LED", // GPIO44
+-		"FAN_PWM", // GPIO45
+-		"CD1_IO0_MICCLK", // GPIO46
+-		"2712_WAKE", // GPIO47
+-		"CD1_IO1_MICDAT1", // GPIO48
+-		"EN_MAX_USB_CUR", // GPIO49
+-		"-", // GPIO50
+-		"-", // GPIO51
+-		"-", // GPIO52
+-		"-"; // GPIO53
+-
+-	usb_vbus_pins: usb_vbus_pins {
+-		function = "vbus1";
+-		pins = "gpio42", "gpio43";
+-	};
+-};
+-
+-/ {
+-	aliases: aliases {
+-		blconfig = &blconfig;
+-		blpubkey = &blpubkey;
+-		bluetooth = &bluetooth;
+-		console = &uart10;
+-		ethernet0 = &rp1_eth;
+-		wifi0 = &wifi;
+-		fb = &fb;
+-		mailbox = &mailbox;
+-		mmc0 = &sdio1;
+-		uart0 = &uart0;
+-		uart1 = &uart1;
+-		uart2 = &uart2;
+-		uart3 = &uart3;
+-		uart4 = &uart4;
+-		uart10 = &uart10;
+-		serial0 = &uart0;
+-		serial1 = &uart1;
+-		serial2 = &uart2;
+-		serial3 = &uart3;
+-		serial4 = &uart4;
+-		serial10 = &uart10;
+-		i2c = &i2c_arm;
+-		i2c0 = &i2c0;
+-		i2c1 = &i2c1;
+-		i2c2 = &i2c2;
+-		i2c3 = &i2c3;
+-		i2c4 = &i2c4;
+-		i2c5 = &i2c5;
+-		i2c6 = &i2c6;
+-		i2c10 = &i2c_rp1boot;
+-		// Bit-bashed i2c_gpios start at 10
+-		spi0 = &spi0;
+-		spi1 = &spi1;
+-		spi2 = &spi2;
+-		spi3 = &spi3;
+-		spi4 = &spi4;
+-		spi5 = &spi5;
+-		spi10 = &spi10;
+-		gpio0 = &gpio;
+-		gpio1 = &gio;
+-		gpio2 = &gio_aon;
+-		gpio3 = &pinctrl;
+-		gpio4 = &pinctrl_aon;
+-		usb0 = &rp1_usb0;
+-		usb1 = &rp1_usb1;
+-		drm-dsi1 = &dsi0;
+-		drm-dsi2 = &dsi1;
+-	};
+-
+-	__overrides__ {
+-		bdaddr = <&bluetooth>, "local-bd-address[";
+-		button_debounce = <&pwr_key>, "debounce-interval:0";
+-		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
+-		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
+-		i2c0 = <&i2c0>, "status";
+-		i2c1 = <&i2c1>, "status";
+-		i2c = <&i2c1>, "status";
+-		i2c_arm = <&i2c_arm>, "status";
+-		i2c_vc = <&i2c_vc>, "status";
+-		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+-		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
+-		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
+-		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
+-		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
+-		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
+-		krnbt = <&bluetooth>, "status";
+-		nvme = <&pciex1>, "status";
+-		pciex1 = <&pciex1>, "status";
+-		pciex1_gen = <&pciex1> , "max-link-speed:0";
+-		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
+-		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		random = <&random>, "status";
+-		rtc = <&rpi_rtc>, "status";
+-		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
+-		sd_cqe = <&sdio1>, "supports-cqe?";
+-		spi = <&spi0>, "status";
+-		suspend = <&pwr_key>, "linux,code:0=205";
+-		uart0 = <&uart0>, "status";
+-		wifiaddr = <&wifi>, "local-mac-address[";
+-
+-		act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>;
+-		act_led_activelow = <&led_act>,"gpios:8";
+-		act_led_trigger = <&led_act>, "linux,default-trigger";
+-		pwr_led_gpio = <&led_pwr>,"gpios:4";
+-		pwr_led_activelow = <&led_pwr>, "gpios:8";
+-		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
+-		eth_led0 = <&phy1>,"led-modes:0";
+-		eth_led1 = <&phy1>,"led-modes:4";
+-		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
+-		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
+-		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
+-		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
+-		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
+-		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
+-		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
+-		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
+-		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
+-		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
+-		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
+-		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
+-
+-		fan_temp0 = <&cpu_tepid>,"temperature:0";
+-		fan_temp1 = <&cpu_warm>,"temperature:0";
+-		fan_temp2 = <&cpu_hot>,"temperature:0";
+-		fan_temp3 = <&cpu_vhot>,"temperature:0";
+-		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
+-		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
+-		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
+-		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
+-		fan_temp0_speed = <&fan>, "cooling-levels:4";
+-		fan_temp1_speed = <&fan>, "cooling-levels:8";
+-		fan_temp2_speed = <&fan>, "cooling-levels:12";
+-		fan_temp3_speed = <&fan>, "cooling-levels:16";
+-	};
+-};
+--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
++++ /dev/null
+@@ -1,20 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-/dts-v1/;
+-
+-#include "bcm2712-rpi-cm5.dtsi"
+-
+-// The RP1 USB3 interfaces are not usable on CM4IO
+-
+-&rp1_usb0 {
+-	status = "disabled";
+-};
+-
+-&rp1_usb1 {
+-	status = "disabled";
+-};
+-
+-/ {
+-	__overrides__ {
+-		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+-	};
+-};
+--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
++++ /dev/null
+@@ -1,10 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-/dts-v1/;
+-
+-#include "bcm2712-rpi-cm5.dtsi"
+-
+-/ {
+-	__overrides__ {
+-		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+-	};
+-};
+--- a/arch/arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
++++ /dev/null
+@@ -1,107 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-#include "bcm2712-rpi-5-b.dts"
+-
+-&gio {
+-	brcm,gpio-bank-widths = <32 4>;
+-
+-	gpio-line-names =
+-		"", // GPIO_000
+-		"2712_BOOT_CS_N", // GPIO_001
+-		"2712_BOOT_MISO", // GPIO_002
+-		"2712_BOOT_MOSI", // GPIO_003
+-		"2712_BOOT_SCLK", // GPIO_004
+-		"", // GPIO_005
+-		"", // GPIO_006
+-		"", // GPIO_007
+-		"", // GPIO_008
+-		"", // GPIO_009
+-		"", // GPIO_010
+-		"", // GPIO_011
+-		"", // GPIO_012
+-		"", // GPIO_013
+-		"PCIE_SDA", // GPIO_014
+-		"PCIE_SCL", // GPIO_015
+-		"", // GPIO_016
+-		"", // GPIO_017
+-		"-", // GPIO_018
+-		"-", // GPIO_019
+-		"PWR_GPIO", // GPIO_020
+-		"2712_G21_FS", // GPIO_021
+-		"-", // GPIO_022
+-		"-", // GPIO_023
+-		"BT_RTS", // GPIO_024
+-		"BT_CTS", // GPIO_025
+-		"BT_TXD", // GPIO_026
+-		"BT_RXD", // GPIO_027
+-		"WL_ON", // GPIO_028
+-		"BT_ON", // GPIO_029
+-		"WIFI_SDIO_CLK", // GPIO_030
+-		"WIFI_SDIO_CMD", // GPIO_031
+-		"WIFI_SDIO_D0", // GPIO_032
+-		"WIFI_SDIO_D1", // GPIO_033
+-		"WIFI_SDIO_D2", // GPIO_034
+-		"WIFI_SDIO_D3"; // GPIO_035
+-};
+-
+-&gio_aon {
+-	brcm,gpio-bank-widths = <15 6>;
+-
+-	gpio-line-names =
+-		"RP1_SDA", // AON_GPIO_00
+-		"RP1_SCL", // AON_GPIO_01
+-		"RP1_RUN", // AON_GPIO_02
+-		"SD_IOVDD_SEL", // AON_GPIO_03
+-		"SD_PWR_ON", // AON_GPIO_04
+-		"SD_CDET_N", // AON_GPIO_05
+-		"SD_FLG_N", // AON_GPIO_06
+-		"", // AON_GPIO_07
+-		"2712_WAKE", // AON_GPIO_08
+-		"2712_STAT_LED", // AON_GPIO_09
+-		"", // AON_GPIO_10
+-		"", // AON_GPIO_11
+-		"PMIC_INT", // AON_GPIO_12
+-		"UART_TX_FS", // AON_GPIO_13
+-		"UART_RX_FS", // AON_GPIO_14
+-		"", // AON_GPIO_15
+-		"", // AON_GPIO_16
+-
+-		// Pad bank0 out to 32 entries
+-		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+-
+-		"HDMI0_SCL", // AON_SGPIO_00
+-		"HDMI0_SDA", // AON_SGPIO_01
+-		"HDMI1_SCL", // AON_SGPIO_02
+-		"HDMI1_SDA", // AON_SGPIO_03
+-		"PMIC_SCL", // AON_SGPIO_04
+-		"PMIC_SDA"; // AON_SGPIO_05
+-};
+-
+-&pinctrl {
+-	compatible = "brcm,bcm2712d0-pinctrl";
+-	reg = <0x7d504100 0x20>;
+-};
+-
+-&pinctrl_aon {
+-	compatible = "brcm,bcm2712d0-aon-pinctrl";
+-	reg = <0x7d510700 0x1c>;
+-};
+-
+-&vc4 {
+-	compatible = "brcm,bcm2712d0-vc6";
+-};
+-
+-&uart10 {
+-	interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+-};
+-
+-&spi10 {
+-	dmas = <&dma40 3>, <&dma40 4>;
+-};
+-
+-&hdmi0 {
+-	dmas = <&dma40 (12|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+-};
+-
+-&hdmi1 {
+-	dmas = <&dma40 (13|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+-};
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+@@ -1,2 +1,867 @@
+ // SPDX-License-Identifier: GPL-2.0
+-#include "arm/broadcom/bcm2712-rpi-5-b.dts"
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/clock/rp1.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/mfd/rp1.h>
++#include <dt-bindings/pwm/pwm.h>
++#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
++
++#define i2c0 _i2c0
++#define i2c3 _i2c3
++#define i2c4 _i2c4
++#define i2c5 _i2c5
++#define i2c6 _i2c6
++#define i2c8 _i2c8
++#define i2s _i2s
++#define pwm0 _pwm0
++#define pwm1 _pwm1
++#define spi0 _spi0
++#define spi3 _spi3
++#define spi4 _spi4
++#define spi5 _spi5
++#define spi6 _spi6
++#define uart0 _uart0
++#define uart2 _uart2
++#define uart5 _uart5
++
++#include "bcm2712.dtsi"
++
++#undef i2c0
++#undef i2c3
++#undef i2c4
++#undef i2c5
++#undef i2c6
++#undef i2c8
++#undef i2s
++#undef pwm0
++#undef pwm1
++#undef spi0
++#undef spi3
++#undef spi4
++#undef spi5
++#undef spi6
++#undef uart0
++#undef uart2
++#undef uart3
++#undef uart4
++#undef uart5
++
++/ {
++	compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
++	model = "Raspberry Pi 5";
++
++	/* Will be filled by the bootloader */
++	memory@0 {
++		device_type = "memory";
++		reg = <0 0 0x28000000>;
++	};
++
++	leds: leds {
++		compatible = "gpio-leds";
++
++		led_pwr: led-pwr {
++			label = "PWR";
++			gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++			linux,default-trigger = "none";
++		};
++
++		led_act: led-act {
++			label = "ACT";
++			gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++			linux,default-trigger = "mmc0";
++		};
++	};
++
++	sd_io_1v8_reg: sd_io_1v8_reg {
++		compatible = "regulator-gpio";
++		regulator-name = "vdd-sd-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		regulator-always-on;
++		regulator-settling-time-us = <5000>;
++		gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
++		states = <1800000 0x1
++			  3300000 0x0>;
++		status = "okay";
++	};
++
++	sd_vcc_reg: sd_vcc_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-sd";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		enable-active-high;
++		gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
++	wl_on_reg: wl_on_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "wl-on-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		pinctrl-0 = <&wl_on_pins>;
++		pinctrl-names = "default";
++
++		gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
++
++		startup-delay-us = <150000>;
++		enable-active-high;
++	};
++
++	clocks: clocks {
++	};
++
++	cam1_clk: cam1_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		status = "disabled";
++	};
++
++	cam0_clk: cam0_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		status = "disabled";
++	};
++
++	cam0_reg: cam0_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "cam0_reg";
++		enable-active-high;
++		status = "okay";
++		gpio = <&rp1_gpio 34 0>;  // CD0_IO0_MICCLK, to MIPI 0 connector
++	};
++
++	cam1_reg: cam1_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "cam1_reg";
++		enable-active-high;
++		status = "okay";
++		gpio = <&rp1_gpio 46 0>;  // CD1_IO0_MICCLK, to MIPI 1 connector
++	};
++
++	cam_dummy_reg: cam_dummy_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "cam-dummy-reg";
++		status = "okay";
++	};
++
++	dummy: dummy {
++		// A target for unwanted overlay fragments
++	};
++
++
++	// A few extra labels to keep overlays happy
++
++	i2c0if: i2c0if {};
++	i2c0mux: i2c0mux {};
++};
++
++rp1_target: &pcie2 {
++	brcm,enable-mps-rcb;
++	brcm,vdm-qos-map = <0xbbaa9888>;
++	aspm-no-l0s;
++	status = "okay";
++};
++
++&pcie1 {
++	brcm,vdm-qos-map = <0x33333333>;
++};
++
++// Add some labels to 2712 device
++
++// The system UART
++uart10: &_uart0 { status = "okay"; };
++
++// The system SPI for the bootloader EEPROM
++spi10: &_spi0 { status = "okay"; };
++
++i2c_rp1boot: &_i2c3 { };
++
++#include "rp1.dtsi"
++
++&rp1 {
++	// PCIe address space layout:
++	// 00_00000000-00_00xxxxxx = RP1 peripherals
++	// 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
++
++	// outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
++	// This is the RP1 peripheral space
++	ranges = <0xc0 0x40000000
++		  0x02000000 0x00 0x00000000
++		  0x00 0x00400000>;
++
++	dma-ranges =
++	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
++		     <0x10 0x00000000
++		      0x43000000 0x10 0x00000000
++		      0x10 0x00000000>,
++
++	// inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
++	// This allows the RP1 DMA controller to address RP1 hardware
++		     <0xc0 0x40000000
++		      0x02000000 0x0 0x00000000
++		      0x0 0x00400000>,
++
++	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
++		     <0x00 0x00000000
++		      0x02000000 0x10 0x00000000
++		      0x10 0x00000000>;
++};
++
++// Expose RP1 nodes as system nodes with labels
++
++&rp1_dma  {
++	status = "okay";
++};
++
++&rp1_eth {
++	status = "okay";
++	phy-handle = <&phy1>;
++	phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
++	phy-reset-duration = <5>;
++
++	phy1: ethernet-phy@1 {
++		reg = <0x1>;
++		brcm,powerdown-enable;
++	};
++};
++
++gpio: &rp1_gpio {
++	status = "okay";
++};
++
++aux: &dummy {};
++
++&rp1_usb0 {
++	pinctrl-0 = <&usb_vbus_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&rp1_usb1 {
++	status = "okay";
++};
++
++#include "bcm2712-rpi.dtsi"
++
++i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
++	pinctrl-0 = <&rp1_i2c6_38_39>;
++	pinctrl-names = "default";
++	clock-frequency = <100000>;
++};
++
++i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only
++	pinctrl-0 = <&rp1_i2c4_40_41>;
++	pinctrl-names = "default";
++	clock-frequency = <100000>;
++};
++
++i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
++
++csi0: &rp1_csi0 { };
++csi1: &rp1_csi1 { };
++dsi0: &rp1_dsi0 { };
++dsi1: &rp1_dsi1 { };
++dpi: &rp1_dpi { };
++vec: &rp1_vec { };
++dpi_gpio0:              &rp1_dpi_24bit_gpio0        { };
++dpi_gpio1:              &rp1_dpi_24bit_gpio2        { };
++dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
++dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
++dpi_18bit_gpio0:        &rp1_dpi_18bit_gpio0        { };
++dpi_18bit_gpio2:        &rp1_dpi_18bit_gpio2        { };
++dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
++dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
++dpi_16bit_gpio0:        &rp1_dpi_16bit_gpio0        { };
++dpi_16bit_gpio2:        &rp1_dpi_16bit_gpio2        { };
++
++/* Add the IOMMUs for some RP1 bus masters */
++
++&csi0 {
++	iommus = <&iommu5>;
++};
++
++&csi1 {
++	iommus = <&iommu5>;
++};
++
++&dsi0 {
++	iommus = <&iommu5>;
++};
++
++&dsi1 {
++	iommus = <&iommu5>;
++};
++
++&dpi {
++	iommus = <&iommu5>;
++};
++
++&vec {
++	iommus = <&iommu5>;
++};
++
++&ddc0 {
++	status = "disabled";
++};
++
++&ddc1 {
++	status = "disabled";
++};
++
++&hdmi0 {
++	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
++	clock-names = "hdmi", "bvb", "audio", "cec";
++	status = "disabled";
++};
++
++&hdmi1 {
++	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
++	clock-names = "hdmi", "bvb", "audio", "cec";
++	status = "disabled";
++};
++
++&hvs {
++	clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
++	clock-names = "core", "disp";
++};
++
++&mop {
++	status = "disabled";
++};
++
++&moplet {
++	status = "disabled";
++};
++
++&pixelvalve0 {
++	status = "disabled";
++};
++
++&pixelvalve1 {
++	status = "disabled";
++};
++
++&disp_intr {
++	status = "disabled";
++};
++
++/* SDIO1 is used to drive the SD card */
++&sdio1 {
++	pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>;
++	pinctrl-names = "default";
++	vqmmc-supply = <&sd_io_1v8_reg>;
++	vmmc-supply = <&sd_vcc_reg>;
++	bus-width = <4>;
++	sd-uhs-sdr50;
++	sd-uhs-ddr50;
++	sd-uhs-sdr104;
++	cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>;
++	//no-1-8-v;
++	status = "okay";
++};
++
++&pinctrl_aon {
++	emmc_aon_cd_pins: emmc_aon_cd_pins {
++		function = "sd_card_g";
++		pins = "aon_gpio5";
++		bias-pull-up;
++	};
++
++	/* Slight hack - only one PWM pin (status LED) is usable */
++	aon_pwm_1pin: aon_pwm_1pin {
++		function = "aon_pwm";
++		pins = "aon_gpio9";
++	};
++};
++
++&pinctrl {
++	pwr_button_pins: pwr_button_pins {
++		function = "gpio";
++		pins = "gpio20";
++		bias-pull-up;
++	};
++
++	wl_on_pins: wl_on_pins {
++		function = "gpio";
++		pins = "gpio28";
++	};
++
++	bt_shutdown_pins: bt_shutdown_pins {
++		function = "gpio";
++		pins = "gpio29";
++	};
++
++	emmc_sd_pulls: emmc_sd_pulls {
++		pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";
++		bias-pull-up;
++	};
++};
++
++/* uarta communicates with the BT module */
++&uarta {
++	uart-has-rtscts;
++	auto-flow-control;
++	status = "okay";
++	clock-frequency = <96000000>;
++	pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
++	pinctrl-names = "default";
++
++	bluetooth: bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		max-speed = <3000000>;
++		shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
++		local-bd-address = [ 00 00 00 00 00 00 ];
++	};
++};
++
++&i2c_rp1boot {
++	clock-frequency = <400000>;
++	pinctrl-0 = <&i2c3_m4_agpio0_pins>;
++	pinctrl-names = "default";
++};
++
++/ {
++	chosen: chosen {
++		bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe";
++		stdout-path = "serial10:115200n8";
++	};
++
++	fan: cooling_fan {
++		status = "disabled";
++		compatible = "pwm-fan";
++		#cooling-cells = <2>;
++		cooling-min-state = <0>;
++		cooling-max-state = <3>;
++		cooling-levels = <0 75 125 175 250>;
++		pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
++		rpm-regmap = <&rp1_pwm1>;
++		rpm-offset = <0x3c>;
++	};
++
++	pwr_button {
++		compatible = "gpio-keys";
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&pwr_button_pins>;
++		status = "okay";
++
++		pwr_key: pwr {
++			label = "pwr_button";
++			// linux,code = <205>; // KEY_SUSPEND
++			linux,code = <116>; // KEY_POWER
++			gpios = <&gio 20 GPIO_ACTIVE_LOW>;
++			debounce-interval = <50>; // ms
++		};
++	};
++};
++
++&usb {
++	power-domains = <&power RPI_POWER_DOMAIN_USB>;
++};
++
++/* SDIO2 drives the WLAN interface */
++&sdio2 {
++	pinctrl-0 = <&sdio2_30_pins>;
++	pinctrl-names = "default";
++	bus-width = <4>;
++	vmmc-supply = <&wl_on_reg>;
++	sd-uhs-ddr50;
++	non-removable;
++	status = "okay";
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	wifi: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++		local-mac-address = [00 00 00 00 00 00];
++	};
++};
++
++&rpivid {
++	status = "okay";
++};
++
++&pinctrl {
++	spi10_gpio2: spi10_gpio2 {
++		function = "vc_spi0";
++		pins = "gpio2", "gpio3", "gpio4";
++		bias-disable;
++	};
++
++	spi10_cs_gpio1: spi10_cs_gpio1 {
++		function = "gpio";
++		pins = "gpio1";
++		bias-pull-up;
++	};
++};
++
++spi10_pins: &spi10_gpio2 {};
++spi10_cs_pins: &spi10_cs_gpio1 {};
++
++&spi10 {
++	pinctrl-names = "default";
++	cs-gpios = <&gio 1 1>;
++	pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
++
++	spidev10: spidev@0 {
++		compatible = "spidev";
++		reg = <0>;	/* CE0 */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		spi-max-frequency = <20000000>;
++		status = "okay";
++	};
++};
++
++// =============================================
++// Board specific stuff here
++
++&gio_aon {
++	// Don't use GIO_AON as an interrupt controller because it will
++	// clash with the firmware monitoring the PMIC interrupt via the VPU.
++
++	/delete-property/ interrupt-controller;
++};
++
++&main_aon_irq {
++	// Don't use the MAIN_AON_IRQ interrupt controller because it will
++	// clash with the firmware monitoring the PMIC interrupt via the VPU.
++
++	status = "disabled";
++};
++
++&rp1_pwm1 {
++	status = "disabled";
++	pinctrl-0 = <&rp1_pwm1_gpio45>;
++	pinctrl-names = "default";
++};
++
++&thermal_trips {
++	cpu_tepid: cpu-tepid {
++		temperature = <50000>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++
++	cpu_warm: cpu-warm {
++		temperature = <60000>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++
++	cpu_hot: cpu-hot {
++		temperature = <67500>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++
++	cpu_vhot: cpu-vhot {
++		temperature = <75000>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++};
++
++&cooling_maps {
++	tepid {
++		trip = <&cpu_tepid>;
++		cooling-device = <&fan 1 1>;
++	};
++
++	warm {
++		trip = <&cpu_warm>;
++		cooling-device = <&fan 2 2>;
++	};
++
++	hot {
++		trip = <&cpu_hot>;
++		cooling-device = <&fan 3 3>;
++	};
++
++	vhot {
++		trip = <&cpu_vhot>;
++		cooling-device = <&fan 4 4>;
++	};
++
++	melt {
++		trip = <&cpu_crit>;
++		cooling-device = <&fan 4 4>;
++	};
++};
++
++&gio {
++	// The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
++	// to reduce the clutter in gpioinfo/pinctrl
++	brcm,gpio-bank-widths = <32 4>;
++
++	gpio-line-names =
++		"-", // GPIO_000
++		"2712_BOOT_CS_N", // GPIO_001
++		"2712_BOOT_MISO", // GPIO_002
++		"2712_BOOT_MOSI", // GPIO_003
++		"2712_BOOT_SCLK", // GPIO_004
++		"-", // GPIO_005
++		"-", // GPIO_006
++		"-", // GPIO_007
++		"-", // GPIO_008
++		"-", // GPIO_009
++		"-", // GPIO_010
++		"-", // GPIO_011
++		"-", // GPIO_012
++		"-", // GPIO_013
++		"PCIE_SDA", // GPIO_014
++		"PCIE_SCL", // GPIO_015
++		"-", // GPIO_016
++		"-", // GPIO_017
++		"-", // GPIO_018
++		"-", // GPIO_019
++		"PWR_GPIO", // GPIO_020
++		"2712_G21_FS", // GPIO_021
++		"-", // GPIO_022
++		"-", // GPIO_023
++		"BT_RTS", // GPIO_024
++		"BT_CTS", // GPIO_025
++		"BT_TXD", // GPIO_026
++		"BT_RXD", // GPIO_027
++		"WL_ON", // GPIO_028
++		"BT_ON", // GPIO_029
++		"WIFI_SDIO_CLK", // GPIO_030
++		"WIFI_SDIO_CMD", // GPIO_031
++		"WIFI_SDIO_D0", // GPIO_032
++		"WIFI_SDIO_D1", // GPIO_033
++		"WIFI_SDIO_D2", // GPIO_034
++		"WIFI_SDIO_D3"; // GPIO_035
++};
++
++&gio_aon {
++	gpio-line-names =
++		"RP1_SDA", // AON_GPIO_00
++		"RP1_SCL", // AON_GPIO_01
++		"RP1_RUN", // AON_GPIO_02
++		"SD_IOVDD_SEL", // AON_GPIO_03
++		"SD_PWR_ON", // AON_GPIO_04
++		"SD_CDET_N", // AON_GPIO_05
++		"SD_FLG_N", // AON_GPIO_06
++		"-", // AON_GPIO_07
++		"2712_WAKE", // AON_GPIO_08
++		"2712_STAT_LED", // AON_GPIO_09
++		"-", // AON_GPIO_10
++		"-", // AON_GPIO_11
++		"PMIC_INT", // AON_GPIO_12
++		"UART_TX_FS", // AON_GPIO_13
++		"UART_RX_FS", // AON_GPIO_14
++		"-", // AON_GPIO_15
++		"-", // AON_GPIO_16
++
++		// Pad bank0 out to 32 entries
++		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
++
++		"HDMI0_SCL", // AON_SGPIO_00
++		"HDMI0_SDA", // AON_SGPIO_01
++		"HDMI1_SCL", // AON_SGPIO_02
++		"HDMI1_SDA", // AON_SGPIO_03
++		"PMIC_SCL", // AON_SGPIO_04
++		"PMIC_SDA"; // AON_SGPIO_05
++
++	rp1_run_hog {
++		gpio-hog;
++		gpios = <2 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "RP1 RUN pin";
++	};
++};
++
++&rp1_gpio {
++	gpio-line-names =
++		"ID_SDA", // GPIO0
++		"ID_SCL", // GPIO1
++		"GPIO2", // GPIO2
++		"GPIO3", // GPIO3
++		"GPIO4", // GPIO4
++		"GPIO5", // GPIO5
++		"GPIO6", // GPIO6
++		"GPIO7", // GPIO7
++		"GPIO8", // GPIO8
++		"GPIO9", // GPIO9
++		"GPIO10", // GPIO10
++		"GPIO11", // GPIO11
++		"GPIO12", // GPIO12
++		"GPIO13", // GPIO13
++		"GPIO14", // GPIO14
++		"GPIO15", // GPIO15
++		"GPIO16", // GPIO16
++		"GPIO17", // GPIO17
++		"GPIO18", // GPIO18
++		"GPIO19", // GPIO19
++		"GPIO20", // GPIO20
++		"GPIO21", // GPIO21
++		"GPIO22", // GPIO22
++		"GPIO23", // GPIO23
++		"GPIO24", // GPIO24
++		"GPIO25", // GPIO25
++		"GPIO26", // GPIO26
++		"GPIO27", // GPIO27
++
++		"PCIE_RP1_WAKE", // GPIO28
++		"FAN_TACH", // GPIO29
++		"HOST_SDA", // GPIO30
++		"HOST_SCL", // GPIO31
++		"ETH_RST_N", // GPIO32
++		"-", // GPIO33
++
++		"CD0_IO0_MICCLK", // GPIO34
++		"CD0_IO0_MICDAT0", // GPIO35
++		"RP1_PCIE_CLKREQ_N", // GPIO36
++		"-", // GPIO37
++		"CD0_SDA", // GPIO38
++		"CD0_SCL", // GPIO39
++		"CD1_SDA", // GPIO40
++		"CD1_SCL", // GPIO41
++		"USB_VBUS_EN", // GPIO42
++		"USB_OC_N", // GPIO43
++		"RP1_STAT_LED", // GPIO44
++		"FAN_PWM", // GPIO45
++		"CD1_IO0_MICCLK", // GPIO46
++		"2712_WAKE", // GPIO47
++		"CD1_IO1_MICDAT1", // GPIO48
++		"EN_MAX_USB_CUR", // GPIO49
++		"-", // GPIO50
++		"-", // GPIO51
++		"-", // GPIO52
++		"-"; // GPIO53
++
++	usb_vbus_pins: usb_vbus_pins {
++		function = "vbus1";
++		pins = "gpio42", "gpio43";
++	};
++};
++
++/ {
++	aliases: aliases {
++		blconfig = &blconfig;
++		blpubkey = &blpubkey;
++		bluetooth = &bluetooth;
++		console = &uart10;
++		ethernet0 = &rp1_eth;
++		wifi0 = &wifi;
++		fb = &fb;
++		mailbox = &mailbox;
++		mmc0 = &sdio1;
++		uart0 = &uart0;
++		uart1 = &uart1;
++		uart2 = &uart2;
++		uart3 = &uart3;
++		uart4 = &uart4;
++		uart10 = &uart10;
++		serial0 = &uart0;
++		serial1 = &uart1;
++		serial2 = &uart2;
++		serial3 = &uart3;
++		serial4 = &uart4;
++		serial10 = &uart10;
++		i2c = &i2c_arm;
++		i2c0 = &i2c0;
++		i2c1 = &i2c1;
++		i2c2 = &i2c2;
++		i2c3 = &i2c3;
++		i2c4 = &i2c4;
++		i2c5 = &i2c5;
++		i2c6 = &i2c6;
++		i2c10 = &i2c_rp1boot;
++		// Bit-bashed i2c_gpios start at 10
++		spi0 = &spi0;
++		spi1 = &spi1;
++		spi2 = &spi2;
++		spi3 = &spi3;
++		spi4 = &spi4;
++		spi5 = &spi5;
++		spi10 = &spi10;
++		gpio0 = &gpio;
++		gpio1 = &gio;
++		gpio2 = &gio_aon;
++		gpio3 = &pinctrl;
++		gpio4 = &pinctrl_aon;
++		usb0 = &rp1_usb0;
++		usb1 = &rp1_usb1;
++		drm-dsi1 = &dsi0;
++		drm-dsi2 = &dsi1;
++	};
++
++	__overrides__ {
++		bdaddr = <&bluetooth>, "local-bd-address[";
++		button_debounce = <&pwr_key>, "debounce-interval:0";
++		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
++		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
++		i2c0 = <&i2c0>, "status";
++		i2c1 = <&i2c1>, "status";
++		i2c = <&i2c1>, "status";
++		i2c_arm = <&i2c_arm>, "status";
++		i2c_vc = <&i2c_vc>, "status";
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
++		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
++		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
++		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
++		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
++		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
++		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
++		krnbt = <&bluetooth>, "status";
++		nvme = <&pciex1>, "status";
++		pciex1 = <&pciex1>, "status";
++		pciex1_gen = <&pciex1> , "max-link-speed:0";
++		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
++		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
++		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
++		random = <&random>, "status";
++		rtc = <&rpi_rtc>, "status";
++		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
++		sd_cqe = <&sdio1>, "supports-cqe?";
++		spi = <&spi0>, "status";
++		suspend = <&pwr_key>, "linux,code:0=205";
++		uart0 = <&uart0>, "status";
++		wifiaddr = <&wifi>, "local-mac-address[";
++
++		act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>;
++		act_led_activelow = <&led_act>,"gpios:8";
++		act_led_trigger = <&led_act>, "linux,default-trigger";
++		pwr_led_gpio = <&led_pwr>,"gpios:4";
++		pwr_led_activelow = <&led_pwr>, "gpios:8";
++		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
++		eth_led0 = <&phy1>,"led-modes:0";
++		eth_led1 = <&phy1>,"led-modes:4";
++		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
++		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
++		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
++		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
++		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
++		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
++		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
++		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
++		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
++		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
++		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
++		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
++
++		fan_temp0 = <&cpu_tepid>,"temperature:0";
++		fan_temp1 = <&cpu_warm>,"temperature:0";
++		fan_temp2 = <&cpu_hot>,"temperature:0";
++		fan_temp3 = <&cpu_vhot>,"temperature:0";
++		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
++		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
++		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
++		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
++		fan_temp0_speed = <&fan>, "cooling-levels:4";
++		fan_temp1_speed = <&fan>, "cooling-levels:8";
++		fan_temp2_speed = <&fan>, "cooling-levels:12";
++		fan_temp3_speed = <&fan>, "cooling-levels:16";
++	};
++};
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts
+@@ -1,2 +1,20 @@
+ // SPDX-License-Identifier: GPL-2.0
+-#include "arm/broadcom/bcm2712-rpi-cm5-cm4io.dts"
++/dts-v1/;
++
++#include "bcm2712-rpi-cm5.dtsi"
++
++// The RP1 USB3 interfaces are not usable on CM4IO
++
++&rp1_usb0 {
++	status = "disabled";
++};
++
++&rp1_usb1 {
++	status = "disabled";
++};
++
++/ {
++	__overrides__ {
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++	};
++};
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts
+@@ -1,2 +1,10 @@
+ // SPDX-License-Identifier: GPL-2.0
+-#include "arm/broadcom/bcm2712-rpi-cm5-cm5io.dts"
++/dts-v1/;
++
++#include "bcm2712-rpi-cm5.dtsi"
++
++/ {
++	__overrides__ {
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++	};
++};
+--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
++++ /dev/null
+@@ -1,890 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/clock/rp1.h>
+-#include <dt-bindings/interrupt-controller/irq.h>
+-#include <dt-bindings/mfd/rp1.h>
+-#include <dt-bindings/pwm/pwm.h>
+-#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
+-
+-#define i2c0 _i2c0
+-#define i2c3 _i2c3
+-#define i2c4 _i2c4
+-#define i2c5 _i2c5
+-#define i2c6 _i2c6
+-#define i2c8 _i2c8
+-#define i2s _i2s
+-#define pwm0 _pwm0
+-#define pwm1 _pwm1
+-#define spi0 _spi0
+-#define spi3 _spi3
+-#define spi4 _spi4
+-#define spi5 _spi5
+-#define spi6 _spi6
+-#define uart0 _uart0
+-#define uart2 _uart2
+-#define uart5 _uart5
+-
+-#include "bcm2712.dtsi"
+-
+-#undef i2c0
+-#undef i2c3
+-#undef i2c4
+-#undef i2c5
+-#undef i2c6
+-#undef i2c8
+-#undef i2s
+-#undef pwm0
+-#undef pwm1
+-#undef spi0
+-#undef spi3
+-#undef spi4
+-#undef spi5
+-#undef spi6
+-#undef uart0
+-#undef uart2
+-#undef uart3
+-#undef uart4
+-#undef uart5
+-
+-/ {
+-	compatible = "raspberrypi,5-compute-module", "brcm,bcm2712";
+-	model = "Raspberry Pi Compute Module 5";
+-
+-	/* Will be filled by the bootloader */
+-	memory@0 {
+-		device_type = "memory";
+-		reg = <0 0 0x28000000>;
+-	};
+-
+-	leds: leds {
+-		compatible = "gpio-leds";
+-
+-		led_pwr: led-pwr {
+-			label = "PWR";
+-			gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
+-			default-state = "off";
+-			linux,default-trigger = "none";
+-		};
+-
+-		led_act: led-act {
+-			label = "ACT";
+-			gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
+-			default-state = "off";
+-			linux,default-trigger = "mmc0";
+-		};
+-	};
+-
+-	sd_io_1v8_reg: sd_io_1v8_reg {
+-		compatible = "regulator-gpio";
+-		regulator-name = "vdd-sd-io";
+-		regulator-min-microvolt = <1800000>;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-boot-on;
+-		regulator-always-on;
+-		regulator-settling-time-us = <5000>;
+-		gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
+-		states = <1800000 0x1
+-			  3300000 0x0>;
+-		status = "okay";
+-	};
+-
+-	sd_vcc_reg: sd_vcc_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "vcc-sd";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-boot-on;
+-		enable-active-high;
+-		gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
+-		status = "okay";
+-	};
+-
+-	wl_on_reg: wl_on_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "wl-on-regulator";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		pinctrl-0 = <&wl_on_pins>;
+-		pinctrl-names = "default";
+-
+-		gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
+-
+-		startup-delay-us = <150000>;
+-		enable-active-high;
+-	};
+-
+-	clocks: clocks {
+-	};
+-
+-	cam1_clk: cam1_clk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		status = "disabled";
+-	};
+-
+-	cam0_clk: cam0_clk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		status = "disabled";
+-	};
+-
+-	cam0_reg: cam0_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "cam0_reg";
+-		enable-active-high;
+-		status = "okay";
+-		gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to CAM_GPIO on connector
+-	};
+-
+-	cam_dummy_reg: cam_dummy_reg {
+-		compatible = "regulator-fixed";
+-		regulator-name = "cam-dummy-reg";
+-		status = "okay";
+-	};
+-
+-	dummy: dummy {
+-		// A target for unwanted overlay fragments
+-	};
+-
+-
+-	// A few extra labels to keep overlays happy
+-
+-	i2c0if: i2c0if {};
+-	i2c0mux: i2c0mux {};
+-};
+-
+-rp1_target: &pcie2 {
+-	brcm,enable-mps-rcb;
+-	brcm,vdm-qos-map = <0xbbaa9888>;
+-	aspm-no-l0s;
+-	status = "okay";
+-};
+-
+-// Add some labels to 2712 device
+-
+-// The system UART
+-uart10: &_uart0 { status = "okay"; };
+-
+-// The system SPI for the bootloader EEPROM
+-spi10: &_spi0 { status = "okay"; };
+-
+-i2c_rp1boot: &_i2c3 { };
+-
+-#include "rp1.dtsi"
+-
+-&rp1 {
+-	// PCIe address space layout:
+-	// 00_00000000-00_00xxxxxx = RP1 peripherals
+-	// 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
+-
+-	// outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
+-	// This is the RP1 peripheral space
+-	ranges = <0xc0 0x40000000
+-		  0x02000000 0x00 0x00000000
+-		  0x00 0x00400000>;
+-
+-	dma-ranges =
+-	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
+-		     <0x10 0x00000000
+-		      0x43000000 0x10 0x00000000
+-		      0x10 0x00000000>,
+-
+-	// inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
+-	// This allows the RP1 DMA controller to address RP1 hardware
+-		     <0xc0 0x40000000
+-		      0x02000000 0x0 0x00000000
+-		      0x0 0x00400000>,
+-
+-	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
+-		     <0x00 0x00000000
+-		      0x02000000 0x10 0x00000000
+-		      0x10 0x00000000>;
+-};
+-
+-// Expose RP1 nodes as system nodes with labels
+-
+-&rp1_dma  {
+-	status = "okay";
+-};
+-
+-&rp1_eth {
+-	status = "okay";
+-	phy-handle = <&phy1>;
+-	phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
+-	phy-reset-duration = <5>;
+-
+-	phy1: ethernet-phy@1 {
+-		reg = <0x1>;
+-		brcm,powerdown-enable;
+-		interrupt-parent = <&gpio>;
+-		interrupts = <37 IRQ_TYPE_LEVEL_LOW>;
+-	};
+-};
+-
+-gpio: &rp1_gpio {
+-	status = "okay";
+-};
+-
+-aux: &dummy {};
+-
+-&rp1_usb0 {
+-	pinctrl-0 = <&usb_vbus_pins>;
+-	pinctrl-names = "default";
+-	status = "okay";
+-};
+-
+-&rp1_usb1 {
+-	status = "okay";
+-};
+-
+-#include "bcm2712-rpi.dtsi"
+-
+-i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
+-	pinctrl-0 = <&rp1_i2c6_38_39>;
+-	pinctrl-names = "default";
+-	clock-frequency = <100000>;
+-};
+-
+-i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector
+-};
+-
+-i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
+-
+-cam1_reg: &cam0_reg { // Shares CAM_GPIO with cam0_reg
+-};
+-
+-csi0: &rp1_csi0 { };
+-csi1: &rp1_csi1 { };
+-dsi0: &rp1_dsi0 { };
+-dsi1: &rp1_dsi1 { };
+-dpi: &rp1_dpi { };
+-vec: &rp1_vec { };
+-dpi_gpio0:              &rp1_dpi_24bit_gpio0        { };
+-dpi_gpio1:              &rp1_dpi_24bit_gpio2        { };
+-dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
+-dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
+-dpi_18bit_gpio0:        &rp1_dpi_18bit_gpio0        { };
+-dpi_18bit_gpio2:        &rp1_dpi_18bit_gpio2        { };
+-dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
+-dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
+-dpi_16bit_gpio0:        &rp1_dpi_16bit_gpio0        { };
+-dpi_16bit_gpio2:        &rp1_dpi_16bit_gpio2        { };
+-
+-/* Add the IOMMUs for some RP1 bus masters */
+-
+-&csi0 {
+-	iommus = <&iommu5>;
+-};
+-
+-&csi1 {
+-	iommus = <&iommu5>;
+-};
+-
+-&dsi0 {
+-	iommus = <&iommu5>;
+-};
+-
+-&dsi1 {
+-	iommus = <&iommu5>;
+-};
+-
+-&dpi {
+-	iommus = <&iommu5>;
+-};
+-
+-&vec {
+-	iommus = <&iommu5>;
+-};
+-
+-&ddc0 {
+-	status = "disabled";
+-};
+-
+-&ddc1 {
+-	status = "disabled";
+-};
+-
+-&hdmi0 {
+-	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
+-	clock-names = "hdmi", "bvb", "audio", "cec";
+-	status = "disabled";
+-};
+-
+-&hdmi1 {
+-	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
+-	clock-names = "hdmi", "bvb", "audio", "cec";
+-	status = "disabled";
+-};
+-
+-&hvs {
+-	clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
+-	clock-names = "core", "disp";
+-};
+-
+-&mop {
+-	status = "disabled";
+-};
+-
+-&moplet {
+-	status = "disabled";
+-};
+-
+-&pixelvalve0 {
+-	status = "disabled";
+-};
+-
+-&pixelvalve1 {
+-	status = "disabled";
+-};
+-
+-&disp_intr {
+-	status = "disabled";
+-};
+-
+-/* SDIO1 is used to drive the eMMC/SD card */
+-&sdio1 {
+-	pinctrl-0 = <&emmc_cmddat_pulls>, <&emmc_ds_pull>;
+-	pinctrl-names = "default";
+-	vqmmc-supply = <&sd_io_1v8_reg>;
+-	vmmc-supply = <&sd_vcc_reg>;
+-	bus-width = <8>;
+-	sd-uhs-sdr50;
+-	sd-uhs-ddr50;
+-	sd-uhs-sdr104;
+-	mmc-hs200-1_8v;
+-	mmc-hs400-1_8v;
+-	mmc-hs400-enhanced-strobe;
+-	broken-cd;
+-	supports-cqe;
+-	status = "okay";
+-};
+-
+-&pinctrl_aon {
+-	ant_pins: ant_pins {
+-		function = "gpio";
+-		pins = "aon_gpio5", "aon_gpio6";
+-	};
+-
+-	/* Slight hack - only one PWM pin (status LED) is usable */
+-	aon_pwm_1pin: aon_pwm_1pin {
+-		function = "aon_pwm";
+-		pins = "aon_gpio9";
+-	};
+-};
+-
+-&pinctrl {
+-	pwr_button_pins: pwr_button_pins {
+-		function = "gpio";
+-		pins = "gpio20";
+-		bias-pull-up;
+-	};
+-
+-	wl_on_pins: wl_on_pins {
+-		function = "gpio";
+-		pins = "gpio28";
+-	};
+-
+-	bt_shutdown_pins: bt_shutdown_pins {
+-		function = "gpio";
+-		pins = "gpio29";
+-	};
+-
+-	emmc_ds_pull: emmc_ds_pull {
+-		pins = "emmc_ds";
+-		bias-pull-down;
+-	};
+-
+-	emmc_cmddat_pulls: emmc_cmddat_pulls {
+-		pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3",
+-		       "emmc_dat4", "emmc_dat5", "emmc_dat6", "emmc_dat7";
+-		bias-pull-up;
+-	};
+-};
+-
+-/* uarta communicates with the BT module */
+-&uarta {
+-	uart-has-rtscts;
+-	auto-flow-control;
+-	status = "okay";
+-	clock-frequency = <96000000>;
+-	pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
+-	pinctrl-names = "default";
+-
+-	bluetooth: bluetooth {
+-		compatible = "brcm,bcm43438-bt";
+-		max-speed = <3000000>;
+-		shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
+-		local-bd-address = [ 00 00 00 00 00 00 ];
+-	};
+-};
+-
+-&i2c_rp1boot {
+-	clock-frequency = <400000>;
+-	pinctrl-0 = <&i2c3_m4_agpio0_pins>;
+-	pinctrl-names = "default";
+-};
+-
+-/ {
+-	chosen: chosen {
+-		bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe";
+-		stdout-path = "serial10:115200n8";
+-	};
+-
+-	fan: cooling_fan {
+-		status = "disabled";
+-		compatible = "pwm-fan";
+-		#cooling-cells = <2>;
+-		cooling-min-state = <0>;
+-		cooling-max-state = <3>;
+-		cooling-levels = <0 75 125 175 250>;
+-		pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
+-		rpm-regmap = <&rp1_pwm1>;
+-		rpm-offset = <0x3c>;
+-	};
+-
+-	pwr_button {
+-		compatible = "gpio-keys";
+-
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pwr_button_pins>;
+-		status = "okay";
+-
+-		pwr_key: pwr {
+-			label = "pwr_button";
+-			// linux,code = <205>; // KEY_SUSPEND
+-			linux,code = <116>; // KEY_POWER
+-			gpios = <&gio 20 GPIO_ACTIVE_LOW>;
+-			debounce-interval = <50>; // ms
+-		};
+-	};
+-};
+-
+-&usb {
+-	power-domains = <&power RPI_POWER_DOMAIN_USB>;
+-};
+-
+-/* SDIO2 drives the WLAN interface */
+-&sdio2 {
+-	pinctrl-0 = <&sdio2_30_pins>, <&ant_pins>;
+-	pinctrl-names = "default";
+-	bus-width = <4>;
+-	vmmc-supply = <&wl_on_reg>;
+-	sd-uhs-ddr50;
+-	non-removable;
+-	status = "okay";
+-	#address-cells = <1>;
+-	#size-cells = <0>;
+-
+-	wifi: wifi@1 {
+-		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+-		local-mac-address = [00 00 00 00 00 00];
+-	};
+-};
+-
+-&rpivid {
+-	status = "okay";
+-};
+-
+-&pinctrl {
+-	spi10_gpio2: spi10_gpio2 {
+-		function = "vc_spi0";
+-		pins = "gpio2", "gpio3", "gpio4";
+-		bias-disable;
+-	};
+-
+-	spi10_cs_gpio1: spi10_cs_gpio1 {
+-		function = "gpio";
+-		pins = "gpio1";
+-		bias-pull-up;
+-	};
+-};
+-
+-spi10_pins: &spi10_gpio2 {};
+-spi10_cs_pins: &spi10_cs_gpio1 {};
+-
+-&spi10 {
+-	pinctrl-names = "default";
+-	cs-gpios = <&gio 1 1>;
+-	pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
+-
+-	spidev10: spidev@0 {
+-		compatible = "spidev";
+-		reg = <0>;	/* CE0 */
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		spi-max-frequency = <20000000>;
+-		status = "okay";
+-	};
+-};
+-
+-// =============================================
+-// Board specific stuff here
+-
+-&gio_aon {
+-	// Don't use GIO_AON as an interrupt controller because it will
+-	// clash with the firmware monitoring the PMIC interrupt via the VPU.
+-
+-	/delete-property/ interrupt-controller;
+-};
+-
+-&main_aon_irq {
+-	// Don't use the MAIN_AON_IRQ interrupt controller because it will
+-	// clash with the firmware monitoring the PMIC interrupt via the VPU.
+-
+-	status = "disabled";
+-};
+-
+-&rp1_pwm1 {
+-	status = "disabled";
+-	pinctrl-0 = <&rp1_pwm1_gpio45>;
+-	pinctrl-names = "default";
+-};
+-
+-&thermal_trips {
+-	cpu_tepid: cpu-tepid {
+-		temperature = <50000>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-
+-	cpu_warm: cpu-warm {
+-		temperature = <60000>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-
+-	cpu_hot: cpu-hot {
+-		temperature = <67500>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-
+-	cpu_vhot: cpu-vhot {
+-		temperature = <75000>;
+-		hysteresis = <5000>;
+-		type = "active";
+-	};
+-};
+-
+-&cooling_maps {
+-	tepid {
+-		trip = <&cpu_tepid>;
+-		cooling-device = <&fan 1 1>;
+-	};
+-
+-	warm {
+-		trip = <&cpu_warm>;
+-		cooling-device = <&fan 2 2>;
+-	};
+-
+-	hot {
+-		trip = <&cpu_hot>;
+-		cooling-device = <&fan 3 3>;
+-	};
+-
+-	vhot {
+-		trip = <&cpu_vhot>;
+-		cooling-device = <&fan 4 4>;
+-	};
+-
+-	melt {
+-		trip = <&cpu_crit>;
+-		cooling-device = <&fan 4 4>;
+-	};
+-};
+-
+-&gio {
+-	// The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
+-	// to reduce the clutter in gpioinfo/pinctrl
+-	brcm,gpio-bank-widths = <32 4>;
+-
+-	gpio-line-names =
+-		"-", // GPIO_000
+-		"2712_BOOT_CS_N", // GPIO_001
+-		"2712_BOOT_MISO", // GPIO_002
+-		"2712_BOOT_MOSI", // GPIO_003
+-		"2712_BOOT_SCLK", // GPIO_004
+-		"-", // GPIO_005
+-		"-", // GPIO_006
+-		"-", // GPIO_007
+-		"-", // GPIO_008
+-		"-", // GPIO_009
+-		"-", // GPIO_010
+-		"-", // GPIO_011
+-		"-", // GPIO_012
+-		"-", // GPIO_013
+-		"-", // GPIO_014
+-		"-", // GPIO_015
+-		"-", // GPIO_016
+-		"-", // GPIO_017
+-		"-", // GPIO_018
+-		"-", // GPIO_019
+-		"PWR_GPIO", // GPIO_020
+-		"2712_G21_FS", // GPIO_021
+-		"-", // GPIO_022
+-		"-", // GPIO_023
+-		"BT_RTS", // GPIO_024
+-		"BT_CTS", // GPIO_025
+-		"BT_TXD", // GPIO_026
+-		"BT_RXD", // GPIO_027
+-		"WL_ON", // GPIO_028
+-		"BT_ON", // GPIO_029
+-		"WIFI_SDIO_CLK", // GPIO_030
+-		"WIFI_SDIO_CMD", // GPIO_031
+-		"WIFI_SDIO_D0", // GPIO_032
+-		"WIFI_SDIO_D1", // GPIO_033
+-		"WIFI_SDIO_D2", // GPIO_034
+-		"WIFI_SDIO_D3"; // GPIO_035
+-};
+-
+-&gio_aon {
+-	gpio-line-names =
+-		"RP1_SDA", // AON_GPIO_00
+-		"RP1_SCL", // AON_GPIO_01
+-		"RP1_RUN", // AON_GPIO_02
+-		"SD_IOVDD_SEL", // AON_GPIO_03
+-		"SD_PWR_ON", // AON_GPIO_04
+-		"ANT1", // AON_GPIO_05
+-		"ANT2", // AON_GPIO_06
+-		"-", // AON_GPIO_07
+-		"2712_WAKE", // AON_GPIO_08
+-		"2712_STAT_LED", // AON_GPIO_09
+-		"-", // AON_GPIO_10
+-		"-", // AON_GPIO_11
+-		"PMIC_INT", // AON_GPIO_12
+-		"UART_TX_FS", // AON_GPIO_13
+-		"UART_RX_FS", // AON_GPIO_14
+-		"-", // AON_GPIO_15
+-		"-", // AON_GPIO_16
+-
+-		// Pad bank0 out to 32 entries
+-		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+-
+-		"HDMI0_SCL", // AON_SGPIO_00
+-		"HDMI0_SDA", // AON_SGPIO_01
+-		"HDMI1_SCL", // AON_SGPIO_02
+-		"HDMI1_SDA", // AON_SGPIO_03
+-		"PMIC_SCL", // AON_SGPIO_04
+-		"PMIC_SDA"; // AON_SGPIO_05
+-
+-	rp1_run_hog {
+-		gpio-hog;
+-		gpios = <2 GPIO_ACTIVE_HIGH>;
+-		output-high;
+-		line-name = "RP1 RUN pin";
+-	};
+-
+-	ant1: ant1-hog {
+-		gpio-hog;
+-		gpios = <5 GPIO_ACTIVE_HIGH>;
+-		/* internal antenna enabled */
+-		output-high;
+-		line-name = "ant1";
+-	};
+-
+-	ant2: ant2-hog {
+-		gpio-hog;
+-		gpios = <6 GPIO_ACTIVE_HIGH>;
+-		/* external antenna disabled */
+-		output-low;
+-		line-name = "ant2";
+-	};
+-};
+-
+-&rp1_gpio {
+-	gpio-line-names =
+-		"ID_SDA", // GPIO0
+-		"ID_SCL", // GPIO1
+-		"GPIO2", // GPIO2
+-		"GPIO3", // GPIO3
+-		"GPIO4", // GPIO4
+-		"GPIO5", // GPIO5
+-		"GPIO6", // GPIO6
+-		"GPIO7", // GPIO7
+-		"GPIO8", // GPIO8
+-		"GPIO9", // GPIO9
+-		"GPIO10", // GPIO10
+-		"GPIO11", // GPIO11
+-		"GPIO12", // GPIO12
+-		"GPIO13", // GPIO13
+-		"GPIO14", // GPIO14
+-		"GPIO15", // GPIO15
+-		"GPIO16", // GPIO16
+-		"GPIO17", // GPIO17
+-		"GPIO18", // GPIO18
+-		"GPIO19", // GPIO19
+-		"GPIO20", // GPIO20
+-		"GPIO21", // GPIO21
+-		"GPIO22", // GPIO22
+-		"GPIO23", // GPIO23
+-		"GPIO24", // GPIO24
+-		"GPIO25", // GPIO25
+-		"GPIO26", // GPIO26
+-		"GPIO27", // GPIO27
+-
+-		"PCIE_PWR_EN", // GPIO28
+-		"FAN_TACH", // GPIO29
+-		"HOST_SDA", // GPIO30
+-		"HOST_SCL", // GPIO31
+-		"ETH_RST_N", // GPIO32
+-		"PCIE_DET_WAKE", // GPIO33
+-
+-		"CD0_IO0_MICCLK", // GPIO34
+-		"CD0_IO0_MICDAT0", // GPIO35
+-		"RP1_PCIE_CLKREQ_N", // GPIO36
+-		"ETH_IRQ_N", // GPIO37
+-		"SDA0", // GPIO38
+-		"SCL0", // GPIO39
+-		"-", // GPIO40
+-		"-", // GPIO41
+-		"USB_VBUS_EN", // GPIO42
+-		"USB_OC_N", // GPIO43
+-		"RP1_STAT_LED", // GPIO44
+-		"FAN_PWM", // GPIO45
+-		"-", // GPIO46
+-		"2712_WAKE", // GPIO47
+-		"-", // GPIO48
+-		"-", // GPIO49
+-		"-", // GPIO50
+-		"-", // GPIO51
+-		"-", // GPIO52
+-		"-"; // GPIO53
+-
+-	usb_vbus_pins: usb_vbus_pins {
+-		function = "vbus1";
+-		pins = "gpio42", "gpio43";
+-	};
+-};
+-
+-/ {
+-	aliases: aliases {
+-		blconfig = &blconfig;
+-		blpubkey = &blpubkey;
+-		bluetooth = &bluetooth;
+-		console = &uart10;
+-		ethernet0 = &rp1_eth;
+-		wifi0 = &wifi;
+-		fb = &fb;
+-		mailbox = &mailbox;
+-		mmc0 = &sdio1;
+-		uart0 = &uart0;
+-		uart1 = &uart1;
+-		uart2 = &uart2;
+-		uart3 = &uart3;
+-		uart4 = &uart4;
+-		uart10 = &uart10;
+-		serial0 = &uart0;
+-		serial1 = &uart1;
+-		serial2 = &uart2;
+-		serial3 = &uart3;
+-		serial4 = &uart4;
+-		serial10 = &uart10;
+-		i2c = &i2c_arm;
+-		i2c0 = &i2c0;
+-		i2c1 = &i2c1;
+-		i2c2 = &i2c2;
+-		i2c3 = &i2c3;
+-		i2c4 = &i2c4;
+-		i2c5 = &i2c5;
+-		i2c6 = &i2c6;
+-		i2c10 = &i2c_rp1boot;
+-		// Bit-bashed i2c_gpios start at 10
+-		spi0 = &spi0;
+-		spi1 = &spi1;
+-		spi2 = &spi2;
+-		spi3 = &spi3;
+-		spi4 = &spi4;
+-		spi5 = &spi5;
+-		spi10 = &spi10;
+-		gpio0 = &gpio;
+-		gpio1 = &gio;
+-		gpio2 = &gio_aon;
+-		gpio3 = &pinctrl;
+-		gpio4 = &pinctrl_aon;
+-		usb0 = &rp1_usb0;
+-		usb1 = &rp1_usb1;
+-		drm-dsi1 = &dsi0;
+-		drm-dsi2 = &dsi1;
+-	};
+-
+-	__overrides__ {
+-		bdaddr = <&bluetooth>, "local-bd-address[";
+-		button_debounce = <&pwr_key>, "debounce-interval:0";
+-		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
+-		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
+-		i2c0 = <&i2c0>, "status";
+-		i2c1 = <&i2c1>, "status";
+-		i2c = <&i2c1>, "status";
+-		i2c_arm = <&i2c_arm>, "status";
+-		i2c_vc = <&i2c_vc>, "status";
+-		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+-		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
+-		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
+-		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
+-		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
+-		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
+-		krnbt = <&bluetooth>, "status";
+-		nvme = <&pciex1>, "status";
+-		pciex1 = <&pciex1>, "status";
+-		pciex1_gen = <&pciex1> , "max-link-speed:0";
+-		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
+-		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		random = <&random>, "status";
+-		rtc = <&rpi_rtc>, "status";
+-		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
+-		spi = <&spi0>, "status";
+-		suspend = <&pwr_key>, "linux,code:0=205";
+-		uart0 = <&uart0>, "status";
+-		wifiaddr = <&wifi>, "local-mac-address[";
+-
+-		act_led_activelow = <&led_act>, "active-low?";
+-		act_led_trigger = <&led_act>, "linux,default-trigger";
+-		pwr_led_activelow = <&led_pwr>, "gpios:8";
+-		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
+-		eth_led0 = <&phy1>,"led-modes:0";
+-		eth_led1 = <&phy1>,"led-modes:4";
+-		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
+-		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
+-		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
+-		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
+-		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
+-		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
+-		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
+-		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
+-		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
+-		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
+-		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
+-		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
+-
+-		ant1 =  <&ant1>,"output-high?=on",
+-			<&ant1>, "output-low?=off",
+-			<&ant2>, "output-high?=off",
+-			<&ant2>, "output-low?=on";
+-		ant2 =  <&ant1>,"output-high?=off",
+-			<&ant1>, "output-low?=on",
+-			<&ant2>, "output-high?=on",
+-			<&ant2>, "output-low?=off";
+-		noant = <&ant1>,"output-high?=off",
+-			<&ant1>, "output-low?=on",
+-			<&ant2>, "output-high?=off",
+-			<&ant2>, "output-low?=on";
+-
+-		fan_temp0 = <&cpu_tepid>,"temperature:0";
+-		fan_temp1 = <&cpu_warm>,"temperature:0";
+-		fan_temp2 = <&cpu_hot>,"temperature:0";
+-		fan_temp3 = <&cpu_vhot>,"temperature:0";
+-		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
+-		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
+-		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
+-		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
+-		fan_temp0_speed = <&fan>, "cooling-levels:4";
+-		fan_temp1_speed = <&fan>, "cooling-levels:8";
+-		fan_temp2_speed = <&fan>, "cooling-levels:12";
+-		fan_temp3_speed = <&fan>, "cooling-levels:16";
+-	};
+-};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
+@@ -0,0 +1,884 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/clock/rp1.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/mfd/rp1.h>
++#include <dt-bindings/pwm/pwm.h>
++#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
++
++#define i2c0 _i2c0
++#define i2c3 _i2c3
++#define i2c4 _i2c4
++#define i2c5 _i2c5
++#define i2c6 _i2c6
++#define i2c8 _i2c8
++#define i2s _i2s
++#define pwm0 _pwm0
++#define pwm1 _pwm1
++#define spi0 _spi0
++#define spi3 _spi3
++#define spi4 _spi4
++#define spi5 _spi5
++#define spi6 _spi6
++#define uart0 _uart0
++#define uart2 _uart2
++#define uart5 _uart5
++
++#include "bcm2712.dtsi"
++
++#undef i2c0
++#undef i2c3
++#undef i2c4
++#undef i2c5
++#undef i2c6
++#undef i2c8
++#undef i2s
++#undef pwm0
++#undef pwm1
++#undef spi0
++#undef spi3
++#undef spi4
++#undef spi5
++#undef spi6
++#undef uart0
++#undef uart2
++#undef uart3
++#undef uart4
++#undef uart5
++
++/ {
++	compatible = "raspberrypi,5-compute-module", "brcm,bcm2712";
++	model = "Raspberry Pi Compute Module 5";
++
++	/* Will be filled by the bootloader */
++	memory@0 {
++		device_type = "memory";
++		reg = <0 0 0x28000000>;
++	};
++
++	leds: leds {
++		compatible = "gpio-leds";
++
++		led_pwr: led-pwr {
++			label = "PWR";
++			gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++			linux,default-trigger = "none";
++		};
++
++		led_act: led-act {
++			label = "ACT";
++			gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++			linux,default-trigger = "mmc0";
++		};
++	};
++
++	sd_io_1v8_reg: sd_io_1v8_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "vdd-sd-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++	};
++
++	sd_vcc_reg: sd_vcc_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-sd";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-boot-on;
++		enable-active-high;
++		gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
++	wl_on_reg: wl_on_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "wl-on-regulator";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		pinctrl-0 = <&wl_on_pins>;
++		pinctrl-names = "default";
++
++		gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
++
++		startup-delay-us = <150000>;
++		enable-active-high;
++	};
++
++	clocks: clocks {
++	};
++
++	cam1_clk: cam1_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		status = "disabled";
++	};
++
++	cam0_clk: cam0_clk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		status = "disabled";
++	};
++
++	cam0_reg: cam0_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "cam0_reg";
++		enable-active-high;
++		status = "okay";
++		gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to CAM_GPIO on connector
++	};
++
++	cam_dummy_reg: cam_dummy_reg {
++		compatible = "regulator-fixed";
++		regulator-name = "cam-dummy-reg";
++		status = "okay";
++	};
++
++	dummy: dummy {
++		// A target for unwanted overlay fragments
++	};
++
++
++	// A few extra labels to keep overlays happy
++
++	i2c0if: i2c0if {};
++	i2c0mux: i2c0mux {};
++};
++
++rp1_target: &pcie2 {
++	brcm,enable-mps-rcb;
++	brcm,vdm-qos-map = <0xbbaa9888>;
++	aspm-no-l0s;
++	status = "okay";
++};
++
++// Add some labels to 2712 device
++
++// The system UART
++uart10: &_uart0 { status = "okay"; };
++
++// The system SPI for the bootloader EEPROM
++spi10: &_spi0 { status = "okay"; };
++
++i2c_rp1boot: &_i2c3 { };
++
++#include "rp1.dtsi"
++
++&rp1 {
++	// PCIe address space layout:
++	// 00_00000000-00_00xxxxxx = RP1 peripherals
++	// 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
++
++	// outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
++	// This is the RP1 peripheral space
++	ranges = <0xc0 0x40000000
++		  0x02000000 0x00 0x00000000
++		  0x00 0x00400000>;
++
++	dma-ranges =
++	// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
++		     <0x10 0x00000000
++		      0x43000000 0x10 0x00000000
++		      0x10 0x00000000>,
++
++	// inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
++	// This allows the RP1 DMA controller to address RP1 hardware
++		     <0xc0 0x40000000
++		      0x02000000 0x0 0x00000000
++		      0x0 0x00400000>,
++
++	// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
++		     <0x00 0x00000000
++		      0x02000000 0x10 0x00000000
++		      0x10 0x00000000>;
++};
++
++// Expose RP1 nodes as system nodes with labels
++
++&rp1_dma  {
++	status = "okay";
++};
++
++&rp1_eth {
++	status = "okay";
++	phy-handle = <&phy1>;
++	phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
++	phy-reset-duration = <5>;
++
++	phy1: ethernet-phy@1 {
++		reg = <0x1>;
++		brcm,powerdown-enable;
++		interrupt-parent = <&gpio>;
++		interrupts = <37 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++gpio: &rp1_gpio {
++	status = "okay";
++};
++
++aux: &dummy {};
++
++&rp1_usb0 {
++	pinctrl-0 = <&usb_vbus_pins>;
++	pinctrl-names = "default";
++	status = "okay";
++};
++
++&rp1_usb1 {
++	status = "okay";
++};
++
++#include "bcm2712-rpi.dtsi"
++
++i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
++	pinctrl-0 = <&rp1_i2c6_38_39>;
++	pinctrl-names = "default";
++	clock-frequency = <100000>;
++};
++
++i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector
++};
++
++i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
++
++cam1_reg: &cam0_reg { // Shares CAM_GPIO with cam0_reg
++};
++
++csi0: &rp1_csi0 { };
++csi1: &rp1_csi1 { };
++dsi0: &rp1_dsi0 { };
++dsi1: &rp1_dsi1 { };
++dpi: &rp1_dpi { };
++vec: &rp1_vec { };
++dpi_gpio0:              &rp1_dpi_24bit_gpio0        { };
++dpi_gpio1:              &rp1_dpi_24bit_gpio2        { };
++dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
++dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
++dpi_18bit_gpio0:        &rp1_dpi_18bit_gpio0        { };
++dpi_18bit_gpio2:        &rp1_dpi_18bit_gpio2        { };
++dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
++dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
++dpi_16bit_gpio0:        &rp1_dpi_16bit_gpio0        { };
++dpi_16bit_gpio2:        &rp1_dpi_16bit_gpio2        { };
++
++/* Add the IOMMUs for some RP1 bus masters */
++
++&csi0 {
++	iommus = <&iommu5>;
++};
++
++&csi1 {
++	iommus = <&iommu5>;
++};
++
++&dsi0 {
++	iommus = <&iommu5>;
++};
++
++&dsi1 {
++	iommus = <&iommu5>;
++};
++
++&dpi {
++	iommus = <&iommu5>;
++};
++
++&vec {
++	iommus = <&iommu5>;
++};
++
++&ddc0 {
++	status = "disabled";
++};
++
++&ddc1 {
++	status = "disabled";
++};
++
++&hdmi0 {
++	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
++	clock-names = "hdmi", "bvb", "audio", "cec";
++	status = "disabled";
++};
++
++&hdmi1 {
++	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
++	clock-names = "hdmi", "bvb", "audio", "cec";
++	status = "disabled";
++};
++
++&hvs {
++	clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
++	clock-names = "core", "disp";
++};
++
++&mop {
++	status = "disabled";
++};
++
++&moplet {
++	status = "disabled";
++};
++
++&pixelvalve0 {
++	status = "disabled";
++};
++
++&pixelvalve1 {
++	status = "disabled";
++};
++
++&disp_intr {
++	status = "disabled";
++};
++
++/* SDIO1 is used to drive the eMMC/SD card */
++&sdio1 {
++	pinctrl-0 = <&emmc_cmddat_pulls>, <&emmc_ds_pull>;
++	pinctrl-names = "default";
++	vqmmc-supply = <&sd_io_1v8_reg>;
++	vmmc-supply = <&sd_vcc_reg>;
++	bus-width = <8>;
++	sd-uhs-sdr50;
++	sd-uhs-ddr50;
++	sd-uhs-sdr104;
++	mmc-hs200-1_8v;
++	mmc-hs400-1_8v;
++	mmc-hs400-enhanced-strobe;
++	broken-cd;
++	supports-cqe;
++	status = "okay";
++};
++
++&pinctrl_aon {
++	ant_pins: ant_pins {
++		function = "gpio";
++		pins = "aon_gpio5", "aon_gpio6";
++	};
++
++	/* Slight hack - only one PWM pin (status LED) is usable */
++	aon_pwm_1pin: aon_pwm_1pin {
++		function = "aon_pwm";
++		pins = "aon_gpio9";
++	};
++};
++
++&pinctrl {
++	pwr_button_pins: pwr_button_pins {
++		function = "gpio";
++		pins = "gpio20";
++		bias-pull-up;
++	};
++
++	wl_on_pins: wl_on_pins {
++		function = "gpio";
++		pins = "gpio28";
++	};
++
++	bt_shutdown_pins: bt_shutdown_pins {
++		function = "gpio";
++		pins = "gpio29";
++	};
++
++	emmc_ds_pull: emmc_ds_pull {
++		pins = "emmc_ds";
++		bias-pull-down;
++	};
++
++	emmc_cmddat_pulls: emmc_cmddat_pulls {
++		pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3",
++		       "emmc_dat4", "emmc_dat5", "emmc_dat6", "emmc_dat7";
++		bias-pull-up;
++	};
++};
++
++/* uarta communicates with the BT module */
++&uarta {
++	uart-has-rtscts;
++	auto-flow-control;
++	status = "okay";
++	clock-frequency = <96000000>;
++	pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
++	pinctrl-names = "default";
++
++	bluetooth: bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		max-speed = <3000000>;
++		shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
++		local-bd-address = [ 00 00 00 00 00 00 ];
++	};
++};
++
++&i2c_rp1boot {
++	clock-frequency = <400000>;
++	pinctrl-0 = <&i2c3_m4_agpio0_pins>;
++	pinctrl-names = "default";
++};
++
++/ {
++	chosen: chosen {
++		bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe";
++		stdout-path = "serial10:115200n8";
++	};
++
++	fan: cooling_fan {
++		status = "disabled";
++		compatible = "pwm-fan";
++		#cooling-cells = <2>;
++		cooling-min-state = <0>;
++		cooling-max-state = <3>;
++		cooling-levels = <0 75 125 175 250>;
++		pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
++		rpm-regmap = <&rp1_pwm1>;
++		rpm-offset = <0x3c>;
++	};
++
++	pwr_button {
++		compatible = "gpio-keys";
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&pwr_button_pins>;
++		status = "okay";
++
++		pwr_key: pwr {
++			label = "pwr_button";
++			// linux,code = <205>; // KEY_SUSPEND
++			linux,code = <116>; // KEY_POWER
++			gpios = <&gio 20 GPIO_ACTIVE_LOW>;
++			debounce-interval = <50>; // ms
++		};
++	};
++};
++
++&usb {
++	power-domains = <&power RPI_POWER_DOMAIN_USB>;
++};
++
++/* SDIO2 drives the WLAN interface */
++&sdio2 {
++	pinctrl-0 = <&sdio2_30_pins>, <&ant_pins>;
++	pinctrl-names = "default";
++	bus-width = <4>;
++	vmmc-supply = <&wl_on_reg>;
++	sd-uhs-ddr50;
++	non-removable;
++	status = "okay";
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	wifi: wifi@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++		local-mac-address = [00 00 00 00 00 00];
++	};
++};
++
++&rpivid {
++	status = "okay";
++};
++
++&pinctrl {
++	spi10_gpio2: spi10_gpio2 {
++		function = "vc_spi0";
++		pins = "gpio2", "gpio3", "gpio4";
++		bias-disable;
++	};
++
++	spi10_cs_gpio1: spi10_cs_gpio1 {
++		function = "gpio";
++		pins = "gpio1";
++		bias-pull-up;
++	};
++};
++
++spi10_pins: &spi10_gpio2 {};
++spi10_cs_pins: &spi10_cs_gpio1 {};
++
++&spi10 {
++	pinctrl-names = "default";
++	cs-gpios = <&gio 1 1>;
++	pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
++
++	spidev10: spidev@0 {
++		compatible = "spidev";
++		reg = <0>;	/* CE0 */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		spi-max-frequency = <20000000>;
++		status = "okay";
++	};
++};
++
++// =============================================
++// Board specific stuff here
++
++&gio_aon {
++	// Don't use GIO_AON as an interrupt controller because it will
++	// clash with the firmware monitoring the PMIC interrupt via the VPU.
++
++	/delete-property/ interrupt-controller;
++};
++
++&main_aon_irq {
++	// Don't use the MAIN_AON_IRQ interrupt controller because it will
++	// clash with the firmware monitoring the PMIC interrupt via the VPU.
++
++	status = "disabled";
++};
++
++&rp1_pwm1 {
++	status = "disabled";
++	pinctrl-0 = <&rp1_pwm1_gpio45>;
++	pinctrl-names = "default";
++};
++
++&thermal_trips {
++	cpu_tepid: cpu-tepid {
++		temperature = <50000>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++
++	cpu_warm: cpu-warm {
++		temperature = <60000>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++
++	cpu_hot: cpu-hot {
++		temperature = <67500>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++
++	cpu_vhot: cpu-vhot {
++		temperature = <75000>;
++		hysteresis = <5000>;
++		type = "active";
++	};
++};
++
++&cooling_maps {
++	tepid {
++		trip = <&cpu_tepid>;
++		cooling-device = <&fan 1 1>;
++	};
++
++	warm {
++		trip = <&cpu_warm>;
++		cooling-device = <&fan 2 2>;
++	};
++
++	hot {
++		trip = <&cpu_hot>;
++		cooling-device = <&fan 3 3>;
++	};
++
++	vhot {
++		trip = <&cpu_vhot>;
++		cooling-device = <&fan 4 4>;
++	};
++
++	melt {
++		trip = <&cpu_crit>;
++		cooling-device = <&fan 4 4>;
++	};
++};
++
++&gio {
++	// The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
++	// to reduce the clutter in gpioinfo/pinctrl
++	brcm,gpio-bank-widths = <32 4>;
++
++	gpio-line-names =
++		"-", // GPIO_000
++		"2712_BOOT_CS_N", // GPIO_001
++		"2712_BOOT_MISO", // GPIO_002
++		"2712_BOOT_MOSI", // GPIO_003
++		"2712_BOOT_SCLK", // GPIO_004
++		"-", // GPIO_005
++		"-", // GPIO_006
++		"-", // GPIO_007
++		"-", // GPIO_008
++		"-", // GPIO_009
++		"-", // GPIO_010
++		"-", // GPIO_011
++		"-", // GPIO_012
++		"-", // GPIO_013
++		"-", // GPIO_014
++		"-", // GPIO_015
++		"-", // GPIO_016
++		"-", // GPIO_017
++		"-", // GPIO_018
++		"-", // GPIO_019
++		"PWR_GPIO", // GPIO_020
++		"2712_G21_FS", // GPIO_021
++		"-", // GPIO_022
++		"-", // GPIO_023
++		"BT_RTS", // GPIO_024
++		"BT_CTS", // GPIO_025
++		"BT_TXD", // GPIO_026
++		"BT_RXD", // GPIO_027
++		"WL_ON", // GPIO_028
++		"BT_ON", // GPIO_029
++		"WIFI_SDIO_CLK", // GPIO_030
++		"WIFI_SDIO_CMD", // GPIO_031
++		"WIFI_SDIO_D0", // GPIO_032
++		"WIFI_SDIO_D1", // GPIO_033
++		"WIFI_SDIO_D2", // GPIO_034
++		"WIFI_SDIO_D3"; // GPIO_035
++};
++
++&gio_aon {
++	gpio-line-names =
++		"RP1_SDA", // AON_GPIO_00
++		"RP1_SCL", // AON_GPIO_01
++		"RP1_RUN", // AON_GPIO_02
++		"SD_IOVDD_SEL", // AON_GPIO_03
++		"SD_PWR_ON", // AON_GPIO_04
++		"ANT1", // AON_GPIO_05
++		"ANT2", // AON_GPIO_06
++		"-", // AON_GPIO_07
++		"2712_WAKE", // AON_GPIO_08
++		"2712_STAT_LED", // AON_GPIO_09
++		"-", // AON_GPIO_10
++		"-", // AON_GPIO_11
++		"PMIC_INT", // AON_GPIO_12
++		"UART_TX_FS", // AON_GPIO_13
++		"UART_RX_FS", // AON_GPIO_14
++		"-", // AON_GPIO_15
++		"-", // AON_GPIO_16
++
++		// Pad bank0 out to 32 entries
++		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
++
++		"HDMI0_SCL", // AON_SGPIO_00
++		"HDMI0_SDA", // AON_SGPIO_01
++		"HDMI1_SCL", // AON_SGPIO_02
++		"HDMI1_SDA", // AON_SGPIO_03
++		"PMIC_SCL", // AON_SGPIO_04
++		"PMIC_SDA"; // AON_SGPIO_05
++
++	rp1_run_hog {
++		gpio-hog;
++		gpios = <2 GPIO_ACTIVE_HIGH>;
++		output-high;
++		line-name = "RP1 RUN pin";
++	};
++
++	ant1: ant1-hog {
++		gpio-hog;
++		gpios = <5 GPIO_ACTIVE_HIGH>;
++		/* internal antenna enabled */
++		output-high;
++		line-name = "ant1";
++	};
++
++	ant2: ant2-hog {
++		gpio-hog;
++		gpios = <6 GPIO_ACTIVE_HIGH>;
++		/* external antenna disabled */
++		output-low;
++		line-name = "ant2";
++	};
++};
++
++&rp1_gpio {
++	gpio-line-names =
++		"ID_SDA", // GPIO0
++		"ID_SCL", // GPIO1
++		"GPIO2", // GPIO2
++		"GPIO3", // GPIO3
++		"GPIO4", // GPIO4
++		"GPIO5", // GPIO5
++		"GPIO6", // GPIO6
++		"GPIO7", // GPIO7
++		"GPIO8", // GPIO8
++		"GPIO9", // GPIO9
++		"GPIO10", // GPIO10
++		"GPIO11", // GPIO11
++		"GPIO12", // GPIO12
++		"GPIO13", // GPIO13
++		"GPIO14", // GPIO14
++		"GPIO15", // GPIO15
++		"GPIO16", // GPIO16
++		"GPIO17", // GPIO17
++		"GPIO18", // GPIO18
++		"GPIO19", // GPIO19
++		"GPIO20", // GPIO20
++		"GPIO21", // GPIO21
++		"GPIO22", // GPIO22
++		"GPIO23", // GPIO23
++		"GPIO24", // GPIO24
++		"GPIO25", // GPIO25
++		"GPIO26", // GPIO26
++		"GPIO27", // GPIO27
++
++		"PCIE_PWR_EN", // GPIO28
++		"FAN_TACH", // GPIO29
++		"HOST_SDA", // GPIO30
++		"HOST_SCL", // GPIO31
++		"ETH_RST_N", // GPIO32
++		"PCIE_DET_WAKE", // GPIO33
++
++		"CD0_IO0_MICCLK", // GPIO34
++		"CD0_IO0_MICDAT0", // GPIO35
++		"RP1_PCIE_CLKREQ_N", // GPIO36
++		"ETH_IRQ_N", // GPIO37
++		"SDA0", // GPIO38
++		"SCL0", // GPIO39
++		"-", // GPIO40
++		"-", // GPIO41
++		"USB_VBUS_EN", // GPIO42
++		"USB_OC_N", // GPIO43
++		"RP1_STAT_LED", // GPIO44
++		"FAN_PWM", // GPIO45
++		"-", // GPIO46
++		"2712_WAKE", // GPIO47
++		"-", // GPIO48
++		"-", // GPIO49
++		"-", // GPIO50
++		"-", // GPIO51
++		"-", // GPIO52
++		"-"; // GPIO53
++
++	usb_vbus_pins: usb_vbus_pins {
++		function = "vbus1";
++		pins = "gpio42", "gpio43";
++	};
++};
++
++/ {
++	aliases: aliases {
++		blconfig = &blconfig;
++		blpubkey = &blpubkey;
++		bluetooth = &bluetooth;
++		console = &uart10;
++		ethernet0 = &rp1_eth;
++		wifi0 = &wifi;
++		fb = &fb;
++		mailbox = &mailbox;
++		mmc0 = &sdio1;
++		uart0 = &uart0;
++		uart1 = &uart1;
++		uart2 = &uart2;
++		uart3 = &uart3;
++		uart4 = &uart4;
++		uart10 = &uart10;
++		serial0 = &uart0;
++		serial1 = &uart1;
++		serial2 = &uart2;
++		serial3 = &uart3;
++		serial4 = &uart4;
++		serial10 = &uart10;
++		i2c = &i2c_arm;
++		i2c0 = &i2c0;
++		i2c1 = &i2c1;
++		i2c2 = &i2c2;
++		i2c3 = &i2c3;
++		i2c4 = &i2c4;
++		i2c5 = &i2c5;
++		i2c6 = &i2c6;
++		i2c10 = &i2c_rp1boot;
++		// Bit-bashed i2c_gpios start at 10
++		spi0 = &spi0;
++		spi1 = &spi1;
++		spi2 = &spi2;
++		spi3 = &spi3;
++		spi4 = &spi4;
++		spi5 = &spi5;
++		spi10 = &spi10;
++		gpio0 = &gpio;
++		gpio1 = &gio;
++		gpio2 = &gio_aon;
++		gpio3 = &pinctrl;
++		gpio4 = &pinctrl_aon;
++		usb0 = &rp1_usb0;
++		usb1 = &rp1_usb1;
++		drm-dsi1 = &dsi0;
++		drm-dsi2 = &dsi1;
++	};
++
++	__overrides__ {
++		bdaddr = <&bluetooth>, "local-bd-address[";
++		button_debounce = <&pwr_key>, "debounce-interval:0";
++		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
++		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
++		i2c0 = <&i2c0>, "status";
++		i2c1 = <&i2c1>, "status";
++		i2c = <&i2c1>, "status";
++		i2c_arm = <&i2c_arm>, "status";
++		i2c_vc = <&i2c_vc>, "status";
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
++		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
++		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
++		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
++		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
++		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
++		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
++		krnbt = <&bluetooth>, "status";
++		nvme = <&pciex1>, "status";
++		pciex1 = <&pciex1>, "status";
++		pciex1_gen = <&pciex1> , "max-link-speed:0";
++		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
++		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
++		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
++		random = <&random>, "status";
++		rtc = <&rpi_rtc>, "status";
++		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
++		spi = <&spi0>, "status";
++		suspend = <&pwr_key>, "linux,code:0=205";
++		uart0 = <&uart0>, "status";
++		wifiaddr = <&wifi>, "local-mac-address[";
++
++		act_led_activelow = <&led_act>, "active-low?";
++		act_led_trigger = <&led_act>, "linux,default-trigger";
++		pwr_led_activelow = <&led_pwr>, "gpios:8";
++		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
++		eth_led0 = <&phy1>,"led-modes:0";
++		eth_led1 = <&phy1>,"led-modes:4";
++		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
++		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
++		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
++		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
++		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
++		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
++		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
++		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
++		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
++		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
++		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
++		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
++
++		ant1 =  <&ant1>,"output-high?=on",
++			<&ant1>, "output-low?=off",
++			<&ant2>, "output-high?=off",
++			<&ant2>, "output-low?=on";
++		ant2 =  <&ant1>,"output-high?=off",
++			<&ant1>, "output-low?=on",
++			<&ant2>, "output-high?=on",
++			<&ant2>, "output-low?=off";
++		noant = <&ant1>,"output-high?=off",
++			<&ant1>, "output-low?=on",
++			<&ant2>, "output-high?=off",
++			<&ant2>, "output-low?=on";
++
++		fan_temp0 = <&cpu_tepid>,"temperature:0";
++		fan_temp1 = <&cpu_warm>,"temperature:0";
++		fan_temp2 = <&cpu_hot>,"temperature:0";
++		fan_temp3 = <&cpu_vhot>,"temperature:0";
++		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
++		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
++		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
++		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
++		fan_temp0_speed = <&fan>, "cooling-levels:4";
++		fan_temp1_speed = <&fan>, "cooling-levels:8";
++		fan_temp2_speed = <&fan>, "cooling-levels:12";
++		fan_temp3_speed = <&fan>, "cooling-levels:16";
++	};
++};
+--- a/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts
+@@ -1,2 +1,107 @@
+ // SPDX-License-Identifier: GPL-2.0
+-#include "../../../../arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts"
++#include "bcm2712-rpi-5-b.dts"
++
++&gio {
++	brcm,gpio-bank-widths = <32 4>;
++
++	gpio-line-names =
++		"", // GPIO_000
++		"2712_BOOT_CS_N", // GPIO_001
++		"2712_BOOT_MISO", // GPIO_002
++		"2712_BOOT_MOSI", // GPIO_003
++		"2712_BOOT_SCLK", // GPIO_004
++		"", // GPIO_005
++		"", // GPIO_006
++		"", // GPIO_007
++		"", // GPIO_008
++		"", // GPIO_009
++		"", // GPIO_010
++		"", // GPIO_011
++		"", // GPIO_012
++		"", // GPIO_013
++		"PCIE_SDA", // GPIO_014
++		"PCIE_SCL", // GPIO_015
++		"", // GPIO_016
++		"", // GPIO_017
++		"-", // GPIO_018
++		"-", // GPIO_019
++		"PWR_GPIO", // GPIO_020
++		"2712_G21_FS", // GPIO_021
++		"-", // GPIO_022
++		"-", // GPIO_023
++		"BT_RTS", // GPIO_024
++		"BT_CTS", // GPIO_025
++		"BT_TXD", // GPIO_026
++		"BT_RXD", // GPIO_027
++		"WL_ON", // GPIO_028
++		"BT_ON", // GPIO_029
++		"WIFI_SDIO_CLK", // GPIO_030
++		"WIFI_SDIO_CMD", // GPIO_031
++		"WIFI_SDIO_D0", // GPIO_032
++		"WIFI_SDIO_D1", // GPIO_033
++		"WIFI_SDIO_D2", // GPIO_034
++		"WIFI_SDIO_D3"; // GPIO_035
++};
++
++&gio_aon {
++	brcm,gpio-bank-widths = <15 6>;
++
++	gpio-line-names =
++		"RP1_SDA", // AON_GPIO_00
++		"RP1_SCL", // AON_GPIO_01
++		"RP1_RUN", // AON_GPIO_02
++		"SD_IOVDD_SEL", // AON_GPIO_03
++		"SD_PWR_ON", // AON_GPIO_04
++		"SD_CDET_N", // AON_GPIO_05
++		"SD_FLG_N", // AON_GPIO_06
++		"", // AON_GPIO_07
++		"2712_WAKE", // AON_GPIO_08
++		"2712_STAT_LED", // AON_GPIO_09
++		"", // AON_GPIO_10
++		"", // AON_GPIO_11
++		"PMIC_INT", // AON_GPIO_12
++		"UART_TX_FS", // AON_GPIO_13
++		"UART_RX_FS", // AON_GPIO_14
++		"", // AON_GPIO_15
++		"", // AON_GPIO_16
++
++		// Pad bank0 out to 32 entries
++		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
++
++		"HDMI0_SCL", // AON_SGPIO_00
++		"HDMI0_SDA", // AON_SGPIO_01
++		"HDMI1_SCL", // AON_SGPIO_02
++		"HDMI1_SDA", // AON_SGPIO_03
++		"PMIC_SCL", // AON_SGPIO_04
++		"PMIC_SDA"; // AON_SGPIO_05
++};
++
++&pinctrl {
++	compatible = "brcm,bcm2712d0-pinctrl";
++	reg = <0x7d504100 0x20>;
++};
++
++&pinctrl_aon {
++	compatible = "brcm,bcm2712d0-aon-pinctrl";
++	reg = <0x7d510700 0x1c>;
++};
++
++&vc4 {
++	compatible = "brcm,bcm2712d0-vc6";
++};
++
++&uart10 {
++	interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
++};
++
++&spi10 {
++	dmas = <&dma40 3>, <&dma40 4>;
++};
++
++&hdmi0 {
++	dmas = <&dma40 (12|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
++};
++
++&hdmi1 {
++	dmas = <&dma40 (13|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
++};
+--- a/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi
++++ /dev/null
+@@ -1,351 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-
+-#include <dt-bindings/power/raspberrypi-power.h>
+-
+-&soc {
+-	firmware: firmware {
+-		compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-
+-		mboxes = <&mailbox>;
+-		dma-ranges;
+-
+-		firmware_clocks: clocks {
+-			compatible = "raspberrypi,firmware-clocks";
+-			#clock-cells = <1>;
+-		};
+-
+-		reset: reset {
+-			compatible = "raspberrypi,firmware-reset";
+-			#reset-cells = <1>;
+-		};
+-
+-		vcio: vcio {
+-			compatible = "raspberrypi,vcio";
+-		};
+-	};
+-
+-	power: power {
+-		compatible = "raspberrypi,bcm2835-power";
+-		firmware = <&firmware>;
+-		#power-domain-cells = <1>;
+-	};
+-
+-	fb: fb {
+-		compatible = "brcm,bcm2708-fb";
+-		firmware = <&firmware>;
+-		status = "okay";
+-	};
+-
+-	rpi_rtc: rpi_rtc {
+-		compatible = "raspberrypi,rpi-rtc";
+-		firmware = <&firmware>;
+-		status = "okay";
+-		trickle-charge-microvolt = <0>;
+-	};
+-
+-	nvmem {
+-		compatible = "simple-bus";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-
+-		nvmem_otp: nvmem_otp {
+-			compatible = "raspberrypi,rpi-otp";
+-			firmware = <&firmware>;
+-			reg = <0 192>;
+-			status = "okay";
+-		};
+-
+-		nvmem_cust: nvmem_cust {
+-			compatible = "raspberrypi,rpi-otp";
+-			firmware = <&firmware>;
+-			reg = <1 8>;
+-			status = "okay";
+-		};
+-
+-		nvmem_mac: nvmem_mac {
+-			compatible = "raspberrypi,rpi-otp";
+-			firmware = <&firmware>;
+-			reg = <2 6>;
+-			status = "okay";
+-		};
+-
+-		nvmem_priv: nvmem_priv {
+-			compatible = "raspberrypi,rpi-otp";
+-			firmware = <&firmware>;
+-			reg = <3 16>;
+-			status = "okay";
+-		};
+-	};
+-
+-	/* Define these notional regulators for use by overlays, etc. */
+-	vdd_3v3_reg: fixedregulator_3v3 {
+-		compatible = "regulator-fixed";
+-		regulator-always-on;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-min-microvolt = <3300000>;
+-		regulator-name = "3v3";
+-	};
+-
+-	vdd_5v0_reg: fixedregulator_5v0 {
+-		compatible = "regulator-fixed";
+-		regulator-always-on;
+-		regulator-max-microvolt = <5000000>;
+-		regulator-min-microvolt = <5000000>;
+-		regulator-name = "5v0";
+-	};
+-};
+-
+-/ {
+-	__overrides__ {
+-		arm_freq;
+-		axiperf = <&axiperf>,"status";
+-
+-		nvmem_cust_rw = <&nvmem_cust>,"rw?";
+-		nvmem_priv_rw = <&nvmem_priv>,"rw?";
+-		nvmem_mac_rw = <&nvmem_mac>,"rw?";
+-		strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n";
+-
+-		cam0_reg = <&cam0_reg>,"status";
+-		cam0_reg_gpio = <&cam0_reg>,"gpio:4",
+-				<&cam0_reg>,"gpio:0=", <&gpio>;
+-		cam1_reg = <&cam1_reg>,"status";
+-		cam1_reg_gpio = <&cam1_reg>,"gpio:4",
+-				<&cam1_reg>,"gpio:0=", <&gpio>;
+-
+-	};
+-};
+-
+-pciex1: &pcie1 { };
+-pciex4: &pcie2 { };
+-
+-&dma32 {
+-	/* The VPU firmware uses DMA channel 11 for VCHIQ */
+-	brcm,dma-channel-mask = <0x03f>;
+-};
+-
+-&dma40 {
+-	/* The VPU firmware DMA channel 11 for VCHIQ */
+-	brcm,dma-channel-mask = <0x07c0>;
+-};
+-
+-&hdmi0 {
+-	dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+-};
+-
+-&hdmi1 {
+-	dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
+-};
+-
+-&spi10 {
+-	dmas = <&dma40 6>, <&dma40 7>;
+-	dma-names = "tx", "rx";
+-};
+-
+-&usb {
+-	power-domains = <&power RPI_POWER_DOMAIN_USB>;
+-};
+-
+-&rmem {
+-	/*
+-	 * RPi5's co-processor will copy the board's bootloader configuration
+-	 * into memory for the OS to consume. It'll also update this node with
+-	 * its placement information.
+-	 */
+-	blconfig: nvram@0 {
+-		compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0x0 0x0 0x0>;
+-		no-map;
+-		status = "disabled";
+-	};
+-	/*
+-	 * RPi5 will copy the binary public key blob (if present) from the bootloader
+-	 * into memory for use by the OS.
+-	 */
+-	blpubkey: nvram@1 {
+-		compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		reg = <0x0 0x0 0x0>;
+-		no-map;
+-		status = "disabled";
+-	};
+-};
+-
+-&rp1_adc {
+-	status = "okay";
+-};
+-
+-/* Add some gpiomem nodes to make the devices accessible to userspace.
+- * /dev/gpiomem<n> should expose the registers for the interface with DT alias
+- * gpio<n>.
+- */
+-
+-&rp1 {
+-	gpiomem@d0000 {
+-		/* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */
+-		compatible = "raspberrypi,gpiomem";
+-		reg = <0xc0 0x400d0000  0x0 0x30000>;
+-		chardev-name = "gpiomem0";
+-	};
+-};
+-
+-&soc {
+-	gpiomem@7d508500 {
+-		compatible = "raspberrypi,gpiomem";
+-		reg = <0x7d508500 0x40>;
+-		chardev-name = "gpiomem1";
+-	};
+-
+-	gpiomem@7d517c00 {
+-		compatible = "raspberrypi,gpiomem";
+-		reg = <0x7d517c00 0x40>;
+-		chardev-name = "gpiomem2";
+-	};
+-
+-	gpiomem@7d504100 {
+-		compatible = "raspberrypi,gpiomem";
+-		reg = <0x7d504100 0x20>;
+-		chardev-name = "gpiomem3";
+-	};
+-
+-	gpiomem@7d510700 {
+-		compatible = "raspberrypi,gpiomem";
+-		reg = <0x7d510700 0x20>;
+-		chardev-name = "gpiomem4";
+-	};
+-
+-	sound: sound {
+-		status = "disabled";
+-	};
+-};
+-
+-i2c0: &rp1_i2c0 { };
+-i2c1: &rp1_i2c1 { };
+-i2c2: &rp1_i2c2 { };
+-i2c3: &rp1_i2c3 { };
+-i2c4: &rp1_i2c4 { };
+-i2c5: &rp1_i2c5 { };
+-i2c6: &rp1_i2c6 { };
+-i2s:  &rp1_i2s0 { };
+-i2s_clk_producer: &rp1_i2s0 { };
+-i2s_clk_consumer: &rp1_i2s1 { };
+-pwm0: &rp1_pwm0 { };
+-pwm1: &rp1_pwm1 { };
+-pwm: &pwm0 { };
+-spi0: &rp1_spi0 { };
+-spi1: &rp1_spi1 { };
+-spi2: &rp1_spi2 { };
+-spi3: &rp1_spi3 { };
+-spi4: &rp1_spi4 { };
+-spi5: &rp1_spi5 { };
+-
+-uart0_pins: &rp1_uart0_14_15 {};
+-uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {};
+-uart0: &rp1_uart0 {
+-	pinctrl-0 = <&uart0_pins>;
+-};
+-
+-uart1_pins: &rp1_uart1_0_1 {};
+-uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {};
+-uart1: &rp1_uart1 { };
+-
+-uart2_pins: &rp1_uart2_4_5 {};
+-uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {};
+-uart2: &rp1_uart2 { };
+-
+-uart3_pins: &rp1_uart3_8_9 {};
+-uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {};
+-uart3: &rp1_uart3 { };
+-
+-uart4_pins: &rp1_uart4_12_13 {};
+-uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {};
+-uart4: &rp1_uart4 { };
+-
+-i2c0_pins: &rp1_i2c0_0_1 {};
+-i2c_vc: &i2c0 {      // This is pins 27,28 on the header (not MIPI)
+-	pinctrl-0 = <&i2c0_pins>;
+-	pinctrl-names = "default";
+-	clock-frequency = <100000>;
+-};
+-
+-i2c1_pins: &rp1_i2c1_2_3 {};
+-i2c_arm: &i2c1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&i2c1_pins>;
+-	clock-frequency = <100000>;
+-};
+-
+-i2c2_pins: &rp1_i2c2_4_5 {};
+-&i2c2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&i2c2_pins>;
+-};
+-
+-i2c3_pins: &rp1_i2c3_6_7 {};
+-&i2c3 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&i2c3_pins>;
+-};
+-
+-&i2s_clk_producer {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&rp1_i2s0_18_21>;
+-};
+-
+-&i2s_clk_consumer {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&rp1_i2s1_18_21>;
+-};
+-
+-spi0_pins: &rp1_spi0_gpio9 {};
+-spi0_cs_pins: &rp1_spi0_cs_gpio7 {};
+-
+-&spi0 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
+-	cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
+-
+-	spidev0: spidev@0 {
+-		compatible = "spidev";
+-		reg = <0>;	/* CE0 */
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		spi-max-frequency = <125000000>;
+-	};
+-
+-	spidev1: spidev@1 {
+-		compatible = "spidev";
+-		reg = <1>;	/* CE1 */
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		spi-max-frequency = <125000000>;
+-	};
+-};
+-
+-spi2_pins: &rp1_spi2_gpio1 {};
+-&spi2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&spi2_pins>;
+-};
+-
+-spi3_pins: &rp1_spi3_gpio5 {};
+-&spi3 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&spi3_pins>;
+-};
+-
+-spi4_pins: &rp1_spi4_gpio9 {};
+-&spi4 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&spi4_pins>;
+-};
+-
+-spi5_pins: &rp1_spi5_gpio13 {};
+-&spi5 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&spi5_pins>;
+-};
+--- a/arch/arm/boot/dts/broadcom/bcm2712.dtsi
++++ /dev/null
+@@ -1,1302 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0
+-#include <dt-bindings/interrupt-controller/arm-gic.h>
+-#include <dt-bindings/soc/bcm2835-pm.h>
+-#include <dt-bindings/phy/phy.h>
+-
+-/ {
+-	compatible = "brcm,bcm2712", "brcm,bcm2711";
+-	model = "BCM2712";
+-
+-	#address-cells = <2>;
+-	#size-cells = <1>;
+-
+-	interrupt-parent = <&gicv2>;
+-
+-	rmem: reserved-memory {
+-		#address-cells = <2>;
+-		#size-cells = <1>;
+-		ranges;
+-
+-		atf@0 {
+-			reg = <0x0 0x0 0x80000>;
+-			no-map;
+-		};
+-
+-		cma: linux,cma {
+-			compatible = "shared-dma-pool";
+-			size = <0x4000000>; /* 64MB */
+-			reusable;
+-			linux,cma-default;
+-
+-			/*
+-			 * arm64 reserves the CMA by default somewhere in
+-			 * ZONE_DMA32, that's not good enough for the BCM2711
+-			 * as some devices can only address the lower 1G of
+-			 * memory (ZONE_DMA).
+-			 */
+-			alloc-ranges = <0x0 0x00000000 0x40000000>;
+-		};
+-	};
+-
+-	thermal-zones {
+-		cpu_thermal: cpu-thermal {
+-			polling-delay-passive = <2000>;
+-			polling-delay = <1000>;
+-			coefficients = <(-550) 450000>;
+-			thermal-sensors = <&thermal>;
+-
+-			thermal_trips: trips {
+-				cpu_crit: cpu-crit {
+-					temperature	= <110000>;
+-					hysteresis	= <0>;
+-					type		= "critical";
+-				};
+-			};
+-
+-			cooling_maps: cooling-maps {
+-			};
+-		};
+-	};
+-
+-	clk_27MHz: clk-27M {
+-		#clock-cells = <0>;
+-		compatible = "fixed-clock";
+-		clock-frequency = <27000000>;
+-		clock-output-names = "27MHz-clock";
+-	};
+-
+-	clk_108MHz: clk-108M {
+-		#clock-cells = <0>;
+-		compatible = "fixed-clock";
+-		clock-frequency = <108000000>;
+-		clock-output-names = "108MHz-clock";
+-	};
+-
+-	hvs: hvs@107c580000 {
+-		compatible = "brcm,bcm2712-hvs";
+-		reg = <0x10 0x7c580000 0x1a000>;
+-		interrupt-parent = <&disp_intr>;
+-		interrupts = <2>, <9>, <16>;
+-		interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
+-		//iommus = <&iommu4>;
+-		status = "disabled";
+-	};
+-
+-	soc: soc {
+-		compatible = "simple-bus";
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-
+-		ranges     = <0x7c000000  0x10 0x7c000000  0x04000000>;
+-		/* Emulate a contiguous 30-bit address range for DMA */
+-		dma-ranges = <0xc0000000  0x00 0x00000000  0x40000000>,
+-			     <0x7c000000  0x10 0x7c000000  0x04000000>;
+-
+-		system_timer: timer@7c003000 {
+-			compatible = "brcm,bcm2835-system-timer";
+-			reg = <0x7c003000 0x1000>;
+-			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+-		     		     <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+-		     		     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+-			clock-frequency = <1000000>;
+-		};
+-
+-		firmwarekms: firmwarekms@7d503000 {
+-			compatible = "raspberrypi,rpi-firmware-kms-2712";
+-			/* SUN_L2 interrupt reg */
+-			reg = <0x7d503000 0x18>;
+-			interrupt-parent = <&cpu_l2_irq>;
+-			interrupts = <19>;
+-			brcm,firmware = <&firmware>;
+-			status = "disabled";
+-		};
+-
+-		axiperf: axiperf {
+-			compatible = "brcm,bcm2712-axiperf";
+-			reg = <0x7c012800 0x100>,
+-				<0x7e000000 0x100>;
+-			firmware = <&firmware>;
+-			status = "disabled";
+-		};
+-
+-		mailbox: mailbox@7c013880 {
+-			compatible = "brcm,bcm2835-mbox";
+-			reg = <0x7c013880 0x40>;
+-			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+-			#mbox-cells = <0>;
+-		};
+-
+-		pixelvalve0: pixelvalve@7c410000 {
+-			compatible = "brcm,bcm2712-pixelvalve0";
+-			reg = <0x7c410000 0x100>;
+-			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		pixelvalve1: pixelvalve@7c411000 {
+-			compatible = "brcm,bcm2712-pixelvalve1";
+-			reg = <0x7c411000 0x100>;
+-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		mop: mop@7c500000 {
+-			compatible = "brcm,bcm2712-mop";
+-			reg = <0x7c500000 0x28>;
+-			interrupt-parent = <&disp_intr>;
+-			interrupts = <1>;
+-			status = "disabled";
+-		};
+-
+-		moplet: moplet@7c501000 {
+-			compatible = "brcm,bcm2712-moplet";
+-			reg = <0x7c501000 0x20>;
+-			interrupt-parent = <&disp_intr>;
+-			interrupts = <0>;
+-			status = "disabled";
+-		};
+-
+-		disp_intr: interrupt-controller@7c502000 {
+-			compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
+-			reg = <0x7c502000 0x30>;
+-			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-			status = "disabled";
+-		};
+-
+-		dvp: clock@7c700000 {
+-			compatible = "brcm,brcm2711-dvp";
+-			reg = <0x7c700000 0x10>;
+-			clocks = <&clk_108MHz>;
+-			#clock-cells = <1>;
+-			#reset-cells = <1>;
+-		};
+-
+-		/*
+-		 * This node is the provider for the enable-method for
+-		 * bringing up secondary cores.
+-		 */
+-		local_intc: local_intc@7cd00000 {
+-			compatible = "brcm,bcm2836-l1-intc";
+-			reg = <0x7cd00000 0x100>;
+-		};
+-
+-		uart0: serial@7d001000 {
+-			compatible = "arm,pl011", "arm,primecell";
+-			reg = <0x7d001000 0x200>;
+-			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_uart>,
+-				 <&clk_vpu>;
+-			clock-names = "uartclk", "apb_pclk";
+-			arm,primecell-periphid = <0x00241011>;
+-			status = "disabled";
+-		};
+-
+-		uart2: serial@7d001400 {
+-			compatible = "arm,pl011", "arm,primecell";
+-			reg = <0x7d001400 0x200>;
+-			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_uart>,
+-				 <&clk_vpu>;
+-			clock-names = "uartclk", "apb_pclk";
+-			arm,primecell-periphid = <0x00241011>;
+-			status = "disabled";
+-		};
+-
+-		uart5: serial@7d001a00 {
+-			compatible = "arm,pl011", "arm,primecell";
+-			reg = <0x7d001a00 0x200>;
+-			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_uart>,
+-				 <&clk_vpu>;
+-			clock-names = "uartclk", "apb_pclk";
+-			arm,primecell-periphid = <0x00241011>;
+-			status = "disabled";
+-		};
+-
+-		sdhost: mmc@7d002000 {
+-			compatible = "brcm,bcm2835-sdhost";
+-			reg = <0x7d002000 0x100>;
+-			//interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			status = "disabled";
+-		};
+-
+-		i2s: i2s@7d003000 {
+-			compatible = "brcm,bcm2835-i2s";
+-			reg = <0x7d003000 0x24>;
+-			//clocks = <&cprman BCM2835_CLOCK_PCM>;
+-			status = "disabled";
+-		};
+-
+-		spi0: spi@7d004000 {
+-			compatible = "brcm,bcm2835-spi";
+-			reg = <0x7d004000 0x200>;
+-			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			num-cs = <1>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		spi3: spi@7d004600 {
+-			compatible = "brcm,bcm2835-spi";
+-			reg = <0x7d004600 0x0200>;
+-			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		spi4: spi@7d004800 {
+-			compatible = "brcm,bcm2835-spi";
+-			reg = <0x7d004800 0x0200>;
+-			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		spi5: spi@7d004a00 {
+-			compatible = "brcm,bcm2835-spi";
+-			reg = <0x7d004a00 0x0200>;
+-			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		spi6: spi@7d004c00 {
+-			compatible = "brcm,bcm2835-spi";
+-			reg = <0x7d004c00 0x0200>;
+-			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		i2c0: i2c@7d005000 {
+-			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+-			reg = <0x7d005000 0x20>;
+-			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		i2c3: i2c@7d005600 {
+-			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+-			reg = <0x7d005600 0x20>;
+-			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		i2c4: i2c@7d005800 {
+-			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+-			reg = <0x7d005800 0x20>;
+-			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		i2c5: i2c@7d005a00 {
+-			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+-			reg = <0x7d005a00 0x20>;
+-			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		i2c6: i2c@7d005c00 {
+-			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+-			reg = <0x7d005c00 0x20>;
+-			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		i2c8: i2c@7d005e00 {
+-			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+-			reg = <0x7d005e00 0x20>;
+-			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_vpu>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		pwm0: pwm@7d00c000 {
+-			compatible = "brcm,bcm2835-pwm";
+-			reg = <0x7d00c000 0x28>;
+-			assigned-clock-rates = <50000000>;
+-			#pwm-cells = <3>;
+-			status = "disabled";
+-		};
+-
+-		pwm1: pwm@7d00c800 {
+-			compatible = "brcm,bcm2835-pwm";
+-			reg = <0x7d00c800 0x28>;
+-			assigned-clock-rates = <50000000>;
+-			#pwm-cells = <3>;
+-			status = "disabled";
+-		};
+-
+-		pm: watchdog@7d200000 {
+-			compatible = "brcm,bcm2712-pm";
+-			reg = <0x7d200000 0x308>;
+-			reg-names = "pm";
+-			#power-domain-cells = <1>;
+-			#reset-cells = <1>;
+-			//clocks = <&cprman BCM2835_CLOCK_V3D>,
+-			//	 <&cprman BCM2835_CLOCK_PERI_IMAGE>,
+-			//	 <&cprman BCM2835_CLOCK_H264>,
+-			//	 <&cprman BCM2835_CLOCK_ISP>;
+-			clock-names = "v3d", "peri_image", "h264", "isp";
+-			system-power-controller;
+-		};
+-
+-		cprman: cprman@7d202000 {
+-			compatible = "brcm,bcm2711-cprman";
+-			reg = <0x7d202000 0x2000>;
+-			#clock-cells = <1>;
+-
+-			/* CPRMAN derives almost everything from the
+-			 * platform's oscillator.  However, the DSI
+-			 * pixel clocks come from the DSI analog PHY.
+-			 */
+-			clocks = <&clk_osc>;
+-			status = "disabled";
+-		};
+-
+-		random: rng@7d208000 {
+-			compatible = "brcm,bcm2711-rng200";
+-			reg = <0x7d208000 0x28>;
+-			status = "okay";
+-		};
+-
+-		cpu_l2_irq: intc@7d503000 {
+-			compatible = "brcm,l2-intc";
+-			reg = <0x7d503000 0x18>;
+-			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-		};
+-
+-		pinctrl: pinctrl@7d504100 {
+-			compatible = "brcm,bcm2712-pinctrl";
+-			reg = <0x7d504100 0x30>;
+-
+-			uarta_24_pins: uarta_24_pins {
+-				pin_rts {
+-					function = "uart0";
+-					pins = "gpio24";
+-					bias-disable;
+-				};
+-				pin_cts {
+-					function = "uart0";
+-					pins = "gpio25";
+-					bias-pull-up;
+-				};
+-				pin_txd {
+-					function = "uart0";
+-					pins = "gpio26";
+-					bias-disable;
+-				};
+-				pin_rxd {
+-					function = "uart0";
+-					pins = "gpio27";
+-					bias-pull-up;
+-				};
+-			};
+-
+-			sdio2_30_pins: sdio2_30_pins {
+-				pin_clk {
+-					function = "sd2";
+-					pins = "gpio30";
+-					bias-disable;
+-				};
+-				pin_cmd {
+-					function = "sd2";
+-					pins = "gpio31";
+-					bias-pull-up;
+-				};
+-				pins_dat {
+-					function = "sd2";
+-					pins = "gpio32", "gpio33", "gpio34", "gpio35";
+-					bias-pull-up;
+-				};
+-			};
+-		};
+-
+-		ddc0: i2c@7d508200 {
+-			compatible = "brcm,brcmstb-i2c";
+-			reg = <0x7d508200 0x58>;
+-			interrupt-parent = <&bsc_irq>;
+-			interrupts = <1>;
+-			clock-frequency = <97500>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		ddc1: i2c@7d508280 {
+-			compatible = "brcm,brcmstb-i2c";
+-			reg = <0x7d508280 0x58>;
+-			interrupt-parent = <&bsc_irq>;
+-			interrupts = <2>;
+-			clock-frequency = <97500>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		bscd: i2c@7d508300 {
+-			compatible = "brcm,brcmstb-i2c";
+-			reg = <0x7d508300 0x58>;
+-			interrupt-parent = <&bsc_irq>;
+-			interrupts = <0>;
+-			clock-frequency = <200000>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		bsc_irq: intc@7d508380 {
+-			compatible = "brcm,bcm7271-l2-intc";
+-			reg = <0x7d508380 0x10>;
+-			interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-		};
+-
+-		main_irq: intc@7d508400 {
+-			compatible = "brcm,bcm7271-l2-intc";
+-			reg = <0x7d508400 0x10>;
+-			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-		};
+-
+-		gio: gpio@7d508500 {
+-			compatible = "brcm,brcmstb-gpio";
+-			reg = <0x7d508500 0x40>;
+-			interrupt-parent = <&main_irq>;
+-			interrupts = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			interrupt-controller;
+-			#interrupt-cells = <2>;
+-			brcm,gpio-bank-widths = <32 22>;
+-			brcm,gpio-direct;
+-		};
+-
+-		uarta: serial@7d50c000 {
+-			compatible = "brcm,bcm7271-uart";
+-			reg = <0x7d50c000 0x20>;
+-			reg-names = "uart";
+-			reg-shift = <2>;
+-			reg-io-width = <4>;
+-			interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		uartb: serial@7d50d000 {
+-			compatible = "brcm,bcm7271-uart";
+-			reg = <0x7d50d000 0x20>;
+-			reg-names = "uart";
+-			reg-shift = <2>;
+-			reg-io-width = <4>;
+-			interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		aon_intr: interrupt-controller@7d510600 {
+-			compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
+-			reg = <0x7d510600 0x30>;
+-			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-			status = "disabled";
+-		};
+-
+-		pinctrl_aon: pinctrl@7d510700 {
+-			compatible = "brcm,bcm2712-aon-pinctrl";
+-			reg = <0x7d510700 0x20>;
+-
+-			i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins {
+-				function = "vc_i2c3";
+-				pins = "aon_gpio0", "aon_gpio1";
+-				bias-pull-up;
+-			};
+-
+-			bsc_m1_agpio13_pins: bsc_m1_agpio13_pins {
+-				function = "bsc_m1";
+-				pins = "aon_gpio13", "aon_gpio14";
+-				bias-pull-up;
+-			};
+-
+-			bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins {
+-				function = "avs_pmu_bsc";
+-				pins = "aon_sgpio4", "aon_sgpio5";
+-			};
+-
+-			bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins {
+-				function = "bsc_m2";
+-				pins = "aon_sgpio4", "aon_sgpio5";
+-			};
+-
+-			pwm_aon_agpio1_pins: pwm_aon_agpio1_pins {
+-				function = "aon_pwm";
+-				pins = "aon_gpio1", "aon_gpio2";
+-			};
+-
+-			pwm_aon_agpio4_pins: pwm_aon_agpio4_pins {
+-				function = "vc_pwm0";
+-				pins = "aon_gpio4", "aon_gpio5";
+-			};
+-
+-			pwm_aon_agpio7_pins: pwm_aon_agpio7_pins {
+-				function = "aon_pwm";
+-				pins = "aon_gpio7", "aon_gpio9";
+-			};
+-		};
+-
+-		intc@7d517000 {
+-			compatible = "brcm,bcm7271-l2-intc";
+-			reg = <0x7d517000 0x10>;
+-			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-			status = "disabled";
+-		};
+-
+-		bscc: i2c@7d517a00 {
+-			compatible = "brcm,brcmstb-i2c";
+-			reg = <0x7d517a00 0x58>;
+-			interrupt-parent = <&bsc_aon_irq>;
+-			interrupts = <0>;
+-			clock-frequency = <200000>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		pwm_aon: pwm@7d517a80 {
+-			compatible = "brcm,bcm7038-pwm";
+-			reg = <0x7d517a80 0x28>;
+-			#pwm-cells = <3>;
+-			clocks = <&clk_27MHz>;
+-		};
+-
+-		main_aon_irq: intc@7d517ac0 {
+-			compatible = "brcm,bcm7271-l2-intc";
+-			reg = <0x7d517ac0 0x10>;
+-			interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-		};
+-
+-		bsc_aon_irq: intc@7d517b00 {
+-			compatible = "brcm,bcm7271-l2-intc";
+-			reg = <0x7d517b00 0x10>;
+-			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-controller;
+-			#interrupt-cells = <1>;
+-		};
+-
+-		gio_aon: gpio@7d517c00 {
+-			compatible = "brcm,brcmstb-gpio";
+-			reg = <0x7d517c00 0x40>;
+-			interrupt-parent = <&main_aon_irq>;
+-			interrupts = <0>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			interrupt-controller;
+-			#interrupt-cells = <2>;
+-			brcm,gpio-bank-widths = <17 6>;
+-			brcm,gpio-direct;
+-		};
+-
+-		avs_monitor: avs-monitor@7d542000 {
+-			compatible = "brcm,bcm2711-avs-monitor",
+-				     "syscon", "simple-mfd";
+-			reg = <0x7d542000 0xf00>;
+-			status = "okay";
+-
+-			thermal: thermal {
+-				compatible = "brcm,bcm2711-thermal";
+-				#thermal-sensor-cells = <0>;
+-			};
+-		};
+-
+-		bsc_pmu: i2c@7d544000 {
+-			compatible = "brcm,brcmstb-i2c";
+-			reg = <0x7d544000 0x58>;
+-			interrupt-parent = <&bsc_aon_irq>;
+-			interrupts = <1>;
+-			clock-frequency = <200000>;
+-			status = "disabled";
+-		};
+-
+-		hdmi0: hdmi@7ef00700 {
+-			compatible = "brcm,bcm2712-hdmi0";
+-			reg = <0x7c701400 0x300>,
+-			      <0x7c701000 0x200>,
+-			      <0x7c701d00 0x300>,
+-			      <0x7c702000 0x80>,
+-			      <0x7c703800 0x200>,
+-			      <0x7c704000 0x800>,
+-			      <0x7c700100 0x80>,
+-			      <0x7d510800 0x100>,
+-			      <0x7c720000 0x100>;
+-			reg-names = "hdmi",
+-				    "dvp",
+-				    "phy",
+-				    "rm",
+-				    "packet",
+-				    "metadata",
+-				    "csc",
+-				    "cec",
+-				    "hd";
+-			resets = <&dvp 1>;
+-			interrupt-parent = <&aon_intr>;
+-			interrupts = <1>, <2>, <3>,
+-				     <7>, <8>;
+-			interrupt-names = "cec-tx", "cec-rx", "cec-low",
+-					  "hpd-connected", "hpd-removed";
+-			ddc = <&ddc0>;
+-			dmas = <&dma32 10>;
+-			dma-names = "audio-rx";
+-			status = "disabled";
+-		};
+-
+-		hdmi1: hdmi@7ef05700 {
+-			compatible = "brcm,bcm2712-hdmi1";
+-			reg = <0x7c706400 0x300>,
+-			      <0x7c706000 0x200>,
+-			      <0x7c706d00 0x300>,
+-			      <0x7c707000 0x80>,
+-			      <0x7c708800 0x200>,
+-			      <0x7c709000 0x800>,
+-			      <0x7c700180 0x80>,
+-			      <0x7d511000 0x100>,
+-			      <0x7c720000 0x100>;
+-			reg-names = "hdmi",
+-				    "dvp",
+-				    "phy",
+-				    "rm",
+-				    "packet",
+-				    "metadata",
+-				    "csc",
+-				    "cec",
+-				    "hd";
+-			ddc = <&ddc1>;
+-			resets = <&dvp 2>;
+-			interrupt-parent = <&aon_intr>;
+-			interrupts = <11>, <12>, <13>,
+-				     <14>, <15>;
+-			interrupt-names = "cec-tx", "cec-rx", "cec-low",
+-					  "hpd-connected", "hpd-removed";
+-			dmas = <&dma32 17>;
+-			dma-names = "audio-rx";
+-			status = "disabled";
+-		};
+-	};
+-
+-	arm-pmu {
+-		compatible = "arm,cortex-a76-pmu";
+-		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+-			<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+-			<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+-			<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+-		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+-	};
+-
+-	timer {
+-		compatible = "arm,armv8-timer";
+-		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+-					  IRQ_TYPE_LEVEL_LOW)>,
+-			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+-					  IRQ_TYPE_LEVEL_LOW)>,
+-			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+-					  IRQ_TYPE_LEVEL_LOW)>,
+-			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+-					  IRQ_TYPE_LEVEL_LOW)>;
+-		/* This only applies to the ARMv7 stub */
+-		arm,cpu-registers-not-fw-configured;
+-	};
+-
+-	cpus: cpus {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
+-
+-		/* Source for d/i cache-line-size, cache-sets, cache-size
+-		 * https://developer.arm.com/documentation/100798/0401
+-		 * /L1-memory-system/About-the-L1-memory-system?lang=en
+-		 */
+-		cpu0: cpu@0 {
+-			device_type = "cpu";
+-			compatible = "arm,cortex-a76";
+-			reg = <0x000>;
+-			enable-method = "psci";
+-			d-cache-size = <0x10000>;
+-			d-cache-line-size = <64>;
+-			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			i-cache-size = <0x10000>;
+-			i-cache-line-size = <64>;
+-			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			next-level-cache = <&l2_cache_l0>;
+-		};
+-
+-		cpu1: cpu@1 {
+-			device_type = "cpu";
+-			compatible = "arm,cortex-a76";
+-			reg = <0x100>;
+-			enable-method = "psci";
+-			d-cache-size = <0x10000>;
+-			d-cache-line-size = <64>;
+-			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			i-cache-size = <0x10000>;
+-			i-cache-line-size = <64>;
+-			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			next-level-cache = <&l2_cache_l1>;
+-		};
+-
+-		cpu2: cpu@2 {
+-			device_type = "cpu";
+-			compatible = "arm,cortex-a76";
+-			reg = <0x200>;
+-			enable-method = "psci";
+-			d-cache-size = <0x10000>;
+-			d-cache-line-size = <64>;
+-			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			i-cache-size = <0x10000>;
+-			i-cache-line-size = <64>;
+-			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			next-level-cache = <&l2_cache_l2>;
+-		};
+-
+-		cpu3: cpu@3 {
+-			device_type = "cpu";
+-			compatible = "arm,cortex-a76";
+-			reg = <0x300>;
+-			enable-method = "psci";
+-			d-cache-size = <0x10000>;
+-			d-cache-line-size = <64>;
+-			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			i-cache-size = <0x10000>;
+-			i-cache-line-size = <64>;
+-			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
+-			next-level-cache = <&l2_cache_l3>;
+-		};
+-
+-		/* Source for cache-line-size and cache-sets:
+-		 * https://developer.arm.com/documentation/100798/0401
+-		 * /L2-memory-system/About-the-L2-memory-system?lang=en
+-		 * and for cache-size:
+-		 * https://www.raspberrypi.com/documentation/computers
+-		 * /processors.html#bcm2712
+-		 */
+-		l2_cache_l0: l2-cache-l0 {
+-			compatible = "cache";
+-			cache-size = <0x80000>;
+-			cache-line-size = <128>;
+-			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
+-			cache-level = <2>;
+-			cache-unified;
+-			next-level-cache = <&l3_cache>;
+-		};
+-
+-		l2_cache_l1: l2-cache-l1 {
+-			compatible = "cache";
+-			cache-size = <0x80000>;
+-			cache-line-size = <128>;
+-			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
+-			cache-level = <2>;
+-			cache-unified;
+-			next-level-cache = <&l3_cache>;
+-		};
+-
+-		l2_cache_l2: l2-cache-l2 {
+-			compatible = "cache";
+-			cache-size = <0x80000>;
+-			cache-line-size = <128>;
+-			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
+-			cache-level = <2>;
+-			cache-unified;
+-			next-level-cache = <&l3_cache>;
+-		};
+-
+-		l2_cache_l3: l2-cache-l3 {
+-			compatible = "cache";
+-			cache-size = <0x80000>;
+-			cache-line-size = <128>;
+-			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
+-			cache-level = <2>;
+-			cache-unified;
+-			next-level-cache = <&l3_cache>;
+-		};
+-
+-		/* Source for cache-line-size and cache-sets:
+-		 * https://developer.arm.com/documentation/100453/0401/L3-cache?lang=en
+-		 * Source for cache-size:
+-		 * https://www.raspberrypi.com/documentation/computers/processors.html#bcm2712
+-		 */
+-		l3_cache: l3-cache {
+-			compatible = "cache";
+-			cache-size = <0x200000>;
+-			cache-line-size = <64>;
+-			cache-sets = <2048>; // 2MiB(size)/64(line-size)=32768ways/16-way set
+-			cache-level = <3>;
+-		};
+-	};
+-
+-	psci {
+-		method = "smc";
+-		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
+-		cpu_on = <0xc4000003>;
+-		cpu_suspend = <0xc4000001>;
+-		cpu_off = <0x84000002>;
+-	};
+-
+-	axi: axi {
+-		compatible = "simple-bus";
+-		#address-cells = <2>;
+-		#size-cells = <2>;
+-
+-		ranges = <0x00 0x00000000  0x00 0x00000000  0x10 0x00000000>,
+-			 <0x10 0x00000000  0x10 0x00000000  0x01 0x00000000>,
+-			 <0x14 0x00000000  0x14 0x00000000  0x04 0x00000000>,
+-			 <0x18 0x00000000  0x18 0x00000000  0x04 0x00000000>,
+-			 <0x1c 0x00000000  0x1c 0x00000000  0x04 0x00000000>;
+-
+-		dma-ranges = <0x00 0x00000000  0x00 0x00000000  0x10 0x00000000>,
+-			     <0x10 0x00000000  0x10 0x00000000  0x01 0x00000000>,
+-			     <0x14 0x00000000  0x14 0x00000000  0x04 0x00000000>,
+-			     <0x18 0x00000000  0x18 0x00000000  0x04 0x00000000>,
+-			     <0x1c 0x00000000  0x1c 0x00000000  0x04 0x00000000>;
+-
+-		vc4: gpu {
+-			compatible = "brcm,bcm2712-vc6";
+-		};
+-
+-		iommu2: iommu@5100 {
+-			/* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */
+-			compatible = "brcm,bcm2712-iommu";
+-			reg = <0x10 0x5100  0x0 0x80>;
+-			cache = <&iommuc>;
+-			#iommu-cells = <0>;
+-		};
+-
+-		iommu4: iommu@5200 {
+-			/* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */
+-			compatible = "brcm,bcm2712-iommu";
+-			reg = <0x10 0x5200  0x0 0x80>;
+-			cache = <&iommuc>;
+-			#iommu-cells = <0>;
+-			#interconnect-cells = <0>;
+-		};
+-
+-		iommu5: iommu@5280 {
+-			/* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */
+-			compatible = "brcm,bcm2712-iommu";
+-			reg = <0x10 0x5280  0x0 0x80>;
+-			cache = <&iommuc>;
+-			#iommu-cells = <0>;
+-			dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe
+-		};
+-
+-		iommuc: iommuc@5b00 {
+-			compatible = "brcm,bcm2712-iommuc";
+-			reg = <0x10 0x5b00  0x0 0x80>;
+-		};
+-
+-		dma32: dma@10000 {
+-			compatible = "brcm,bcm2712-dma";
+-			reg = <0x10 0x00010000 0 0x600>;
+-			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-names = "dma0",
+-					  "dma1",
+-					  "dma2",
+-					  "dma3",
+-					  "dma4",
+-					  "dma5";
+-			#dma-cells = <1>;
+-			brcm,dma-channel-mask = <0x0035>;
+-		};
+-
+-		dma40: dma@10600 {
+-			compatible = "brcm,bcm2712-dma";
+-			reg = <0x10 0x00010600 0 0x600>;
+-			interrupts =
+-				<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
+-				<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
+-				<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
+-				<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
+-				<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
+-				<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
+-			interrupt-names = "dma6",
+-					  "dma7",
+-					  "dma8",
+-					  "dma9",
+-					  "dma10",
+-					  "dma11";
+-			#dma-cells = <1>;
+-			brcm,dma-channel-mask = <0x0fc0>;
+-		};
+-
+-		// Single-lane Gen3 PCIe
+-		// Outbound window at 0x14_000000-0x17_ffffff
+-		pcie0: pcie@100000 {
+-			compatible = "brcm,bcm2712-pcie";
+-			reg = <0x10 0x00100000  0x0 0x9310>;
+-			device_type = "pci";
+-			max-link-speed = <2>;
+-			#address-cells = <3>;
+-			#interrupt-cells = <1>;
+-			#size-cells = <2>;
+-			/*
+-			 * Unused interrupts:
+-			 * 208: AER
+-			 * 215: NMI
+-			 * 216: PME
+-			 */
+-			interrupt-parent = <&gicv2>;
+-			interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-names = "pcie", "msi";
+-			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+-			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 2 &gicv2 GIC_SPI 210
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 3 &gicv2 GIC_SPI 211
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 4 &gicv2 GIC_SPI 212
+-							IRQ_TYPE_LEVEL_HIGH>;
+-			resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>;
+-			reset-names = "swinit", "bridge", "rescal";
+-			msi-controller;
+-			msi-parent = <&pcie0>;
+-
+-			ranges = <0x02000000 0x00 0x00000000
+-				  0x17 0x00000000
+-				  0x0 0xfffffffc>,
+-				 <0x43000000 0x04 0x00000000
+-				  0x14 0x00000000
+-				  0x3 0x00000000>;
+-
+-			dma-ranges = <0x43000000 0x10 0x00000000
+-				      0x00 0x00000000
+-				      0x10 0x00000000>;
+-
+-			status = "disabled";
+-		};
+-
+-		// Single-lane Gen3 PCIe
+-		// Outbound window at 0x18_000000-0x1b_ffffff
+-		pcie1: pcie@110000 {
+-			compatible = "brcm,bcm2712-pcie";
+-			reg = <0x10 0x00110000  0x0 0x9310>;
+-			device_type = "pci";
+-			max-link-speed = <2>;
+-			#address-cells = <3>;
+-			#interrupt-cells = <1>;
+-			#size-cells = <2>;
+-			/*
+-			 * Unused interrupts:
+-			 * 218: AER
+-			 * 225: NMI
+-			 * 226: PME
+-			 */
+-			interrupt-parent = <&gicv2>;
+-			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-names = "pcie", "msi";
+-			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+-			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 2 &gicv2 GIC_SPI 220
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 3 &gicv2 GIC_SPI 221
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 4 &gicv2 GIC_SPI 222
+-							IRQ_TYPE_LEVEL_HIGH>;
+-			resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>;
+-			reset-names = "swinit", "bridge", "rescal";
+-			msi-controller;
+-			msi-parent = <&mip1>;
+-
+-			ranges = <0x02000000 0x00 0x00000000
+-				  0x1b 0x00000000
+-				  0x00 0xfffffffc>,
+-				 <0x43000000 0x04 0x00000000
+-				  0x18 0x00000000
+-				  0x03 0x00000000>;
+-
+-			dma-ranges = <0x03000000 0x10 0x00000000
+-				      0x00 0x00000000
+-				      0x10 0x00000000>;
+-
+-			status = "disabled";
+-		};
+-
+-		pcie_rescal: reset-controller@119500 {
+-			compatible = "brcm,bcm7216-pcie-sata-rescal";
+-			reg = <0x10 0x00119500  0x0 0x10>;
+-			#reset-cells = <0>;
+-		};
+-
+-		// Quad-lane Gen3 PCIe
+-		// Outbound window at 0x1c_000000-0x1f_ffffff
+-		pcie2: pcie@120000 {
+-			compatible = "brcm,bcm2712-pcie";
+-			reg = <0x10 0x00120000  0x0 0x9310>;
+-			device_type = "pci";
+-			max-link-speed = <2>;
+-			#address-cells = <3>;
+-			#interrupt-cells = <1>;
+-			#size-cells = <2>;
+-			/*
+-			 * Unused interrupts:
+-			 * 228: AER
+-			 * 235: NMI
+-			 * 236: PME
+-			 */
+-			interrupt-parent = <&gicv2>;
+-			interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+-			interrupt-names = "pcie", "msi";
+-			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+-			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 2 &gicv2 GIC_SPI 230
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 3 &gicv2 GIC_SPI 231
+-							IRQ_TYPE_LEVEL_HIGH>,
+-					<0 0 0 4 &gicv2 GIC_SPI 232
+-							IRQ_TYPE_LEVEL_HIGH>;
+-			resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>;
+-			reset-names = "swinit", "bridge", "rescal";
+-			msi-controller;
+-			msi-parent = <&mip0>;
+-
+-			// ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000
+-			ranges = <0x02000000 0x00 0x00000000
+-				  0x1f 0x00000000
+-				  0x0 0xfffffffc>,
+-			// 12GB, 64-bit, prefetchable at PCIe 04_00000000
+-				 <0x43000000 0x04 0x00000000
+-				  0x1c 0x00000000
+-				  0x03 0x00000000>;
+-
+-			// 64GB system RAM space at PCIe 10_00000000
+-			dma-ranges = <0x02000000 0x00 0x00000000
+-				      0x1f 0x00000000
+-				      0x00 0x00400000>,
+-				     <0x43000000 0x10 0x00000000
+-				      0x00 0x00000000
+-				      0x10 0x00000000>;
+-
+-			status = "disabled";
+-		};
+-
+-		mip0: msi-controller@130000 {
+-			compatible = "brcm,bcm2712-mip-intc";
+-			reg = <0x10 0x00130000  0x0 0xc0>;
+-			msi-controller;
+-			interrupt-controller;
+-			#interrupt-cells = <2>;
+-			brcm,msi-base-spi = <128>;
+-			brcm,msi-num-spis = <64>;
+-			brcm,msi-offset = <0>;
+-			brcm,msi-pci-addr = <0xff 0xfffff000>;
+-		};
+-
+-		mip1: msi-controller@131000 {
+-			compatible = "brcm,bcm2712-mip-intc";
+-			reg = <0x10 0x00131000  0x0 0xc0>;
+-			msi-controller;
+-			interrupt-controller;
+-			#interrupt-cells = <2>;
+-			brcm,msi-base-spi = <247>;
+-			/* Actually 20 total, but the others are
+-			 * both sparse and non-consecutive */
+-			brcm,msi-num-spis = <8>;
+-			brcm,msi-offset = <8>;
+-			brcm,msi-pci-addr = <0xff 0xffffe000>;
+-		};
+-
+-		syscon_piarbctl: syscon@400018 {
+-			compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
+-			reg = <0x10 0x00400018  0x0 0x18>;
+-		};
+-
+-		usb: usb@480000 {
+-			compatible = "brcm,bcm2835-usb";
+-			reg = <0x10 0x00480000 0x0 0x10000>;
+-			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			clocks = <&clk_usb>;
+-			clock-names = "otg";
+-			phys = <&usbphy>;
+-			phy-names = "usb2-phy";
+-			status = "disabled";
+-		};
+-
+-		rpivid: codec@800000 {
+-			compatible = "raspberrypi,rpivid-vid-decoder";
+-			reg = <0x10 0x00800000  0x0 0x10000>, /* HEVC */
+-			      <0x10 0x00840000  0x0 0x1000>;  /* INTC */
+-			reg-names = "hevc",
+-				    "intc";
+-
+-			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&firmware_clocks 11>;
+-			clock-names = "hevc";
+-			iommus = <&iommu2>;
+-			status = "disabled";
+-		};
+-
+-		sdio1: mmc@fff000 {
+-			compatible = "brcm,bcm2712-sdhci";
+-			reg = <0x10 0x00fff000  0x0 0x260>,
+-			      <0x10 0x00fff400  0x0 0x200>,
+-			      <0x10 0x015040b0  0x0 0x4>,  // Bus isolation control
+-			      <0x10 0x015200f0  0x0 0x24>; // LCPLL control misc0-8
+-			reg-names = "host", "cfg", "busisol", "lcpll";
+-			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_emmc2>;
+-			sdhci-caps-mask = <0x0000C000 0x0>;
+-			sdhci-caps = <0x0 0x0>;
+-			mmc-ddr-3_3v;
+-		};
+-
+-		sdio2: mmc@1100000 {
+-			compatible = "brcm,bcm2712-sdhci";
+-			reg = <0x10 0x01100000  0x0 0x260>,
+-			      <0x10 0x01100400  0x0 0x200>;
+-			reg-names = "host", "cfg";
+-			interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clk_emmc2>;
+-			sdhci-caps-mask = <0x0000C000 0x0>;
+-			sdhci-caps = <0x0 0x0>;
+-			supports-cqe;
+-			mmc-ddr-3_3v;
+-			status = "disabled";
+-		};
+-
+-		bcm_reset: reset-controller@1504318 {
+-			compatible = "brcm,brcmstb-reset";
+-			reg = <0x10 0x01504318  0x0 0x30>;
+-			#reset-cells = <1>;
+-		};
+-
+-		v3d: v3d@2000000 {
+-			compatible = "brcm,2712-v3d";
+-			reg = <0x10 0x02000000  0x0 0x4000>,
+-			      <0x10 0x02008000  0x0 0x6000>;
+-			reg-names = "hub", "core0";
+-
+-			power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
+-			resets = <&pm BCM2835_RESET_V3D>;
+-			clocks = <&firmware_clocks 5>;
+-			clocks-names = "v3d";
+-			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+-				     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		gicv2: interrupt-controller@7fff9000 {
+-			interrupt-controller;
+-			#interrupt-cells = <3>;
+-			compatible = "arm,gic-400";
+-			reg =	<0x10 0x7fff9000  0x0 0x1000>,
+-				<0x10 0x7fffa000  0x0 0x2000>,
+-				<0x10 0x7fffc000  0x0 0x2000>,
+-				<0x10 0x7fffe000  0x0 0x2000>;
+-			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+-						 IRQ_TYPE_LEVEL_HIGH)>;
+-		};
+-
+-		pisp_be: pisp_be@880000  {
+-			compatible = "raspberrypi,pispbe";
+-			reg = <0x10 0x00880000  0x0 0x4000>;
+-			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&firmware_clocks 7>;
+-			clocks-names = "isp_be";
+-			status = "okay";
+-			iommus = <&iommu2>;
+-		};
+-	};
+-
+-	clocks {
+-		/* The oscillator is the root of the clock tree. */
+-		clk_osc: clk-osc {
+-			compatible = "fixed-clock";
+-			#clock-cells = <0>;
+-			clock-output-names = "osc";
+-			clock-frequency = <54000000>;
+-		};
+-
+-		clk_usb: clk-usb {
+-			compatible = "fixed-clock";
+-			#clock-cells = <0>;
+-			clock-output-names = "otg";
+-			clock-frequency = <480000000>;
+-		};
+-
+-		clk_vpu: clk_vpu {
+-			#clock-cells = <0>;
+-			compatible = "fixed-clock";
+-			clock-frequency = <750000000>;
+-			clock-output-names = "vpu-clock";
+-		};
+-
+-		clk_uart: clk_uart {
+-			#clock-cells = <0>;
+-			compatible = "fixed-clock";
+-			clock-frequency = <9216000>;
+-			clock-output-names = "uart-clock";
+-		};
+-
+-		clk_emmc2: clk_emmc2 {
+-			#clock-cells = <0>;
+-			compatible = "fixed-clock";
+-			clock-frequency = <200000000>;
+-			clock-output-names = "emmc2-clock";
+-		};
+-	};
+-
+-	usbphy: phy {
+-		compatible = "usb-nop-xceiv";
+-		#phy-cells = <0>;
+-	};
+-};
+--- a/arch/arm/boot/dts/broadcom/rp1.dtsi
++++ /dev/null
+@@ -1,1287 +0,0 @@
+-#include <dt-bindings/clock/rp1.h>
+-#include <dt-bindings/interrupt-controller/irq.h>
+-#include <dt-bindings/mfd/rp1.h>
+-
+-&rp1_target {
+-	rp1: rp1 {
+-		compatible = "simple-bus";
+-		#address-cells = <2>;
+-		#size-cells = <2>;
+-		#interrupt-cells = <2>;
+-		interrupt-controller;
+-		interrupt-parent = <&rp1>;
+-
+-		// ranges and dma-ranges must be provided by the includer
+-
+-		rp1_clocks: clocks@18000 {
+-			compatible = "raspberrypi,rp1-clocks";
+-			#clock-cells = <1>;
+-			reg = <0xc0 0x40018000 0x0 0x10038>;
+-			clocks = <&clk_xosc>;
+-
+-			assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
+-					  <&rp1_clocks RP1_PLL_AUDIO_CORE>,
+-					  // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers
+-					  <&rp1_clocks RP1_PLL_SYS>,
+-					  <&rp1_clocks RP1_PLL_SYS_SEC>,
+-					  <&rp1_clocks RP1_PLL_AUDIO>,
+-					  <&rp1_clocks RP1_PLL_AUDIO_SEC>,
+-					  <&rp1_clocks RP1_CLK_SYS>,
+-					  <&rp1_clocks RP1_PLL_SYS_PRI_PH>,
+-					  // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0)
+-					  <&rp1_clocks RP1_CLK_SLOW_SYS>,
+-					  <&rp1_clocks RP1_CLK_SDIO_TIMER>,
+-					  <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>,
+-					  <&rp1_clocks RP1_CLK_ETH_TSU>;
+-
+-			assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
+-					       <1536000000>, // RP1_PLL_AUDIO_CORE
+-					       <200000000>,  // RP1_PLL_SYS
+-					       <125000000>,  // RP1_PLL_SYS_SEC
+-					       <61440000>,   // RP1_PLL_AUDIO
+-					       <192000000>,  // RP1_PLL_AUDIO_SEC
+-					       <200000000>,  // RP1_CLK_SYS
+-					       <100000000>,  // RP1_PLL_SYS_PRI_PH
+-					       // Must match the XOSC frequency
+-					       <50000000>, // RP1_CLK_SLOW_SYS
+-					       <1000000>, // RP1_CLK_SDIO_TIMER
+-					       <200000000>, // RP1_CLK_SDIO_ALT_SRC
+-					       <50000000>; // RP1_CLK_ETH_TSU
+-		};
+-
+-		rp1_uart0: serial@30000 {
+-			compatible = "arm,pl011-axi";
+-			reg = <0xc0 0x40030000  0x0 0x100>;
+-			interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+-			clock-names = "uartclk", "apb_pclk";
+-			dmas = <&rp1_dma RP1_DMA_UART0_TX>,
+-			       <&rp1_dma RP1_DMA_UART0_RX>;
+-			dma-names = "tx", "rx";
+-			pinctrl-names = "default";
+-			arm,primecell-periphid = <0x00541011>;
+-			uart-has-rtscts;
+-			cts-event-workaround;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		rp1_uart1: serial@34000 {
+-			compatible = "arm,pl011-axi";
+-			reg = <0xc0 0x40034000  0x0 0x100>;
+-			interrupts = <RP1_INT_UART1 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+-			clock-names = "uartclk", "apb_pclk";
+-			// dmas = <&rp1_dma RP1_DMA_UART1_TX>,
+-			//        <&rp1_dma RP1_DMA_UART1_RX>;
+-			// dma-names = "tx", "rx";
+-			pinctrl-names = "default";
+-			arm,primecell-periphid = <0x00541011>;
+-			uart-has-rtscts;
+-			cts-event-workaround;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		rp1_uart2: serial@38000 {
+-			compatible = "arm,pl011-axi";
+-			reg = <0xc0 0x40038000  0x0 0x100>;
+-			interrupts = <RP1_INT_UART2 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+-			clock-names = "uartclk", "apb_pclk";
+-			// dmas = <&rp1_dma RP1_DMA_UART2_TX>,
+-			//        <&rp1_dma RP1_DMA_UART2_RX>;
+-			// dma-names = "tx", "rx";
+-			pinctrl-names = "default";
+-			arm,primecell-periphid = <0x00541011>;
+-			uart-has-rtscts;
+-			cts-event-workaround;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		rp1_uart3: serial@3c000 {
+-			compatible = "arm,pl011-axi";
+-			reg = <0xc0 0x4003c000  0x0 0x100>;
+-			interrupts = <RP1_INT_UART3 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+-			clock-names = "uartclk", "apb_pclk";
+-			// dmas = <&rp1_dma RP1_DMA_UART3_TX>,
+-			//        <&rp1_dma RP1_DMA_UART3_RX>;
+-			// dma-names = "tx", "rx";
+-			pinctrl-names = "default";
+-			arm,primecell-periphid = <0x00541011>;
+-			uart-has-rtscts;
+-			cts-event-workaround;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		rp1_uart4: serial@40000 {
+-			compatible = "arm,pl011-axi";
+-			reg = <0xc0 0x40040000  0x0 0x100>;
+-			interrupts = <RP1_INT_UART4 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+-			clock-names = "uartclk", "apb_pclk";
+-			// dmas = <&rp1_dma RP1_DMA_UART4_TX>,
+-			//        <&rp1_dma RP1_DMA_UART4_RX>;
+-			// dma-names = "tx", "rx";
+-			pinctrl-names = "default";
+-			arm,primecell-periphid = <0x00541011>;
+-			uart-has-rtscts;
+-			cts-event-workaround;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		rp1_uart5: serial@44000 {
+-			compatible = "arm,pl011-axi";
+-			reg = <0xc0 0x40044000  0x0 0x100>;
+-			interrupts = <RP1_INT_UART5 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
+-			clock-names = "uartclk", "apb_pclk";
+-			// dmas = <&rp1_dma RP1_DMA_UART5_TX>,
+-			//        <&rp1_dma RP1_DMA_UART5_RX>;
+-			// dma-names = "tx", "rx";
+-			pinctrl-names = "default";
+-			arm,primecell-periphid = <0x00541011>;
+-			uart-has-rtscts;
+-			cts-event-workaround;
+-			skip-init;
+-			status = "disabled";
+-		};
+-
+-		rp1_spi8: spi@4c000 {
+-			reg = <0xc0 0x4004c000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI8 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI8_TX>,
+-			       <&rp1_dma RP1_DMA_SPI8_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_spi0: spi@50000 {
+-			reg = <0xc0 0x40050000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI0 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI0_TX>,
+-			       <&rp1_dma RP1_DMA_SPI0_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_spi1: spi@54000 {
+-			reg = <0xc0 0x40054000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI1 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI1_TX>,
+-			       <&rp1_dma RP1_DMA_SPI1_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_spi2: spi@58000 {
+-			reg = <0xc0 0x40058000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI2 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI2_TX>,
+-			       <&rp1_dma RP1_DMA_SPI2_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_spi3: spi@5c000 {
+-			reg = <0xc0 0x4005c000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI3 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI3_TX>,
+-			       <&rp1_dma RP1_DMA_SPI3_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		// SPI4 is a target/slave interface
+-		rp1_spi4: spi@60000 {
+-			reg = <0xc0 0x40060000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI4 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <0>;
+-			#size-cells = <0>;
+-			num-cs = <1>;
+-			spi-slave;
+-			dmas = <&rp1_dma RP1_DMA_SPI4_TX>,
+-			       <&rp1_dma RP1_DMA_SPI4_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-
+-			slave {
+-				compatible = "spidev";
+-				spi-max-frequency = <1000000>;
+-			};
+-		};
+-
+-		rp1_spi5: spi@64000 {
+-			reg = <0xc0 0x40064000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI5 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI5_TX>,
+-			       <&rp1_dma RP1_DMA_SPI5_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_spi6: spi@68000 {
+-			reg = <0xc0 0x40068000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI6 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			num-cs = <2>;
+-			dmas = <&rp1_dma RP1_DMA_SPI6_TX>,
+-			       <&rp1_dma RP1_DMA_SPI6_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		// SPI7 is a target/slave interface
+-		rp1_spi7: spi@6c000 {
+-			reg = <0xc0 0x4006c000  0x0 0x130>;
+-			compatible = "snps,dw-apb-ssi";
+-			interrupts = <RP1_INT_SPI7 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "ssi_clk";
+-			#address-cells = <0>;
+-			#size-cells = <0>;
+-			num-cs = <1>;
+-			spi-slave;
+-			dmas = <&rp1_dma RP1_DMA_SPI7_TX>,
+-			       <&rp1_dma RP1_DMA_SPI7_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-
+-			slave {
+-				compatible = "spidev";
+-				spi-max-frequency = <1000000>;
+-			};
+-		};
+-
+-		rp1_i2c0: i2c@70000 {
+-			reg = <0xc0 0x40070000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C0 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2c1: i2c@74000 {
+-			reg = <0xc0 0x40074000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C1 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2c2: i2c@78000 {
+-			reg = <0xc0 0x40078000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C2 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2c3: i2c@7c000 {
+-			reg = <0xc0 0x4007c000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C3 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2c4: i2c@80000 {
+-			reg = <0xc0 0x40080000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C4 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2c5: i2c@84000 {
+-			reg = <0xc0 0x40084000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C5 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2c6: i2c@88000 {
+-			reg = <0xc0 0x40088000  0x0 0x1000>;
+-			compatible = "snps,designware-i2c";
+-			interrupts = <RP1_INT_I2C6 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS>;
+-			i2c-scl-rising-time-ns = <65>;
+-			i2c-scl-falling-time-ns = <100>;
+-			status = "disabled";
+-		};
+-
+-		rp1_pwm0: pwm@98000 {
+-			compatible = "raspberrypi,rp1-pwm";
+-			reg = <0xc0 0x40098000  0x0 0x100>;
+-			#pwm-cells = <3>;
+-			clocks = <&rp1_clocks RP1_CLK_PWM0>;
+-			assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>;
+-			assigned-clock-rates = <50000000>;
+-			status = "disabled";
+-		};
+-
+-		rp1_pwm1: pwm@9c000 {
+-			compatible = "raspberrypi,rp1-pwm";
+-			reg = <0xc0 0x4009c000  0x0 0x100>;
+-			#pwm-cells = <3>;
+-			clocks = <&rp1_clocks RP1_CLK_PWM1>;
+-			assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>;
+-			assigned-clock-rates = <50000000>;
+-			status = "disabled";
+-		};
+-
+-		rp1_i2s0: i2s@a0000 {
+-			reg = <0xc0 0x400a0000  0x0 0x1000>;
+-			compatible = "snps,designware-i2s";
+-			// Providing an interrupt disables DMA
+-			// interrupts = <RP1_INT_I2S0 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_I2S>;
+-			clock-names = "i2sclk";
+-			#sound-dai-cells = <0>;
+-			dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_i2s1: i2s@a4000 {
+-			reg = <0xc0 0x400a4000  0x0 0x1000>;
+-			compatible = "snps,designware-i2s";
+-			// Providing an interrupt disables DMA
+-			// interrupts = <RP1_INT_I2S1 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_I2S>;
+-			clock-names = "i2sclk";
+-			#sound-dai-cells = <0>;
+-			dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>;
+-			dma-names = "tx", "rx";
+-			status = "disabled";
+-		};
+-
+-		rp1_i2s2: i2s@a8000 {
+-			reg = <0xc0 0x400a8000  0x0 0x1000>;
+-			compatible = "snps,designware-i2s";
+-			// Providing an interrupt disables DMA
+-			// interrupts = <RP1_INT_I2S2 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_I2S>;
+-			status = "disabled";
+-		};
+-
+-		rp1_sdio_clk0: sdio_clk0@b0004 {
+-			compatible = "raspberrypi,rp1-sdio-clk";
+-			reg = <0xc0 0x400b0004 0x0 0x1c>;
+-			clocks = <&sdio_src &sdhci_core>;
+-			clock-names = "src", "base";
+-			#clock-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		rp1_sdio_clk1: sdio_clk1@b4004 {
+-			compatible = "raspberrypi,rp1-sdio-clk";
+-			reg = <0xc0 0x400b4004 0x0 0x1c>;
+-			clocks = <&sdio_src &sdhci_core>;
+-			clock-names = "src", "base";
+-			#clock-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		rp1_adc: adc@c8000 {
+-			compatible = "raspberrypi,rp1-adc";
+-			reg = <0xc0 0x400c8000 0x0 0x4000>;
+-			clocks = <&rp1_clocks RP1_CLK_ADC>;
+-			clock-names = "adcclk";
+-			#clock-cells = <0>;
+-			vref-supply = <&rp1_vdd_3v3>;
+-			status = "disabled";
+-		};
+-
+-		rp1_gpio: gpio@d0000 {
+-			reg = <0xc0 0x400d0000  0x0 0xc000>,
+-			      <0xc0 0x400e0000  0x0 0xc000>,
+-			      <0xc0 0x400f0000  0x0 0xc000>;
+-			compatible = "raspberrypi,rp1-gpio";
+-			interrupts = <RP1_INT_IO_BANK0 IRQ_TYPE_LEVEL_HIGH>,
+-				     <RP1_INT_IO_BANK1 IRQ_TYPE_LEVEL_HIGH>,
+-			             <RP1_INT_IO_BANK2 IRQ_TYPE_LEVEL_HIGH>;
+-			gpio-controller;
+-			#gpio-cells = <2>;
+-			interrupt-controller;
+-			#interrupt-cells = <2>;
+-			gpio-ranges = <&rp1_gpio 0 0 54>;
+-
+-			rp1_uart0_14_15: rp1_uart0_14_15 {
+-				pin_txd {
+-					function = "uart0";
+-					pins = "gpio14";
+-					bias-disable;
+-				};
+-				pin_rxd {
+-					function = "uart0";
+-					pins = "gpio15";
+-					bias-pull-up;
+-				};
+-			};
+-			rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 {
+-				pin_cts {
+-					function = "uart0";
+-					pins = "gpio16";
+-					bias-pull-up;
+-				};
+-				pin_rts {
+-					function = "uart0";
+-					pins = "gpio17";
+-					bias-disable;
+-				};
+-			};
+-			rp1_uart1_0_1: rp1_uart1_0_1 {
+-				pin_txd {
+-					function = "uart1";
+-					pins = "gpio0";
+-					bias-disable;
+-				};
+-				pin_rxd {
+-					function = "uart1";
+-					pins = "gpio1";
+-					bias-pull-up;
+-				};
+-			};
+-			rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 {
+-				pin_cts {
+-					function = "uart1";
+-					pins = "gpio2";
+-					bias-pull-up;
+-				};
+-				pin_rts {
+-					function = "uart1";
+-					pins = "gpio3";
+-					bias-disable;
+-				};
+-			};
+-			rp1_uart2_4_5: rp1_uart2_4_5 {
+-				pin_txd {
+-					function = "uart2";
+-					pins = "gpio4";
+-					bias-disable;
+-				};
+-				pin_rxd {
+-					function = "uart2";
+-					pins = "gpio5";
+-					bias-pull-up;
+-				};
+-			};
+-			rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 {
+-				pin_cts {
+-					function = "uart2";
+-					pins = "gpio6";
+-					bias-pull-up;
+-				};
+-				pin_rts {
+-					function = "uart2";
+-					pins = "gpio7";
+-					bias-disable;
+-				};
+-			};
+-			rp1_uart3_8_9: rp1_uart3_8_9 {
+-				pin_txd {
+-					function = "uart3";
+-					pins = "gpio8";
+-					bias-disable;
+-				};
+-				pin_rxd {
+-					function = "uart3";
+-					pins = "gpio9";
+-					bias-pull-up;
+-				};
+-			};
+-			rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 {
+-				pin_cts {
+-					function = "uart3";
+-					pins = "gpio10";
+-					bias-pull-up;
+-				};
+-				pin_rts {
+-					function = "uart3";
+-					pins = "gpio11";
+-					bias-disable;
+-				};
+-			};
+-			rp1_uart4_12_13: rp1_uart4_12_13 {
+-				pin_txd {
+-					function = "uart4";
+-					pins = "gpio12";
+-					bias-disable;
+-				};
+-				pin_rxd {
+-					function = "uart4";
+-					pins = "gpio13";
+-					bias-pull-up;
+-				};
+-			};
+-			rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 {
+-				pin_cts {
+-					function = "uart4";
+-					pins = "gpio14";
+-					bias-pull-up;
+-				};
+-				pin_rts {
+-					function = "uart4";
+-					pins = "gpio15";
+-					bias-disable;
+-				};
+-			};
+-
+-			rp1_sdio0_22_27: rp1_sdio0_22_27 {
+-				pin_clk {
+-					function = "sd0";
+-					pins = "gpio22";
+-					bias-disable;
+-					drive-strength = <12>;
+-					slew-rate = <1>;
+-				};
+-				pin_cmd {
+-					function = "sd0";
+-					pins = "gpio23";
+-					bias-pull-up;
+-					drive-strength = <12>;
+-					slew-rate = <1>;
+-				};
+-				pins_dat {
+-					function = "sd0";
+-					pins = "gpio24", "gpio25", "gpio26", "gpio27";
+-					bias-pull-up;
+-					drive-strength = <12>;
+-					slew-rate = <1>;
+-				};
+-			};
+-
+-			rp1_sdio1_28_33: rp1_sdio1_28_33 {
+-				pin_clk {
+-					function = "sd1";
+-					pins = "gpio28";
+-					bias-disable;
+-					drive-strength = <12>;
+-					slew-rate = <1>;
+-				};
+-				pin_cmd {
+-					function = "sd1";
+-					pins = "gpio29";
+-					bias-pull-up;
+-					drive-strength = <12>;
+-					slew-rate = <1>;
+-				};
+-				pins_dat {
+-					function = "sd1";
+-					pins = "gpio30", "gpio31", "gpio32", "gpio33";
+-					bias-pull-up;
+-					drive-strength = <12>;
+-					slew-rate = <1>;
+-				};
+-			};
+-
+-			rp1_i2s0_18_21: rp1_i2s0_18_21 {
+-				function = "i2s0";
+-				pins = "gpio18", "gpio19", "gpio20", "gpio21";
+-				bias-disable;
+-			};
+-
+-			rp1_i2s1_18_21: rp1_i2s1_18_21 {
+-				function = "i2s1";
+-				pins = "gpio18", "gpio19", "gpio20", "gpio21";
+-				bias-disable;
+-			};
+-
+-			rp1_i2c4_34_35: rp1_i2c4_34_35 {
+-				function = "i2c4";
+-				pins = "gpio34", "gpio35";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c6_38_39: rp1_i2c6_38_39 {
+-				function = "i2c6";
+-				pins = "gpio38", "gpio39";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c4_40_41: rp1_i2c4_40_41 {
+-				function = "i2c4";
+-				pins = "gpio40", "gpio41";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c5_44_45: rp1_i2c5_44_45 {
+-				function = "i2c5";
+-				pins = "gpio44", "gpio45";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c0_0_1: rp1_i2c0_0_1 {
+-				function = "i2c0";
+-				pins = "gpio0", "gpio1";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c0_8_9: rp1_i2c0_8_9 {
+-				function = "i2c0";
+-				pins = "gpio8", "gpio9";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c1_2_3: rp1_i2c1_2_3 {
+-				function = "i2c1";
+-				pins = "gpio2", "gpio3";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c1_10_11: rp1_i2c1_10_11 {
+-				function = "i2c1";
+-				pins = "gpio10", "gpio11";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c2_4_5: rp1_i2c2_4_5 {
+-				function = "i2c2";
+-				pins = "gpio4", "gpio5";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c2_12_13: rp1_i2c2_12_13 {
+-				function = "i2c2";
+-				pins = "gpio12", "gpio13";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c3_6_7: rp1_i2c3_6_7 {
+-				function = "i2c3";
+-				pins = "gpio6", "gpio7";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c3_14_15: rp1_i2c3_14_15 {
+-				function = "i2c3";
+-				pins = "gpio14", "gpio15";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-			rp1_i2c3_22_23: rp1_i2c3_22_23 {
+-				function = "i2c3";
+-				pins = "gpio22", "gpio23";
+-				drive-strength = <12>;
+-				bias-pull-up;
+-			};
+-
+-			// DPI mappings with HSYNC,VSYNC but without PIXCLK,DE
+-			rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3", "gpio4", "gpio5",
+-				       "gpio6", "gpio7", "gpio8", "gpio9",
+-				       "gpio10", "gpio11", "gpio12", "gpio13",
+-				       "gpio14", "gpio15", "gpio16", "gpio17",
+-				       "gpio18", "gpio19";
+-				bias-disable;
+-			};
+-			rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3", "gpio4", "gpio5",
+-				       "gpio6", "gpio7", "gpio8",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17",
+-				       "gpio20", "gpio21", "gpio22", "gpio23",
+-				       "gpio24";
+-				bias-disable;
+-			};
+-			rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3",
+-				       "gpio5", "gpio6", "gpio7", "gpio8",
+-				       "gpio9",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17",
+-				       "gpio21", "gpio22", "gpio23", "gpio24",
+-				       "gpio25";
+-				bias-disable;
+-			};
+-			rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3", "gpio4", "gpio5",
+-				       "gpio6", "gpio7", "gpio8", "gpio9",
+-				       "gpio10", "gpio11", "gpio12", "gpio13",
+-				       "gpio14", "gpio15", "gpio16", "gpio17",
+-				       "gpio18", "gpio19", "gpio20", "gpio21";
+-				bias-disable;
+-			};
+-			rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3", "gpio4", "gpio5",
+-				       "gpio6", "gpio7", "gpio8", "gpio9",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17",
+-				       "gpio20", "gpio21", "gpio22", "gpio23",
+-				       "gpio24", "gpio25";
+-				bias-disable;
+-			};
+-			rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3", "gpio4", "gpio5",
+-				       "gpio6", "gpio7", "gpio8", "gpio9",
+-				       "gpio10", "gpio11", "gpio12", "gpio13",
+-				       "gpio14", "gpio15", "gpio16", "gpio17",
+-				       "gpio18", "gpio19", "gpio20", "gpio21",
+-				       "gpio22", "gpio23", "gpio24", "gpio25",
+-				       "gpio26", "gpio27";
+-				bias-disable;
+-			};
+-			rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */
+-				function = "dpi";
+-				pins = "gpio2", "gpio3";
+-				bias-disable;
+-			};
+-
+-			// More DPI mappings, including PIXCLK,DE on GPIOs 0,1
+-			rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */
+-				function = "dpi";
+-				pins = "gpio0", "gpio1", "gpio2", "gpio3",
+-				       "gpio4", "gpio5", "gpio6", "gpio7",
+-				       "gpio8", "gpio9", "gpio10", "gpio11",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17", "gpio18", "gpio19";
+-				bias-disable;
+-			};
+-			rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */
+-				function = "dpi";
+-				pins = "gpio0", "gpio1", "gpio2", "gpio3",
+-				       "gpio4", "gpio5", "gpio6", "gpio7",
+-				       "gpio8",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17",
+-				       "gpio20", "gpio21", "gpio22", "gpio23",
+-				       "gpio24";
+-				bias-disable;
+-			};
+-			rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */
+-				function = "dpi";
+-				pins = "gpio0", "gpio1", "gpio2", "gpio3",
+-				       "gpio5", "gpio6", "gpio7", "gpio8",
+-				       "gpio9",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17",
+-				       "gpio21", "gpio22", "gpio23", "gpio24",
+-				       "gpio25";
+-				bias-disable;
+-			};
+-			rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */
+-				function = "dpi";
+-				pins = "gpio0", "gpio1", "gpio2", "gpio3",
+-				       "gpio4", "gpio5", "gpio6", "gpio7",
+-				       "gpio8", "gpio9", "gpio10", "gpio11",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17", "gpio18", "gpio19",
+-				       "gpio20", "gpio21";
+-				bias-disable;
+-			};
+-			rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */
+-				function = "dpi";
+-				pins = "gpio0", "gpio1", "gpio2", "gpio3",
+-				       "gpio4", "gpio5", "gpio6", "gpio7",
+-				       "gpio8", "gpio9",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17",
+-				       "gpio20", "gpio21", "gpio22", "gpio23",
+-				       "gpio24", "gpio25";
+-				bias-disable;
+-			};
+-			rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */
+-				function = "dpi";
+-				pins = "gpio0", "gpio1", "gpio2", "gpio3",
+-				       "gpio4", "gpio5", "gpio6", "gpio7",
+-				       "gpio8", "gpio9", "gpio10", "gpio11",
+-				       "gpio12", "gpio13", "gpio14", "gpio15",
+-				       "gpio16", "gpio17", "gpio18", "gpio19",
+-				       "gpio20", "gpio21", "gpio22", "gpio23",
+-				       "gpio24", "gpio25", "gpio26", "gpio27";
+-				bias-disable;
+-			};
+-
+-			rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 {
+-				function = "gpclk0";
+-				pins = "gpio4";
+-				bias-disable;
+-			};
+-
+-			rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 {
+-				function = "gpclk0";
+-				pins = "gpio20";
+-				bias-disable;
+-			};
+-
+-			rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 {
+-				function = "gpclk1";
+-				pins = "gpio5";
+-				bias-disable;
+-			};
+-
+-			rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 {
+-				function = "gpclk1";
+-				pins = "gpio18";
+-				bias-disable;
+-			};
+-
+-			rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 {
+-				function = "gpclk1";
+-				pins = "gpio21";
+-				bias-disable;
+-			};
+-
+-			rp1_pwm1_gpio45: rp1_pwm1_gpio45 {
+-				function = "pwm1";
+-				pins = "gpio45";
+-				bias-pull-down;
+-			};
+-
+-			rp1_spi0_gpio9: rp1_spi0_gpio9 {
+-				function = "spi0";
+-				pins = "gpio9", "gpio10", "gpio11";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 {
+-				function = "spi0";
+-				pins = "gpio7", "gpio8";
+-				bias-pull-up;
+-			};
+-
+-			rp1_spi1_gpio19: rp1_spi1_gpio19 {
+-				function = "spi1";
+-				pins = "gpio19", "gpio20", "gpio21";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi2_gpio1: rp1_spi2_gpio1 {
+-				function = "spi2";
+-				pins = "gpio1", "gpio2", "gpio3";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi3_gpio5: rp1_spi3_gpio5 {
+-				function = "spi3";
+-				pins = "gpio5", "gpio6", "gpio7";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi4_gpio9: rp1_spi4_gpio9 {
+-				function = "spi4";
+-				pins = "gpio9", "gpio10", "gpio11";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi5_gpio13: rp1_spi5_gpio13 {
+-				function = "spi5";
+-				pins = "gpio13", "gpio14", "gpio15";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi8_gpio49: rp1_spi8_gpio49 {
+-				function = "spi8";
+-				pins = "gpio49", "gpio50", "gpio51";
+-				bias-disable;
+-				drive-strength = <12>;
+-				slew-rate = <1>;
+-			};
+-
+-			rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 {
+-				function = "spi0";
+-				pins = "gpio52", "gpio53";
+-				bias-pull-up;
+-			};
+-		};
+-
+-		rp1_eth: ethernet@100000 {
+-			reg = <0xc0 0x40100000  0x0 0x4000>;
+-			compatible = "cdns,macb";
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			interrupts = <RP1_INT_ETH IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>;
+-			clock-names = "pclk", "hclk", "tsu_clk";
+-			phy-mode = "rgmii-id";
+-			cdns,aw2w-max-pipe = /bits/ 8 <8>;
+-			cdns,ar2r-max-pipe = /bits/ 8 <8>;
+-			cdns,use-aw2b-fill;
+-			local-mac-address = [00 00 00 00 00 00];
+-			status = "disabled";
+-		};
+-
+-		rp1_csi0: csi@110000 {
+-			compatible = "raspberrypi,rp1-cfe";
+-			reg = <0xc0 0x40110000  0x0 0x100>, // CSI2 DMA address
+-			      <0xc0 0x40114000  0x0 0x100>, // PHY/CSI Host address
+-			      <0xc0 0x40120000  0x0 0x100>, // MIPI CFG address
+-			      <0xc0 0x40124000  0x0 0x1000>; // PiSP FE address
+-
+-			// interrupts must match rp1_pisp_fe setup
+-			interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+-			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+-			assigned-clock-rates = <25000000>;
+-
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		rp1_csi1: csi@128000 {
+-			compatible = "raspberrypi,rp1-cfe";
+-			reg = <0xc0 0x40128000  0x0 0x100>, // CSI2 DMA address
+-			      <0xc0 0x4012c000  0x0 0x100>, // PHY/CSI Host address
+-			      <0xc0 0x40138000  0x0 0x100>, // MIPI CFG address
+-			      <0xc0 0x4013c000  0x0 0x1000>; // PiSP FE address
+-
+-			// interrupts must match rp1_pisp_fe setup
+-			interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+-			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+-			assigned-clock-rates = <25000000>;
+-
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			status = "disabled";
+-		};
+-
+-		rp1_mmc0: mmc@180000 {
+-			reg = <0xc0 0x40180000  0x0 0x100>;
+-			compatible = "raspberrypi,rp1-dwcmshc";
+-			interrupts = <RP1_INT_SDIO0 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
+-			          &rp1_clocks RP1_CLK_SDIO_TIMER
+-			          &rp1_sdio_clk0>;
+-			clock-names = "bus", "core", "timeout", "sdio";
+-			/* Bank 0 VDDIO is fixed */
+-			no-1-8-v;
+-			bus-width = <4>;
+-			vmmc-supply = <&rp1_vdd_3v3>;
+-			broken-cd;
+-			status = "disabled";
+-		};
+-
+-		rp1_mmc1: mmc@184000 {
+-			reg = <0xc0 0x40184000  0x0 0x100>;
+-			compatible = "raspberrypi,rp1-dwcmshc";
+-			interrupts = <RP1_INT_SDIO1 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
+-			          &rp1_clocks RP1_CLK_SDIO_TIMER
+-			          &rp1_sdio_clk1>;
+-			clock-names = "bus", "core", "timeout", "sdio";
+-			bus-width = <4>;
+-			vmmc-supply = <&rp1_vdd_3v3>;
+-			/* Nerf SDR speeds */
+-			sdhci-caps-mask = <0x3 0x0>;
+-			broken-cd;
+-			status = "disabled";
+-		};
+-
+-		rp1_dma: dma@188000 {
+-			reg = <0xc0 0x40188000  0x0 0x1000>;
+-			compatible = "snps,axi-dma-1.01a";
+-			interrupts = <RP1_INT_DMA IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>;
+-			clock-names = "core-clk", "cfgr-clk";
+-
+-			#dma-cells = <1>;
+-			dma-channels = <8>;
+-			snps,dma-masters = <1>;
+-			snps,dma-targets = <64>;
+-			snps,data-width = <4>; // (8 << 4) == 128 bits
+-			snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
+-			snps,priority = <0 1 2 3 4 5 6 7>;
+-			snps,axi-max-burst-len = <8>;
+-			status = "disabled";
+-		};
+-
+-		rp1_usb0: usb@200000 {
+-			reg = <0xc0 0x40200000  0x0 0x100000>;
+-			compatible = "snps,dwc3";
+-			dr_mode = "host";
+-			usb3-lpm-capable;
+-			snps,axi-pipe-limit = /bits/ 8 <8>;
+-			snps,dis_rxdet_inp3_quirk;
+-			snps,parkmode-disable-ss-quirk;
+-			snps,parkmode-disable-hs-quirk;
+-			snps,parkmode-disable-fsls-quirk;
+-			snps,tx-max-burst = /bits/ 8 <8>;
+-			snps,tx-thr-num-pkt = /bits/ 8 <2>;
+-			interrupts = <RP1_INT_USBHOST0_0 IRQ_TYPE_EDGE_RISING>;
+-			status = "disabled";
+-		};
+-
+-		rp1_usb1: usb@300000 {
+-			reg = <0xc0 0x40300000  0x0 0x100000>;
+-			compatible = "snps,dwc3";
+-			dr_mode = "host";
+-			usb3-lpm-capable;
+-			snps,axi-pipe-limit = /bits/ 8 <8>;
+-			snps,dis_rxdet_inp3_quirk;
+-			snps,parkmode-disable-ss-quirk;
+-			snps,parkmode-disable-hs-quirk;
+-			snps,parkmode-disable-fsls-quirk;
+-			snps,tx-max-burst = /bits/ 8 <8>;
+-			snps,tx-thr-num-pkt = /bits/ 8 <2>;
+-			interrupts = <RP1_INT_USBHOST1_0 IRQ_TYPE_EDGE_RISING>;
+-			status = "disabled";
+-		};
+-
+-		rp1_dsi0: dsi@110000 {
+-			compatible = "raspberrypi,rp1dsi";
+-			status = "disabled";
+-			reg = <0xc0 0x40118000  0x0 0x1000>,  // MIPI0 DSI DMA (ArgonDPI)
+-			      <0xc0 0x4011c000  0x0 0x1000>,  // MIPI0 DSI Host (SNPS)
+-			      <0xc0 0x40120000  0x0 0x1000>;  // MIPI0 CFG
+-
+-			interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
+-				 <&rp1_clocks RP1_CLK_MIPI0_DPI>,
+-				 <&rp1_clocks RP1_CLK_MIPI0_DSI_BYTECLOCK>,
+-				 <&clk_xosc>,                // hardwired to DSI "refclk"
+-				 <&rp1_clocks RP1_PLL_SYS>;  // alternate parent for divide
+-			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
+-
+-			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
+-			assigned-clock-rates = <25000000>;
+-		};
+-
+-		rp1_dsi1: dsi@128000 {
+-			compatible = "raspberrypi,rp1dsi";
+-			status = "disabled";
+-			reg = <0xc0 0x40130000  0x0 0x1000>,  // MIPI1 DSI DMA (ArgonDPI)
+-		              <0xc0 0x40134000  0x0 0x1000>,  // MIPI1 DSI Host (SNPS)
+-		              <0xc0 0x40138000  0x0 0x1000>;  // MIPI1 CFG
+-
+-			interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
+-				 <&rp1_clocks RP1_CLK_MIPI1_DPI>,
+-				 <&rp1_clocks RP1_CLK_MIPI1_DSI_BYTECLOCK>,
+-				 <&clk_xosc>,               // hardwired to DSI "refclk"
+-				 <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide
+-			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
+-
+-			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
+-			assigned-clock-rates = <25000000>;
+-		};
+-
+-		/* VEC and DPI both need to control PLL_VIDEO and cannot work together;   */
+-		/* config.txt should enable one or other using dtparam=vec or an overlay. */
+-		rp1_vec: vec@144000 {
+-			compatible = "raspberrypi,rp1vec";
+-			status = "disabled";
+-			reg = <0xc0 0x40144000  0x0 0x1000>, // VIDEO_OUT_VEC
+-			      <0xc0 0x40140000  0x0 0x1000>; // VIDEO_OUT_CFG
+-
+-			interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&rp1_clocks RP1_CLK_VEC>;
+-
+-			assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>,
+-					  <&rp1_clocks RP1_PLL_VIDEO_SEC>,
+-					  <&rp1_clocks RP1_CLK_VEC>;
+-			assigned-clock-rates = <1188000000>,
+-					       <108000000>,
+-					       <108000000>;
+-			assigned-clock-parents = <0>,
+-						 <&rp1_clocks RP1_PLL_VIDEO_CORE>,
+-						 <&rp1_clocks RP1_PLL_VIDEO_SEC>;
+-		};
+-
+-		rp1_dpi: dpi@148000 {
+-			compatible = "raspberrypi,rp1dpi";
+-			status = "disabled";
+-			reg = <0xc0 0x40148000  0x0 0x1000>, // VIDEO_OUT DPI
+-			      <0xc0 0x40140000  0x0 0x1000>; // VIDEO_OUT_CFG
+-
+-			interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
+-
+-			clocks = <&rp1_clocks RP1_CLK_DPI>,        // DPI pixel clock
+-				 <&rp1_clocks RP1_PLL_VIDEO>,      // PLL primary divider, and
+-				 <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control
+-			clock-names = "dpiclk", "plldiv", "pllcore";
+-
+-			assigned-clocks        = <&rp1_clocks RP1_CLK_DPI>;
+-			assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
+-		};
+-	};
+-};
+-
+-&clocks {
+-	clk_xosc: clk_xosc {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "xosc";
+-		clock-frequency = <50000000>;
+-	};
+-	macb_pclk: macb_pclk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "pclk";
+-		clock-frequency = <200000000>;
+-	};
+-	macb_hclk: macb_hclk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "hclk";
+-		clock-frequency = <200000000>;
+-	};
+-	sdio_src: sdio_src {
+-		// 400 MHz on FPGA. PLL sys VCO on asic
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "src";
+-		clock-frequency = <1000000000>;
+-	};
+-	sdhci_core: sdhci_core {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-output-names = "core";
+-		clock-frequency = <50000000>;
+-	};
+-	/* GPIO derived clock sources. Each GPIO with a GPCLK function
+-	 * can drive its output from the respective GPCLK
+-	 * generator, and provide a clock source to other internal
+-	 * dividers. Add dummy sources here so that they can be overridden
+-	 * with overlays.
+-	 */
+-	clksrc_gp0: clksrc_gp0 {
+-		status = "disabled";
+-		compatible = "fixed-factor-clock";
+-		#clock-cells = <0>;
+-		clock-div = <1>;
+-		clock-mult = <1>;
+-		clocks = <&rp1_clocks RP1_CLK_GP0>;
+-		clock-output-names = "clksrc_gp0";
+-	};
+-	clksrc_gp1: clksrc_gp1 {
+-		status = "disabled";
+-		compatible = "fixed-factor-clock";
+-		#clock-cells = <0>;
+-		clock-div = <1>;
+-		clock-mult = <1>;
+-		clocks = <&rp1_clocks RP1_CLK_GP1>;
+-		clock-output-names = "clksrc_gp1";
+-	};
+-	clksrc_gp2: clksrc_gp2 {
+-		status = "disabled";
+-		compatible = "fixed-factor-clock";
+-		clock-div = <1>;
+-		clock-mult = <1>;
+-		#clock-cells = <0>;
+-		clocks = <&rp1_clocks RP1_CLK_GP2>;
+-		clock-output-names = "clksrc_gp2";
+-	};
+-	clksrc_gp3: clksrc_gp3 {
+-		status = "disabled";
+-		compatible = "fixed-factor-clock";
+-		clock-div = <1>;
+-		clock-mult = <1>;
+-		#clock-cells = <0>;
+-		clocks = <&rp1_clocks RP1_CLK_GP3>;
+-		clock-output-names = "clksrc_gp3";
+-	};
+-	clksrc_gp4: clksrc_gp4 {
+-		status = "disabled";
+-		compatible = "fixed-factor-clock";
+-		#clock-cells = <0>;
+-		clock-div = <1>;
+-		clock-mult = <1>;
+-		clocks = <&rp1_clocks RP1_CLK_GP4>;
+-		clock-output-names = "clksrc_gp4";
+-	};
+-	clksrc_gp5: clksrc_gp5 {
+-		status = "disabled";
+-		compatible = "fixed-factor-clock";
+-		#clock-cells = <0>;
+-		clock-div = <1>;
+-		clock-mult = <1>;
+-		clocks = <&rp1_clocks RP1_CLK_GP5>;
+-		clock-output-names = "clksrc_gp5";
+-	};
+-};
+-
+-/ {
+-	rp1_vdd_3v3: rp1_vdd_3v3 {
+-		compatible = "regulator-fixed";
+-		regulator-name = "vdd-3v3";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-always-on;
+-	};
+-};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
+@@ -0,0 +1,351 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <dt-bindings/power/raspberrypi-power.h>
++
++&soc {
++	firmware: firmware {
++		compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
++		#address-cells = <1>;
++		#size-cells = <1>;
++
++		mboxes = <&mailbox>;
++		dma-ranges;
++
++		firmware_clocks: clocks {
++			compatible = "raspberrypi,firmware-clocks";
++			#clock-cells = <1>;
++		};
++
++		reset: reset {
++			compatible = "raspberrypi,firmware-reset";
++			#reset-cells = <1>;
++		};
++
++		vcio: vcio {
++			compatible = "raspberrypi,vcio";
++		};
++	};
++
++	power: power {
++		compatible = "raspberrypi,bcm2835-power";
++		firmware = <&firmware>;
++		#power-domain-cells = <1>;
++	};
++
++	fb: fb {
++		compatible = "brcm,bcm2708-fb";
++		firmware = <&firmware>;
++		status = "okay";
++	};
++
++	rpi_rtc: rpi_rtc {
++		compatible = "raspberrypi,rpi-rtc";
++		firmware = <&firmware>;
++		status = "okay";
++		trickle-charge-microvolt = <0>;
++	};
++
++	nvmem {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <1>;
++
++		nvmem_otp: nvmem_otp {
++			compatible = "raspberrypi,rpi-otp";
++			firmware = <&firmware>;
++			reg = <0 192>;
++			status = "okay";
++		};
++
++		nvmem_cust: nvmem_cust {
++			compatible = "raspberrypi,rpi-otp";
++			firmware = <&firmware>;
++			reg = <1 8>;
++			status = "okay";
++		};
++
++		nvmem_mac: nvmem_mac {
++			compatible = "raspberrypi,rpi-otp";
++			firmware = <&firmware>;
++			reg = <2 6>;
++			status = "okay";
++		};
++
++		nvmem_priv: nvmem_priv {
++			compatible = "raspberrypi,rpi-otp";
++			firmware = <&firmware>;
++			reg = <3 16>;
++			status = "okay";
++		};
++	};
++
++	/* Define these notional regulators for use by overlays, etc. */
++	vdd_3v3_reg: fixedregulator_3v3 {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-max-microvolt = <3300000>;
++		regulator-min-microvolt = <3300000>;
++		regulator-name = "3v3";
++	};
++
++	vdd_5v0_reg: fixedregulator_5v0 {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-max-microvolt = <5000000>;
++		regulator-min-microvolt = <5000000>;
++		regulator-name = "5v0";
++	};
++};
++
++/ {
++	__overrides__ {
++		arm_freq;
++		axiperf = <&axiperf>,"status";
++
++		nvmem_cust_rw = <&nvmem_cust>,"rw?";
++		nvmem_priv_rw = <&nvmem_priv>,"rw?";
++		nvmem_mac_rw = <&nvmem_mac>,"rw?";
++		strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n";
++
++		cam0_reg = <&cam0_reg>,"status";
++		cam0_reg_gpio = <&cam0_reg>,"gpio:4",
++				<&cam0_reg>,"gpio:0=", <&gpio>;
++		cam1_reg = <&cam1_reg>,"status";
++		cam1_reg_gpio = <&cam1_reg>,"gpio:4",
++				<&cam1_reg>,"gpio:0=", <&gpio>;
++
++	};
++};
++
++pciex1: &pcie1 { };
++pciex4: &pcie2 { };
++
++&dma32 {
++	/* The VPU firmware uses DMA channel 11 for VCHIQ */
++	brcm,dma-channel-mask = <0x03f>;
++};
++
++&dma40 {
++	/* The VPU firmware DMA channel 11 for VCHIQ */
++	brcm,dma-channel-mask = <0x07c0>;
++};
++
++&hdmi0 {
++	dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
++};
++
++&hdmi1 {
++	dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
++};
++
++&spi10 {
++	dmas = <&dma40 6>, <&dma40 7>;
++	dma-names = "tx", "rx";
++};
++
++&usb {
++	power-domains = <&power RPI_POWER_DOMAIN_USB>;
++};
++
++&rmem {
++	/*
++	 * RPi5's co-processor will copy the board's bootloader configuration
++	 * into memory for the OS to consume. It'll also update this node with
++	 * its placement information.
++	 */
++	blconfig: nvram@0 {
++		compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		reg = <0x0 0x0 0x0>;
++		no-map;
++		status = "disabled";
++	};
++	/*
++	 * RPi5 will copy the binary public key blob (if present) from the bootloader
++	 * into memory for use by the OS.
++	 */
++	blpubkey: nvram@1 {
++		compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		reg = <0x0 0x0 0x0>;
++		no-map;
++		status = "disabled";
++	};
++};
++
++&rp1_adc {
++	status = "okay";
++};
++
++/* Add some gpiomem nodes to make the devices accessible to userspace.
++ * /dev/gpiomem<n> should expose the registers for the interface with DT alias
++ * gpio<n>.
++ */
++
++&rp1 {
++	gpiomem@d0000 {
++		/* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */
++		compatible = "raspberrypi,gpiomem";
++		reg = <0xc0 0x400d0000  0x0 0x30000>;
++		chardev-name = "gpiomem0";
++	};
++};
++
++&soc {
++	gpiomem@7d508500 {
++		compatible = "raspberrypi,gpiomem";
++		reg = <0x7d508500 0x40>;
++		chardev-name = "gpiomem1";
++	};
++
++	gpiomem@7d517c00 {
++		compatible = "raspberrypi,gpiomem";
++		reg = <0x7d517c00 0x40>;
++		chardev-name = "gpiomem2";
++	};
++
++	gpiomem@7d504100 {
++		compatible = "raspberrypi,gpiomem";
++		reg = <0x7d504100 0x20>;
++		chardev-name = "gpiomem3";
++	};
++
++	gpiomem@7d510700 {
++		compatible = "raspberrypi,gpiomem";
++		reg = <0x7d510700 0x20>;
++		chardev-name = "gpiomem4";
++	};
++
++	sound: sound {
++		status = "disabled";
++	};
++};
++
++i2c0: &rp1_i2c0 { };
++i2c1: &rp1_i2c1 { };
++i2c2: &rp1_i2c2 { };
++i2c3: &rp1_i2c3 { };
++i2c4: &rp1_i2c4 { };
++i2c5: &rp1_i2c5 { };
++i2c6: &rp1_i2c6 { };
++i2s:  &rp1_i2s0 { };
++i2s_clk_producer: &rp1_i2s0 { };
++i2s_clk_consumer: &rp1_i2s1 { };
++pwm0: &rp1_pwm0 { };
++pwm1: &rp1_pwm1 { };
++pwm: &pwm0 { };
++spi0: &rp1_spi0 { };
++spi1: &rp1_spi1 { };
++spi2: &rp1_spi2 { };
++spi3: &rp1_spi3 { };
++spi4: &rp1_spi4 { };
++spi5: &rp1_spi5 { };
++
++uart0_pins: &rp1_uart0_14_15 {};
++uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {};
++uart0: &rp1_uart0 {
++	pinctrl-0 = <&uart0_pins>;
++};
++
++uart1_pins: &rp1_uart1_0_1 {};
++uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {};
++uart1: &rp1_uart1 { };
++
++uart2_pins: &rp1_uart2_4_5 {};
++uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {};
++uart2: &rp1_uart2 { };
++
++uart3_pins: &rp1_uart3_8_9 {};
++uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {};
++uart3: &rp1_uart3 { };
++
++uart4_pins: &rp1_uart4_12_13 {};
++uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {};
++uart4: &rp1_uart4 { };
++
++i2c0_pins: &rp1_i2c0_0_1 {};
++i2c_vc: &i2c0 {      // This is pins 27,28 on the header (not MIPI)
++	pinctrl-0 = <&i2c0_pins>;
++	pinctrl-names = "default";
++	clock-frequency = <100000>;
++};
++
++i2c1_pins: &rp1_i2c1_2_3 {};
++i2c_arm: &i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins>;
++	clock-frequency = <100000>;
++};
++
++i2c2_pins: &rp1_i2c2_4_5 {};
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins>;
++};
++
++i2c3_pins: &rp1_i2c3_6_7 {};
++&i2c3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c3_pins>;
++};
++
++&i2s_clk_producer {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rp1_i2s0_18_21>;
++};
++
++&i2s_clk_consumer {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rp1_i2s1_18_21>;
++};
++
++spi0_pins: &rp1_spi0_gpio9 {};
++spi0_cs_pins: &rp1_spi0_cs_gpio7 {};
++
++&spi0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++	cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++	spidev0: spidev@0 {
++		compatible = "spidev";
++		reg = <0>;	/* CE0 */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		spi-max-frequency = <125000000>;
++	};
++
++	spidev1: spidev@1 {
++		compatible = "spidev";
++		reg = <1>;	/* CE1 */
++		#address-cells = <1>;
++		#size-cells = <0>;
++		spi-max-frequency = <125000000>;
++	};
++};
++
++spi2_pins: &rp1_spi2_gpio1 {};
++&spi2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi2_pins>;
++};
++
++spi3_pins: &rp1_spi3_gpio5 {};
++&spi3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi3_pins>;
++};
++
++spi4_pins: &rp1_spi4_gpio9 {};
++&spi4 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi4_pins>;
++};
++
++spi5_pins: &rp1_spi5_gpio13 {};
++&spi5 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi5_pins>;
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+@@ -0,0 +1,1302 @@
++// SPDX-License-Identifier: GPL-2.0
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/soc/bcm2835-pm.h>
++#include <dt-bindings/phy/phy.h>
++
++/ {
++	compatible = "brcm,bcm2712", "brcm,bcm2711";
++	model = "BCM2712";
++
++	#address-cells = <2>;
++	#size-cells = <1>;
++
++	interrupt-parent = <&gicv2>;
++
++	rmem: reserved-memory {
++		#address-cells = <2>;
++		#size-cells = <1>;
++		ranges;
++
++		atf@0 {
++			reg = <0x0 0x0 0x80000>;
++			no-map;
++		};
++
++		cma: linux,cma {
++			compatible = "shared-dma-pool";
++			size = <0x4000000>; /* 64MB */
++			reusable;
++			linux,cma-default;
++
++			/*
++			 * arm64 reserves the CMA by default somewhere in
++			 * ZONE_DMA32, that's not good enough for the BCM2711
++			 * as some devices can only address the lower 1G of
++			 * memory (ZONE_DMA).
++			 */
++			alloc-ranges = <0x0 0x00000000 0x40000000>;
++		};
++	};
++
++	thermal-zones {
++		cpu_thermal: cpu-thermal {
++			polling-delay-passive = <2000>;
++			polling-delay = <1000>;
++			coefficients = <(-550) 450000>;
++			thermal-sensors = <&thermal>;
++
++			thermal_trips: trips {
++				cpu_crit: cpu-crit {
++					temperature	= <110000>;
++					hysteresis	= <0>;
++					type		= "critical";
++				};
++			};
++
++			cooling_maps: cooling-maps {
++			};
++		};
++	};
++
++	clk_27MHz: clk-27M {
++		#clock-cells = <0>;
++		compatible = "fixed-clock";
++		clock-frequency = <27000000>;
++		clock-output-names = "27MHz-clock";
++	};
++
++	clk_108MHz: clk-108M {
++		#clock-cells = <0>;
++		compatible = "fixed-clock";
++		clock-frequency = <108000000>;
++		clock-output-names = "108MHz-clock";
++	};
++
++	hvs: hvs@107c580000 {
++		compatible = "brcm,bcm2712-hvs";
++		reg = <0x10 0x7c580000 0x1a000>;
++		interrupt-parent = <&disp_intr>;
++		interrupts = <2>, <9>, <16>;
++		interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
++		//iommus = <&iommu4>;
++		status = "disabled";
++	};
++
++	soc: soc {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <1>;
++
++		ranges     = <0x7c000000  0x10 0x7c000000  0x04000000>;
++		/* Emulate a contiguous 30-bit address range for DMA */
++		dma-ranges = <0xc0000000  0x00 0x00000000  0x40000000>,
++			     <0x7c000000  0x10 0x7c000000  0x04000000>;
++
++		system_timer: timer@7c003000 {
++			compatible = "brcm,bcm2835-system-timer";
++			reg = <0x7c003000 0x1000>;
++			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
++		     		     <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
++		     		     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
++			clock-frequency = <1000000>;
++		};
++
++		firmwarekms: firmwarekms@7d503000 {
++			compatible = "raspberrypi,rpi-firmware-kms-2712";
++			/* SUN_L2 interrupt reg */
++			reg = <0x7d503000 0x18>;
++			interrupt-parent = <&cpu_l2_irq>;
++			interrupts = <19>;
++			brcm,firmware = <&firmware>;
++			status = "disabled";
++		};
++
++		axiperf: axiperf {
++			compatible = "brcm,bcm2712-axiperf";
++			reg = <0x7c012800 0x100>,
++				<0x7e000000 0x100>;
++			firmware = <&firmware>;
++			status = "disabled";
++		};
++
++		mailbox: mailbox@7c013880 {
++			compatible = "brcm,bcm2835-mbox";
++			reg = <0x7c013880 0x40>;
++			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
++			#mbox-cells = <0>;
++		};
++
++		pixelvalve0: pixelvalve@7c410000 {
++			compatible = "brcm,bcm2712-pixelvalve0";
++			reg = <0x7c410000 0x100>;
++			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		pixelvalve1: pixelvalve@7c411000 {
++			compatible = "brcm,bcm2712-pixelvalve1";
++			reg = <0x7c411000 0x100>;
++			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		mop: mop@7c500000 {
++			compatible = "brcm,bcm2712-mop";
++			reg = <0x7c500000 0x28>;
++			interrupt-parent = <&disp_intr>;
++			interrupts = <1>;
++			status = "disabled";
++		};
++
++		moplet: moplet@7c501000 {
++			compatible = "brcm,bcm2712-moplet";
++			reg = <0x7c501000 0x20>;
++			interrupt-parent = <&disp_intr>;
++			interrupts = <0>;
++			status = "disabled";
++		};
++
++		disp_intr: interrupt-controller@7c502000 {
++			compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
++			reg = <0x7c502000 0x30>;
++			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++			status = "disabled";
++		};
++
++		dvp: clock@7c700000 {
++			compatible = "brcm,brcm2711-dvp";
++			reg = <0x7c700000 0x10>;
++			clocks = <&clk_108MHz>;
++			#clock-cells = <1>;
++			#reset-cells = <1>;
++		};
++
++		/*
++		 * This node is the provider for the enable-method for
++		 * bringing up secondary cores.
++		 */
++		local_intc: local_intc@7cd00000 {
++			compatible = "brcm,bcm2836-l1-intc";
++			reg = <0x7cd00000 0x100>;
++		};
++
++		uart0: serial@7d001000 {
++			compatible = "arm,pl011", "arm,primecell";
++			reg = <0x7d001000 0x200>;
++			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_uart>,
++				 <&clk_vpu>;
++			clock-names = "uartclk", "apb_pclk";
++			arm,primecell-periphid = <0x00241011>;
++			status = "disabled";
++		};
++
++		uart2: serial@7d001400 {
++			compatible = "arm,pl011", "arm,primecell";
++			reg = <0x7d001400 0x200>;
++			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_uart>,
++				 <&clk_vpu>;
++			clock-names = "uartclk", "apb_pclk";
++			arm,primecell-periphid = <0x00241011>;
++			status = "disabled";
++		};
++
++		uart5: serial@7d001a00 {
++			compatible = "arm,pl011", "arm,primecell";
++			reg = <0x7d001a00 0x200>;
++			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_uart>,
++				 <&clk_vpu>;
++			clock-names = "uartclk", "apb_pclk";
++			arm,primecell-periphid = <0x00241011>;
++			status = "disabled";
++		};
++
++		sdhost: mmc@7d002000 {
++			compatible = "brcm,bcm2835-sdhost";
++			reg = <0x7d002000 0x100>;
++			//interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			status = "disabled";
++		};
++
++		i2s: i2s@7d003000 {
++			compatible = "brcm,bcm2835-i2s";
++			reg = <0x7d003000 0x24>;
++			//clocks = <&cprman BCM2835_CLOCK_PCM>;
++			status = "disabled";
++		};
++
++		spi0: spi@7d004000 {
++			compatible = "brcm,bcm2835-spi";
++			reg = <0x7d004000 0x200>;
++			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			num-cs = <1>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		spi3: spi@7d004600 {
++			compatible = "brcm,bcm2835-spi";
++			reg = <0x7d004600 0x0200>;
++			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		spi4: spi@7d004800 {
++			compatible = "brcm,bcm2835-spi";
++			reg = <0x7d004800 0x0200>;
++			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		spi5: spi@7d004a00 {
++			compatible = "brcm,bcm2835-spi";
++			reg = <0x7d004a00 0x0200>;
++			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		spi6: spi@7d004c00 {
++			compatible = "brcm,bcm2835-spi";
++			reg = <0x7d004c00 0x0200>;
++			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		i2c0: i2c@7d005000 {
++			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
++			reg = <0x7d005000 0x20>;
++			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		i2c3: i2c@7d005600 {
++			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
++			reg = <0x7d005600 0x20>;
++			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		i2c4: i2c@7d005800 {
++			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
++			reg = <0x7d005800 0x20>;
++			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		i2c5: i2c@7d005a00 {
++			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
++			reg = <0x7d005a00 0x20>;
++			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		i2c6: i2c@7d005c00 {
++			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
++			reg = <0x7d005c00 0x20>;
++			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		i2c8: i2c@7d005e00 {
++			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
++			reg = <0x7d005e00 0x20>;
++			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_vpu>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		pwm0: pwm@7d00c000 {
++			compatible = "brcm,bcm2835-pwm";
++			reg = <0x7d00c000 0x28>;
++			assigned-clock-rates = <50000000>;
++			#pwm-cells = <3>;
++			status = "disabled";
++		};
++
++		pwm1: pwm@7d00c800 {
++			compatible = "brcm,bcm2835-pwm";
++			reg = <0x7d00c800 0x28>;
++			assigned-clock-rates = <50000000>;
++			#pwm-cells = <3>;
++			status = "disabled";
++		};
++
++		pm: watchdog@7d200000 {
++			compatible = "brcm,bcm2712-pm";
++			reg = <0x7d200000 0x308>;
++			reg-names = "pm";
++			#power-domain-cells = <1>;
++			#reset-cells = <1>;
++			//clocks = <&cprman BCM2835_CLOCK_V3D>,
++			//	 <&cprman BCM2835_CLOCK_PERI_IMAGE>,
++			//	 <&cprman BCM2835_CLOCK_H264>,
++			//	 <&cprman BCM2835_CLOCK_ISP>;
++			clock-names = "v3d", "peri_image", "h264", "isp";
++			system-power-controller;
++		};
++
++		cprman: cprman@7d202000 {
++			compatible = "brcm,bcm2711-cprman";
++			reg = <0x7d202000 0x2000>;
++			#clock-cells = <1>;
++
++			/* CPRMAN derives almost everything from the
++			 * platform's oscillator.  However, the DSI
++			 * pixel clocks come from the DSI analog PHY.
++			 */
++			clocks = <&clk_osc>;
++			status = "disabled";
++		};
++
++		random: rng@7d208000 {
++			compatible = "brcm,bcm2711-rng200";
++			reg = <0x7d208000 0x28>;
++			status = "okay";
++		};
++
++		cpu_l2_irq: intc@7d503000 {
++			compatible = "brcm,l2-intc";
++			reg = <0x7d503000 0x18>;
++			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++		};
++
++		pinctrl: pinctrl@7d504100 {
++			compatible = "brcm,bcm2712-pinctrl";
++			reg = <0x7d504100 0x30>;
++
++			uarta_24_pins: uarta_24_pins {
++				pin_rts {
++					function = "uart0";
++					pins = "gpio24";
++					bias-disable;
++				};
++				pin_cts {
++					function = "uart0";
++					pins = "gpio25";
++					bias-pull-up;
++				};
++				pin_txd {
++					function = "uart0";
++					pins = "gpio26";
++					bias-disable;
++				};
++				pin_rxd {
++					function = "uart0";
++					pins = "gpio27";
++					bias-pull-up;
++				};
++			};
++
++			sdio2_30_pins: sdio2_30_pins {
++				pin_clk {
++					function = "sd2";
++					pins = "gpio30";
++					bias-disable;
++				};
++				pin_cmd {
++					function = "sd2";
++					pins = "gpio31";
++					bias-pull-up;
++				};
++				pins_dat {
++					function = "sd2";
++					pins = "gpio32", "gpio33", "gpio34", "gpio35";
++					bias-pull-up;
++				};
++			};
++		};
++
++		ddc0: i2c@7d508200 {
++			compatible = "brcm,brcmstb-i2c";
++			reg = <0x7d508200 0x58>;
++			interrupt-parent = <&bsc_irq>;
++			interrupts = <1>;
++			clock-frequency = <97500>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		ddc1: i2c@7d508280 {
++			compatible = "brcm,brcmstb-i2c";
++			reg = <0x7d508280 0x58>;
++			interrupt-parent = <&bsc_irq>;
++			interrupts = <2>;
++			clock-frequency = <97500>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		bscd: i2c@7d508300 {
++			compatible = "brcm,brcmstb-i2c";
++			reg = <0x7d508300 0x58>;
++			interrupt-parent = <&bsc_irq>;
++			interrupts = <0>;
++			clock-frequency = <200000>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		bsc_irq: intc@7d508380 {
++			compatible = "brcm,bcm7271-l2-intc";
++			reg = <0x7d508380 0x10>;
++			interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++		};
++
++		main_irq: intc@7d508400 {
++			compatible = "brcm,bcm7271-l2-intc";
++			reg = <0x7d508400 0x10>;
++			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++		};
++
++		gio: gpio@7d508500 {
++			compatible = "brcm,brcmstb-gpio";
++			reg = <0x7d508500 0x40>;
++			interrupt-parent = <&main_irq>;
++			interrupts = <0>;
++			gpio-controller;
++			#gpio-cells = <2>;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			brcm,gpio-bank-widths = <32 22>;
++			brcm,gpio-direct;
++		};
++
++		uarta: serial@7d50c000 {
++			compatible = "brcm,bcm7271-uart";
++			reg = <0x7d50c000 0x20>;
++			reg-names = "uart";
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
++			skip-init;
++			status = "disabled";
++		};
++
++		uartb: serial@7d50d000 {
++			compatible = "brcm,bcm7271-uart";
++			reg = <0x7d50d000 0x20>;
++			reg-names = "uart";
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
++			skip-init;
++			status = "disabled";
++		};
++
++		aon_intr: interrupt-controller@7d510600 {
++			compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
++			reg = <0x7d510600 0x30>;
++			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++			status = "disabled";
++		};
++
++		pinctrl_aon: pinctrl@7d510700 {
++			compatible = "brcm,bcm2712-aon-pinctrl";
++			reg = <0x7d510700 0x20>;
++
++			i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins {
++				function = "vc_i2c3";
++				pins = "aon_gpio0", "aon_gpio1";
++				bias-pull-up;
++			};
++
++			bsc_m1_agpio13_pins: bsc_m1_agpio13_pins {
++				function = "bsc_m1";
++				pins = "aon_gpio13", "aon_gpio14";
++				bias-pull-up;
++			};
++
++			bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins {
++				function = "avs_pmu_bsc";
++				pins = "aon_sgpio4", "aon_sgpio5";
++			};
++
++			bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins {
++				function = "bsc_m2";
++				pins = "aon_sgpio4", "aon_sgpio5";
++			};
++
++			pwm_aon_agpio1_pins: pwm_aon_agpio1_pins {
++				function = "aon_pwm";
++				pins = "aon_gpio1", "aon_gpio2";
++			};
++
++			pwm_aon_agpio4_pins: pwm_aon_agpio4_pins {
++				function = "vc_pwm0";
++				pins = "aon_gpio4", "aon_gpio5";
++			};
++
++			pwm_aon_agpio7_pins: pwm_aon_agpio7_pins {
++				function = "aon_pwm";
++				pins = "aon_gpio7", "aon_gpio9";
++			};
++		};
++
++		intc@7d517000 {
++			compatible = "brcm,bcm7271-l2-intc";
++			reg = <0x7d517000 0x10>;
++			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++			status = "disabled";
++		};
++
++		bscc: i2c@7d517a00 {
++			compatible = "brcm,brcmstb-i2c";
++			reg = <0x7d517a00 0x58>;
++			interrupt-parent = <&bsc_aon_irq>;
++			interrupts = <0>;
++			clock-frequency = <200000>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		pwm_aon: pwm@7d517a80 {
++			compatible = "brcm,bcm7038-pwm";
++			reg = <0x7d517a80 0x28>;
++			#pwm-cells = <3>;
++			clocks = <&clk_27MHz>;
++		};
++
++		main_aon_irq: intc@7d517ac0 {
++			compatible = "brcm,bcm7271-l2-intc";
++			reg = <0x7d517ac0 0x10>;
++			interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++		};
++
++		bsc_aon_irq: intc@7d517b00 {
++			compatible = "brcm,bcm7271-l2-intc";
++			reg = <0x7d517b00 0x10>;
++			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-controller;
++			#interrupt-cells = <1>;
++		};
++
++		gio_aon: gpio@7d517c00 {
++			compatible = "brcm,brcmstb-gpio";
++			reg = <0x7d517c00 0x40>;
++			interrupt-parent = <&main_aon_irq>;
++			interrupts = <0>;
++			gpio-controller;
++			#gpio-cells = <2>;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			brcm,gpio-bank-widths = <17 6>;
++			brcm,gpio-direct;
++		};
++
++		avs_monitor: avs-monitor@7d542000 {
++			compatible = "brcm,bcm2711-avs-monitor",
++				     "syscon", "simple-mfd";
++			reg = <0x7d542000 0xf00>;
++			status = "okay";
++
++			thermal: thermal {
++				compatible = "brcm,bcm2711-thermal";
++				#thermal-sensor-cells = <0>;
++			};
++		};
++
++		bsc_pmu: i2c@7d544000 {
++			compatible = "brcm,brcmstb-i2c";
++			reg = <0x7d544000 0x58>;
++			interrupt-parent = <&bsc_aon_irq>;
++			interrupts = <1>;
++			clock-frequency = <200000>;
++			status = "disabled";
++		};
++
++		hdmi0: hdmi@7ef00700 {
++			compatible = "brcm,bcm2712-hdmi0";
++			reg = <0x7c701400 0x300>,
++			      <0x7c701000 0x200>,
++			      <0x7c701d00 0x300>,
++			      <0x7c702000 0x80>,
++			      <0x7c703800 0x200>,
++			      <0x7c704000 0x800>,
++			      <0x7c700100 0x80>,
++			      <0x7d510800 0x100>,
++			      <0x7c720000 0x100>;
++			reg-names = "hdmi",
++				    "dvp",
++				    "phy",
++				    "rm",
++				    "packet",
++				    "metadata",
++				    "csc",
++				    "cec",
++				    "hd";
++			resets = <&dvp 1>;
++			interrupt-parent = <&aon_intr>;
++			interrupts = <1>, <2>, <3>,
++				     <7>, <8>;
++			interrupt-names = "cec-tx", "cec-rx", "cec-low",
++					  "hpd-connected", "hpd-removed";
++			ddc = <&ddc0>;
++			dmas = <&dma32 10>;
++			dma-names = "audio-rx";
++			status = "disabled";
++		};
++
++		hdmi1: hdmi@7ef05700 {
++			compatible = "brcm,bcm2712-hdmi1";
++			reg = <0x7c706400 0x300>,
++			      <0x7c706000 0x200>,
++			      <0x7c706d00 0x300>,
++			      <0x7c707000 0x80>,
++			      <0x7c708800 0x200>,
++			      <0x7c709000 0x800>,
++			      <0x7c700180 0x80>,
++			      <0x7d511000 0x100>,
++			      <0x7c720000 0x100>;
++			reg-names = "hdmi",
++				    "dvp",
++				    "phy",
++				    "rm",
++				    "packet",
++				    "metadata",
++				    "csc",
++				    "cec",
++				    "hd";
++			ddc = <&ddc1>;
++			resets = <&dvp 2>;
++			interrupt-parent = <&aon_intr>;
++			interrupts = <11>, <12>, <13>,
++				     <14>, <15>;
++			interrupt-names = "cec-tx", "cec-rx", "cec-low",
++					  "hpd-connected", "hpd-removed";
++			dmas = <&dma32 17>;
++			dma-names = "audio-rx";
++			status = "disabled";
++		};
++	};
++
++	arm-pmu {
++		compatible = "arm,cortex-a76-pmu";
++		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
++	};
++
++	timer {
++		compatible = "arm,armv8-timer";
++		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
++					  IRQ_TYPE_LEVEL_LOW)>,
++			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
++					  IRQ_TYPE_LEVEL_LOW)>,
++			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
++					  IRQ_TYPE_LEVEL_LOW)>,
++			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
++					  IRQ_TYPE_LEVEL_LOW)>;
++		/* This only applies to the ARMv7 stub */
++		arm,cpu-registers-not-fw-configured;
++	};
++
++	cpus: cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
++
++		/* Source for d/i cache-line-size, cache-sets, cache-size
++		 * https://developer.arm.com/documentation/100798/0401
++		 * /L1-memory-system/About-the-L1-memory-system?lang=en
++		 */
++		cpu0: cpu@0 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a76";
++			reg = <0x000>;
++			enable-method = "psci";
++			d-cache-size = <0x10000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			i-cache-size = <0x10000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			next-level-cache = <&l2_cache_l0>;
++		};
++
++		cpu1: cpu@1 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a76";
++			reg = <0x100>;
++			enable-method = "psci";
++			d-cache-size = <0x10000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			i-cache-size = <0x10000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			next-level-cache = <&l2_cache_l1>;
++		};
++
++		cpu2: cpu@2 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a76";
++			reg = <0x200>;
++			enable-method = "psci";
++			d-cache-size = <0x10000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			i-cache-size = <0x10000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			next-level-cache = <&l2_cache_l2>;
++		};
++
++		cpu3: cpu@3 {
++			device_type = "cpu";
++			compatible = "arm,cortex-a76";
++			reg = <0x300>;
++			enable-method = "psci";
++			d-cache-size = <0x10000>;
++			d-cache-line-size = <64>;
++			d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			i-cache-size = <0x10000>;
++			i-cache-line-size = <64>;
++			i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
++			next-level-cache = <&l2_cache_l3>;
++		};
++
++		/* Source for cache-line-size and cache-sets:
++		 * https://developer.arm.com/documentation/100798/0401
++		 * /L2-memory-system/About-the-L2-memory-system?lang=en
++		 * and for cache-size:
++		 * https://www.raspberrypi.com/documentation/computers
++		 * /processors.html#bcm2712
++		 */
++		l2_cache_l0: l2-cache-l0 {
++			compatible = "cache";
++			cache-size = <0x80000>;
++			cache-line-size = <128>;
++			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
++			cache-level = <2>;
++			cache-unified;
++			next-level-cache = <&l3_cache>;
++		};
++
++		l2_cache_l1: l2-cache-l1 {
++			compatible = "cache";
++			cache-size = <0x80000>;
++			cache-line-size = <128>;
++			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
++			cache-level = <2>;
++			cache-unified;
++			next-level-cache = <&l3_cache>;
++		};
++
++		l2_cache_l2: l2-cache-l2 {
++			compatible = "cache";
++			cache-size = <0x80000>;
++			cache-line-size = <128>;
++			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
++			cache-level = <2>;
++			cache-unified;
++			next-level-cache = <&l3_cache>;
++		};
++
++		l2_cache_l3: l2-cache-l3 {
++			compatible = "cache";
++			cache-size = <0x80000>;
++			cache-line-size = <128>;
++			cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
++			cache-level = <2>;
++			cache-unified;
++			next-level-cache = <&l3_cache>;
++		};
++
++		/* Source for cache-line-size and cache-sets:
++		 * https://developer.arm.com/documentation/100453/0401/L3-cache?lang=en
++		 * Source for cache-size:
++		 * https://www.raspberrypi.com/documentation/computers/processors.html#bcm2712
++		 */
++		l3_cache: l3-cache {
++			compatible = "cache";
++			cache-size = <0x200000>;
++			cache-line-size = <64>;
++			cache-sets = <2048>; // 2MiB(size)/64(line-size)=32768ways/16-way set
++			cache-level = <3>;
++		};
++	};
++
++	psci {
++		method = "smc";
++		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
++		cpu_on = <0xc4000003>;
++		cpu_suspend = <0xc4000001>;
++		cpu_off = <0x84000002>;
++	};
++
++	axi: axi {
++		compatible = "simple-bus";
++		#address-cells = <2>;
++		#size-cells = <2>;
++
++		ranges = <0x00 0x00000000  0x00 0x00000000  0x10 0x00000000>,
++			 <0x10 0x00000000  0x10 0x00000000  0x01 0x00000000>,
++			 <0x14 0x00000000  0x14 0x00000000  0x04 0x00000000>,
++			 <0x18 0x00000000  0x18 0x00000000  0x04 0x00000000>,
++			 <0x1c 0x00000000  0x1c 0x00000000  0x04 0x00000000>;
++
++		dma-ranges = <0x00 0x00000000  0x00 0x00000000  0x10 0x00000000>,
++			     <0x10 0x00000000  0x10 0x00000000  0x01 0x00000000>,
++			     <0x14 0x00000000  0x14 0x00000000  0x04 0x00000000>,
++			     <0x18 0x00000000  0x18 0x00000000  0x04 0x00000000>,
++			     <0x1c 0x00000000  0x1c 0x00000000  0x04 0x00000000>;
++
++		vc4: gpu {
++			compatible = "brcm,bcm2712-vc6";
++		};
++
++		iommu2: iommu@5100 {
++			/* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */
++			compatible = "brcm,bcm2712-iommu";
++			reg = <0x10 0x5100  0x0 0x80>;
++			cache = <&iommuc>;
++			#iommu-cells = <0>;
++		};
++
++		iommu4: iommu@5200 {
++			/* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */
++			compatible = "brcm,bcm2712-iommu";
++			reg = <0x10 0x5200  0x0 0x80>;
++			cache = <&iommuc>;
++			#iommu-cells = <0>;
++			#interconnect-cells = <0>;
++		};
++
++		iommu5: iommu@5280 {
++			/* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */
++			compatible = "brcm,bcm2712-iommu";
++			reg = <0x10 0x5280  0x0 0x80>;
++			cache = <&iommuc>;
++			#iommu-cells = <0>;
++			dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe
++		};
++
++		iommuc: iommuc@5b00 {
++			compatible = "brcm,bcm2712-iommuc";
++			reg = <0x10 0x5b00  0x0 0x80>;
++		};
++
++		dma32: dma@10000 {
++			compatible = "brcm,bcm2712-dma";
++			reg = <0x10 0x00010000 0 0x600>;
++			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "dma0",
++					  "dma1",
++					  "dma2",
++					  "dma3",
++					  "dma4",
++					  "dma5";
++			#dma-cells = <1>;
++			brcm,dma-channel-mask = <0x0035>;
++		};
++
++		dma40: dma@10600 {
++			compatible = "brcm,bcm2712-dma";
++			reg = <0x10 0x00010600 0 0x600>;
++			interrupts =
++				<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
++				<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
++				<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
++				<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
++				<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
++				<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
++			interrupt-names = "dma6",
++					  "dma7",
++					  "dma8",
++					  "dma9",
++					  "dma10",
++					  "dma11";
++			#dma-cells = <1>;
++			brcm,dma-channel-mask = <0x0fc0>;
++		};
++
++		// Single-lane Gen3 PCIe
++		// Outbound window at 0x14_000000-0x17_ffffff
++		pcie0: pcie@100000 {
++			compatible = "brcm,bcm2712-pcie";
++			reg = <0x10 0x00100000  0x0 0x9310>;
++			device_type = "pci";
++			max-link-speed = <2>;
++			#address-cells = <3>;
++			#interrupt-cells = <1>;
++			#size-cells = <2>;
++			/*
++			 * Unused interrupts:
++			 * 208: AER
++			 * 215: NMI
++			 * 216: PME
++			 */
++			interrupt-parent = <&gicv2>;
++			interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "pcie", "msi";
++			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
++			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 2 &gicv2 GIC_SPI 210
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 3 &gicv2 GIC_SPI 211
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 4 &gicv2 GIC_SPI 212
++							IRQ_TYPE_LEVEL_HIGH>;
++			resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>;
++			reset-names = "swinit", "bridge", "rescal";
++			msi-controller;
++			msi-parent = <&pcie0>;
++
++			ranges = <0x02000000 0x00 0x00000000
++				  0x17 0x00000000
++				  0x0 0xfffffffc>,
++				 <0x43000000 0x04 0x00000000
++				  0x14 0x00000000
++				  0x3 0x00000000>;
++
++			dma-ranges = <0x43000000 0x10 0x00000000
++				      0x00 0x00000000
++				      0x10 0x00000000>;
++
++			status = "disabled";
++		};
++
++		// Single-lane Gen3 PCIe
++		// Outbound window at 0x18_000000-0x1b_ffffff
++		pcie1: pcie@110000 {
++			compatible = "brcm,bcm2712-pcie";
++			reg = <0x10 0x00110000  0x0 0x9310>;
++			device_type = "pci";
++			max-link-speed = <2>;
++			#address-cells = <3>;
++			#interrupt-cells = <1>;
++			#size-cells = <2>;
++			/*
++			 * Unused interrupts:
++			 * 218: AER
++			 * 225: NMI
++			 * 226: PME
++			 */
++			interrupt-parent = <&gicv2>;
++			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "pcie", "msi";
++			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
++			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 2 &gicv2 GIC_SPI 220
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 3 &gicv2 GIC_SPI 221
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 4 &gicv2 GIC_SPI 222
++							IRQ_TYPE_LEVEL_HIGH>;
++			resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>;
++			reset-names = "swinit", "bridge", "rescal";
++			msi-controller;
++			msi-parent = <&mip1>;
++
++			ranges = <0x02000000 0x00 0x00000000
++				  0x1b 0x00000000
++				  0x00 0xfffffffc>,
++				 <0x43000000 0x04 0x00000000
++				  0x18 0x00000000
++				  0x03 0x00000000>;
++
++			dma-ranges = <0x03000000 0x10 0x00000000
++				      0x00 0x00000000
++				      0x10 0x00000000>;
++
++			status = "disabled";
++		};
++
++		pcie_rescal: reset-controller@119500 {
++			compatible = "brcm,bcm7216-pcie-sata-rescal";
++			reg = <0x10 0x00119500  0x0 0x10>;
++			#reset-cells = <0>;
++		};
++
++		// Quad-lane Gen3 PCIe
++		// Outbound window at 0x1c_000000-0x1f_ffffff
++		pcie2: pcie@120000 {
++			compatible = "brcm,bcm2712-pcie";
++			reg = <0x10 0x00120000  0x0 0x9310>;
++			device_type = "pci";
++			max-link-speed = <2>;
++			#address-cells = <3>;
++			#interrupt-cells = <1>;
++			#size-cells = <2>;
++			/*
++			 * Unused interrupts:
++			 * 228: AER
++			 * 235: NMI
++			 * 236: PME
++			 */
++			interrupt-parent = <&gicv2>;
++			interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "pcie", "msi";
++			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
++			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 2 &gicv2 GIC_SPI 230
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 3 &gicv2 GIC_SPI 231
++							IRQ_TYPE_LEVEL_HIGH>,
++					<0 0 0 4 &gicv2 GIC_SPI 232
++							IRQ_TYPE_LEVEL_HIGH>;
++			resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>;
++			reset-names = "swinit", "bridge", "rescal";
++			msi-controller;
++			msi-parent = <&mip0>;
++
++			// ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000
++			ranges = <0x02000000 0x00 0x00000000
++				  0x1f 0x00000000
++				  0x0 0xfffffffc>,
++			// 12GB, 64-bit, prefetchable at PCIe 04_00000000
++				 <0x43000000 0x04 0x00000000
++				  0x1c 0x00000000
++				  0x03 0x00000000>;
++
++			// 64GB system RAM space at PCIe 10_00000000
++			dma-ranges = <0x02000000 0x00 0x00000000
++				      0x1f 0x00000000
++				      0x00 0x00400000>,
++				     <0x43000000 0x10 0x00000000
++				      0x00 0x00000000
++				      0x10 0x00000000>;
++
++			status = "disabled";
++		};
++
++		mip0: msi-controller@130000 {
++			compatible = "brcm,bcm2712-mip-intc";
++			reg = <0x10 0x00130000  0x0 0xc0>;
++			msi-controller;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			brcm,msi-base-spi = <128>;
++			brcm,msi-num-spis = <64>;
++			brcm,msi-offset = <0>;
++			brcm,msi-pci-addr = <0xff 0xfffff000>;
++		};
++
++		mip1: msi-controller@131000 {
++			compatible = "brcm,bcm2712-mip-intc";
++			reg = <0x10 0x00131000  0x0 0xc0>;
++			msi-controller;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			brcm,msi-base-spi = <247>;
++			/* Actually 20 total, but the others are
++			 * both sparse and non-consecutive */
++			brcm,msi-num-spis = <8>;
++			brcm,msi-offset = <8>;
++			brcm,msi-pci-addr = <0xff 0xffffe000>;
++		};
++
++		syscon_piarbctl: syscon@400018 {
++			compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
++			reg = <0x10 0x00400018  0x0 0x18>;
++		};
++
++		usb: usb@480000 {
++			compatible = "brcm,bcm2835-usb";
++			reg = <0x10 0x00480000 0x0 0x10000>;
++			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			clocks = <&clk_usb>;
++			clock-names = "otg";
++			phys = <&usbphy>;
++			phy-names = "usb2-phy";
++			status = "disabled";
++		};
++
++		rpivid: codec@800000 {
++			compatible = "raspberrypi,rpivid-vid-decoder";
++			reg = <0x10 0x00800000  0x0 0x10000>, /* HEVC */
++			      <0x10 0x00840000  0x0 0x1000>;  /* INTC */
++			reg-names = "hevc",
++				    "intc";
++
++			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&firmware_clocks 11>;
++			clock-names = "hevc";
++			iommus = <&iommu2>;
++			status = "disabled";
++		};
++
++		sdio1: mmc@fff000 {
++			compatible = "brcm,bcm2712-sdhci";
++			reg = <0x10 0x00fff000  0x0 0x260>,
++			      <0x10 0x00fff400  0x0 0x200>,
++			      <0x10 0x015040b0  0x0 0x4>,  // Bus isolation control
++			      <0x10 0x015200f0  0x0 0x24>; // LCPLL control misc0-8
++			reg-names = "host", "cfg", "busisol", "lcpll";
++			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_emmc2>;
++			sdhci-caps-mask = <0x0000C000 0x0>;
++			sdhci-caps = <0x0 0x0>;
++			mmc-ddr-3_3v;
++		};
++
++		sdio2: mmc@1100000 {
++			compatible = "brcm,bcm2712-sdhci";
++			reg = <0x10 0x01100000  0x0 0x260>,
++			      <0x10 0x01100400  0x0 0x200>;
++			reg-names = "host", "cfg";
++			interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clk_emmc2>;
++			sdhci-caps-mask = <0x0000C000 0x0>;
++			sdhci-caps = <0x0 0x0>;
++			supports-cqe;
++			mmc-ddr-3_3v;
++			status = "disabled";
++		};
++
++		bcm_reset: reset-controller@1504318 {
++			compatible = "brcm,brcmstb-reset";
++			reg = <0x10 0x01504318  0x0 0x30>;
++			#reset-cells = <1>;
++		};
++
++		v3d: v3d@2000000 {
++			compatible = "brcm,2712-v3d";
++			reg = <0x10 0x02000000  0x0 0x4000>,
++			      <0x10 0x02008000  0x0 0x6000>;
++			reg-names = "hub", "core0";
++
++			power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
++			resets = <&pm BCM2835_RESET_V3D>;
++			clocks = <&firmware_clocks 5>;
++			clocks-names = "v3d";
++			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		gicv2: interrupt-controller@7fff9000 {
++			interrupt-controller;
++			#interrupt-cells = <3>;
++			compatible = "arm,gic-400";
++			reg =	<0x10 0x7fff9000  0x0 0x1000>,
++				<0x10 0x7fffa000  0x0 0x2000>,
++				<0x10 0x7fffc000  0x0 0x2000>,
++				<0x10 0x7fffe000  0x0 0x2000>;
++			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
++						 IRQ_TYPE_LEVEL_HIGH)>;
++		};
++
++		pisp_be: pisp_be@880000  {
++			compatible = "raspberrypi,pispbe";
++			reg = <0x10 0x00880000  0x0 0x4000>;
++			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&firmware_clocks 7>;
++			clocks-names = "isp_be";
++			status = "okay";
++			iommus = <&iommu2>;
++		};
++	};
++
++	clocks {
++		/* The oscillator is the root of the clock tree. */
++		clk_osc: clk-osc {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-output-names = "osc";
++			clock-frequency = <54000000>;
++		};
++
++		clk_usb: clk-usb {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-output-names = "otg";
++			clock-frequency = <480000000>;
++		};
++
++		clk_vpu: clk_vpu {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <750000000>;
++			clock-output-names = "vpu-clock";
++		};
++
++		clk_uart: clk_uart {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <9216000>;
++			clock-output-names = "uart-clock";
++		};
++
++		clk_emmc2: clk_emmc2 {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <200000000>;
++			clock-output-names = "emmc2-clock";
++		};
++	};
++
++	usbphy: phy {
++		compatible = "usb-nop-xceiv";
++		#phy-cells = <0>;
++	};
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
+@@ -0,0 +1,1287 @@
++#include <dt-bindings/clock/rp1.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/mfd/rp1.h>
++
++&rp1_target {
++	rp1: rp1 {
++		compatible = "simple-bus";
++		#address-cells = <2>;
++		#size-cells = <2>;
++		#interrupt-cells = <2>;
++		interrupt-controller;
++		interrupt-parent = <&rp1>;
++
++		// ranges and dma-ranges must be provided by the includer
++
++		rp1_clocks: clocks@18000 {
++			compatible = "raspberrypi,rp1-clocks";
++			#clock-cells = <1>;
++			reg = <0xc0 0x40018000 0x0 0x10038>;
++			clocks = <&clk_xosc>;
++
++			assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
++					  <&rp1_clocks RP1_PLL_AUDIO_CORE>,
++					  // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers
++					  <&rp1_clocks RP1_PLL_SYS>,
++					  <&rp1_clocks RP1_PLL_SYS_SEC>,
++					  <&rp1_clocks RP1_PLL_AUDIO>,
++					  <&rp1_clocks RP1_PLL_AUDIO_SEC>,
++					  <&rp1_clocks RP1_CLK_SYS>,
++					  <&rp1_clocks RP1_PLL_SYS_PRI_PH>,
++					  // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0)
++					  <&rp1_clocks RP1_CLK_SLOW_SYS>,
++					  <&rp1_clocks RP1_CLK_SDIO_TIMER>,
++					  <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>,
++					  <&rp1_clocks RP1_CLK_ETH_TSU>;
++
++			assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
++					       <1536000000>, // RP1_PLL_AUDIO_CORE
++					       <200000000>,  // RP1_PLL_SYS
++					       <125000000>,  // RP1_PLL_SYS_SEC
++					       <61440000>,   // RP1_PLL_AUDIO
++					       <192000000>,  // RP1_PLL_AUDIO_SEC
++					       <200000000>,  // RP1_CLK_SYS
++					       <100000000>,  // RP1_PLL_SYS_PRI_PH
++					       // Must match the XOSC frequency
++					       <50000000>, // RP1_CLK_SLOW_SYS
++					       <1000000>, // RP1_CLK_SDIO_TIMER
++					       <200000000>, // RP1_CLK_SDIO_ALT_SRC
++					       <50000000>; // RP1_CLK_ETH_TSU
++		};
++
++		rp1_uart0: serial@30000 {
++			compatible = "arm,pl011-axi";
++			reg = <0xc0 0x40030000  0x0 0x100>;
++			interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
++			clock-names = "uartclk", "apb_pclk";
++			dmas = <&rp1_dma RP1_DMA_UART0_TX>,
++			       <&rp1_dma RP1_DMA_UART0_RX>;
++			dma-names = "tx", "rx";
++			pinctrl-names = "default";
++			arm,primecell-periphid = <0x00541011>;
++			uart-has-rtscts;
++			cts-event-workaround;
++			skip-init;
++			status = "disabled";
++		};
++
++		rp1_uart1: serial@34000 {
++			compatible = "arm,pl011-axi";
++			reg = <0xc0 0x40034000  0x0 0x100>;
++			interrupts = <RP1_INT_UART1 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
++			clock-names = "uartclk", "apb_pclk";
++			// dmas = <&rp1_dma RP1_DMA_UART1_TX>,
++			//        <&rp1_dma RP1_DMA_UART1_RX>;
++			// dma-names = "tx", "rx";
++			pinctrl-names = "default";
++			arm,primecell-periphid = <0x00541011>;
++			uart-has-rtscts;
++			cts-event-workaround;
++			skip-init;
++			status = "disabled";
++		};
++
++		rp1_uart2: serial@38000 {
++			compatible = "arm,pl011-axi";
++			reg = <0xc0 0x40038000  0x0 0x100>;
++			interrupts = <RP1_INT_UART2 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
++			clock-names = "uartclk", "apb_pclk";
++			// dmas = <&rp1_dma RP1_DMA_UART2_TX>,
++			//        <&rp1_dma RP1_DMA_UART2_RX>;
++			// dma-names = "tx", "rx";
++			pinctrl-names = "default";
++			arm,primecell-periphid = <0x00541011>;
++			uart-has-rtscts;
++			cts-event-workaround;
++			skip-init;
++			status = "disabled";
++		};
++
++		rp1_uart3: serial@3c000 {
++			compatible = "arm,pl011-axi";
++			reg = <0xc0 0x4003c000  0x0 0x100>;
++			interrupts = <RP1_INT_UART3 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
++			clock-names = "uartclk", "apb_pclk";
++			// dmas = <&rp1_dma RP1_DMA_UART3_TX>,
++			//        <&rp1_dma RP1_DMA_UART3_RX>;
++			// dma-names = "tx", "rx";
++			pinctrl-names = "default";
++			arm,primecell-periphid = <0x00541011>;
++			uart-has-rtscts;
++			cts-event-workaround;
++			skip-init;
++			status = "disabled";
++		};
++
++		rp1_uart4: serial@40000 {
++			compatible = "arm,pl011-axi";
++			reg = <0xc0 0x40040000  0x0 0x100>;
++			interrupts = <RP1_INT_UART4 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
++			clock-names = "uartclk", "apb_pclk";
++			// dmas = <&rp1_dma RP1_DMA_UART4_TX>,
++			//        <&rp1_dma RP1_DMA_UART4_RX>;
++			// dma-names = "tx", "rx";
++			pinctrl-names = "default";
++			arm,primecell-periphid = <0x00541011>;
++			uart-has-rtscts;
++			cts-event-workaround;
++			skip-init;
++			status = "disabled";
++		};
++
++		rp1_uart5: serial@44000 {
++			compatible = "arm,pl011-axi";
++			reg = <0xc0 0x40044000  0x0 0x100>;
++			interrupts = <RP1_INT_UART5 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
++			clock-names = "uartclk", "apb_pclk";
++			// dmas = <&rp1_dma RP1_DMA_UART5_TX>,
++			//        <&rp1_dma RP1_DMA_UART5_RX>;
++			// dma-names = "tx", "rx";
++			pinctrl-names = "default";
++			arm,primecell-periphid = <0x00541011>;
++			uart-has-rtscts;
++			cts-event-workaround;
++			skip-init;
++			status = "disabled";
++		};
++
++		rp1_spi8: spi@4c000 {
++			reg = <0xc0 0x4004c000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI8 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI8_TX>,
++			       <&rp1_dma RP1_DMA_SPI8_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_spi0: spi@50000 {
++			reg = <0xc0 0x40050000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI0 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI0_TX>,
++			       <&rp1_dma RP1_DMA_SPI0_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_spi1: spi@54000 {
++			reg = <0xc0 0x40054000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI1 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI1_TX>,
++			       <&rp1_dma RP1_DMA_SPI1_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_spi2: spi@58000 {
++			reg = <0xc0 0x40058000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI2 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI2_TX>,
++			       <&rp1_dma RP1_DMA_SPI2_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_spi3: spi@5c000 {
++			reg = <0xc0 0x4005c000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI3 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI3_TX>,
++			       <&rp1_dma RP1_DMA_SPI3_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		// SPI4 is a target/slave interface
++		rp1_spi4: spi@60000 {
++			reg = <0xc0 0x40060000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI4 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <0>;
++			#size-cells = <0>;
++			num-cs = <1>;
++			spi-slave;
++			dmas = <&rp1_dma RP1_DMA_SPI4_TX>,
++			       <&rp1_dma RP1_DMA_SPI4_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++
++			slave {
++				compatible = "spidev";
++				spi-max-frequency = <1000000>;
++			};
++		};
++
++		rp1_spi5: spi@64000 {
++			reg = <0xc0 0x40064000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI5 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI5_TX>,
++			       <&rp1_dma RP1_DMA_SPI5_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_spi6: spi@68000 {
++			reg = <0xc0 0x40068000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI6 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			num-cs = <2>;
++			dmas = <&rp1_dma RP1_DMA_SPI6_TX>,
++			       <&rp1_dma RP1_DMA_SPI6_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		// SPI7 is a target/slave interface
++		rp1_spi7: spi@6c000 {
++			reg = <0xc0 0x4006c000  0x0 0x130>;
++			compatible = "snps,dw-apb-ssi";
++			interrupts = <RP1_INT_SPI7 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			clock-names = "ssi_clk";
++			#address-cells = <0>;
++			#size-cells = <0>;
++			num-cs = <1>;
++			spi-slave;
++			dmas = <&rp1_dma RP1_DMA_SPI7_TX>,
++			       <&rp1_dma RP1_DMA_SPI7_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++
++			slave {
++				compatible = "spidev";
++				spi-max-frequency = <1000000>;
++			};
++		};
++
++		rp1_i2c0: i2c@70000 {
++			reg = <0xc0 0x40070000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C0 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_i2c1: i2c@74000 {
++			reg = <0xc0 0x40074000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C1 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_i2c2: i2c@78000 {
++			reg = <0xc0 0x40078000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C2 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_i2c3: i2c@7c000 {
++			reg = <0xc0 0x4007c000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C3 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_i2c4: i2c@80000 {
++			reg = <0xc0 0x40080000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C4 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_i2c5: i2c@84000 {
++			reg = <0xc0 0x40084000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C5 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_i2c6: i2c@88000 {
++			reg = <0xc0 0x40088000  0x0 0x1000>;
++			compatible = "snps,designware-i2c";
++			interrupts = <RP1_INT_I2C6 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS>;
++			i2c-scl-rising-time-ns = <65>;
++			i2c-scl-falling-time-ns = <100>;
++			status = "disabled";
++		};
++
++		rp1_pwm0: pwm@98000 {
++			compatible = "raspberrypi,rp1-pwm";
++			reg = <0xc0 0x40098000  0x0 0x100>;
++			#pwm-cells = <3>;
++			clocks = <&rp1_clocks RP1_CLK_PWM0>;
++			assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>;
++			assigned-clock-rates = <50000000>;
++			status = "disabled";
++		};
++
++		rp1_pwm1: pwm@9c000 {
++			compatible = "raspberrypi,rp1-pwm";
++			reg = <0xc0 0x4009c000  0x0 0x100>;
++			#pwm-cells = <3>;
++			clocks = <&rp1_clocks RP1_CLK_PWM1>;
++			assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>;
++			assigned-clock-rates = <50000000>;
++			status = "disabled";
++		};
++
++		rp1_i2s0: i2s@a0000 {
++			reg = <0xc0 0x400a0000  0x0 0x1000>;
++			compatible = "snps,designware-i2s";
++			// Providing an interrupt disables DMA
++			// interrupts = <RP1_INT_I2S0 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_I2S>;
++			clock-names = "i2sclk";
++			#sound-dai-cells = <0>;
++			dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_i2s1: i2s@a4000 {
++			reg = <0xc0 0x400a4000  0x0 0x1000>;
++			compatible = "snps,designware-i2s";
++			// Providing an interrupt disables DMA
++			// interrupts = <RP1_INT_I2S1 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_I2S>;
++			clock-names = "i2sclk";
++			#sound-dai-cells = <0>;
++			dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>;
++			dma-names = "tx", "rx";
++			status = "disabled";
++		};
++
++		rp1_i2s2: i2s@a8000 {
++			reg = <0xc0 0x400a8000  0x0 0x1000>;
++			compatible = "snps,designware-i2s";
++			// Providing an interrupt disables DMA
++			// interrupts = <RP1_INT_I2S2 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_I2S>;
++			status = "disabled";
++		};
++
++		rp1_sdio_clk0: sdio_clk0@b0004 {
++			compatible = "raspberrypi,rp1-sdio-clk";
++			reg = <0xc0 0x400b0004 0x0 0x1c>;
++			clocks = <&sdio_src &sdhci_core>;
++			clock-names = "src", "base";
++			#clock-cells = <0>;
++			status = "disabled";
++		};
++
++		rp1_sdio_clk1: sdio_clk1@b4004 {
++			compatible = "raspberrypi,rp1-sdio-clk";
++			reg = <0xc0 0x400b4004 0x0 0x1c>;
++			clocks = <&sdio_src &sdhci_core>;
++			clock-names = "src", "base";
++			#clock-cells = <0>;
++			status = "disabled";
++		};
++
++		rp1_adc: adc@c8000 {
++			compatible = "raspberrypi,rp1-adc";
++			reg = <0xc0 0x400c8000 0x0 0x4000>;
++			clocks = <&rp1_clocks RP1_CLK_ADC>;
++			clock-names = "adcclk";
++			#clock-cells = <0>;
++			vref-supply = <&rp1_vdd_3v3>;
++			status = "disabled";
++		};
++
++		rp1_gpio: gpio@d0000 {
++			reg = <0xc0 0x400d0000  0x0 0xc000>,
++			      <0xc0 0x400e0000  0x0 0xc000>,
++			      <0xc0 0x400f0000  0x0 0xc000>;
++			compatible = "raspberrypi,rp1-gpio";
++			interrupts = <RP1_INT_IO_BANK0 IRQ_TYPE_LEVEL_HIGH>,
++				     <RP1_INT_IO_BANK1 IRQ_TYPE_LEVEL_HIGH>,
++			             <RP1_INT_IO_BANK2 IRQ_TYPE_LEVEL_HIGH>;
++			gpio-controller;
++			#gpio-cells = <2>;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			gpio-ranges = <&rp1_gpio 0 0 54>;
++
++			rp1_uart0_14_15: rp1_uart0_14_15 {
++				pin_txd {
++					function = "uart0";
++					pins = "gpio14";
++					bias-disable;
++				};
++				pin_rxd {
++					function = "uart0";
++					pins = "gpio15";
++					bias-pull-up;
++				};
++			};
++			rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 {
++				pin_cts {
++					function = "uart0";
++					pins = "gpio16";
++					bias-pull-up;
++				};
++				pin_rts {
++					function = "uart0";
++					pins = "gpio17";
++					bias-disable;
++				};
++			};
++			rp1_uart1_0_1: rp1_uart1_0_1 {
++				pin_txd {
++					function = "uart1";
++					pins = "gpio0";
++					bias-disable;
++				};
++				pin_rxd {
++					function = "uart1";
++					pins = "gpio1";
++					bias-pull-up;
++				};
++			};
++			rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 {
++				pin_cts {
++					function = "uart1";
++					pins = "gpio2";
++					bias-pull-up;
++				};
++				pin_rts {
++					function = "uart1";
++					pins = "gpio3";
++					bias-disable;
++				};
++			};
++			rp1_uart2_4_5: rp1_uart2_4_5 {
++				pin_txd {
++					function = "uart2";
++					pins = "gpio4";
++					bias-disable;
++				};
++				pin_rxd {
++					function = "uart2";
++					pins = "gpio5";
++					bias-pull-up;
++				};
++			};
++			rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 {
++				pin_cts {
++					function = "uart2";
++					pins = "gpio6";
++					bias-pull-up;
++				};
++				pin_rts {
++					function = "uart2";
++					pins = "gpio7";
++					bias-disable;
++				};
++			};
++			rp1_uart3_8_9: rp1_uart3_8_9 {
++				pin_txd {
++					function = "uart3";
++					pins = "gpio8";
++					bias-disable;
++				};
++				pin_rxd {
++					function = "uart3";
++					pins = "gpio9";
++					bias-pull-up;
++				};
++			};
++			rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 {
++				pin_cts {
++					function = "uart3";
++					pins = "gpio10";
++					bias-pull-up;
++				};
++				pin_rts {
++					function = "uart3";
++					pins = "gpio11";
++					bias-disable;
++				};
++			};
++			rp1_uart4_12_13: rp1_uart4_12_13 {
++				pin_txd {
++					function = "uart4";
++					pins = "gpio12";
++					bias-disable;
++				};
++				pin_rxd {
++					function = "uart4";
++					pins = "gpio13";
++					bias-pull-up;
++				};
++			};
++			rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 {
++				pin_cts {
++					function = "uart4";
++					pins = "gpio14";
++					bias-pull-up;
++				};
++				pin_rts {
++					function = "uart4";
++					pins = "gpio15";
++					bias-disable;
++				};
++			};
++
++			rp1_sdio0_22_27: rp1_sdio0_22_27 {
++				pin_clk {
++					function = "sd0";
++					pins = "gpio22";
++					bias-disable;
++					drive-strength = <12>;
++					slew-rate = <1>;
++				};
++				pin_cmd {
++					function = "sd0";
++					pins = "gpio23";
++					bias-pull-up;
++					drive-strength = <12>;
++					slew-rate = <1>;
++				};
++				pins_dat {
++					function = "sd0";
++					pins = "gpio24", "gpio25", "gpio26", "gpio27";
++					bias-pull-up;
++					drive-strength = <12>;
++					slew-rate = <1>;
++				};
++			};
++
++			rp1_sdio1_28_33: rp1_sdio1_28_33 {
++				pin_clk {
++					function = "sd1";
++					pins = "gpio28";
++					bias-disable;
++					drive-strength = <12>;
++					slew-rate = <1>;
++				};
++				pin_cmd {
++					function = "sd1";
++					pins = "gpio29";
++					bias-pull-up;
++					drive-strength = <12>;
++					slew-rate = <1>;
++				};
++				pins_dat {
++					function = "sd1";
++					pins = "gpio30", "gpio31", "gpio32", "gpio33";
++					bias-pull-up;
++					drive-strength = <12>;
++					slew-rate = <1>;
++				};
++			};
++
++			rp1_i2s0_18_21: rp1_i2s0_18_21 {
++				function = "i2s0";
++				pins = "gpio18", "gpio19", "gpio20", "gpio21";
++				bias-disable;
++			};
++
++			rp1_i2s1_18_21: rp1_i2s1_18_21 {
++				function = "i2s1";
++				pins = "gpio18", "gpio19", "gpio20", "gpio21";
++				bias-disable;
++			};
++
++			rp1_i2c4_34_35: rp1_i2c4_34_35 {
++				function = "i2c4";
++				pins = "gpio34", "gpio35";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c6_38_39: rp1_i2c6_38_39 {
++				function = "i2c6";
++				pins = "gpio38", "gpio39";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c4_40_41: rp1_i2c4_40_41 {
++				function = "i2c4";
++				pins = "gpio40", "gpio41";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c5_44_45: rp1_i2c5_44_45 {
++				function = "i2c5";
++				pins = "gpio44", "gpio45";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c0_0_1: rp1_i2c0_0_1 {
++				function = "i2c0";
++				pins = "gpio0", "gpio1";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c0_8_9: rp1_i2c0_8_9 {
++				function = "i2c0";
++				pins = "gpio8", "gpio9";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c1_2_3: rp1_i2c1_2_3 {
++				function = "i2c1";
++				pins = "gpio2", "gpio3";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c1_10_11: rp1_i2c1_10_11 {
++				function = "i2c1";
++				pins = "gpio10", "gpio11";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c2_4_5: rp1_i2c2_4_5 {
++				function = "i2c2";
++				pins = "gpio4", "gpio5";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c2_12_13: rp1_i2c2_12_13 {
++				function = "i2c2";
++				pins = "gpio12", "gpio13";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c3_6_7: rp1_i2c3_6_7 {
++				function = "i2c3";
++				pins = "gpio6", "gpio7";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c3_14_15: rp1_i2c3_14_15 {
++				function = "i2c3";
++				pins = "gpio14", "gpio15";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++			rp1_i2c3_22_23: rp1_i2c3_22_23 {
++				function = "i2c3";
++				pins = "gpio22", "gpio23";
++				drive-strength = <12>;
++				bias-pull-up;
++			};
++
++			// DPI mappings with HSYNC,VSYNC but without PIXCLK,DE
++			rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */
++				function = "dpi";
++				pins = "gpio2", "gpio3", "gpio4", "gpio5",
++				       "gpio6", "gpio7", "gpio8", "gpio9",
++				       "gpio10", "gpio11", "gpio12", "gpio13",
++				       "gpio14", "gpio15", "gpio16", "gpio17",
++				       "gpio18", "gpio19";
++				bias-disable;
++			};
++			rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */
++				function = "dpi";
++				pins = "gpio2", "gpio3", "gpio4", "gpio5",
++				       "gpio6", "gpio7", "gpio8",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17",
++				       "gpio20", "gpio21", "gpio22", "gpio23",
++				       "gpio24";
++				bias-disable;
++			};
++			rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */
++				function = "dpi";
++				pins = "gpio2", "gpio3",
++				       "gpio5", "gpio6", "gpio7", "gpio8",
++				       "gpio9",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17",
++				       "gpio21", "gpio22", "gpio23", "gpio24",
++				       "gpio25";
++				bias-disable;
++			};
++			rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */
++				function = "dpi";
++				pins = "gpio2", "gpio3", "gpio4", "gpio5",
++				       "gpio6", "gpio7", "gpio8", "gpio9",
++				       "gpio10", "gpio11", "gpio12", "gpio13",
++				       "gpio14", "gpio15", "gpio16", "gpio17",
++				       "gpio18", "gpio19", "gpio20", "gpio21";
++				bias-disable;
++			};
++			rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */
++				function = "dpi";
++				pins = "gpio2", "gpio3", "gpio4", "gpio5",
++				       "gpio6", "gpio7", "gpio8", "gpio9",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17",
++				       "gpio20", "gpio21", "gpio22", "gpio23",
++				       "gpio24", "gpio25";
++				bias-disable;
++			};
++			rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */
++				function = "dpi";
++				pins = "gpio2", "gpio3", "gpio4", "gpio5",
++				       "gpio6", "gpio7", "gpio8", "gpio9",
++				       "gpio10", "gpio11", "gpio12", "gpio13",
++				       "gpio14", "gpio15", "gpio16", "gpio17",
++				       "gpio18", "gpio19", "gpio20", "gpio21",
++				       "gpio22", "gpio23", "gpio24", "gpio25",
++				       "gpio26", "gpio27";
++				bias-disable;
++			};
++			rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */
++				function = "dpi";
++				pins = "gpio2", "gpio3";
++				bias-disable;
++			};
++
++			// More DPI mappings, including PIXCLK,DE on GPIOs 0,1
++			rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */
++				function = "dpi";
++				pins = "gpio0", "gpio1", "gpio2", "gpio3",
++				       "gpio4", "gpio5", "gpio6", "gpio7",
++				       "gpio8", "gpio9", "gpio10", "gpio11",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17", "gpio18", "gpio19";
++				bias-disable;
++			};
++			rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */
++				function = "dpi";
++				pins = "gpio0", "gpio1", "gpio2", "gpio3",
++				       "gpio4", "gpio5", "gpio6", "gpio7",
++				       "gpio8",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17",
++				       "gpio20", "gpio21", "gpio22", "gpio23",
++				       "gpio24";
++				bias-disable;
++			};
++			rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */
++				function = "dpi";
++				pins = "gpio0", "gpio1", "gpio2", "gpio3",
++				       "gpio5", "gpio6", "gpio7", "gpio8",
++				       "gpio9",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17",
++				       "gpio21", "gpio22", "gpio23", "gpio24",
++				       "gpio25";
++				bias-disable;
++			};
++			rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */
++				function = "dpi";
++				pins = "gpio0", "gpio1", "gpio2", "gpio3",
++				       "gpio4", "gpio5", "gpio6", "gpio7",
++				       "gpio8", "gpio9", "gpio10", "gpio11",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17", "gpio18", "gpio19",
++				       "gpio20", "gpio21";
++				bias-disable;
++			};
++			rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */
++				function = "dpi";
++				pins = "gpio0", "gpio1", "gpio2", "gpio3",
++				       "gpio4", "gpio5", "gpio6", "gpio7",
++				       "gpio8", "gpio9",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17",
++				       "gpio20", "gpio21", "gpio22", "gpio23",
++				       "gpio24", "gpio25";
++				bias-disable;
++			};
++			rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */
++				function = "dpi";
++				pins = "gpio0", "gpio1", "gpio2", "gpio3",
++				       "gpio4", "gpio5", "gpio6", "gpio7",
++				       "gpio8", "gpio9", "gpio10", "gpio11",
++				       "gpio12", "gpio13", "gpio14", "gpio15",
++				       "gpio16", "gpio17", "gpio18", "gpio19",
++				       "gpio20", "gpio21", "gpio22", "gpio23",
++				       "gpio24", "gpio25", "gpio26", "gpio27";
++				bias-disable;
++			};
++
++			rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 {
++				function = "gpclk0";
++				pins = "gpio4";
++				bias-disable;
++			};
++
++			rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 {
++				function = "gpclk0";
++				pins = "gpio20";
++				bias-disable;
++			};
++
++			rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 {
++				function = "gpclk1";
++				pins = "gpio5";
++				bias-disable;
++			};
++
++			rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 {
++				function = "gpclk1";
++				pins = "gpio18";
++				bias-disable;
++			};
++
++			rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 {
++				function = "gpclk1";
++				pins = "gpio21";
++				bias-disable;
++			};
++
++			rp1_pwm1_gpio45: rp1_pwm1_gpio45 {
++				function = "pwm1";
++				pins = "gpio45";
++				bias-pull-down;
++			};
++
++			rp1_spi0_gpio9: rp1_spi0_gpio9 {
++				function = "spi0";
++				pins = "gpio9", "gpio10", "gpio11";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 {
++				function = "spi0";
++				pins = "gpio7", "gpio8";
++				bias-pull-up;
++			};
++
++			rp1_spi1_gpio19: rp1_spi1_gpio19 {
++				function = "spi1";
++				pins = "gpio19", "gpio20", "gpio21";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi2_gpio1: rp1_spi2_gpio1 {
++				function = "spi2";
++				pins = "gpio1", "gpio2", "gpio3";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi3_gpio5: rp1_spi3_gpio5 {
++				function = "spi3";
++				pins = "gpio5", "gpio6", "gpio7";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi4_gpio9: rp1_spi4_gpio9 {
++				function = "spi4";
++				pins = "gpio9", "gpio10", "gpio11";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi5_gpio13: rp1_spi5_gpio13 {
++				function = "spi5";
++				pins = "gpio13", "gpio14", "gpio15";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi8_gpio49: rp1_spi8_gpio49 {
++				function = "spi8";
++				pins = "gpio49", "gpio50", "gpio51";
++				bias-disable;
++				drive-strength = <12>;
++				slew-rate = <1>;
++			};
++
++			rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 {
++				function = "spi0";
++				pins = "gpio52", "gpio53";
++				bias-pull-up;
++			};
++		};
++
++		rp1_eth: ethernet@100000 {
++			reg = <0xc0 0x40100000  0x0 0x4000>;
++			compatible = "cdns,macb";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			interrupts = <RP1_INT_ETH IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>;
++			clock-names = "pclk", "hclk", "tsu_clk";
++			phy-mode = "rgmii-id";
++			cdns,aw2w-max-pipe = /bits/ 8 <8>;
++			cdns,ar2r-max-pipe = /bits/ 8 <8>;
++			cdns,use-aw2b-fill;
++			local-mac-address = [00 00 00 00 00 00];
++			status = "disabled";
++		};
++
++		rp1_csi0: csi@110000 {
++			compatible = "raspberrypi,rp1-cfe";
++			reg = <0xc0 0x40110000  0x0 0x100>, // CSI2 DMA address
++			      <0xc0 0x40114000  0x0 0x100>, // PHY/CSI Host address
++			      <0xc0 0x40120000  0x0 0x100>, // MIPI CFG address
++			      <0xc0 0x40124000  0x0 0x1000>; // PiSP FE address
++
++			// interrupts must match rp1_pisp_fe setup
++			interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
++			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
++			assigned-clock-rates = <25000000>;
++
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		rp1_csi1: csi@128000 {
++			compatible = "raspberrypi,rp1-cfe";
++			reg = <0xc0 0x40128000  0x0 0x100>, // CSI2 DMA address
++			      <0xc0 0x4012c000  0x0 0x100>, // PHY/CSI Host address
++			      <0xc0 0x40138000  0x0 0x100>, // MIPI CFG address
++			      <0xc0 0x4013c000  0x0 0x1000>; // PiSP FE address
++
++			// interrupts must match rp1_pisp_fe setup
++			interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
++			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
++			assigned-clock-rates = <25000000>;
++
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++		};
++
++		rp1_mmc0: mmc@180000 {
++			reg = <0xc0 0x40180000  0x0 0x100>;
++			compatible = "raspberrypi,rp1-dwcmshc";
++			interrupts = <RP1_INT_SDIO0 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
++			          &rp1_clocks RP1_CLK_SDIO_TIMER
++			          &rp1_sdio_clk0>;
++			clock-names = "bus", "core", "timeout", "sdio";
++			/* Bank 0 VDDIO is fixed */
++			no-1-8-v;
++			bus-width = <4>;
++			vmmc-supply = <&rp1_vdd_3v3>;
++			broken-cd;
++			status = "disabled";
++		};
++
++		rp1_mmc1: mmc@184000 {
++			reg = <0xc0 0x40184000  0x0 0x100>;
++			compatible = "raspberrypi,rp1-dwcmshc";
++			interrupts = <RP1_INT_SDIO1 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
++			          &rp1_clocks RP1_CLK_SDIO_TIMER
++			          &rp1_sdio_clk1>;
++			clock-names = "bus", "core", "timeout", "sdio";
++			bus-width = <4>;
++			vmmc-supply = <&rp1_vdd_3v3>;
++			/* Nerf SDR speeds */
++			sdhci-caps-mask = <0x3 0x0>;
++			broken-cd;
++			status = "disabled";
++		};
++
++		rp1_dma: dma@188000 {
++			reg = <0xc0 0x40188000  0x0 0x1000>;
++			compatible = "snps,axi-dma-1.01a";
++			interrupts = <RP1_INT_DMA IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>;
++			clock-names = "core-clk", "cfgr-clk";
++
++			#dma-cells = <1>;
++			dma-channels = <8>;
++			snps,dma-masters = <1>;
++			snps,dma-targets = <64>;
++			snps,data-width = <4>; // (8 << 4) == 128 bits
++			snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
++			snps,priority = <0 1 2 3 4 5 6 7>;
++			snps,axi-max-burst-len = <8>;
++			status = "disabled";
++		};
++
++		rp1_usb0: usb@200000 {
++			reg = <0xc0 0x40200000  0x0 0x100000>;
++			compatible = "snps,dwc3";
++			dr_mode = "host";
++			usb3-lpm-capable;
++			snps,axi-pipe-limit = /bits/ 8 <8>;
++			snps,dis_rxdet_inp3_quirk;
++			snps,parkmode-disable-ss-quirk;
++			snps,parkmode-disable-hs-quirk;
++			snps,parkmode-disable-fsls-quirk;
++			snps,tx-max-burst = /bits/ 8 <8>;
++			snps,tx-thr-num-pkt = /bits/ 8 <2>;
++			interrupts = <RP1_INT_USBHOST0_0 IRQ_TYPE_EDGE_RISING>;
++			status = "disabled";
++		};
++
++		rp1_usb1: usb@300000 {
++			reg = <0xc0 0x40300000  0x0 0x100000>;
++			compatible = "snps,dwc3";
++			dr_mode = "host";
++			usb3-lpm-capable;
++			snps,axi-pipe-limit = /bits/ 8 <8>;
++			snps,dis_rxdet_inp3_quirk;
++			snps,parkmode-disable-ss-quirk;
++			snps,parkmode-disable-hs-quirk;
++			snps,parkmode-disable-fsls-quirk;
++			snps,tx-max-burst = /bits/ 8 <8>;
++			snps,tx-thr-num-pkt = /bits/ 8 <2>;
++			interrupts = <RP1_INT_USBHOST1_0 IRQ_TYPE_EDGE_RISING>;
++			status = "disabled";
++		};
++
++		rp1_dsi0: dsi@110000 {
++			compatible = "raspberrypi,rp1dsi";
++			status = "disabled";
++			reg = <0xc0 0x40118000  0x0 0x1000>,  // MIPI0 DSI DMA (ArgonDPI)
++			      <0xc0 0x4011c000  0x0 0x1000>,  // MIPI0 DSI Host (SNPS)
++			      <0xc0 0x40120000  0x0 0x1000>;  // MIPI0 CFG
++
++			interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
++				 <&rp1_clocks RP1_CLK_MIPI0_DPI>,
++				 <&rp1_clocks RP1_CLK_MIPI0_DSI_BYTECLOCK>,
++				 <&clk_xosc>,                // hardwired to DSI "refclk"
++				 <&rp1_clocks RP1_PLL_SYS>;  // alternate parent for divide
++			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
++
++			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
++			assigned-clock-rates = <25000000>;
++		};
++
++		rp1_dsi1: dsi@128000 {
++			compatible = "raspberrypi,rp1dsi";
++			status = "disabled";
++			reg = <0xc0 0x40130000  0x0 0x1000>,  // MIPI1 DSI DMA (ArgonDPI)
++		              <0xc0 0x40134000  0x0 0x1000>,  // MIPI1 DSI Host (SNPS)
++		              <0xc0 0x40138000  0x0 0x1000>;  // MIPI1 CFG
++
++			interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
++				 <&rp1_clocks RP1_CLK_MIPI1_DPI>,
++				 <&rp1_clocks RP1_CLK_MIPI1_DSI_BYTECLOCK>,
++				 <&clk_xosc>,               // hardwired to DSI "refclk"
++				 <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide
++			clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys";
++
++			assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
++			assigned-clock-rates = <25000000>;
++		};
++
++		/* VEC and DPI both need to control PLL_VIDEO and cannot work together;   */
++		/* config.txt should enable one or other using dtparam=vec or an overlay. */
++		rp1_vec: vec@144000 {
++			compatible = "raspberrypi,rp1vec";
++			status = "disabled";
++			reg = <0xc0 0x40144000  0x0 0x1000>, // VIDEO_OUT_VEC
++			      <0xc0 0x40140000  0x0 0x1000>; // VIDEO_OUT_CFG
++
++			interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&rp1_clocks RP1_CLK_VEC>;
++
++			assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>,
++					  <&rp1_clocks RP1_PLL_VIDEO_SEC>,
++					  <&rp1_clocks RP1_CLK_VEC>;
++			assigned-clock-rates = <1188000000>,
++					       <108000000>,
++					       <108000000>;
++			assigned-clock-parents = <0>,
++						 <&rp1_clocks RP1_PLL_VIDEO_CORE>,
++						 <&rp1_clocks RP1_PLL_VIDEO_SEC>;
++		};
++
++		rp1_dpi: dpi@148000 {
++			compatible = "raspberrypi,rp1dpi";
++			status = "disabled";
++			reg = <0xc0 0x40148000  0x0 0x1000>, // VIDEO_OUT DPI
++			      <0xc0 0x40140000  0x0 0x1000>; // VIDEO_OUT_CFG
++
++			interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
++
++			clocks = <&rp1_clocks RP1_CLK_DPI>,        // DPI pixel clock
++				 <&rp1_clocks RP1_PLL_VIDEO>,      // PLL primary divider, and
++				 <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control
++			clock-names = "dpiclk", "plldiv", "pllcore";
++
++			assigned-clocks        = <&rp1_clocks RP1_CLK_DPI>;
++			assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
++		};
++	};
++};
++
++&clocks {
++	clk_xosc: clk_xosc {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-output-names = "xosc";
++		clock-frequency = <50000000>;
++	};
++	macb_pclk: macb_pclk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-output-names = "pclk";
++		clock-frequency = <200000000>;
++	};
++	macb_hclk: macb_hclk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-output-names = "hclk";
++		clock-frequency = <200000000>;
++	};
++	sdio_src: sdio_src {
++		// 400 MHz on FPGA. PLL sys VCO on asic
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-output-names = "src";
++		clock-frequency = <1000000000>;
++	};
++	sdhci_core: sdhci_core {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-output-names = "core";
++		clock-frequency = <50000000>;
++	};
++	/* GPIO derived clock sources. Each GPIO with a GPCLK function
++	 * can drive its output from the respective GPCLK
++	 * generator, and provide a clock source to other internal
++	 * dividers. Add dummy sources here so that they can be overridden
++	 * with overlays.
++	 */
++	clksrc_gp0: clksrc_gp0 {
++		status = "disabled";
++		compatible = "fixed-factor-clock";
++		#clock-cells = <0>;
++		clock-div = <1>;
++		clock-mult = <1>;
++		clocks = <&rp1_clocks RP1_CLK_GP0>;
++		clock-output-names = "clksrc_gp0";
++	};
++	clksrc_gp1: clksrc_gp1 {
++		status = "disabled";
++		compatible = "fixed-factor-clock";
++		#clock-cells = <0>;
++		clock-div = <1>;
++		clock-mult = <1>;
++		clocks = <&rp1_clocks RP1_CLK_GP1>;
++		clock-output-names = "clksrc_gp1";
++	};
++	clksrc_gp2: clksrc_gp2 {
++		status = "disabled";
++		compatible = "fixed-factor-clock";
++		clock-div = <1>;
++		clock-mult = <1>;
++		#clock-cells = <0>;
++		clocks = <&rp1_clocks RP1_CLK_GP2>;
++		clock-output-names = "clksrc_gp2";
++	};
++	clksrc_gp3: clksrc_gp3 {
++		status = "disabled";
++		compatible = "fixed-factor-clock";
++		clock-div = <1>;
++		clock-mult = <1>;
++		#clock-cells = <0>;
++		clocks = <&rp1_clocks RP1_CLK_GP3>;
++		clock-output-names = "clksrc_gp3";
++	};
++	clksrc_gp4: clksrc_gp4 {
++		status = "disabled";
++		compatible = "fixed-factor-clock";
++		#clock-cells = <0>;
++		clock-div = <1>;
++		clock-mult = <1>;
++		clocks = <&rp1_clocks RP1_CLK_GP4>;
++		clock-output-names = "clksrc_gp4";
++	};
++	clksrc_gp5: clksrc_gp5 {
++		status = "disabled";
++		compatible = "fixed-factor-clock";
++		#clock-cells = <0>;
++		clock-div = <1>;
++		clock-mult = <1>;
++		clocks = <&rp1_clocks RP1_CLK_GP5>;
++		clock-output-names = "clksrc_gp5";
++	};
++};
++
++/ {
++	rp1_vdd_3v3: rp1_vdd_3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "vdd-3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++	};
++};
diff --git a/target/linux/bcm27xx/patches-6.6/950-1181-arm64-dts-Add-cm5l-files.patch b/target/linux/bcm27xx/patches-6.6/950-1181-arm64-dts-Add-cm5l-files.patch
new file mode 100644
index 0000000000..4f0544386a
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1181-arm64-dts-Add-cm5l-files.patch
@@ -0,0 +1,92 @@
+From 4de4f56af7d803fa7dd9ffe42d4719b428d73e6c Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 17 Jul 2024 17:31:58 +0100
+Subject: [PATCH 1181/1215] arm64: dts: Add cm5l files
+
+CM5 Lite DTBs require minor changes compared to the "heavy" variants.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm64/boot/dts/broadcom/Makefile         |  2 ++
+ .../dts/broadcom/bcm2712-rpi-cm5l-cm4io.dts   | 20 ++++++++++++++++
+ .../dts/broadcom/bcm2712-rpi-cm5l-cm5io.dts   | 10 ++++++++
+ .../boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi   | 24 +++++++++++++++++++
+ 4 files changed, 56 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l-cm4io.dts
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l-cm5io.dts
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi
+
+--- a/arch/arm64/boot/dts/broadcom/Makefile
++++ b/arch/arm64/boot/dts/broadcom/Makefile
+@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rp
+ dtb-$(CONFIG_ARCH_BCM2835) += bcm2712d0-rpi-5-b.dtb
+ dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm5io.dtb
+ dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5-cm4io.dtb
++dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5l-cm5io.dtb
++dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-cm5l-cm4io.dtb
+ 
+ subdir-y	+= bcmbca
+ subdir-y	+= northstar2
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l-cm4io.dts
+@@ -0,0 +1,20 @@
++// SPDX-License-Identifier: GPL-2.0
++/dts-v1/;
++
++#include "bcm2712-rpi-cm5l.dtsi"
++
++// The RP1 USB3 interfaces are not usable on CM4IO
++
++&rp1_usb0 {
++	status = "disabled";
++};
++
++&rp1_usb1 {
++	status = "disabled";
++};
++
++/ {
++	__overrides__ {
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++	};
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l-cm5io.dts
+@@ -0,0 +1,10 @@
++// SPDX-License-Identifier: GPL-2.0
++/dts-v1/;
++
++#include "bcm2712-rpi-cm5l.dtsi"
++
++/ {
++	__overrides__ {
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++	};
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi
+@@ -0,0 +1,24 @@
++// SPDX-License-Identifier: GPL-2.0
++/dts-v1/;
++
++#include "bcm2712-rpi-cm5.dtsi"
++
++/ {
++	__overrides__ {
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++	};
++};
++
++&sd_io_1v8_reg {
++	compatible = "regulator-gpio";
++	regulator-max-microvolt = <3300000>;
++	regulator-settling-time-us = <5000>;
++	gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
++	states = <1800000 0x1
++		  3300000 0x0>;
++};
++
++&sdio1 {
++	/delete-property/ mmc-hs400-1_8v;
++	/delete-property/ mmc-hs400-enhanced-strobe;
++};
diff --git a/target/linux/bcm27xx/patches-6.6/950-1182-dts-bcm2712-Dedup-the-aliases-and-overrides.patch b/target/linux/bcm27xx/patches-6.6/950-1182-dts-bcm2712-Dedup-the-aliases-and-overrides.patch
new file mode 100644
index 0000000000..6cffbdd9be
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1182-dts-bcm2712-Dedup-the-aliases-and-overrides.patch
@@ -0,0 +1,408 @@
+From e1c56acf3355cd539447511fdc1b886e5eb5cca3 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Thu, 2 May 2024 16:57:31 +0100
+Subject: [PATCH 1182/1215] dts: bcm2712: Dedup the aliases and overrides
+
+Move the aliases and overrrides shared by Pi 5 and CM5 into
+bcm2712-rpi.dtsi.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ .../boot/dts/broadcom/bcm2712-rpi-5-b.dts     | 115 -----------------
+ .../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi    | 114 -----------------
+ arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi | 117 +++++++++++++++++-
+ 3 files changed, 113 insertions(+), 233 deletions(-)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+@@ -746,122 +746,7 @@ spi10_cs_pins: &spi10_cs_gpio1 {};
+ };
+ 
+ / {
+-	aliases: aliases {
+-		blconfig = &blconfig;
+-		blpubkey = &blpubkey;
+-		bluetooth = &bluetooth;
+-		console = &uart10;
+-		ethernet0 = &rp1_eth;
+-		wifi0 = &wifi;
+-		fb = &fb;
+-		mailbox = &mailbox;
+-		mmc0 = &sdio1;
+-		uart0 = &uart0;
+-		uart1 = &uart1;
+-		uart2 = &uart2;
+-		uart3 = &uart3;
+-		uart4 = &uart4;
+-		uart10 = &uart10;
+-		serial0 = &uart0;
+-		serial1 = &uart1;
+-		serial2 = &uart2;
+-		serial3 = &uart3;
+-		serial4 = &uart4;
+-		serial10 = &uart10;
+-		i2c = &i2c_arm;
+-		i2c0 = &i2c0;
+-		i2c1 = &i2c1;
+-		i2c2 = &i2c2;
+-		i2c3 = &i2c3;
+-		i2c4 = &i2c4;
+-		i2c5 = &i2c5;
+-		i2c6 = &i2c6;
+-		i2c10 = &i2c_rp1boot;
+-		// Bit-bashed i2c_gpios start at 10
+-		spi0 = &spi0;
+-		spi1 = &spi1;
+-		spi2 = &spi2;
+-		spi3 = &spi3;
+-		spi4 = &spi4;
+-		spi5 = &spi5;
+-		spi10 = &spi10;
+-		gpio0 = &gpio;
+-		gpio1 = &gio;
+-		gpio2 = &gio_aon;
+-		gpio3 = &pinctrl;
+-		gpio4 = &pinctrl_aon;
+-		usb0 = &rp1_usb0;
+-		usb1 = &rp1_usb1;
+-		drm-dsi1 = &dsi0;
+-		drm-dsi2 = &dsi1;
+-	};
+-
+ 	__overrides__ {
+-		bdaddr = <&bluetooth>, "local-bd-address[";
+-		button_debounce = <&pwr_key>, "debounce-interval:0";
+-		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
+-		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
+-		i2c0 = <&i2c0>, "status";
+-		i2c1 = <&i2c1>, "status";
+-		i2c = <&i2c1>, "status";
+-		i2c_arm = <&i2c_arm>, "status";
+-		i2c_vc = <&i2c_vc>, "status";
+-		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+-		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
+-		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
+-		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
+-		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
+-		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
+-		krnbt = <&bluetooth>, "status";
+-		nvme = <&pciex1>, "status";
+-		pciex1 = <&pciex1>, "status";
+-		pciex1_gen = <&pciex1> , "max-link-speed:0";
+-		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
+-		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		random = <&random>, "status";
+-		rtc = <&rpi_rtc>, "status";
+-		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
+ 		sd_cqe = <&sdio1>, "supports-cqe?";
+-		spi = <&spi0>, "status";
+-		suspend = <&pwr_key>, "linux,code:0=205";
+-		uart0 = <&uart0>, "status";
+-		wifiaddr = <&wifi>, "local-mac-address[";
+-
+-		act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>;
+-		act_led_activelow = <&led_act>,"gpios:8";
+-		act_led_trigger = <&led_act>, "linux,default-trigger";
+-		pwr_led_gpio = <&led_pwr>,"gpios:4";
+-		pwr_led_activelow = <&led_pwr>, "gpios:8";
+-		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
+-		eth_led0 = <&phy1>,"led-modes:0";
+-		eth_led1 = <&phy1>,"led-modes:4";
+-		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
+-		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
+-		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
+-		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
+-		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
+-		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
+-		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
+-		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
+-		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
+-		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
+-		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
+-		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
+-
+-		fan_temp0 = <&cpu_tepid>,"temperature:0";
+-		fan_temp1 = <&cpu_warm>,"temperature:0";
+-		fan_temp2 = <&cpu_hot>,"temperature:0";
+-		fan_temp3 = <&cpu_vhot>,"temperature:0";
+-		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
+-		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
+-		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
+-		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
+-		fan_temp0_speed = <&fan>, "cooling-levels:4";
+-		fan_temp1_speed = <&fan>, "cooling-levels:8";
+-		fan_temp2_speed = <&fan>, "cooling-levels:12";
+-		fan_temp3_speed = <&fan>, "cooling-levels:16";
+ 	};
+ };
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
+@@ -753,108 +753,7 @@ spi10_cs_pins: &spi10_cs_gpio1 {};
+ };
+ 
+ / {
+-	aliases: aliases {
+-		blconfig = &blconfig;
+-		blpubkey = &blpubkey;
+-		bluetooth = &bluetooth;
+-		console = &uart10;
+-		ethernet0 = &rp1_eth;
+-		wifi0 = &wifi;
+-		fb = &fb;
+-		mailbox = &mailbox;
+-		mmc0 = &sdio1;
+-		uart0 = &uart0;
+-		uart1 = &uart1;
+-		uart2 = &uart2;
+-		uart3 = &uart3;
+-		uart4 = &uart4;
+-		uart10 = &uart10;
+-		serial0 = &uart0;
+-		serial1 = &uart1;
+-		serial2 = &uart2;
+-		serial3 = &uart3;
+-		serial4 = &uart4;
+-		serial10 = &uart10;
+-		i2c = &i2c_arm;
+-		i2c0 = &i2c0;
+-		i2c1 = &i2c1;
+-		i2c2 = &i2c2;
+-		i2c3 = &i2c3;
+-		i2c4 = &i2c4;
+-		i2c5 = &i2c5;
+-		i2c6 = &i2c6;
+-		i2c10 = &i2c_rp1boot;
+-		// Bit-bashed i2c_gpios start at 10
+-		spi0 = &spi0;
+-		spi1 = &spi1;
+-		spi2 = &spi2;
+-		spi3 = &spi3;
+-		spi4 = &spi4;
+-		spi5 = &spi5;
+-		spi10 = &spi10;
+-		gpio0 = &gpio;
+-		gpio1 = &gio;
+-		gpio2 = &gio_aon;
+-		gpio3 = &pinctrl;
+-		gpio4 = &pinctrl_aon;
+-		usb0 = &rp1_usb0;
+-		usb1 = &rp1_usb1;
+-		drm-dsi1 = &dsi0;
+-		drm-dsi2 = &dsi1;
+-	};
+-
+ 	__overrides__ {
+-		bdaddr = <&bluetooth>, "local-bd-address[";
+-		button_debounce = <&pwr_key>, "debounce-interval:0";
+-		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
+-		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
+-		i2c0 = <&i2c0>, "status";
+-		i2c1 = <&i2c1>, "status";
+-		i2c = <&i2c1>, "status";
+-		i2c_arm = <&i2c_arm>, "status";
+-		i2c_vc = <&i2c_vc>, "status";
+-		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+-		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
+-		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
+-		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
+-		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
+-		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
+-		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
+-		krnbt = <&bluetooth>, "status";
+-		nvme = <&pciex1>, "status";
+-		pciex1 = <&pciex1>, "status";
+-		pciex1_gen = <&pciex1> , "max-link-speed:0";
+-		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
+-		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
+-		random = <&random>, "status";
+-		rtc = <&rpi_rtc>, "status";
+-		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
+-		spi = <&spi0>, "status";
+-		suspend = <&pwr_key>, "linux,code:0=205";
+-		uart0 = <&uart0>, "status";
+-		wifiaddr = <&wifi>, "local-mac-address[";
+-
+-		act_led_activelow = <&led_act>, "active-low?";
+-		act_led_trigger = <&led_act>, "linux,default-trigger";
+-		pwr_led_activelow = <&led_pwr>, "gpios:8";
+-		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
+-		eth_led0 = <&phy1>,"led-modes:0";
+-		eth_led1 = <&phy1>,"led-modes:4";
+-		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
+-		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
+-		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
+-		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
+-		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
+-		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
+-		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
+-		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
+-		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
+-		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
+-		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
+-		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
+-
+ 		ant1 =  <&ant1>,"output-high?=on",
+ 			<&ant1>, "output-low?=off",
+ 			<&ant2>, "output-high?=off",
+@@ -867,18 +766,5 @@ spi10_cs_pins: &spi10_cs_gpio1 {};
+ 			<&ant1>, "output-low?=on",
+ 			<&ant2>, "output-high?=off",
+ 			<&ant2>, "output-low?=on";
+-
+-		fan_temp0 = <&cpu_tepid>,"temperature:0";
+-		fan_temp1 = <&cpu_warm>,"temperature:0";
+-		fan_temp2 = <&cpu_hot>,"temperature:0";
+-		fan_temp3 = <&cpu_vhot>,"temperature:0";
+-		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
+-		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
+-		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
+-		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
+-		fan_temp0_speed = <&fan>, "cooling-levels:4";
+-		fan_temp1_speed = <&fan>, "cooling-levels:8";
+-		fan_temp2_speed = <&fan>, "cooling-levels:12";
+-		fan_temp3_speed = <&fan>, "cooling-levels:16";
+ 	};
+ };
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
+@@ -98,14 +98,124 @@
+ };
+ 
+ / {
++	aliases: aliases {
++		blconfig = &blconfig;
++		blpubkey = &blpubkey;
++		bluetooth = &bluetooth;
++		console = &uart10;
++		drm-dsi1 = &dsi0;
++		drm-dsi2 = &dsi1;
++		ethernet0 = &rp1_eth;
++		fb = &fb;
++		gpio0 = &gpio;
++		gpio1 = &gio;
++		gpio2 = &gio_aon;
++		gpio3 = &pinctrl;
++		gpio4 = &pinctrl_aon;
++		i2c = &i2c_arm;
++		i2c0 = &i2c0;
++		i2c1 = &i2c1;
++		i2c10 = &i2c_rp1boot;
++		i2c2 = &i2c2;
++		i2c3 = &i2c3;
++		i2c4 = &i2c4;
++		i2c5 = &i2c5;
++		i2c6 = &i2c6;
++		mailbox = &mailbox;
++		mmc0 = &sdio1;
++		serial0 = &uart0;
++		serial1 = &uart1;
++		serial10 = &uart10;
++		serial2 = &uart2;
++		serial3 = &uart3;
++		serial4 = &uart4;
++		spi0 = &spi0;
++		spi1 = &spi1;
++		spi10 = &spi10;
++		spi2 = &spi2;
++		spi3 = &spi3;
++		spi4 = &spi4;
++		spi5 = &spi5;
++		uart0 = &uart0;
++		uart1 = &uart1;
++		uart10 = &uart10;
++		uart2 = &uart2;
++		uart3 = &uart3;
++		uart4 = &uart4;
++		usb0 = &rp1_usb0;
++		usb1 = &rp1_usb1;
++		wifi0 = &wifi;
++	};
++
+ 	__overrides__ {
+-		arm_freq;
++		act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>;
++		act_led_activelow = <&led_act>, "gpios:8";
++		act_led_trigger = <&led_act>, "linux,default-trigger";
+ 		axiperf = <&axiperf>,"status";
+-
++		bdaddr = <&bluetooth>, "local-bd-address[";
++		button_debounce = <&pwr_key>, "debounce-interval:0";
++		cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
++		drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi;
++		drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0;
++		drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1;
++		drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4;
++		drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi;
++		drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0;
++		drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1;
++		drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4;
++		drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi;
++		drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0;
++		drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1;
++		drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4;
++		eth_led0 = <&phy1>,"led-modes:0";
++		eth_led1 = <&phy1>,"led-modes:4";
++		fan_temp0 = <&cpu_tepid>,"temperature:0";
++		fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0";
++		fan_temp0_speed = <&fan>, "cooling-levels:4";
++		fan_temp1 = <&cpu_warm>,"temperature:0";
++		fan_temp1_hyst = <&cpu_warm>,"hysteresis:0";
++		fan_temp1_speed = <&fan>, "cooling-levels:8";
++		fan_temp2 = <&cpu_hot>,"temperature:0";
++		fan_temp2_hyst = <&cpu_hot>,"hysteresis:0";
++		fan_temp2_speed = <&fan>, "cooling-levels:12";
++		fan_temp3 = <&cpu_vhot>,"temperature:0";
++		fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0";
++		fan_temp3_speed = <&fan>, "cooling-levels:16";
++		i2c = <&i2c1>, "status";
++		i2c_arm = <&i2c_arm>, "status";
++		i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
++		i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
++		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
++		i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
++		i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
++		i2c_vc = <&i2c_vc>, "status";
++		i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
++		i2c0 = <&i2c0>, "status";
++		i2c0_baudrate = <&i2c0>, "clock-frequency:0";
++		i2c1 = <&i2c1>, "status";
++		i2c1_baudrate = <&i2c1>, "clock-frequency:0";
++		krnbt = <&bluetooth>, "status";
++		nvme = <&pciex1>, "status";
+ 		nvmem_cust_rw = <&nvmem_cust>,"rw?";
+-		nvmem_priv_rw = <&nvmem_priv>,"rw?";
+ 		nvmem_mac_rw = <&nvmem_mac>,"rw?";
++		nvmem_priv_rw = <&nvmem_priv>,"rw?";
++		pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
++		pciex1 = <&pciex1>, "status";
++		pciex1_gen = <&pciex1> , "max-link-speed:0";
++		pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
++		pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0";
++		pwr_led_gpio = <&led_pwr>, "gpios:4";
++		pwr_led_activelow = <&led_pwr>, "gpios:8";
++		pwr_led_trigger = <&led_pwr>, "linux,default-trigger";
++		random = <&random>, "status";
++		rtc = <&rpi_rtc>, "status";
++		rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
++		spi = <&spi0>, "status";
+ 		strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n";
++		suspend = <&pwr_key>, "linux,code:0=205";
++		uart0 = <&uart0>, "status";
++		uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
++		wifiaddr = <&wifi>, "local-mac-address[";
+ 
+ 		cam0_reg = <&cam0_reg>,"status";
+ 		cam0_reg_gpio = <&cam0_reg>,"gpio:4",
+@@ -113,7 +223,6 @@
+ 		cam1_reg = <&cam1_reg>,"status";
+ 		cam1_reg_gpio = <&cam1_reg>,"gpio:4",
+ 				<&cam1_reg>,"gpio:0=", <&gpio>;
+-
+ 	};
+ };
+ 
diff --git a/target/linux/bcm27xx/patches-6.6/950-1183-arm64-dts-Give-cm5l-its-own-model-name.patch b/target/linux/bcm27xx/patches-6.6/950-1183-arm64-dts-Give-cm5l-its-own-model-name.patch
new file mode 100644
index 0000000000..72279e130c
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1183-arm64-dts-Give-cm5l-its-own-model-name.patch
@@ -0,0 +1,24 @@
+From ad110e5ff36de6096e1b9d7e0fe125326f45ed7d Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Fri, 19 Jul 2024 13:18:47 +0100
+Subject: [PATCH 1183/1215] arm64: dts: Give cm5l its own model name
+
+The bootloader patches the DT with the correct model string, but it
+is better not to rely on that by setting it from the start.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5l.dtsi
+@@ -4,6 +4,8 @@
+ #include "bcm2712-rpi-cm5.dtsi"
+ 
+ / {
++	model = "Raspberry Pi Compute Module 5 Lite";
++
+ 	__overrides__ {
+ 		i2c_csi_dsi = <&i2c_csi_dsi>, "status";
+ 	};
diff --git a/target/linux/bcm27xx/patches-6.6/950-1185-pinctrl-rp1-jump-through-hoops-to-avoid-PCIe-latency.patch b/target/linux/bcm27xx/patches-6.6/950-1185-pinctrl-rp1-jump-through-hoops-to-avoid-PCIe-latency.patch
new file mode 100644
index 0000000000..fecfb7a200
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1185-pinctrl-rp1-jump-through-hoops-to-avoid-PCIe-latency.patch
@@ -0,0 +1,288 @@
+From d24229dcef58e0162780ceffa02eb5f6a01b9a4d Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Tue, 16 Jul 2024 16:47:08 +0100
+Subject: [PATCH 1185/1215] pinctrl: rp1: jump through hoops to avoid PCIe
+ latency issues
+
+Automatic link power saving plus the ability of a root complex to buffer
+pending posted write transfers (and consider them complete before being
+transmitted on the wire) causes compression of updates to GPIO state.
+
+The large bandwidth of a Gen 2 x4 link means the writes toggle state
+inside RP1 as fast as it can go (~20MHz), which is bad for applications
+wanting bitbash with at least a few microseconds of delay between
+updates.
+
+By tailoring IO access patterns to a special Root Complex register,
+writes to GPIOs can be stalled until the link wakes - meaning all writes
+end up with a reasonably consistent minimum pacing (~200ns).
+
+Additionally, write barriers have no effect other than to arbitrarily
+delay some writes by a small, variable amount - so remove the vast
+majority of these in areas that could be hot-paths.
+
+Although the IO memory is mapped with Device strongly-ordered semantics,
+this doesn't prevent the splitter inside BCM2712 from letting an MMIO
+read request to a GPIO register get ahead of the pacing writes to the
+Root Complex register. So each pin state read must flush writes out to
+the Outer-Shareable domain.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/pinctrl/pinctrl-rp1.c | 120 +++++++++++++++++++++++++++++-----
+ 1 file changed, 105 insertions(+), 15 deletions(-)
+
+--- a/drivers/pinctrl/pinctrl-rp1.c
++++ b/drivers/pinctrl/pinctrl-rp1.c
+@@ -197,6 +197,7 @@ struct rp1_pin_info {
+ 	void __iomem *inte;
+ 	void __iomem *ints;
+ 	void __iomem *pad;
++	void __iomem *dummy;
+ };
+ 
+ enum funcs {
+@@ -276,6 +277,7 @@ struct rp1_pinctrl {
+ 	void __iomem *gpio_base;
+ 	void __iomem *rio_base;
+ 	void __iomem *pads_base;
++	void __iomem *dummy_base;
+ 	int irq[RP1_NUM_BANKS];
+ 	struct rp1_pin_info pins[RP1_NUM_GPIOS];
+ 
+@@ -577,6 +579,42 @@ static bool persist_gpio_outputs = true;
+ module_param(persist_gpio_outputs, bool, 0644);
+ MODULE_PARM_DESC(persist_gpio_outputs, "Enable GPIO_OUT persistence when pin is freed");
+ 
++static bool pace_pin_updates = true;
++module_param(pace_pin_updates, bool, 0644);
++MODULE_PARM_DESC(pace_pin_updates, "Update pin states with guaranteed monotonicity if PCIe ASPM is enabled");
++
++static inline void rp1_pin_writel(u32 val, void __iomem *dummy, void __iomem *reg)
++{
++	unsigned long flags;
++
++	local_irq_save(flags);
++	/*
++	 * Issuing 6 pipelined writes to the RC's Slot Control register will stall the
++	 * peripheral bus inside 2712 if the link is in L1. This acts as a lightweight
++	 * "fence" operation preventing back-to-back writes arriving at RP1 on a wake.
++	 */
++	if (dummy) {
++		writel_relaxed(0, dummy);
++		writel_relaxed(0, dummy);
++		writel_relaxed(0, dummy);
++		writel_relaxed(0, dummy);
++		writel_relaxed(0, dummy);
++		writel_relaxed(0, dummy);
++	}
++	writel_relaxed(val, reg);
++	local_irq_restore(flags);
++}
++
++static inline u32 rp1_pin_readl(const void __iomem *ioaddr)
++{
++	/*
++	 * Prior posted writes may not yet have been emitted by the CPU - do a store-flush
++	 * before reading GPIO state, as this will serialise writes versus the next issued read.
++	 */
++	__dma_wmb();
++	return readl(ioaddr);
++}
++
+ static int rp1_pinconf_set(struct pinctrl_dev *pctldev,
+ 			   unsigned int offset, unsigned long *configs,
+ 			   unsigned int num_configs);
+@@ -603,12 +641,12 @@ static struct rp1_pin_info *rp1_get_pin_
+ 
+ static void rp1_pad_update(struct rp1_pin_info *pin, u32 clr, u32 set)
+ {
+-	u32 padctrl = readl(pin->pad);
++	u32 padctrl = rp1_pin_readl(pin->pad);
+ 
+ 	padctrl &= ~clr;
+ 	padctrl |= set;
+ 
+-	writel(padctrl, pin->pad);
++	rp1_pin_writel(padctrl, pin->dummy, pin->pad);
+ }
+ 
+ static void rp1_input_enable(struct rp1_pin_info *pin, int value)
+@@ -625,7 +663,7 @@ static void rp1_output_enable(struct rp1
+ 
+ static u32 rp1_get_fsel(struct rp1_pin_info *pin)
+ {
+-	u32 ctrl = readl(pin->gpio + RP1_GPIO_CTRL);
++	u32 ctrl = rp1_pin_readl(pin->gpio + RP1_GPIO_CTRL);
+ 	u32 oeover = FLD_GET(ctrl, RP1_GPIO_CTRL_OEOVER);
+ 	u32 fsel = FLD_GET(ctrl, RP1_GPIO_CTRL_FUNCSEL);
+ 
+@@ -637,7 +675,7 @@ static u32 rp1_get_fsel(struct rp1_pin_i
+ 
+ static void rp1_set_fsel(struct rp1_pin_info *pin, u32 fsel)
+ {
+-	u32 ctrl = readl(pin->gpio + RP1_GPIO_CTRL);
++	u32 ctrl = rp1_pin_readl(pin->gpio + RP1_GPIO_CTRL);
+ 
+ 	if (fsel >= RP1_FSEL_COUNT)
+ 		fsel = RP1_FSEL_NONE_HW;
+@@ -652,12 +690,12 @@ static void rp1_set_fsel(struct rp1_pin_
+ 		FLD_SET(ctrl, RP1_GPIO_CTRL_OEOVER, RP1_OEOVER_PERI);
+ 	}
+ 	FLD_SET(ctrl, RP1_GPIO_CTRL_FUNCSEL, fsel);
+-	writel(ctrl, pin->gpio + RP1_GPIO_CTRL);
++	rp1_pin_writel(ctrl, pin->dummy, pin->gpio + RP1_GPIO_CTRL);
+ }
+ 
+ static int rp1_get_dir(struct rp1_pin_info *pin)
+ {
+-	return !(readl(pin->rio + RP1_RIO_OE) & (1 << pin->offset)) ?
++	return !(rp1_pin_readl(pin->rio + RP1_RIO_OE) & (1 << pin->offset)) ?
+ 		RP1_DIR_INPUT : RP1_DIR_OUTPUT;
+ }
+ 
+@@ -665,19 +703,19 @@ static void rp1_set_dir(struct rp1_pin_i
+ {
+ 	int offset = is_input ? RP1_CLR_OFFSET : RP1_SET_OFFSET;
+ 
+-	writel(1 << pin->offset, pin->rio + RP1_RIO_OE + offset);
++	rp1_pin_writel(1 << pin->offset, pin->dummy, pin->rio + RP1_RIO_OE + offset);
+ }
+ 
+ static int rp1_get_value(struct rp1_pin_info *pin)
+ {
+-	return !!(readl(pin->rio + RP1_RIO_IN) & (1 << pin->offset));
++	return !!(rp1_pin_readl(pin->rio + RP1_RIO_IN) & (1 << pin->offset));
+ }
+ 
+ static void rp1_set_value(struct rp1_pin_info *pin, int value)
+ {
+ 	/* Assume the pin is already an output */
+-	writel(1 << pin->offset,
+-	       pin->rio + RP1_RIO_OUT + (value ? RP1_SET_OFFSET : RP1_CLR_OFFSET));
++	rp1_pin_writel(1 << pin->offset, pin->dummy,
++		       pin->rio + RP1_RIO_OUT + (value ? RP1_SET_OFFSET : RP1_CLR_OFFSET));
+ }
+ 
+ static int rp1_gpio_get(struct gpio_chip *chip, unsigned offset)
+@@ -1298,7 +1336,7 @@ static const struct pinmux_ops rp1_pmx_o
+ 
+ static void rp1_pull_config_set(struct rp1_pin_info *pin, unsigned int arg)
+ {
+-	u32 padctrl = readl(pin->pad);
++	u32 padctrl = rp1_pin_readl(pin->pad);
+ 
+ 	FLD_SET(padctrl, RP1_PAD_PULL, arg & 0x3);
+ 
+@@ -1398,7 +1436,7 @@ static int rp1_pinconf_get(struct pinctr
+ 	if (!pin)
+ 		return -EINVAL;
+ 
+-	padctrl = readl(pin->pad);
++	padctrl = rp1_pin_readl(pin->pad);
+ 
+ 	switch (param) {
+ 	case PIN_CONFIG_INPUT_ENABLE:
+@@ -1493,6 +1531,7 @@ static int rp1_pinctrl_probe(struct plat
+ {
+ 	struct device *dev = &pdev->dev;
+ 	struct device_node *np = dev->of_node;
++	struct device_node *rp1_node = NULL;
+ 	struct rp1_pinctrl *pc;
+ 	struct gpio_irq_chip *girq;
+ 	int err, i;
+@@ -1528,6 +1567,40 @@ static int rp1_pinctrl_probe(struct plat
+ 	pc->gpio_chip = rp1_gpio_chip;
+ 	pc->gpio_chip.parent = dev;
+ 
++	/*
++	 * Workaround for the vagaries of PCIe on BCM2712
++	 *
++	 * If the link to RP1 is in L1, then the BRCMSTB RC will buffer many
++	 * outbound writes - and generate write responses for them, despite the
++	 * fact that the link is not yet active. This has the effect of compressing
++	 * multiple writes to GPIOs together, destroying any pacing that an application
++	 * may require in the 1-10us range.
++	 *
++	 * The RC Slot Control configuration register is special. It emits a
++	 * MsgD for every write to it, will stall further writes until the message
++	 * goes out on the wire. This can be (ab)used to force CPU stalls when the
++	 * link is inactive, at the cost of a small amount of downstream bandwidth
++	 * and some 200ns of added latency for each write.
++	 *
++	 * Several back-to-back configuration writes are necessary to "fill the pipe",
++	 * otherwise the outbound MAC can consume a pending MMIO write and reorder
++	 * it with respect to the config writes - undoing the intent.
++	 *
++	 * of_iomap() is used directly here as the address overlaps with the RC driver's
++	 * usage.
++	 */
++	rp1_node = of_find_node_by_name(NULL, "rp1");
++	if (!rp1_node)
++		dev_err(&pdev->dev, "failed to find RP1 DT node\n");
++	else if (pace_pin_updates &&
++		 of_device_is_compatible(rp1_node->parent, "brcm,bcm2712-pcie")) {
++		pc->dummy_base = of_iomap(rp1_node->parent, 0);
++		if (IS_ERR(pc->dummy_base)) {
++			dev_warn(&pdev->dev, "could not map bcm2712 root complex registers\n");
++			pc->dummy_base = NULL;
++		}
++	}
++
+ 	for (i = 0; i < RP1_NUM_BANKS; i++) {
+ 		const struct rp1_iobank_desc *bank = &rp1_iobanks[i];
+ 		int j;
+@@ -1547,14 +1620,17 @@ static int rp1_pinctrl_probe(struct plat
+ 			pin->rio  = pc->rio_base + bank->rio_offset;
+ 			pin->pad  = pc->pads_base + bank->pads_offset +
+ 				    j * sizeof(u32);
++			pin->dummy = pc->dummy_base ? pc->dummy_base + 0xc0 : NULL;
+ 		}
+ 
+ 		raw_spin_lock_init(&pc->irq_lock[i]);
+ 	}
+ 
+ 	pc->pctl_dev = devm_pinctrl_register(dev, &rp1_pinctrl_desc, pc);
+-	if (IS_ERR(pc->pctl_dev))
+-		return PTR_ERR(pc->pctl_dev);
++	if (IS_ERR(pc->pctl_dev)) {
++		err = PTR_ERR(pc->pctl_dev);
++		goto out_iounmap;
++	}
+ 
+ 	girq = &pc->gpio_chip.irq;
+ 	girq->chip = &rp1_gpio_irq_chip;
+@@ -1583,7 +1659,7 @@ static int rp1_pinctrl_probe(struct plat
+ 	err = devm_gpiochip_add_data(dev, &pc->gpio_chip, pc);
+ 	if (err) {
+ 		dev_err(dev, "could not add GPIO chip\n");
+-		return err;
++		goto out_iounmap;
+ 	}
+ 
+ 	pc->gpio_range = rp1_pinctrl_gpio_range;
+@@ -1592,10 +1668,24 @@ static int rp1_pinctrl_probe(struct plat
+ 	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
+ 
+ 	return 0;
++
++out_iounmap:
++	if (pc->dummy_base)
++		iounmap(pc->dummy_base);
++	return err;
++}
++
++static void rp1_pinctrl_remove(struct platform_device *pdev)
++{
++	struct rp1_pinctrl *pc = platform_get_drvdata(pdev);
++
++	if (pc->dummy_base)
++		iounmap(pc->dummy_base);
+ }
+ 
+ static struct platform_driver rp1_pinctrl_driver = {
+ 	.probe = rp1_pinctrl_probe,
++	.remove_new = rp1_pinctrl_remove,
+ 	.driver = {
+ 		.name = MODULE_NAME,
+ 		.of_match_table = rp1_pinctrl_match,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1186-staging-bcm2835-codec-Disable-HEADER_ON_OPEN-for-vid.patch b/target/linux/bcm27xx/patches-6.6/950-1186-staging-bcm2835-codec-Disable-HEADER_ON_OPEN-for-vid.patch
new file mode 100644
index 0000000000..a8fbeaf062
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1186-staging-bcm2835-codec-Disable-HEADER_ON_OPEN-for-vid.patch
@@ -0,0 +1,36 @@
+From 43fa967811484afde0bbbee182ff8f29dc0550c2 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Fri, 5 Jul 2024 15:57:25 +0100
+Subject: [PATCH 1186/1215] staging: bcm2835-codec: Disable HEADER_ON_OPEN for
+ video encode
+
+Video encode can defer generating the header until the first
+frame is presented, which allows it to take the colourspace
+information from the frame rather than just the format.
+
+Enable that for the V4L2 driver now that the firmware populates
+all the parameters.
+
+https://github.com/raspberrypi/firmware/issues/1885
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+---
+ .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c       | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+@@ -2731,6 +2731,13 @@ static int bcm2835_codec_create_componen
+ 					      &params,
+ 					      sizeof(params));
+ 
++	} else if (dev->role == ENCODE) {
++		enable = 0;
++		vchiq_mmal_port_parameter_set(dev->instance,
++					      &ctx->component->control,
++					      MMAL_PARAMETER_VIDEO_ENCODE_HEADER_ON_OPEN,
++					      &enable,
++					      sizeof(enable));
+ 	} else if (dev->role == ENCODE_IMAGE) {
+ 		enable = 0;
+ 		vchiq_mmal_port_parameter_set(dev->instance,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1188-staging-bcm2835-codec-Add-support-for-H264-level-5.0.patch b/target/linux/bcm27xx/patches-6.6/950-1188-staging-bcm2835-codec-Add-support-for-H264-level-5.0.patch
new file mode 100644
index 0000000000..f3c53adf50
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1188-staging-bcm2835-codec-Add-support-for-H264-level-5.0.patch
@@ -0,0 +1,36 @@
+From 31b9871b8895d7931ee88d7cda7861f829b21d63 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Wed, 17 Jul 2024 16:59:08 +0100
+Subject: [PATCH 1188/1215] staging: bcm2835-codec: Add support for H264 level
+ 5.0 and 5.1
+
+We do NOT claim to support decoding in real-time for these levels,
+but can transcode some content, and handle 1920x1200.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+---
+ .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c        | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
+@@ -3273,7 +3273,7 @@ static void dec_add_profile_ctrls(struct
+ 		case V4L2_PIX_FMT_H264:
+ 			ctrl = v4l2_ctrl_new_std_menu(hdl, &bcm2835_codec_ctrl_ops,
+ 						      V4L2_CID_MPEG_VIDEO_H264_LEVEL,
+-						      V4L2_MPEG_VIDEO_H264_LEVEL_4_2,
++						      V4L2_MPEG_VIDEO_H264_LEVEL_5_1,
+ 						      ~(BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
+ 							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
+ 							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
+@@ -3287,7 +3287,9 @@ static void dec_add_profile_ctrls(struct
+ 							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
+ 							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
+ 							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
+-							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2)),
++							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
++							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
++							BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1)),
+ 						       V4L2_MPEG_VIDEO_H264_LEVEL_4_0);
+ 			ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+ 			ctrl = v4l2_ctrl_new_std_menu(hdl, &bcm2835_codec_ctrl_ops,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1189-spi-dw-Save-bandwidth-with-the-TMOD_TO-feature.patch b/target/linux/bcm27xx/patches-6.6/950-1189-spi-dw-Save-bandwidth-with-the-TMOD_TO-feature.patch
new file mode 100644
index 0000000000..66ff22eb7f
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1189-spi-dw-Save-bandwidth-with-the-TMOD_TO-feature.patch
@@ -0,0 +1,66 @@
+From 6014649de765a8a1f95c146ca72214ff0ba4ba89 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Mon, 1 Jul 2024 15:49:14 +0100
+Subject: [PATCH 1189/1215] spi: dw: Save bandwidth with the TMOD_TO feature
+
+TMOD_TO is the transmit-only mode that doesn't put data into the receive
+FIFO. Using TMOD_TO when the user doesn't want the received data saves
+CPU time and memory bandwidth.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/spi/spi-dw-core.c | 27 +++++++++++++++++----------
+ 1 file changed, 17 insertions(+), 10 deletions(-)
+
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -225,12 +225,17 @@ static irqreturn_t dw_spi_transfer_handl
+ 	 * final stage of the transfer. By doing so we'll get the next IRQ
+ 	 * right when the leftover incoming data is received.
+ 	 */
+-	dw_reader(dws);
+-	if (!dws->rx_len) {
+-		dw_spi_mask_intr(dws, 0xff);
++	if (dws->rx_len) {
++		dw_reader(dws);
++		if (!dws->rx_len) {
++			dw_spi_mask_intr(dws, 0xff);
++			spi_finalize_current_transfer(dws->host);
++		} else if (dws->rx_len <= dw_readl(dws, DW_SPI_RXFTLR)) {
++			dw_writel(dws, DW_SPI_RXFTLR, dws->rx_len - 1);
++		}
++	} else if (!dws->tx_len) {
++		dw_spi_mask_intr(dws, DW_SPI_INT_TXEI);
+ 		spi_finalize_current_transfer(dws->host);
+-	} else if (dws->rx_len <= dw_readl(dws, DW_SPI_RXFTLR)) {
+-		dw_writel(dws, DW_SPI_RXFTLR, dws->rx_len - 1);
+ 	}
+ 
+ 	/*
+@@ -239,12 +244,9 @@ static irqreturn_t dw_spi_transfer_handl
+ 	 * have the TXE IRQ flood at the final stage of the transfer.
+ 	 */
+ 	if (irq_status & DW_SPI_INT_TXEI) {
+-		dw_writer(dws);
+-		if (!dws->tx_len) {
++		if (!dws->tx_len)
+ 			dw_spi_mask_intr(dws, DW_SPI_INT_TXEI);
+-			if (!dws->rx_len)
+-				spi_finalize_current_transfer(dws->host);
+-		}
++		dw_writer(dws);
+ 	}
+ 
+ 	return IRQ_HANDLED;
+@@ -437,6 +439,11 @@ static int dw_spi_transfer_one(struct sp
+ 	dws->rx = transfer->rx_buf;
+ 	dws->rx_len = dws->tx_len;
+ 
++	if (!dws->rx) {
++		dws->rx_len = 0;
++		cfg.tmode = DW_SPI_CTRLR0_TMOD_TO;
++	}
++
+ 	/* Ensure the data above is visible for all CPUs */
+ 	smp_mb();
+ 
diff --git a/target/linux/bcm27xx/patches-6.6/950-1190-spi-dw-Save-bandwidth-with-the-TMOD_RO-feature.patch b/target/linux/bcm27xx/patches-6.6/950-1190-spi-dw-Save-bandwidth-with-the-TMOD_RO-feature.patch
new file mode 100644
index 0000000000..7791b99b6d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1190-spi-dw-Save-bandwidth-with-the-TMOD_RO-feature.patch
@@ -0,0 +1,186 @@
+From cd9084ceb606a2f06c3429c2d3beae2d7c3ebd23 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Mon, 1 Jul 2024 16:41:04 +0100
+Subject: [PATCH 1190/1215] spi: dw: Save bandwidth with the TMOD_RO feature
+
+TMOD_RO is the receive-only mode that doesn't require data in the
+transmit FIFO in order to generate clock cycles. Using TMOD_RO when the
+device doesn't care about the data sent to it saves CPU time and memory
+bandwidth.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/spi/spi-dw-core.c | 31 +++++++++++++++++++++-------
+ drivers/spi/spi-dw-dma.c  | 43 +++++++++++++++++++++++++--------------
+ 2 files changed, 52 insertions(+), 22 deletions(-)
+
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -367,18 +367,18 @@ static void dw_spi_irq_setup(struct dw_s
+ 	 * will be adjusted at the final stage of the IRQ-based SPI transfer
+ 	 * execution so not to lose the leftover of the incoming data.
+ 	 */
+-	level = min_t(unsigned int, dws->fifo_len / 2, dws->tx_len);
++	level = min_t(unsigned int, dws->fifo_len / 2, dws->tx_len ? dws->tx_len : dws->rx_len);
+ 	dw_writel(dws, DW_SPI_TXFTLR, level);
+ 	dw_writel(dws, DW_SPI_RXFTLR, level - 1);
+ 
+ 	dws->transfer_handler = dw_spi_transfer_handler;
+ 
+-	imask = 0;
+-	if (dws->tx_len)
+-		imask |= DW_SPI_INT_TXEI | DW_SPI_INT_TXOI;
++	imask = DW_SPI_INT_TXEI | DW_SPI_INT_TXOI;
+ 	if (dws->rx_len)
+ 		imask |= DW_SPI_INT_RXUI | DW_SPI_INT_RXOI | DW_SPI_INT_RXFI;
+ 	dw_spi_umask_intr(dws, imask);
++	if (!dws->tx_len)
++		dw_writel(dws, DW_SPI_DR, 0);
+ }
+ 
+ /*
+@@ -401,13 +401,18 @@ static int dw_spi_poll_transfer(struct d
+ 	delay.unit = SPI_DELAY_UNIT_SCK;
+ 	nbits = dws->n_bytes * BITS_PER_BYTE;
+ 
++	if (!dws->tx_len)
++		dw_writel(dws, DW_SPI_DR, 0);
++
+ 	do {
+-		dw_writer(dws);
++		if (dws->tx_len)
++			dw_writer(dws);
+ 
+ 		delay.value = nbits * (dws->rx_len - dws->tx_len);
+ 		spi_delay_exec(&delay, transfer);
+ 
+-		dw_reader(dws);
++		if (dws->rx_len)
++			dw_reader(dws);
+ 
+ 		ret = dw_spi_check_status(dws, true);
+ 		if (ret)
+@@ -427,6 +432,7 @@ static int dw_spi_transfer_one(struct sp
+ 		.dfs = transfer->bits_per_word,
+ 		.freq = transfer->speed_hz,
+ 	};
++	int buswidth;
+ 	int ret;
+ 
+ 	dws->dma_mapped = 0;
+@@ -444,6 +450,18 @@ static int dw_spi_transfer_one(struct sp
+ 		cfg.tmode = DW_SPI_CTRLR0_TMOD_TO;
+ 	}
+ 
++	if (!dws->rx) {
++		dws->rx_len = 0;
++		cfg.tmode = DW_SPI_CTRLR0_TMOD_TO;
++	}
++	if (!dws->tx) {
++		dws->tx_len = 0;
++		cfg.tmode = DW_SPI_CTRLR0_TMOD_RO;
++		cfg.ndf = dws->rx_len;
++	}
++	buswidth = transfer->rx_buf ? transfer->rx_nbits :
++		  (transfer->tx_buf ? transfer->tx_nbits : 1);
++
+ 	/* Ensure the data above is visible for all CPUs */
+ 	smp_mb();
+ 
+@@ -961,7 +979,6 @@ int dw_spi_add_host(struct device *dev,
+ 			dev_warn(dev, "DMA init failed\n");
+ 		} else {
+ 			host->can_dma = dws->dma_ops->can_dma;
+-			host->flags |= SPI_CONTROLLER_MUST_TX;
+ 		}
+ 	}
+ 
+--- a/drivers/spi/spi-dw-dma.c
++++ b/drivers/spi/spi-dw-dma.c
+@@ -6,6 +6,7 @@
+  */
+ 
+ #include <linux/completion.h>
++#include <linux/delay.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/dmaengine.h>
+ #include <linux/irqreturn.h>
+@@ -470,13 +471,12 @@ static int dw_spi_dma_setup(struct dw_sp
+ 	u16 imr, dma_ctrl;
+ 	int ret;
+ 
+-	if (!xfer->tx_buf)
+-		return -EINVAL;
+-
+ 	/* Setup DMA channels */
+-	ret = dw_spi_dma_config_tx(dws);
+-	if (ret)
+-		return ret;
++	if (xfer->tx_buf) {
++		ret = dw_spi_dma_config_tx(dws);
++		if (ret)
++			return ret;
++	}
+ 
+ 	if (xfer->rx_buf) {
+ 		ret = dw_spi_dma_config_rx(dws);
+@@ -485,13 +485,17 @@ static int dw_spi_dma_setup(struct dw_sp
+ 	}
+ 
+ 	/* Set the DMA handshaking interface */
+-	dma_ctrl = DW_SPI_DMACR_TDMAE;
++	dma_ctrl = 0;
++	if (xfer->tx_buf)
++		dma_ctrl |= DW_SPI_DMACR_TDMAE;
+ 	if (xfer->rx_buf)
+ 		dma_ctrl |= DW_SPI_DMACR_RDMAE;
+ 	dw_writel(dws, DW_SPI_DMACR, dma_ctrl);
+ 
+ 	/* Set the interrupt mask */
+-	imr = DW_SPI_INT_TXOI;
++	imr = 0;
++	if (xfer->tx_buf)
++		imr |= DW_SPI_INT_TXOI;
+ 	if (xfer->rx_buf)
+ 		imr |= DW_SPI_INT_RXUI | DW_SPI_INT_RXOI;
+ 	dw_spi_umask_intr(dws, imr);
+@@ -508,15 +512,16 @@ static int dw_spi_dma_transfer_all(struc
+ {
+ 	int ret;
+ 
+-	/* Submit the DMA Tx transfer */
+-	ret = dw_spi_dma_submit_tx(dws, xfer->tx_sg.sgl, xfer->tx_sg.nents);
+-	if (ret)
+-		goto err_clear_dmac;
++	/* Submit the DMA Tx transfer if required */
++	if (xfer->tx_buf) {
++		ret = dw_spi_dma_submit_tx(dws, xfer->tx_sg.sgl, xfer->tx_sg.nents);
++		if (ret)
++			goto err_clear_dmac;
++	}
+ 
+ 	/* Submit the DMA Rx transfer if required */
+ 	if (xfer->rx_buf) {
+-		ret = dw_spi_dma_submit_rx(dws, xfer->rx_sg.sgl,
+-					   xfer->rx_sg.nents);
++		ret = dw_spi_dma_submit_rx(dws, xfer->rx_sg.sgl, xfer->rx_sg.nents);
+ 		if (ret)
+ 			goto err_clear_dmac;
+ 
+@@ -524,7 +529,15 @@ static int dw_spi_dma_transfer_all(struc
+ 		dma_async_issue_pending(dws->rxchan);
+ 	}
+ 
+-	dma_async_issue_pending(dws->txchan);
++	if (xfer->tx_buf) {
++		dma_async_issue_pending(dws->txchan);
++	} else {
++		/* Pause to allow DMA channel to fetch RX descriptor */
++		usleep_range(5, 10);
++
++		/* Write something to the TX FIFO to start the transfer */
++		dw_writel(dws, DW_SPI_DR, 0);
++	}
+ 
+ 	ret = dw_spi_dma_wait(dws, xfer->len, xfer->effective_speed_hz);
+ 
diff --git a/target/linux/bcm27xx/patches-6.6/950-1191-spi-dw-don-t-immediately-kill-DMA-transfers-if-an-er.patch b/target/linux/bcm27xx/patches-6.6/950-1191-spi-dw-don-t-immediately-kill-DMA-transfers-if-an-er.patch
new file mode 100644
index 0000000000..45400204c4
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1191-spi-dw-don-t-immediately-kill-DMA-transfers-if-an-er.patch
@@ -0,0 +1,41 @@
+From 3af7822df36e36b5a74d877df7654695c0e0d34a Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Mon, 22 Jul 2024 15:27:51 +0100
+Subject: [PATCH 1191/1215] spi: dw: don't immediately kill DMA transfers if an
+ error occurs
+
+Disabling the peripheral resets controller state which has a dangerous
+side-effect of disabling the DMA handshake interface while it is active.
+This can cause DMA channels to hang.
+
+The error recovery pathway will wait for DMA to stop and reset the chip
+anyway, so mask further FIFO interrupts and let the transfer finish
+gracefully.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/spi/spi-dw-core.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -200,7 +200,18 @@ int dw_spi_check_status(struct dw_spi *d
+ 
+ 	/* Generically handle the erroneous situation */
+ 	if (ret) {
+-		dw_spi_reset_chip(dws);
++		/*
++		 * Forcibly halting the controller can cause DMA to hang.
++		 * Defer to dw_spi_handle_err outside of interrupt context
++		 * and mask further interrupts for the current transfer.
++		 */
++		if (dws->dma_mapped) {
++			dw_spi_mask_intr(dws, 0xff);
++			dw_readl(dws, DW_SPI_ICR);
++		} else {
++			dw_spi_reset_chip(dws);
++		}
++
+ 		if (dws->host->cur_msg)
+ 			dws->host->cur_msg->status = ret;
+ 	}
diff --git a/target/linux/bcm27xx/patches-6.6/950-1192-dts-rp1-hobble-DMA-AXI-burst-lengths.patch b/target/linux/bcm27xx/patches-6.6/950-1192-dts-rp1-hobble-DMA-AXI-burst-lengths.patch
new file mode 100644
index 0000000000..9cfdefec7d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1192-dts-rp1-hobble-DMA-AXI-burst-lengths.patch
@@ -0,0 +1,35 @@
+From 4c1a665b465fa0e9d3369a467fc563ec812a47ce Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Fri, 19 Jul 2024 13:07:59 +0100
+Subject: [PATCH 1192/1215] dts: rp1: hobble DMA AXI burst lengths
+
+Channels 1-2 have a statically configured maximum MSIZE of 8, and
+channels 3-8 have MSIZE set to 4. The DMAC "helpfully" silently
+truncates bursts to the hardware supported maximum, so any FIFO read
+operation with an oversized burst threshold will leave a residue of
+threshold minus MSIZE rows.
+
+As channel allocation is dynamic, this means every client needs to use a
+maximum of 4 for burst length.
+
+AXI AWLEN/ARLEN constraints aren't strictly related to MSIZE, except
+that bursts won't be issued that are longer than MSIZE beats. Therefore,
+it's a useful proxy to tell clients of the DMAC the hardware
+limitations.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ arch/arm64/boot/dts/broadcom/rp1.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
++++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
+@@ -1064,7 +1064,7 @@
+ 			snps,data-width = <4>; // (8 << 4) == 128 bits
+ 			snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
+ 			snps,priority = <0 1 2 3 4 5 6 7>;
+-			snps,axi-max-burst-len = <8>;
++			snps,axi-max-burst-len = <4>;
+ 			status = "disabled";
+ 		};
+ 
diff --git a/target/linux/bcm27xx/patches-6.6/950-1193-drivers-dw-axi-dmac-make-more-sensible-choices-about.patch b/target/linux/bcm27xx/patches-6.6/950-1193-drivers-dw-axi-dmac-make-more-sensible-choices-about.patch
new file mode 100644
index 0000000000..d336532f46
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1193-drivers-dw-axi-dmac-make-more-sensible-choices-about.patch
@@ -0,0 +1,124 @@
+From ce56098eb4dc2985f27f30ad7b7f5aed6bcf7fb1 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Fri, 19 Jul 2024 15:55:56 +0100
+Subject: [PATCH 1193/1215] drivers: dw-axi-dmac: make more sensible choices
+ about memory accesses
+
+There's no real need to constrain MEM access widths to 32-bit (or
+narrower), as the DMAC is intelligent enough to size memory accesses
+appropriately. Wider accesses are more efficient.
+
+Similarly, MEM burst lengths don't need to be a function of DEV burst
+lengths - the DMAC packs/unpacks data into/from its internal channel
+FIFOs appropriately. Longer accesses are more efficient.
+
+However, the DMAC doesn't have complete support for unaligned accesses,
+and blocks are always defined in integer multiples of SRC_WIDTH, so odd
+source lengths or buffer alignments will prevent wide accesses being
+used, as before.
+
+There is an implicit requirement to limit requested DEV read burst
+lengths to less than the hardware's maximum configured MSIZE - otherwise
+RX data will be left over at the end of a block. There is no config
+register that reports this value, so the AXI burst length parameter is
+used to produce a facsimile of it. Warn if such a request arrives that
+doesn't respect this.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ .../dma/dw-axi-dmac/dw-axi-dmac-platform.c    | 38 ++++++++++++-------
+ 1 file changed, 25 insertions(+), 13 deletions(-)
+
+--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
++++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+@@ -261,6 +261,15 @@ static u32 axi_chan_get_xfer_width(struc
+ 	return __ffs(src | dst | len | BIT(max_width));
+ }
+ 
++static u32 axi_dma_encode_msize(u32 max_burst)
++{
++	if (max_burst <= 1)
++		return DWAXIDMAC_BURST_TRANS_LEN_1;
++	if (max_burst > 1024)
++		return DWAXIDMAC_BURST_TRANS_LEN_1024;
++	return fls(max_burst) - 2;
++}
++
+ static inline const char *axi_chan_name(struct axi_dma_chan *chan)
+ {
+ 	return dma_chan_name(&chan->vc.chan);
+@@ -685,41 +694,41 @@ static int dw_axi_dma_set_hw_desc(struct
+ 	size_t axi_block_ts;
+ 	size_t block_ts;
+ 	u32 ctllo, ctlhi;
+-	u32 burst_len;
++	u32 burst_len = 0, mem_burst_msize, reg_burst_msize;
+ 
+ 	axi_block_ts = chan->chip->dw->hdata->block_size[chan->id];
+ 
+ 	mem_width = __ffs(data_width | mem_addr | len);
+-	if (mem_width > DWAXIDMAC_TRANS_WIDTH_32)
+-		mem_width = DWAXIDMAC_TRANS_WIDTH_32;
+ 
+ 	if (!IS_ALIGNED(mem_addr, 4)) {
+ 		dev_err(chan->chip->dev, "invalid buffer alignment\n");
+ 		return -EINVAL;
+ 	}
+ 
++	/* Use a reasonable upper limit otherwise residue reporting granularity grows large */
++	mem_burst_msize = axi_dma_encode_msize(16);
++
+ 	switch (chan->direction) {
+ 	case DMA_MEM_TO_DEV:
++		reg_burst_msize = axi_dma_encode_msize(chan->config.dst_maxburst);
+ 		reg_width = __ffs(chan->config.dst_addr_width);
+ 		device_addr = phys_to_dma(chan->chip->dev, chan->config.dst_addr);
+ 		ctllo = reg_width << CH_CTL_L_DST_WIDTH_POS |
+ 			mem_width << CH_CTL_L_SRC_WIDTH_POS |
+-			DWAXIDMAC_BURST_TRANS_LEN_1 << CH_CTL_L_DST_MSIZE_POS |
+-			DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_SRC_MSIZE_POS |
++			reg_burst_msize << CH_CTL_L_DST_MSIZE_POS |
++			mem_burst_msize << CH_CTL_L_SRC_MSIZE_POS |
+ 			DWAXIDMAC_CH_CTL_L_NOINC << CH_CTL_L_DST_INC_POS |
+ 			DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_SRC_INC_POS;
+ 		block_ts = len >> mem_width;
+ 		break;
+ 	case DMA_DEV_TO_MEM:
++		reg_burst_msize = axi_dma_encode_msize(chan->config.src_maxburst);
+ 		reg_width = __ffs(chan->config.src_addr_width);
+-		/* Prevent partial access units getting lost */
+-		if (mem_width > reg_width)
+-			mem_width = reg_width;
+ 		device_addr = phys_to_dma(chan->chip->dev, chan->config.src_addr);
+ 		ctllo = reg_width << CH_CTL_L_SRC_WIDTH_POS |
+ 			mem_width << CH_CTL_L_DST_WIDTH_POS |
+-			DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_DST_MSIZE_POS |
+-			DWAXIDMAC_BURST_TRANS_LEN_1 << CH_CTL_L_SRC_MSIZE_POS |
++			mem_burst_msize << CH_CTL_L_DST_MSIZE_POS |
++			reg_burst_msize << CH_CTL_L_SRC_MSIZE_POS |
+ 			DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_DST_INC_POS |
+ 			DWAXIDMAC_CH_CTL_L_NOINC << CH_CTL_L_SRC_INC_POS;
+ 		block_ts = len >> reg_width;
+@@ -760,6 +769,12 @@ static int dw_axi_dma_set_hw_desc(struct
+ 	set_desc_src_master(hw_desc);
+ 
+ 	hw_desc->len = len;
++
++	if (burst_len && (chan->config.src_maxburst > burst_len))
++		dev_warn_ratelimited(chan2dev(chan),
++				     "%s: requested source burst length %u exceeds supported burst length %u - data may be lost\n",
++				     axi_chan_name(chan), chan->config.src_maxburst, burst_len);
++
+ 	return 0;
+ }
+ 
+@@ -776,9 +791,6 @@ static size_t calculate_block_len(struct
+ 	case DMA_MEM_TO_DEV:
+ 		data_width = BIT(chan->chip->dw->hdata->m_data_width);
+ 		mem_width = __ffs(data_width | dma_addr | buf_len);
+-		if (mem_width > DWAXIDMAC_TRANS_WIDTH_32)
+-			mem_width = DWAXIDMAC_TRANS_WIDTH_32;
+-
+ 		block_len = axi_block_ts << mem_width;
+ 		break;
+ 	case DMA_DEV_TO_MEM:
diff --git a/target/linux/bcm27xx/patches-6.6/950-1195-tty-serial-pl011-restrict-RX-burst-FIFO-threshold.patch b/target/linux/bcm27xx/patches-6.6/950-1195-tty-serial-pl011-restrict-RX-burst-FIFO-threshold.patch
new file mode 100644
index 0000000000..62731aeb34
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1195-tty-serial-pl011-restrict-RX-burst-FIFO-threshold.patch
@@ -0,0 +1,30 @@
+From f3cb675102a2a5a330038c4e748f02b02cec989e Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Mon, 22 Jul 2024 09:30:54 +0100
+Subject: [PATCH 1195/1215] tty/serial: pl011: restrict RX burst FIFO threshold
+
+If the associated DMA controller has lower burst length support than the
+level the FIFO is set to, then bytes will be left in the RX FIFO at the
+end of a DMA block - requiring a round-trip through the timeout interrupt
+handler rather than an end-of-block DMA interrupt.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/tty/serial/amba-pl011.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/tty/serial/amba-pl011.c
++++ b/drivers/tty/serial/amba-pl011.c
+@@ -487,6 +487,12 @@ static void pl011_dma_probe(struct uart_
+ 					"RX DMA disabled - no residue processing\n");
+ 				return;
+ 			}
++			/*
++			 * DMA controllers with smaller burst capabilities than 1/4
++			 * the FIFO depth will leave more bytes than expected in the
++			 * RX FIFO if mismatched.
++			 */
++			rx_conf.src_maxburst = min(caps.max_burst, rx_conf.src_maxburst);
+ 		}
+ 		dmaengine_slave_config(chan, &rx_conf);
+ 		uap->dmarx.chan = chan;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1196-DT-bindings-add-a-dma-maxburst-property-to-snps-desi.patch b/target/linux/bcm27xx/patches-6.6/950-1196-DT-bindings-add-a-dma-maxburst-property-to-snps-desi.patch
new file mode 100644
index 0000000000..0d0afc2f9c
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1196-DT-bindings-add-a-dma-maxburst-property-to-snps-desi.patch
@@ -0,0 +1,27 @@
+From 5112fd8cce4f1dc9bf43f0f90d35e273e1a0f555 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Mon, 22 Jul 2024 14:32:32 +0100
+Subject: [PATCH 1196/1215] DT: bindings: add a dma-maxburst property to
+ snps,designware-i2s
+
+Do an end-run around ASoC in lieu of not being able to easily find the
+associated DMA controller capabilities.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ .../devicetree/bindings/sound/snps,designware-i2s.yaml        | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml
++++ b/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml
+@@ -69,6 +69,10 @@ properties:
+       - description: RX DMA Channel
+     minItems: 1
+ 
++  dma-maxburst:
++    description: FIFO DMA burst threshold limit
++    maxItems: 1
++
+   dma-names:
+     items:
+       - const: tx
diff --git a/target/linux/bcm27xx/patches-6.6/950-1197-sound-soc-dwc-i2s-choose-FIFO-thresholds-based-on-DM.patch b/target/linux/bcm27xx/patches-6.6/950-1197-sound-soc-dwc-i2s-choose-FIFO-thresholds-based-on-DM.patch
new file mode 100644
index 0000000000..d0e3bc1fab
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1197-sound-soc-dwc-i2s-choose-FIFO-thresholds-based-on-DM.patch
@@ -0,0 +1,99 @@
+From b6b4260fa546d1dc7421c7cfed059052dae04227 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Thu, 18 Jul 2024 09:40:03 +0100
+Subject: [PATCH 1197/1215] sound/soc: dwc-i2s: choose FIFO thresholds based on
+ DMA burst constraints
+
+Valid ranges for the I2S peripheral's FIFO configuration include a depth
+of 16 - unconditionally setting the burst length to 16 with a fifo
+threshold of size/2 will cause under/overflows.
+
+For DMA engines with restricted capabilities the requested burst length
+and FIFO thresholds need to be adjusted downward accordingly.
+
+Both the RX and TX FIFOs operate on "less-than" thresholds. Setting the
+TX threshold to fifo_size minus burst means the FIFO is kept nearly-full.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ sound/soc/dwc/dwc-i2s.c | 21 ++++++++++++++++-----
+ sound/soc/dwc/local.h   |  1 +
+ 2 files changed, 17 insertions(+), 5 deletions(-)
+
+--- a/sound/soc/dwc/dwc-i2s.c
++++ b/sound/soc/dwc/dwc-i2s.c
+@@ -236,6 +236,8 @@ static void dw_i2s_config(struct dw_i2s_
+ 	u32 ch_reg;
+ 	struct i2s_clk_config_data *config = &dev->config;
+ 	u32 dmacr;
++	u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
++	u32 fifo_depth = 1 << (1 + COMP1_FIFO_DEPTH_GLOBAL(comp1));
+ 
+ 	i2s_disable_channels(dev, stream);
+ 
+@@ -251,7 +253,7 @@ static void dw_i2s_config(struct dw_i2s_
+ 			i2s_write_reg(dev->i2s_base, TCR(ch_reg),
+ 				      dev->xfer_resolution);
+ 			i2s_write_reg(dev->i2s_base, TFCR(ch_reg),
+-				      dev->fifo_th - 1);
++				      fifo_depth - dev->fifo_th - 1);
+ 			i2s_write_reg(dev->i2s_base, TER(ch_reg), TER_TXCHEN |
+ 				      dev->tdm_mask << TER_TXSLOT_SHIFT);
+ 			dmacr |= (DMACR_DMAEN_TXCH0 << ch_reg);
+@@ -783,8 +785,8 @@ static int dw_configure_dai_by_pd(struct
+ 		dev->capture_dma_data.pd.data = pdata->capture_dma_data;
+ 		dev->play_dma_data.pd.addr = res->start + I2S_TXDMA;
+ 		dev->capture_dma_data.pd.addr = res->start + I2S_RXDMA;
+-		dev->play_dma_data.pd.max_burst = 16;
+-		dev->capture_dma_data.pd.max_burst = 16;
++		dev->play_dma_data.pd.max_burst = dev->fifo_th;
++		dev->capture_dma_data.pd.max_burst = dev->fifo_th;
+ 		dev->play_dma_data.pd.addr_width = bus_widths[idx];
+ 		dev->capture_dma_data.pd.addr_width = bus_widths[idx];
+ 		dev->play_dma_data.pd.filter = pdata->filter;
+@@ -815,7 +817,10 @@ static int dw_configure_dai_by_dt(struct
+ 		dev->play_dma_data.dt.addr = res->start + I2S_TXDMA;
+ 		dev->play_dma_data.dt.fifo_size = fifo_depth *
+ 			(fifo_width[idx2]) >> 8;
+-		dev->play_dma_data.dt.maxburst = 16;
++		if (dev->max_dma_burst)
++			dev->play_dma_data.dt.maxburst = dev->max_dma_burst;
++		else
++			dev->play_dma_data.dt.maxburst = fifo_depth / 2;
+ 	}
+ 	if (COMP1_RX_ENABLED(comp1)) {
+ 		idx2 = COMP2_RX_WORDSIZE_0(comp2);
+@@ -824,9 +829,14 @@ static int dw_configure_dai_by_dt(struct
+ 		dev->capture_dma_data.dt.addr = res->start + I2S_RXDMA;
+ 		dev->capture_dma_data.dt.fifo_size = fifo_depth *
+ 			(fifo_width[idx2] >> 8);
+-		dev->capture_dma_data.dt.maxburst = 16;
++		if (dev->max_dma_burst)
++			dev->capture_dma_data.dt.maxburst = dev->max_dma_burst;
++		else
++			dev->capture_dma_data.dt.maxburst = fifo_depth / 2;
+ 	}
+ 
++	if (dev->max_dma_burst)
++		dev->fifo_th = min(dev->max_dma_burst, dev->fifo_th);
+ 	return 0;
+ 
+ }
+@@ -1070,6 +1080,7 @@ static int dw_i2s_probe(struct platform_
+ 		}
+ 	}
+ 
++	of_property_read_u32(pdev->dev.of_node, "dma-maxburst", &dev->max_dma_burst);
+ 	dev->bclk_ratio = 0;
+ 	dev->i2s_reg_comp1 = I2S_COMP_PARAM_1;
+ 	dev->i2s_reg_comp2 = I2S_COMP_PARAM_2;
+--- a/sound/soc/dwc/local.h
++++ b/sound/soc/dwc/local.h
+@@ -133,6 +133,7 @@ struct dw_i2s_dev {
+ 	u32 ccr;
+ 	u32 xfer_resolution;
+ 	u32 fifo_th;
++	u32 max_dma_burst;
+ 	u32 l_reg;
+ 	u32 r_reg;
+ 	bool is_jh7110; /* Flag for StarFive JH7110 SoC */
diff --git a/target/linux/bcm27xx/patches-6.6/950-1198-dts-rp1-restrict-i2s-burst-lengths-to-4.patch b/target/linux/bcm27xx/patches-6.6/950-1198-dts-rp1-restrict-i2s-burst-lengths-to-4.patch
new file mode 100644
index 0000000000..30b8a9f9b8
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1198-dts-rp1-restrict-i2s-burst-lengths-to-4.patch
@@ -0,0 +1,30 @@
+From 062434ab3be76d4fa5973bb199ccfd5b68c11720 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Tue, 23 Jul 2024 11:21:47 +0100
+Subject: [PATCH 1198/1215] dts: rp1: restrict i2s burst lengths to 4
+
+The associated DMAC has channels that do not support longer bursts.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ arch/arm64/boot/dts/broadcom/rp1.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
++++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
+@@ -400,6 +400,7 @@
+ 			#sound-dai-cells = <0>;
+ 			dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>;
+ 			dma-names = "tx", "rx";
++			dma-maxburst = <4>;
+ 			status = "disabled";
+ 		};
+ 
+@@ -413,6 +414,7 @@
+ 			#sound-dai-cells = <0>;
+ 			dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>;
+ 			dma-names = "tx", "rx";
++			dma-maxburst = <4>;
+ 			status = "disabled";
+ 		};
+ 
diff --git a/target/linux/bcm27xx/patches-6.6/950-1199-drm-vc4-Disable-the-2pixel-clock-odd-timings-workaro.patch b/target/linux/bcm27xx/patches-6.6/950-1199-drm-vc4-Disable-the-2pixel-clock-odd-timings-workaro.patch
new file mode 100644
index 0000000000..4c429e284d
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1199-drm-vc4-Disable-the-2pixel-clock-odd-timings-workaro.patch
@@ -0,0 +1,204 @@
+From 485d11cfa7df2d2deb39c9b3455cebcb1a85cea2 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Thu, 25 Jul 2024 14:36:32 +0100
+Subject: [PATCH 1199/1215] drm/vc4: Disable the 2pixel/clock odd timings
+ workaround for interlaced
+
+Whilst BCM2712 does fix using odd horizontal timings, it doesn't
+work with interlaced modes.
+
+Drop the workaround for interlaced modes and revert to the same
+behaviour as BCM2711.
+
+https://github.com/raspberrypi/linux/issues/6281
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 20 +++++++++++++++++---
+ drivers/gpu/drm/vc4/vc4_drv.h  |  2 ++
+ drivers/gpu/drm/vc4/vc4_hdmi.c |  8 +++++++-
+ drivers/gpu/drm/vc4/vc4_hdmi.h |  4 ++++
+ 4 files changed, 30 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -378,7 +378,9 @@ static void vc4_crtc_config_pv(struct dr
+ 	bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1;
+ 	bool is_vec = vc4_encoder->type == VC4_ENCODER_TYPE_VEC;
+ 	u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
+-	u8 ppc = pv_data->pixels_per_clock;
++	u8 ppc = (mode->flags & DRM_MODE_FLAG_INTERLACE) ?
++			pv_data->pixels_per_clock_int :
++			pv_data->pixels_per_clock;
+ 
+ 	u16 vert_bp = mode->crtc_vtotal - mode->crtc_vsync_end;
+ 	u16 vert_sync = mode->crtc_vsync_end - mode->crtc_vsync_start;
+@@ -443,7 +445,8 @@ static void vc4_crtc_config_pv(struct dr
+ 		 */
+ 		CRTC_WRITE(PV_V_CONTROL,
+ 			   PV_VCONTROL_CONTINUOUS |
+-			   (vc4->gen >= VC4_GEN_6 ? PV_VCONTROL_ODD_TIMING : 0) |
++			   (vc4->gen >= VC4_GEN_6 && ppc == 1 ?
++					PV_VCONTROL_ODD_TIMING : 0) |
+ 			   (is_dsi ? PV_VCONTROL_DSI : 0) |
+ 			   PV_VCONTROL_INTERLACE |
+ 			   (odd_field_first
+@@ -455,7 +458,8 @@ static void vc4_crtc_config_pv(struct dr
+ 	} else {
+ 		CRTC_WRITE(PV_V_CONTROL,
+ 			   PV_VCONTROL_CONTINUOUS |
+-			   (vc4->gen >= VC4_GEN_6 ? PV_VCONTROL_ODD_TIMING : 0) |
++			   (vc4->gen >= VC4_GEN_6 && ppc == 1 ?
++					PV_VCONTROL_ODD_TIMING : 0) |
+ 			   (is_dsi ? PV_VCONTROL_DSI : 0));
+ 		CRTC_WRITE(PV_VSYNCD_EVEN, 0);
+ 	}
+@@ -1223,6 +1227,7 @@ const struct vc4_pv_data bcm2835_pv0_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 1,
+ 	.encoder_types = {
+ 		[PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI0,
+ 		[PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_DPI,
+@@ -1238,6 +1243,7 @@ const struct vc4_pv_data bcm2835_pv1_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 1,
+ 	.encoder_types = {
+ 		[PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI1,
+ 		[PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_SMI,
+@@ -1253,6 +1259,7 @@ const struct vc4_pv_data bcm2835_pv2_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 1,
+ 	.encoder_types = {
+ 		[PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_HDMI0,
+ 		[PV_CONTROL_CLK_SELECT_VEC] = VC4_ENCODER_TYPE_VEC,
+@@ -1268,6 +1275,7 @@ const struct vc4_pv_data bcm2711_pv0_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 1,
+ 	.encoder_types = {
+ 		[0] = VC4_ENCODER_TYPE_DSI0,
+ 		[1] = VC4_ENCODER_TYPE_DPI,
+@@ -1283,6 +1291,7 @@ const struct vc4_pv_data bcm2711_pv1_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 1,
+ 	.encoder_types = {
+ 		[0] = VC4_ENCODER_TYPE_DSI1,
+ 		[1] = VC4_ENCODER_TYPE_SMI,
+@@ -1298,6 +1307,7 @@ const struct vc4_pv_data bcm2711_pv2_dat
+ 	},
+ 	.fifo_depth = 256,
+ 	.pixels_per_clock = 2,
++	.pixels_per_clock_int = 2,
+ 	.encoder_types = {
+ 		[0] = VC4_ENCODER_TYPE_HDMI0,
+ 	},
+@@ -1312,6 +1322,7 @@ const struct vc4_pv_data bcm2711_pv3_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 1,
+ 	.encoder_types = {
+ 		[PV_CONTROL_CLK_SELECT_VEC] = VC4_ENCODER_TYPE_VEC,
+ 	},
+@@ -1326,6 +1337,7 @@ const struct vc4_pv_data bcm2711_pv4_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 2,
++	.pixels_per_clock_int = 2,
+ 	.encoder_types = {
+ 		[0] = VC4_ENCODER_TYPE_HDMI1,
+ 	},
+@@ -1339,6 +1351,7 @@ const struct vc4_pv_data bcm2712_pv0_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 2,
+ 	.encoder_types = {
+ 		[0] = VC4_ENCODER_TYPE_HDMI0,
+ 	},
+@@ -1352,6 +1365,7 @@ const struct vc4_pv_data bcm2712_pv1_dat
+ 	},
+ 	.fifo_depth = 64,
+ 	.pixels_per_clock = 1,
++	.pixels_per_clock_int = 2,
+ 	.encoder_types = {
+ 		[0] = VC4_ENCODER_TYPE_HDMI1,
+ 	},
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -569,6 +569,8 @@ struct vc4_pv_data {
+ 
+ 	/* Number of pixels output per clock period */
+ 	u8 pixels_per_clock;
++	/* Number of pixels output per clock period when in an interlaced mode */
++	u8 pixels_per_clock_int;
+ 
+ 	enum vc4_encoder_type encoder_types[4];
+ };
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -2263,7 +2263,9 @@ static int vc4_hdmi_encoder_atomic_check
+ 	unsigned long long tmds_bit_rate;
+ 	int ret;
+ 
+-	if (vc4_hdmi->variant->unsupported_odd_h_timings) {
++	if (vc4_hdmi->variant->unsupported_odd_h_timings ||
++	    (vc4_hdmi->variant->unsupported_int_odd_h_timings &&
++		(mode->flags & DRM_MODE_FLAG_INTERLACE))) {
+ 		if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+ 			/* Only try to fixup DBLCLK modes to get 480i and 576i
+ 			 * working.
+@@ -3974,6 +3976,7 @@ static const struct vc4_hdmi_variant bcm
+ 		PHY_LANE_CK,
+ 	},
+ 	.unsupported_odd_h_timings	= true,
++	.unsupported_int_odd_h_timings	= true,
+ 	.external_irq_controller	= true,
+ 
+ 	.init_resources		= vc5_hdmi_init_resources,
+@@ -4003,6 +4006,7 @@ static const struct vc4_hdmi_variant bcm
+ 		PHY_LANE_2,
+ 	},
+ 	.unsupported_odd_h_timings	= true,
++	.unsupported_int_odd_h_timings	= true,
+ 	.external_irq_controller	= true,
+ 
+ 	.init_resources		= vc5_hdmi_init_resources,
+@@ -4032,6 +4036,7 @@ static const struct vc4_hdmi_variant bcm
+ 		PHY_LANE_CK,
+ 	},
+ 	.unsupported_odd_h_timings	= false,
++	.unsupported_int_odd_h_timings	= true,
+ 	.external_irq_controller	= true,
+ 
+ 	.init_resources		= vc5_hdmi_init_resources,
+@@ -4059,6 +4064,7 @@ static const struct vc4_hdmi_variant bcm
+ 		PHY_LANE_CK,
+ 	},
+ 	.unsupported_odd_h_timings	= false,
++	.unsupported_int_odd_h_timings	= true,
+ 	.external_irq_controller	= true,
+ 
+ 	.init_resources		= vc5_hdmi_init_resources,
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
+@@ -49,6 +49,10 @@ struct vc4_hdmi_variant {
+ 
+ 	/* The BCM2711 cannot deal with odd horizontal pixel timings */
+ 	bool unsupported_odd_h_timings;
++	/* The BCM2712 can handle odd horizontal pixel timings, but not in
++	 * interlaced modes
++	 */
++	bool unsupported_int_odd_h_timings;
+ 
+ 	/*
+ 	 * The BCM2711 CEC/hotplug IRQ controller is shared between the
diff --git a/target/linux/bcm27xx/patches-6.6/950-1200-ARM-dts-bcm2712-Fix-invalid-polling-delay-passive-se.patch b/target/linux/bcm27xx/patches-6.6/950-1200-ARM-dts-bcm2712-Fix-invalid-polling-delay-passive-se.patch
new file mode 100644
index 0000000000..8a7d86d745
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1200-ARM-dts-bcm2712-Fix-invalid-polling-delay-passive-se.patch
@@ -0,0 +1,26 @@
+From 70636ad110715b5e1ec6b08e24f0ddaf5df7186d Mon Sep 17 00:00:00 2001
+From: Dom Cobley <popcornmix@gmail.com>
+Date: Tue, 30 Jul 2024 19:00:03 +0100
+Subject: [PATCH 1200/1215] ARM: dts: bcm2712: Fix invalid
+ polling-delay-passive setting
+
+This produces a hard fail on later (6.11) kernels.
+
+See: https://lore.kernel.org/all/5802156.DvuYhMxLoT@rjwysocki.net/
+
+Signed-off-by: Dom Cobley <popcornmix@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+@@ -40,7 +40,7 @@
+ 
+ 	thermal-zones {
+ 		cpu_thermal: cpu-thermal {
+-			polling-delay-passive = <2000>;
++			polling-delay-passive = <1000>;
+ 			polling-delay = <1000>;
+ 			coefficients = <(-550) 450000>;
+ 			thermal-sensors = <&thermal>;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1201-spi-dw-Fix-non-DMA-transmit-only-transfers.patch b/target/linux/bcm27xx/patches-6.6/950-1201-spi-dw-Fix-non-DMA-transmit-only-transfers.patch
new file mode 100644
index 0000000000..6545c09186
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1201-spi-dw-Fix-non-DMA-transmit-only-transfers.patch
@@ -0,0 +1,143 @@
+From 199e611183de09ad91fe01fc79da78cc9d11ccb6 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Mon, 29 Jul 2024 11:12:38 +0100
+Subject: [PATCH 1201/1215] spi: dw: Fix non-DMA transmit-only transfers
+
+Ensure the transmit FIFO has emptied before ending the transfer by
+dropping the TX threshold to 0 when the last byte has been pushed into
+the FIFO. Include a similar fix for the non-IRQ paths.
+
+See: https://github.com/raspberrypi/linux/issues/6285
+Fixes: 6014649de765 ("spi: dw: Save bandwidth with the TMOD_TO feature")
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/spi/spi-dw-core.c | 62 +++++++++++++++++++++++++++++++++------
+ drivers/spi/spi-dw.h      |  3 ++
+ 2 files changed, 56 insertions(+), 9 deletions(-)
+
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -220,6 +220,32 @@ int dw_spi_check_status(struct dw_spi *d
+ }
+ EXPORT_SYMBOL_NS_GPL(dw_spi_check_status, SPI_DW_CORE);
+ 
++static inline bool dw_spi_ctlr_busy(struct dw_spi *dws)
++{
++	return dw_readl(dws, DW_SPI_SR) & DW_SPI_SR_BUSY;
++}
++
++static enum hrtimer_restart dw_spi_hrtimer_handler(struct hrtimer *hr)
++{
++	struct dw_spi *dws = container_of(hr, struct dw_spi, hrtimer);
++
++	if (!dw_spi_ctlr_busy(dws)) {
++		spi_finalize_current_transfer(dws->host);
++		return HRTIMER_NORESTART;
++	}
++
++	if (!dws->idle_wait_retries) {
++		dev_err(&dws->host->dev, "controller stuck at busy\n");
++		spi_finalize_current_transfer(dws->host);
++		return HRTIMER_NORESTART;
++	}
++
++	dws->idle_wait_retries--;
++	hrtimer_forward_now(hr, dws->idle_wait_interval);
++
++	return HRTIMER_RESTART;
++}
++
+ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws)
+ {
+ 	u16 irq_status = dw_readl(dws, DW_SPI_ISR);
+@@ -246,7 +272,22 @@ static irqreturn_t dw_spi_transfer_handl
+ 		}
+ 	} else if (!dws->tx_len) {
+ 		dw_spi_mask_intr(dws, DW_SPI_INT_TXEI);
+-		spi_finalize_current_transfer(dws->host);
++		if (dw_spi_ctlr_busy(dws)) {
++			ktime_t period = ns_to_ktime(DIV_ROUND_UP(NSEC_PER_SEC, dws->current_freq));
++
++			/*
++			 * Make the initial wait an underestimate of how long the transfer
++			 * should take, then poll rapidly to reduce the delay
++			 */
++			hrtimer_start(&dws->hrtimer,
++				      period * (8 * dws->n_bytes - 1),
++				      HRTIMER_MODE_REL);
++			dws->idle_wait_retries = 10;
++			dws->idle_wait_interval = period;
++		} else {
++			spi_finalize_current_transfer(dws->host);
++		}
++		return IRQ_HANDLED;
+ 	}
+ 
+ 	/*
+@@ -255,9 +296,13 @@ static irqreturn_t dw_spi_transfer_handl
+ 	 * have the TXE IRQ flood at the final stage of the transfer.
+ 	 */
+ 	if (irq_status & DW_SPI_INT_TXEI) {
+-		if (!dws->tx_len)
+-			dw_spi_mask_intr(dws, DW_SPI_INT_TXEI);
+ 		dw_writer(dws);
++		if (!dws->tx_len) {
++			if (dws->rx_len)
++				dw_spi_mask_intr(dws, DW_SPI_INT_TXEI);
++			else
++				dw_writel(dws, DW_SPI_TXFTLR, 0);
++		}
+ 	}
+ 
+ 	return IRQ_HANDLED;
+@@ -428,7 +473,7 @@ static int dw_spi_poll_transfer(struct d
+ 		ret = dw_spi_check_status(dws, true);
+ 		if (ret)
+ 			return ret;
+-	} while (dws->rx_len);
++	} while (dws->rx_len || dws->tx_len || dw_spi_ctlr_busy(dws));
+ 
+ 	return 0;
+ }
+@@ -652,11 +697,6 @@ static int dw_spi_write_then_read(struct
+ 	return 0;
+ }
+ 
+-static inline bool dw_spi_ctlr_busy(struct dw_spi *dws)
+-{
+-	return dw_readl(dws, DW_SPI_SR) & DW_SPI_SR_BUSY;
+-}
+-
+ static int dw_spi_wait_mem_op_done(struct dw_spi *dws)
+ {
+ 	int retry = DW_SPI_WAIT_RETRIES;
+@@ -993,6 +1033,9 @@ int dw_spi_add_host(struct device *dev,
+ 		}
+ 	}
+ 
++	hrtimer_init(&dws->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
++	dws->hrtimer.function = dw_spi_hrtimer_handler;
++
+ 	ret = spi_register_controller(host);
+ 	if (ret) {
+ 		dev_err_probe(dev, ret, "problem registering spi host\n");
+@@ -1018,6 +1061,7 @@ void dw_spi_remove_host(struct dw_spi *d
+ {
+ 	dw_spi_debugfs_remove(dws);
+ 
++	hrtimer_cancel(&dws->hrtimer);
+ 	spi_unregister_controller(dws->host);
+ 
+ 	if (dws->dma_ops && dws->dma_ops->dma_exit)
+--- a/drivers/spi/spi-dw.h
++++ b/drivers/spi/spi-dw.h
+@@ -180,6 +180,9 @@ struct dw_spi {
+ 	u32			current_freq;	/* frequency in hz */
+ 	u32			cur_rx_sample_dly;
+ 	u32			def_rx_sample_dly_ns;
++	struct hrtimer		hrtimer;
++	ktime_t			idle_wait_interval;
++	int			idle_wait_retries;
+ 
+ 	/* Custom memory operations */
+ 	struct spi_controller_mem_ops mem_ops;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1202-spi-dw-Clamp-the-minimum-clock-speed.patch b/target/linux/bcm27xx/patches-6.6/950-1202-spi-dw-Clamp-the-minimum-clock-speed.patch
new file mode 100644
index 0000000000..585173aa44
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1202-spi-dw-Clamp-the-minimum-clock-speed.patch
@@ -0,0 +1,26 @@
+From e9294823cf02068189a0e901223ed4991923c689 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 31 Jul 2024 10:55:19 +0100
+Subject: [PATCH 1202/1215] spi: dw: Clamp the minimum clock speed
+
+The DW SPI interface has a 16-bit clock divider, where the bottom bit
+of the divisor must be 0. Limit how low the clock speed can go to
+prevent the clock divider from being truncated, as that could lead to
+a much higher clock rate than requested.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/spi/spi-dw-core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -397,7 +397,7 @@ void dw_spi_update_config(struct dw_spi
+ 		dw_writel(dws, DW_SPI_CTRLR1, cfg->ndf ? cfg->ndf - 1 : 0);
+ 
+ 	/* Note DW APB SSI clock divider doesn't support odd numbers */
+-	clk_div = (DIV_ROUND_UP(dws->max_freq, cfg->freq) + 1) & 0xfffe;
++	clk_div = min(DIV_ROUND_UP(dws->max_freq, cfg->freq) + 1, 0xfffe) & 0xfffe;
+ 	speed_hz = dws->max_freq / clk_div;
+ 
+ 	if (dws->current_freq != speed_hz) {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1203-overlays-i2c-rtc-Correct-bq32000-property-name.patch b/target/linux/bcm27xx/patches-6.6/950-1203-overlays-i2c-rtc-Correct-bq32000-property-name.patch
new file mode 100644
index 0000000000..afd6c415ba
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1203-overlays-i2c-rtc-Correct-bq32000-property-name.patch
@@ -0,0 +1,26 @@
+From 05e3687c6c973c30bf35f3b7f4a7589b5030a830 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 31 Jul 2024 13:19:26 +0100
+Subject: [PATCH 1203/1215] overlays: i2c-rtc: Correct bq32000 property name
+
+The DT property for the BQ32000 controlled by trickle-resistor-ohms
+parameter should be "trickle-resistor-ohms", not "abracon,tc-resistor".
+
+See: https://github.com/raspberrypi/linux/issues/6291
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
+@@ -354,7 +354,7 @@
+ 					<&rv3028>,"trickle-resistor-ohms:0",
+ 					<&rv3032>,"trickle-resistor-ohms:0",
+ 					<&rv1805>,"abracon,tc-resistor:0",
+-					<&bq32000>,"abracon,tc-resistor:0";
++					<&bq32000>,"trickle-resistor-ohms:0";
+ 		trickle-voltage-mv = <&rv3032>,"trickle-voltage-millivolts:0";
+ 		backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
+ 		wakeup-source = <&ds1339>,"wakeup-source?",
diff --git a/target/linux/bcm27xx/patches-6.6/950-1204-hwmon-adt7410-Add-DT-compatible-strings.patch b/target/linux/bcm27xx/patches-6.6/950-1204-hwmon-adt7410-Add-DT-compatible-strings.patch
new file mode 100644
index 0000000000..cc54c62b91
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1204-hwmon-adt7410-Add-DT-compatible-strings.patch
@@ -0,0 +1,31 @@
+From 16d0ee22d2c0b32cc67db73ce03263b740bba2a7 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 31 Jul 2024 15:02:47 +0100
+Subject: [PATCH 1204/1215] hwmon: (adt7410) Add DT compatible strings
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/hwmon/adt7410.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/hwmon/adt7410.c
++++ b/drivers/hwmon/adt7410.c
+@@ -94,10 +94,18 @@ static const struct i2c_device_id adt741
+ };
+ MODULE_DEVICE_TABLE(i2c, adt7410_ids);
+ 
++static const struct of_device_id adt7410_of_ids[] = {
++	{ .compatible = "adi,adt7410" },
++	{ .compatible = "adi,adt7420" },
++	{}
++};
++MODULE_DEVICE_TABLE(of, adt7410_of_ids);
++
+ static struct i2c_driver adt7410_driver = {
+ 	.class		= I2C_CLASS_HWMON,
+ 	.driver = {
+ 		.name	= "adt7410",
++		.of_match_table = adt7410_of_ids,
+ 		.pm	= pm_sleep_ptr(&adt7x10_dev_pm_ops),
+ 	},
+ 	.probe		= adt7410_i2c_probe,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1205-fixup-pinctrl-bcm2712-pinctrl-pinconf-driver.patch b/target/linux/bcm27xx/patches-6.6/950-1205-fixup-pinctrl-bcm2712-pinctrl-pinconf-driver.patch
new file mode 100644
index 0000000000..fb786e172e
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1205-fixup-pinctrl-bcm2712-pinctrl-pinconf-driver.patch
@@ -0,0 +1,23 @@
+From a4bf61fad9fe102514243ed263c458b053c87681 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Fri, 2 Aug 2024 11:29:03 +0100
+Subject: [PATCH 1205/1215] fixup! pinctrl: bcm2712 pinctrl/pinconf driver
+
+Fix cut-and-paste error spotted during upstreaming process.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2712.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2712.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2712.c
+@@ -1029,7 +1029,7 @@ static int bcm2712_pinconf_get(struct pi
+ 
+ 	*config = pinconf_to_config_packed(param, arg);
+ 
+-	return -ENOTSUPP;
++	return 0;
+ }
+ 
+ static int bcm2712_pinconf_set(struct pinctrl_dev *pctldev,
diff --git a/target/linux/bcm27xx/patches-6.6/950-1206-dtoverlays-Add-overlay-for-HD44780-via-I2C-PCF8574-b.patch b/target/linux/bcm27xx/patches-6.6/950-1206-dtoverlays-Add-overlay-for-HD44780-via-I2C-PCF8574-b.patch
new file mode 100644
index 0000000000..db5f472ff0
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1206-dtoverlays-Add-overlay-for-HD44780-via-I2C-PCF8574-b.patch
@@ -0,0 +1,125 @@
+From e94e761305fa2281718adcf625d78f3cf662e12d Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Thu, 1 Aug 2024 18:12:50 +0100
+Subject: [PATCH 1206/1215] dtoverlays: Add overlay for HD44780 via I2C PCF8574
+ backpack
+
+Many HD44780 LCD displays are connected via very common I2C
+GPIO expander.
+We have an overlay for connecting the displays directly to GPIOs,
+but not one for it connected via a backpack. Add such an overlay.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+---
+ arch/arm/boot/dts/overlays/Makefile           |  1 +
+ arch/arm/boot/dts/overlays/README             | 27 +++++++++
+ .../dts/overlays/hd44780-i2c-lcd-overlay.dts  | 57 +++++++++++++++++++
+ 3 files changed, 85 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/hd44780-i2c-lcd-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -82,6 +82,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
+ 	gpio-no-irq.dtbo \
+ 	gpio-poweroff.dtbo \
+ 	gpio-shutdown.dtbo \
++	hd44780-i2c-lcd.dtbo \
+ 	hd44780-lcd.dtbo \
+ 	hdmi-backlight-hwhack-gpio.dtbo \
+ 	hifiberry-amp.dtbo \
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1705,6 +1705,33 @@ Params: gpio_pin                GPIO pin
+                                 (default 100)
+ 
+ 
++Name:   hd44780-i2c-lcd
++Info:   Configures an HD44780 compatible LCD display connected via a PCF8574 as
++        is often found as a backpack interface for these displays.
++Load:   dtoverlay=hd44780-i2c-lcd,<param>=<val>
++Params: addr                    I2C address of PCF8574
++        pin_d4                  GPIO pin for data pin D4 (default 4)
++
++        pin_d5                  GPIO pin for data pin D5 (default 5)
++
++        pin_d6                  GPIO pin for data pin D6 (default 6)
++
++        pin_d7                  GPIO pin for data pin D7 (default 7)
++
++        pin_en                  GPIO pin for "Enable" (default 2)
++
++        pin_rs                  GPIO pin for "Register Select" (default 0)
++
++        pin_rw                  GPIO pin for R/W select (default 1)
++
++        pin_bl                  GPIO pin for enabling/disabling the display
++                                backlight. (default 3)
++
++        display_height          Height of the display in characters (default 2)
++
++        display_width           Width of the display in characters (default 16)
++
++
+ Name:   hd44780-lcd
+ Info:   Configures an HD44780 compatible LCD display. Uses 4 gpio pins for
+         data, 2 gpio pins for enable and register select and 1 optional pin
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hd44780-i2c-lcd-overlay.dts
+@@ -0,0 +1,57 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++	compatible = "brcm,bcm2835";
++
++	fragment@0 {
++		target = <&i2c_arm>;
++		__overlay__ {
++			status = "okay";
++
++			pcf857x: pcf857x@27 {
++				compatible = "nxp,pcf8574";
++				reg = <0x27>;
++				gpio-controller;
++				#gpio-cells = <2>;
++				status = "okay";
++			};
++		};
++	};
++
++	fragment@1 {
++		target-path = "/";
++		__overlay__ {
++			lcd_screen: auxdisplay {
++				compatible = "hit,hd44780";
++
++				data-gpios = <&pcf857x 4 0>,
++					     <&pcf857x 5 0>,
++					     <&pcf857x 6 0>,
++					     <&pcf857x 7 0>;
++				enable-gpios = <&pcf857x 2 0>;
++				rs-gpios = <&pcf857x 0 0>;
++				rw-gpios = <&pcf857x 1 0>;
++				backlight-gpios = <&pcf857x 3 0>;
++
++				display-width-chars = <16>;
++				display-height-chars = <2>;
++			};
++		};
++	};
++
++	__overrides__ {
++		pin_d4 = <&lcd_screen>,"data-gpios:4";
++		pin_d5 = <&lcd_screen>,"data-gpios:16";
++		pin_d6 = <&lcd_screen>,"data-gpios:28";
++		pin_d7 = <&lcd_screen>,"data-gpios:40";
++		pin_en = <&lcd_screen>,"enable-gpios:4";
++		pin_rs = <&lcd_screen>,"rs-gpios:4";
++		pin_rw = <&lcd_screen>,"rw-gpios:4";
++		pin_bl = <&lcd_screen>,"backlight-gpios:4";
++		display_height = <&lcd_screen>,"display-height-chars:0";
++		display_width = <&lcd_screen>,"display-width-chars:0";
++		addr = <&pcf857x>,"reg:0";
++	};
++
++};
diff --git a/target/linux/bcm27xx/patches-6.6/950-1207-dtoverlays-Document-display_-width-height-on-hd44780.patch b/target/linux/bcm27xx/patches-6.6/950-1207-dtoverlays-Document-display_-width-height-on-hd44780.patch
new file mode 100644
index 0000000000..793cd49310
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1207-dtoverlays-Document-display_-width-height-on-hd44780.patch
@@ -0,0 +1,28 @@
+From 3c319a466a1c718f66c471a9d5ec60de6de44612 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Fri, 2 Aug 2024 10:41:28 +0100
+Subject: [PATCH 1207/1215] dtoverlays: Document display_[width|height] on
+ hd44780-lcd overlay
+
+The default values defining a 16x2 display weren't documented,
+so add them.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+---
+ arch/arm/boot/dts/overlays/README | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1752,9 +1752,9 @@ Params: pin_d4                  GPIO pin
+         pin_bl                  Optional pin for enabling/disabling the
+                                 display backlight. (default disabled)
+ 
+-        display_height          Height of the display in characters
++        display_height          Height of the display in characters (default 2)
+ 
+-        display_width           Width of the display in characters
++        display_width           Width of the display in characters (default 16)
+ 
+ 
+ Name:   hdmi-backlight-hwhack-gpio
diff --git a/target/linux/bcm27xx/patches-6.6/950-1208-DTS-bcm2712-enable-SD-slot-CQE-by-default-on-Pi-5.patch b/target/linux/bcm27xx/patches-6.6/950-1208-DTS-bcm2712-enable-SD-slot-CQE-by-default-on-Pi-5.patch
new file mode 100644
index 0000000000..16e7603498
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1208-DTS-bcm2712-enable-SD-slot-CQE-by-default-on-Pi-5.patch
@@ -0,0 +1,39 @@
+From 216df57950849f905c398904e7d6cbdf278b5717 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Mon, 5 Aug 2024 11:28:36 +0100
+Subject: [PATCH 1208/1215] DTS: bcm2712: enable SD slot CQE by default on Pi 5
+
+The corresponding driver implementation has seen sufficient testing,
+so enable by default. Retain the dtparam so it can be turned off for test.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ arch/arm/boot/dts/overlays/README                | 6 +++---
+ arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 1 +
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -378,9 +378,9 @@ Params:
+                                 non-lite SKU of CM4).
+                                 (default "on")
+ 
+-        sd_cqe                  Use to enable Command Queueing on the SD
+-                                interface for faster Class A2 card performance
+-                                (Pi 5 only, default "off")
++        sd_cqe                  Set to "off" to disable Command Queueing if you
++                                have an incompatible Class A2 SD card
++                                (Pi 5 only, default "on")
+ 
+         sd_overclock            Clock (in MHz) to use when the MMC framework
+                                 requests 50MHz
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+@@ -363,6 +363,7 @@ dpi_16bit_gpio2:        &rp1_dpi_16bit_g
+ 	sd-uhs-sdr50;
+ 	sd-uhs-ddr50;
+ 	sd-uhs-sdr104;
++	supports-cqe;
+ 	cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>;
+ 	//no-1-8-v;
+ 	status = "okay";
diff --git a/target/linux/bcm27xx/patches-6.6/950-1211-gpiolib-Override-gpiochip-numbers-with-DT-aliases.patch b/target/linux/bcm27xx/patches-6.6/950-1211-gpiolib-Override-gpiochip-numbers-with-DT-aliases.patch
new file mode 100644
index 0000000000..4ce9c04658
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1211-gpiolib-Override-gpiochip-numbers-with-DT-aliases.patch
@@ -0,0 +1,50 @@
+From 53b9d9bbb57e292c6b332a2fb9899003586e17ca Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Thu, 2 May 2024 16:17:02 +0100
+Subject: [PATCH 1211/1215] gpiolib: Override gpiochip numbers with DT aliases
+
+In the same way that other subsystems support the setting of device
+id numbers from Device Tree aliases, allow gpiochip numbers to be
+derived from "gpiochip<n>" aliases.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/gpio/gpiolib.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -110,6 +110,7 @@ static int gpiochip_irqchip_init_valid_m
+ static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
+ 
+ static bool gpiolib_initialized;
++static int first_dynamic_gpiochip_num = -1;
+ 
+ static inline void desc_set_label(struct gpio_desc *d, const char *label)
+ {
+@@ -745,6 +746,7 @@ int gpiochip_add_data_with_key(struct gp
+ 	unsigned int i;
+ 	int base = 0;
+ 	int ret = 0;
++	int id;
+ 
+ 	/*
+ 	 * First: allocate and populate the internal stat container, and
+@@ -769,7 +771,16 @@ int gpiochip_add_data_with_key(struct gp
+ 	else if (gc->parent)
+ 		device_set_node(&gdev->dev, dev_fwnode(gc->parent));
+ 
+-	gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
++	if (first_dynamic_gpiochip_num < 0) {
++		id = of_alias_get_highest_id("gpiochip");
++		first_dynamic_gpiochip_num = (id >= 0) ? (id + 1) : 0;
++	}
++
++	id = of_alias_get_id(gdev->dev.of_node, "gpiochip");
++	if (id < 0)
++		id = first_dynamic_gpiochip_num;
++
++	gdev->id = ida_alloc_range(&gpio_ida, id, ~0, GFP_KERNEL);
+ 	if (gdev->id < 0) {
+ 		ret = gdev->id;
+ 		goto err_free_gdev;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1212-dts-bcm2712-rpi-Add-gpiochip0-alias.patch b/target/linux/bcm27xx/patches-6.6/950-1212-dts-bcm2712-rpi-Add-gpiochip0-alias.patch
new file mode 100644
index 0000000000..21913760a7
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1212-dts-bcm2712-rpi-Add-gpiochip0-alias.patch
@@ -0,0 +1,23 @@
+From 1162316fd26eeb4193b23fcc1bb332f42938aa70 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Thu, 2 May 2024 16:58:59 +0100
+Subject: [PATCH 1212/1215] dts: bcm2712-rpi: Add gpiochip0 alias
+
+Add a gpiochip0 aliase pointing to the rp1 GPIO node, making it appear
+as gpiochip0.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
+@@ -112,6 +112,7 @@
+ 		gpio2 = &gio_aon;
+ 		gpio3 = &pinctrl;
+ 		gpio4 = &pinctrl_aon;
++		gpiochip0 = &gpio;
+ 		i2c = &i2c_arm;
+ 		i2c0 = &i2c0;
+ 		i2c1 = &i2c1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1213-dts-bcm2712-rpi-The-SoC-gpiochips-start-at-10.patch b/target/linux/bcm27xx/patches-6.6/950-1213-dts-bcm2712-rpi-The-SoC-gpiochips-start-at-10.patch
new file mode 100644
index 0000000000..5bf54c3fb0
--- /dev/null
+++ b/target/linux/bcm27xx/patches-6.6/950-1213-dts-bcm2712-rpi-The-SoC-gpiochips-start-at-10.patch
@@ -0,0 +1,24 @@
+From 70c640ce992234aacba5a717f3fb47319f451431 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Thu, 2 May 2024 17:40:25 +0100
+Subject: [PATCH 1213/1215] dts: bcm2712-rpi: The SoC gpiochips start at 10
+
+Make the BCM2712's onboard GPIOs start at gpiochip10, marking them out
+as system resources and preventing accidental use by existing Pi 5
+code.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
+@@ -113,6 +113,7 @@
+ 		gpio3 = &pinctrl;
+ 		gpio4 = &pinctrl_aon;
+ 		gpiochip0 = &gpio;
++		gpiochip10 = &gio;
+ 		i2c = &i2c_arm;
+ 		i2c0 = &i2c0;
+ 		i2c1 = &i2c1;
diff --git a/target/linux/bcm47xx/patches-6.6/830-huawei_e970_support.patch b/target/linux/bcm47xx/patches-6.6/830-huawei_e970_support.patch
index 21ab40206f..08813da1ba 100644
--- a/target/linux/bcm47xx/patches-6.6/830-huawei_e970_support.patch
+++ b/target/linux/bcm47xx/patches-6.6/830-huawei_e970_support.patch
@@ -1,14 +1,14 @@
 --- a/arch/mips/bcm47xx/setup.c
 +++ b/arch/mips/bcm47xx/setup.c
-@@ -37,6 +37,7 @@
- #include <linux/ssb/ssb.h>
+@@ -38,6 +38,7 @@
  #include <linux/ssb/ssb_embedded.h>
  #include <linux/bcma/bcma_soc.h>
+ #include <asm/bmips.h>
 +#include <linux/old_gpio_wdt.h>
  #include <asm/bootinfo.h>
  #include <asm/idle.h>
  #include <asm/prom.h>
-@@ -254,6 +255,33 @@ static struct fixed_phy_status bcm47xx_f
+@@ -262,6 +263,33 @@ static struct fixed_phy_status bcm47xx_f
  	.duplex	= DUPLEX_FULL,
  };
  
@@ -42,7 +42,7 @@
  static int __init bcm47xx_register_bus_complete(void)
  {
  	switch (bcm47xx_bus_type) {
-@@ -275,6 +303,7 @@ static int __init bcm47xx_register_bus_c
+@@ -283,6 +311,7 @@ static int __init bcm47xx_register_bus_c
  	bcm47xx_workarounds();
  
  	fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
diff --git a/target/linux/bcm53xx/patches-6.6/600-net-disable-GRO-by-default.patch b/target/linux/bcm53xx/patches-6.6/600-net-disable-GRO-by-default.patch
index 9fa41a4b7e..fd41824383 100644
--- a/target/linux/bcm53xx/patches-6.6/600-net-disable-GRO-by-default.patch
+++ b/target/linux/bcm53xx/patches-6.6/600-net-disable-GRO-by-default.patch
@@ -21,7 +21,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
 
 --- a/include/linux/netdev_features.h
 +++ b/include/linux/netdev_features.h
-@@ -242,10 +242,10 @@ static inline int find_next_netdev_featu
+@@ -243,10 +243,10 @@ static inline int find_next_netdev_featu
  #define NETIF_F_UPPER_DISABLES	NETIF_F_LRO
  
  /* changeable features with no special hardware requirements */
diff --git a/target/linux/bmips/bcm6328/base-files/etc/board.d/01_leds b/target/linux/bmips/bcm6328/base-files/etc/board.d/01_leds
index b2ccc9a60e..3b9033a4d4 100644
--- a/target/linux/bmips/bcm6328/base-files/etc/board.d/01_leds
+++ b/target/linux/bmips/bcm6328/base-files/etc/board.d/01_leds
@@ -10,6 +10,7 @@ arcadyan,ar7516)
 	ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
 	ucidef_set_led_netdev "wlan0" "WiFi" "green:wifi" "phy0-ap0"
 	;;
+inteno,xg6846 |\
 nucom,r5010unv2 |\
 sercomm,ad1018)
 	ucidef_set_led_usbport "usb" "USB" "green:usb" "usb1-port1" "usb2-port1"
diff --git a/target/linux/bmips/dts/bcm6328-inteno-xg6846.dts b/target/linux/bmips/dts/bcm6328-inteno-xg6846.dts
index 72f85a53ca..91b771a2bd 100644
--- a/target/linux/bmips/dts/bcm6328-inteno-xg6846.dts
+++ b/target/linux/bmips/dts/bcm6328-inteno-xg6846.dts
@@ -1,5 +1,4 @@
 // SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
 
 /*
  * Devicetree for the Inteno XG6846 router, mostly used as a
@@ -16,26 +15,18 @@
  * Some devices have a USB type A host receptacle mounted,
  * some do not.
  */
+
 #include "bcm6328.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "Inteno XG6846";
 	compatible = "inteno,xg6846", "brcm,bcm6328";
 
-	/* OpenWrt-specific aliases */
 	aliases {
-		led-boot = &led_pwr_red;
-		led-failsafe = &led_pwr_red;
-		led-running = &led_pwr_green;
-		led-upgrade = &led_pwr_red;
-		led-usb = &led_usb_green;
-	};
-
-	chosen {
-		bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
-		stdout-path = "serial0:115200n8";
+		led-boot = &led_power_red;
+		led-failsafe = &led_power_red;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_red;
 	};
 
 	/*
@@ -49,6 +40,12 @@
 		scl-gpios = <&gpio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		sfp_eeprom: eeprom@50 {
+			compatible = "atmel,24c02";
+			reg = <0x50>;
+			read-only;
+		};
 	};
 
 	/* This I2C bus is used for the external CATV connector (usually unused) */
@@ -60,17 +57,9 @@
 		#size-cells = <0>;
 	};
 
-	sfp0: sfp0 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c0>;
-		los-gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
-	};
-
 	keys {
 		compatible = "gpio-keys-polled";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		poll-interval = <20>;
+		poll-interval = <100>;
 
 		reset {
 			label = "reset";
@@ -79,6 +68,12 @@
 			debounce-interval = <60>;
 		};
 	};
+
+	sfp0: sfp0 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+	};
 };
 
 &hsspi {
@@ -110,10 +105,20 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			cfe: partition@0 {
+			partition@0 {
 				label = "cfe";
 				reg = <0x0000000 0x0010000>;
 				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_cfe_6a0: macaddr@6a0 {
+						reg = <0x6a0 0x6>;
+					};
+				};
 			};
 
 			partition@10000 {
@@ -131,14 +136,8 @@
 	};
 };
 
-&cfe {
-	compatible = "nvmem-cells";
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	macaddr_cfe_6a0: macaddr@6a0 {
-		reg = <0x6a0 0x6>;
-	};
+&ehci {
+	status = "okay";
 };
 
 &ethernet {
@@ -148,20 +147,33 @@
 	nvmem-cell-names = "mac-address";
 };
 
-&switch0 {
-	dsa,member = <0 0>;
+&leds {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_leds>,
+		    <&pinctrl_ephy1_spd_led>,
+		    <&pinctrl_ephy3_spd_led>;
 
-	ports {
-		switch0port4: port@4 {
-			reg = <4>;
-			label = "extsw";
+	led@16 {
+		reg = <16>;
+		active-low;
+		function = LED_FUNCTION_USB;
+		color = <LED_COLOR_ID_GREEN>;
+	};
 
-			phy-mode = "rgmii";
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-			};
-		};
+	led_power_red: led@18 {
+		reg = <18>;
+		active-low;
+		function = LED_FUNCTION_POWER;
+		color = <LED_COLOR_ID_RED>;
+		panic-indicator;
+	};
+
+	led_power_green: led@20 {
+		reg = <20>;
+		active-low;
+		function = LED_FUNCTION_POWER;
+		color = <LED_COLOR_ID_GREEN>;
 	};
 };
 
@@ -172,8 +184,10 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0>;
+
 		interrupt-controller;
 		#interrupt-cells = <2>;
+
 		dsa,member = <1 0>;
 
 		ports {
@@ -183,49 +197,165 @@
 			port@0 {
 				reg = <0>;
 				label = "lan1";
+
 				phy-handle = <&lan1phy>;
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@0 {
+						reg = <0>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_LAN;
+						default-state = "keep";
+					};
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_AMBER>;
+						function = LED_FUNCTION_LAN;
+					};
+				};
 			};
 
 			port@1 {
 				reg = <1>;
 				label = "lan2";
+
 				phy-handle = <&lan2phy>;
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@0 {
+						reg = <0>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_LAN;
+						default-state = "keep";
+					};
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_AMBER>;
+						function = LED_FUNCTION_LAN;
+					};
+				};
 			};
 
 			port@2 {
 				reg = <2>;
 				label = "lan3";
+
 				phy-handle = <&lan3phy>;
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@0 {
+						reg = <0>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_LAN;
+						default-state = "keep";
+					};
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_AMBER>;
+						function = LED_FUNCTION_LAN;
+					};
+				};
 			};
 
 			port@3 {
 				reg = <3>;
 				label = "lan4";
+
 				phy-handle = <&lan4phy>;
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@0 {
+						reg = <0>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_LAN;
+						default-state = "keep";
+					};
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_AMBER>;
+						function = LED_FUNCTION_LAN;
+					};
+				};
 			};
 
 			port@4 {
 				reg = <4>;
 				label = "ext1";
+
 				phy-handle = <&ext1phy>;
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@0 {
+						reg = <0>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_WAN;
+						default-state = "keep";
+					};
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_AMBER>;
+						function = LED_FUNCTION_WAN;
+					};
+				};
 			};
 
 			port@5 {
 				reg = <5>;
-				phy-mode = "rgmii-id";
 				label = "wan";
+
+				phy-mode = "rgmii-id";
 				sfp = <&sfp0>;
+
 				fixed-link {
 					speed = <1000>;
 					full-duplex;
 				};
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@0 {
+						reg = <0>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_WAN;
+						default-state = "keep";
+					};
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_AMBER>;
+						function = LED_FUNCTION_WAN;
+					};
+				};
 			};
 
 			port@6 {
 				reg = <6>;
+
 				phy-mode = "rgmii-id";
-				label = "cpu";
 				ethernet = <&switch0port4>;
+
 				fixed-link {
 					speed = <1000>;
 					full-duplex;
@@ -242,21 +372,25 @@
 				interrupt-parent = <&switch1>;
 				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
 			lan2phy: ethernet-phy@1 {
 				reg = <1>;
 				interrupt-parent = <&switch1>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
 			lan3phy: ethernet-phy@2 {
 				reg = <2>;
 				interrupt-parent = <&switch1>;
 				interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
 			lan4phy: ethernet-phy@3 {
 				reg = <3>;
 				interrupt-parent = <&switch1>;
 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
 			ext1phy: ethernet-phy@4 {
 				reg = <4>;
 				interrupt-parent = <&switch1>;
@@ -266,48 +400,39 @@
 	};
 };
 
-&uart0 {
+&ohci {
 	status = "okay";
 };
 
 &pinctrl {
-	pinctrl_xg6846_usb_spd_led: xg6846_usb_spd_led-pins {
+	pinctrl_leds: leds {
 		function = "led";
-		pins = "gpio17";
+		pins = "gpio16", "gpio18", "gpio20";
 	};
 };
 
-&leds {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_xg6846_usb_spd_led>, /* GPIO16 LED USB */
-		    <&pinctrl_ephy1_spd_led>, /* GPIO18 LED PWR red */
-		    <&pinctrl_ephy3_spd_led>; /* GPIO20 LED PWR green */
+&switch0 {
+	dsa,member = <0 0>;
 
-	/* On board variants without USB this LED is not mounted */
-	led_usb_green: led@16 {
-		reg = <16>;
-		active-low;
-		label = "green:usb";
-		default-state = "off";
-	};
+	ports {
+		switch0port4: port@4 {
+			reg = <4>;
+			label = "extsw";
 
-	/*
-	 * LED 18 and 20 drive the same physical LED, the PWR
-	 * LED that can be both red and green.
-	 */
-	led_pwr_red: led@18 {
-		reg = <18>;
-		active-low;
-		label = "red:pwr";
-		default-state = "off";
-	};
+			phy-mode = "rgmii";
 
-	led_pwr_green: led@20 {
-		reg = <20>;
-		active-low;
-		label = "green:pwr";
-		default-state = "off";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
 	};
+};
+
+&uart0 {
+	status = "okay";
+};
 
+&usbh {
+	status = "okay";
 };
diff --git a/target/linux/generic/backport-6.1/020-v6.3-01-UPSTREAM-mm-multi-gen-LRU-rename-lru_gen_struct-to-l.patch b/target/linux/generic/backport-6.1/020-v6.3-01-UPSTREAM-mm-multi-gen-LRU-rename-lru_gen_struct-to-l.patch
index fe32acc985..2428bdcb72 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-01-UPSTREAM-mm-multi-gen-LRU-rename-lru_gen_struct-to-l.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-01-UPSTREAM-mm-multi-gen-LRU-rename-lru_gen_struct-to-l.patch
@@ -294,7 +294,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	struct mem_cgroup *memcg = lruvec_memcg(lruvec);
  
  	VM_WARN_ON_ONCE(!list_empty(list));
-@@ -5249,7 +5249,7 @@ done:
+@@ -5248,7 +5248,7 @@ done:
  
  static bool __maybe_unused state_is_valid(struct lruvec *lruvec)
  {
@@ -303,7 +303,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  	if (lrugen->enabled) {
  		enum lru_list lru;
-@@ -5531,7 +5531,7 @@ static void lru_gen_seq_show_full(struct
+@@ -5530,7 +5530,7 @@ static void lru_gen_seq_show_full(struct
  	int i;
  	int type, tier;
  	int hist = lru_hist_from_seq(seq);
@@ -312,7 +312,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  	for (tier = 0; tier < MAX_NR_TIERS; tier++) {
  		seq_printf(m, "            %10d", tier);
-@@ -5581,7 +5581,7 @@ static int lru_gen_seq_show(struct seq_f
+@@ -5580,7 +5580,7 @@ static int lru_gen_seq_show(struct seq_f
  	unsigned long seq;
  	bool full = !debugfs_real_fops(m->file)->write;
  	struct lruvec *lruvec = v;
@@ -321,7 +321,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	int nid = lruvec_pgdat(lruvec)->node_id;
  	struct mem_cgroup *memcg = lruvec_memcg(lruvec);
  	DEFINE_MAX_SEQ(lruvec);
-@@ -5835,7 +5835,7 @@ void lru_gen_init_lruvec(struct lruvec *
+@@ -5834,7 +5834,7 @@ void lru_gen_init_lruvec(struct lruvec *
  {
  	int i;
  	int gen, type, zone;
diff --git a/target/linux/generic/backport-6.1/020-v6.3-03-UPSTREAM-mm-multi-gen-LRU-remove-eviction-fairness-s.patch b/target/linux/generic/backport-6.1/020-v6.3-03-UPSTREAM-mm-multi-gen-LRU-remove-eviction-fairness-s.patch
index e5ad78b61d..3a27bbcae0 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-03-UPSTREAM-mm-multi-gen-LRU-remove-eviction-fairness-s.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-03-UPSTREAM-mm-multi-gen-LRU-remove-eviction-fairness-s.patch
@@ -76,7 +76,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  {
  	int type;
  	int scanned;
-@@ -5095,9 +5104,6 @@ retry:
+@@ -5094,9 +5103,6 @@ retry:
  		goto retry;
  	}
  
@@ -86,7 +86,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	return scanned;
  }
  
-@@ -5136,67 +5142,26 @@ done:
+@@ -5135,67 +5141,26 @@ done:
  	return min_seq[!can_swap] + MIN_NR_GENS <= max_seq ? nr_to_scan : 0;
  }
  
@@ -163,7 +163,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  	lru_add_drain();
  
-@@ -5220,7 +5185,7 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5219,7 +5184,7 @@ static void lru_gen_shrink_lruvec(struct
  		if (!nr_to_scan)
  			goto done;
  
@@ -172,7 +172,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  		if (!delta)
  			goto done;
  
-@@ -5228,7 +5193,7 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5227,7 +5192,7 @@ static void lru_gen_shrink_lruvec(struct
  		if (scanned >= nr_to_scan)
  			break;
  
@@ -181,7 +181,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  			break;
  
  		cond_resched();
-@@ -5678,7 +5643,7 @@ static int run_eviction(struct lruvec *l
+@@ -5677,7 +5642,7 @@ static int run_eviction(struct lruvec *l
  		if (sc->nr_reclaimed >= nr_to_reclaim)
  			return 0;
  
diff --git a/target/linux/generic/backport-6.1/020-v6.3-04-BACKPORT-mm-multi-gen-LRU-remove-aging-fairness-safe.patch b/target/linux/generic/backport-6.1/020-v6.3-04-BACKPORT-mm-multi-gen-LRU-remove-aging-fairness-safe.patch
index cb349abcdb..8295889554 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-04-BACKPORT-mm-multi-gen-LRU-remove-aging-fairness-safe.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-04-BACKPORT-mm-multi-gen-LRU-remove-aging-fairness-safe.patch
@@ -214,7 +214,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	 */
  	if (mutex_trylock(&oom_lock)) {
  		struct oom_control oc = {
-@@ -5113,33 +5117,27 @@ retry:
+@@ -5112,33 +5116,27 @@ retry:
   *    reclaim.
   */
  static unsigned long get_nr_to_scan(struct lruvec *lruvec, struct scan_control *sc,
@@ -254,7 +254,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  }
  
  static unsigned long get_nr_to_reclaim(struct scan_control *sc)
-@@ -5158,9 +5156,7 @@ static unsigned long get_nr_to_reclaim(s
+@@ -5157,9 +5155,7 @@ static unsigned long get_nr_to_reclaim(s
  static void lru_gen_shrink_lruvec(struct lruvec *lruvec, struct scan_control *sc)
  {
  	struct blk_plug plug;
@@ -264,7 +264,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	unsigned long nr_to_reclaim = get_nr_to_reclaim(sc);
  
  	lru_add_drain();
-@@ -5181,13 +5177,13 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5180,13 +5176,13 @@ static void lru_gen_shrink_lruvec(struct
  		else
  			swappiness = 0;
  
@@ -281,7 +281,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  		scanned += delta;
  		if (scanned >= nr_to_scan)
-@@ -5199,10 +5195,6 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5198,10 +5194,6 @@ static void lru_gen_shrink_lruvec(struct
  		cond_resched();
  	}
  
diff --git a/target/linux/generic/backport-6.1/020-v6.3-05-UPSTREAM-mm-multi-gen-LRU-shuffle-should_run_aging.patch b/target/linux/generic/backport-6.1/020-v6.3-05-UPSTREAM-mm-multi-gen-LRU-shuffle-should_run_aging.patch
index 42caab7c37..6374b425cd 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-05-UPSTREAM-mm-multi-gen-LRU-shuffle-should_run_aging.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-05-UPSTREAM-mm-multi-gen-LRU-shuffle-should_run_aging.patch
@@ -95,7 +95,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  static bool lruvec_is_sizable(struct lruvec *lruvec, struct scan_control *sc)
  {
  	int gen, type, zone;
-@@ -5111,6 +5049,68 @@ retry:
+@@ -5110,6 +5048,68 @@ retry:
  	return scanned;
  }
  
diff --git a/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch b/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch
index 69f52fa403..d089d12dd6 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch
@@ -297,7 +297,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  #endif /* CONFIG_LRU_GEN */
  
-@@ -1219,6 +1330,8 @@ typedef struct pglist_data {
+@@ -1218,6 +1329,8 @@ typedef struct pglist_data {
  #ifdef CONFIG_LRU_GEN
  	/* kswap mm walk data */
  	struct lru_gen_mm_walk	mm_walk;
@@ -361,7 +361,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  static void mem_cgroup_css_free(struct cgroup_subsys_state *css)
 --- a/mm/page_alloc.c
 +++ b/mm/page_alloc.c
-@@ -7945,6 +7945,7 @@ static void __init free_area_init_node(i
+@@ -7956,6 +7956,7 @@ static void __init free_area_init_node(i
  	pgdat_set_deferred_range(pgdat);
  
  	free_area_init_core(pgdat);
@@ -421,7 +421,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	/* check the order to exclude compaction-induced reclaim */
  	if (!min_ttl || sc->order || sc->priority == DEF_PRIORITY)
  		return;
-@@ -5116,8 +5113,7 @@ static bool should_run_aging(struct lruv
+@@ -5115,8 +5112,7 @@ static bool should_run_aging(struct lruv
   * 1. Defer try_to_inc_max_seq() to workqueues to reduce latency for memcg
   *    reclaim.
   */
@@ -431,7 +431,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  {
  	unsigned long nr_to_scan;
  	struct mem_cgroup *memcg = lruvec_memcg(lruvec);
-@@ -5134,10 +5130,8 @@ static unsigned long get_nr_to_scan(stru
+@@ -5133,10 +5129,8 @@ static unsigned long get_nr_to_scan(stru
  	if (sc->priority == DEF_PRIORITY)
  		return nr_to_scan;
  
@@ -443,7 +443,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  }
  
  static unsigned long get_nr_to_reclaim(struct scan_control *sc)
-@@ -5146,29 +5140,18 @@ static unsigned long get_nr_to_reclaim(s
+@@ -5145,29 +5139,18 @@ static unsigned long get_nr_to_reclaim(s
  	if (!global_reclaim(sc))
  		return -1;
  
@@ -475,7 +475,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  		if (sc->may_swap)
  			swappiness = get_swappiness(lruvec, sc);
-@@ -5178,7 +5161,7 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5177,7 +5160,7 @@ static void lru_gen_shrink_lruvec(struct
  			swappiness = 0;
  
  		nr_to_scan = get_nr_to_scan(lruvec, sc, swappiness);
@@ -484,7 +484,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  			break;
  
  		delta = evict_folios(lruvec, sc, swappiness);
-@@ -5195,10 +5178,251 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5194,10 +5177,251 @@ static void lru_gen_shrink_lruvec(struct
  		cond_resched();
  	}
  
@@ -736,7 +736,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  /******************************************************************************
   *                          state change
-@@ -5656,11 +5880,11 @@ static int run_cmd(char cmd, int memcg_i
+@@ -5655,11 +5879,11 @@ static int run_cmd(char cmd, int memcg_i
  
  	if (!mem_cgroup_disabled()) {
  		rcu_read_lock();
@@ -751,7 +751,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  		rcu_read_unlock();
  
  		if (!memcg)
-@@ -5808,6 +6032,19 @@ void lru_gen_init_lruvec(struct lruvec *
+@@ -5807,6 +6031,19 @@ void lru_gen_init_lruvec(struct lruvec *
  }
  
  #ifdef CONFIG_MEMCG
@@ -771,7 +771,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  void lru_gen_init_memcg(struct mem_cgroup *memcg)
  {
  	INIT_LIST_HEAD(&memcg->mm_list.fifo);
-@@ -5831,7 +6068,69 @@ void lru_gen_exit_memcg(struct mem_cgrou
+@@ -5830,7 +6067,69 @@ void lru_gen_exit_memcg(struct mem_cgrou
  		}
  	}
  }
@@ -842,7 +842,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  static int __init init_lru_gen(void)
  {
-@@ -5858,6 +6157,10 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5857,6 +6156,10 @@ static void lru_gen_shrink_lruvec(struct
  {
  }
  
@@ -853,7 +853,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  #endif /* CONFIG_LRU_GEN */
  
  static void shrink_lruvec(struct lruvec *lruvec, struct scan_control *sc)
-@@ -5871,7 +6174,7 @@ static void shrink_lruvec(struct lruvec
+@@ -5870,7 +6173,7 @@ static void shrink_lruvec(struct lruvec
  	bool proportional_reclaim;
  	struct blk_plug plug;
  
@@ -862,7 +862,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  		lru_gen_shrink_lruvec(lruvec, sc);
  		return;
  	}
-@@ -6114,6 +6417,11 @@ static void shrink_node(pg_data_t *pgdat
+@@ -6113,6 +6416,11 @@ static void shrink_node(pg_data_t *pgdat
  	struct lruvec *target_lruvec;
  	bool reclaimable = false;
  
diff --git a/target/linux/generic/backport-6.1/020-v6.3-07-BACKPORT-mm-multi-gen-LRU-clarify-scan_control-flags.patch b/target/linux/generic/backport-6.1/020-v6.3-07-BACKPORT-mm-multi-gen-LRU-clarify-scan_control-flags.patch
index d60ddb9dcc..079f4fd202 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-07-BACKPORT-mm-multi-gen-LRU-clarify-scan_control-flags.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-07-BACKPORT-mm-multi-gen-LRU-clarify-scan_control-flags.patch
@@ -113,7 +113,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	 */
  	return isolated || !remaining ? scanned : 0;
  }
-@@ -5119,8 +5115,7 @@ static long get_nr_to_scan(struct lruvec
+@@ -5118,8 +5114,7 @@ static long get_nr_to_scan(struct lruvec
  	struct mem_cgroup *memcg = lruvec_memcg(lruvec);
  	DEFINE_MAX_SEQ(lruvec);
  
@@ -123,7 +123,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  		return 0;
  
  	if (!should_run_aging(lruvec, max_seq, sc, can_swap, &nr_to_scan))
-@@ -5148,17 +5143,14 @@ static bool try_to_shrink_lruvec(struct
+@@ -5147,17 +5142,14 @@ static bool try_to_shrink_lruvec(struct
  	long nr_to_scan;
  	unsigned long scanned = 0;
  	unsigned long nr_to_reclaim = get_nr_to_reclaim(sc);
@@ -146,7 +146,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  		nr_to_scan = get_nr_to_scan(lruvec, sc, swappiness);
  		if (nr_to_scan <= 0)
-@@ -5289,12 +5281,13 @@ static void lru_gen_shrink_lruvec(struct
+@@ -5288,12 +5280,13 @@ static void lru_gen_shrink_lruvec(struct
  	struct blk_plug plug;
  
  	VM_WARN_ON_ONCE(global_reclaim(sc));
@@ -161,7 +161,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  	if (try_to_shrink_lruvec(lruvec, sc))
  		lru_gen_rotate_memcg(lruvec, MEMCG_LRU_YOUNG);
-@@ -5350,11 +5343,19 @@ static void lru_gen_shrink_node(struct p
+@@ -5349,11 +5342,19 @@ static void lru_gen_shrink_node(struct p
  
  	VM_WARN_ON_ONCE(!global_reclaim(sc));
  
@@ -182,7 +182,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  
  	set_initial_priority(pgdat, sc);
  
-@@ -5372,7 +5373,7 @@ static void lru_gen_shrink_node(struct p
+@@ -5371,7 +5372,7 @@ static void lru_gen_shrink_node(struct p
  	clear_mm_walk();
  
  	blk_finish_plug(&plug);
@@ -191,7 +191,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	/* kswapd should never fail */
  	pgdat->kswapd_failures = 0;
  }
-@@ -5944,7 +5945,7 @@ static ssize_t lru_gen_seq_write(struct
+@@ -5943,7 +5944,7 @@ static ssize_t lru_gen_seq_write(struct
  	set_task_reclaim_state(current, &sc.reclaim_state);
  	flags = memalloc_noreclaim_save();
  	blk_start_plug(&plug);
diff --git a/target/linux/generic/backport-6.1/020-v6.3-09-UPSTREAM-mm-multi-gen-LRU-avoid-futile-retries.patch b/target/linux/generic/backport-6.1/020-v6.3-09-UPSTREAM-mm-multi-gen-LRU-avoid-futile-retries.patch
index c1ad1c538e..2ed3f07bbf 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-09-UPSTREAM-mm-multi-gen-LRU-avoid-futile-retries.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-09-UPSTREAM-mm-multi-gen-LRU-avoid-futile-retries.patch
@@ -29,7 +29,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
 
 --- a/mm/vmscan.c
 +++ b/mm/vmscan.c
-@@ -5218,18 +5218,20 @@ static int shrink_one(struct lruvec *lru
+@@ -5217,18 +5217,20 @@ static int shrink_one(struct lruvec *lru
  
  static void shrink_many(struct pglist_data *pgdat, struct scan_control *sc)
  {
@@ -52,7 +52,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	gen = get_memcg_gen(READ_ONCE(pgdat->memcg_lru.seq));
  
  	rcu_read_lock();
-@@ -5253,14 +5255,22 @@ restart:
+@@ -5252,14 +5254,22 @@ restart:
  
  		op = shrink_one(lruvec, sc);
  
@@ -78,7 +78,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  	/* restart if raced with lru_gen_rotate_memcg() */
  	if (gen != get_nulls_value(pos))
  		goto restart;
-@@ -5269,11 +5279,6 @@ restart:
+@@ -5268,11 +5278,6 @@ restart:
  	bin = get_memcg_bin(bin + 1);
  	if (bin != first_bin)
  		goto restart;
diff --git a/target/linux/generic/backport-6.1/020-v6.3-15-UPSTREAM-mm-multi-gen-LRU-section-for-memcg-LRU.patch b/target/linux/generic/backport-6.1/020-v6.3-15-UPSTREAM-mm-multi-gen-LRU-section-for-memcg-LRU.patch
index 101a0a3757..11c1b43db9 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-15-UPSTREAM-mm-multi-gen-LRU-section-for-memcg-LRU.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-15-UPSTREAM-mm-multi-gen-LRU-section-for-memcg-LRU.patch
@@ -303,7 +303,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
   *                          the eviction
   ******************************************************************************/
  
-@@ -5398,53 +5540,6 @@ done:
+@@ -5397,53 +5539,6 @@ done:
  	pgdat->kswapd_failures = 0;
  }
  
@@ -357,7 +357,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
  /******************************************************************************
   *                          state change
   ******************************************************************************/
-@@ -6090,67 +6185,6 @@ void lru_gen_exit_memcg(struct mem_cgrou
+@@ -6089,67 +6184,6 @@ void lru_gen_exit_memcg(struct mem_cgrou
  	}
  }
  
diff --git a/target/linux/generic/backport-6.1/020-v6.3-16-UPSTREAM-mm-multi-gen-LRU-improve-lru_gen_exit_memcg.patch b/target/linux/generic/backport-6.1/020-v6.3-16-UPSTREAM-mm-multi-gen-LRU-improve-lru_gen_exit_memcg.patch
index 1ee766f861..fcb9708d8a 100644
--- a/target/linux/generic/backport-6.1/020-v6.3-16-UPSTREAM-mm-multi-gen-LRU-improve-lru_gen_exit_memcg.patch
+++ b/target/linux/generic/backport-6.1/020-v6.3-16-UPSTREAM-mm-multi-gen-LRU-improve-lru_gen_exit_memcg.patch
@@ -20,7 +20,7 @@ Signed-off-by: T.J. Mercier <tjmercier@google.com>
 
 --- a/mm/vmscan.c
 +++ b/mm/vmscan.c
-@@ -6172,12 +6172,17 @@ void lru_gen_exit_memcg(struct mem_cgrou
+@@ -6171,12 +6171,17 @@ void lru_gen_exit_memcg(struct mem_cgrou
  	int i;
  	int nid;
  
diff --git a/target/linux/generic/backport-6.1/020-v6.4-19-mm-Multi-gen-LRU-remove-wait_event_killable.patch b/target/linux/generic/backport-6.1/020-v6.4-19-mm-Multi-gen-LRU-remove-wait_event_killable.patch
index 1b0459cdb9..958d459686 100644
--- a/target/linux/generic/backport-6.1/020-v6.4-19-mm-Multi-gen-LRU-remove-wait_event_killable.patch
+++ b/target/linux/generic/backport-6.1/020-v6.4-19-mm-Multi-gen-LRU-remove-wait_event_killable.patch
@@ -255,7 +255,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  }
  
  /******************************************************************************
-@@ -6117,7 +6087,6 @@ void lru_gen_init_lruvec(struct lruvec *
+@@ -6116,7 +6086,6 @@ void lru_gen_init_lruvec(struct lruvec *
  		INIT_LIST_HEAD(&lrugen->folios[gen][type][zone]);
  
  	lruvec->mm_state.seq = MIN_NR_GENS;
@@ -263,7 +263,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  }
  
  #ifdef CONFIG_MEMCG
-@@ -6150,7 +6119,6 @@ void lru_gen_exit_memcg(struct mem_cgrou
+@@ -6149,7 +6118,6 @@ void lru_gen_exit_memcg(struct mem_cgrou
  	for_each_node(nid) {
  		struct lruvec *lruvec = get_lruvec(memcg, nid);
  
diff --git a/target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch b/target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch
deleted file mode 100644
index cc05fa6b75..0000000000
--- a/target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c67d90e058550403a3e6f9b05bfcdcfa12b1815c Mon Sep 17 00:00:00 2001
-From: Vincent Tremblay <vincent@vtremblay.dev>
-Date: Mon, 26 Dec 2022 21:35:48 -0500
-Subject: [PATCH] spidev: Add Silicon Labs EM3581 device compatible
-
-Add compatible string for Silicon Labs EM3581 device.
-
-Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
-Link: https://lore.kernel.org/r/20221227023550.569547-2-vincent@vtremblay.dev
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- drivers/spi/spidev.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/spi/spidev.c
-+++ b/drivers/spi/spidev.c
-@@ -700,6 +700,7 @@ static const struct spi_device_id spidev
- 	{ .name = "m53cpld" },
- 	{ .name = "spi-petra" },
- 	{ .name = "spi-authenta" },
-+	{ .name = "em3581" },
- 	{},
- };
- MODULE_DEVICE_TABLE(spi, spidev_spi_ids);
-@@ -726,6 +727,7 @@ static const struct of_device_id spidev_
- 	{ .compatible = "menlo,m53cpld", .data = &spidev_of_check },
- 	{ .compatible = "cisco,spi-petra", .data = &spidev_of_check },
- 	{ .compatible = "micron,spi-authenta", .data = &spidev_of_check },
-+	{ .compatible = "silabs,em3581", .data = &spidev_of_check },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, spidev_dt_ids);
diff --git a/target/linux/generic/backport-6.1/412-v6.3-02-spidev-Add-Silicon-Labs-SI3210-device-compatible.patch b/target/linux/generic/backport-6.1/412-v6.3-02-spidev-Add-Silicon-Labs-SI3210-device-compatible.patch
index 59d025e087..ffd7bb120a 100644
--- a/target/linux/generic/backport-6.1/412-v6.3-02-spidev-Add-Silicon-Labs-SI3210-device-compatible.patch
+++ b/target/linux/generic/backport-6.1/412-v6.3-02-spidev-Add-Silicon-Labs-SI3210-device-compatible.patch
@@ -22,9 +22,9 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
  	{},
  };
  MODULE_DEVICE_TABLE(spi, spidev_spi_ids);
-@@ -728,6 +729,7 @@ static const struct of_device_id spidev_
- 	{ .compatible = "cisco,spi-petra", .data = &spidev_of_check },
- 	{ .compatible = "micron,spi-authenta", .data = &spidev_of_check },
+@@ -729,6 +730,7 @@ static const struct of_device_id spidev_
+ 	{ .compatible = "rohm,dh2228fv", .data = &spidev_of_check },
+ 	{ .compatible = "semtech,sx1301", .data = &spidev_of_check },
  	{ .compatible = "silabs,em3581", .data = &spidev_of_check },
 +	{ .compatible = "silabs,si3210", .data = &spidev_of_check },
  	{},
diff --git a/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch b/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch
index 36083bbaf5..0afc69fa44 100644
--- a/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch
+++ b/target/linux/generic/backport-6.1/797-6.7-net-dsa-mv88e6xxx-fix-marvell-6350-switch-probing.patch
@@ -51,7 +51,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip)
  {
  	u16 reg, val;
-@@ -4501,7 +4513,7 @@ static const struct mv88e6xxx_ops mv88e6
+@@ -4502,7 +4514,7 @@ static const struct mv88e6xxx_ops mv88e6
  	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
  	.stu_getnext = mv88e6352_g1_stu_getnext,
  	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
@@ -60,7 +60,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  };
  
  static const struct mv88e6xxx_ops mv88e6172_ops = {
-@@ -4604,7 +4616,7 @@ static const struct mv88e6xxx_ops mv88e6
+@@ -4605,7 +4617,7 @@ static const struct mv88e6xxx_ops mv88e6
  	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
  	.stu_getnext = mv88e6352_g1_stu_getnext,
  	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
@@ -69,7 +69,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  };
  
  static const struct mv88e6xxx_ops mv88e6176_ops = {
-@@ -5281,7 +5293,7 @@ static const struct mv88e6xxx_ops mv88e6
+@@ -5282,7 +5294,7 @@ static const struct mv88e6xxx_ops mv88e6
  	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
  	.stu_getnext = mv88e6352_g1_stu_getnext,
  	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
@@ -78,7 +78,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  };
  
  static const struct mv88e6xxx_ops mv88e6351_ops = {
-@@ -5327,7 +5339,7 @@ static const struct mv88e6xxx_ops mv88e6
+@@ -5328,7 +5340,7 @@ static const struct mv88e6xxx_ops mv88e6
  	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
  	.avb_ops = &mv88e6352_avb_ops,
  	.ptp_ops = &mv88e6352_ptp_ops,
diff --git a/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch b/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch
index 70aed850d1..f23504b1d0 100644
--- a/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch
+++ b/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch
@@ -35,7 +35,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  	int current_brightness;
 --- a/include/linux/leds.h
 +++ b/include/linux/leds.h
-@@ -527,6 +527,16 @@ static inline void *led_get_trigger_data
+@@ -525,6 +525,16 @@ led_trigger_get_brightness(const struct
  
  #endif /* CONFIG_LEDS_TRIGGERS */
  
diff --git a/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch b/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch
index 1c564b3897..38989a2a63 100644
--- a/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch
+++ b/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch
@@ -230,7 +230,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		/* base state is ON (link present) */
 --- a/include/linux/leds.h
 +++ b/include/linux/leds.h
-@@ -530,6 +530,9 @@ static inline void *led_get_trigger_data
+@@ -528,6 +528,9 @@ led_trigger_get_brightness(const struct
  /* Trigger specific enum */
  enum led_trigger_netdev_modes {
  	TRIGGER_NETDEV_LINK = 0,
diff --git a/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch b/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch
index a5ab461828..9021326991 100644
--- a/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch
+++ b/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch
@@ -127,7 +127,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		/* base state is ON (link present) */
 --- a/include/linux/leds.h
 +++ b/include/linux/leds.h
-@@ -533,6 +533,8 @@ enum led_trigger_netdev_modes {
+@@ -531,6 +531,8 @@ enum led_trigger_netdev_modes {
  	TRIGGER_NETDEV_LINK_10,
  	TRIGGER_NETDEV_LINK_100,
  	TRIGGER_NETDEV_LINK_1000,
diff --git a/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch b/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch
index cadc70fd73..428b7c9b79 100644
--- a/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch
+++ b/target/linux/generic/backport-6.1/807-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch
@@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -5998,7 +5998,8 @@ static const struct mv88e6xxx_info mv88e
+@@ -5999,7 +5999,8 @@ static const struct mv88e6xxx_info mv88e
  		.name = "Marvell 88E6191X",
  		.num_databases = 4096,
  		.num_ports = 11,	/* 10 + Z80 */
@@ -30,7 +30,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		.max_vid = 8191,
  		.max_sid = 63,
  		.port_base_addr = 0x0,
-@@ -6021,7 +6022,8 @@ static const struct mv88e6xxx_info mv88e
+@@ -6022,7 +6023,8 @@ static const struct mv88e6xxx_info mv88e
  		.name = "Marvell 88E6193X",
  		.num_databases = 4096,
  		.num_ports = 11,	/* 10 + Z80 */
@@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		.max_vid = 8191,
  		.max_sid = 63,
  		.port_base_addr = 0x0,
-@@ -6340,7 +6342,8 @@ static const struct mv88e6xxx_info mv88e
+@@ -6341,7 +6343,8 @@ static const struct mv88e6xxx_info mv88e
  		.name = "Marvell 88E6393X",
  		.num_databases = 4096,
  		.num_ports = 11,	/* 10 + Z80 */
diff --git a/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch b/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch
index 471e6a3903..9a294b59fc 100644
--- a/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch
+++ b/target/linux/generic/backport-6.1/807-v6.5-06-net-dsa-mv88e6xxx-enable-support-for-88E6361-switch.patch
@@ -58,7 +58,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		}
  	}
  
-@@ -6285,6 +6291,32 @@ static const struct mv88e6xxx_info mv88e
+@@ -6286,6 +6292,32 @@ static const struct mv88e6xxx_info mv88e
  		.ptp_support = true,
  		.ops = &mv88e6352_ops,
  	},
diff --git a/target/linux/generic/backport-6.1/809-v6.3-0001-nvmem-core-remove-spurious-white-space.patch b/target/linux/generic/backport-6.1/809-v6.3-0001-nvmem-core-remove-spurious-white-space.patch
index 01400fd490..9eec0bc48f 100644
--- a/target/linux/generic/backport-6.1/809-v6.3-0001-nvmem-core-remove-spurious-white-space.patch
+++ b/target/linux/generic/backport-6.1/809-v6.3-0001-nvmem-core-remove-spurious-white-space.patch
@@ -15,7 +15,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -764,7 +764,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -763,7 +763,7 @@ struct nvmem_device *nvmem_register(cons
  	if (!nvmem)
  		return ERR_PTR(-ENOMEM);
  
diff --git a/target/linux/generic/backport-6.1/809-v6.3-0002-nvmem-core-add-an-index-parameter-to-the-cell.patch b/target/linux/generic/backport-6.1/809-v6.3-0002-nvmem-core-add-an-index-parameter-to-the-cell.patch
index 454d3bf0ed..84ee69b815 100644
--- a/target/linux/generic/backport-6.1/809-v6.3-0002-nvmem-core-add-an-index-parameter-to-the-cell.patch
+++ b/target/linux/generic/backport-6.1/809-v6.3-0002-nvmem-core-add-an-index-parameter-to-the-cell.patch
@@ -47,7 +47,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  };
  
  static DEFINE_MUTEX(nvmem_mutex);
-@@ -1122,7 +1123,8 @@ struct nvmem_device *devm_nvmem_device_g
+@@ -1121,7 +1122,8 @@ struct nvmem_device *devm_nvmem_device_g
  }
  EXPORT_SYMBOL_GPL(devm_nvmem_device_get);
  
@@ -57,7 +57,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  {
  	struct nvmem_cell *cell;
  	const char *name = NULL;
-@@ -1141,6 +1143,7 @@ static struct nvmem_cell *nvmem_create_c
+@@ -1140,6 +1142,7 @@ static struct nvmem_cell *nvmem_create_c
  
  	cell->id = name;
  	cell->entry = entry;
@@ -65,7 +65,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	return cell;
  }
-@@ -1179,7 +1182,7 @@ nvmem_cell_get_from_lookup(struct device
+@@ -1178,7 +1181,7 @@ nvmem_cell_get_from_lookup(struct device
  				__nvmem_device_put(nvmem);
  				cell = ERR_PTR(-ENOENT);
  			} else {
@@ -74,7 +74,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  				if (IS_ERR(cell))
  					__nvmem_device_put(nvmem);
  			}
-@@ -1227,15 +1230,27 @@ struct nvmem_cell *of_nvmem_cell_get(str
+@@ -1226,15 +1229,27 @@ struct nvmem_cell *of_nvmem_cell_get(str
  	struct nvmem_device *nvmem;
  	struct nvmem_cell_entry *cell_entry;
  	struct nvmem_cell *cell;
@@ -105,7 +105,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	nvmem_np = of_get_parent(cell_np);
  	if (!nvmem_np) {
-@@ -1257,7 +1272,7 @@ struct nvmem_cell *of_nvmem_cell_get(str
+@@ -1256,7 +1271,7 @@ struct nvmem_cell *of_nvmem_cell_get(str
  		return ERR_PTR(-ENOENT);
  	}
  
@@ -114,7 +114,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (IS_ERR(cell))
  		__nvmem_device_put(nvmem);
  
-@@ -1410,8 +1425,8 @@ static void nvmem_shift_read_buffer_in_p
+@@ -1409,8 +1424,8 @@ static void nvmem_shift_read_buffer_in_p
  }
  
  static int __nvmem_cell_read(struct nvmem_device *nvmem,
@@ -125,7 +125,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  {
  	int rc;
  
-@@ -1425,7 +1440,7 @@ static int __nvmem_cell_read(struct nvme
+@@ -1424,7 +1439,7 @@ static int __nvmem_cell_read(struct nvme
  		nvmem_shift_read_buffer_in_place(cell, buf);
  
  	if (nvmem->cell_post_process) {
@@ -134,7 +134,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  					      cell->offset, buf, cell->bytes);
  		if (rc)
  			return rc;
-@@ -1460,7 +1475,7 @@ void *nvmem_cell_read(struct nvmem_cell
+@@ -1459,7 +1474,7 @@ void *nvmem_cell_read(struct nvmem_cell
  	if (!buf)
  		return ERR_PTR(-ENOMEM);
  
@@ -143,7 +143,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (rc) {
  		kfree(buf);
  		return ERR_PTR(rc);
-@@ -1773,7 +1788,7 @@ ssize_t nvmem_device_cell_read(struct nv
+@@ -1772,7 +1787,7 @@ ssize_t nvmem_device_cell_read(struct nv
  	if (rc)
  		return rc;
  
diff --git a/target/linux/generic/backport-6.1/809-v6.3-0004-nvmem-core-drop-the-removal-of-the-cells-in-nvmem_ad.patch b/target/linux/generic/backport-6.1/809-v6.3-0004-nvmem-core-drop-the-removal-of-the-cells-in-nvmem_ad.patch
index 8f996eab34..b20c500e7c 100644
--- a/target/linux/generic/backport-6.1/809-v6.3-0004-nvmem-core-drop-the-removal-of-the-cells-in-nvmem_ad.patch
+++ b/target/linux/generic/backport-6.1/809-v6.3-0004-nvmem-core-drop-the-removal-of-the-cells-in-nvmem_ad.patch
@@ -22,7 +22,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -515,7 +515,7 @@ static int nvmem_add_cells(struct nvmem_
+@@ -514,7 +514,7 @@ static int nvmem_add_cells(struct nvmem_
  		    int ncells)
  {
  	struct nvmem_cell_entry **cells;
@@ -31,7 +31,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	cells = kcalloc(ncells, sizeof(*cells), GFP_KERNEL);
  	if (!cells)
-@@ -525,28 +525,22 @@ static int nvmem_add_cells(struct nvmem_
+@@ -524,28 +524,22 @@ static int nvmem_add_cells(struct nvmem_
  		cells[i] = kzalloc(sizeof(**cells), GFP_KERNEL);
  		if (!cells[i]) {
  			rval = -ENOMEM;
diff --git a/target/linux/generic/backport-6.1/809-v6.3-0005-nvmem-core-add-nvmem_add_one_cell.patch b/target/linux/generic/backport-6.1/809-v6.3-0005-nvmem-core-add-nvmem_add_one_cell.patch
index 711ce229b2..df4a02b8c5 100644
--- a/target/linux/generic/backport-6.1/809-v6.3-0005-nvmem-core-add-nvmem_add_one_cell.patch
+++ b/target/linux/generic/backport-6.1/809-v6.3-0005-nvmem-core-add-nvmem_add_one_cell.patch
@@ -19,7 +19,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -502,6 +502,36 @@ static int nvmem_cell_info_to_nvmem_cell
+@@ -501,6 +501,36 @@ static int nvmem_cell_info_to_nvmem_cell
  }
  
  /**
@@ -56,7 +56,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
   * nvmem_add_cells() - Add cell information to an nvmem device
   *
   * @nvmem: nvmem device to add cells to.
-@@ -514,34 +544,15 @@ static int nvmem_add_cells(struct nvmem_
+@@ -513,34 +543,15 @@ static int nvmem_add_cells(struct nvmem_
  		    const struct nvmem_cell_info *info,
  		    int ncells)
  {
diff --git a/target/linux/generic/backport-6.1/809-v6.3-0006-nvmem-core-use-nvmem_add_one_cell-in-nvmem_add_cells.patch b/target/linux/generic/backport-6.1/809-v6.3-0006-nvmem-core-use-nvmem_add_one_cell-in-nvmem_add_cells.patch
index e1791e5c83..1b4a3f3ef3 100644
--- a/target/linux/generic/backport-6.1/809-v6.3-0006-nvmem-core-use-nvmem_add_one_cell-in-nvmem_add_cells.patch
+++ b/target/linux/generic/backport-6.1/809-v6.3-0006-nvmem-core-use-nvmem_add_one_cell-in-nvmem_add_cells.patch
@@ -19,7 +19,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -688,15 +688,14 @@ static int nvmem_validate_keepouts(struc
+@@ -687,15 +687,14 @@ static int nvmem_validate_keepouts(struc
  
  static int nvmem_add_cells_from_of(struct nvmem_device *nvmem)
  {
@@ -39,7 +39,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  		addr = of_get_property(child, "reg", &len);
  		if (!addr)
  			continue;
-@@ -706,40 +705,24 @@ static int nvmem_add_cells_from_of(struc
+@@ -705,40 +704,24 @@ static int nvmem_add_cells_from_of(struc
  			return -EINVAL;
  		}
  
diff --git a/target/linux/generic/backport-6.1/810-v6.3-i915-Move-list_count-to-list.h-as-list_count_nodes-f.patch b/target/linux/generic/backport-6.1/810-v6.3-i915-Move-list_count-to-list.h-as-list_count_nodes-f.patch
index 5c4206da14..998e453443 100644
--- a/target/linux/generic/backport-6.1/810-v6.3-i915-Move-list_count-to-list.h-as-list_count_nodes-f.patch
+++ b/target/linux/generic/backport-6.1/810-v6.3-i915-Move-list_count-to-list.h-as-list_count_nodes-f.patch
@@ -20,7 +20,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
 +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
-@@ -4157,17 +4157,6 @@ void intel_execlists_show_requests(struc
+@@ -4153,17 +4153,6 @@ void intel_execlists_show_requests(struc
  	spin_unlock_irqrestore(&sched_engine->lock, flags);
  }
  
@@ -38,7 +38,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  void intel_execlists_dump_active_requests(struct intel_engine_cs *engine,
  					  struct i915_request *hung_rq,
  					  struct drm_printer *m)
-@@ -4178,8 +4167,8 @@ void intel_execlists_dump_active_request
+@@ -4174,8 +4163,8 @@ void intel_execlists_dump_active_request
  
  	intel_engine_dump_active_requests(&engine->sched_engine->requests, hung_rq, m);
  
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0002-nvmem-core-introduce-NVMEM-layouts.patch b/target/linux/generic/backport-6.1/811-v6.4-0002-nvmem-core-introduce-NVMEM-layouts.patch
index 94cd23c18a..77d2af7269 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0002-nvmem-core-introduce-NVMEM-layouts.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0002-nvmem-core-introduce-NVMEM-layouts.patch
@@ -103,7 +103,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  static int __nvmem_reg_read(struct nvmem_device *nvmem, unsigned int offset,
  			    void *val, size_t bytes)
  {
-@@ -728,6 +732,101 @@ static int nvmem_add_cells_from_of(struc
+@@ -727,6 +731,101 @@ static int nvmem_add_cells_from_of(struc
  	return 0;
  }
  
@@ -205,7 +205,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  /**
   * nvmem_register() - Register a nvmem device for given nvmem_config.
   * Also creates a binary entry in /sys/bus/nvmem/devices/dev-name/nvmem
-@@ -834,6 +933,12 @@ struct nvmem_device *nvmem_register(cons
+@@ -833,6 +932,12 @@ struct nvmem_device *nvmem_register(cons
  			goto err_put_device;
  	}
  
@@ -218,7 +218,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (config->cells) {
  		rval = nvmem_add_cells(nvmem, config->cells, config->ncells);
  		if (rval)
-@@ -854,12 +959,17 @@ struct nvmem_device *nvmem_register(cons
+@@ -853,12 +958,17 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
@@ -236,7 +236,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (config->compat)
  		nvmem_sysfs_remove_compat(nvmem, config);
  err_put_device:
-@@ -881,6 +991,7 @@ static void nvmem_device_release(struct
+@@ -880,6 +990,7 @@ static void nvmem_device_release(struct
  		device_remove_bin_file(nvmem->base_dev, &nvmem->eeprom);
  
  	nvmem_device_remove_all_cells(nvmem);
@@ -244,7 +244,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	device_unregister(&nvmem->dev);
  }
  
-@@ -1246,6 +1357,15 @@ struct nvmem_cell *of_nvmem_cell_get(str
+@@ -1245,6 +1356,15 @@ struct nvmem_cell *of_nvmem_cell_get(str
  		return ERR_PTR(-EINVAL);
  	}
  
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0003-nvmem-core-handle-the-absence-of-expected-layouts.patch b/target/linux/generic/backport-6.1/811-v6.4-0003-nvmem-core-handle-the-absence-of-expected-layouts.patch
index 6fa7b6382d..40ce320b6e 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0003-nvmem-core-handle-the-absence-of-expected-layouts.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0003-nvmem-core-handle-the-absence-of-expected-layouts.patch
@@ -28,7 +28,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -755,7 +755,7 @@ EXPORT_SYMBOL_GPL(nvmem_layout_unregiste
+@@ -754,7 +754,7 @@ EXPORT_SYMBOL_GPL(nvmem_layout_unregiste
  static struct nvmem_layout *nvmem_layout_get(struct nvmem_device *nvmem)
  {
  	struct device_node *layout_np, *np = nvmem->dev.of_node;
@@ -37,7 +37,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	layout_np = of_get_child_by_name(np, "nvmem-layout");
  	if (!layout_np)
-@@ -938,6 +938,13 @@ struct nvmem_device *nvmem_register(cons
+@@ -937,6 +937,13 @@ struct nvmem_device *nvmem_register(cons
  	 * pointer will be NULL and nvmem_layout_put() will be a noop.
  	 */
  	nvmem->layout = config->layout ?: nvmem_layout_get(nvmem);
@@ -51,7 +51,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	if (config->cells) {
  		rval = nvmem_add_cells(nvmem, config->cells, config->ncells);
-@@ -970,6 +977,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -969,6 +976,7 @@ struct nvmem_device *nvmem_register(cons
  err_remove_cells:
  	nvmem_device_remove_all_cells(nvmem);
  	nvmem_layout_put(nvmem->layout);
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0004-nvmem-core-request-layout-modules-loading.patch b/target/linux/generic/backport-6.1/811-v6.4-0004-nvmem-core-request-layout-modules-loading.patch
index b9341666f9..13712d76c6 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0004-nvmem-core-request-layout-modules-loading.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0004-nvmem-core-request-layout-modules-loading.patch
@@ -36,7 +36,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  #include <linux/slab.h>
  
  struct nvmem_device {
-@@ -761,6 +762,13 @@ static struct nvmem_layout *nvmem_layout
+@@ -760,6 +761,13 @@ static struct nvmem_layout *nvmem_layout
  	if (!layout_np)
  		return NULL;
  
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0005-nvmem-core-add-per-cell-post-processing.patch b/target/linux/generic/backport-6.1/811-v6.4-0005-nvmem-core-add-per-cell-post-processing.patch
index 53628cd4e4..50f3504132 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0005-nvmem-core-add-per-cell-post-processing.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0005-nvmem-core-add-per-cell-post-processing.patch
@@ -28,7 +28,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	struct device_node	*np;
  	struct nvmem_device	*nvmem;
  	struct list_head	node;
-@@ -470,6 +471,7 @@ static int nvmem_cell_info_to_nvmem_cell
+@@ -469,6 +470,7 @@ static int nvmem_cell_info_to_nvmem_cell
  	cell->offset = info->offset;
  	cell->bytes = info->bytes;
  	cell->name = info->name;
@@ -36,7 +36,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	cell->bit_offset = info->bit_offset;
  	cell->nbits = info->nbits;
-@@ -1563,6 +1565,13 @@ static int __nvmem_cell_read(struct nvme
+@@ -1562,6 +1564,13 @@ static int __nvmem_cell_read(struct nvme
  	if (cell->bit_offset || cell->nbits)
  		nvmem_shift_read_buffer_in_place(cell, buf);
  
@@ -50,7 +50,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (nvmem->cell_post_process) {
  		rc = nvmem->cell_post_process(nvmem->priv, id, index,
  					      cell->offset, buf, cell->bytes);
-@@ -1671,6 +1680,14 @@ static int __nvmem_cell_entry_write(stru
+@@ -1670,6 +1679,14 @@ static int __nvmem_cell_entry_write(stru
  	    (cell->bit_offset == 0 && len != cell->bytes))
  		return -EINVAL;
  
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0006-nvmem-core-allow-to-modify-a-cell-before-adding-it.patch b/target/linux/generic/backport-6.1/811-v6.4-0006-nvmem-core-allow-to-modify-a-cell-before-adding-it.patch
index 32990148c8..1b77992a2b 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0006-nvmem-core-allow-to-modify-a-cell-before-adding-it.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0006-nvmem-core-allow-to-modify-a-cell-before-adding-it.patch
@@ -18,7 +18,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -695,6 +695,7 @@ static int nvmem_validate_keepouts(struc
+@@ -694,6 +694,7 @@ static int nvmem_validate_keepouts(struc
  
  static int nvmem_add_cells_from_of(struct nvmem_device *nvmem)
  {
@@ -26,7 +26,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	struct device *dev = &nvmem->dev;
  	struct device_node *child;
  	const __be32 *addr;
-@@ -724,6 +725,9 @@ static int nvmem_add_cells_from_of(struc
+@@ -723,6 +724,9 @@ static int nvmem_add_cells_from_of(struc
  
  		info.np = of_node_get(child);
  
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0008-nvmem-cell-drop-global-cell_post_process.patch b/target/linux/generic/backport-6.1/811-v6.4-0008-nvmem-cell-drop-global-cell_post_process.patch
index eac202b882..e6f4be261c 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0008-nvmem-cell-drop-global-cell_post_process.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0008-nvmem-cell-drop-global-cell_post_process.patch
@@ -26,7 +26,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	struct gpio_desc	*wp_gpio;
  	struct nvmem_layout	*layout;
  	void *priv;
-@@ -903,7 +902,6 @@ struct nvmem_device *nvmem_register(cons
+@@ -902,7 +901,6 @@ struct nvmem_device *nvmem_register(cons
  	nvmem->type = config->type;
  	nvmem->reg_read = config->reg_read;
  	nvmem->reg_write = config->reg_write;
@@ -34,7 +34,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	nvmem->keepout = config->keepout;
  	nvmem->nkeepout = config->nkeepout;
  	if (config->of_node)
-@@ -1575,13 +1573,6 @@ static int __nvmem_cell_read(struct nvme
+@@ -1574,13 +1572,6 @@ static int __nvmem_cell_read(struct nvme
  		if (rc)
  			return rc;
  	}
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0009-nvmem-core-provide-own-priv-pointer-in-post-process-.patch b/target/linux/generic/backport-6.1/811-v6.4-0009-nvmem-core-provide-own-priv-pointer-in-post-process-.patch
index 46b30a2ed9..b39626f6e7 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0009-nvmem-core-provide-own-priv-pointer-in-post-process-.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0009-nvmem-core-provide-own-priv-pointer-in-post-process-.patch
@@ -29,7 +29,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	struct device_node	*np;
  	struct nvmem_device	*nvmem;
  	struct list_head	node;
-@@ -471,6 +472,7 @@ static int nvmem_cell_info_to_nvmem_cell
+@@ -470,6 +471,7 @@ static int nvmem_cell_info_to_nvmem_cell
  	cell->bytes = info->bytes;
  	cell->name = info->name;
  	cell->read_post_process = info->read_post_process;
@@ -37,7 +37,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	cell->bit_offset = info->bit_offset;
  	cell->nbits = info->nbits;
-@@ -1568,7 +1570,7 @@ static int __nvmem_cell_read(struct nvme
+@@ -1567,7 +1569,7 @@ static int __nvmem_cell_read(struct nvme
  		nvmem_shift_read_buffer_in_place(cell, buf);
  
  	if (cell->read_post_process) {
diff --git a/target/linux/generic/backport-6.1/811-v6.4-0017-nvmem-core-support-specifying-both-cell-raw-data-pos.patch b/target/linux/generic/backport-6.1/811-v6.4-0017-nvmem-core-support-specifying-both-cell-raw-data-pos.patch
index eeb407e9bb..a1ebd53d07 100644
--- a/target/linux/generic/backport-6.1/811-v6.4-0017-nvmem-core-support-specifying-both-cell-raw-data-pos.patch
+++ b/target/linux/generic/backport-6.1/811-v6.4-0017-nvmem-core-support-specifying-both-cell-raw-data-pos.patch
@@ -51,7 +51,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	int			bytes;
  	int			bit_offset;
  	int			nbits;
-@@ -469,6 +470,7 @@ static int nvmem_cell_info_to_nvmem_cell
+@@ -468,6 +469,7 @@ static int nvmem_cell_info_to_nvmem_cell
  {
  	cell->nvmem = nvmem;
  	cell->offset = info->offset;
@@ -59,7 +59,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	cell->bytes = info->bytes;
  	cell->name = info->name;
  	cell->read_post_process = info->read_post_process;
-@@ -1560,7 +1562,7 @@ static int __nvmem_cell_read(struct nvme
+@@ -1559,7 +1561,7 @@ static int __nvmem_cell_read(struct nvme
  {
  	int rc;
  
@@ -68,7 +68,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	if (rc)
  		return rc;
-@@ -1571,7 +1573,7 @@ static int __nvmem_cell_read(struct nvme
+@@ -1570,7 +1572,7 @@ static int __nvmem_cell_read(struct nvme
  
  	if (cell->read_post_process) {
  		rc = cell->read_post_process(cell->priv, id, index,
@@ -77,7 +77,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  		if (rc)
  			return rc;
  	}
-@@ -1594,14 +1596,15 @@ static int __nvmem_cell_read(struct nvme
+@@ -1593,14 +1595,15 @@ static int __nvmem_cell_read(struct nvme
   */
  void *nvmem_cell_read(struct nvmem_cell *cell, size_t *len)
  {
diff --git a/target/linux/generic/backport-6.1/813-v6.5-0011-nvmem-core-add-support-for-fixed-cells-layout.patch b/target/linux/generic/backport-6.1/813-v6.5-0011-nvmem-core-add-support-for-fixed-cells-layout.patch
index 59b2f9fa2c..3b4654822a 100644
--- a/target/linux/generic/backport-6.1/813-v6.5-0011-nvmem-core-add-support-for-fixed-cells-layout.patch
+++ b/target/linux/generic/backport-6.1/813-v6.5-0011-nvmem-core-add-support-for-fixed-cells-layout.patch
@@ -27,7 +27,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -696,7 +696,7 @@ static int nvmem_validate_keepouts(struc
+@@ -695,7 +695,7 @@ static int nvmem_validate_keepouts(struc
  	return 0;
  }
  
@@ -36,7 +36,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  {
  	struct nvmem_layout *layout = nvmem->layout;
  	struct device *dev = &nvmem->dev;
-@@ -704,7 +704,7 @@ static int nvmem_add_cells_from_of(struc
+@@ -703,7 +703,7 @@ static int nvmem_add_cells_from_of(struc
  	const __be32 *addr;
  	int len, ret;
  
@@ -45,7 +45,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  		struct nvmem_cell_info info = {0};
  
  		addr = of_get_property(child, "reg", &len);
-@@ -742,6 +742,28 @@ static int nvmem_add_cells_from_of(struc
+@@ -741,6 +741,28 @@ static int nvmem_add_cells_from_of(struc
  	return 0;
  }
  
@@ -74,7 +74,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  int __nvmem_layout_register(struct nvmem_layout *layout, struct module *owner)
  {
  	layout->owner = owner;
-@@ -972,7 +994,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -971,7 +993,7 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
@@ -83,7 +83,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (rval)
  		goto err_remove_cells;
  
-@@ -982,6 +1004,10 @@ struct nvmem_device *nvmem_register(cons
+@@ -981,6 +1003,10 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
diff --git a/target/linux/generic/backport-6.1/814-v6.6-0014-nvmem-core-Create-all-cells-before-adding-the-nvmem-.patch b/target/linux/generic/backport-6.1/814-v6.6-0014-nvmem-core-Create-all-cells-before-adding-the-nvmem-.patch
index f9532f39c3..990ce8ecf1 100644
--- a/target/linux/generic/backport-6.1/814-v6.6-0014-nvmem-core-Create-all-cells-before-adding-the-nvmem-.patch
+++ b/target/linux/generic/backport-6.1/814-v6.6-0014-nvmem-core-Create-all-cells-before-adding-the-nvmem-.patch
@@ -15,7 +15,7 @@ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -998,17 +998,17 @@ struct nvmem_device *nvmem_register(cons
+@@ -997,17 +997,17 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
diff --git a/target/linux/generic/backport-6.1/814-v6.6-0016-nvmem-core-Do-not-open-code-existing-functions.patch b/target/linux/generic/backport-6.1/814-v6.6-0016-nvmem-core-Do-not-open-code-existing-functions.patch
index 28d8bba194..4ebf229695 100644
--- a/target/linux/generic/backport-6.1/814-v6.6-0016-nvmem-core-Do-not-open-code-existing-functions.patch
+++ b/target/linux/generic/backport-6.1/814-v6.6-0016-nvmem-core-Do-not-open-code-existing-functions.patch
@@ -14,7 +14,7 @@ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -786,10 +786,10 @@ EXPORT_SYMBOL_GPL(nvmem_layout_unregiste
+@@ -785,10 +785,10 @@ EXPORT_SYMBOL_GPL(nvmem_layout_unregiste
  
  static struct nvmem_layout *nvmem_layout_get(struct nvmem_device *nvmem)
  {
diff --git a/target/linux/generic/backport-6.1/814-v6.6-0017-nvmem-core-Notify-when-a-new-layout-is-registered.patch b/target/linux/generic/backport-6.1/814-v6.6-0017-nvmem-core-Notify-when-a-new-layout-is-registered.patch
index b62a0e18da..6803397d60 100644
--- a/target/linux/generic/backport-6.1/814-v6.6-0017-nvmem-core-Notify-when-a-new-layout-is-registered.patch
+++ b/target/linux/generic/backport-6.1/814-v6.6-0017-nvmem-core-Notify-when-a-new-layout-is-registered.patch
@@ -14,7 +14,7 @@ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -772,12 +772,16 @@ int __nvmem_layout_register(struct nvmem
+@@ -771,12 +771,16 @@ int __nvmem_layout_register(struct nvmem
  	list_add(&layout->node, &nvmem_layouts);
  	spin_unlock(&nvmem_layout_lock);
  
diff --git a/target/linux/generic/backport-6.1/816-v6.7-0002-nvmem-add-explicit-config-option-to-read-old-syntax-.patch b/target/linux/generic/backport-6.1/816-v6.7-0002-nvmem-add-explicit-config-option-to-read-old-syntax-.patch
index be293e6f2a..547122ae48 100644
--- a/target/linux/generic/backport-6.1/816-v6.7-0002-nvmem-add-explicit-config-option-to-read-old-syntax-.patch
+++ b/target/linux/generic/backport-6.1/816-v6.7-0002-nvmem-add-explicit-config-option-to-read-old-syntax-.patch
@@ -95,7 +95,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  		.stride = sizeof(u32),
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -998,9 +998,11 @@ struct nvmem_device *nvmem_register(cons
+@@ -997,9 +997,11 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
@@ -132,7 +132,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	imx_ocotp_nvmem_config.priv = priv;
 --- a/drivers/nvmem/meson-efuse.c
 +++ b/drivers/nvmem/meson-efuse.c
-@@ -74,6 +74,7 @@ static int meson_efuse_probe(struct plat
+@@ -80,6 +80,7 @@ static int meson_efuse_probe(struct plat
  
  	econfig->dev = dev;
  	econfig->name = dev_name(dev);
diff --git a/target/linux/generic/backport-6.1/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch b/target/linux/generic/backport-6.1/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch
index 7d80ad37f1..1ed7c43332 100644
--- a/target/linux/generic/backport-6.1/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch
+++ b/target/linux/generic/backport-6.1/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch
@@ -48,7 +48,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	mtd->nvmem = nvmem_register(&config);
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -936,7 +936,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -935,7 +935,7 @@ struct nvmem_device *nvmem_register(cons
  	nvmem->nkeepout = config->nkeepout;
  	if (config->of_node)
  		nvmem->dev.of_node = config->of_node;
diff --git a/target/linux/generic/backport-6.1/816-v6.7-0005-nvmem-Do-not-expect-fixed-layouts-to-grab-a-layout-d.patch b/target/linux/generic/backport-6.1/816-v6.7-0005-nvmem-Do-not-expect-fixed-layouts-to-grab-a-layout-d.patch
index bd5ceaabf7..65b8878310 100644
--- a/target/linux/generic/backport-6.1/816-v6.7-0005-nvmem-Do-not-expect-fixed-layouts-to-grab-a-layout-d.patch
+++ b/target/linux/generic/backport-6.1/816-v6.7-0005-nvmem-Do-not-expect-fixed-layouts-to-grab-a-layout-d.patch
@@ -30,7 +30,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -797,6 +797,12 @@ static struct nvmem_layout *nvmem_layout
+@@ -796,6 +796,12 @@ static struct nvmem_layout *nvmem_layout
  	if (!layout_np)
  		return NULL;
  
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch b/target/linux/generic/backport-6.1/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch
index 2093fac8a1..59175c8051 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch
@@ -25,7 +25,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -848,14 +848,6 @@ static int nvmem_add_cells_from_layout(s
+@@ -847,14 +847,6 @@ static int nvmem_add_cells_from_layout(s
  }
  
  #if IS_ENABLED(CONFIG_OF)
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch b/target/linux/generic/backport-6.1/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch
index db2d8c1b46..1f39dfea2f 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch
@@ -20,7 +20,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -817,7 +817,7 @@ static int nvmem_add_cells_from_layout(s
+@@ -816,7 +816,7 @@ static int nvmem_add_cells_from_layout(s
  	int ret;
  
  	if (layout && layout->add_cells) {
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch b/target/linux/generic/backport-6.1/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch
index 65aa37f834..c2968f2c67 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch
@@ -25,7 +25,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -676,7 +676,6 @@ static int nvmem_validate_keepouts(struc
+@@ -675,7 +675,6 @@ static int nvmem_validate_keepouts(struc
  
  static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_node *np)
  {
@@ -33,7 +33,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	struct device *dev = &nvmem->dev;
  	struct device_node *child;
  	const __be32 *addr;
-@@ -706,8 +705,8 @@ static int nvmem_add_cells_from_dt(struc
+@@ -705,8 +704,8 @@ static int nvmem_add_cells_from_dt(struc
  
  		info.np = of_node_get(child);
  
@@ -44,7 +44,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  		ret = nvmem_add_one_cell(nvmem, &info);
  		kfree(info.name);
-@@ -896,6 +895,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -895,6 +894,7 @@ struct nvmem_device *nvmem_register(cons
  
  	kref_init(&nvmem->refcnt);
  	INIT_LIST_HEAD(&nvmem->cells);
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch b/target/linux/generic/backport-6.1/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch
index 1881332340..9a19dc4452 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch
@@ -84,7 +84,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  static int __nvmem_reg_read(struct nvmem_device *nvmem, unsigned int offset,
  			    void *val, size_t bytes)
  {
-@@ -741,97 +738,22 @@ static int nvmem_add_cells_from_fixed_la
+@@ -740,97 +737,22 @@ static int nvmem_add_cells_from_fixed_la
  	return err;
  }
  
@@ -189,7 +189,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  const void *nvmem_layout_get_match_data(struct nvmem_device *nvmem,
  					struct nvmem_layout *layout)
  {
-@@ -839,7 +761,7 @@ const void *nvmem_layout_get_match_data(
+@@ -838,7 +760,7 @@ const void *nvmem_layout_get_match_data(
  	const struct of_device_id *match;
  
  	layout_np = of_nvmem_layout_get_container(nvmem);
@@ -198,7 +198,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	return match ? match->data : NULL;
  }
-@@ -951,19 +873,6 @@ struct nvmem_device *nvmem_register(cons
+@@ -950,19 +872,6 @@ struct nvmem_device *nvmem_register(cons
  			goto err_put_device;
  	}
  
@@ -218,7 +218,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (config->cells) {
  		rval = nvmem_add_cells(nvmem, config->cells, config->ncells);
  		if (rval)
-@@ -984,24 +893,24 @@ struct nvmem_device *nvmem_register(cons
+@@ -983,24 +892,24 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
@@ -249,7 +249,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (config->compat)
  		nvmem_sysfs_remove_compat(nvmem, config);
  err_put_device:
-@@ -1023,7 +932,7 @@ static void nvmem_device_release(struct
+@@ -1022,7 +931,7 @@ static void nvmem_device_release(struct
  		device_remove_bin_file(nvmem->base_dev, &nvmem->eeprom);
  
  	nvmem_device_remove_all_cells(nvmem);
@@ -258,7 +258,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	device_unregister(&nvmem->dev);
  }
  
-@@ -1325,6 +1234,12 @@ nvmem_cell_get_from_lookup(struct device
+@@ -1324,6 +1233,12 @@ nvmem_cell_get_from_lookup(struct device
  	return cell;
  }
  
@@ -271,7 +271,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  #if IS_ENABLED(CONFIG_OF)
  static struct nvmem_cell_entry *
  nvmem_find_cell_entry_by_node(struct nvmem_device *nvmem, struct device_node *np)
-@@ -1343,6 +1258,18 @@ nvmem_find_cell_entry_by_node(struct nvm
+@@ -1342,6 +1257,18 @@ nvmem_find_cell_entry_by_node(struct nvm
  	return cell;
  }
  
@@ -290,7 +290,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  /**
   * of_nvmem_cell_get() - Get a nvmem cell from given device node and cell id
   *
-@@ -1405,16 +1332,29 @@ struct nvmem_cell *of_nvmem_cell_get(str
+@@ -1404,16 +1331,29 @@ struct nvmem_cell *of_nvmem_cell_get(str
  		return ERR_CAST(nvmem);
  	}
  
@@ -322,7 +322,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	return cell;
  }
-@@ -1528,6 +1468,7 @@ void nvmem_cell_put(struct nvmem_cell *c
+@@ -1527,6 +1467,7 @@ void nvmem_cell_put(struct nvmem_cell *c
  
  	kfree(cell);
  	__nvmem_device_put(nvmem);
@@ -330,7 +330,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  }
  EXPORT_SYMBOL_GPL(nvmem_cell_put);
  
-@@ -2105,11 +2046,22 @@ EXPORT_SYMBOL_GPL(nvmem_dev_name);
+@@ -2104,11 +2045,22 @@ EXPORT_SYMBOL_GPL(nvmem_dev_name);
  
  static int __init nvmem_init(void)
  {
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch b/target/linux/generic/backport-6.1/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch
index 89872bec2e..07e44d7b21 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch
@@ -111,7 +111,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  static struct bin_attribute bin_attr_nvmem_eeprom_compat = {
  	.attr	= {
  		.name	= "eeprom",
-@@ -381,6 +428,68 @@ static void nvmem_sysfs_remove_compat(st
+@@ -380,6 +427,68 @@ static void nvmem_sysfs_remove_compat(st
  		device_remove_bin_file(nvmem->base_dev, &nvmem->eeprom);
  }
  
@@ -180,7 +180,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  #else /* CONFIG_NVMEM_SYSFS */
  
  static int nvmem_sysfs_setup_compat(struct nvmem_device *nvmem,
-@@ -740,11 +849,25 @@ static int nvmem_add_cells_from_fixed_la
+@@ -739,11 +848,25 @@ static int nvmem_add_cells_from_fixed_la
  
  int nvmem_layout_register(struct nvmem_layout *layout)
  {
@@ -207,7 +207,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  }
  EXPORT_SYMBOL_GPL(nvmem_layout_register);
  
-@@ -903,10 +1026,20 @@ struct nvmem_device *nvmem_register(cons
+@@ -902,10 +1025,20 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_dev;
  
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch b/target/linux/generic/backport-6.1/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch
index 1bf3ba35b6..400004c617 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch
@@ -44,7 +44,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -855,7 +855,7 @@ int nvmem_layout_register(struct nvmem_l
+@@ -854,7 +854,7 @@ int nvmem_layout_register(struct nvmem_l
  		return -EINVAL;
  
  	/* Populate the cells */
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch b/target/linux/generic/backport-6.1/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch
index 514b5f2de5..510f3dd841 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch
@@ -24,7 +24,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -877,19 +877,6 @@ void nvmem_layout_unregister(struct nvme
+@@ -876,19 +876,6 @@ void nvmem_layout_unregister(struct nvme
  }
  EXPORT_SYMBOL_GPL(nvmem_layout_unregister);
  
diff --git a/target/linux/generic/backport-6.1/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch b/target/linux/generic/backport-6.1/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch
index aa0bbaa0c5..ccdcc09736 100644
--- a/target/linux/generic/backport-6.1/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch
+++ b/target/linux/generic/backport-6.1/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch
@@ -21,7 +21,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -2164,6 +2164,19 @@ const char *nvmem_dev_name(struct nvmem_
+@@ -2163,6 +2163,19 @@ const char *nvmem_dev_name(struct nvmem_
  }
  EXPORT_SYMBOL_GPL(nvmem_dev_name);
  
diff --git a/target/linux/generic/backport-6.1/830-04-v6.5-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch b/target/linux/generic/backport-6.1/830-04-v6.5-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch
index e0f10f7642..25a718bd7e 100644
--- a/target/linux/generic/backport-6.1/830-04-v6.5-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch
+++ b/target/linux/generic/backport-6.1/830-04-v6.5-cpufreq-qcom-nvmem-use-SoC-ID-s-from-bindings.patch
@@ -32,7 +32,7 @@ Link: https://lore.kernel.org/r/20230526204802.3081168-4-robimarko@gmail.com
  
  enum _msm8996_version {
  	MSM8996_V3,
-@@ -153,12 +148,12 @@ static enum _msm8996_version qcom_cpufre
+@@ -157,12 +152,12 @@ static enum _msm8996_version qcom_cpufre
  	msm_id++;
  
  	switch ((enum _msm_id)*msm_id) {
diff --git a/target/linux/generic/backport-6.1/830-05-v6.5-cpufreq-qcom-nvmem-use-helper-to-get-SMEM-SoC-ID.patch b/target/linux/generic/backport-6.1/830-05-v6.5-cpufreq-qcom-nvmem-use-helper-to-get-SMEM-SoC-ID.patch
index 93e776f62c..49d222662c 100644
--- a/target/linux/generic/backport-6.1/830-05-v6.5-cpufreq-qcom-nvmem-use-helper-to-get-SMEM-SoC-ID.patch
+++ b/target/linux/generic/backport-6.1/830-05-v6.5-cpufreq-qcom-nvmem-use-helper-to-get-SMEM-SoC-ID.patch
@@ -36,7 +36,7 @@ Link: https://lore.kernel.org/r/20230526204802.3081168-5-robimarko@gmail.com
  struct qcom_cpufreq_drv;
  
  struct qcom_cpufreq_match_data {
-@@ -134,60 +126,32 @@ static void get_krait_bin_format_b(struc
+@@ -138,60 +130,32 @@ static void get_krait_bin_format_b(struc
  	dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
  }
  
diff --git a/target/linux/generic/backport-6.1/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch b/target/linux/generic/backport-6.1/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch
index 1c8e014a1a..9d5a928f5f 100644
--- a/target/linux/generic/backport-6.1/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch
+++ b/target/linux/generic/backport-6.1/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch
@@ -99,7 +99,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
  		interval = jiffies_to_msecs(
 --- a/include/linux/leds.h
 +++ b/include/linux/leds.h
-@@ -533,6 +533,9 @@ enum led_trigger_netdev_modes {
+@@ -531,6 +531,9 @@ enum led_trigger_netdev_modes {
  	TRIGGER_NETDEV_LINK_10,
  	TRIGGER_NETDEV_LINK_100,
  	TRIGGER_NETDEV_LINK_1000,
diff --git a/target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch b/target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
new file mode 100644
index 0000000000..802cf8a128
--- /dev/null
+++ b/target/linux/generic/backport-6.1/839-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
@@ -0,0 +1,103 @@
+From cffac22c9215f1883d3848c788f9b03656dced27 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 11 Feb 2024 18:39:19 +0100
+Subject: [PATCH] net: phy: aquantia: clear PMD Global Transmit Disable bit
+ during init
+
+PMD Global Transmit Disable bit should be cleared for normal operation.
+This should be HW default, however I found that on Asus RT-AX89X that uses
+AQR113C PHY and firmware 5.4 this bit is set by default.
+
+With this bit set the AQR cannot achieve a link with its link-partner and
+it took me multiple hours of digging through the vendor GPL source to find
+this out, so lets always clear this bit during .config_init() to avoid a
+situation like this in the future.
+
+aqr107_wait_processor_intensive_op() is moved up because datasheet notes
+that any changes to this bit are processor intensive.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/net/phy/aquantia/aquantia_main.c | 57 ++++++++++++++----------
+ 1 file changed, 33 insertions(+), 24 deletions(-)
+
+--- a/drivers/net/phy/aquantia/aquantia_main.c
++++ b/drivers/net/phy/aquantia/aquantia_main.c
+@@ -507,6 +507,30 @@ static void aqr107_chip_info(struct phy_
+ 		   fw_major, fw_minor, build_id, prov_id);
+ }
+ 
++static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
++{
++	int val, err;
++
++	/* The datasheet notes to wait at least 1ms after issuing a
++	 * processor intensive operation before checking.
++	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
++	 * because that just determines the maximum time slept, not the minimum.
++	 */
++	usleep_range(1000, 5000);
++
++	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
++					VEND1_GLOBAL_GEN_STAT2, val,
++					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
++					AQR107_OP_IN_PROG_SLEEP,
++					AQR107_OP_IN_PROG_TIMEOUT, false);
++	if (err) {
++		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
++		return err;
++	}
++
++	return 0;
++}
++
+ static int aqr107_config_init(struct phy_device *phydev)
+ {
+ 	int ret;
+@@ -530,6 +554,15 @@ static int aqr107_config_init(struct phy
+ 	if (!ret)
+ 		aqr107_chip_info(phydev);
+ 
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
++				 MDIO_PMD_TXDIS_GLOBAL);
++	if (ret)
++		return ret;
++
++	ret = aqr107_wait_processor_intensive_op(phydev);
++	if (ret)
++		return ret;
++
+ 	return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+ }
+ 
+@@ -600,30 +633,6 @@ static void aqr107_link_change_notify(st
+ 		phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");
+ }
+ 
+-static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
+-{
+-	int val, err;
+-
+-	/* The datasheet notes to wait at least 1ms after issuing a
+-	 * processor intensive operation before checking.
+-	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
+-	 * because that just determines the maximum time slept, not the minimum.
+-	 */
+-	usleep_range(1000, 5000);
+-
+-	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
+-					VEND1_GLOBAL_GEN_STAT2, val,
+-					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
+-					AQR107_OP_IN_PROG_SLEEP,
+-					AQR107_OP_IN_PROG_TIMEOUT, false);
+-	if (err) {
+-		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
+-		return err;
+-	}
+-
+-	return 0;
+-}
+-
+ static int aqr107_get_rate_matching(struct phy_device *phydev,
+ 				    phy_interface_t iface)
+ {
diff --git a/target/linux/generic/backport-6.1/864-v6.6-bus-mhi-host-allow-MHI-client-drivers-to-provide-the.patch b/target/linux/generic/backport-6.1/864-v6.6-bus-mhi-host-allow-MHI-client-drivers-to-provide-the.patch
new file mode 100644
index 0000000000..a04b19b157
--- /dev/null
+++ b/target/linux/generic/backport-6.1/864-v6.6-bus-mhi-host-allow-MHI-client-drivers-to-provide-the.patch
@@ -0,0 +1,142 @@
+From: Kalle Valo <quic_kvalo@quicinc.com>
+Date: Thu, 27 Jul 2023 13:04:28 +0300
+Subject: [PATCH] bus: mhi: host: allow MHI client drivers to provide the
+ firmware via a pointer
+
+Currently MHI loads the firmware image from the path provided by client
+devices. ath11k needs to support firmware image embedded along with meta
+data (named as firmware-2.bin). So allow the client driver to request the
+firmware file from user space on it's own and provide the firmware image
+data and size to MHI via a pointer struct mhi_controller::fw_data.
+
+This is an optional feature, if fw_data is NULL MHI load the firmware using
+the name from struct mhi_controller::fw_image string as before.
+
+Tested with ath11k and WCN6855 hw2.0.
+
+Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
+Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
+Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
+Link: https://lore.kernel.org/r/20230727100430.3603551-2-kvalo@kernel.org
+[mani: wrapped commit message to 75 columns]
+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+---
+
+--- a/drivers/bus/mhi/host/boot.c
++++ b/drivers/bus/mhi/host/boot.c
+@@ -367,12 +367,10 @@ error_alloc_mhi_buf:
+ }
+ 
+ static void mhi_firmware_copy(struct mhi_controller *mhi_cntrl,
+-			      const struct firmware *firmware,
++			      const u8 *buf, size_t remainder,
+ 			      struct image_info *img_info)
+ {
+-	size_t remainder = firmware->size;
+ 	size_t to_cpy;
+-	const u8 *buf = firmware->data;
+ 	struct mhi_buf *mhi_buf = img_info->mhi_buf;
+ 	struct bhi_vec_entry *bhi_vec = img_info->bhi_vec;
+ 
+@@ -395,9 +393,10 @@ void mhi_fw_load_handler(struct mhi_cont
+ 	struct device *dev = &mhi_cntrl->mhi_dev->dev;
+ 	enum mhi_pm_state new_state;
+ 	const char *fw_name;
++	const u8 *fw_data;
+ 	void *buf;
+ 	dma_addr_t dma_addr;
+-	size_t size;
++	size_t size, fw_sz;
+ 	int i, ret;
+ 
+ 	if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
+@@ -427,6 +426,20 @@ void mhi_fw_load_handler(struct mhi_cont
+ 	fw_name = (mhi_cntrl->ee == MHI_EE_EDL) ?
+ 		mhi_cntrl->edl_image : mhi_cntrl->fw_image;
+ 
++	/* check if the driver has already provided the firmware data */
++	if (!fw_name && mhi_cntrl->fbc_download &&
++	    mhi_cntrl->fw_data && mhi_cntrl->fw_sz) {
++		if (!mhi_cntrl->sbl_size) {
++			dev_err(dev, "fw_data provided but no sbl_size\n");
++			goto error_fw_load;
++		}
++
++		size = mhi_cntrl->sbl_size;
++		fw_data = mhi_cntrl->fw_data;
++		fw_sz = mhi_cntrl->fw_sz;
++		goto skip_req_fw;
++	}
++
+ 	if (!fw_name || (mhi_cntrl->fbc_download && (!mhi_cntrl->sbl_size ||
+ 						     !mhi_cntrl->seg_len))) {
+ 		dev_err(dev,
+@@ -446,6 +459,10 @@ void mhi_fw_load_handler(struct mhi_cont
+ 	if (size > firmware->size)
+ 		size = firmware->size;
+ 
++	fw_data = firmware->data;
++	fw_sz = firmware->size;
++
++skip_req_fw:
+ 	buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, size, &dma_addr,
+ 				 GFP_KERNEL);
+ 	if (!buf) {
+@@ -454,7 +471,7 @@ void mhi_fw_load_handler(struct mhi_cont
+ 	}
+ 
+ 	/* Download image using BHI */
+-	memcpy(buf, firmware->data, size);
++	memcpy(buf, fw_data, size);
+ 	ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size);
+ 	dma_free_coherent(mhi_cntrl->cntrl_dev, size, buf, dma_addr);
+ 
+@@ -466,7 +483,7 @@ void mhi_fw_load_handler(struct mhi_cont
+ 	}
+ 
+ 	/* Wait for ready since EDL image was loaded */
+-	if (fw_name == mhi_cntrl->edl_image) {
++	if (fw_name && fw_name == mhi_cntrl->edl_image) {
+ 		release_firmware(firmware);
+ 		goto fw_load_ready_state;
+ 	}
+@@ -480,15 +497,14 @@ void mhi_fw_load_handler(struct mhi_cont
+ 	 * device transitioning into MHI READY state
+ 	 */
+ 	if (mhi_cntrl->fbc_download) {
+-		ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image,
+-					   firmware->size);
++		ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image, fw_sz);
+ 		if (ret) {
+ 			release_firmware(firmware);
+ 			goto error_fw_load;
+ 		}
+ 
+ 		/* Load the firmware into BHIE vec table */
+-		mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image);
++		mhi_firmware_copy(mhi_cntrl, fw_data, fw_sz, mhi_cntrl->fbc_image);
+ 	}
+ 
+ 	release_firmware(firmware);
+--- a/include/linux/mhi.h
++++ b/include/linux/mhi.h
+@@ -301,6 +301,10 @@ struct mhi_controller_config {
+  * @iova_start: IOMMU starting address for data (required)
+  * @iova_stop: IOMMU stop address for data (required)
+  * @fw_image: Firmware image name for normal booting (optional)
++ * @fw_data: Firmware image data content for normal booting, used only
++ *           if fw_image is NULL and fbc_download is true (optional)
++ * @fw_sz: Firmware image data size for normal booting, used only if fw_image
++ *         is NULL and fbc_download is true (optional)
+  * @edl_image: Firmware image name for emergency download mode (optional)
+  * @rddm_size: RAM dump size that host should allocate for debugging purpose
+  * @sbl_size: SBL image size downloaded through BHIe (optional)
+@@ -387,6 +391,8 @@ struct mhi_controller {
+ 	dma_addr_t iova_start;
+ 	dma_addr_t iova_stop;
+ 	const char *fw_image;
++	const u8 *fw_data;
++	size_t fw_sz;
+ 	const char *edl_image;
+ 	size_t rddm_size;
+ 	size_t sbl_size;
diff --git a/target/linux/generic/backport-6.6/0080-v6.9-smp-Avoid-setup_max_cpus_namespace_collision_shadowing.patch b/target/linux/generic/backport-6.6/0080-v6.9-smp-Avoid-setup_max_cpus_namespace_collision_shadowing.patch
index e3e9859037..54ebaa1a80 100644
--- a/target/linux/generic/backport-6.6/0080-v6.9-smp-Avoid-setup_max_cpus_namespace_collision_shadowing.patch
+++ b/target/linux/generic/backport-6.6/0080-v6.9-smp-Avoid-setup_max_cpus_namespace_collision_shadowing.patch
@@ -32,13 +32,17 @@ Cc: linux-kernel@vger.kernel.org
  #define cpuhp_tasks_frozen	0
 --- a/kernel/cpu.c
 +++ b/kernel/cpu.c
-@@ -1905,14 +1905,14 @@ static bool __init cpuhp_bringup_cpus_pa
+@@ -1905,17 +1905,17 @@ static bool __init cpuhp_bringup_cpus_pa
  static inline bool cpuhp_bringup_cpus_parallel(unsigned int ncpus) { return false; }
  #endif /* CONFIG_HOTPLUG_PARALLEL */
  
 -void __init bringup_nonboot_cpus(unsigned int setup_max_cpus)
 +void __init bringup_nonboot_cpus(unsigned int max_cpus)
  {
+-	if (!setup_max_cpus)
++	if (!max_cpus)
+ 		return;
+ 
  	/* Try parallel bringup optimization if enabled */
 -	if (cpuhp_bringup_cpus_parallel(setup_max_cpus))
 +	if (cpuhp_bringup_cpus_parallel(max_cpus))
diff --git a/target/linux/generic/backport-6.6/0081-v6.10-cpu-Fix-broken-cmdline-nosmp-and-maxcpus-0.patch b/target/linux/generic/backport-6.6/0081-v6.10-cpu-Fix-broken-cmdline-nosmp-and-maxcpus-0.patch
deleted file mode 100644
index e47796a078..0000000000
--- a/target/linux/generic/backport-6.6/0081-v6.10-cpu-Fix-broken-cmdline-nosmp-and-maxcpus-0.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 6ef8eb5125722c241fd60d7b0c872d5c2e5dd4ca Mon Sep 17 00:00:00 2001
-From: Huacai Chen <chenhuacai@loongson.cn>
-Date: Tue, 18 Jun 2024 16:13:36 +0800
-Subject: [PATCH] cpu: Fix broken cmdline "nosmp" and "maxcpus=0"
-
-After the rework of "Parallel CPU bringup", the cmdline "nosmp" and
-"maxcpus=0" parameters are not working anymore. These parameters set
-setup_max_cpus to zero and that's handed to bringup_nonboot_cpus().
-
-The code there does a decrement before checking for zero, which brings it
-into the negative space and brings up all CPUs.
-
-Add a zero check at the beginning of the function to prevent this.
-
-[ tglx: Massaged change log ]
-
-Fixes: 18415f33e2ac4ab382 ("cpu/hotplug: Allow "parallel" bringup up to CPUHP_BP_KICK_AP_STATE")
-Fixes: 06c6796e0304234da6 ("cpu/hotplug: Fix off by one in cpuhp_bringup_mask()")
-Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
-Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-Cc: stable@vger.kernel.org
-Link: https://lore.kernel.org/r/20240618081336.3996825-1-chenhuacai@loongson.cn
----
- kernel/cpu.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/kernel/cpu.c
-+++ b/kernel/cpu.c
-@@ -1907,6 +1907,9 @@ static inline bool cpuhp_bringup_cpus_pa
- 
- void __init bringup_nonboot_cpus(unsigned int max_cpus)
- {
-+	if (!max_cpus)
-+		return;
-+
- 	/* Try parallel bringup optimization if enabled */
- 	if (cpuhp_bringup_cpus_parallel(max_cpus))
- 		return;
diff --git a/target/linux/generic/backport-6.6/200-regmap-maple-work-around-false-positive-warning.patch b/target/linux/generic/backport-6.6/200-regmap-maple-work-around-false-positive-warning.patch
new file mode 100644
index 0000000000..de5c813804
--- /dev/null
+++ b/target/linux/generic/backport-6.6/200-regmap-maple-work-around-false-positive-warning.patch
@@ -0,0 +1,47 @@
+From 542440fd7b30983cae23e32bd22f69a076ec7ef4 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 19 Jul 2024 12:40:24 +0200
+Subject: regmap: maple: work around gcc-14.1 false-positive warning
+
+With gcc-14.1, there is a false-postive -Wuninitialized warning in
+regcache_maple_drop:
+
+drivers/base/regmap/regcache-maple.c: In function 'regcache_maple_drop':
+drivers/base/regmap/regcache-maple.c:113:23: error: 'lower_index' is used uninitialized [-Werror=uninitialized]
+  113 |         unsigned long lower_index, lower_last;
+      |                       ^~~~~~~~~~~
+drivers/base/regmap/regcache-maple.c:113:36: error: 'lower_last' is used uninitialized [-Werror=uninitialized]
+  113 |         unsigned long lower_index, lower_last;
+      |                                    ^~~~~~~~~~
+
+I've created a reduced test case to see if this needs to be reported
+as a gcc, but it appears that the gcc-14.x branch already has a change
+that turns this into a more sensible -Wmaybe-uninitialized warning, so
+I ended up not reporting it so far.
+
+The reduced test case also produces a warning for gcc-13 and gcc-12
+but I don't see that with the version in the kernel.
+
+Link: https://godbolt.org/z/oKbohKqd3
+Link: https://lore.kernel.org/all/CAMuHMdWj=FLmkazPbYKPevDrcym2_HDb_U7Mb9YE9ovrP0jJfA@mail.gmail.com/
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Link: https://patch.msgid.link/20240719104030.1382465-1-arnd@kernel.org
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/base/regmap/regcache-maple.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+(limited to 'drivers/base/regmap/regcache-maple.c')
+
+--- a/drivers/base/regmap/regcache-maple.c
++++ b/drivers/base/regmap/regcache-maple.c
+@@ -110,7 +110,8 @@ static int regcache_maple_drop(struct re
+ 	struct maple_tree *mt = map->cache;
+ 	MA_STATE(mas, mt, min, max);
+ 	unsigned long *entry, *lower, *upper;
+-	unsigned long lower_index, lower_last;
++	/* initialized to work around false-positive -Wuninitialized warning */
++	unsigned long lower_index = 0, lower_last = 0;
+ 	unsigned long upper_index, upper_last;
+ 	int ret = 0;
+ 
diff --git a/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch b/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch
index 99a6bfe638..6d3c7d04fe 100644
--- a/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch
+++ b/target/linux/generic/backport-6.6/310-v6.7-mips-kexec-fix-the-incorrect-ifdeffery-and-dependenc.patch
@@ -134,7 +134,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  };
 --- a/arch/mips/kernel/smp-cps.c
 +++ b/arch/mips/kernel/smp-cps.c
-@@ -392,7 +392,7 @@ static void cps_smp_finish(void)
+@@ -395,7 +395,7 @@ static void cps_smp_finish(void)
  	local_irq_enable();
  }
  
@@ -143,7 +143,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  
  enum cpu_death {
  	CPU_DEATH_HALT,
-@@ -429,7 +429,7 @@ static void cps_shutdown_this_cpu(enum c
+@@ -432,7 +432,7 @@ static void cps_shutdown_this_cpu(enum c
  	}
  }
  
@@ -152,7 +152,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  
  static void cps_kexec_nonboot_cpu(void)
  {
-@@ -439,9 +439,9 @@ static void cps_kexec_nonboot_cpu(void)
+@@ -442,9 +442,9 @@ static void cps_kexec_nonboot_cpu(void)
  		cps_shutdown_this_cpu(CPU_DEATH_POWER);
  }
  
@@ -164,7 +164,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  
  #ifdef CONFIG_HOTPLUG_CPU
  
-@@ -610,7 +610,7 @@ static const struct plat_smp_ops cps_smp
+@@ -613,7 +613,7 @@ static const struct plat_smp_ops cps_smp
  	.cpu_die		= cps_cpu_die,
  	.cleanup_dead_cpu	= cps_cleanup_dead_cpu,
  #endif
@@ -175,8 +175,8 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  };
 --- a/arch/mips/loongson64/reset.c
 +++ b/arch/mips/loongson64/reset.c
-@@ -53,7 +53,7 @@ static void loongson_halt(void)
- 	}
+@@ -39,7 +39,7 @@ static int firmware_poweroff(struct sys_
+ 	return NOTIFY_DONE;
  }
  
 -#ifdef CONFIG_KEXEC
@@ -184,9 +184,9 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  
  /* 0X80000000~0X80200000 is safe */
  #define MAX_ARGS	64
-@@ -158,7 +158,7 @@ static int __init mips_reboot_setup(void
- 	_machine_halt = loongson_halt;
- 	pm_power_off = loongson_poweroff;
+@@ -152,7 +152,7 @@ static int __init mips_reboot_setup(void
+ 				 firmware_poweroff, NULL);
+ 	}
  
 -#ifdef CONFIG_KEXEC
 +#ifdef CONFIG_KEXEC_CORE
@@ -195,7 +195,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
  		return -ENOMEM;
 --- a/arch/mips/loongson64/smp.c
 +++ b/arch/mips/loongson64/smp.c
-@@ -864,7 +864,7 @@ const struct plat_smp_ops loongson3_smp_
+@@ -883,7 +883,7 @@ const struct plat_smp_ops loongson3_smp_
  	.cpu_disable = loongson3_cpu_disable,
  	.cpu_die = loongson3_cpu_die,
  #endif
diff --git a/target/linux/bmips/patches-6.6/020-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch b/target/linux/generic/backport-6.6/320-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch
index 21eaa3d6cb..21eaa3d6cb 100644
--- a/target/linux/bmips/patches-6.6/020-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch
+++ b/target/linux/generic/backport-6.6/320-v6.11-mips-bmips-rework-and-cache-CBR-addr-handling.patch
diff --git a/target/linux/bmips/patches-6.6/021-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch b/target/linux/generic/backport-6.6/321-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch
index 10a710a31d..10a710a31d 100644
--- a/target/linux/bmips/patches-6.6/021-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch
+++ b/target/linux/generic/backport-6.6/321-v6.11-mips-bmips-setup-make-CBR-address-configurable.patch
diff --git a/target/linux/bmips/patches-6.6/022-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch b/target/linux/generic/backport-6.6/322-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch
index 2af45df259..2af45df259 100644
--- a/target/linux/bmips/patches-6.6/022-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch
+++ b/target/linux/generic/backport-6.6/322-v6.11-mips-bmips-enable-RAC-on-BMIPS4350.patch
diff --git a/target/linux/generic/backport-6.6/610-v6.9-net-mdio-add-2.5g-and-5g-related-PMA-speed-constants.patch b/target/linux/generic/backport-6.6/610-v6.9-net-mdio-add-2.5g-and-5g-related-PMA-speed-constants.patch
new file mode 100644
index 0000000000..9a40ea4b90
--- /dev/null
+++ b/target/linux/generic/backport-6.6/610-v6.9-net-mdio-add-2.5g-and-5g-related-PMA-speed-constants.patch
@@ -0,0 +1,30 @@
+From 6c06c88fa838fcc1b7e5380facd086f57fd9d1c4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Sun, 4 Feb 2024 15:16:46 +0100
+Subject: [PATCH] net: mdio: add 2.5g and 5g related PMA speed constants
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add constants indicating 2.5g and 5g ability in the MMD PMA speed
+register.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Link: https://lore.kernel.org/r/98e15038-d96c-442f-93e4-410100d27866@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ include/uapi/linux/mdio.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/uapi/linux/mdio.h
++++ b/include/uapi/linux/mdio.h
+@@ -138,6 +138,8 @@
+ #define MDIO_PMA_SPEED_1000		0x0010	/* 1000M capable */
+ #define MDIO_PMA_SPEED_100		0x0020	/* 100M capable */
+ #define MDIO_PMA_SPEED_10		0x0040	/* 10M capable */
++#define MDIO_PMA_SPEED_2_5G		0x2000	/* 2.5G capable */
++#define MDIO_PMA_SPEED_5G		0x4000	/* 5G capable */
+ #define MDIO_PCS_SPEED_10P2B		0x0002	/* 10PASS-TS/2BASE-TL capable */
+ #define MDIO_PCS_SPEED_2_5G		0x0040	/* 2.5G capable */
+ #define MDIO_PCS_SPEED_5G		0x0080	/* 5G capable */
diff --git a/target/linux/generic/backport-6.6/611-01-v6.11-udp-Allow-GSO-transmit-from-devices-with-no-checksum.patch b/target/linux/generic/backport-6.6/611-01-v6.11-udp-Allow-GSO-transmit-from-devices-with-no-checksum.patch
new file mode 100644
index 0000000000..21f18f92b8
--- /dev/null
+++ b/target/linux/generic/backport-6.6/611-01-v6.11-udp-Allow-GSO-transmit-from-devices-with-no-checksum.patch
@@ -0,0 +1,94 @@
+From: Jakub Sitnicki <jakub@cloudflare.com>
+Date: Wed, 26 Jun 2024 19:51:26 +0200
+Subject: [PATCH] udp: Allow GSO transmit from devices with no checksum offload
+
+Today sending a UDP GSO packet from a TUN device results in an EIO error:
+
+  import fcntl, os, struct
+  from socket import *
+
+  TUNSETIFF = 0x400454CA
+  IFF_TUN = 0x0001
+  IFF_NO_PI = 0x1000
+  UDP_SEGMENT = 103
+
+  tun_fd = os.open("/dev/net/tun", os.O_RDWR)
+  ifr = struct.pack("16sH", b"tun0", IFF_TUN | IFF_NO_PI)
+  fcntl.ioctl(tun_fd, TUNSETIFF, ifr)
+
+  os.system("ip addr add 192.0.2.1/24 dev tun0")
+  os.system("ip link set dev tun0 up")
+
+  s = socket(AF_INET, SOCK_DGRAM)
+  s.setsockopt(SOL_UDP, UDP_SEGMENT, 1200)
+  s.sendto(b"x" * 3000, ("192.0.2.2", 9)) # EIO
+
+This is due to a check in the udp stack if the egress device offers
+checksum offload. While TUN/TAP devices, by default, don't advertise this
+capability because it requires support from the TUN/TAP reader.
+
+However, the GSO stack has a software fallback for checksum calculation,
+which we can use. This way we don't force UDP_SEGMENT users to handle the
+EIO error and implement a segmentation fallback.
+
+Lift the restriction so that UDP_SEGMENT can be used with any egress
+device. We also need to adjust the UDP GSO code to match the GSO stack
+expectation about ip_summed field, as set in commit 8d63bee643f1 ("net:
+avoid skb_warn_bad_offload false positives on UFO"). Otherwise we will hit
+the bad offload check.
+
+Users should, however, expect a potential performance impact when
+batch-sending packets with UDP_SEGMENT without checksum offload on the
+egress device. In such case the packet payload is read twice: first during
+the sendmsg syscall when copying data from user memory, and then in the GSO
+stack for checksum computation. This double memory read can be less
+efficient than a regular sendmsg where the checksum is calculated during
+the initial data copy from user memory.
+
+Signed-off-by: Jakub Sitnicki <jakub@cloudflare.com>
+Reviewed-by: Willem de Bruijn <willemb@google.com>
+Link: https://patch.msgid.link/20240626-linux-udpgso-v2-1-422dfcbd6b48@cloudflare.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+
+--- a/net/ipv4/udp.c
++++ b/net/ipv4/udp.c
+@@ -942,8 +942,7 @@ static int udp_send_skb(struct sk_buff *
+ 			kfree_skb(skb);
+ 			return -EINVAL;
+ 		}
+-		if (skb->ip_summed != CHECKSUM_PARTIAL || is_udplite ||
+-		    dst_xfrm(skb_dst(skb))) {
++		if (is_udplite || dst_xfrm(skb_dst(skb))) {
+ 			kfree_skb(skb);
+ 			return -EIO;
+ 		}
+--- a/net/ipv4/udp_offload.c
++++ b/net/ipv4/udp_offload.c
+@@ -357,6 +357,14 @@ struct sk_buff *__udp_gso_segment(struct
+ 	else
+ 		uh->check = gso_make_checksum(seg, ~check) ? : CSUM_MANGLED_0;
+ 
++	/* On the TX path, CHECKSUM_NONE and CHECKSUM_UNNECESSARY have the same
++	 * meaning. However, check for bad offloads in the GSO stack expects the
++	 * latter, if the checksum was calculated in software. To vouch for the
++	 * segment skbs we actually need to set it on the gso_skb.
++	 */
++	if (gso_skb->ip_summed == CHECKSUM_NONE)
++		gso_skb->ip_summed = CHECKSUM_UNNECESSARY;
++
+ 	/* update refcount for the packet */
+ 	if (copy_dtor) {
+ 		int delta = sum_truesize - gso_skb->truesize;
+--- a/net/ipv6/udp.c
++++ b/net/ipv6/udp.c
+@@ -1261,8 +1261,7 @@ static int udp_v6_send_skb(struct sk_buf
+ 			kfree_skb(skb);
+ 			return -EINVAL;
+ 		}
+-		if (skb->ip_summed != CHECKSUM_PARTIAL || is_udplite ||
+-		    dst_xfrm(skb_dst(skb))) {
++		if (is_udplite || dst_xfrm(skb_dst(skb))) {
+ 			kfree_skb(skb);
+ 			return -EIO;
+ 		}
diff --git a/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch b/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
new file mode 100644
index 0000000000..8eecb06304
--- /dev/null
+++ b/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
@@ -0,0 +1,69 @@
+From: Jakub Sitnicki <jakub@cloudflare.com>
+Date: Thu, 8 Aug 2024 11:56:21 +0200
+Subject: [PATCH] net: Make USO depend on CSUM offload
+
+UDP segmentation offload inherently depends on checksum offload. It should
+not be possible to disable checksum offload while leaving USO enabled.
+Enforce this dependency in code.
+
+There is a single tx-udp-segmentation feature flag to indicate support for
+both IPv4/6, hence the devices wishing to support USO must offer checksum
+offload for both IP versions.
+
+Fixes: 10154dbded6d ("udp: Allow GSO transmit from devices with no checksum offload")
+Suggested-by: Willem de Bruijn <willemdebruijn.kernel@gmail.com>
+Signed-off-by: Jakub Sitnicki <jakub@cloudflare.com>
+Reviewed-by: Willem de Bruijn <willemb@google.com>
+Link: https://patch.msgid.link/20240808-udp-gso-egress-from-tunnel-v4-1-f5c5b4149ab9@cloudflare.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+
+--- a/net/core/dev.c
++++ b/net/core/dev.c
+@@ -9751,6 +9751,15 @@ static void netdev_sync_lower_features(s
+ 	}
+ }
+ 
++static bool netdev_has_ip_or_hw_csum(netdev_features_t features)
++{
++	netdev_features_t ip_csum_mask = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
++	bool ip_csum = (features & ip_csum_mask) == ip_csum_mask;
++	bool hw_csum = features & NETIF_F_HW_CSUM;
++
++	return ip_csum || hw_csum;
++}
++
+ static netdev_features_t netdev_fix_features(struct net_device *dev,
+ 	netdev_features_t features)
+ {
+@@ -9832,15 +9841,9 @@ static netdev_features_t netdev_fix_feat
+ 		features &= ~NETIF_F_LRO;
+ 	}
+ 
+-	if (features & NETIF_F_HW_TLS_TX) {
+-		bool ip_csum = (features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) ==
+-			(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
+-		bool hw_csum = features & NETIF_F_HW_CSUM;
+-
+-		if (!ip_csum && !hw_csum) {
+-			netdev_dbg(dev, "Dropping TLS TX HW offload feature since no CSUM feature.\n");
+-			features &= ~NETIF_F_HW_TLS_TX;
+-		}
++	if ((features & NETIF_F_HW_TLS_TX) && !netdev_has_ip_or_hw_csum(features)) {
++		netdev_dbg(dev, "Dropping TLS TX HW offload feature since no CSUM feature.\n");
++		features &= ~NETIF_F_HW_TLS_TX;
+ 	}
+ 
+ 	if ((features & NETIF_F_HW_TLS_RX) && !(features & NETIF_F_RXCSUM)) {
+@@ -9848,6 +9851,11 @@ static netdev_features_t netdev_fix_feat
+ 		features &= ~NETIF_F_HW_TLS_RX;
+ 	}
+ 
++	if ((features & NETIF_F_GSO_UDP_L4) && !netdev_has_ip_or_hw_csum(features)) {
++		netdev_dbg(dev, "Dropping USO feature since no CSUM feature.\n");
++		features &= ~NETIF_F_GSO_UDP_L4;
++	}
++
+ 	return features;
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/611-03-v6.11-udp-Fall-back-to-software-USO-if-IPv6-extension-head.patch b/target/linux/generic/backport-6.6/611-03-v6.11-udp-Fall-back-to-software-USO-if-IPv6-extension-head.patch
new file mode 100644
index 0000000000..151e2562db
--- /dev/null
+++ b/target/linux/generic/backport-6.6/611-03-v6.11-udp-Fall-back-to-software-USO-if-IPv6-extension-head.patch
@@ -0,0 +1,86 @@
+From: Jakub Sitnicki <jakub@cloudflare.com>
+Date: Thu, 8 Aug 2024 11:56:22 +0200
+Subject: [PATCH] udp: Fall back to software USO if IPv6 extension headers are
+ present
+
+In commit 10154dbded6d ("udp: Allow GSO transmit from devices with no
+checksum offload") we have intentionally allowed UDP GSO packets marked
+CHECKSUM_NONE to pass to the GSO stack, so that they can be segmented and
+checksummed by a software fallback when the egress device lacks these
+features.
+
+What was not taken into consideration is that a CHECKSUM_NONE skb can be
+handed over to the GSO stack also when the egress device advertises the
+tx-udp-segmentation / NETIF_F_GSO_UDP_L4 feature.
+
+This will happen when there are IPv6 extension headers present, which we
+check for in __ip6_append_data(). Syzbot has discovered this scenario,
+producing a warning as below:
+
+  ip6tnl0: caps=(0x00000006401d7869, 0x00000006401d7869)
+  WARNING: CPU: 0 PID: 5112 at net/core/dev.c:3293 skb_warn_bad_offload+0x166/0x1a0 net/core/dev.c:3291
+  Modules linked in:
+  CPU: 0 PID: 5112 Comm: syz-executor391 Not tainted 6.10.0-rc7-syzkaller-01603-g80ab5445da62 #0
+  Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 06/07/2024
+  RIP: 0010:skb_warn_bad_offload+0x166/0x1a0 net/core/dev.c:3291
+  [...]
+  Call Trace:
+   <TASK>
+   __skb_gso_segment+0x3be/0x4c0 net/core/gso.c:127
+   skb_gso_segment include/net/gso.h:83 [inline]
+   validate_xmit_skb+0x585/0x1120 net/core/dev.c:3661
+   __dev_queue_xmit+0x17a4/0x3e90 net/core/dev.c:4415
+   neigh_output include/net/neighbour.h:542 [inline]
+   ip6_finish_output2+0xffa/0x1680 net/ipv6/ip6_output.c:137
+   ip6_finish_output+0x41e/0x810 net/ipv6/ip6_output.c:222
+   ip6_send_skb+0x112/0x230 net/ipv6/ip6_output.c:1958
+   udp_v6_send_skb+0xbf5/0x1870 net/ipv6/udp.c:1292
+   udpv6_sendmsg+0x23b3/0x3270 net/ipv6/udp.c:1588
+   sock_sendmsg_nosec net/socket.c:730 [inline]
+   __sock_sendmsg+0xef/0x270 net/socket.c:745
+   ____sys_sendmsg+0x525/0x7d0 net/socket.c:2585
+   ___sys_sendmsg net/socket.c:2639 [inline]
+   __sys_sendmmsg+0x3b2/0x740 net/socket.c:2725
+   __do_sys_sendmmsg net/socket.c:2754 [inline]
+   __se_sys_sendmmsg net/socket.c:2751 [inline]
+   __x64_sys_sendmmsg+0xa0/0xb0 net/socket.c:2751
+   do_syscall_x64 arch/x86/entry/common.c:52 [inline]
+   do_syscall_64+0xf3/0x230 arch/x86/entry/common.c:83
+   entry_SYSCALL_64_after_hwframe+0x77/0x7f
+   [...]
+   </TASK>
+
+We are hitting the bad offload warning because when an egress device is
+capable of handling segmentation offload requested by
+skb_shinfo(skb)->gso_type, the chain of gso_segment callbacks won't produce
+any segment skbs and return NULL. See the skb_gso_ok() branch in
+{__udp,tcp,sctp}_gso_segment helpers.
+
+To fix it, force a fallback to software USO when processing a packet with
+IPv6 extension headers, since we don't know if these can checksummed by
+all devices which offer USO.
+
+Fixes: 10154dbded6d ("udp: Allow GSO transmit from devices with no checksum offload")
+Reported-by: syzbot+e15b7e15b8a751a91d9a@syzkaller.appspotmail.com
+Closes: https://lore.kernel.org/all/000000000000e1609a061d5330ce@google.com/
+Reviewed-by: Willem de Bruijn <willemb@google.com>
+Signed-off-by: Jakub Sitnicki <jakub@cloudflare.com>
+Link: https://patch.msgid.link/20240808-udp-gso-egress-from-tunnel-v4-2-f5c5b4149ab9@cloudflare.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+
+--- a/net/ipv4/udp_offload.c
++++ b/net/ipv4/udp_offload.c
+@@ -278,6 +278,12 @@ struct sk_buff *__udp_gso_segment(struct
+ 	if (gso_skb->len <= sizeof(*uh) + mss)
+ 		return ERR_PTR(-EINVAL);
+ 
++	/* We don't know if egress device can segment and checksum the packet
++	 * when IPv6 extension headers are present. Fall back to software GSO.
++	 */
++	if (gso_skb->ip_summed != CHECKSUM_PARTIAL)
++		features &= ~(NETIF_F_GSO_UDP_L4 | NETIF_F_CSUM_MASK);
++
+ 	if (skb_gso_ok(gso_skb, features | NETIF_F_GSO_ROBUST)) {
+ 		/* Packet is from an untrusted source, reset gso_segs. */
+ 		skb_shinfo(gso_skb)->gso_segs = DIV_ROUND_UP(gso_skb->len - sizeof(*uh),
diff --git a/target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch b/target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch
index 3345ebf6c6..fe75a4e3f8 100644
--- a/target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch
+++ b/target/linux/generic/backport-6.6/780-01-v6.8-r8169-add-support-for-LED-s-on-RTL8168-RTL8101.patch
@@ -296,7 +296,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  static void r8168fp_adjust_ocp_cmd(struct rtl8169_private *tp, u32 *cmd, int type)
  {
  	/* based on RTL8168FP_OOBMAC_BASE in vendor driver */
-@@ -5258,6 +5316,7 @@ static int rtl_init_one(struct pci_dev *
+@@ -5254,6 +5312,7 @@ static int rtl_init_one(struct pci_dev *
  	raw_spin_lock_init(&tp->cfg9346_usage_lock);
  	raw_spin_lock_init(&tp->config25_lock);
  	raw_spin_lock_init(&tp->mac_ocp_lock);
@@ -304,7 +304,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  
  	dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev,
  						   struct pcpu_sw_netstats);
-@@ -5414,6 +5473,12 @@ static int rtl_init_one(struct pci_dev *
+@@ -5410,6 +5469,12 @@ static int rtl_init_one(struct pci_dev *
  	if (rc)
  		return rc;
  
diff --git a/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch b/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch
index cea88c042a..1b83cf4cda 100644
--- a/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch
+++ b/target/linux/generic/backport-6.6/780-02-v6.8-r8169-fix-building-with-CONFIG_LEDS_CLASS-m.patch
@@ -59,7 +59,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  obj-$(CONFIG_R8169) += r8169.o
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5473,11 +5473,10 @@ static int rtl_init_one(struct pci_dev *
+@@ -5469,11 +5469,10 @@ static int rtl_init_one(struct pci_dev *
  	if (rc)
  		return rc;
  
diff --git a/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch b/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch
index 5ab160855a..ab38b0cfb9 100644
--- a/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch
+++ b/target/linux/generic/backport-6.6/780-03-v6.9-r8169-add-support-for-RTL8126A.patch
@@ -321,7 +321,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  		padto = max_t(unsigned int, padto, ETH_ZLEN);
  		break;
  	default:
-@@ -5225,7 +5282,7 @@ static void rtl_hw_initialize(struct rtl
+@@ -5221,7 +5278,7 @@ static void rtl_hw_initialize(struct rtl
  	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
  		rtl_hw_init_8168g(tp);
  		break;
diff --git a/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch b/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch
index 742ee578b2..b897e04de9 100644
--- a/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch
+++ b/target/linux/generic/backport-6.6/780-05-v6.9-r8169-add-LED-support-for-RTL8125-RTL8126.patch
@@ -225,7 +225,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  void r8169_get_led_name(struct rtl8169_private *tp, int idx,
  			char *buf, int buf_len)
  {
-@@ -5530,10 +5581,12 @@ static int rtl_init_one(struct pci_dev *
+@@ -5526,10 +5577,12 @@ static int rtl_init_one(struct pci_dev *
  	if (rc)
  		return rc;
  
diff --git a/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch b/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch
index 52019869a8..c179a37252 100644
--- a/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch
+++ b/target/linux/generic/backport-6.6/780-08-v6.10-r8169-fix-LED-related-deadlock-on-module-removal.patch
@@ -124,7 +124,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  	u32 ocp_base;
  };
  
-@@ -5126,6 +5128,8 @@ static void rtl_remove_one(struct pci_de
+@@ -5122,6 +5124,8 @@ static void rtl_remove_one(struct pci_de
  
  	cancel_work_sync(&tp->wk.work);
  
@@ -133,7 +133,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  	unregister_netdev(tp->dev);
  
  	if (tp->dash_type != RTL_DASH_NONE)
-@@ -5586,9 +5590,9 @@ static int rtl_init_one(struct pci_dev *
+@@ -5582,9 +5586,9 @@ static int rtl_init_one(struct pci_dev *
  
  	if (IS_ENABLED(CONFIG_R8169_LEDS)) {
  		if (rtl_is_8125(tp))
diff --git a/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch b/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch
index cfe552046e..abd7d1c36c 100644
--- a/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch
+++ b/target/linux/generic/backport-6.6/780-09-v6.10-r8169-add-missing-conditional-compiling-for-call-to-.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5128,7 +5128,8 @@ static void rtl_remove_one(struct pci_de
+@@ -5124,7 +5124,8 @@ static void rtl_remove_one(struct pci_de
  
  	cancel_work_sync(&tp->wk.work);
  
diff --git a/target/linux/generic/backport-6.6/781-01-v6.9-net-phy-realtek-add-support-for-RTL8126A-integrated-.patch b/target/linux/generic/backport-6.6/781-01-v6.9-net-phy-realtek-add-support-for-RTL8126A-integrated-.patch
new file mode 100644
index 0000000000..723742e7fa
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-01-v6.9-net-phy-realtek-add-support-for-RTL8126A-integrated-.patch
@@ -0,0 +1,40 @@
+From 5befa3728b855e9f75b29bb0069a1ca7f5bab2f7 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Wed, 31 Jan 2024 21:24:29 +0100
+Subject: [PATCH] net: phy: realtek: add support for RTL8126A-integrated 5Gbps
+ PHY
+
+A user reported that first consumer mainboards show up with a RTL8126A
+5Gbps MAC/PHY. This adds support for the integrated PHY, which is also
+available stand-alone. From a PHY driver perspective it's treated the
+same as the 2.5Gbps PHY's, we just have to support the new PHY ID.
+
+Reported-by: Joe Salmeri <jmscdba@gmail.com>
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Tested-by: Joe Salmeri <jmscdba@gmail.com>
+Link: https://lore.kernel.org/r/0c8e67ea-6505-43d1-bd51-94e7ecd6e222@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1050,6 +1050,16 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
++		PHY_ID_MATCH_EXACT(0x001cc862),
++		.name           = "RTL8251B 5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc961),
+ 		.name		= "RTL8366RB Gigabit Ethernet",
+ 		.config_init	= &rtl8366rb_config_init,
diff --git a/target/linux/generic/backport-6.6/781-02-v6.9-net-phy-realtek-use-generic-MDIO-constants.patch b/target/linux/generic/backport-6.6/781-02-v6.9-net-phy-realtek-use-generic-MDIO-constants.patch
new file mode 100644
index 0000000000..6672aca9b8
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-02-v6.9-net-phy-realtek-use-generic-MDIO-constants.patch
@@ -0,0 +1,93 @@
+From 2b9ec5dfb8255656ca731ab9d9bf59d94566d377 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Sun, 4 Feb 2024 15:17:53 +0100
+Subject: [PATCH] net: phy: realtek: use generic MDIO constants
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Drop the ad-hoc MDIO constants used in the driver and use generic
+constants instead.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://lore.kernel.org/r/732a70d6-4191-4aae-8862-3716b062aa9e@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek.c | 30 +++++++++++++-----------------
+ 1 file changed, 13 insertions(+), 17 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -57,14 +57,6 @@
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+-#define RTL_SUPPORTS_5000FULL			BIT(14)
+-#define RTL_SUPPORTS_2500FULL			BIT(13)
+-#define RTL_SUPPORTS_10000FULL			BIT(0)
+-#define RTL_ADV_2500FULL			BIT(7)
+-#define RTL_LPADV_10000FULL			BIT(11)
+-#define RTL_LPADV_5000FULL			BIT(6)
+-#define RTL_LPADV_2500FULL			BIT(5)
+-
+ #define RTL9000A_GINMR				0x14
+ #define RTL9000A_GINMR_LINK_STATUS		BIT(4)
+ 
+@@ -676,11 +668,11 @@ static int rtl822x_get_features(struct p
+ 		return val;
+ 
+ 	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+-			 phydev->supported, val & RTL_SUPPORTS_2500FULL);
++			 phydev->supported, val & MDIO_PMA_SPEED_2_5G);
+ 	linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+-			 phydev->supported, val & RTL_SUPPORTS_5000FULL);
++			 phydev->supported, val & MDIO_PMA_SPEED_5G);
+ 	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
+-			 phydev->supported, val & RTL_SUPPORTS_10000FULL);
++			 phydev->supported, val & MDIO_SPEED_10G);
+ 
+ 	return genphy_read_abilities(phydev);
+ }
+@@ -694,10 +686,11 @@ static int rtl822x_config_aneg(struct ph
+ 
+ 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ 				      phydev->advertising))
+-			adv2500 = RTL_ADV_2500FULL;
++			adv2500 = MDIO_AN_10GBT_CTRL_ADV2_5G;
+ 
+ 		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
+-					       RTL_ADV_2500FULL, adv2500);
++					       MDIO_AN_10GBT_CTRL_ADV2_5G,
++					       adv2500);
+ 		if (ret < 0)
+ 			return ret;
+ 	}
+@@ -716,11 +709,14 @@ static int rtl822x_read_status(struct ph
+ 			return lpadv;
+ 
+ 		linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
+-			phydev->lp_advertising, lpadv & RTL_LPADV_10000FULL);
++				 phydev->lp_advertising,
++				 lpadv & MDIO_AN_10GBT_STAT_LP10G);
+ 		linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+-			phydev->lp_advertising, lpadv & RTL_LPADV_5000FULL);
++				 phydev->lp_advertising,
++				 lpadv & MDIO_AN_10GBT_STAT_LP5G);
+ 		linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+-			phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL);
++				 phydev->lp_advertising,
++				 lpadv & MDIO_AN_10GBT_STAT_LP2_5G);
+ 	}
+ 
+ 	ret = genphy_read_status(phydev);
+@@ -738,7 +734,7 @@ static bool rtlgen_supports_2_5gbps(stru
+ 	val = phy_read(phydev, 0x13);
+ 	phy_write(phydev, RTL821x_PAGE_SELECT, 0);
+ 
+-	return val >= 0 && val & RTL_SUPPORTS_2500FULL;
++	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
+ }
+ 
+ static int rtlgen_match_phy_device(struct phy_device *phydev)
diff --git a/target/linux/generic/backport-6.6/781-03-v6.9-net-phy-realtek-add-5Gbps-support-to-rtl822x_config_.patch b/target/linux/generic/backport-6.6/781-03-v6.9-net-phy-realtek-add-5Gbps-support-to-rtl822x_config_.patch
new file mode 100644
index 0000000000..4b99a0eae6
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-03-v6.9-net-phy-realtek-add-5Gbps-support-to-rtl822x_config_.patch
@@ -0,0 +1,42 @@
+From db1bb7741ff29bf2cefcbc0ca567644e9ed1caa9 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Sun, 4 Feb 2024 15:18:50 +0100
+Subject: [PATCH] net: phy: realtek: add 5Gbps support to rtl822x_config_aneg()
+
+RTL8126 as an evolution of RTL8125 supports 5Gbps. rtl822x_config_aneg()
+is used by the PHY driver for the integrated PHY, therefore add 5Gbps
+support to it.
+
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Link: https://lore.kernel.org/r/5644ab50-e3e9-477c-96db-05cd5bdc2563@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek.c | 12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -682,15 +682,19 @@ static int rtl822x_config_aneg(struct ph
+ 	int ret = 0;
+ 
+ 	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		u16 adv2500 = 0;
++		u16 adv = 0;
+ 
+ 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ 				      phydev->advertising))
+-			adv2500 = MDIO_AN_10GBT_CTRL_ADV2_5G;
++			adv |= MDIO_AN_10GBT_CTRL_ADV2_5G;
++		if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
++				      phydev->advertising))
++			adv |= MDIO_AN_10GBT_CTRL_ADV5G;
+ 
+ 		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
+-					       MDIO_AN_10GBT_CTRL_ADV2_5G,
+-					       adv2500);
++					       MDIO_AN_10GBT_CTRL_ADV2_5G |
++					       MDIO_AN_10GBT_CTRL_ADV5G,
++					       adv);
+ 		if (ret < 0)
+ 			return ret;
+ 	}
diff --git a/target/linux/generic/backport-6.6/781-04-v6.9-net-phy-realtek-use-generic-MDIO-helpers-to-simplify.patch b/target/linux/generic/backport-6.6/781-04-v6.9-net-phy-realtek-use-generic-MDIO-helpers-to-simplify.patch
new file mode 100644
index 0000000000..86db2df76b
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-04-v6.9-net-phy-realtek-use-generic-MDIO-helpers-to-simplify.patch
@@ -0,0 +1,52 @@
+From b63cc73341e076961d564a74cc3d29b2fd444079 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Thu, 8 Feb 2024 07:59:18 +0100
+Subject: [PATCH] net: phy: realtek: use generic MDIO helpers to simplify the
+ code
+
+Use generic MDIO helpers to simplify the code.
+
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://lore.kernel.org/r/422ae70f-7305-45fd-ab3e-0dd604b9fd6c@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek.c | 20 +++-----------------
+ 1 file changed, 3 insertions(+), 17 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -682,14 +682,7 @@ static int rtl822x_config_aneg(struct ph
+ 	int ret = 0;
+ 
+ 	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		u16 adv = 0;
+-
+-		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+-				      phydev->advertising))
+-			adv |= MDIO_AN_10GBT_CTRL_ADV2_5G;
+-		if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+-				      phydev->advertising))
+-			adv |= MDIO_AN_10GBT_CTRL_ADV5G;
++		u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
+ 
+ 		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
+ 					       MDIO_AN_10GBT_CTRL_ADV2_5G |
+@@ -712,15 +705,8 @@ static int rtl822x_read_status(struct ph
+ 		if (lpadv < 0)
+ 			return lpadv;
+ 
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
+-				 phydev->lp_advertising,
+-				 lpadv & MDIO_AN_10GBT_STAT_LP10G);
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+-				 phydev->lp_advertising,
+-				 lpadv & MDIO_AN_10GBT_STAT_LP5G);
+-		linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+-				 phydev->lp_advertising,
+-				 lpadv & MDIO_AN_10GBT_STAT_LP2_5G);
++		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising,
++						  lpadv);
+ 	}
+ 
+ 	ret = genphy_read_status(phydev);
diff --git a/target/linux/generic/backport-6.6/781-05-v6.10-net-phy-realtek-configure-SerDes-mode-for-rtl822xb-P.patch b/target/linux/generic/backport-6.6/781-05-v6.10-net-phy-realtek-configure-SerDes-mode-for-rtl822xb-P.patch
new file mode 100644
index 0000000000..ba24ca3a16
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-05-v6.10-net-phy-realtek-configure-SerDes-mode-for-rtl822xb-P.patch
@@ -0,0 +1,209 @@
+From deb8af5243504e379878ae3f9a091b21422d65b2 Mon Sep 17 00:00:00 2001
+From: Alexander Couzens <lynxis@fe80.eu>
+Date: Tue, 9 Apr 2024 09:30:11 +0200
+Subject: [PATCH] net: phy: realtek: configure SerDes mode for rtl822xb PHYs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The rtl8221b and rtl8226b series support switching SerDes mode between
+2500base-x and sgmii based on the negotiated copper speed.
+
+Configure this switching mode according to SerDes modes supported by
+host.
+
+There is an additional datasheet for RTL8226B/RTL8221B called
+"SERDES MODE SETTING FLOW APPLICATION NOTE" where a sequence is
+described to setup interface and rate adapter mode.
+
+However, there is no documentation about the meaning of registers
+and bits, it's literally just magic numbers and pseudo-code.
+
+Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
+[ refactored, dropped HiSGMII mode and changed commit message ]
+Signed-off-by: Marek Behún <kabel@kernel.org>
+[ changed rtl822x_update_interface() to use vendor register ]
+[ always fill in possible interfaces ]
+[ only apply to rtl8221b and rtl8226b phy's ]
+[ set phydev->rate_matching in .config_init() ]
+Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
+
+Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Reviewed-by: should come before them, without any blank lines. As the
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 114 ++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 110 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -54,6 +54,16 @@
+ 						 RTL8201F_ISR_LINK)
+ #define RTL8201F_IER				0x13
+ 
++#define RTL822X_VND1_SERDES_OPTION			0x697a
++#define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)
++#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII		0
++#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX		2
++
++#define RTL822X_VND1_SERDES_CTRL3			0x7580
++#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK		GENMASK(5, 0)
++#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
++#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
++
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+@@ -659,6 +669,63 @@ static int rtl822x_write_mmd(struct phy_
+ 	return ret;
+ }
+ 
++static int rtl822xb_config_init(struct phy_device *phydev)
++{
++	bool has_2500, has_sgmii;
++	u16 mode;
++	int ret;
++
++	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
++			    phydev->host_interfaces) ||
++		   phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
++
++	has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
++			     phydev->host_interfaces) ||
++		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
++
++	/* fill in possible interfaces */
++	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
++		     has_2500);
++	__assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
++		     has_sgmii);
++
++	if (!has_2500 && !has_sgmii)
++		return 0;
++
++	/* determine SerDes option mode */
++	if (has_2500 && !has_sgmii) {
++		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
++		phydev->rate_matching = RATE_MATCH_PAUSE;
++	} else {
++		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
++		phydev->rate_matching = RATE_MATCH_NONE;
++	}
++
++	/* the following sequence with magic numbers sets up the SerDes
++	 * option mode
++	 */
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
++				     RTL822X_VND1_SERDES_OPTION,
++				     RTL822X_VND1_SERDES_OPTION_MODE_MASK,
++				     mode);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
++	if (ret < 0)
++		return ret;
++
++	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
++}
++
+ static int rtl822x_get_features(struct phy_device *phydev)
+ {
+ 	int val;
+@@ -695,6 +762,28 @@ static int rtl822x_config_aneg(struct ph
+ 	return __genphy_config_aneg(phydev, ret);
+ }
+ 
++static void rtl822xb_update_interface(struct phy_device *phydev)
++{
++	int val;
++
++	if (!phydev->link)
++		return;
++
++	/* Change interface according to serdes mode */
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
++	if (val < 0)
++		return;
++
++	switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
++	case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
++		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
++		break;
++	case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
++		phydev->interface = PHY_INTERFACE_MODE_SGMII;
++		break;
++	}
++}
++
+ static int rtl822x_read_status(struct phy_device *phydev)
+ {
+ 	int ret;
+@@ -716,6 +805,19 @@ static int rtl822x_read_status(struct ph
+ 	return rtlgen_get_speed(phydev);
+ }
+ 
++static int rtl822xb_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822x_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	rtl822xb_update_interface(phydev);
++
++	return 0;
++}
++
+ static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
+ {
+ 	int val;
+@@ -988,7 +1090,8 @@ static struct phy_driver realtek_drvs[]
+ 		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
+ 		.get_features	= rtl822x_get_features,
+ 		.config_aneg	= rtl822x_config_aneg,
+-		.read_status	= rtl822x_read_status,
++		.config_init    = rtl822xb_config_init,
++		.read_status	= rtl822xb_read_status,
+ 		.suspend	= genphy_suspend,
+ 		.resume		= rtlgen_resume,
+ 		.read_page	= rtl821x_read_page,
+@@ -1010,7 +1113,8 @@ static struct phy_driver realtek_drvs[]
+ 		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
++		.config_init    = rtl822xb_config_init,
++		.read_status    = rtl822xb_read_status,
+ 		.suspend        = genphy_suspend,
+ 		.resume         = rtlgen_resume,
+ 		.read_page      = rtl821x_read_page,
+@@ -1020,7 +1124,8 @@ static struct phy_driver realtek_drvs[]
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY",
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
++		.config_init    = rtl822xb_config_init,
++		.read_status    = rtl822xb_read_status,
+ 		.suspend        = genphy_suspend,
+ 		.resume         = rtlgen_resume,
+ 		.read_page      = rtl821x_read_page,
+@@ -1030,7 +1135,8 @@ static struct phy_driver realtek_drvs[]
+ 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY",
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
++		.config_init    = rtl822xb_config_init,
++		.read_status    = rtl822xb_read_status,
+ 		.suspend        = genphy_suspend,
+ 		.resume         = rtlgen_resume,
+ 		.read_page      = rtl821x_read_page,
diff --git a/target/linux/generic/backport-6.6/781-06-v6.10-net-phy-realtek-add-get_rate_matching-for-rtl822xb-P.patch b/target/linux/generic/backport-6.6/781-06-v6.10-net-phy-realtek-add-get_rate_matching-for-rtl822xb-P.patch
new file mode 100644
index 0000000000..609ae1a028
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-06-v6.10-net-phy-realtek-add-get_rate_matching-for-rtl822xb-P.patch
@@ -0,0 +1,77 @@
+From c189dbd738243be6775bb6878366bf63e27bfd05 Mon Sep 17 00:00:00 2001
+From: Eric Woudstra <ericwouds@gmail.com>
+Date: Tue, 9 Apr 2024 09:30:12 +0200
+Subject: [PATCH] net: phy: realtek: add get_rate_matching() for rtl822xb PHYs
+
+Uses vendor register to determine if SerDes is setup in rate-matching mode.
+
+Rate-matching only supported when SerDes is set to 2500base-x.
+
+Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -726,6 +726,27 @@ static int rtl822xb_config_init(struct p
+ 	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
+ }
+ 
++static int rtl822xb_get_rate_matching(struct phy_device *phydev,
++				      phy_interface_t iface)
++{
++	int val;
++
++	/* Only rate matching at 2500base-x */
++	if (iface != PHY_INTERFACE_MODE_2500BASEX)
++		return RATE_MATCH_NONE;
++
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_OPTION);
++	if (val < 0)
++		return val;
++
++	if ((val & RTL822X_VND1_SERDES_OPTION_MODE_MASK) ==
++	    RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX)
++		return RATE_MATCH_PAUSE;
++
++	/* RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII */
++	return RATE_MATCH_NONE;
++}
++
+ static int rtl822x_get_features(struct phy_device *phydev)
+ {
+ 	int val;
+@@ -1091,6 +1112,7 @@ static struct phy_driver realtek_drvs[]
+ 		.get_features	= rtl822x_get_features,
+ 		.config_aneg	= rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.read_status	= rtl822xb_read_status,
+ 		.suspend	= genphy_suspend,
+ 		.resume		= rtlgen_resume,
+@@ -1114,6 +1136,7 @@ static struct phy_driver realtek_drvs[]
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.read_status    = rtl822xb_read_status,
+ 		.suspend        = genphy_suspend,
+ 		.resume         = rtlgen_resume,
+@@ -1125,6 +1148,7 @@ static struct phy_driver realtek_drvs[]
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.read_status    = rtl822xb_read_status,
+ 		.suspend        = genphy_suspend,
+ 		.resume         = rtlgen_resume,
+@@ -1136,6 +1160,7 @@ static struct phy_driver realtek_drvs[]
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.read_status    = rtl822xb_read_status,
+ 		.suspend        = genphy_suspend,
+ 		.resume         = rtlgen_resume,
diff --git a/target/linux/generic/backport-6.6/781-07-v6.10-net-phy-realtek-Add-driver-instances-for-rtl8221b-vi.patch b/target/linux/generic/backport-6.6/781-07-v6.10-net-phy-realtek-Add-driver-instances-for-rtl8221b-vi.patch
new file mode 100644
index 0000000000..5366c72f9c
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-07-v6.10-net-phy-realtek-Add-driver-instances-for-rtl8221b-vi.patch
@@ -0,0 +1,218 @@
+From ad5ce743a6b0329f642d80be50ef7b534e908fba Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Tue, 9 Apr 2024 09:30:13 +0200
+Subject: [PATCH] net: phy: realtek: Add driver instances for rtl8221b via
+ Clause 45
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Collected from several commits in [PATCH net-next]
+"Realtek RTL822x PHY rework to c45 and SerDes interface switching"
+
+The instances are used by Clause 45 only accessible PHY's on several sfp
+modules, which are using RollBall protocol.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+[ Added matching functions to differentiate C45 instances ]
+Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
+
+Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 135 ++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 131 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -64,6 +64,13 @@
+ #define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
+ #define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
+ 
++/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
++ * is set, they cannot be accessed by C45-over-C22.
++ */
++#define RTL822X_VND2_GBCR				0xa412
++
++#define RTL822X_VND2_GANLPAR				0xa414
++
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+@@ -74,6 +81,9 @@
+ 
+ #define RTL_GENERIC_PHYID			0x001cc800
+ #define RTL_8211FVD_PHYID			0x001cc878
++#define RTL_8221B_VB_CG				0x001cc849
++#define RTL_8221B_VN_CG				0x001cc84a
++#define RTL_8251B				0x001cc862
+ 
+ MODULE_DESCRIPTION("Realtek PHY driver");
+ MODULE_AUTHOR("Johnson Leung");
+@@ -839,6 +849,67 @@ static int rtl822xb_read_status(struct p
+ 	return 0;
+ }
+ 
++static int rtl822x_c45_config_aneg(struct phy_device *phydev)
++{
++	bool changed = false;
++	int ret, val;
++
++	if (phydev->autoneg == AUTONEG_DISABLE)
++		return genphy_c45_pma_setup_forced(phydev);
++
++	ret = genphy_c45_an_config_aneg(phydev);
++	if (ret < 0)
++		return ret;
++	if (ret > 0)
++		changed = true;
++
++	val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
++
++	/* Vendor register as C45 has no standardized support for 1000BaseT */
++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
++				     ADVERTISE_1000FULL, val);
++	if (ret < 0)
++		return ret;
++	if (ret > 0)
++		changed = true;
++
++	return genphy_c45_check_and_restart_aneg(phydev, changed);
++}
++
++static int rtl822x_c45_read_status(struct phy_device *phydev)
++{
++	int ret, val;
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	/* Vendor register as C45 has no standardized support for 1000BaseT */
++	if (phydev->autoneg == AUTONEG_ENABLE) {
++		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
++				   RTL822X_VND2_GANLPAR);
++		if (val < 0)
++			return val;
++
++		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	}
++
++	return 0;
++}
++
++static int rtl822xb_c45_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822x_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	rtl822xb_update_interface(phydev);
++
++	return 0;
++}
++
+ static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
+ {
+ 	int val;
+@@ -862,6 +933,35 @@ static int rtl8226_match_phy_device(stru
+ 	       rtlgen_supports_2_5gbps(phydev);
+ }
+ 
++static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
++			       bool is_c45)
++{
++	if (phydev->is_c45)
++		return is_c45 && (id == phydev->c45_ids.device_ids[1]);
++	else
++		return !is_c45 && (id == phydev->phy_id);
++}
++
++static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
++}
++
++static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
++}
++
++static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
++}
++
++static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
++}
++
+ static int rtlgen_resume(struct phy_device *phydev)
+ {
+ 	int ret = genphy_resume(phydev);
+@@ -872,6 +972,15 @@ static int rtlgen_resume(struct phy_devi
+ 	return ret;
+ }
+ 
++static int rtlgen_c45_resume(struct phy_device *phydev)
++{
++	int ret = genphy_c45_pma_resume(phydev);
++
++	msleep(20);
++
++	return ret;
++}
++
+ static int rtl9000a_config_init(struct phy_device *phydev)
+ {
+ 	phydev->autoneg = AUTONEG_DISABLE;
+@@ -1143,8 +1252,8 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc849),
+-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY",
++		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
++		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1155,8 +1264,17 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc84a),
+-		.name           = "RTL8221B-VM-CG 2.5Gbps PHY",
++		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
++		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822xb_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
++		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1167,6 +1285,15 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
++		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
++		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822xb_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc862),
+ 		.name           = "RTL8251B 5Gbps PHY",
+ 		.get_features   = rtl822x_get_features,
diff --git a/target/linux/generic/backport-6.6/781-08-v6.10-net-phy-realtek-Change-rtlgen_get_speed-to-rtlgen_de.patch b/target/linux/generic/backport-6.6/781-08-v6.10-net-phy-realtek-Change-rtlgen_get_speed-to-rtlgen_de.patch
new file mode 100644
index 0000000000..5c7130d2e0
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-08-v6.10-net-phy-realtek-Change-rtlgen_get_speed-to-rtlgen_de.patch
@@ -0,0 +1,125 @@
+From 2e4ea707c7e04eb83e58c43e0e744bbdf6b23ff2 Mon Sep 17 00:00:00 2001
+From: Eric Woudstra <ericwouds@gmail.com>
+Date: Tue, 9 Apr 2024 09:30:14 +0200
+Subject: [PATCH] net: phy: realtek: Change rtlgen_get_speed() to
+ rtlgen_decode_speed()
+
+The value of the register to determine the speed, is retrieved
+differently when using Clause 45 only. To use the rtlgen_get_speed()
+function in this case, pass the value of the register as argument to
+rtlgen_get_speed(). The function would then always return 0, so change it
+to void. A better name for this function now is rtlgen_decode_speed().
+
+Replace a call to genphy_read_status() followed by rtlgen_get_speed()
+with a call to rtlgen_read_status() in rtl822x_read_status().
+
+Add reading speed to rtl822x_c45_read_status().
+
+Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
+
+Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 46 +++++++++++++++++++++------------------
+ 1 file changed, 25 insertions(+), 21 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -71,6 +71,8 @@
+ 
+ #define RTL822X_VND2_GANLPAR				0xa414
+ 
++#define RTL822X_VND2_PHYSR				0xa434
++
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+@@ -551,17 +553,8 @@ static int rtl8366rb_config_init(struct
+ }
+ 
+ /* get actual speed to cover the downshift case */
+-static int rtlgen_get_speed(struct phy_device *phydev)
++static void rtlgen_decode_speed(struct phy_device *phydev, int val)
+ {
+-	int val;
+-
+-	if (!phydev->link)
+-		return 0;
+-
+-	val = phy_read_paged(phydev, 0xa43, 0x12);
+-	if (val < 0)
+-		return val;
+-
+ 	switch (val & RTLGEN_SPEED_MASK) {
+ 	case 0x0000:
+ 		phydev->speed = SPEED_10;
+@@ -584,19 +577,26 @@ static int rtlgen_get_speed(struct phy_d
+ 	default:
+ 		break;
+ 	}
+-
+-	return 0;
+ }
+ 
+ static int rtlgen_read_status(struct phy_device *phydev)
+ {
+-	int ret;
++	int ret, val;
+ 
+ 	ret = genphy_read_status(phydev);
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	return rtlgen_get_speed(phydev);
++	if (!phydev->link)
++		return 0;
++
++	val = phy_read_paged(phydev, 0xa43, 0x12);
++	if (val < 0)
++		return val;
++
++	rtlgen_decode_speed(phydev, val);
++
++	return 0;
+ }
+ 
+ static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+@@ -817,8 +817,6 @@ static void rtl822xb_update_interface(st
+ 
+ static int rtl822x_read_status(struct phy_device *phydev)
+ {
+-	int ret;
+-
+ 	if (phydev->autoneg == AUTONEG_ENABLE) {
+ 		int lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ 
+@@ -829,11 +827,7 @@ static int rtl822x_read_status(struct ph
+ 						  lpadv);
+ 	}
+ 
+-	ret = genphy_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	return rtlgen_get_speed(phydev);
++	return rtlgen_read_status(phydev);
+ }
+ 
+ static int rtl822xb_read_status(struct phy_device *phydev)
+@@ -894,6 +888,16 @@ static int rtl822x_c45_read_status(struc
+ 		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+ 	}
+ 
++	if (!phydev->link)
++		return 0;
++
++	/* Read actual speed from vendor register. */
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_PHYSR);
++	if (val < 0)
++		return val;
++
++	rtlgen_decode_speed(phydev, val);
++
+ 	return 0;
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/781-09-v6.10-net-phy-realtek-add-rtl822x_c45_get_features-to-set-.patch b/target/linux/generic/backport-6.6/781-09-v6.10-net-phy-realtek-add-rtl822x_c45_get_features-to-set-.patch
new file mode 100644
index 0000000000..ed29dcd3e6
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-09-v6.10-net-phy-realtek-add-rtl822x_c45_get_features-to-set-.patch
@@ -0,0 +1,48 @@
+From 2d9ce64862705b33397d54dafecc5f51d8b1bb06 Mon Sep 17 00:00:00 2001
+From: Eric Woudstra <ericwouds@gmail.com>
+Date: Tue, 9 Apr 2024 09:30:15 +0200
+Subject: [PATCH] net: phy: realtek: add rtl822x_c45_get_features() to set
+ supported port
+
+Sets ETHTOOL_LINK_MODE_TP_BIT in phydev->supported.
+
+Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -843,6 +843,14 @@ static int rtl822xb_read_status(struct p
+ 	return 0;
+ }
+ 
++static int rtl822x_c45_get_features(struct phy_device *phydev)
++{
++	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
++			 phydev->supported);
++
++	return genphy_c45_pma_read_abilities(phydev);
++}
++
+ static int rtl822x_c45_config_aneg(struct phy_device *phydev)
+ {
+ 	bool changed = false;
+@@ -1272,6 +1280,7 @@ static struct phy_driver realtek_drvs[]
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
++		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
+ 		.read_status    = rtl822xb_c45_read_status,
+ 		.suspend        = genphy_c45_pma_suspend,
+@@ -1293,6 +1302,7 @@ static struct phy_driver realtek_drvs[]
+ 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
++		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
+ 		.read_status    = rtl822xb_c45_read_status,
+ 		.suspend        = genphy_c45_pma_suspend,
diff --git a/target/linux/generic/backport-6.6/781-10-v6.11-net-phy-realtek-add-support-for-rtl8224-2.5Gbps-PHY.patch b/target/linux/generic/backport-6.6/781-10-v6.11-net-phy-realtek-add-support-for-rtl8224-2.5Gbps-PHY.patch
new file mode 100644
index 0000000000..13e1d883a3
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-10-v6.11-net-phy-realtek-add-support-for-rtl8224-2.5Gbps-PHY.patch
@@ -0,0 +1,33 @@
+From 9e42a2ea7f6703e2092c39171c2bf1fd7eec0bd3 Mon Sep 17 00:00:00 2001
+From: Chris Packham <chris.packham@alliedtelesis.co.nz>
+Date: Tue, 11 Jun 2024 17:34:14 +1200
+Subject: [PATCH] net: phy: realtek: add support for rtl8224 2.5Gbps PHY
+
+The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the
+clause 45 MDIO interface and can leverage the support that has already
+been added for the other 822x PHYs.
+
+Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
+Link: https://lore.kernel.org/r/20240611053415.2111723-1-chris.packham@alliedtelesis.co.nz
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1318,6 +1318,14 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
++		PHY_ID_MATCH_EXACT(0x001ccad0),
++		.name		= "RTL8224 2.5Gbps PHY",
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822x_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc961),
+ 		.name		= "RTL8366RB Gigabit Ethernet",
+ 		.config_init	= &rtl8366rb_config_init,
diff --git a/target/linux/generic/backport-6.6/781-11-v6.11-net-phy-realtek-Add-support-for-PHY-LEDs-on-RTL8211F.patch b/target/linux/generic/backport-6.6/781-11-v6.11-net-phy-realtek-Add-support-for-PHY-LEDs-on-RTL8211F.patch
new file mode 100644
index 0000000000..12c8ae66b5
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-11-v6.11-net-phy-realtek-Add-support-for-PHY-LEDs-on-RTL8211F.patch
@@ -0,0 +1,151 @@
+From 17784801d888238571a0c4101b9ac4401fffeaa0 Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Tue, 25 Jun 2024 22:42:17 +0200
+Subject: [PATCH] net: phy: realtek: Add support for PHY LEDs on RTL8211F
+
+Realtek RTL8211F Ethernet PHY supports 3 LED pins which are used to
+indicate link status and activity. Add minimal LED controller driver
+supporting the most common uses with the 'netdev' trigger.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek.c | 106 ++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 106 insertions(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -32,6 +32,15 @@
+ #define RTL8211F_PHYCR2				0x19
+ #define RTL8211F_INSR				0x1d
+ 
++#define RTL8211F_LEDCR				0x10
++#define RTL8211F_LEDCR_MODE			BIT(15)
++#define RTL8211F_LEDCR_ACT_TXRX			BIT(4)
++#define RTL8211F_LEDCR_LINK_1000		BIT(3)
++#define RTL8211F_LEDCR_LINK_100			BIT(1)
++#define RTL8211F_LEDCR_LINK_10			BIT(0)
++#define RTL8211F_LEDCR_MASK			GENMASK(4, 0)
++#define RTL8211F_LEDCR_SHIFT			5
++
+ #define RTL8211F_TX_DELAY			BIT(8)
+ #define RTL8211F_RX_DELAY			BIT(3)
+ 
+@@ -87,6 +96,8 @@
+ #define RTL_8221B_VN_CG				0x001cc84a
+ #define RTL_8251B				0x001cc862
+ 
++#define RTL8211F_LED_COUNT			3
++
+ MODULE_DESCRIPTION("Realtek PHY driver");
+ MODULE_AUTHOR("Johnson Leung");
+ MODULE_LICENSE("GPL");
+@@ -476,6 +487,98 @@ static int rtl821x_resume(struct phy_dev
+ 	return 0;
+ }
+ 
++static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,
++					unsigned long rules)
++{
++	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK_10) |
++				   BIT(TRIGGER_NETDEV_LINK_100) |
++				   BIT(TRIGGER_NETDEV_LINK_1000) |
++				   BIT(TRIGGER_NETDEV_RX) |
++				   BIT(TRIGGER_NETDEV_TX);
++
++	/* The RTL8211F PHY supports these LED settings on up to three LEDs:
++	 * - Link: Configurable subset of 10/100/1000 link rates
++	 * - Active: Blink on activity, RX or TX is not differentiated
++	 * The Active option has two modes, A and B:
++	 * - A: Link and Active indication at configurable, but matching,
++	 *      subset of 10/100/1000 link rates
++	 * - B: Link indication at configurable subset of 10/100/1000 link
++	 *      rates and Active indication always at all three 10+100+1000
++	 *      link rates.
++	 * This code currently uses mode B only.
++	 */
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	/* Filter out any other unsupported triggers. */
++	if (rules & ~mask)
++		return -EOPNOTSUPP;
++
++	/* RX and TX are not differentiated, either both are set or not set. */
++	if (!(rules & BIT(TRIGGER_NETDEV_RX)) ^ !(rules & BIT(TRIGGER_NETDEV_TX)))
++		return -EOPNOTSUPP;
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,
++				       unsigned long *rules)
++{
++	int val;
++
++	val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
++	if (val < 0)
++		return val;
++
++	val >>= RTL8211F_LEDCR_SHIFT * index;
++	val &= RTL8211F_LEDCR_MASK;
++
++	if (val & RTL8211F_LEDCR_LINK_10)
++		set_bit(TRIGGER_NETDEV_LINK_10, rules);
++
++	if (val & RTL8211F_LEDCR_LINK_100)
++		set_bit(TRIGGER_NETDEV_LINK_100, rules);
++
++	if (val & RTL8211F_LEDCR_LINK_1000)
++		set_bit(TRIGGER_NETDEV_LINK_1000, rules);
++
++	if (val & RTL8211F_LEDCR_ACT_TXRX) {
++		set_bit(TRIGGER_NETDEV_RX, rules);
++		set_bit(TRIGGER_NETDEV_TX, rules);
++	}
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,
++				       unsigned long rules)
++{
++	const u16 mask = RTL8211F_LEDCR_MASK << (RTL8211F_LEDCR_SHIFT * index);
++	u16 reg = RTL8211F_LEDCR_MODE;	/* Mode B */
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
++		reg |= RTL8211F_LEDCR_LINK_10;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
++		reg |= RTL8211F_LEDCR_LINK_100;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
++		reg |= RTL8211F_LEDCR_LINK_1000;
++
++	if (test_bit(TRIGGER_NETDEV_RX, &rules) ||
++	    test_bit(TRIGGER_NETDEV_TX, &rules)) {
++		reg |= RTL8211F_LEDCR_ACT_TXRX;
++	}
++
++	reg <<= RTL8211F_LEDCR_SHIFT * index;
++
++	return phy_modify_paged(phydev, 0xd04, RTL8211F_LEDCR, mask, reg);
++}
++
+ static int rtl8211e_config_init(struct phy_device *phydev)
+ {
+ 	int ret = 0, oldpage;
+@@ -1192,6 +1295,9 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page	= rtl821x_read_page,
+ 		.write_page	= rtl821x_write_page,
+ 		.flags		= PHY_ALWAYS_CALL_SUSPEND,
++		.led_hw_is_supported = rtl8211f_led_hw_is_supported,
++		.led_hw_control_get = rtl8211f_led_hw_control_get,
++		.led_hw_control_set = rtl8211f_led_hw_control_set,
+ 	}, {
+ 		PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID),
+ 		.name		= "RTL8211F-VD Gigabit Ethernet",
diff --git a/target/linux/generic/backport-6.6/801-v6.11-gpio-mmio-do-not-calculate-bgpio_bits-via-ngpios.patch b/target/linux/generic/backport-6.6/801-v6.11-gpio-mmio-do-not-calculate-bgpio_bits-via-ngpios.patch
deleted file mode 100644
index 117c879e48..0000000000
--- a/target/linux/generic/backport-6.6/801-v6.11-gpio-mmio-do-not-calculate-bgpio_bits-via-ngpios.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From f07798d7bb9c46d17d80103fb772fd2c75d47919 Mon Sep 17 00:00:00 2001
-From: Shiji Yang <yangshiji66@outlook.com>
-Date: Tue, 25 Jun 2024 09:19:49 +0800
-Subject: [PATCH] gpio: mmio: do not calculate bgpio_bits via "ngpios"
-
-bgpio_bits must be aligned with the data bus width. For example, on a
-32 bit big endian system and we only have 16 GPIOs. If we only assume
-bgpio_bits=16 we can never control the GPIO because the base address
-is the lowest address.
-
-low address                          high address
--------------------------------------------------
-|   byte3   |   byte2   |   byte1   |   byte0   |
--------------------------------------------------
-|    NaN    |    NaN    |  gpio8-15 |  gpio0-7  |
--------------------------------------------------
-
-Fixes: 55b2395e4e92 ("gpio: mmio: handle "ngpios" properly in bgpio_init()")
-Fixes: https://github.com/openwrt/openwrt/issues/15739
-Reported-by: Mark Mentovai <mark@mentovai.com>
-Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
-Suggested-By: Mark Mentovai <mark@mentovai.com>
-Reviewed-by: Jonas Gorski <jonas.gorski@gmail.com>
-Tested-by: Lóránd Horváth <lorand.horvath82@gmail.com>
-Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
-Link: https://lore.kernel.org/r/TYCP286MB089577B47D70F0AB25ABA6F5BCD52@TYCP286MB0895.JPNP286.PROD.OUTLOOK.COM
-Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
----
- drivers/gpio/gpio-mmio.c | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/gpio/gpio-mmio.c
-+++ b/drivers/gpio/gpio-mmio.c
-@@ -622,8 +622,6 @@ int bgpio_init(struct gpio_chip *gc, str
- 	ret = gpiochip_get_ngpios(gc, dev);
- 	if (ret)
- 		gc->ngpio = gc->bgpio_bits;
--	else
--		gc->bgpio_bits = roundup_pow_of_two(round_up(gc->ngpio, 8));
- 
- 	ret = bgpio_setup_io(gc, dat, set, clr, flags);
- 	if (ret)
diff --git a/target/linux/generic/backport-6.6/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch b/target/linux/generic/backport-6.6/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch
index 39be82d4bf..36d15248b8 100644
--- a/target/linux/generic/backport-6.6/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch
+++ b/target/linux/generic/backport-6.6/816-v6.7-0004-Revert-nvmem-add-new-config-option.patch
@@ -48,7 +48,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	mtd->nvmem = nvmem_register(&config);
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -941,7 +941,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -940,7 +940,7 @@ struct nvmem_device *nvmem_register(cons
  	nvmem->nkeepout = config->nkeepout;
  	if (config->of_node)
  		nvmem->dev.of_node = config->of_node;
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch b/target/linux/generic/backport-6.6/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch
index 59175c8051..7ca426e87a 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0001-nvmem-Move-of_nvmem_layout_get_container-in-another-.patch
@@ -25,7 +25,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -847,14 +847,6 @@ static int nvmem_add_cells_from_layout(s
+@@ -846,14 +846,6 @@ static int nvmem_add_cells_from_layout(s
  }
  
  #if IS_ENABLED(CONFIG_OF)
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch b/target/linux/generic/backport-6.6/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch
index 1f39dfea2f..dac691e117 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0003-nvmem-Simplify-the-add_cells-hook.patch
@@ -20,7 +20,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -816,7 +816,7 @@ static int nvmem_add_cells_from_layout(s
+@@ -815,7 +815,7 @@ static int nvmem_add_cells_from_layout(s
  	int ret;
  
  	if (layout && layout->add_cells) {
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch b/target/linux/generic/backport-6.6/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch
index d2c274033e..0a614fc13d 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0004-nvmem-Move-and-rename-fixup_cell_info.patch
@@ -25,7 +25,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -675,7 +675,6 @@ static int nvmem_validate_keepouts(struc
+@@ -674,7 +674,6 @@ static int nvmem_validate_keepouts(struc
  
  static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_node *np)
  {
@@ -33,7 +33,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	struct device *dev = &nvmem->dev;
  	struct device_node *child;
  	const __be32 *addr;
-@@ -705,8 +704,8 @@ static int nvmem_add_cells_from_dt(struc
+@@ -704,8 +703,8 @@ static int nvmem_add_cells_from_dt(struc
  
  		info.np = of_node_get(child);
  
@@ -44,7 +44,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  		ret = nvmem_add_one_cell(nvmem, &info);
  		kfree(info.name);
-@@ -895,6 +894,7 @@ struct nvmem_device *nvmem_register(cons
+@@ -894,6 +893,7 @@ struct nvmem_device *nvmem_register(cons
  
  	kref_init(&nvmem->refcnt);
  	INIT_LIST_HEAD(&nvmem->cells);
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch b/target/linux/generic/backport-6.6/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch
index ce33b52328..1a41050d08 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0005-nvmem-core-Rework-layouts-to-become-regular-devices.patch
@@ -84,7 +84,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  static int __nvmem_reg_read(struct nvmem_device *nvmem, unsigned int offset,
  			    void *val, size_t bytes)
  {
-@@ -740,97 +737,22 @@ static int nvmem_add_cells_from_fixed_la
+@@ -739,97 +736,22 @@ static int nvmem_add_cells_from_fixed_la
  	return err;
  }
  
@@ -189,7 +189,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  const void *nvmem_layout_get_match_data(struct nvmem_device *nvmem,
  					struct nvmem_layout *layout)
  {
-@@ -838,7 +760,7 @@ const void *nvmem_layout_get_match_data(
+@@ -837,7 +759,7 @@ const void *nvmem_layout_get_match_data(
  	const struct of_device_id *match;
  
  	layout_np = of_nvmem_layout_get_container(nvmem);
@@ -198,7 +198,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	return match ? match->data : NULL;
  }
-@@ -950,19 +872,6 @@ struct nvmem_device *nvmem_register(cons
+@@ -949,19 +871,6 @@ struct nvmem_device *nvmem_register(cons
  			goto err_put_device;
  	}
  
@@ -218,7 +218,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (config->cells) {
  		rval = nvmem_add_cells(nvmem, config->cells, config->ncells);
  		if (rval)
-@@ -983,24 +892,24 @@ struct nvmem_device *nvmem_register(cons
+@@ -982,24 +891,24 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_cells;
  
@@ -249,7 +249,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	if (config->compat)
  		nvmem_sysfs_remove_compat(nvmem, config);
  err_put_device:
-@@ -1022,7 +931,7 @@ static void nvmem_device_release(struct
+@@ -1021,7 +930,7 @@ static void nvmem_device_release(struct
  		device_remove_bin_file(nvmem->base_dev, &nvmem->eeprom);
  
  	nvmem_device_remove_all_cells(nvmem);
@@ -258,7 +258,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  	device_unregister(&nvmem->dev);
  }
  
-@@ -1324,6 +1233,12 @@ nvmem_cell_get_from_lookup(struct device
+@@ -1323,6 +1232,12 @@ nvmem_cell_get_from_lookup(struct device
  	return cell;
  }
  
@@ -271,7 +271,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  #if IS_ENABLED(CONFIG_OF)
  static struct nvmem_cell_entry *
  nvmem_find_cell_entry_by_node(struct nvmem_device *nvmem, struct device_node *np)
-@@ -1342,6 +1257,18 @@ nvmem_find_cell_entry_by_node(struct nvm
+@@ -1341,6 +1256,18 @@ nvmem_find_cell_entry_by_node(struct nvm
  	return cell;
  }
  
@@ -290,7 +290,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  /**
   * of_nvmem_cell_get() - Get a nvmem cell from given device node and cell id
   *
-@@ -1404,16 +1331,29 @@ struct nvmem_cell *of_nvmem_cell_get(str
+@@ -1403,16 +1330,29 @@ struct nvmem_cell *of_nvmem_cell_get(str
  		return ERR_CAST(nvmem);
  	}
  
@@ -322,7 +322,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  
  	return cell;
  }
-@@ -1527,6 +1467,7 @@ void nvmem_cell_put(struct nvmem_cell *c
+@@ -1526,6 +1466,7 @@ void nvmem_cell_put(struct nvmem_cell *c
  
  	kfree(cell);
  	__nvmem_device_put(nvmem);
@@ -330,7 +330,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  }
  EXPORT_SYMBOL_GPL(nvmem_cell_put);
  
-@@ -2104,11 +2045,22 @@ EXPORT_SYMBOL_GPL(nvmem_dev_name);
+@@ -2103,11 +2044,22 @@ EXPORT_SYMBOL_GPL(nvmem_dev_name);
  
  static int __init nvmem_init(void)
  {
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch b/target/linux/generic/backport-6.6/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch
index 4a1f9aefc8..8442636b09 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0006-nvmem-core-Expose-cells-through-sysfs.patch
@@ -111,7 +111,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  static struct bin_attribute bin_attr_nvmem_eeprom_compat = {
  	.attr	= {
  		.name	= "eeprom",
-@@ -380,6 +427,68 @@ static void nvmem_sysfs_remove_compat(st
+@@ -379,6 +426,68 @@ static void nvmem_sysfs_remove_compat(st
  		device_remove_bin_file(nvmem->base_dev, &nvmem->eeprom);
  }
  
@@ -180,7 +180,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  #else /* CONFIG_NVMEM_SYSFS */
  
  static int nvmem_sysfs_setup_compat(struct nvmem_device *nvmem,
-@@ -739,11 +848,25 @@ static int nvmem_add_cells_from_fixed_la
+@@ -738,11 +847,25 @@ static int nvmem_add_cells_from_fixed_la
  
  int nvmem_layout_register(struct nvmem_layout *layout)
  {
@@ -207,7 +207,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  }
  EXPORT_SYMBOL_GPL(nvmem_layout_register);
  
-@@ -902,10 +1025,20 @@ struct nvmem_device *nvmem_register(cons
+@@ -901,10 +1024,20 @@ struct nvmem_device *nvmem_register(cons
  	if (rval)
  		goto err_remove_dev;
  
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch b/target/linux/generic/backport-6.6/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch
index 400004c617..a95770a059 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0008-nvmem-layouts-refactor-.add_cells-callback-arguments.patch
@@ -44,7 +44,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -854,7 +854,7 @@ int nvmem_layout_register(struct nvmem_l
+@@ -853,7 +853,7 @@ int nvmem_layout_register(struct nvmem_l
  		return -EINVAL;
  
  	/* Populate the cells */
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch b/target/linux/generic/backport-6.6/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch
index 510f3dd841..291854bcb5 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0009-nvmem-drop-nvmem_layout_get_match_data.patch
@@ -24,7 +24,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -876,19 +876,6 @@ void nvmem_layout_unregister(struct nvme
+@@ -875,19 +875,6 @@ void nvmem_layout_unregister(struct nvme
  }
  EXPORT_SYMBOL_GPL(nvmem_layout_unregister);
  
diff --git a/target/linux/generic/backport-6.6/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch b/target/linux/generic/backport-6.6/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch
index ccdcc09736..93fd1ce6ad 100644
--- a/target/linux/generic/backport-6.6/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch
+++ b/target/linux/generic/backport-6.6/819-v6.8-0010-nvmem-core-add-nvmem_dev_size-helper.patch
@@ -21,7 +21,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/drivers/nvmem/core.c
 +++ b/drivers/nvmem/core.c
-@@ -2163,6 +2163,19 @@ const char *nvmem_dev_name(struct nvmem_
+@@ -2162,6 +2162,19 @@ const char *nvmem_dev_name(struct nvmem_
  }
  EXPORT_SYMBOL_GPL(nvmem_dev_name);
  
diff --git a/target/linux/generic/backport-6.6/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch b/target/linux/generic/backport-6.6/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch
index 2ae209f9e1..4571d7d2bf 100644
--- a/target/linux/generic/backport-6.6/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch
+++ b/target/linux/generic/backport-6.6/834-v6.8-leds-trigger-netdev-Extend-speeds-up-to-10G.patch
@@ -99,7 +99,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
  		interval = jiffies_to_msecs(
 --- a/include/linux/leds.h
 +++ b/include/linux/leds.h
-@@ -588,6 +588,9 @@ enum led_trigger_netdev_modes {
+@@ -586,6 +586,9 @@ enum led_trigger_netdev_modes {
  	TRIGGER_NETDEV_LINK_10,
  	TRIGGER_NETDEV_LINK_100,
  	TRIGGER_NETDEV_LINK_1000,
diff --git a/target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch b/target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
new file mode 100644
index 0000000000..8b54881ab0
--- /dev/null
+++ b/target/linux/generic/backport-6.6/836-v6.9-net-phy-aquantia-clear-PMD-Global-Transmit-Disable-b.patch
@@ -0,0 +1,103 @@
+From cffac22c9215f1883d3848c788f9b03656dced27 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Sun, 11 Feb 2024 18:39:19 +0100
+Subject: [PATCH] net: phy: aquantia: clear PMD Global Transmit Disable bit
+ during init
+
+PMD Global Transmit Disable bit should be cleared for normal operation.
+This should be HW default, however I found that on Asus RT-AX89X that uses
+AQR113C PHY and firmware 5.4 this bit is set by default.
+
+With this bit set the AQR cannot achieve a link with its link-partner and
+it took me multiple hours of digging through the vendor GPL source to find
+this out, so lets always clear this bit during .config_init() to avoid a
+situation like this in the future.
+
+aqr107_wait_processor_intensive_op() is moved up because datasheet notes
+that any changes to this bit are processor intensive.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/net/phy/aquantia/aquantia_main.c | 57 ++++++++++++++----------
+ 1 file changed, 33 insertions(+), 24 deletions(-)
+
+--- a/drivers/net/phy/aquantia/aquantia_main.c
++++ b/drivers/net/phy/aquantia/aquantia_main.c
+@@ -473,6 +473,30 @@ static void aqr107_chip_info(struct phy_
+ 		   fw_major, fw_minor, build_id, prov_id);
+ }
+ 
++static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
++{
++	int val, err;
++
++	/* The datasheet notes to wait at least 1ms after issuing a
++	 * processor intensive operation before checking.
++	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
++	 * because that just determines the maximum time slept, not the minimum.
++	 */
++	usleep_range(1000, 5000);
++
++	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
++					VEND1_GLOBAL_GEN_STAT2, val,
++					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
++					AQR107_OP_IN_PROG_SLEEP,
++					AQR107_OP_IN_PROG_TIMEOUT, false);
++	if (err) {
++		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
++		return err;
++	}
++
++	return 0;
++}
++
+ static int aqr107_config_init(struct phy_device *phydev)
+ {
+ 	struct aqr107_priv *priv = phydev->priv;
+@@ -498,6 +522,15 @@ static int aqr107_config_init(struct phy
+ 	if (!ret)
+ 		aqr107_chip_info(phydev);
+ 
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
++				 MDIO_PMD_TXDIS_GLOBAL);
++	if (ret)
++		return ret;
++
++	ret = aqr107_wait_processor_intensive_op(phydev);
++	if (ret)
++		return ret;
++
+ 	ret = aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+ 	if (ret)
+ 		return ret;
+@@ -580,30 +613,6 @@ static void aqr107_link_change_notify(st
+ 		phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");
+ }
+ 
+-static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)
+-{
+-	int val, err;
+-
+-	/* The datasheet notes to wait at least 1ms after issuing a
+-	 * processor intensive operation before checking.
+-	 * We cannot use the 'sleep_before_read' parameter of read_poll_timeout
+-	 * because that just determines the maximum time slept, not the minimum.
+-	 */
+-	usleep_range(1000, 5000);
+-
+-	err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
+-					VEND1_GLOBAL_GEN_STAT2, val,
+-					!(val & VEND1_GLOBAL_GEN_STAT2_OP_IN_PROG),
+-					AQR107_OP_IN_PROG_SLEEP,
+-					AQR107_OP_IN_PROG_TIMEOUT, false);
+-	if (err) {
+-		phydev_err(phydev, "timeout: processor-intensive MDIO operation\n");
+-		return err;
+-	}
+-
+-	return 0;
+-}
+-
+ static int aqr107_get_rate_matching(struct phy_device *phydev,
+ 				    phy_interface_t iface)
+ {
diff --git a/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch b/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch
index d9265cad10..48dd6ffb67 100644
--- a/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch
+++ b/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch
@@ -19,7 +19,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -3668,7 +3668,7 @@ static int mv88e6xxx_mdio_register(struc
+@@ -3669,7 +3669,7 @@ static int mv88e6xxx_mdio_register(struc
  
  	if (external) {
  		mv88e6xxx_reg_lock(chip);
diff --git a/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch b/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch
index 5661d50adb..e5931573f7 100644
--- a/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch
+++ b/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch
@@ -27,7 +27,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -3668,7 +3668,10 @@ static int mv88e6xxx_mdio_register(struc
+@@ -3669,7 +3669,10 @@ static int mv88e6xxx_mdio_register(struc
  
  	if (external) {
  		mv88e6xxx_reg_lock(chip);
diff --git a/target/linux/generic/config-5.15 b/target/linux/generic/config-5.15
index cba00711ca..90650ac7dd 100644
--- a/target/linux/generic/config-5.15
+++ b/target/linux/generic/config-5.15
@@ -774,6 +774,7 @@ CONFIG_BROKEN_ON_SMP=y
 # CONFIG_BTRFS_ASSERT is not set
 # CONFIG_BTRFS_DEBUG is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
 # CONFIG_BTRFS_FS_POSIX_ACL is not set
 # CONFIG_BTRFS_FS_REF_VERIFY is not set
 # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
@@ -1043,10 +1044,10 @@ CONFIG_CRAMFS_BLOCKDEV=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_CRC32_BIT is not set
-CONFIG_CRC32_SARWATE=y
+# CONFIG_CRC32_SARWATE is not set
 # CONFIG_CRC32_SELFTEST is not set
 # CONFIG_CRC32_SLICEBY4 is not set
-# CONFIG_CRC32_SLICEBY8 is not set
+CONFIG_CRC32_SLICEBY8=y
 # CONFIG_CRC4 is not set
 # CONFIG_CRC64 is not set
 # CONFIG_CRC7 is not set
diff --git a/target/linux/generic/config-6.1 b/target/linux/generic/config-6.1
index 70e87665b7..80dcb54683 100644
--- a/target/linux/generic/config-6.1
+++ b/target/linux/generic/config-6.1
@@ -820,6 +820,7 @@ CONFIG_BROKEN_ON_SMP=y
 # CONFIG_BTRFS_ASSERT is not set
 # CONFIG_BTRFS_DEBUG is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
 # CONFIG_BTRFS_FS_POSIX_ACL is not set
 # CONFIG_BTRFS_FS_REF_VERIFY is not set
 # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
@@ -1102,10 +1103,10 @@ CONFIG_CRAMFS_BLOCKDEV=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_CRC32_BIT is not set
-CONFIG_CRC32_SARWATE=y
+# CONFIG_CRC32_SARWATE is not set
 # CONFIG_CRC32_SELFTEST is not set
 # CONFIG_CRC32_SLICEBY4 is not set
-# CONFIG_CRC32_SLICEBY8 is not set
+CONFIG_CRC32_SLICEBY8=y
 # CONFIG_CRC4 is not set
 # CONFIG_CRC64 is not set
 # CONFIG_CRC64_ROCKSOFT is not set
@@ -4838,6 +4839,7 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCMCIA_XIRC2PS is not set
 # CONFIG_PCMCIA_XIRCOM is not set
 # CONFIG_PCNET32 is not set
+CONFIG_PCP_BATCH_SCALE_MAX=5
 # CONFIG_PCPU_DEV_REFCNT is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_PCS_MTK_USXGMII is not set
diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6
index 20fe98099f..26651e077c 100644
--- a/target/linux/generic/config-6.6
+++ b/target/linux/generic/config-6.6
@@ -725,6 +725,7 @@ CONFIG_BROKEN_ON_SMP=y
 # CONFIG_BTRFS_ASSERT is not set
 # CONFIG_BTRFS_DEBUG is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
 # CONFIG_BTRFS_FS_POSIX_ACL is not set
 # CONFIG_BTRFS_FS_REF_VERIFY is not set
 # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
@@ -875,6 +876,7 @@ CONFIG_CFG80211_HEADERS=y
 # CONFIG_CHELSIO_T4 is not set
 # CONFIG_CHELSIO_T4VF is not set
 # CONFIG_CHROME_PLATFORMS is not set
+# CONFIG_CZNIC_PLATFORMS is not set
 # CONFIG_CHR_DEV_SCH is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_ST is not set
@@ -1003,10 +1005,10 @@ CONFIG_CRAMFS_BLOCKDEV=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_CRC32_BIT is not set
-CONFIG_CRC32_SARWATE=y
+# CONFIG_CRC32_SARWATE is not set
 # CONFIG_CRC32_SELFTEST is not set
 # CONFIG_CRC32_SLICEBY4 is not set
-# CONFIG_CRC32_SLICEBY8 is not set
+CONFIG_CRC32_SLICEBY8=y
 # CONFIG_CRC4 is not set
 # CONFIG_CRC64 is not set
 # CONFIG_CRC64_ROCKSOFT is not set
@@ -4545,6 +4547,7 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCMCIA_XIRCOM is not set
 # CONFIG_PCNET32 is not set
 # CONFIG_PCPU_DEV_REFCNT is not set
+CONFIG_PCP_BATCH_SCALE_MAX=5
 # CONFIG_PCSPKR_PLATFORM is not set
 # CONFIG_PCS_MTK_USXGMII is not set
 # CONFIG_PCS_XPCS is not set
@@ -5481,6 +5484,7 @@ CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_SENSORS_PWM_FAN is not set
 # CONFIG_SENSORS_PXE1610 is not set
 # CONFIG_SENSORS_Q54SJ108A2 is not set
+# CONFIG_SENSORS_RASPBERRYPI_HWMON is not set
 # CONFIG_SENSORS_RM3100_I2C is not set
 # CONFIG_SENSORS_RM3100_SPI is not set
 # CONFIG_SENSORS_SBRMI is not set
diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
index 3b71597d23..a271a676e1 100644
--- a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
+++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_fit.c
@@ -278,7 +278,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
 
 		parts[0].name = KERNEL_PART_NAME;
 		parts[0].offset = fit_offset;
-		parts[0].size = mtd_rounddown_to_eb(fit_size + offset_start, mtd) + mtd->erasesize;
+		parts[0].size = mtd_roundup_to_eb(fit_size + offset_start, mtd);
 
 		if (type == MTDSPLIT_PART_TYPE_UBI)
 			parts[1].name = UBI_PART_NAME;
@@ -327,7 +327,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
 			return -ENOMEM;
 
 		parts[0].name = ROOTFS_SPLIT_NAME;
-		parts[0].offset = fit_offset + mtd_rounddown_to_eb(max_size, mtd) + mtd->erasesize;
+		parts[0].offset = fit_offset + mtd_roundup_to_eb(max_size, mtd);
 		parts[0].size = mtd->size - parts[0].offset;
 
 		*pparts = parts;
diff --git a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h
index 3fcae81fa4..4b3b3fe98c 100644
--- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h
+++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h
@@ -23,6 +23,16 @@ struct dentry;
 struct inode;
 struct file;
 
+typedef enum rtl8367b_chip_e {
+	RTL8367B_CHIP_UNKNOWN,
+ /* Family B */
+	RTL8367B_CHIP_RTL8367RB,
+	RTL8367B_CHIP_RTL8367R_VB, /* chip with exception in extif assignment */
+/* Family C */
+	RTL8367B_CHIP_RTL8367RB_VB,
+	RTL8367B_CHIP_RTL8367S
+} rtl8367b_chip_t;
+
 struct rtl8366_mib_counter {
 	unsigned	base;
 	unsigned	offset;
@@ -64,6 +74,7 @@ struct rtl8366_smi {
 	u8			dbg_vlan_4k_page;
 #endif
 	u32			phy_id;
+	rtl8367b_chip_t		rtl8367b_chip;
 	struct mii_bus		*ext_mbus;
 };
 
diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367.c b/target/linux/generic/files/drivers/net/phy/rtl8367.c
index b14b63e036..0acfeb54bb 100644
--- a/target/linux/generic/files/drivers/net/phy/rtl8367.c
+++ b/target/linux/generic/files/drivers/net/phy/rtl8367.c
@@ -1077,21 +1077,37 @@ static int rtl8367_led_blinkrate_set(struct rtl8366_smi *smi, unsigned int rate)
 }
 
 #ifdef CONFIG_OF
-static int rtl8367_extif_init_of(struct rtl8366_smi *smi, int id,
+static int rtl8367_extif_init_of(struct rtl8366_smi *smi,
 				 const char *name)
 {
 	struct rtl8367_extif_config *cfg;
 	const __be32 *prop;
 	int size;
 	int err;
+	unsigned cpu_port;
+	unsigned id = UINT_MAX;
 
 	prop = of_get_property(smi->parent->of_node, name, &size);
-	if (!prop)
-		return rtl8367_extif_init(smi, id, NULL);
+	if (!prop || (size != (10 * sizeof(*prop)))) {
+		dev_err(smi->parent, "%s property is not defined or invalid\n", name);
+		err = -EINVAL;
+		goto err_init;
+	}
 
-	if (size != (9 * sizeof(*prop))) {
-		dev_err(smi->parent, "%s property is invalid\n", name);
-		return -EINVAL;
+	cpu_port = be32_to_cpup(prop++);
+	switch (cpu_port) {
+	case RTL8367_CPU_PORT_NUM - 1:
+	case RTL8367_CPU_PORT_NUM:
+		id = RTL8367_CPU_PORT_NUM - cpu_port;
+		if (smi->cpu_port == UINT_MAX) {
+			dev_info(smi->parent, "cpu_port:%u, assigned to extif%u\n", cpu_port, id);
+			smi->cpu_port = cpu_port;
+		}
+		break;
+	default:
+		dev_err(smi->parent, "wrong cpu_port %u in %s property\n", cpu_port, name);
+		err = -EINVAL;
+		goto err_init;
 	}
 
 	cfg = kzalloc(sizeof(struct rtl8367_extif_config), GFP_KERNEL);
@@ -1111,10 +1127,14 @@ static int rtl8367_extif_init_of(struct rtl8366_smi *smi, int id,
 	err = rtl8367_extif_init(smi, id, cfg);
 	kfree(cfg);
 
+err_init:
+	if (id != 0) rtl8367_extif_init(smi, 0, NULL);
+	if (id != 1) rtl8367_extif_init(smi, 1, NULL);
+
 	return err;
 }
 #else
-static int rtl8367_extif_init_of(struct rtl8366_smi *smi, int id,
+static int rtl8367_extif_init_of(struct rtl8366_smi *smi,
 				 const char *name)
 {
 	return -EINVAL;
@@ -1135,11 +1155,7 @@ static int rtl8367_setup(struct rtl8366_smi *smi)
 
 	/* initialize external interfaces */
 	if (smi->parent->of_node) {
-		err = rtl8367_extif_init_of(smi, 0, "realtek,extif0");
-		if (err)
-			return err;
-
-		err = rtl8367_extif_init_of(smi, 1, "realtek,extif1");
+		err = rtl8367_extif_init_of(smi, "realtek,extif");
 		if (err)
 			return err;
 	} else {
@@ -1722,11 +1738,6 @@ static int rtl8367_detect(struct rtl8366_smi *smi)
 	dev_info(smi->parent, "RTL%s ver. %u chip found\n",
 		 chip_name, rtl_ver & RTL8367_RTL_VER_MASK);
 
-	if (of_property_present(smi->parent->of_node, "realtek,extif1"))
-		smi->cpu_port = RTL8367_CPU_PORT_NUM - 1;
-
-	dev_info(smi->parent, "CPU port: %u\n", smi->cpu_port);
-
 	return 0;
 }
 
@@ -1764,7 +1775,7 @@ static int rtl8367_probe(struct platform_device *pdev)
 	smi->cmd_read = 0xb9;
 	smi->cmd_write = 0xb8;
 	smi->ops = &rtl8367_smi_ops;
-	smi->cpu_port = RTL8367_CPU_PORT_NUM;
+	smi->cpu_port = UINT_MAX; /* not defined yet */
 	smi->num_ports = RTL8367_NUM_PORTS;
 	smi->num_vlan_mc = RTL8367_NUM_VLANS;
 	smi->mib_counters = rtl8367_mib_counters;
diff --git a/target/linux/generic/files/drivers/net/phy/rtl8367b.c b/target/linux/generic/files/drivers/net/phy/rtl8367b.c
index 04c790e924..69deaec20c 100644
--- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c
+++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c
@@ -1,5 +1,6 @@
 /*
- * Platform driver for the Realtek RTL8367R-VB ethernet switches
+ * Platform driver for Realtek RTL8367B family chips, i.e. RTL8367RB and RTL8367R-VB
+ * extended with support for RTL8367C family chips, i.e. RTL8367RB-VB and RTL8367S
  *
  * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
  *
@@ -351,220 +352,7 @@ rtl8367b_mib_counters[RTL8367B_NUM_MIB_COUNTERS] = {
 			return err;					\
 	} while (0)
 
-static const struct rtl8367b_initval rtl8367r_vb_initvals_0[] = {
-	{0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x0301, 0x0026}, {0x1722, 0x0E14},
-	{0x205F, 0x0002}, {0x2059, 0x1A00}, {0x205F, 0x0000}, {0x207F, 0x0002},
-	{0x2077, 0x0000}, {0x2078, 0x0000}, {0x2079, 0x0000}, {0x207A, 0x0000},
-	{0x207B, 0x0000}, {0x207F, 0x0000}, {0x205F, 0x0002}, {0x2053, 0x0000},
-	{0x2054, 0x0000}, {0x2055, 0x0000}, {0x2056, 0x0000}, {0x2057, 0x0000},
-	{0x205F, 0x0000}, {0x12A4, 0x110A}, {0x12A6, 0x150A}, {0x13F1, 0x0013},
-	{0x13F4, 0x0010}, {0x13F5, 0x0000}, {0x0018, 0x0F00}, {0x0038, 0x0F00},
-	{0x0058, 0x0F00}, {0x0078, 0x0F00}, {0x0098, 0x0F00}, {0x12B6, 0x0C02},
-	{0x12B7, 0x030F}, {0x12B8, 0x11FF}, {0x12BC, 0x0004}, {0x1362, 0x0115},
-	{0x1363, 0x0002}, {0x1363, 0x0000}, {0x133F, 0x0030}, {0x133E, 0x000E},
-	{0x221F, 0x0007}, {0x221E, 0x002D}, {0x2218, 0xF030}, {0x221F, 0x0007},
-	{0x221E, 0x0023}, {0x2216, 0x0005}, {0x2215, 0x00B9}, {0x2219, 0x0044},
-	{0x2215, 0x00BA}, {0x2219, 0x0020}, {0x2215, 0x00BB}, {0x2219, 0x00C1},
-	{0x2215, 0x0148}, {0x2219, 0x0096}, {0x2215, 0x016E}, {0x2219, 0x0026},
-	{0x2216, 0x0000}, {0x2216, 0x0000}, {0x221E, 0x002D}, {0x2218, 0xF010},
-	{0x221F, 0x0007}, {0x221E, 0x0020}, {0x2215, 0x0D00}, {0x221F, 0x0000},
-	{0x221F, 0x0000}, {0x2217, 0x2160}, {0x221F, 0x0001}, {0x2210, 0xF25E},
-	{0x221F, 0x0007}, {0x221E, 0x0042}, {0x2215, 0x0F00}, {0x2215, 0x0F00},
-	{0x2216, 0x7408}, {0x2215, 0x0E00}, {0x2215, 0x0F00}, {0x2215, 0x0F01},
-	{0x2216, 0x4000}, {0x2215, 0x0E01}, {0x2215, 0x0F01}, {0x2215, 0x0F02},
-	{0x2216, 0x9400}, {0x2215, 0x0E02}, {0x2215, 0x0F02}, {0x2215, 0x0F03},
-	{0x2216, 0x7408}, {0x2215, 0x0E03}, {0x2215, 0x0F03}, {0x2215, 0x0F04},
-	{0x2216, 0x4008}, {0x2215, 0x0E04}, {0x2215, 0x0F04}, {0x2215, 0x0F05},
-	{0x2216, 0x9400}, {0x2215, 0x0E05}, {0x2215, 0x0F05}, {0x2215, 0x0F06},
-	{0x2216, 0x0803}, {0x2215, 0x0E06}, {0x2215, 0x0F06}, {0x2215, 0x0D00},
-	{0x2215, 0x0100}, {0x221F, 0x0001}, {0x2210, 0xF05E}, {0x221F, 0x0000},
-	{0x2217, 0x2100}, {0x221F, 0x0000}, {0x220D, 0x0003}, {0x220E, 0x0015},
-	{0x220D, 0x4003}, {0x220E, 0x0006}, {0x221F, 0x0000}, {0x2200, 0x1340},
-	{0x133F, 0x0010}, {0x12A0, 0x0058}, {0x12A1, 0x0058}, {0x133E, 0x000E},
-	{0x133F, 0x0030}, {0x221F, 0x0000}, {0x2210, 0x0166}, {0x221F, 0x0000},
-	{0x133E, 0x000E}, {0x133F, 0x0010}, {0x133F, 0x0030}, {0x133E, 0x000E},
-	{0x221F, 0x0005}, {0x2205, 0xFFF6}, {0x2206, 0x0080}, {0x2205, 0x8B6E},
-	{0x2206, 0x0000}, {0x220F, 0x0100}, {0x2205, 0x8000}, {0x2206, 0x0280},
-	{0x2206, 0x28F7}, {0x2206, 0x00E0}, {0x2206, 0xFFF7}, {0x2206, 0xA080},
-	{0x2206, 0x02AE}, {0x2206, 0xF602}, {0x2206, 0x0153}, {0x2206, 0x0201},
-	{0x2206, 0x6602}, {0x2206, 0x80B9}, {0x2206, 0xE08B}, {0x2206, 0x8CE1},
-	{0x2206, 0x8B8D}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x8E1E},
-	{0x2206, 0x01A0}, {0x2206, 0x00E7}, {0x2206, 0xAEDB}, {0x2206, 0xEEE0},
-	{0x2206, 0x120E}, {0x2206, 0xEEE0}, {0x2206, 0x1300}, {0x2206, 0xEEE0},
-	{0x2206, 0x2001}, {0x2206, 0xEEE0}, {0x2206, 0x2166}, {0x2206, 0xEEE0},
-	{0x2206, 0xC463}, {0x2206, 0xEEE0}, {0x2206, 0xC5E8}, {0x2206, 0xEEE0},
-	{0x2206, 0xC699}, {0x2206, 0xEEE0}, {0x2206, 0xC7C2}, {0x2206, 0xEEE0},
-	{0x2206, 0xC801}, {0x2206, 0xEEE0}, {0x2206, 0xC913}, {0x2206, 0xEEE0},
-	{0x2206, 0xCA30}, {0x2206, 0xEEE0}, {0x2206, 0xCB3E}, {0x2206, 0xEEE0},
-	{0x2206, 0xDCE1}, {0x2206, 0xEEE0}, {0x2206, 0xDD00}, {0x2206, 0xEEE2},
-	{0x2206, 0x0001}, {0x2206, 0xEEE2}, {0x2206, 0x0100}, {0x2206, 0xEEE4},
-	{0x2206, 0x8860}, {0x2206, 0xEEE4}, {0x2206, 0x8902}, {0x2206, 0xEEE4},
-	{0x2206, 0x8C00}, {0x2206, 0xEEE4}, {0x2206, 0x8D30}, {0x2206, 0xEEEA},
-	{0x2206, 0x1480}, {0x2206, 0xEEEA}, {0x2206, 0x1503}, {0x2206, 0xEEEA},
-	{0x2206, 0xC600}, {0x2206, 0xEEEA}, {0x2206, 0xC706}, {0x2206, 0xEE85},
-	{0x2206, 0xEE00}, {0x2206, 0xEE85}, {0x2206, 0xEF00}, {0x2206, 0xEE8B},
-	{0x2206, 0x6750}, {0x2206, 0xEE8B}, {0x2206, 0x6632}, {0x2206, 0xEE8A},
-	{0x2206, 0xD448}, {0x2206, 0xEE8A}, {0x2206, 0xD548}, {0x2206, 0xEE8A},
-	{0x2206, 0xD649}, {0x2206, 0xEE8A}, {0x2206, 0xD7F8}, {0x2206, 0xEE8B},
-	{0x2206, 0x85E2}, {0x2206, 0xEE8B}, {0x2206, 0x8700}, {0x2206, 0xEEFF},
-	{0x2206, 0xF600}, {0x2206, 0xEEFF}, {0x2206, 0xF7FC}, {0x2206, 0x04F8},
-	{0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2023}, {0x2206, 0xF620},
-	{0x2206, 0xE48B}, {0x2206, 0x8E02}, {0x2206, 0x2877}, {0x2206, 0x0225},
-	{0x2206, 0xC702}, {0x2206, 0x26A1}, {0x2206, 0x0281}, {0x2206, 0xB302},
-	{0x2206, 0x8496}, {0x2206, 0x0202}, {0x2206, 0xA102}, {0x2206, 0x27F1},
-	{0x2206, 0x0228}, {0x2206, 0xF902}, {0x2206, 0x2AA0}, {0x2206, 0x0282},
-	{0x2206, 0xB8E0}, {0x2206, 0x8B8E}, {0x2206, 0xAD21}, {0x2206, 0x08F6},
-	{0x2206, 0x21E4}, {0x2206, 0x8B8E}, {0x2206, 0x0202}, {0x2206, 0x80E0},
-	{0x2206, 0x8B8E}, {0x2206, 0xAD22}, {0x2206, 0x05F6}, {0x2206, 0x22E4},
-	{0x2206, 0x8B8E}, {0x2206, 0xE08B}, {0x2206, 0x8EAD}, {0x2206, 0x2305},
-	{0x2206, 0xF623}, {0x2206, 0xE48B}, {0x2206, 0x8EE0}, {0x2206, 0x8B8E},
-	{0x2206, 0xAD24}, {0x2206, 0x08F6}, {0x2206, 0x24E4}, {0x2206, 0x8B8E},
-	{0x2206, 0x0227}, {0x2206, 0x6AE0}, {0x2206, 0x8B8E}, {0x2206, 0xAD25},
-	{0x2206, 0x05F6}, {0x2206, 0x25E4}, {0x2206, 0x8B8E}, {0x2206, 0xE08B},
-	{0x2206, 0x8EAD}, {0x2206, 0x260B}, {0x2206, 0xF626}, {0x2206, 0xE48B},
-	{0x2206, 0x8E02}, {0x2206, 0x830D}, {0x2206, 0x021D}, {0x2206, 0x6BE0},
-	{0x2206, 0x8B8E}, {0x2206, 0xAD27}, {0x2206, 0x05F6}, {0x2206, 0x27E4},
-	{0x2206, 0x8B8E}, {0x2206, 0x0281}, {0x2206, 0x4402}, {0x2206, 0x045C},
-	{0x2206, 0xFC04}, {0x2206, 0xF8E0}, {0x2206, 0x8B83}, {0x2206, 0xAD23},
-	{0x2206, 0x30E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x2359},
-	{0x2206, 0x02E0}, {0x2206, 0x85EF}, {0x2206, 0xE585}, {0x2206, 0xEFAC},
-	{0x2206, 0x2907}, {0x2206, 0x1F01}, {0x2206, 0x9E51}, {0x2206, 0xAD29},
-	{0x2206, 0x20E0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x06E1},
-	{0x2206, 0x8B84}, {0x2206, 0xAD28}, {0x2206, 0x42E0}, {0x2206, 0x8B85},
-	{0x2206, 0xAD21}, {0x2206, 0x06E1}, {0x2206, 0x8B84}, {0x2206, 0xAD29},
-	{0x2206, 0x36BF}, {0x2206, 0x34BF}, {0x2206, 0x022C}, {0x2206, 0x31AE},
-	{0x2206, 0x2EE0}, {0x2206, 0x8B83}, {0x2206, 0xAD21}, {0x2206, 0x10E0},
-	{0x2206, 0x8B84}, {0x2206, 0xF620}, {0x2206, 0xE48B}, {0x2206, 0x84EE},
-	{0x2206, 0x8ADA}, {0x2206, 0x00EE}, {0x2206, 0x8ADB}, {0x2206, 0x00E0},
-	{0x2206, 0x8B85}, {0x2206, 0xAD21}, {0x2206, 0x0CE0}, {0x2206, 0x8B84},
-	{0x2206, 0xF621}, {0x2206, 0xE48B}, {0x2206, 0x84EE}, {0x2206, 0x8B72},
-	{0x2206, 0xFFBF}, {0x2206, 0x34C2}, {0x2206, 0x022C}, {0x2206, 0x31FC},
-	{0x2206, 0x04F8}, {0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B85},
-	{0x2206, 0xAD21}, {0x2206, 0x42E0}, {0x2206, 0xE022}, {0x2206, 0xE1E0},
-	{0x2206, 0x2358}, {0x2206, 0xC059}, {0x2206, 0x021E}, {0x2206, 0x01E1},
-	{0x2206, 0x8B72}, {0x2206, 0x1F10}, {0x2206, 0x9E2F}, {0x2206, 0xE48B},
-	{0x2206, 0x72AD}, {0x2206, 0x2123}, {0x2206, 0xE18B}, {0x2206, 0x84F7},
-	{0x2206, 0x29E5}, {0x2206, 0x8B84}, {0x2206, 0xAC27}, {0x2206, 0x10AC},
-	{0x2206, 0x2605}, {0x2206, 0x0205}, {0x2206, 0x23AE}, {0x2206, 0x1602},
-	{0x2206, 0x0535}, {0x2206, 0x0282}, {0x2206, 0x30AE}, {0x2206, 0x0E02},
-	{0x2206, 0x056A}, {0x2206, 0x0282}, {0x2206, 0x75AE}, {0x2206, 0x0602},
-	{0x2206, 0x04DC}, {0x2206, 0x0282}, {0x2206, 0x04EF}, {0x2206, 0x96FE},
-	{0x2206, 0xFC04}, {0x2206, 0xF8F9}, {0x2206, 0xE08B}, {0x2206, 0x87AD},
-	{0x2206, 0x2321}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15},
-	{0x2206, 0xAD26}, {0x2206, 0x18F6}, {0x2206, 0x27E4}, {0x2206, 0xEA14},
-	{0x2206, 0xE5EA}, {0x2206, 0x15F6}, {0x2206, 0x26E4}, {0x2206, 0xEA14},
-	{0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14},
-	{0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8F9},
-	{0x2206, 0xE08B}, {0x2206, 0x87AD}, {0x2206, 0x233A}, {0x2206, 0xAD22},
-	{0x2206, 0x37E0}, {0x2206, 0xE020}, {0x2206, 0xE1E0}, {0x2206, 0x21AC},
-	{0x2206, 0x212E}, {0x2206, 0xE0EA}, {0x2206, 0x14E1}, {0x2206, 0xEA15},
-	{0x2206, 0xF627}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15},
-	{0x2206, 0xE2EA}, {0x2206, 0x12E3}, {0x2206, 0xEA13}, {0x2206, 0x5A8F},
-	{0x2206, 0x6A20}, {0x2206, 0xE6EA}, {0x2206, 0x12E7}, {0x2206, 0xEA13},
-	{0x2206, 0xF726}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15},
-	{0x2206, 0xF727}, {0x2206, 0xE4EA}, {0x2206, 0x14E5}, {0x2206, 0xEA15},
-	{0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B87},
-	{0x2206, 0xAD23}, {0x2206, 0x38AD}, {0x2206, 0x2135}, {0x2206, 0xE0E0},
-	{0x2206, 0x20E1}, {0x2206, 0xE021}, {0x2206, 0xAC21}, {0x2206, 0x2CE0},
-	{0x2206, 0xEA14}, {0x2206, 0xE1EA}, {0x2206, 0x15F6}, {0x2206, 0x27E4},
-	{0x2206, 0xEA14}, {0x2206, 0xE5EA}, {0x2206, 0x15E2}, {0x2206, 0xEA12},
-	{0x2206, 0xE3EA}, {0x2206, 0x135A}, {0x2206, 0x8FE6}, {0x2206, 0xEA12},
-	{0x2206, 0xE7EA}, {0x2206, 0x13F7}, {0x2206, 0x26E4}, {0x2206, 0xEA14},
-	{0x2206, 0xE5EA}, {0x2206, 0x15F7}, {0x2206, 0x27E4}, {0x2206, 0xEA14},
-	{0x2206, 0xE5EA}, {0x2206, 0x15FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA},
-	{0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2146},
-	{0x2206, 0xE0E0}, {0x2206, 0x22E1}, {0x2206, 0xE023}, {0x2206, 0x58C0},
-	{0x2206, 0x5902}, {0x2206, 0x1E01}, {0x2206, 0xE18B}, {0x2206, 0x651F},
-	{0x2206, 0x109E}, {0x2206, 0x33E4}, {0x2206, 0x8B65}, {0x2206, 0xAD21},
-	{0x2206, 0x22AD}, {0x2206, 0x272A}, {0x2206, 0xD400}, {0x2206, 0x01BF},
-	{0x2206, 0x34F2}, {0x2206, 0x022C}, {0x2206, 0xA2BF}, {0x2206, 0x34F5},
-	{0x2206, 0x022C}, {0x2206, 0xE0E0}, {0x2206, 0x8B67}, {0x2206, 0x1B10},
-	{0x2206, 0xAA14}, {0x2206, 0xE18B}, {0x2206, 0x660D}, {0x2206, 0x1459},
-	{0x2206, 0x0FAE}, {0x2206, 0x05E1}, {0x2206, 0x8B66}, {0x2206, 0x590F},
-	{0x2206, 0xBF85}, {0x2206, 0x6102}, {0x2206, 0x2CA2}, {0x2206, 0xEF96},
-	{0x2206, 0xFEFC}, {0x2206, 0x04F8}, {0x2206, 0xF9FA}, {0x2206, 0xFBEF},
-	{0x2206, 0x79E2}, {0x2206, 0x8AD2}, {0x2206, 0xAC19}, {0x2206, 0x2DE0},
-	{0x2206, 0xE036}, {0x2206, 0xE1E0}, {0x2206, 0x37EF}, {0x2206, 0x311F},
-	{0x2206, 0x325B}, {0x2206, 0x019E}, {0x2206, 0x1F7A}, {0x2206, 0x0159},
-	{0x2206, 0x019F}, {0x2206, 0x0ABF}, {0x2206, 0x348E}, {0x2206, 0x022C},
-	{0x2206, 0x31F6}, {0x2206, 0x06AE}, {0x2206, 0x0FF6}, {0x2206, 0x0302},
-	{0x2206, 0x0470}, {0x2206, 0xF703}, {0x2206, 0xF706}, {0x2206, 0xBF34},
-	{0x2206, 0x9302}, {0x2206, 0x2C31}, {0x2206, 0xAC1A}, {0x2206, 0x25E0},
-	{0x2206, 0xE022}, {0x2206, 0xE1E0}, {0x2206, 0x23EF}, {0x2206, 0x300D},
-	{0x2206, 0x311F}, {0x2206, 0x325B}, {0x2206, 0x029E}, {0x2206, 0x157A},
-	{0x2206, 0x0258}, {0x2206, 0xC4A0}, {0x2206, 0x0408}, {0x2206, 0xBF34},
-	{0x2206, 0x9E02}, {0x2206, 0x2C31}, {0x2206, 0xAE06}, {0x2206, 0xBF34},
-	{0x2206, 0x9C02}, {0x2206, 0x2C31}, {0x2206, 0xAC1B}, {0x2206, 0x4AE0},
-	{0x2206, 0xE012}, {0x2206, 0xE1E0}, {0x2206, 0x13EF}, {0x2206, 0x300D},
-	{0x2206, 0x331F}, {0x2206, 0x325B}, {0x2206, 0x1C9E}, {0x2206, 0x3AEF},
-	{0x2206, 0x325B}, {0x2206, 0x1C9F}, {0x2206, 0x09BF}, {0x2206, 0x3498},
-	{0x2206, 0x022C}, {0x2206, 0x3102}, {0x2206, 0x83C5}, {0x2206, 0x5A03},
-	{0x2206, 0x0D03}, {0x2206, 0x581C}, {0x2206, 0x1E20}, {0x2206, 0x0207},
-	{0x2206, 0xA0A0}, {0x2206, 0x000E}, {0x2206, 0x0284}, {0x2206, 0x17AD},
-	{0x2206, 0x1817}, {0x2206, 0xBF34}, {0x2206, 0x9A02}, {0x2206, 0x2C31},
-	{0x2206, 0xAE0F}, {0x2206, 0xBF34}, {0x2206, 0xC802}, {0x2206, 0x2C31},
-	{0x2206, 0xBF34}, {0x2206, 0xC502}, {0x2206, 0x2C31}, {0x2206, 0x0284},
-	{0x2206, 0x52E6}, {0x2206, 0x8AD2}, {0x2206, 0xEF97}, {0x2206, 0xFFFE},
-	{0x2206, 0xFDFC}, {0x2206, 0x04F8}, {0x2206, 0xBF34}, {0x2206, 0xDA02},
-	{0x2206, 0x2CE0}, {0x2206, 0xE58A}, {0x2206, 0xD3BF}, {0x2206, 0x34D4},
-	{0x2206, 0x022C}, {0x2206, 0xE00C}, {0x2206, 0x1159}, {0x2206, 0x02E0},
-	{0x2206, 0x8AD3}, {0x2206, 0x1E01}, {0x2206, 0xE48A}, {0x2206, 0xD3D1},
-	{0x2206, 0x00BF}, {0x2206, 0x34DA}, {0x2206, 0x022C}, {0x2206, 0xA2D1},
-	{0x2206, 0x01BF}, {0x2206, 0x34D4}, {0x2206, 0x022C}, {0x2206, 0xA2BF},
-	{0x2206, 0x34CB}, {0x2206, 0x022C}, {0x2206, 0xE0E5}, {0x2206, 0x8ACE},
-	{0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CE0}, {0x2206, 0xE58A},
-	{0x2206, 0xCFBF}, {0x2206, 0x8564}, {0x2206, 0x022C}, {0x2206, 0xE0E5},
-	{0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6A02}, {0x2206, 0x2CE0},
-	{0x2206, 0xE58A}, {0x2206, 0xD1FC}, {0x2206, 0x04F8}, {0x2206, 0xE18A},
-	{0x2206, 0xD1BF}, {0x2206, 0x856A}, {0x2206, 0x022C}, {0x2206, 0xA2E1},
-	{0x2206, 0x8AD0}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2},
-	{0x2206, 0xE18A}, {0x2206, 0xCFBF}, {0x2206, 0x8567}, {0x2206, 0x022C},
-	{0x2206, 0xA2E1}, {0x2206, 0x8ACE}, {0x2206, 0xBF34}, {0x2206, 0xCB02},
-	{0x2206, 0x2CA2}, {0x2206, 0xE18A}, {0x2206, 0xD3BF}, {0x2206, 0x34DA},
-	{0x2206, 0x022C}, {0x2206, 0xA2E1}, {0x2206, 0x8AD3}, {0x2206, 0x0D11},
-	{0x2206, 0xBF34}, {0x2206, 0xD402}, {0x2206, 0x2CA2}, {0x2206, 0xFC04},
-	{0x2206, 0xF9A0}, {0x2206, 0x0405}, {0x2206, 0xE38A}, {0x2206, 0xD4AE},
-	{0x2206, 0x13A0}, {0x2206, 0x0805}, {0x2206, 0xE38A}, {0x2206, 0xD5AE},
-	{0x2206, 0x0BA0}, {0x2206, 0x0C05}, {0x2206, 0xE38A}, {0x2206, 0xD6AE},
-	{0x2206, 0x03E3}, {0x2206, 0x8AD7}, {0x2206, 0xEF13}, {0x2206, 0xBF34},
-	{0x2206, 0xCB02}, {0x2206, 0x2CA2}, {0x2206, 0xEF13}, {0x2206, 0x0D11},
-	{0x2206, 0xBF85}, {0x2206, 0x6702}, {0x2206, 0x2CA2}, {0x2206, 0xEF13},
-	{0x2206, 0x0D14}, {0x2206, 0xBF85}, {0x2206, 0x6402}, {0x2206, 0x2CA2},
-	{0x2206, 0xEF13}, {0x2206, 0x0D17}, {0x2206, 0xBF85}, {0x2206, 0x6A02},
-	{0x2206, 0x2CA2}, {0x2206, 0xFD04}, {0x2206, 0xF8E0}, {0x2206, 0x8B85},
-	{0x2206, 0xAD27}, {0x2206, 0x2DE0}, {0x2206, 0xE036}, {0x2206, 0xE1E0},
-	{0x2206, 0x37E1}, {0x2206, 0x8B73}, {0x2206, 0x1F10}, {0x2206, 0x9E20},
-	{0x2206, 0xE48B}, {0x2206, 0x73AC}, {0x2206, 0x200B}, {0x2206, 0xAC21},
-	{0x2206, 0x0DAC}, {0x2206, 0x250F}, {0x2206, 0xAC27}, {0x2206, 0x0EAE},
-	{0x2206, 0x0F02}, {0x2206, 0x84CC}, {0x2206, 0xAE0A}, {0x2206, 0x0284},
-	{0x2206, 0xD1AE}, {0x2206, 0x05AE}, {0x2206, 0x0302}, {0x2206, 0x84D8},
-	{0x2206, 0xFC04}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0x0402},
-	{0x2206, 0x84E5}, {0x2206, 0x0285}, {0x2206, 0x2804}, {0x2206, 0x0285},
-	{0x2206, 0x4904}, {0x2206, 0xEE8B}, {0x2206, 0x6800}, {0x2206, 0xEE8B},
-	{0x2206, 0x6902}, {0x2206, 0x04F8}, {0x2206, 0xF9E0}, {0x2206, 0x8B85},
-	{0x2206, 0xAD26}, {0x2206, 0x38D0}, {0x2206, 0x0B02}, {0x2206, 0x2B4D},
-	{0x2206, 0x5882}, {0x2206, 0x7882}, {0x2206, 0x9F2D}, {0x2206, 0xE08B},
-	{0x2206, 0x68E1}, {0x2206, 0x8B69}, {0x2206, 0x1F10}, {0x2206, 0x9EC8},
-	{0x2206, 0x10E4}, {0x2206, 0x8B68}, {0x2206, 0xE0E0}, {0x2206, 0x00E1},
-	{0x2206, 0xE001}, {0x2206, 0xF727}, {0x2206, 0xE4E0}, {0x2206, 0x00E5},
-	{0x2206, 0xE001}, {0x2206, 0xE2E0}, {0x2206, 0x20E3}, {0x2206, 0xE021},
-	{0x2206, 0xAD30}, {0x2206, 0xF7F6}, {0x2206, 0x27E4}, {0x2206, 0xE000},
-	{0x2206, 0xE5E0}, {0x2206, 0x01FD}, {0x2206, 0xFC04}, {0x2206, 0xF8FA},
-	{0x2206, 0xEF69}, {0x2206, 0xE08B}, {0x2206, 0x86AD}, {0x2206, 0x2212},
-	{0x2206, 0xE0E0}, {0x2206, 0x14E1}, {0x2206, 0xE015}, {0x2206, 0xAD26},
-	{0x2206, 0x9CE1}, {0x2206, 0x85E0}, {0x2206, 0xBF85}, {0x2206, 0x6D02},
-	{0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x04F8},
-	{0x2206, 0xFAEF}, {0x2206, 0x69E0}, {0x2206, 0x8B86}, {0x2206, 0xAD22},
-	{0x2206, 0x09E1}, {0x2206, 0x85E1}, {0x2206, 0xBF85}, {0x2206, 0x6D02},
-	{0x2206, 0x2CA2}, {0x2206, 0xEF96}, {0x2206, 0xFEFC}, {0x2206, 0x0464},
-	{0x2206, 0xE48C}, {0x2206, 0xFDE4}, {0x2206, 0x80CA}, {0x2206, 0xE480},
-	{0x2206, 0x66E0}, {0x2206, 0x8E70}, {0x2206, 0xE076}, {0x2205, 0xE142},
-	{0x2206, 0x0701}, {0x2205, 0xE140}, {0x2206, 0x0405}, {0x220F, 0x0000},
-	{0x221F, 0x0000}, {0x2200, 0x1340}, {0x133E, 0x000E}, {0x133F, 0x0010},
-	{0x13EB, 0x11BB}
-};
-
-static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = {
+static const struct rtl8367b_initval rtl8367b_initvals[] = {
 	{0x1B03, 0x0876}, {0x1200, 0x7FC4}, {0x1305, 0xC000}, {0x121E, 0x03CA},
 	{0x1233, 0x0352}, {0x1234, 0x0064}, {0x1237, 0x0096}, {0x1238, 0x0078},
 	{0x1239, 0x0084}, {0x123A, 0x0030}, {0x205F, 0x0002}, {0x2059, 0x1A00},
@@ -730,39 +518,23 @@ static int rtl8367b_write_phy_reg(struct rtl8366_smi *smi,
 static int rtl8367b_init_regs(struct rtl8366_smi *smi)
 {
 	const struct rtl8367b_initval *initvals;
-	u32 chip_num;
-	u32 chip_ver;
-	u32 rlvid;
 	int count;
-	int err;
-
-	REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL);
-	REG_RD(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num);
-	REG_RD(smi, RTL8367B_CHIP_VER_REG, &chip_ver);
 
-	if ((chip_ver ==  0x0020 || chip_ver == 0x00A0) && chip_num == 0x6367)  {
+	switch (smi->rtl8367b_chip) {
+	case RTL8367B_CHIP_RTL8367RB:
+	case RTL8367B_CHIP_RTL8367R_VB:
+		initvals = rtl8367b_initvals;
+		count = ARRAY_SIZE(rtl8367b_initvals);
+		break;
+	case RTL8367B_CHIP_RTL8367RB_VB:
+	case RTL8367B_CHIP_RTL8367S:
 		initvals = rtl8367c_initvals;
 		count = ARRAY_SIZE(rtl8367c_initvals);
-	} else {
-		rlvid = (chip_ver >> RTL8367B_CHIP_VER_RLVID_SHIFT) &
-			RTL8367B_CHIP_VER_RLVID_MASK;
-		switch (rlvid) {
-		case 0:
-			initvals = rtl8367r_vb_initvals_0;
-			count = ARRAY_SIZE(rtl8367r_vb_initvals_0);
-			break;
-		case 1:
-			initvals = rtl8367r_vb_initvals_1;
-			count = ARRAY_SIZE(rtl8367r_vb_initvals_1);
-			break;
-		default:
-			dev_err(smi->parent, "unknow rlvid %u\n", rlvid);
-			return -ENODEV;
-		}
+		break;
+	default:
+		return -ENODEV;
 	}
 
-	/* TODO: disable RLTP */
-
 	return rtl8367b_write_initvals(smi, initvals, count);
 }
 
@@ -939,21 +711,48 @@ static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id,
 }
 
 #ifdef CONFIG_OF
-static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
+static int rtl8367b_extif_init_of(struct rtl8366_smi *smi,
 				  const char *name)
 {
 	struct rtl8367_extif_config *cfg;
 	const __be32 *prop;
 	int size;
 	int err;
+	unsigned cpu_port;
+	unsigned id = UINT_MAX;
 
 	prop = of_get_property(smi->parent->of_node, name, &size);
-	if (!prop)
-		return rtl8367b_extif_init(smi, id, NULL);
+	if (!prop || (size != (10 * sizeof(*prop)))) {
+		dev_err(smi->parent, "%s property is not defined or invalid\n", name);
+		err = -EINVAL;
+		goto err_init;
+	}
 
-	if (size != (9 * sizeof(*prop))) {
-		dev_err(smi->parent, "%s property is invalid\n", name);
-		return -EINVAL;
+	cpu_port = be32_to_cpup(prop++);
+	switch (cpu_port) {
+	case RTL8367B_CPU_PORT_NUM:
+	case RTL8367B_CPU_PORT_NUM + 1:
+	case RTL8367B_CPU_PORT_NUM + 2:
+		if (smi->rtl8367b_chip == RTL8367B_CHIP_RTL8367R_VB) { /* for the RTL8367R-VB chip, cpu_port 5 corresponds to extif1 */
+			if (cpu_port == RTL8367B_CPU_PORT_NUM)
+				id = 1;
+			else {
+				dev_err(smi->parent, "wrong cpu_port %u in %s property\n", cpu_port, name);
+				err = -EINVAL;
+				goto err_init;
+			}
+		} else {
+			id = cpu_port - RTL8367B_CPU_PORT_NUM;
+		}
+		if (smi->cpu_port == UINT_MAX) {
+			dev_info(smi->parent, "cpu_port:%u, assigned to extif%u\n", cpu_port, id);
+			smi->cpu_port = cpu_port;
+		}
+		break;
+	default:
+		dev_err(smi->parent, "wrong cpu_port %u in %s property\n", cpu_port, name);
+		err = -EINVAL;
+		goto err_init;
 	}
 
 	cfg = kzalloc(sizeof(struct rtl8367_extif_config), GFP_KERNEL);
@@ -973,10 +772,15 @@ static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
 	err = rtl8367b_extif_init(smi, id, cfg);
 	kfree(cfg);
 
+err_init:
+	if (id != 0) rtl8367b_extif_init(smi, 0, NULL);
+	if (id != 1) rtl8367b_extif_init(smi, 1, NULL);
+	if (id != 2) rtl8367b_extif_init(smi, 2, NULL);
+
 	return err;
 }
 #else
-static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
+static int rtl8367b_extif_init_of(struct rtl8366_smi *smi,
 				  const char *name)
 {
 	return -EINVAL;
@@ -997,15 +801,7 @@ static int rtl8367b_setup(struct rtl8366_smi *smi)
 
 	/* initialize external interfaces */
 	if (smi->parent->of_node) {
-		err = rtl8367b_extif_init_of(smi, 0, "realtek,extif0");
-		if (err)
-			return err;
-
-		err = rtl8367b_extif_init_of(smi, 1, "realtek,extif1");
-		if (err)
-			return err;
-
-		err = rtl8367b_extif_init_of(smi, 2, "realtek,extif2");
+		err = rtl8367b_extif_init_of(smi, "realtek,extif");
 		if (err)
 			return err;
 	} else {
@@ -1530,10 +1326,10 @@ static int rtl8367b_detect(struct rtl8366_smi *smi)
 	const char *chip_name = NULL;
 	u32 chip_num;
 	u32 chip_ver;
-	u32 chip_mode;
 	int ret;
 
-	/* TODO: improve chip detection */
+	smi->rtl8367b_chip = RTL8367B_CHIP_UNKNOWN;
+
 	rtl8366_smi_write_reg(smi, RTL8367B_RTL_MAGIC_ID_REG,
 			      RTL8367B_RTL_MAGIC_ID_VAL);
 
@@ -1551,44 +1347,36 @@ static int rtl8367b_detect(struct rtl8366_smi *smi)
 		return ret;
 	}
 
-	ret = rtl8366_smi_read_reg(smi, RTL8367B_CHIP_MODE_REG, &chip_mode);
-	if (ret) {
-		dev_err(smi->parent, "unable to read %s register\n",
-			"chip mode");
-		return ret;
-	}
-
 	switch (chip_ver) {
 	case 0x0020:
-		if (chip_num == 0x6367)
+		if (chip_num == 0x6367) {
 			chip_name = "8367RB-VB";
+			smi->rtl8367b_chip = RTL8367B_CHIP_RTL8367RB_VB;
+		}
 		break;
 	case 0x00A0:
-		if (chip_num == 0x6367)
+		if (chip_num == 0x6367) {
 			chip_name = "8367S";
+			smi->rtl8367b_chip = RTL8367B_CHIP_RTL8367S;
+		}
 		break;
 	case 0x1000:
 		chip_name = "8367RB";
+		smi->rtl8367b_chip = RTL8367B_CHIP_RTL8367RB;
 		break;
 	case 0x1010:
 		chip_name = "8367R-VB";
+		smi->rtl8367b_chip = RTL8367B_CHIP_RTL8367R_VB;
 	}
 
 	if (!chip_name) {
 		dev_err(smi->parent,
-			"unknown chip num:%04x ver:%04x, mode:%04x\n",
-			chip_num, chip_ver, chip_mode);
+			"unknown chip (num:%04x ver:%04x)\n",
+			chip_num, chip_ver);
 		return -ENODEV;
 	}
 
-	dev_info(smi->parent, "RTL%s chip found\n", chip_name);
-
-	if (of_property_present(smi->parent->of_node, "realtek,extif2"))
-		smi->cpu_port = RTL8367B_CPU_PORT_NUM + 2;
-	else if (of_property_present(smi->parent->of_node, "realtek,extif1") && (chip_ver != 0x1010)) /* for the RTL8367R-VB chip, extif1 corresponds to cpu_port 5 */ 
-		smi->cpu_port = RTL8367B_CPU_PORT_NUM + 1;
-
-	dev_info(smi->parent, "CPU port: %u\n", smi->cpu_port);
+	dev_info(smi->parent, "RTL%s chip found (num:%04x ver:%04x)\n", chip_name, chip_num, chip_ver);
 
 	return 0;
 }
@@ -1628,7 +1416,7 @@ static int  rtl8367b_probe(struct platform_device *pdev)
 	smi->cmd_write = 0xb8;
 	smi->ops = &rtl8367b_smi_ops;
 	smi->num_ports = RTL8367B_NUM_PORTS;
-	smi->cpu_port = RTL8367B_CPU_PORT_NUM;
+	smi->cpu_port = UINT_MAX; /* not defined yet */
 	smi->num_vlan_mc = RTL8367B_NUM_VLANS;
 	smi->mib_counters = rtl8367b_mib_counters;
 	smi->num_mib_counters = ARRAY_SIZE(rtl8367b_mib_counters);
diff --git a/target/linux/generic/hack-6.1/230-openwrt_lzma_options.patch b/target/linux/generic/hack-6.1/230-openwrt_lzma_options.patch
index 55530c5c7e..ddf7f5e0c0 100644
--- a/target/linux/generic/hack-6.1/230-openwrt_lzma_options.patch
+++ b/target/linux/generic/hack-6.1/230-openwrt_lzma_options.patch
@@ -23,7 +23,7 @@ Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
  	{ {0x02, 0x21}, "lz4", unlz4 },
 --- a/scripts/Makefile.lib
 +++ b/scripts/Makefile.lib
-@@ -443,10 +443,10 @@ quiet_cmd_bzip2_with_size = BZIP2   $@
+@@ -447,10 +447,10 @@ quiet_cmd_bzip2_with_size = BZIP2   $@
  # ---------------------------------------------------------------------------
  
  quiet_cmd_lzma = LZMA    $@
diff --git a/target/linux/generic/hack-6.1/253-ksmbd-config.patch b/target/linux/generic/hack-6.1/253-ksmbd-config.patch
index a57c914180..79bd687981 100644
--- a/target/linux/generic/hack-6.1/253-ksmbd-config.patch
+++ b/target/linux/generic/hack-6.1/253-ksmbd-config.patch
@@ -10,7 +10,7 @@ Subject: [PATCH] Kconfig: add tristate for OID and ASNI string
 
 --- a/init/Kconfig
 +++ b/init/Kconfig
-@@ -2013,7 +2013,7 @@ config PADATA
+@@ -2014,7 +2014,7 @@ config PADATA
  	bool
  
  config ASN1
diff --git a/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
index faaa40f9bd..42b44d564d 100644
--- a/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
+++ b/target/linux/generic/hack-6.1/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  static int aqr_config_intr(struct phy_device *phydev)
  {
  	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
-@@ -860,6 +930,30 @@ static struct phy_driver aqr_driver[] =
+@@ -869,6 +939,30 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  	.link_change_notify = aqr107_link_change_notify,
  },
@@ -137,7 +137,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  };
  
  module_phy_driver(aqr_driver);
-@@ -877,6 +971,8 @@ static struct mdio_device_id __maybe_unu
+@@ -886,6 +980,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
diff --git a/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
index d83cc48a33..6d107c3349 100644
--- a/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
+++ b/target/linux/generic/hack-6.1/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
  #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
-@@ -960,6 +962,30 @@ static struct phy_driver aqr_driver[] =
+@@ -969,6 +971,30 @@ static struct phy_driver aqr_driver[] =
  	.get_strings	= aqr107_get_strings,
  	.get_stats	= aqr107_get_stats,
  },
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  };
  
  module_phy_driver(aqr_driver);
-@@ -979,6 +1005,8 @@ static struct mdio_device_id __maybe_unu
+@@ -988,6 +1014,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
diff --git a/target/linux/generic/hack-6.1/902-debloat_proc.patch b/target/linux/generic/hack-6.1/902-debloat_proc.patch
index ee3caa9f47..52504fa7a6 100644
--- a/target/linux/generic/hack-6.1/902-debloat_proc.patch
+++ b/target/linux/generic/hack-6.1/902-debloat_proc.patch
@@ -29,7 +29,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/fs/locks.c
 +++ b/fs/locks.c
-@@ -2909,6 +2909,8 @@ static const struct seq_operations locks
+@@ -2907,6 +2907,8 @@ static const struct seq_operations locks
  
  static int __init proc_locks_init(void)
  {
@@ -341,7 +341,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/ipv4/fib_trie.c
 +++ b/net/ipv4/fib_trie.c
-@@ -3036,11 +3036,13 @@ static const struct seq_operations fib_r
+@@ -3037,11 +3037,13 @@ static const struct seq_operations fib_r
  
  int __net_init fib_proc_init(struct net *net)
  {
@@ -357,7 +357,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  			fib_triestat_seq_show, NULL))
  		goto out2;
  
-@@ -3051,17 +3053,21 @@ int __net_init fib_proc_init(struct net
+@@ -3052,17 +3054,21 @@ int __net_init fib_proc_init(struct net
  	return 0;
  
  out3:
diff --git a/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch b/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch
index 105eb3da4b..8b6bd6a786 100644
--- a/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch
+++ b/target/linux/generic/hack-6.1/904-debloat_dma_buf.patch
@@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 +MODULE_LICENSE("GPL");
 --- a/kernel/sched/core.c
 +++ b/kernel/sched/core.c
-@@ -4367,6 +4367,7 @@ int wake_up_state(struct task_struct *p,
+@@ -4363,6 +4363,7 @@ int wake_up_state(struct task_struct *p,
  {
  	return try_to_wake_up(p, state, 0);
  }
diff --git a/target/linux/generic/hack-6.1/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-6.1/911-kobject_add_broadcast_uevent.patch
index 9854585d25..c828ecd450 100644
--- a/target/linux/generic/hack-6.1/911-kobject_add_broadcast_uevent.patch
+++ b/target/linux/generic/hack-6.1/911-kobject_add_broadcast_uevent.patch
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  #endif /* _KOBJECT_H_ */
 --- a/lib/kobject_uevent.c
 +++ b/lib/kobject_uevent.c
-@@ -691,6 +691,43 @@ int add_uevent_var(struct kobj_uevent_en
+@@ -706,6 +706,43 @@ int add_uevent_var(struct kobj_uevent_en
  EXPORT_SYMBOL_GPL(add_uevent_var);
  
  #if defined(CONFIG_NET)
diff --git a/target/linux/generic/hack-6.6/200-tools_portability.patch b/target/linux/generic/hack-6.6/200-tools_portability.patch
index 5d2b20dcb7..f016e641c6 100644
--- a/target/linux/generic/hack-6.6/200-tools_portability.patch
+++ b/target/linux/generic/hack-6.6/200-tools_portability.patch
@@ -40,7 +40,20 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  # sysroots and flags or to avoid the GCC call in pure Clang builds.
 --- a/tools/include/linux/types.h
 +++ b/tools/include/linux/types.h
-@@ -56,6 +56,7 @@ typedef __s8  s8;
+@@ -10,8 +10,12 @@
+ #define __SANE_USERSPACE_TYPES__	/* For PPC64, to get LL64 types */
+ #endif
+ 
++#ifndef __linux__
++#include <tools/linux_types.h>
++#else
+ #include <asm/types.h>
+ #include <asm/posix_types.h>
++#endif
+ 
+ struct page;
+ struct kmem_cache;
+@@ -56,6 +60,7 @@ typedef __s8  s8;
  #define __user
  #endif
  #define __must_check
@@ -95,3 +108,150 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  /**
   * skip_spaces - Removes leading whitespace from @str.
+--- a/tools/arch/x86/include/asm/insn.h
++++ b/tools/arch/x86/include/asm/insn.h
+@@ -7,7 +7,7 @@
+  * Copyright (C) IBM Corporation, 2009
+  */
+ 
+-#include <asm/byteorder.h>
++#include <linux/kernel.h>
+ /* insn_attr_t is defined in inat.h */
+ #include "inat.h" /* __ignore_sync_check__ */
+ 
+--- a/tools/arch/x86/include/asm/orc_types.h
++++ b/tools/arch/x86/include/asm/orc_types.h
+@@ -46,7 +46,6 @@
+ #define ORC_TYPE_REGS_PARTIAL		4
+ 
+ #ifndef __ASSEMBLY__
+-#include <asm/byteorder.h>
+ 
+ /*
+  * This struct is more or less a vastly simplified version of the DWARF Call
+@@ -59,12 +58,12 @@
+ struct orc_entry {
+ 	s16		sp_offset;
+ 	s16		bp_offset;
+-#if defined(__LITTLE_ENDIAN_BITFIELD)
++#if __BYTE_ORDER == __LITTLE_ENDIAN
+ 	unsigned	sp_reg:4;
+ 	unsigned	bp_reg:4;
+ 	unsigned	type:3;
+ 	unsigned	signal:1;
+-#elif defined(__BIG_ENDIAN_BITFIELD)
++#elif __BYTE_ORDER == __BIG_ENDIAN
+ 	unsigned	bp_reg:4;
+ 	unsigned	sp_reg:4;
+ 	unsigned	unused:4;
+--- a/tools/include/linux/rbtree.h
++++ b/tools/include/linux/rbtree.h
+@@ -18,7 +18,6 @@
+ #define __TOOLS_LINUX_PERF_RBTREE_H
+ 
+ #include <linux/kernel.h>
+-#include <linux/stddef.h>
+ 
+ struct rb_node {
+ 	unsigned long  __rb_parent_color;
+--- a/tools/include/tools/be_byteshift.h
++++ b/tools/include/tools/be_byteshift.h
+@@ -2,6 +2,10 @@
+ #ifndef _TOOLS_BE_BYTESHIFT_H
+ #define _TOOLS_BE_BYTESHIFT_H
+ 
++#ifndef __linux__
++#include "linux_types.h"
++#endif
++
+ #include <stdint.h>
+ 
+ static inline uint16_t __get_unaligned_be16(const uint8_t *p)
+--- a/tools/include/tools/le_byteshift.h
++++ b/tools/include/tools/le_byteshift.h
+@@ -2,6 +2,10 @@
+ #ifndef _TOOLS_LE_BYTESHIFT_H
+ #define _TOOLS_LE_BYTESHIFT_H
+ 
++#ifndef __linux__
++#include "linux_types.h"
++#endif
++
+ #include <stdint.h>
+ 
+ static inline uint16_t __get_unaligned_le16(const uint8_t *p)
+--- /dev/null
++++ b/tools/include/tools/linux_types.h
+@@ -0,0 +1,18 @@
++#ifndef __LINUX_TYPES_H
++#define __LINUX_TYPES_H
++
++#include <stdint.h>
++
++typedef int8_t __s8;
++typedef uint8_t __u8;
++
++typedef int16_t __s16;
++typedef uint16_t __u16;
++
++typedef int32_t __s32;
++typedef uint32_t __u32;
++
++typedef int64_t __s64;
++typedef uint64_t __u64;
++
++#endif
+--- a/tools/objtool/Makefile
++++ b/tools/objtool/Makefile
+@@ -39,6 +39,8 @@ OBJTOOL_LDFLAGS := $(LIBELF_LIBS) $(LIBS
+ elfshdr := $(shell echo '$(pound)include <libelf.h>' | $(HOSTCC) $(OBJTOOL_CFLAGS) -x c -E - | grep elf_getshdr)
+ OBJTOOL_CFLAGS += $(if $(elfshdr),,-DLIBELF_USE_DEPRECATED)
+ 
++OBJTOOL_CFLAGS += $(HOST_EXTRACFLAGS)
++
+ # Always want host compilation.
+ HOST_OVERRIDES := CC="$(HOSTCC)" LD="$(HOSTLD)" AR="$(HOSTAR)"
+ 
+--- a/tools/objtool/orc_dump.c
++++ b/tools/objtool/orc_dump.c
+@@ -4,10 +4,10 @@
+  */
+ 
+ #include <unistd.h>
+-#include <asm/orc_types.h>
+ #include <objtool/objtool.h>
+ #include <objtool/warn.h>
+ #include <objtool/endianness.h>
++#include <asm/orc_types.h>
+ 
+ static const char *reg_name(unsigned int reg)
+ {
+--- a/tools/objtool/orc_gen.c
++++ b/tools/objtool/orc_gen.c
+@@ -7,11 +7,11 @@
+ #include <string.h>
+ 
+ #include <linux/objtool_types.h>
+-#include <asm/orc_types.h>
+ 
+ #include <objtool/check.h>
+ #include <objtool/warn.h>
+ #include <objtool/endianness.h>
++#include <asm/orc_types.h>
+ 
+ static int init_orc_entry(struct orc_entry *orc, struct cfi_state *cfi,
+ 			  struct instruction *insn)
+--- a/tools/arch/x86/lib/insn.c
++++ b/tools/arch/x86/lib/insn.c
+@@ -15,7 +15,11 @@
+ #include "../include/asm/insn.h" /* __ignore_sync_check__ */
+ #include "../include/asm-generic/unaligned.h" /* __ignore_sync_check__ */
+ 
++#ifdef __KERNEL__
+ #include <linux/errno.h>
++#else
++#include <errno.h>
++#endif
+ #include <linux/kconfig.h>
+ 
+ #include "../include/asm/emulate_prefix.h" /* __ignore_sync_check__ */
diff --git a/target/linux/generic/hack-6.6/230-openwrt_lzma_options.patch b/target/linux/generic/hack-6.6/230-openwrt_lzma_options.patch
index a22acafea1..ca70da7e31 100644
--- a/target/linux/generic/hack-6.6/230-openwrt_lzma_options.patch
+++ b/target/linux/generic/hack-6.6/230-openwrt_lzma_options.patch
@@ -23,7 +23,7 @@ Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
  	{ {0x02, 0x21}, "lz4", unlz4 },
 --- a/scripts/Makefile.lib
 +++ b/scripts/Makefile.lib
-@@ -456,10 +456,10 @@ quiet_cmd_bzip2_with_size = BZIP2   $@
+@@ -460,10 +460,10 @@ quiet_cmd_bzip2_with_size = BZIP2   $@
  # ---------------------------------------------------------------------------
  
  quiet_cmd_lzma = LZMA    $@
diff --git a/target/linux/generic/hack-6.6/253-ksmbd-config.patch b/target/linux/generic/hack-6.6/253-ksmbd-config.patch
index 298a0787b7..7642b38938 100644
--- a/target/linux/generic/hack-6.6/253-ksmbd-config.patch
+++ b/target/linux/generic/hack-6.6/253-ksmbd-config.patch
@@ -10,7 +10,7 @@ Subject: [PATCH] Kconfig: add tristate for OID and ASNI string
 
 --- a/init/Kconfig
 +++ b/init/Kconfig
-@@ -1989,7 +1989,7 @@ config PADATA
+@@ -1990,7 +1990,7 @@ config PADATA
  	bool
  
  config ASN1
@@ -21,7 +21,7 @@ Subject: [PATCH] Kconfig: add tristate for OID and ASNI string
  	  that can be interpreted by the ASN.1 stream decoder and used to
 --- a/lib/Kconfig
 +++ b/lib/Kconfig
-@@ -647,7 +647,7 @@ config LIBFDT
+@@ -641,7 +641,7 @@ config LIBFDT
  	bool
  
  config OID_REGISTRY
diff --git a/target/linux/generic/hack-6.6/600-net-enable-fraglist-GRO-by-default.patch b/target/linux/generic/hack-6.6/600-net-enable-fraglist-GRO-by-default.patch
index 51f990039c..9633525bc4 100644
--- a/target/linux/generic/hack-6.6/600-net-enable-fraglist-GRO-by-default.patch
+++ b/target/linux/generic/hack-6.6/600-net-enable-fraglist-GRO-by-default.patch
@@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/include/linux/netdev_features.h
 +++ b/include/linux/netdev_features.h
-@@ -242,10 +242,10 @@ static inline int find_next_netdev_featu
+@@ -243,10 +243,10 @@ static inline int find_next_netdev_featu
  #define NETIF_F_UPPER_DISABLES	NETIF_F_LRO
  
  /* changeable features with no special hardware requirements */
diff --git a/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
index ea5c700702..dee901fbe3 100644
--- a/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
+++ b/target/linux/generic/hack-6.6/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -97,7 +97,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  static int aqr_config_intr(struct phy_device *phydev)
  {
  	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
-@@ -807,7 +875,7 @@ static struct phy_driver aqr_driver[] =
+@@ -816,7 +884,7 @@ static struct phy_driver aqr_driver[] =
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
  	.name		= "Aquantia AQR112",
  	.probe		= aqr107_probe,
@@ -106,7 +106,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  	.config_intr	= aqr_config_intr,
  	.handle_interrupt = aqr_handle_interrupt,
  	.get_tunable    = aqr107_get_tunable,
-@@ -830,7 +898,7 @@ static struct phy_driver aqr_driver[] =
+@@ -839,7 +907,7 @@ static struct phy_driver aqr_driver[] =
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
  	.name		= "Aquantia AQR412",
  	.probe		= aqr107_probe,
diff --git a/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
index 66298b89ed..075b0fc8e2 100644
--- a/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
+++ b/target/linux/generic/hack-6.6/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
  #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
-@@ -1014,6 +1016,30 @@ static struct phy_driver aqr_driver[] =
+@@ -1023,6 +1025,30 @@ static struct phy_driver aqr_driver[] =
  	.led_hw_control_get = aqr_phy_led_hw_control_get,
  	.led_polarity_set = aqr_phy_led_polarity_set,
  },
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  };
  
  module_phy_driver(aqr_driver);
-@@ -1034,6 +1060,8 @@ static struct mdio_device_id __maybe_unu
+@@ -1043,6 +1069,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
diff --git a/target/linux/generic/hack-6.6/800-GPIO-add-named-gpio-exports.patch b/target/linux/generic/hack-6.6/800-GPIO-add-named-gpio-exports.patch
index 666dcfad4d..cb03f760df 100644
--- a/target/linux/generic/hack-6.6/800-GPIO-add-named-gpio-exports.patch
+++ b/target/linux/generic/hack-6.6/800-GPIO-add-named-gpio-exports.patch
@@ -15,7 +15,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  #include "gpiolib.h"
  #include "gpiolib-of.h"
-@@ -1111,3 +1113,74 @@ void of_gpiochip_remove(struct gpio_chip
+@@ -1129,3 +1131,74 @@ void of_gpiochip_remove(struct gpio_chip
  {
  	of_node_put(dev_of_node(&chip->gpiodev->dev));
  }
diff --git a/target/linux/generic/hack-6.6/902-debloat_proc.patch b/target/linux/generic/hack-6.6/902-debloat_proc.patch
index 26832476c3..8b774863a9 100644
--- a/target/linux/generic/hack-6.6/902-debloat_proc.patch
+++ b/target/linux/generic/hack-6.6/902-debloat_proc.patch
@@ -29,7 +29,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/fs/locks.c
 +++ b/fs/locks.c
-@@ -2897,6 +2897,8 @@ static const struct seq_operations locks
+@@ -2895,6 +2895,8 @@ static const struct seq_operations locks
  
  static int __init proc_locks_init(void)
  {
@@ -235,7 +235,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (!pe)
 --- a/mm/vmalloc.c
 +++ b/mm/vmalloc.c
-@@ -4438,6 +4438,8 @@ static const struct seq_operations vmall
+@@ -4455,6 +4455,8 @@ static const struct seq_operations vmall
  
  static int __init proc_vmalloc_init(void)
  {
@@ -341,7 +341,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/ipv4/fib_trie.c
 +++ b/net/ipv4/fib_trie.c
-@@ -3036,11 +3036,13 @@ static const struct seq_operations fib_r
+@@ -3037,11 +3037,13 @@ static const struct seq_operations fib_r
  
  int __net_init fib_proc_init(struct net *net)
  {
@@ -357,7 +357,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  			fib_triestat_seq_show, NULL))
  		goto out2;
  
-@@ -3051,17 +3053,21 @@ int __net_init fib_proc_init(struct net
+@@ -3052,17 +3054,21 @@ int __net_init fib_proc_init(struct net
  	return 0;
  
  out3:
diff --git a/target/linux/generic/hack-6.6/904-debloat_dma_buf.patch b/target/linux/generic/hack-6.6/904-debloat_dma_buf.patch
index 8fdaab5ad6..355bd0d70c 100644
--- a/target/linux/generic/hack-6.6/904-debloat_dma_buf.patch
+++ b/target/linux/generic/hack-6.6/904-debloat_dma_buf.patch
@@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 +MODULE_LICENSE("GPL");
 --- a/kernel/sched/core.c
 +++ b/kernel/sched/core.c
-@@ -4487,6 +4487,7 @@ int wake_up_state(struct task_struct *p,
+@@ -4483,6 +4483,7 @@ int wake_up_state(struct task_struct *p,
  {
  	return try_to_wake_up(p, state, 0);
  }
diff --git a/target/linux/generic/hack-6.6/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-6.6/911-kobject_add_broadcast_uevent.patch
index 7a21e73dae..56cd696e18 100644
--- a/target/linux/generic/hack-6.6/911-kobject_add_broadcast_uevent.patch
+++ b/target/linux/generic/hack-6.6/911-kobject_add_broadcast_uevent.patch
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  #endif /* _KOBJECT_H_ */
 --- a/lib/kobject_uevent.c
 +++ b/lib/kobject_uevent.c
-@@ -691,6 +691,43 @@ int add_uevent_var(struct kobj_uevent_en
+@@ -706,6 +706,43 @@ int add_uevent_var(struct kobj_uevent_en
  EXPORT_SYMBOL_GPL(add_uevent_var);
  
  #if defined(CONFIG_NET)
diff --git a/target/linux/generic/pending-5.15/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-5.15/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
index ae53770c11..4ddd27add9 100644
--- a/target/linux/generic/pending-5.15/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+++ b/target/linux/generic/pending-5.15/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	return magic == UBIFS_NODE_MAGIC;
 +}
 +
-+static void __init ubiblock_create_auto_rootfs(void)
++static void ubiblock_create_auto_rootfs(void)
 +{
 +	int ubi_num, ret, is_ubifs;
 +	struct ubi_volume_desc *desc;
diff --git a/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
index a3d66c54b3..8fea984a33 100644
--- a/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
+++ b/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
@@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
 
 --- a/mm/page_alloc.c
 +++ b/mm/page_alloc.c
-@@ -7899,7 +7899,7 @@ static void __init alloc_node_mem_map(st
+@@ -7910,7 +7910,7 @@ static void __init alloc_node_mem_map(st
  	if (pgdat == NODE_DATA(0)) {
  		mem_map = NODE_DATA(0)->node_mem_map;
  		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
diff --git a/target/linux/generic/pending-6.1/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-6.1/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
index a43da2a572..f0ea8e8cb5 100644
--- a/target/linux/generic/pending-6.1/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+++ b/target/linux/generic/pending-6.1/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	return magic == UBIFS_NODE_MAGIC;
 +}
 +
-+static void __init ubiblock_create_auto_rootfs(struct ubi_volume_info *vi)
++static void ubiblock_create_auto_rootfs(struct ubi_volume_info *vi)
 +{
 +	int ret, is_ubifs;
 +	struct ubi_volume_desc *desc;
diff --git a/target/linux/generic/pending-6.1/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-6.1/530-jffs2_make_lzma_available.patch
index 27a673399a..5dd47ef388 100644
--- a/target/linux/generic/pending-6.1/530-jffs2_make_lzma_available.patch
+++ b/target/linux/generic/pending-6.1/530-jffs2_make_lzma_available.patch
@@ -244,7 +244,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +}
 --- a/fs/jffs2/super.c
 +++ b/fs/jffs2/super.c
-@@ -374,14 +374,41 @@ static int __init init_jffs2_fs(void)
+@@ -375,14 +375,41 @@ static int __init init_jffs2_fs(void)
  	BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68);
  	BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32);
  
diff --git a/target/linux/generic/pending-6.1/630-packet_socket_type.patch b/target/linux/generic/pending-6.1/630-packet_socket_type.patch
index 359d002b0e..5553fba94b 100644
--- a/target/linux/generic/pending-6.1/630-packet_socket_type.patch
+++ b/target/linux/generic/pending-6.1/630-packet_socket_type.patch
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  #define PACKET_FANOUT_LB		1
 --- a/net/packet/af_packet.c
 +++ b/net/packet/af_packet.c
-@@ -1866,6 +1866,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1927,6 +1927,7 @@ static int packet_rcv_spkt(struct sk_buf
  {
  	struct sock *sk;
  	struct sockaddr_pkt *spkt;
@@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	/*
  	 *	When we registered the protocol we saved the socket in the data
-@@ -1873,6 +1874,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1934,6 +1935,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 */
  
  	sk = pt->af_packet_priv;
@@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	/*
  	 *	Yank back the headers [hope the device set this
-@@ -1885,7 +1887,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1946,7 +1948,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 *	so that this procedure is noop.
  	 */
  
@@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		goto out;
  
  	if (!net_eq(dev_net(dev), sock_net(sk)))
-@@ -2131,12 +2133,12 @@ static int packet_rcv(struct sk_buff *sk
+@@ -2192,12 +2194,12 @@ static int packet_rcv(struct sk_buff *sk
  	unsigned int snaplen, res;
  	bool is_drop_n_account = false;
  
@@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -2263,12 +2265,12 @@ static int tpacket_rcv(struct sk_buff *s
+@@ -2324,12 +2326,12 @@ static int tpacket_rcv(struct sk_buff *s
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
  
@@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -3377,6 +3379,7 @@ static int packet_create(struct net *net
+@@ -3443,6 +3445,7 @@ static int packet_create(struct net *net
  	mutex_init(&po->pg_vec_lock);
  	po->rollover = NULL;
  	po->prot_hook.func = packet_rcv;
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	if (sock->type == SOCK_PACKET)
  		po->prot_hook.func = packet_rcv_spkt;
-@@ -4014,6 +4017,16 @@ packet_setsockopt(struct socket *sock, i
+@@ -4096,6 +4099,16 @@ packet_setsockopt(struct socket *sock, i
  		WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit);
  		return 0;
  	}
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	default:
  		return -ENOPROTOOPT;
  	}
-@@ -4070,6 +4083,13 @@ static int packet_getsockopt(struct sock
+@@ -4152,6 +4165,13 @@ static int packet_getsockopt(struct sock
  	case PACKET_VNET_HDR:
  		val = po->has_vnet_hdr;
  		break;
diff --git a/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
index 43d49f07d1..1d16b81543 100644
--- a/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+++ b/target/linux/generic/pending-6.1/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
@@ -66,7 +66,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  static void rt_fibinfo_free(struct rtable __rcu **rtp)
 --- a/net/ipv4/fib_trie.c
 +++ b/net/ipv4/fib_trie.c
-@@ -2783,6 +2783,7 @@ static const char *const rtn_type_names[
+@@ -2784,6 +2784,7 @@ static const char *const rtn_type_names[
  	[RTN_THROW] = "THROW",
  	[RTN_NAT] = "NAT",
  	[RTN_XRESOLVE] = "XRESOLVE",
diff --git a/target/linux/generic/pending-6.1/680-net-add-TCP-fraglist-GRO-support.patch b/target/linux/generic/pending-6.1/680-net-add-TCP-fraglist-GRO-support.patch
index f52233fe90..09284d446a 100644
--- a/target/linux/generic/pending-6.1/680-net-add-TCP-fraglist-GRO-support.patch
+++ b/target/linux/generic/pending-6.1/680-net-add-TCP-fraglist-GRO-support.patch
@@ -80,7 +80,7 @@ Signe-off-by: Felix Fietkau <nbd@nbd.name>
  #endif /* _NET_IPV6_GRO_H */
 --- a/include/net/tcp.h
 +++ b/include/net/tcp.h
-@@ -2057,7 +2057,10 @@ void tcp_v4_destroy_sock(struct sock *sk
+@@ -2058,7 +2058,10 @@ void tcp_v4_destroy_sock(struct sock *sk
  
  struct sk_buff *tcp_gso_segment(struct sk_buff *skb,
  				netdev_features_t features);
diff --git a/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
index 9f8c3d6ff5..916b6bc6a0 100644
--- a/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
+++ b/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/net/netfilter/nf_tables_api.c
 +++ b/net/netfilter/nf_tables_api.c
-@@ -7959,7 +7959,7 @@ static int nft_register_flowtable_net_ho
+@@ -7958,7 +7958,7 @@ static int nft_register_flowtable_net_ho
  		err = flowtable->data.type->setup(&flowtable->data,
  						  hook->ops.dev,
  						  FLOW_BLOCK_BIND);
diff --git a/target/linux/generic/pending-6.1/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-6.1/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
index 13a4d190ee..6fa33ee1a8 100644
--- a/target/linux/generic/pending-6.1/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+++ b/target/linux/generic/pending-6.1/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
@@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -7079,6 +7079,7 @@ static int mv88e6xxx_register_switch(str
+@@ -7080,6 +7080,7 @@ static int mv88e6xxx_register_switch(str
  	ds->ops = &mv88e6xxx_switch_ops;
  	ds->ageing_time_min = chip->info->age_time_coeff;
  	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
diff --git a/target/linux/generic/pending-6.1/774-net-dsa-b53-mmap-allow-passing-a-chip-ID.patch b/target/linux/generic/pending-6.1/774-net-dsa-b53-mmap-allow-passing-a-chip-ID.patch
index de237374af..bb632b5eff 100644
--- a/target/linux/generic/pending-6.1/774-net-dsa-b53-mmap-allow-passing-a-chip-ID.patch
+++ b/target/linux/generic/pending-6.1/774-net-dsa-b53-mmap-allow-passing-a-chip-ID.patch
@@ -100,7 +100,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 
 --- a/drivers/net/dsa/b53/b53_common.c
 +++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2466,6 +2466,19 @@ static const struct b53_chip_data b53_sw
+@@ -2469,6 +2469,19 @@ static const struct b53_chip_data b53_sw
  		.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
  	},
  	{
diff --git a/target/linux/generic/pending-6.1/777-net-dsa-b53-mdio-add-support-for-BCM53134.patch b/target/linux/generic/pending-6.1/777-net-dsa-b53-mdio-add-support-for-BCM53134.patch
index f0ae2defce..7bed8c22a4 100644
--- a/target/linux/generic/pending-6.1/777-net-dsa-b53-mdio-add-support-for-BCM53134.patch
+++ b/target/linux/generic/pending-6.1/777-net-dsa-b53-mdio-add-support-for-BCM53134.patch
@@ -100,7 +100,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
 
 --- a/drivers/net/dsa/b53/b53_common.c
 +++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2613,6 +2613,20 @@ static const struct b53_chip_data b53_sw
+@@ -2616,6 +2616,20 @@ static const struct b53_chip_data b53_sw
  		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
  		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
  	},
@@ -121,7 +121,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  };
  
  static int b53_switch_init(struct b53_device *dev)
-@@ -2790,6 +2804,7 @@ int b53_switch_detect(struct b53_device
+@@ -2793,6 +2807,7 @@ int b53_switch_detect(struct b53_device
  		case BCM53012_DEVICE_ID:
  		case BCM53018_DEVICE_ID:
  		case BCM53019_DEVICE_ID:
diff --git a/target/linux/generic/pending-6.1/804-nvmem-core-support-mac-base-fixed-layout-cells.patch b/target/linux/generic/pending-6.1/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
index 9bb94a28b5..da25b39ae9 100644
--- a/target/linux/generic/pending-6.1/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
+++ b/target/linux/generic/pending-6.1/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
@@ -33,7 +33,7 @@ string.
  #include <linux/init.h>
  #include <linux/kref.h>
  #include <linux/module.h>
-@@ -780,6 +783,62 @@ static int nvmem_validate_keepouts(struc
+@@ -779,6 +782,62 @@ static int nvmem_validate_keepouts(struc
  	return 0;
  }
  
@@ -96,7 +96,7 @@ string.
  static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_node *np)
  {
  	struct device *dev = &nvmem->dev;
-@@ -814,6 +873,25 @@ static int nvmem_add_cells_from_dt(struc
+@@ -813,6 +872,25 @@ static int nvmem_add_cells_from_dt(struc
  		if (nvmem->fixup_dt_cell_info)
  			nvmem->fixup_dt_cell_info(nvmem, &info);
  
diff --git a/target/linux/generic/pending-6.6/410-mtd-spinand-set-bitflip_threshold-to-75-of-ECC-strength.patch b/target/linux/generic/pending-6.6/410-mtd-spinand-set-bitflip_threshold-to-75-of-ECC-strength.patch
new file mode 100644
index 0000000000..aeac79c023
--- /dev/null
+++ b/target/linux/generic/pending-6.6/410-mtd-spinand-set-bitflip_threshold-to-75-of-ECC-strength.patch
@@ -0,0 +1,63 @@
+From patchwork Mon Aug 12 01:56:41 2024
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
+X-Patchwork-Id: 1971406
+Return-Path: 
+ <linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>
+X-Original-To: incoming@patchwork.ozlabs.org
+Delivered-To: patchwork-incoming@legolas.ozlabs.org
+Date: Mon, 12 Aug 2024 02:56:41 +0100
+From: Daniel Golle <daniel@makrotopia.org>
+To: Miquel Raynal <miquel.raynal@bootlin.com>,
+	Richard Weinberger <richard@nod.at>,
+	Vignesh Raghavendra <vigneshr@ti.com>,
+	Tudor Ambarus <tudor.ambarus@linaro.org>,
+	Daniel Golle <daniel@makrotopia.org>,
+	Mika Westerberg <mika.westerberg@linux.intel.com>,
+	Chia-Lin Kao <acelan.kao@canonical.com>,
+	Martin Kurbanov <mmkurbanov@salutedevices.com>,
+	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
+Subject: [PATCH] mtd: spinand: set bitflip_threshold to 75% of ECC strength
+Message-ID: 
+ <2117e387260b0a96f95b8e1652ff79e0e2d71d53.1723427450.git.daniel@makrotopia.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+X-BeenThere: linux-mtd@lists.infradead.org
+X-Mailman-Version: 2.1.34
+Precedence: list
+List-Id: Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>
+List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-mtd>,
+ <mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe>
+List-Archive: <http://lists.infradead.org/pipermail/linux-mtd/>
+List-Post: <mailto:linux-mtd@lists.infradead.org>
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+ <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>
+Sender: "linux-mtd" <linux-mtd-bounces@lists.infradead.org>
+Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
+
+Reporting an unclean read from SPI-NAND only when the maximum number
+of correctable bitflip errors has been hit seems a bit late.
+UBI LEB scrubbing, which depends on the lower MTD device reporting
+correctable bitflips, then only kicks in when it's almost too late.
+
+Set bitflip_threshold to 75% of the ECC strength, which is also the
+default for raw NAND.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/mtd/nand/spi/core.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -1286,6 +1286,7 @@ static int spinand_init(struct spinand_d
+ 	/* Propagate ECC information to mtd_info */
+ 	mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength;
+ 	mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size;
++	mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
+ 
+ 	ret = spinand_create_dirmaps(spinand);
+ 	if (ret) {
diff --git a/target/linux/generic/pending-6.6/451-block-partitions-populate-fwnode.patch b/target/linux/generic/pending-6.6/451-block-partitions-populate-fwnode.patch
index 2aef22879d..e279b71173 100644
--- a/target/linux/generic/pending-6.6/451-block-partitions-populate-fwnode.patch
+++ b/target/linux/generic/pending-6.6/451-block-partitions-populate-fwnode.patch
@@ -1,15 +1,42 @@
-From 7f4c9c534aabe1315669e076d3fe0af0fd374cda Mon Sep 17 00:00:00 2001
+From patchwork Tue Jul 30 19:25:59 2024
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
+X-Patchwork-Id: 13747816
+Date: Tue, 30 Jul 2024 20:25:59 +0100
 From: Daniel Golle <daniel@makrotopia.org>
-Date: Thu, 30 May 2024 03:13:19 +0100
-Subject: [PATCH 2/9] block: partitions: populate fwnode
+To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
+ Conor Dooley <conor+dt@kernel.org>, Jens Axboe <axboe@kernel.dk>,
+ Daniel Golle <daniel@makrotopia.org>, Christian Brauner <brauner@kernel.org>,
+ Al Viro <viro@zeniv.linux.org.uk>, Li Lingfeng <lilingfeng3@huawei.com>,
+ Ming Lei <ming.lei@redhat.com>, Christian Heusel <christian@heusel.eu>,
+	=?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
+ Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
+ Chad Monroe <chad.monroe@adtran.com>, Yangyu Chen <cyy@cyyself.name>,
+ Tianling Shen <cnsztl@immortalwrt.org>, Chuanhong Guo <gch981213@gmail.com>,
+ Chen Minqiang <ptpt52@gmail.com>, devicetree@vger.kernel.org,
+ linux-kernel@vger.kernel.org, linux-block@vger.kernel.org
+Subject: [PATCH v5 2/4] block: partitions: populate fwnode
+Message-ID: 
+ <3051ac090ad3b3e2f5adb6b67c923261ead729a5.1722365899.git.daniel@makrotopia.org>
+References: <cover.1722365899.git.daniel@makrotopia.org>
+Precedence: bulk
+X-Mailing-List: linux-block@vger.kernel.org
+List-Id: <linux-block.vger.kernel.org>
+List-Subscribe: <mailto:linux-block+subscribe@vger.kernel.org>
+List-Unsubscribe: <mailto:linux-block+unsubscribe@vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1722365899.git.daniel@makrotopia.org>
 
-Let block partitions to be represented by a firmware node and hence
-allow them to being referenced e.g. for use with blk-nvmem.
+Assign matching firmware nodes to block partitions in order to allow
+them to be referenced e.g. as NVMEM providers.
 
 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 ---
- block/partitions/core.c | 41 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 41 insertions(+)
+ block/partitions/core.c | 72 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 72 insertions(+)
 
 --- a/block/partitions/core.c
 +++ b/block/partitions/core.c
@@ -22,36 +49,70 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  #include "check.h"
  
  static int (*const check_part[])(struct parsed_partitions *) = {
-@@ -292,6 +294,40 @@ static ssize_t whole_disk_show(struct de
+@@ -292,6 +294,74 @@ static ssize_t whole_disk_show(struct de
  }
  static const DEVICE_ATTR(whole_disk, 0444, whole_disk_show, NULL);
  
++static bool part_meta_match(const char *attr, const char *member, size_t length)
++{
++	/* check if length of attr exceeds specified maximum length */
++	if (strnlen(attr, length) == length)
++		return false;
++
++	/* return true if strings match */
++	return !strncmp(attr, member, length);
++}
++
 +static struct fwnode_handle *find_partition_fwnode(struct block_device *bdev)
 +{
 +	struct fwnode_handle *fw_parts, *fw_part;
 +	struct device *ddev = disk_to_dev(bdev->bd_disk);
 +	const char *partname, *uuid;
 +	u32 partno;
++	bool got_uuid, got_partname, got_partno;
 +
 +	fw_parts = device_get_named_child_node(ddev, "partitions");
 +	if (!fw_parts)
 +		return NULL;
 +
 +	fwnode_for_each_child_node(fw_parts, fw_part) {
-+		if (!fwnode_property_read_string(fw_part, "uuid", &uuid) &&
-+		    (!bdev->bd_meta_info || strncmp(uuid,
-+						    bdev->bd_meta_info->uuid,
-+						    PARTITION_META_INFO_UUIDLTH)))
++		got_uuid = false;
++		got_partname = false;
++		got_partno = false;
++		/*
++		 * In case 'uuid' is defined in the partitions firmware node
++		 * require partition meta info being present and the specified
++		 * uuid to match.
++		 */
++		got_uuid = !fwnode_property_read_string(fw_part, "uuid", &uuid);
++		if (got_uuid && (!bdev->bd_meta_info ||
++				 !part_meta_match(uuid, bdev->bd_meta_info->uuid,
++						  PARTITION_META_INFO_UUIDLTH)))
++			continue;
++
++		/*
++		 * In case 'partname' is defined in the partitions firmware node
++		 * require partition meta info being present and the specified
++		 * volname to match.
++		 */
++		got_partname = !fwnode_property_read_string(fw_part, "partname",
++							    &partname);
++		if (got_partname && (!bdev->bd_meta_info ||
++				     !part_meta_match(partname,
++						      bdev->bd_meta_info->volname,
++						      PARTITION_META_INFO_VOLNAMELTH)))
 +			continue;
 +
-+		if (!fwnode_property_read_string(fw_part, "partname", &partname) &&
-+		    (!bdev->bd_meta_info || strncmp(partname,
-+						    bdev->bd_meta_info->volname,
-+						    PARTITION_META_INFO_VOLNAMELTH)))
++		/*
++		 * In case 'partno' is defined in the partitions firmware node
++		 * the specified partno needs to match.
++		 */
++		got_partno = !fwnode_property_read_u32(fw_part, "partno", &partno);
++		if (got_partno && bdev->bd_partno != partno)
 +			continue;
 +
-+		if (!fwnode_property_read_u32(fw_part, "partno", &partno) &&
-+		    bdev->bd_partno != partno)
++		/* Skip if no matching criteria is present in firmware node */
++		if (!got_uuid && !got_partname && !got_partno)
 +			continue;
 +
 +		return fw_part;
@@ -63,7 +124,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  /*
   * Must be called either with open_mutex held, before a disk can be opened or
   * after all disk users are gone.
-@@ -374,6 +410,8 @@ static struct block_device *add_partitio
+@@ -374,6 +444,8 @@ static struct block_device *add_partitio
  			goto out_put;
  	}
  
diff --git a/target/linux/generic/pending-6.6/452-block-add-support-for-notifications.patch b/target/linux/generic/pending-6.6/452-block-add-support-for-notifications.patch
index c5a3391e45..cad3fbfa90 100644
--- a/target/linux/generic/pending-6.6/452-block-add-support-for-notifications.patch
+++ b/target/linux/generic/pending-6.6/452-block-add-support-for-notifications.patch
@@ -1,7 +1,34 @@
-From e07ace307ce598847074a096f408bec0e3a392ed Mon Sep 17 00:00:00 2001
+From patchwork Tue Jul 30 19:26:42 2024
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
+X-Patchwork-Id: 13747817
+Date: Tue, 30 Jul 2024 20:26:42 +0100
 From: Daniel Golle <daniel@makrotopia.org>
-Date: Thu, 30 May 2024 03:14:34 +0100
-Subject: [PATCH 3/9] block: add support for notifications
+To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
+ Conor Dooley <conor+dt@kernel.org>, Jens Axboe <axboe@kernel.dk>,
+ Daniel Golle <daniel@makrotopia.org>, Christian Brauner <brauner@kernel.org>,
+ Al Viro <viro@zeniv.linux.org.uk>, Li Lingfeng <lilingfeng3@huawei.com>,
+ Ming Lei <ming.lei@redhat.com>, Christian Heusel <christian@heusel.eu>,
+	=?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
+ Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
+ Chad Monroe <chad.monroe@adtran.com>, Yangyu Chen <cyy@cyyself.name>,
+ Tianling Shen <cnsztl@immortalwrt.org>, Chuanhong Guo <gch981213@gmail.com>,
+ Chen Minqiang <ptpt52@gmail.com>, devicetree@vger.kernel.org,
+ linux-kernel@vger.kernel.org, linux-block@vger.kernel.org
+Subject: [PATCH v5 3/4] block: add support for notifications
+Message-ID: 
+ <ca0022886e8f211a323a716653a1396a3bc91653.1722365899.git.daniel@makrotopia.org>
+References: <cover.1722365899.git.daniel@makrotopia.org>
+Precedence: bulk
+X-Mailing-List: linux-block@vger.kernel.org
+List-Id: <linux-block.vger.kernel.org>
+List-Subscribe: <mailto:linux-block+subscribe@vger.kernel.org>
+List-Unsubscribe: <mailto:linux-block+unsubscribe@vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1722365899.git.daniel@makrotopia.org>
 
 Add notifier block to notify other subsystems about the addition or
 removal of block devices.
@@ -10,9 +37,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 ---
  block/Kconfig          |  6 +++
  block/Makefile         |  1 +
- block/blk-notify.c     | 88 ++++++++++++++++++++++++++++++++++++++++++
- include/linux/blkdev.h |  8 ++++
- 4 files changed, 103 insertions(+)
+ block/blk-notify.c     | 87 ++++++++++++++++++++++++++++++++++++++++++
+ include/linux/blkdev.h | 11 ++++++
+ 4 files changed, 105 insertions(+)
  create mode 100644 block/blk-notify.c
 
 --- a/block/Kconfig
@@ -39,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +obj-$(CONFIG_BLOCK_NOTIFIERS) += blk-notify.o
 --- /dev/null
 +++ b/block/blk-notify.c
-@@ -0,0 +1,88 @@
+@@ -0,0 +1,87 @@
 +// SPDX-License-Identifier: GPL-2.0-or-later
 +/*
 + * Notifiers for addition and removal of block devices
@@ -97,7 +124,6 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	list_add_tail(&new_blkdev->list, &blk_devices);
 +	raw_notifier_call_chain(&blk_notifier_list, BLK_DEVICE_ADD, dev);
 +	mutex_unlock(&blk_notifier_lock);
-+
 +	return 0;
 +}
 +
@@ -130,16 +156,19 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +device_initcall(blk_notifications_init);
 --- a/include/linux/blkdev.h
 +++ b/include/linux/blkdev.h
-@@ -1564,4 +1564,12 @@ struct io_comp_batch {
+@@ -1564,4 +1564,15 @@ struct io_comp_batch {
  
  #define DEFINE_IO_COMP_BATCH(name)	struct io_comp_batch name = { }
  
 +
-+#ifdef CONFIG_BLOCK_NOTIFIERS
 +#define BLK_DEVICE_ADD		1
 +#define BLK_DEVICE_REMOVE	2
++#if defined(CONFIG_BLOCK_NOTIFIERS)
 +void blk_register_notify(struct notifier_block *nb);
 +void blk_unregister_notify(struct notifier_block *nb);
++#else
++static inline void blk_register_notify(struct notifier_block *nb) { };
++static inline void blk_unregister_notify(struct notifier_block *nb) { };
 +#endif
 +
  #endif /* _LINUX_BLKDEV_H */
diff --git a/target/linux/generic/pending-6.6/453-block-add-new-genhd-flag-GENHD_FL_NVMEM.patch b/target/linux/generic/pending-6.6/453-block-add-new-genhd-flag-GENHD_FL_NVMEM.patch
index 5997680e47..79abcd0e6b 100644
--- a/target/linux/generic/pending-6.6/453-block-add-new-genhd-flag-GENHD_FL_NVMEM.patch
+++ b/target/linux/generic/pending-6.6/453-block-add-new-genhd-flag-GENHD_FL_NVMEM.patch
@@ -1,7 +1,34 @@
-From f4487fa1cb7e55b3c17a33f41b9c9d66f4f853b7 Mon Sep 17 00:00:00 2001
+From patchwork Tue Jul 30 19:27:07 2024
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
+X-Patchwork-Id: 13747818
+Date: Tue, 30 Jul 2024 20:27:07 +0100
 From: Daniel Golle <daniel@makrotopia.org>
-Date: Thu, 30 May 2024 03:14:49 +0100
-Subject: [PATCH 4/9] block: add new genhd flag GENHD_FL_NVMEM
+To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
+ Conor Dooley <conor+dt@kernel.org>, Jens Axboe <axboe@kernel.dk>,
+ Daniel Golle <daniel@makrotopia.org>, Christian Brauner <brauner@kernel.org>,
+ Al Viro <viro@zeniv.linux.org.uk>, Li Lingfeng <lilingfeng3@huawei.com>,
+ Ming Lei <ming.lei@redhat.com>, Christian Heusel <christian@heusel.eu>,
+	=?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,
+ Felix Fietkau <nbd@nbd.name>, John Crispin <john@phrozen.org>,
+ Chad Monroe <chad.monroe@adtran.com>, Yangyu Chen <cyy@cyyself.name>,
+ Tianling Shen <cnsztl@immortalwrt.org>, Chuanhong Guo <gch981213@gmail.com>,
+ Chen Minqiang <ptpt52@gmail.com>, devicetree@vger.kernel.org,
+ linux-kernel@vger.kernel.org, linux-block@vger.kernel.org
+Subject: [PATCH v5 4/4] block: add new genhd flag GENHD_FL_NVMEM
+Message-ID: 
+ <311ea569c23ce14e2896cd3b069dc494c58c49c2.1722365899.git.daniel@makrotopia.org>
+References: <cover.1722365899.git.daniel@makrotopia.org>
+Precedence: bulk
+X-Mailing-List: linux-block@vger.kernel.org
+List-Id: <linux-block.vger.kernel.org>
+List-Subscribe: <mailto:linux-block+subscribe@vger.kernel.org>
+List-Unsubscribe: <mailto:linux-block+unsubscribe@vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1722365899.git.daniel@makrotopia.org>
 
 Add new flag to destinguish block devices which may act as an NVMEM
 provider.
diff --git a/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch b/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch
new file mode 100644
index 0000000000..78498af1ce
--- /dev/null
+++ b/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch
@@ -0,0 +1,63 @@
+From 446daf20b0a6790751459cdde0ff9fc8813e54d1 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Mon, 29 Jul 2024 14:09:16 +0200
+Subject: [PATCH] mtd: spinand: winbond: add support for W25N01KV
+
+Add support for Winbond W25N01KV 1Gbit SPI-NAND.
+
+It has 4-bit on-die ECC.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/mtd/nand/spi/winbond.c | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+--- a/drivers/mtd/nand/spi/winbond.c
++++ b/drivers/mtd/nand/spi/winbond.c
+@@ -74,6 +74,18 @@ static int w25m02gv_select_target(struct
+ 	return spi_mem_exec_op(spinand->spimem, &op);
+ }
+ 
++static int w25n01kv_ooblayout_ecc(struct mtd_info *mtd, int section,
++				  struct mtd_oob_region *region)
++{
++	if (section > 3)
++		return -ERANGE;
++
++	region->offset = 64 + (8 * section);
++	region->length = 7;
++
++	return 0;
++}
++
+ static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
+ 				  struct mtd_oob_region *region)
+ {
+@@ -98,6 +110,11 @@ static int w25n02kv_ooblayout_free(struc
+ 	return 0;
+ }
+ 
++static const struct mtd_ooblayout_ops w25n01kv_ooblayout = {
++	.ecc = w25n01kv_ooblayout_ecc,
++	.free = w25n02kv_ooblayout_free,
++};
++
+ static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
+ 	.ecc = w25n02kv_ooblayout_ecc,
+ 	.free = w25n02kv_ooblayout_free,
+@@ -160,6 +177,15 @@ static const struct spinand_info winbond
+ 					      &update_cache_variants),
+ 		     0,
+ 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
++	SPINAND_INFO("W25N01KV",
++		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
++		     NAND_MEMORG(1, 2048, 96, 64, 1024, 20, 1, 1, 1),
++		     NAND_ECCREQ(4, 512),
++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++					      &write_cache_variants,
++					      &update_cache_variants),
++		     0,
++		     SPINAND_ECCINFO(&w25n01kv_ooblayout, w25n02kv_ecc_get_status)),
+ 	SPINAND_INFO("W25N02KV",
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
+ 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
diff --git a/target/linux/generic/pending-6.6/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-6.6/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
index 6081d1d9e5..0b607faa5e 100644
--- a/target/linux/generic/pending-6.6/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
+++ b/target/linux/generic/pending-6.6/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	return magic == UBIFS_NODE_MAGIC;
 +}
 +
-+static void __init ubiblock_create_auto_rootfs(struct ubi_volume_info *vi)
++static void ubiblock_create_auto_rootfs(struct ubi_volume_info *vi)
 +{
 +	int ret, is_ubifs;
 +	struct ubi_volume_desc *desc;
diff --git a/target/linux/generic/pending-6.6/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-6.6/530-jffs2_make_lzma_available.patch
index 3be6c8eb9d..66c458d7e6 100644
--- a/target/linux/generic/pending-6.6/530-jffs2_make_lzma_available.patch
+++ b/target/linux/generic/pending-6.6/530-jffs2_make_lzma_available.patch
@@ -254,7 +254,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +}
 --- a/fs/jffs2/super.c
 +++ b/fs/jffs2/super.c
-@@ -374,14 +374,41 @@ static int __init init_jffs2_fs(void)
+@@ -375,14 +375,41 @@ static int __init init_jffs2_fs(void)
  	BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68);
  	BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32);
  
diff --git a/target/linux/generic/pending-6.6/630-packet_socket_type.patch b/target/linux/generic/pending-6.6/630-packet_socket_type.patch
index fd00e1e052..2b753efa67 100644
--- a/target/linux/generic/pending-6.6/630-packet_socket_type.patch
+++ b/target/linux/generic/pending-6.6/630-packet_socket_type.patch
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  #define PACKET_FANOUT_LB		1
 --- a/net/packet/af_packet.c
 +++ b/net/packet/af_packet.c
-@@ -1864,6 +1864,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1925,6 +1925,7 @@ static int packet_rcv_spkt(struct sk_buf
  {
  	struct sock *sk;
  	struct sockaddr_pkt *spkt;
@@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	/*
  	 *	When we registered the protocol we saved the socket in the data
-@@ -1871,6 +1872,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1932,6 +1933,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 */
  
  	sk = pt->af_packet_priv;
@@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	/*
  	 *	Yank back the headers [hope the device set this
-@@ -1883,7 +1885,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1944,7 +1946,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 *	so that this procedure is noop.
  	 */
  
@@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  		goto out;
  
  	if (!net_eq(dev_net(dev), sock_net(sk)))
-@@ -2129,12 +2131,12 @@ static int packet_rcv(struct sk_buff *sk
+@@ -2190,12 +2192,12 @@ static int packet_rcv(struct sk_buff *sk
  	unsigned int snaplen, res;
  	bool is_drop_n_account = false;
  
@@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -2261,12 +2263,12 @@ static int tpacket_rcv(struct sk_buff *s
+@@ -2322,12 +2324,12 @@ static int tpacket_rcv(struct sk_buff *s
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
  
@@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -3385,6 +3387,7 @@ static int packet_create(struct net *net
+@@ -3451,6 +3453,7 @@ static int packet_create(struct net *net
  	mutex_init(&po->pg_vec_lock);
  	po->rollover = NULL;
  	po->prot_hook.func = packet_rcv;
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
  	if (sock->type == SOCK_PACKET)
  		po->prot_hook.func = packet_rcv_spkt;
-@@ -4036,6 +4039,16 @@ packet_setsockopt(struct socket *sock, i
+@@ -4118,6 +4121,16 @@ packet_setsockopt(struct socket *sock, i
  		packet_sock_flag_set(po, PACKET_SOCK_QDISC_BYPASS, val);
  		return 0;
  	}
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	default:
  		return -ENOPROTOOPT;
  	}
-@@ -4095,6 +4108,13 @@ static int packet_getsockopt(struct sock
+@@ -4177,6 +4190,13 @@ static int packet_getsockopt(struct sock
  	case PACKET_VNET_HDR_SZ:
  		val = READ_ONCE(po->vnet_hdr_sz);
  		break;
diff --git a/target/linux/generic/pending-6.6/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-6.6/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
index cc92e20f63..f754705dc6 100644
--- a/target/linux/generic/pending-6.6/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+++ b/target/linux/generic/pending-6.6/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
@@ -66,7 +66,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  static void rt_fibinfo_free(struct rtable __rcu **rtp)
 --- a/net/ipv4/fib_trie.c
 +++ b/net/ipv4/fib_trie.c
-@@ -2783,6 +2783,7 @@ static const char *const rtn_type_names[
+@@ -2784,6 +2784,7 @@ static const char *const rtn_type_names[
  	[RTN_THROW] = "THROW",
  	[RTN_NAT] = "NAT",
  	[RTN_XRESOLVE] = "XRESOLVE",
diff --git a/target/linux/generic/pending-6.6/680-net-add-TCP-fraglist-GRO-support.patch b/target/linux/generic/pending-6.6/680-net-add-TCP-fraglist-GRO-support.patch
index 7672f46d20..8042656397 100644
--- a/target/linux/generic/pending-6.6/680-net-add-TCP-fraglist-GRO-support.patch
+++ b/target/linux/generic/pending-6.6/680-net-add-TCP-fraglist-GRO-support.patch
@@ -31,7 +31,7 @@ Signe-off-by: Felix Fietkau <nbd@nbd.name>
  static inline void gro_normal_list(struct napi_struct *napi)
 --- a/include/net/tcp.h
 +++ b/include/net/tcp.h
-@@ -2083,7 +2083,10 @@ void tcp_v4_destroy_sock(struct sock *sk
+@@ -2084,7 +2084,10 @@ void tcp_v4_destroy_sock(struct sock *sk
  
  struct sk_buff *tcp_gso_segment(struct sk_buff *skb,
  				netdev_features_t features);
@@ -379,7 +379,7 @@ Signe-off-by: Felix Fietkau <nbd@nbd.name>
  	skb_shinfo(skb)->gso_type |= SKB_GSO_TCPV4;
 --- a/net/ipv4/udp_offload.c
 +++ b/net/ipv4/udp_offload.c
-@@ -433,33 +433,6 @@ out:
+@@ -447,33 +447,6 @@ out:
  	return segs;
  }
  
diff --git a/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch b/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
new file mode 100644
index 0000000000..85d2ac21b1
--- /dev/null
+++ b/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
@@ -0,0 +1,129 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Thu, 15 Aug 2024 21:15:13 +0200
+Subject: [PATCH] net: remove NETIF_F_GSO_FRAGLIST from NETIF_F_GSO_SOFTWARE
+
+Several drivers set NETIF_F_GSO_SOFTWARE, but mangle fraglist GRO packets
+in a way that they can't be properly segmented anymore.
+In order to properly deal with this, remove fraglist GSO from
+NETIF_F_GSO_SOFTWARE and switch to NETIF_F_GSO_SOFTWARE_ALL (which includes
+fraglist GSO) in places where it's safe to add.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/drivers/net/dummy.c
++++ b/drivers/net/dummy.c
+@@ -118,7 +118,7 @@ static void dummy_setup(struct net_devic
+ 	dev->flags &= ~IFF_MULTICAST;
+ 	dev->priv_flags |= IFF_LIVE_ADDR_CHANGE | IFF_NO_QUEUE;
+ 	dev->features	|= NETIF_F_SG | NETIF_F_FRAGLIST;
+-	dev->features	|= NETIF_F_GSO_SOFTWARE;
++	dev->features	|= NETIF_F_GSO_SOFTWARE_ALL;
+ 	dev->features	|= NETIF_F_HW_CSUM | NETIF_F_HIGHDMA | NETIF_F_LLTX;
+ 	dev->features	|= NETIF_F_GSO_ENCAP_ALL;
+ 	dev->hw_features |= dev->features;
+--- a/drivers/net/loopback.c
++++ b/drivers/net/loopback.c
+@@ -176,7 +176,7 @@ static void gen_lo_setup(struct net_devi
+ 	dev->flags		= IFF_LOOPBACK;
+ 	dev->priv_flags		|= IFF_LIVE_ADDR_CHANGE | IFF_NO_QUEUE;
+ 	netif_keep_dst(dev);
+-	dev->hw_features	= NETIF_F_GSO_SOFTWARE;
++	dev->hw_features	= NETIF_F_GSO_SOFTWARE_ALL;
+ 	dev->features		= NETIF_F_SG | NETIF_F_FRAGLIST
+ 		| NETIF_F_GSO_SOFTWARE
+ 		| NETIF_F_HW_CSUM
+--- a/drivers/net/macvlan.c
++++ b/drivers/net/macvlan.c
+@@ -896,7 +896,7 @@ static int macvlan_hwtstamp_set(struct n
+ static struct lock_class_key macvlan_netdev_addr_lock_key;
+ 
+ #define ALWAYS_ON_OFFLOADS \
+-	(NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_GSO_SOFTWARE | \
++	(NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_GSO_SOFTWARE_ALL | \
+ 	 NETIF_F_GSO_ROBUST | NETIF_F_GSO_ENCAP_ALL)
+ 
+ #define ALWAYS_ON_FEATURES (ALWAYS_ON_OFFLOADS | NETIF_F_LLTX)
+--- a/include/linux/netdev_features.h
++++ b/include/linux/netdev_features.h
+@@ -219,13 +219,14 @@ static inline int find_next_netdev_featu
+ 
+ /* List of features with software fallbacks. */
+ #define NETIF_F_GSO_SOFTWARE	(NETIF_F_ALL_TSO | NETIF_F_GSO_SCTP |	     \
+-				 NETIF_F_GSO_UDP_L4 | NETIF_F_GSO_FRAGLIST)
++				 NETIF_F_GSO_UDP_L4)
++#define NETIF_F_GSO_SOFTWARE_ALL (NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_FRAGLIST)
+ 
+ /*
+  * If one device supports one of these features, then enable them
+  * for all in netdev_increment_features.
+  */
+-#define NETIF_F_ONE_FOR_ALL	(NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_ROBUST | \
++#define NETIF_F_ONE_FOR_ALL	(NETIF_F_GSO_SOFTWARE_ALL | NETIF_F_GSO_ROBUST | \
+ 				 NETIF_F_SG | NETIF_F_HIGHDMA |		\
+ 				 NETIF_F_FRAGLIST | NETIF_F_VLAN_CHALLENGED)
+ 
+--- a/net/8021q/vlan.h
++++ b/net/8021q/vlan.h
+@@ -108,7 +108,7 @@ static inline netdev_features_t vlan_tnl
+ 	netdev_features_t ret;
+ 
+ 	ret = real_dev->hw_enc_features &
+-	      (NETIF_F_CSUM_MASK | NETIF_F_GSO_SOFTWARE |
++	      (NETIF_F_CSUM_MASK | NETIF_F_GSO_SOFTWARE_ALL |
+ 	       NETIF_F_GSO_ENCAP_ALL);
+ 
+ 	if ((ret & NETIF_F_GSO_ENCAP_ALL) && (ret & NETIF_F_CSUM_MASK))
+--- a/net/8021q/vlan_dev.c
++++ b/net/8021q/vlan_dev.c
+@@ -583,7 +583,7 @@ static int vlan_dev_init(struct net_devi
+ 		dev->state |= (1 << __LINK_STATE_NOCARRIER);
+ 
+ 	dev->hw_features = NETIF_F_HW_CSUM | NETIF_F_SG |
+-			   NETIF_F_FRAGLIST | NETIF_F_GSO_SOFTWARE |
++			   NETIF_F_FRAGLIST | NETIF_F_GSO_SOFTWARE_ALL |
+ 			   NETIF_F_GSO_ENCAP_ALL |
+ 			   NETIF_F_HIGHDMA | NETIF_F_SCTP_CRC |
+ 			   NETIF_F_ALL_FCOE;
+@@ -676,7 +676,7 @@ static netdev_features_t vlan_dev_fix_fe
+ 	if (lower_features & (NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM))
+ 		lower_features |= NETIF_F_HW_CSUM;
+ 	features = netdev_intersect_features(features, lower_features);
+-	features |= old_features & (NETIF_F_SOFT_FEATURES | NETIF_F_GSO_SOFTWARE);
++	features |= old_features & (NETIF_F_SOFT_FEATURES | NETIF_F_GSO_SOFTWARE_ALL);
+ 	features |= NETIF_F_LLTX;
+ 
+ 	return features;
+--- a/net/core/sock.c
++++ b/net/core/sock.c
+@@ -2449,7 +2449,7 @@ void sk_setup_caps(struct sock *sk, stru
+ 	if (sk_is_tcp(sk))
+ 		sk->sk_route_caps |= NETIF_F_GSO;
+ 	if (sk->sk_route_caps & NETIF_F_GSO)
+-		sk->sk_route_caps |= NETIF_F_GSO_SOFTWARE;
++		sk->sk_route_caps |= NETIF_F_GSO_SOFTWARE_ALL;
+ 	if (unlikely(sk->sk_gso_disabled))
+ 		sk->sk_route_caps &= ~NETIF_F_GSO_MASK;
+ 	if (sk_can_gso(sk)) {
+--- a/net/mac80211/ieee80211_i.h
++++ b/net/mac80211/ieee80211_i.h
+@@ -1996,7 +1996,7 @@ void ieee80211_color_collision_detection
+ /* interface handling */
+ #define MAC80211_SUPPORTED_FEATURES_TX	(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \
+ 					 NETIF_F_HW_CSUM | NETIF_F_SG | \
+-					 NETIF_F_HIGHDMA | NETIF_F_GSO_SOFTWARE | \
++					 NETIF_F_HIGHDMA | NETIF_F_GSO_SOFTWARE_ALL | \
+ 					 NETIF_F_HW_TC)
+ #define MAC80211_SUPPORTED_FEATURES_RX	(NETIF_F_RXCSUM)
+ #define MAC80211_SUPPORTED_FEATURES	(MAC80211_SUPPORTED_FEATURES_TX | \
+--- a/net/openvswitch/vport-internal_dev.c
++++ b/net/openvswitch/vport-internal_dev.c
+@@ -110,7 +110,7 @@ static void do_setup(struct net_device *
+ 
+ 	netdev->features = NETIF_F_LLTX | NETIF_F_SG | NETIF_F_FRAGLIST |
+ 			   NETIF_F_HIGHDMA | NETIF_F_HW_CSUM |
+-			   NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_ENCAP_ALL;
++			   NETIF_F_GSO_SOFTWARE_ALL | NETIF_F_GSO_ENCAP_ALL;
+ 
+ 	netdev->vlan_features = netdev->features;
+ 	netdev->hw_enc_features = netdev->features;
diff --git a/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
index 07e923b69e..ca4620ef0c 100644
--- a/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
+++ b/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/net/netfilter/nf_tables_api.c
 +++ b/net/netfilter/nf_tables_api.c
-@@ -8268,7 +8268,7 @@ static int nft_register_flowtable_net_ho
+@@ -8267,7 +8267,7 @@ static int nft_register_flowtable_net_ho
  		err = flowtable->data.type->setup(&flowtable->data,
  						  hook->ops.dev,
  						  FLOW_BLOCK_BIND);
diff --git a/target/linux/generic/pending-6.6/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch b/target/linux/generic/pending-6.6/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch
deleted file mode 100644
index 7e9b3660d5..0000000000
--- a/target/linux/generic/pending-6.6/721-net-phy-realtek-rtl8221-allow-to-configure-SERDES-mo.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From ace6abaa0f9203083fe4c0a6a74da2d96410b625 Mon Sep 17 00:00:00 2001
-From: Alexander Couzens <lynxis@fe80.eu>
-Date: Sat, 13 Aug 2022 12:49:33 +0200
-Subject: [PATCH 01/10] net: phy: realtek: rtl8221: allow to configure SERDES
- mode
-
-The rtl8221 supports multiple SERDES modes:
-- SGMII
-- 2500base-x
-- HiSGMII
-
-Further it supports rate adaption on SERDES links to allow
-slow ethernet speeds (10/100/1000mbit) to work on 2500base-x/HiSGMII
-links without reducing the SERDES speed.
-
-When operating without rate adapters the SERDES link will follow the
-ethernet speed.
-
-Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
----
- drivers/net/phy/realtek.c | 48 +++++++++++++++++++++++++++++++++++++++
- 1 file changed, 48 insertions(+)
-
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -54,6 +54,15 @@
- 						 RTL8201F_ISR_LINK)
- #define RTL8201F_IER				0x13
- 
-+#define RTL8221B_MMD_SERDES_CTRL		MDIO_MMD_VEND1
-+#define RTL8221B_MMD_PHY_CTRL			MDIO_MMD_VEND2
-+#define RTL8221B_SERDES_OPTION			0x697a
-+#define RTL8221B_SERDES_OPTION_MODE_MASK	GENMASK(5, 0)
-+#define RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII	0
-+#define RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII	1
-+#define RTL8221B_SERDES_OPTION_MODE_2500BASEX		2
-+#define RTL8221B_SERDES_OPTION_MODE_HISGMII		3
-+
- #define RTL8366RB_POWER_SAVE			0x15
- #define RTL8366RB_POWER_SAVE_ON			BIT(12)
- 
-@@ -879,6 +888,48 @@ static irqreturn_t rtl9000a_handle_inter
- 	return IRQ_HANDLED;
- }
- 
-+static int rtl8221b_config_init(struct phy_device *phydev)
-+{
-+	u16 option_mode;
-+
-+	switch (phydev->interface) {
-+	case PHY_INTERFACE_MODE_2500BASEX:
-+		if (!phydev->is_c45) {
-+			option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX;
-+			break;
-+		}
-+		fallthrough;
-+	case PHY_INTERFACE_MODE_SGMII:
-+		option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII;
-+		break;
-+	default:
-+		return 0;
-+	}
-+
-+	phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL,
-+		      0x75f3, 0);
-+
-+	phy_modify_mmd_changed(phydev, RTL8221B_MMD_SERDES_CTRL,
-+			       RTL8221B_SERDES_OPTION,
-+			       RTL8221B_SERDES_OPTION_MODE_MASK, option_mode);
-+	switch (option_mode) {
-+	case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII:
-+	case RTL8221B_SERDES_OPTION_MODE_2500BASEX:
-+		phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503);
-+		phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd455);
-+		phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020);
-+		break;
-+	case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII:
-+	case RTL8221B_SERDES_OPTION_MODE_HISGMII:
-+		phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503);
-+		phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd433);
-+		phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020);
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
- static struct phy_driver realtek_drvs[] = {
- 	{
- 		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1033,6 +1084,7 @@ static struct phy_driver realtek_drvs[]
- 		PHY_ID_MATCH_EXACT(0x001cc849),
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY",
- 		.get_features   = rtl822x_get_features,
-+		.config_init    = rtl8221b_config_init,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
-@@ -1044,6 +1096,7 @@ static struct phy_driver realtek_drvs[]
- 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY",
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-+		.config_init    = rtl8221b_config_init,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
- 		.resume         = rtlgen_resume,
diff --git a/target/linux/generic/pending-6.6/722-net-phy-realtek-support-switching-between-SGMII-and-.patch b/target/linux/generic/pending-6.6/722-net-phy-realtek-support-switching-between-SGMII-and-.patch
deleted file mode 100644
index 58bd259198..0000000000
--- a/target/linux/generic/pending-6.6/722-net-phy-realtek-support-switching-between-SGMII-and-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 312753d0aadba0f58841ae513b80fdbabc887523 Mon Sep 17 00:00:00 2001
-From: Chukun Pan <amadeus@jmu.edu.cn>
-Date: Wed, 8 Feb 2023 16:32:18 +0800
-Subject: [PATCH] net: phy: realtek: support switching between SGMII and
- 2500BASE-X for RTL822x series
-
-After commit ace6aba ("net: phy: realtek: rtl8221: allow to configure
-SERDES mode"), the rtl8221 phy can work in SGMII and 2500base-x modes
-respectively. So add interface automatic switching for rtl8221 phy to
-match various wire speeds.
-
-Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
----
- drivers/net/phy/realtek.c | 26 ++++++++++++++++++++++++--
- 1 file changed, 24 insertions(+), 2 deletions(-)
-
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -714,6 +714,25 @@ static int rtl822x_config_aneg(struct ph
- 	return __genphy_config_aneg(phydev, ret);
- }
- 
-+static void rtl822x_update_interface(struct phy_device *phydev)
-+{
-+	/* Automatically switch SERDES interface between
-+	 * SGMII and 2500-BaseX according to speed.
-+	 */
-+	switch (phydev->speed) {
-+	case SPEED_2500:
-+		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
-+		break;
-+	case SPEED_1000:
-+	case SPEED_100:
-+	case SPEED_10:
-+		phydev->interface = PHY_INTERFACE_MODE_SGMII;
-+		break;
-+	default:
-+		break;
-+	}
-+}
-+
- static int rtl822x_read_status(struct phy_device *phydev)
- {
- 	int ret;
-@@ -732,11 +751,14 @@ static int rtl822x_read_status(struct ph
- 			phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL);
- 	}
- 
--	ret = genphy_read_status(phydev);
-+	ret = rtlgen_read_status(phydev);
- 	if (ret < 0)
- 		return ret;
- 
--	return rtlgen_get_speed(phydev);
-+	if (phydev->is_c45 && phydev->link)
-+		rtl822x_update_interface(phydev);
-+
-+	return 0;
- }
- 
- static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
diff --git a/target/linux/generic/pending-6.6/724-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/724-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 8efedd3a11..51cf9580f1 100644
--- a/target/linux/generic/pending-6.6/724-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/724-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -15,51 +15,67 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1070,6 +1070,7 @@ static struct phy_driver realtek_drvs[]
- 		.write_page	= rtl821x_write_page,
- 		.read_mmd	= rtl822x_read_mmd,
- 		.write_mmd	= rtl822x_write_mmd,
+@@ -1324,6 +1324,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.name		= "RTL8226 2.5Gbps PHY",
+ 		.match_phy_device = rtl8226_match_phy_device,
 +		.soft_reset     = genphy_soft_reset,
+ 		.get_features	= rtl822x_get_features,
+ 		.config_aneg	= rtl822x_config_aneg,
+ 		.read_status	= rtl822x_read_status,
+@@ -1336,6 +1337,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc840),
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
-@@ -1082,6 +1083,7 @@ static struct phy_driver realtek_drvs[]
- 		.write_page	= rtl821x_write_page,
- 		.read_mmd	= rtl822x_read_mmd,
- 		.write_mmd	= rtl822x_write_mmd,
 +		.soft_reset     = genphy_soft_reset,
+ 		.get_features	= rtl822x_get_features,
+ 		.config_aneg	= rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1350,6 +1352,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
-@@ -1092,6 +1094,7 @@ static struct phy_driver realtek_drvs[]
- 		.resume         = rtlgen_resume,
- 		.read_page      = rtl821x_read_page,
- 		.write_page     = rtl821x_write_page,
 +		.soft_reset     = genphy_soft_reset,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
+@@ -1360,6 +1363,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-@@ -1102,6 +1105,7 @@ static struct phy_driver realtek_drvs[]
- 		.resume         = rtlgen_resume,
- 		.read_page      = rtl821x_read_page,
- 		.write_page     = rtl821x_write_page,
 +		.soft_reset     = genphy_soft_reset,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1372,6 +1376,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++		.soft_reset     = genphy_soft_reset,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1384,6 +1389,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc849),
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY",
-@@ -1113,6 +1117,7 @@ static struct phy_driver realtek_drvs[]
- 		.resume         = rtlgen_resume,
- 		.read_page      = rtl821x_read_page,
- 		.write_page     = rtl821x_write_page,
+ 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1394,6 +1400,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc84a),
- 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY",
-@@ -1124,6 +1129,7 @@ static struct phy_driver realtek_drvs[]
- 		.resume         = rtlgen_resume,
- 		.read_page      = rtl821x_read_page,
- 		.write_page     = rtl821x_write_page,
+ 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1406,6 +1413,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc961),
- 		.name		= "RTL8366RB Gigabit Ethernet",
+ 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
++		.soft_reset     = genphy_soft_reset,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/725-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch b/target/linux/generic/pending-6.6/725-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
index 43cf35ab77..a7f7fbf47a 100644
--- a/target/linux/generic/pending-6.6/725-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/725-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
@@ -1,7 +1,8 @@
-From 2b1b8c4c215af7988136401c902338d091d408a1 Mon Sep 17 00:00:00 2001
+From d54ef6aea00e7a6ace439baade6ad0aa38ee4b04 Mon Sep 17 00:00:00 2001
 From: Daniel Golle <daniel@makrotopia.org>
 Date: Mon, 3 Apr 2023 01:21:57 +0300
-Subject: [PATCH 2/2] net: phy: realtek: disable SGMII in-band AN for 2.5G PHYs
+Subject: [PATCH 287/326] net: phy: realtek: disable SGMII in-band AN for 2.5G
+ PHYs
 
 MAC drivers don't use SGMII in-band autonegotiation unless told to do so
 in device tree using 'managed = "in-band-status"'. When using MDIO to
@@ -14,30 +15,49 @@ Reported-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
 Tested-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
+ drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++--
+ 1 file changed, 25 insertions(+), 2 deletions(-)
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -913,6 +913,7 @@ static irqreturn_t rtl9000a_handle_inter
- static int rtl8221b_config_init(struct phy_device *phydev)
+@@ -785,8 +785,8 @@ static int rtl822x_write_mmd(struct phy_
+ static int rtl822xb_config_init(struct phy_device *phydev)
  {
- 	u16 option_mode;
-+	int val;
+ 	bool has_2500, has_sgmii;
++	int ret, val;
+ 	u16 mode;
+-	int ret;
  
- 	switch (phydev->interface) {
- 	case PHY_INTERFACE_MODE_2500BASEX:
-@@ -949,6 +950,13 @@ static int rtl8221b_config_init(struct p
- 		break;
- 	}
+ 	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
+ 			    phydev->host_interfaces) ||
+@@ -836,7 +836,29 @@ static int rtl822xb_config_init(struct p
+ 	if (ret < 0)
+ 		return ret;
  
+-	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
++	if (ret < 0)
++		return ret;
++
 +	/* Disable SGMII AN */
-+	phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7588, 0x2);
-+	phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7589, 0x71d0);
-+	phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7587, 0x3);
-+	phy_read_mmd_poll_timeout(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7587,
-+				  val, !(val & BIT(0)), 500, 100000, false);
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7589, 0x71d0);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7587, 0x3);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, 0x7587,
++					val, !(val & BIT(0)), 500, 100000, false);
++	if (ret < 0)
++		return ret;
 +
- 	return 0;
++	return 0;
  }
  
+ static int rtl822xb_get_rate_matching(struct phy_device *phydev,
diff --git a/target/linux/generic/pending-6.6/726-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/726-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index be86a774ea..d944b6aa5c 100644
--- a/target/linux/generic/pending-6.6/726-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/726-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -765,9 +765,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1051,9 +1051,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
@@ -31,5 +31,5 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	rtl821x_write_page(phydev, 0);
 +	mutex_unlock(&phydev->mdio.bus->mdio_lock);
  
- 	return val >= 0 && val & RTL_SUPPORTS_2500FULL;
+ 	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
  }
diff --git a/target/linux/generic/pending-6.6/727-net-phy-realtek-use-inline-functions-for-10GbE-adver.patch b/target/linux/generic/pending-6.6/727-net-phy-realtek-use-inline-functions-for-10GbE-adver.patch
index e6cbfbe649..bf833a2b7a 100644
--- a/target/linux/generic/pending-6.6/727-net-phy-realtek-use-inline-functions-for-10GbE-adver.patch
+++ b/target/linux/generic/pending-6.6/727-net-phy-realtek-use-inline-functions-for-10GbE-adver.patch
@@ -14,47 +14,13 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -69,10 +69,6 @@
- #define RTL_SUPPORTS_5000FULL			BIT(14)
- #define RTL_SUPPORTS_2500FULL			BIT(13)
- #define RTL_SUPPORTS_10000FULL			BIT(0)
--#define RTL_ADV_2500FULL			BIT(7)
--#define RTL_LPADV_10000FULL			BIT(11)
--#define RTL_LPADV_5000FULL			BIT(6)
--#define RTL_LPADV_2500FULL			BIT(5)
+@@ -909,7 +909,8 @@ static int rtl822x_config_aneg(struct ph
  
- #define RTL9000A_GINMR				0x14
- #define RTL9000A_GINMR_LINK_STATUS		BIT(4)
-@@ -699,14 +695,11 @@ static int rtl822x_config_aneg(struct ph
- 	int ret = 0;
- 
- 	if (phydev->autoneg == AUTONEG_ENABLE) {
--		u16 adv2500 = 0;
--
--		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
--				      phydev->advertising))
--			adv2500 = RTL_ADV_2500FULL;
--
  		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
--					       RTL_ADV_2500FULL, adv2500);
-+					       MDIO_AN_10GBT_CTRL_ADV10G |
+ 					       MDIO_AN_10GBT_CTRL_ADV2_5G |
+-					       MDIO_AN_10GBT_CTRL_ADV5G,
 +					       MDIO_AN_10GBT_CTRL_ADV5G |
-+					       MDIO_AN_10GBT_CTRL_ADV2_5G,
-+			linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising));
++					       MDIO_AN_10GBT_CTRL_ADV10G,
+ 					       adv);
  		if (ret < 0)
  			return ret;
- 	}
-@@ -743,12 +736,7 @@ static int rtl822x_read_status(struct ph
- 		if (lpadv < 0)
- 			return lpadv;
- 
--		linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
--			phydev->lp_advertising, lpadv & RTL_LPADV_10000FULL);
--		linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
--			phydev->lp_advertising, lpadv & RTL_LPADV_5000FULL);
--		linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
--			phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL);
-+		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
- 	}
- 
- 	ret = rtlgen_read_status(phydev);
diff --git a/target/linux/generic/pending-6.6/728-net-phy-realtek-check-validity-of-10GbE-link-partner.patch b/target/linux/generic/pending-6.6/728-net-phy-realtek-check-validity-of-10GbE-link-partner.patch
index 329415bab5..5ae6dcd7a8 100644
--- a/target/linux/generic/pending-6.6/728-net-phy-realtek-check-validity-of-10GbE-link-partner.patch
+++ b/target/linux/generic/pending-6.6/728-net-phy-realtek-check-validity-of-10GbE-link-partner.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -736,6 +736,10 @@ static int rtl822x_read_status(struct ph
+@@ -949,6 +949,10 @@ static int rtl822x_read_status(struct ph
  		if (lpadv < 0)
  			return lpadv;
  
@@ -23,6 +23,6 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +		    !(lpadv & MDIO_AN_10GBT_STAT_LOCOK))
 +			lpadv = 0;
 +
- 		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
+ 		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising,
+ 						  lpadv);
  	}
- 
diff --git a/target/linux/generic/pending-6.6/729-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/729-net-phy-realtek-introduce-rtl822x_probe.patch
index 7098fa6b28..f81d7bf395 100644
--- a/target/linux/generic/pending-6.6/729-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/729-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -13,9 +13,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -63,6 +63,10 @@
- #define RTL8221B_SERDES_OPTION_MODE_2500BASEX		2
- #define RTL8221B_SERDES_OPTION_MODE_HISGMII		3
+@@ -82,6 +82,10 @@
+ 
+ #define RTL822X_VND2_PHYSR				0xa434
  
 +#define RTL8221B_PHYCR1				0xa430
 +#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
@@ -24,8 +24,8 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -778,6 +782,25 @@ static int rtl8226_match_phy_device(stru
- 	       rtlgen_supports_2_5gbps(phydev);
+@@ -1106,6 +1110,25 @@ static int rtl8221b_vn_cg_c45_match_phy_
+ 	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
  }
  
 +static int rtl822x_probe(struct phy_device *phydev)
@@ -33,7 +33,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	struct device *dev = &phydev->mdio.dev;
 +	int val;
 +
-+	val = phy_read_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1);
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
 +	if (val < 0)
 +		return val;
 +
@@ -42,7 +42,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 +	else
 +		val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
 +
-+	phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1, val);
++	phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
 +
 +	return 0;
 +}
@@ -50,35 +50,51 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1091,6 +1114,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1381,6 +1404,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
++		.probe          = rtl822x_probe,
+ 		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-+		.probe          = rtl822x_probe,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
- 		.resume         = rtlgen_resume,
-@@ -1102,6 +1126,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1392,6 +1416,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
++		.probe          = rtl822x_probe,
+ 		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
+@@ -1405,6 +1430,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.probe          = rtl822x_probe,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
- 		.resume         = rtlgen_resume,
-@@ -1114,6 +1139,7 @@ static struct phy_driver realtek_drvs[]
+ 		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
- 		.config_init    = rtl8221b_config_init,
  		.config_aneg    = rtl822x_config_aneg,
+@@ -1418,6 +1444,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.probe          = rtl822x_probe,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+@@ -1429,6 +1456,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.probe          = rtl822x_probe,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
- 		.resume         = rtlgen_resume,
-@@ -1126,6 +1152,7 @@ static struct phy_driver realtek_drvs[]
+ 		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl8221b_config_init,
+@@ -1442,6 +1470,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.probe          = rtl822x_probe,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
- 		.resume         = rtlgen_resume,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
diff --git a/target/linux/generic/pending-6.6/730-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/730-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 0e9affd16a..698b54473f 100644
--- a/target/linux/generic/pending-6.6/730-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/730-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -10,62 +10,43 @@ Implement custom identify function using the PKGID instead of iterating
 over the implemented MMDs.
 
 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-
+[forward-port by @namiltd]
+Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -81,6 +81,7 @@
- 
- #define RTL_GENERIC_PHYID			0x001cc800
- #define RTL_8211FVD_PHYID			0x001cc878
-+#define RTL_8221B_VB_CG_PHYID			0x001cc849
- 
- MODULE_DESCRIPTION("Realtek PHY driver");
- MODULE_AUTHOR("Johnson Leung");
-@@ -782,6 +783,38 @@ static int rtl8226_match_phy_device(stru
- 	       rtlgen_supports_2_5gbps(phydev);
- }
- 
-+static int rtl8221b_vb_cg_match_phy_device(struct phy_device *phydev)
-+{
-+	int val;
-+	u32 id;
+@@ -1084,10 +1084,32 @@ static int rtl8226_match_phy_device(stru
+ static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
+ 			       bool is_c45)
+ {
+-	if (phydev->is_c45)
+-		return is_c45 && (id == phydev->c45_ids.device_ids[1]);
+-	else
++	if (phydev->is_c45) {
++		u32 rid;
 +
-+	if (phydev->mdio.bus->read_c45) {
-+		val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PKGID1);
-+		if (val < 0)
++		if (!is_c45)
 +			return 0;
 +
-+		id = val << 16;
-+		val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PKGID2);
-+		if (val < 0)
-+			return 0;
++		rid = phydev->c45_ids.device_ids[1];
++		if ((rid == 0xffffffff) && phydev->mdio.bus->read_c45) {
++			int val;
 +
-+		id |= val;
-+	} else {
-+		val = phy_read(phydev, MII_PHYSID1);
-+		if (val < 0)
-+			return 0;
++			val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PKGID1);
++			if (val < 0)
++				return 0;
 +
-+		id = val << 16;
-+		val = phy_read(phydev, MII_PHYSID2);
-+		if (val < 0)
-+			return 0;
-+
-+		id |= val;
-+	}
++			rid = val << 16;
++			val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PKGID2);
++			if (val < 0)
++				return 0;
 +
-+	return (id == RTL_8221B_VB_CG_PHYID);
-+}
++			rid |= val;
++		}
 +
- static int rtl822x_probe(struct phy_device *phydev)
- {
- 	struct device *dev = &phydev->mdio.dev;
-@@ -1134,7 +1167,7 @@ static struct phy_driver realtek_drvs[]
- 		.write_page     = rtl821x_write_page,
- 		.soft_reset     = genphy_soft_reset,
- 	}, {
--		PHY_ID_MATCH_EXACT(0x001cc849),
-+		.match_phy_device = rtl8221b_vb_cg_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY",
- 		.get_features   = rtl822x_get_features,
- 		.config_init    = rtl8221b_config_init,
++		return (id == rid);
++	} else {
+ 		return !is_c45 && (id == phydev->phy_id);
++	}
+ }
+ 
+ static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
diff --git a/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index 726f66cf64..f75dbc9e85 100644
--- a/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,15 +12,15 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1010,6 +1010,51 @@ static int rtl8221b_config_init(struct p
- 	return 0;
+@@ -1286,6 +1286,51 @@ static irqreturn_t rtl9000a_handle_inter
+ 	return IRQ_HANDLED;
  }
  
 +static int rtl8221b_ack_interrupt(struct phy_device *phydev)
 +{
 +	int err;
 +
-+	err = phy_read_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d4);
++	err = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa4d4);
 +
 +	return (err < 0) ? err : 0;
 +}
@@ -34,9 +34,9 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
 +		if (err)
 +			return err;
 +
-+		err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x7ff);
++		err = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xa4d2, 0x7ff);
 +	} else {
-+		err = phy_write_mmd(phydev, RTL8221B_MMD_PHY_CTRL, 0xa4d2, 0x0);
++		err = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xa4d2, 0x0);
 +		if (err)
 +			return err;
 +
@@ -64,12 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1172,6 +1217,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1452,6 +1497,8 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++		.config_intr	= rtl8221b_config_intr,
++		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.probe          = rtl822x_probe,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.get_features   = rtl822x_get_features,
+@@ -1466,6 +1513,8 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.config_intr	= rtl8221b_config_intr,
++		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.probe          = rtl822x_probe,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1478,6 +1527,8 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
++		.config_intr	= rtl8221b_config_intr,
++		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.probe          = rtl822x_probe,
+ 		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
- 		.config_init    = rtl8221b_config_init,
- 		.config_aneg    = rtl822x_config_aneg,
+@@ -1492,6 +1543,8 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.probe          = rtl822x_probe,
- 		.read_status    = rtl822x_read_status,
- 		.suspend        = genphy_suspend,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.config_init    = rtl822xb_config_init,
diff --git a/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
index 15d385c5fd..3f3d7572e0 100644
--- a/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+++ b/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
@@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -6992,6 +6992,7 @@ static int mv88e6xxx_register_switch(str
+@@ -6993,6 +6993,7 @@ static int mv88e6xxx_register_switch(str
  	ds->ops = &mv88e6xxx_switch_ops;
  	ds->ageing_time_min = chip->info->age_time_coeff;
  	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
diff --git a/target/linux/generic/pending-6.6/804-nvmem-core-support-mac-base-fixed-layout-cells.patch b/target/linux/generic/pending-6.6/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
index d08ed63eaa..44b9862654 100644
--- a/target/linux/generic/pending-6.6/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
+++ b/target/linux/generic/pending-6.6/804-nvmem-core-support-mac-base-fixed-layout-cells.patch
@@ -33,7 +33,7 @@ string.
  #include <linux/init.h>
  #include <linux/kref.h>
  #include <linux/module.h>
-@@ -779,6 +782,62 @@ static int nvmem_validate_keepouts(struc
+@@ -778,6 +781,62 @@ static int nvmem_validate_keepouts(struc
  	return 0;
  }
  
@@ -96,7 +96,7 @@ string.
  static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_node *np)
  {
  	struct device *dev = &nvmem->dev;
-@@ -813,6 +872,25 @@ static int nvmem_add_cells_from_dt(struc
+@@ -812,6 +871,25 @@ static int nvmem_add_cells_from_dt(struc
  		if (nvmem->fixup_dt_cell_info)
  			nvmem->fixup_dt_cell_info(nvmem, &info);
  
diff --git a/target/linux/generic/pending-6.6/834-ledtrig-libata.patch b/target/linux/generic/pending-6.6/834-ledtrig-libata.patch
index f5cd5e4a56..c2d281bfc7 100644
--- a/target/linux/generic/pending-6.6/834-ledtrig-libata.patch
+++ b/target/linux/generic/pending-6.6/834-ledtrig-libata.patch
@@ -83,20 +83,20 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  	ata_sff_port_init(ap);
  
  	return ap;
-@@ -5530,6 +5547,12 @@ static void ata_host_release(struct kref
- 		kfree(ap->pmp_link);
- 		kfree(ap->slave_link);
- 		kfree(ap->ncq_sense_buf);
+@@ -5507,6 +5524,12 @@ void ata_port_free(struct ata_port *ap)
+ 	kfree(ap->pmp_link);
+ 	kfree(ap->slave_link);
+ 	kfree(ap->ncq_sense_buf);
 +#ifdef CONFIG_ATA_LEDS
-+		if (ap->ledtrig) {
-+			led_trigger_unregister(ap->ledtrig);
-+			kfree(ap->ledtrig);
-+		};
++	if (ap->ledtrig) {
++		led_trigger_unregister(ap->ledtrig);
++		kfree(ap->ledtrig);
++	};
 +#endif
- 		kfree(ap);
- 		host->ports[i] = NULL;
- 	}
-@@ -5920,7 +5943,23 @@ int ata_host_register(struct ata_host *h
+ 	kfree(ap);
+ }
+ EXPORT_SYMBOL_GPL(ata_port_free);
+@@ -5927,7 +5950,23 @@ int ata_host_register(struct ata_host *h
  		host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
  		host->ports[i]->local_port_no = i + 1;
  	}
diff --git a/target/linux/imx/Makefile b/target/linux/imx/Makefile
index 2d3f35e4b4..2eb12943c3 100644
--- a/target/linux/imx/Makefile
+++ b/target/linux/imx/Makefile
@@ -9,8 +9,7 @@ BOARDNAME:=NXP i.MX
 FEATURES:=audio display fpu gpio pcie rtc usb usbgadget squashfs targz nand ubifs boot-part rootfs-part
 SUBTARGETS:=cortexa7 cortexa9 cortexa53
 
-KERNEL_PATCHVER:=6.1
-KERNEL_TESTING_PATCHVER:=6.6
+KERNEL_PATCHVER:=6.6
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/imx/config-6.1 b/target/linux/imx/config-6.1
deleted file mode 100644
index 837bab909a..0000000000
--- a/target/linux/imx/config-6.1
+++ /dev/null
@@ -1,486 +0,0 @@
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_32BIT_OFF_T=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_KEEP_MEMBLOCK=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MMAP_RND_BITS_MAX=15
-CONFIG_ARCH_MULTIPLATFORM=y
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_MXC=y
-CONFIG_ARCH_NR_GPIO=0
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARM=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_ARM_ERRATA_814220=y
-CONFIG_ARM_HAS_GROUP_RELOCS=y
-CONFIG_ARM_HEAVY_MB=y
-# CONFIG_ARM_IMX6Q_CPUFREQ is not set
-# CONFIG_ARM_IMX_CPUFREQ_DT is not set
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-CONFIG_ARM_PATCH_IDIV=y
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_THUMB=y
-CONFIG_ARM_UNWIND=y
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ASN1=y
-CONFIG_ASSOCIATIVE_ARRAY=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-# CONFIG_ATA_SFF is not set
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_PM=y
-CONFIG_CACHE_L2X0=y
-CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
-CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
-CONFIG_CC_NO_ARRAY_BOUNDS=y
-CONFIG_CLKSRC_IMX_GPT=y
-CONFIG_CLKSRC_MMIO=y
-# CONFIG_CLK_IMX8MM is not set
-# CONFIG_CLK_IMX8MN is not set
-# CONFIG_CLK_IMX8MP is not set
-# CONFIG_CLK_IMX8MQ is not set
-# CONFIG_CLK_IMX8ULP is not set
-# CONFIG_CLK_IMX93 is not set
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CLZ_TAB=y
-CONFIG_COMMON_CLK=y
-CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
-CONFIG_COMPAT_32BIT_TIME=y
-CONFIG_CONTEXT_TRACKING=y
-CONFIG_CONTEXT_TRACKING_IDLE=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_CPUFREQ_DT_PLATDEV=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_ATTR_SET=y
-CONFIG_CPU_FREQ_GOV_COMMON=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_FREQ_THERMAL=y
-CONFIG_CPU_HAS_ASID=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_SPECTRE=y
-CONFIG_CPU_THERMAL=y
-CONFIG_CPU_THUMB_CAPABLE=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRYPTO_AES_ARM=y
-CONFIG_CRYPTO_AES_ARM_BS=y
-CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y
-CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y
-CONFIG_CRYPTO_AUTHENC=y
-CONFIG_CRYPTO_BLAKE2S_ARM=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_CHACHA20=y
-CONFIG_CRYPTO_CHACHA20_NEON=y
-CONFIG_CRYPTO_CRC32=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CRC32_ARM_CE=y
-CONFIG_CRYPTO_CRYPTD=y
-CONFIG_CRYPTO_CTS=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_DEV_FSL_CAAM=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
-# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
-# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
-CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API=y
-CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
-CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
-CONFIG_CRYPTO_DRBG=y
-CONFIG_CRYPTO_DRBG_HMAC=y
-CONFIG_CRYPTO_DRBG_MENU=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_ENGINE=y
-CONFIG_CRYPTO_HASH_INFO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_JITTERENTROPY=y
-CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y
-CONFIG_CRYPTO_LIB_DES=y
-CONFIG_CRYPTO_LIB_SHA1=y
-CONFIG_CRYPTO_LIB_SHA256=y
-CONFIG_CRYPTO_LIB_UTILS=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_RNG=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_RNG_DEFAULT=y
-CONFIG_CRYPTO_RSA=y
-CONFIG_CRYPTO_SEQIV=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA1_ARM=y
-CONFIG_CRYPTO_SHA1_ARM_NEON=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA256_ARM=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_SHA512_ARM=y
-CONFIG_CRYPTO_SIMD=y
-CONFIG_CRYPTO_XTS=y
-CONFIG_CRYPTO_ZSTD=y
-CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
-CONFIG_DEBUG_MISC=y
-CONFIG_DECOMPRESS_BZIP2=y
-CONFIG_DECOMPRESS_GZIP=y
-CONFIG_DECOMPRESS_LZO=y
-CONFIG_DECOMPRESS_XZ=y
-CONFIG_DMADEVICES=y
-CONFIG_DMA_ENGINE=y
-CONFIG_DMA_OF=y
-CONFIG_DMA_OPS=y
-CONFIG_DMA_VIRTUAL_CHANNELS=y
-# CONFIG_DRM_FSL_LDB is not set
-# CONFIG_DRM_IMX8QM_LDB is not set
-# CONFIG_DRM_IMX8QXP_LDB is not set
-# CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set
-# CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set
-# CONFIG_DRM_DW_HDMI_GP_AUDIO is not set
-# CONFIG_VIDEO_IMX_MIPI_CSIS is not set
-# CONFIG_VIDEO_DW100 is not set
-# CONFIG_VIDEO_ROCKCHIP_ISP1 is not set
-# CONFIG_VIDEO_HANTRO is not set
-CONFIG_DTC=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_ENCRYPTED_KEYS=y
-CONFIG_EXCLUSIVE_SYSTEM_RAM=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_EXTCON=y
-CONFIG_F2FS_FS=y
-CONFIG_FEC=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-# CONFIG_FSL_DPAA2_SWITCH is not set
-CONFIG_FSL_GUTS=y
-CONFIG_FS_ENCRYPTION=y
-CONFIG_FS_ENCRYPTION_ALGS=y
-CONFIG_FS_IOMAP=y
-CONFIG_FS_MBCACHE=y
-CONFIG_FS_POSIX_ACL=y
-CONFIG_FWNODE_MDIO=y
-CONFIG_FW_LOADER_PAGED_BUF=y
-CONFIG_FW_LOADER_SYSFS=y
-CONFIG_GCC11_NO_ARRAY_BOUNDS=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_ARCH_TOPOLOGY=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_CPU_VULNERABILITIES=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_GETTIMEOFDAY=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
-CONFIG_GENERIC_MSI_IRQ=y
-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_PINCTRL_GROUPS=y
-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GENERIC_VDSO_32=y
-# CONFIG_GIANFAR is not set
-CONFIG_GLOB=y
-CONFIG_GPIOLIB_IRQCHIP=y
-CONFIG_GPIO_CDEV=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_MXC=y
-CONFIG_GPIO_VF610=y
-CONFIG_GRO_CELLS=y
-CONFIG_HARDEN_BRANCH_PREDICTOR=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-CONFIG_HAVE_SMP=y
-CONFIG_HWMON=y
-CONFIG_HW_RANDOM=y
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-# CONFIG_I2C_IMX_LPI2C is not set
-CONFIG_I2C_SLAVE=y
-# CONFIG_I2C_SLAVE_TESTUNIT is not set
-CONFIG_IMX2_WDT=y
-# CONFIG_IMX7ULP_WDT is not set
-# CONFIG_IMX8MM_THERMAL is not set
-CONFIG_IMX_DMA=y
-# CONFIG_IMX_GPCV2_PM_DOMAINS is not set
-CONFIG_IMX_INTMUX=y
-CONFIG_IMX_IRQSTEER=y
-CONFIG_IMX_MU_MSI=m
-CONFIG_IMX_SDMA=y
-CONFIG_IMX_THERMAL=y
-# CONFIG_IMX_WEIM is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IRQCHIP=y
-CONFIG_IRQSTACKS=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_JBD2=y
-# CONFIG_JFFS2_FS is not set
-CONFIG_KEYS=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_DEBUGGING_SUPPORT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVICE=y
-CONFIG_MDIO_DEVRES=y
-CONFIG_MEMFD_CREATE=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGRATION=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_CQHCI=y
-# CONFIG_MMC_MXC is not set
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_ESDHC_IMX=y
-CONFIG_MMC_SDHCI_IO_ACCESSORS=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MPILIB=y
-CONFIG_MTD_NAND_CORE=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_ECC_SW_HAMMING=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-# CONFIG_MX3_IPU is not set
-CONFIG_MXC_CLK=y
-CONFIG_MXS_DMA=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEON=y
-CONFIG_NET_DEVLINK=y
-CONFIG_NET_DSA=y
-CONFIG_NET_DSA_TAG_DSA=y
-CONFIG_NET_DSA_TAG_DSA_COMMON=y
-CONFIG_NET_DSA_TAG_EDSA=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NET_PTP_CLASSIFY=y
-CONFIG_NET_SELFTESTS=y
-CONFIG_NET_SWITCHDEV=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NR_CPUS=4
-CONFIG_NVMEM=y
-# CONFIG_NVMEM_IMX_IIM is not set
-CONFIG_NVMEM_IMX_OCOTP=y
-# CONFIG_NVMEM_IMX_OCOTP_ELE is not set
-CONFIG_NVMEM_LAYOUTS=y
-# CONFIG_NVMEM_SNVS_LPGPR is not set
-CONFIG_NVMEM_SYSFS=y
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_KOBJ=y
-CONFIG_OF_MDIO=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PADATA=y
-CONFIG_PAGE_OFFSET=0x80000000
-CONFIG_PAGE_POOL=y
-CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
-CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PHYLINK=y
-CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_IMX8ULP is not set
-# CONFIG_PINCTRL_IMX93 is not set
-# CONFIG_PINCTRL_IMXRT1050 is not set
-# CONFIG_PINCTRL_IMXRT1170 is not set
-CONFIG_PL310_ERRATA_769419=y
-CONFIG_PM=y
-CONFIG_PM_CLK=y
-CONFIG_PM_OPP=y
-CONFIG_PPS=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PTP_1588_CLOCK=y
-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
-CONFIG_PWM=y
-# CONFIG_PWM_IMX1 is not set
-CONFIG_PWM_IMX27=y
-# CONFIG_PWM_IMX_TPM is not set
-CONFIG_PWM_SYSFS=y
-CONFIG_RANDSTRUCT_NONE=y
-CONFIG_RAS=y
-CONFIG_RATIONAL=y
-CONFIG_RD_BZIP2=y
-CONFIG_RD_GZIP=y
-CONFIG_RD_LZO=y
-CONFIG_RD_XZ=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_ANATOP=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_PFUZE100=y
-CONFIG_RESET_CONTROLLER=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_IMXDI is not set
-# CONFIG_RTC_DRV_MXC is not set
-# CONFIG_RTC_DRV_MXC_V2 is not set
-CONFIG_RTC_I2C_AND_SPI=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_SCHED_THERMAL_PRESSURE=y
-CONFIG_SCSI=y
-CONFIG_SCSI_COMMON=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-CONFIG_SERIAL_IMX_EARLYCON=y
-CONFIG_SERIAL_MCTRL_GPIO=y
-CONFIG_SGL_ALLOC=y
-CONFIG_SG_POOL=y
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SOCK_RX_QUEUE_MAPPING=y
-CONFIG_SOC_BUS=y
-# CONFIG_SOC_IMX50 is not set
-# CONFIG_SOC_IMX51 is not set
-# CONFIG_SOC_IMX53 is not set
-# CONFIG_SOC_IMX6Q is not set
-# CONFIG_SOC_IMX6SL is not set
-# CONFIG_SOC_IMX6SLL is not set
-# CONFIG_SOC_IMX6SX is not set
-# CONFIG_SOC_IMX6UL is not set
-# CONFIG_SOC_IMX7D is not set
-# CONFIG_SOC_IMX7ULP is not set
-# CONFIG_SOC_IMX8M is not set
-# CONFIG_SOC_IMX9 is not set
-# CONFIG_SOC_LS1021A is not set
-# CONFIG_SOC_VF610 is not set
-CONFIG_SOFTIRQ_ON_OWN_STACK=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=y
-# CONFIG_SPI_FSL_LPSPI is not set
-# CONFIG_SPI_FSL_QUADSPI is not set
-CONFIG_SPI_IMX=y
-CONFIG_SPI_MASTER=y
-CONFIG_SRAM=y
-CONFIG_SRAM_EXEC=y
-CONFIG_SRCU=y
-CONFIG_STMP_DEVICE=y
-CONFIG_SWPHY=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
-CONFIG_THERMAL_GOV_STEP_WISE=y
-CONFIG_THERMAL_OF=y
-CONFIG_THREAD_INFO_IN_TASK=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_OF=y
-CONFIG_TIMER_PROBE=y
-CONFIG_TREE_RCU=y
-CONFIG_TREE_SRCU=y
-CONFIG_UBIFS_FS=y
-# CONFIG_UCLAMP_TASK is not set
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_UNWINDER_ARM=y
-CONFIG_USB=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_CHIPIDEA_IMX=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_HCD_PLATFORM is not set
-CONFIG_USB_GADGET=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_USB_OTG=y
-CONFIG_USB_PHY=y
-CONFIG_USB_ROLE_SWITCH=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USB_ULPI_BUS=y
-CONFIG_USE_OF=y
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_VMSPLIT_2G=y
-# CONFIG_VMSPLIT_3G is not set
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XPS=y
-CONFIG_XXHASH=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_ZBOOT_ROM_TEXT=0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZSTD_COMMON=y
-CONFIG_ZSTD_COMPRESS=y
-CONFIG_ZSTD_DECOMPRESS=y
diff --git a/target/linux/imx/image/cortexa7.mk b/target/linux/imx/image/cortexa7.mk
index 3f89a99a83..6d2d0ab778 100644
--- a/target/linux/imx/image/cortexa7.mk
+++ b/target/linux/imx/image/cortexa7.mk
@@ -10,9 +10,7 @@ define Device/Default
   KERNEL_NAME := zImage
   KERNEL := kernel-bin | uImage none
   KERNEL_LOADADDR := 0x80008000
-ifdef CONFIG_LINUX_6_6
   DTS_DIR := $(DTS_DIR)/nxp/imx
-endif
   IMAGES :=
 endef
 
diff --git a/target/linux/imx/image/cortexa9.mk b/target/linux/imx/image/cortexa9.mk
index 1ff5bcb8a7..5f087c83ed 100644
--- a/target/linux/imx/image/cortexa9.mk
+++ b/target/linux/imx/image/cortexa9.mk
@@ -84,9 +84,7 @@ define Device/Default
   KERNEL_NAME := zImage
   KERNEL := kernel-bin | uImage none
   KERNEL_LOADADDR := 0x10008000
-ifdef CONFIG_LINUX_6_6
   DTS_DIR := $(DTS_DIR)/nxp/imx
-endif
   IMAGES :=
 endef
 
diff --git a/target/linux/imx/patches-6.1/001-6.2-phy-freescale-imx8m-pcie-Refine-register-definitions.patch b/target/linux/imx/patches-6.1/001-6.2-phy-freescale-imx8m-pcie-Refine-register-definitions.patch
deleted file mode 100644
index 01731755df..0000000000
--- a/target/linux/imx/patches-6.1/001-6.2-phy-freescale-imx8m-pcie-Refine-register-definitions.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From ffcbb4ccd357eeb649036e379a34bf5fb8d4f47c Mon Sep 17 00:00:00 2001
-From: Richard Zhu <hongxing.zhu@nxp.com>
-Date: Thu, 13 Oct 2022 09:47:00 +0800
-Subject: [PATCH 1/3] phy: freescale: imx8m-pcie: Refine register definitions
-
-No function changes, refine PHY register definitions.
-- Keep align with other CMN PHY registers, refine the definitions of
-  PHY_CMN_REG75.
-- Remove two BIT definitions that are not used at all.
-
-Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
-Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
-Tested-by: Marek Vasut <marex@denx.de>
-Tested-by: Richard Leitner <richard.leitner@skidata.com>
-Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
-Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
----
- drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 11 ++++-------
- 1 file changed, 4 insertions(+), 7 deletions(-)
-
---- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
-+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
-@@ -32,12 +32,10 @@
- #define IMX8MM_PCIE_PHY_CMN_REG065	0x194
- #define  ANA_AUX_RX_TERM		(BIT(7) | BIT(4))
- #define  ANA_AUX_TX_LVL			GENMASK(3, 0)
--#define IMX8MM_PCIE_PHY_CMN_REG75	0x1D4
--#define  PCIE_PHY_CMN_REG75_PLL_DONE	0x3
-+#define IMX8MM_PCIE_PHY_CMN_REG075	0x1D4
-+#define  ANA_PLL_DONE			0x3
- #define PCIE_PHY_TRSV_REG5		0x414
--#define  PCIE_PHY_TRSV_REG5_GEN1_DEEMP	0x2D
- #define PCIE_PHY_TRSV_REG6		0x418
--#define  PCIE_PHY_TRSV_REG6_GEN2_DEEMP	0xF
- 
- #define IMX8MM_GPR_PCIE_REF_CLK_SEL	GENMASK(25, 24)
- #define IMX8MM_GPR_PCIE_REF_CLK_PLL	FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x3)
-@@ -152,9 +150,8 @@ static int imx8_pcie_phy_power_on(struct
- 	}
- 
- 	/* Polling to check the phy is ready or not. */
--	ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG75,
--				 val, val == PCIE_PHY_CMN_REG75_PLL_DONE,
--				 10, 20000);
-+	ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG075,
-+				 val, val == ANA_PLL_DONE, 10, 20000);
- 	return ret;
- }
- 
diff --git a/target/linux/imx/patches-6.1/003-6.3-phy-freescale-imx8m-pcie-Add-i.MX8MP-PCIe-PHY-suppor.patch b/target/linux/imx/patches-6.1/003-6.3-phy-freescale-imx8m-pcie-Add-i.MX8MP-PCIe-PHY-suppor.patch
deleted file mode 100644
index dbcfd40e57..0000000000
--- a/target/linux/imx/patches-6.1/003-6.3-phy-freescale-imx8m-pcie-Add-i.MX8MP-PCIe-PHY-suppor.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From bf03b9281b119bcdc167b2dd6ac98294587eb5ff Mon Sep 17 00:00:00 2001
-From: Richard Zhu <hongxing.zhu@nxp.com>
-Date: Thu, 13 Oct 2022 09:47:02 +0800
-Subject: [PATCH 3/3] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support
-
-Add i.MX8MP PCIe PHY support.
-
-Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
-Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
-Tested-by: Marek Vasut <marex@denx.de>
-Tested-by: Richard Leitner <richard.leitner@skidata.com>
-Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
-Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
-Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
----
- drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 25 ++++++++++++++++++++--
- 1 file changed, 23 insertions(+), 2 deletions(-)
-
---- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
-+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
-@@ -48,6 +48,7 @@
- 
- enum imx8_pcie_phy_type {
- 	IMX8MM,
-+	IMX8MP,
- };
- 
- struct imx8_pcie_phy_drvdata {
-@@ -60,6 +61,7 @@ struct imx8_pcie_phy {
- 	struct clk		*clk;
- 	struct phy		*phy;
- 	struct regmap		*iomuxc_gpr;
-+	struct reset_control	*perst;
- 	struct reset_control	*reset;
- 	u32			refclk_pad_mode;
- 	u32			tx_deemph_gen1;
-@@ -74,11 +76,11 @@ static int imx8_pcie_phy_power_on(struct
- 	u32 val, pad_mode;
- 	struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy);
- 
--	reset_control_assert(imx8_phy->reset);
--
- 	pad_mode = imx8_phy->refclk_pad_mode;
- 	switch (imx8_phy->drvdata->variant) {
- 	case IMX8MM:
-+		reset_control_assert(imx8_phy->reset);
-+
- 		/* Tune PHY de-emphasis setting to pass PCIe compliance. */
- 		if (imx8_phy->tx_deemph_gen1)
- 			writel(imx8_phy->tx_deemph_gen1,
-@@ -87,6 +89,8 @@ static int imx8_pcie_phy_power_on(struct
- 			writel(imx8_phy->tx_deemph_gen2,
- 			       imx8_phy->base + PCIE_PHY_TRSV_REG6);
- 		break;
-+	case IMX8MP: /* Do nothing. */
-+		break;
- 	}
- 
- 	if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
-@@ -143,6 +147,9 @@ static int imx8_pcie_phy_power_on(struct
- 			   IMX8MM_GPR_PCIE_CMN_RST);
- 
- 	switch (imx8_phy->drvdata->variant) {
-+	case IMX8MP:
-+		reset_control_deassert(imx8_phy->perst);
-+		fallthrough;
- 	case IMX8MM:
- 		reset_control_deassert(imx8_phy->reset);
- 		usleep_range(200, 500);
-@@ -183,8 +190,14 @@ static const struct imx8_pcie_phy_drvdat
- 	.variant = IMX8MM,
- };
- 
-+static const struct imx8_pcie_phy_drvdata imx8mp_drvdata = {
-+	.gpr = "fsl,imx8mp-iomuxc-gpr",
-+	.variant = IMX8MP,
-+};
-+
- static const struct of_device_id imx8_pcie_phy_of_match[] = {
- 	{.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
-+	{.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
- 	{ },
- };
- MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
-@@ -240,6 +253,14 @@ static int imx8_pcie_phy_probe(struct pl
- 		return PTR_ERR(imx8_phy->reset);
- 	}
- 
-+	if (imx8_phy->drvdata->variant == IMX8MP) {
-+		imx8_phy->perst =
-+			devm_reset_control_get_exclusive(dev, "perst");
-+		if (IS_ERR(imx8_phy->perst))
-+			dev_err_probe(dev, PTR_ERR(imx8_phy->perst),
-+				      "Failed to get PCIE PHY PERST control\n");
-+	}
-+
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	imx8_phy->base = devm_ioremap_resource(dev, res);
- 	if (IS_ERR(imx8_phy->base))
diff --git a/target/linux/imx/patches-6.1/100-bootargs.patch b/target/linux/imx/patches-6.1/100-bootargs.patch
deleted file mode 100644
index cf63a3bdb1..0000000000
--- a/target/linux/imx/patches-6.1/100-bootargs.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/boot/dts/imx6dl-wandboard.dts
-+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts
-@@ -16,4 +16,8 @@
- 		device_type = "memory";
- 		reg = <0x10000000 0x40000000>;
- 	};
-+
-+	chosen {
-+		bootargs = "console=ttymxc0,115200";
-+	};
- };
diff --git a/target/linux/imx/patches-6.1/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch b/target/linux/imx/patches-6.1/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch
deleted file mode 100644
index 9db7098aaf..0000000000
--- a/target/linux/imx/patches-6.1/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 68604e89335ccb3e893b5a05b2c0d5cd2eaaf6ec Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
-Date: Tue, 3 Mar 2020 15:14:40 +0100
-Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: add status LEDs aliases
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Petr Štetiar <ynezz@true.cz>
----
- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 16 ++++++++++------
- arch/arm/boot/dts/imx6q-apalis-ixora.dts      | 12 ++++++++----
- 2 files changed, 18 insertions(+), 10 deletions(-)
-
---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
-+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
-@@ -24,6 +24,10 @@
- 		i2c2 = &i2c2;
- 		rtc0 = &rtc_i2c;
- 		rtc1 = &snvs_rtc;
-+		led-boot = &led_boot;
-+		led-failsafe = &led_failsafe;
-+		led-running = &led_running;
-+		led-upgrade = &led_upgrade;
- 	};
- 
- 	chosen {
-@@ -35,22 +39,22 @@
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_leds_ixora>;
- 
--		led4-green {
-+		led_running: led4-green {
- 			gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
- 			label = "LED_4_GREEN";
- 		};
- 
--		led4-red {
-+		led_upgrade: led4-red {
- 			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
- 			label = "LED_4_RED";
- 		};
- 
--		led5-green {
-+		led_boot: led5-green {
- 			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
- 			label = "LED_5_GREEN";
- 		};
- 
--		led5-red {
-+		led_failsafe: led5-red {
- 			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
- 			label = "LED_5_RED";
- 		};
---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
-+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
-@@ -24,6 +24,10 @@
- 		i2c2 = &i2c2;
- 		rtc0 = &rtc_i2c;
- 		rtc1 = &snvs_rtc;
-+		led-boot = &led_boot;
-+		led-failsafe = &led_failsafe;
-+		led-running = &led_running;
-+		led-upgrade = &led_upgrade;
- 	};
- 
- 	chosen {
-@@ -36,22 +40,22 @@
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_leds_ixora>;
- 
--		led4-green {
--			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-+		led_running: led4-green {
-+			gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
- 			label = "LED_4_GREEN";
- 		};
- 
--		led4-red {
--			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
-+		led_upgrade: led4-red {
-+			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
- 			label = "LED_4_RED";
- 		};
- 
--		led5-green {
-+		led_boot: led5-green {
- 			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
- 			label = "LED_5_GREEN";
- 		};
- 
--		led5-red {
-+		led_failsafe: led5-red {
- 			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
- 			label = "LED_5_RED";
- 		};
diff --git a/target/linux/imx/patches-6.1/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch b/target/linux/imx/patches-6.1/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch
deleted file mode 100644
index 95f572f35e..0000000000
--- a/target/linux/imx/patches-6.1/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
-Date: Tue, 3 Mar 2020 15:15:57 +0100
-Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Petr Štetiar <ynezz@true.cz>
----
- arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++-
- arch/arm/boot/dts/imx6q-apalis-ixora.dts      | 15 ++++++++++++++-
- 2 files changed, 28 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
-+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
-@@ -59,6 +59,17 @@
- 			label = "LED_5_RED";
- 		};
- 	};
-+
-+	gpio-keys {
-+		pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+			debounce-interval = <10>;
-+		};
-+	};
- };
- 
- &can1 {
-@@ -181,4 +192,10 @@
- 			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
- 		>;
- 	};
-+
-+	pinctrl_switch3_ixora: switch3ixora {
-+		fsl,pins = <
-+			MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
-+		>;
-+	};
- };
---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
-+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
-@@ -61,6 +61,17 @@
- 		};
- 	};
- 
-+	gpio-keys {
-+		pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>;
-+
-+		reset {
-+			label = "reset";
-+			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+			debounce-interval = <10>;
-+		};
-+	};
-+
- 	reg_3v3_vmmc: regulator-3v3-vmmc {
- 		compatible = "regulator-fixed";
- 		enable-active-high;
-@@ -262,6 +273,12 @@
- 		>;
- 	};
- 
-+	pinctrl_switch3_ixora: switch3ixora {
-+		fsl,pins = <
-+			MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
-+		>;
-+	};
-+
- 	pinctrl_mmc_cd_sleep: mmccdslpgrp {
- 		fsl,pins = <
- 			 /* MMC1 CD */
diff --git a/target/linux/imx/patches-6.1/310-ARM-dts-imx7d-pico-pi-set-aliases.patch b/target/linux/imx/patches-6.1/310-ARM-dts-imx7d-pico-pi-set-aliases.patch
deleted file mode 100644
index f50199cdfc..0000000000
--- a/target/linux/imx/patches-6.1/310-ARM-dts-imx7d-pico-pi-set-aliases.patch
+++ /dev/null
@@ -1,24 +0,0 @@
---- a/arch/arm/boot/dts/imx7d-pico-pi.dts
-+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
-@@ -8,12 +8,20 @@
- 	model = "TechNexion PICO-IMX7D Board and PI baseboard";
- 	compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
- 
-+	aliases {
-+		led-boot = &led_system;
-+		led-failsafe = &led_system;
-+		led-running = &led_system;
-+		led-upgrade = &led_system;
-+		label-mac-device = &fec1;
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_gpio_leds>;
- 
--		led {
-+		led_system: led {
- 			label = "gpio-led";
- 			gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
- 		};
diff --git a/target/linux/imx/patches-6.1/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch b/target/linux/imx/patches-6.1/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch
deleted file mode 100644
index 5248e8c74c..0000000000
--- a/target/linux/imx/patches-6.1/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 6e8e5ccfbee7a531b035ffce3f95f3901946fa9d Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Wed, 9 Jan 2019 14:33:24 -0600
-Subject: [PATCH] ARM: imx7d-pico-pi.dts: add default stdout-path
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
----
- arch/arm/boot/dts/imx7d-pico-pi.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/imx7d-pico-pi.dts
-+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
-@@ -16,6 +16,10 @@
- 		label-mac-device = &fec1;
- 	};
- 
-+	chosen {
-+		stdout-path = "serial4:115200n8";
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 		pinctrl-names = "default";
diff --git a/target/linux/ipq40xx/Makefile b/target/linux/ipq40xx/Makefile
index 30091e5d29..68a47c9082 100644
--- a/target/linux/ipq40xx/Makefile
+++ b/target/linux/ipq40xx/Makefile
@@ -3,7 +3,7 @@ include $(TOPDIR)/rules.mk
 ARCH:=arm
 BOARD:=ipq40xx
 BOARDNAME:=Qualcomm Atheros IPQ40XX
-FEATURES:=squashfs fpu ramdisk nand
+FEATURES:=squashfs fpu ramdisk
 CPU_TYPE:=cortex-a7
 CPU_SUBTYPE:=neon-vfpv4
 SUBTARGETS:=generic chromium mikrotik
diff --git a/target/linux/ipq40xx/config-6.6 b/target/linux/ipq40xx/config-6.6
index 3049efc3d6..683463628f 100644
--- a/target/linux/ipq40xx/config-6.6
+++ b/target/linux/ipq40xx/config-6.6
@@ -306,11 +306,6 @@ CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPLIT_FIRMWARE=y
 CONFIG_MTD_SPLIT_FIT_FW=y
 CONFIG_MTD_SPLIT_WRGG_FW=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-CONFIG_MTD_UBI_NVMEM=y
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEON=y
@@ -532,7 +527,6 @@ CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
 CONFIG_TREE_RCU=y
 CONFIG_TREE_SRCU=y
-CONFIG_UBIFS_FS=y
 CONFIG_UEVENT_HELPER_PATH=""
 CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
 CONFIG_UNWINDER_ARM=y
diff --git a/target/linux/ipq40xx/generic/config-default b/target/linux/ipq40xx/generic/config-default
new file mode 100644
index 0000000000..bd9876a0b6
--- /dev/null
+++ b/target/linux/ipq40xx/generic/config-default
@@ -0,0 +1,6 @@
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_NVMEM=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_UBIFS_FS=y
diff --git a/target/linux/ipq40xx/generic/target.mk b/target/linux/ipq40xx/generic/target.mk
index 90c1b762af..4ff40dea2b 100644
--- a/target/linux/ipq40xx/generic/target.mk
+++ b/target/linux/ipq40xx/generic/target.mk
@@ -1,3 +1,3 @@
 BOARDNAME:=Generic
-FEATURES+=emmc
+FEATURES+=emmc nand
 DEFAULT_PACKAGES += ath10k-board-qca4019
diff --git a/target/linux/ipq40xx/mikrotik/config-default b/target/linux/ipq40xx/mikrotik/config-default
index ab470ecb41..805e6db23b 100644
--- a/target/linux/ipq40xx/mikrotik/config-default
+++ b/target/linux/ipq40xx/mikrotik/config-default
@@ -4,3 +4,9 @@ CONFIG_MTD_ROUTERBOOT_PARTS=y
 CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
 CONFIG_MTD_SPLIT_MINOR_FW=y
 # CONFIG_NVMEM_LAYOUT_MIKROTIK is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_NVMEM=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_UBIFS_FS=y
diff --git a/target/linux/ipq40xx/mikrotik/target.mk b/target/linux/ipq40xx/mikrotik/target.mk
index 4530a90985..12bf8a4cd3 100644
--- a/target/linux/ipq40xx/mikrotik/target.mk
+++ b/target/linux/ipq40xx/mikrotik/target.mk
@@ -1,4 +1,4 @@
 BOARDNAME:=MikroTik
-FEATURES += minor
+FEATURES += minor nand
 KERNEL_IMAGES:=vmlinux
 IMAGES_DIR:=compressed
diff --git a/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch b/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch
index 4910307c88..d9ecf4b640 100644
--- a/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch
+++ b/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch
@@ -996,7 +996,7 @@ Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
 +	.ndo_uninit		= ipqess_uninit,
 +	.ndo_open		= ipqess_open,
 +	.ndo_stop		= ipqess_stop,
-+	.ndo_do_ioctl		= ipqess_do_ioctl,
++	.ndo_eth_ioctl		= ipqess_do_ioctl,
 +	.ndo_start_xmit		= ipqess_xmit,
 +	.ndo_get_stats		= ipqess_get_stats,
 +	.ndo_set_mac_address	= ipqess_set_mac_address,
diff --git a/target/linux/ipq40xx/patches-6.6/999-atm-mpoa-intel-dsl-phy-support.patch b/target/linux/ipq40xx/patches-6.6/999-atm-mpoa-intel-dsl-phy-support.patch
index 3d5b7afe8c..eab26ccb11 100644
--- a/target/linux/ipq40xx/patches-6.6/999-atm-mpoa-intel-dsl-phy-support.patch
+++ b/target/linux/ipq40xx/patches-6.6/999-atm-mpoa-intel-dsl-phy-support.patch
@@ -4,7 +4,7 @@ Subject: [PATCH] UGW_SW-29163: ATM oam support
 
 --- a/drivers/net/ppp/ppp_generic.c
 +++ b/drivers/net/ppp/ppp_generic.c
-@@ -2953,6 +2953,22 @@ char *ppp_dev_name(struct ppp_channel *c
+@@ -2968,6 +2968,22 @@ char *ppp_dev_name(struct ppp_channel *c
  	return name;
  }
  
@@ -27,7 +27,7 @@ Subject: [PATCH] UGW_SW-29163: ATM oam support
  
  /*
   * Disconnect a channel from the generic layer.
-@@ -3599,6 +3615,7 @@ EXPORT_SYMBOL(ppp_unregister_channel);
+@@ -3614,6 +3630,7 @@ EXPORT_SYMBOL(ppp_unregister_channel);
  EXPORT_SYMBOL(ppp_channel_index);
  EXPORT_SYMBOL(ppp_unit_number);
  EXPORT_SYMBOL(ppp_dev_name);
diff --git a/target/linux/kirkwood/Makefile b/target/linux/kirkwood/Makefile
index 44eaf925a1..2010f9a812 100644
--- a/target/linux/kirkwood/Makefile
+++ b/target/linux/kirkwood/Makefile
@@ -11,8 +11,7 @@ FEATURES:=rtc usb nand squashfs ramdisk
 CPU_TYPE:=xscale
 SUBTARGETS:=generic
 
-KERNEL_PATCHVER:=6.1
-KERNEL_TESTING_PATCHVER:=6.6
+KERNEL_PATCHVER:=6.6
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/kirkwood/config-6.1 b/target/linux/kirkwood/config-6.1
deleted file mode 100644
index 6d21143e96..0000000000
--- a/target/linux/kirkwood/config-6.1
+++ /dev/null
@@ -1,309 +0,0 @@
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_32BIT_OFF_T=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_KEEP_MEMBLOCK=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-CONFIG_ARCH_MULTI_CPU_AUTO=y
-# CONFIG_ARCH_MULTI_V4 is not set
-# CONFIG_ARCH_MULTI_V4T is not set
-CONFIG_ARCH_MULTI_V4_V5=y
-CONFIG_ARCH_MULTI_V5=y
-CONFIG_ARCH_MVEBU=y
-CONFIG_ARCH_NR_GPIO=0
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARM=y
-# CONFIG_ARMADA_37XX_WATCHDOG is not set
-# CONFIG_ARMADA_THERMAL is not set
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
-CONFIG_ARM_HAS_GROUP_RELOCS=y
-# CONFIG_ARM_KIRKWOOD_CPUIDLE is not set
-CONFIG_ARM_L1_CACHE_SHIFT=5
-# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ARM_UNWIND=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-CONFIG_ATA_LEDS=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_CACHE_FEROCEON_L2=y
-# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
-CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
-CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
-CONFIG_CC_NO_ARRAY_BOUNDS=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
-CONFIG_COMPAT_32BIT_TIME=y
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_COPY_FEROCEON=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FEROCEON=y
-# CONFIG_CPU_FEROCEON_OLD_ID is not set
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_CPU_PABRT_LEGACY=y
-CONFIG_CPU_PM=y
-CONFIG_CPU_THERMAL=y
-CONFIG_CPU_THUMB_CAPABLE=y
-CONFIG_CPU_TLB_FEROCEON=y
-CONFIG_CPU_USE_DOMAINS=y
-CONFIG_CRC16=y
-# CONFIG_CRC32_SARWATE is not set
-CONFIG_CRC32_SLICEBY8=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_DEV_MARVELL=y
-CONFIG_CRYPTO_DEV_MARVELL_CESA=y
-CONFIG_CRYPTO_HASH_INFO=y
-CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
-CONFIG_CRYPTO_LIB_DES=y
-CONFIG_CRYPTO_LIB_SHA1=y
-CONFIG_CRYPTO_LIB_UTILS=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_ZSTD=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
-CONFIG_DEBUG_MVEBU_UART0_ALTERNATE=y
-# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
-CONFIG_DEBUG_UART_8250=y
-CONFIG_DEBUG_UART_8250_SHIFT=2
-CONFIG_DEBUG_UART_PHYS=0xf1012000
-CONFIG_DEBUG_UART_VIRT=0xfed12000
-CONFIG_DMA_OPS=y
-CONFIG_DNOTIFY=y
-CONFIG_DTC=y
-# CONFIG_EARLY_PRINTK is not set
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EXCLUSIVE_SYSTEM_RAM=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FORCE_PCI=y
-CONFIG_FWNODE_MDIO=y
-CONFIG_FW_LOADER_PAGED_BUF=y
-CONFIG_FW_LOADER_SYSFS=y
-CONFIG_GCC11_NO_ARRAY_BOUNDS=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GLOB=y
-CONFIG_GPIOLIB_IRQCHIP=y
-CONFIG_GPIO_CDEV=y
-CONFIG_GPIO_MVEBU=y
-CONFIG_GRO_CELLS=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-CONFIG_HWMON=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_OMAP=y
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-# CONFIG_I2C_PXA is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IRQCHIP=y
-CONFIG_IRQSTACKS=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_KIRKWOOD_CLK=y
-CONFIG_KIRKWOOD_THERMAL=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_NETXBIG=y
-CONFIG_LEDS_NS2=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_DEBUGGING_SUPPORT=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MACH_KIRKWOOD=y
-CONFIG_MACH_MVEBU_ANY=y
-CONFIG_MANGLE_BOOTARGS=y
-CONFIG_MARVELL_PHY=y
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVICE=y
-CONFIG_MDIO_DEVRES=y
-CONFIG_MEMFD_CREATE=y
-CONFIG_MIGRATION=y
-CONFIG_MODULES_USE_ELF_REL=y
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_NAND_CORE=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_ECC_SW_HAMMING=y
-# CONFIG_MTD_NAND_MARVELL is not set
-CONFIG_MTD_NAND_ORION=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_SPLIT_FIRMWARE=y
-CONFIG_MTD_SPLIT_UIMAGE_FW=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MV643XX_ETH=y
-CONFIG_MVEBU_CLK_COMMON=y
-CONFIG_MVEBU_MBUS=y
-CONFIG_MVMDIO=y
-# CONFIG_MVNETA is not set
-# CONFIG_MVPP2 is not set
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_KUSER_HELPERS=y
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NET_DEVLINK=y
-CONFIG_NET_DSA=y
-CONFIG_NET_DSA_MV88E6XXX=y
-CONFIG_NET_DSA_TAG_DSA=y
-CONFIG_NET_DSA_TAG_DSA_COMMON=y
-CONFIG_NET_DSA_TAG_EDSA=y
-CONFIG_NET_SELFTESTS=y
-CONFIG_NET_SWITCHDEV=y
-CONFIG_NLS=y
-CONFIG_NVMEM=y
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_KOBJ=y
-CONFIG_OF_MDIO=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_ORION_IRQCHIP=y
-CONFIG_ORION_TIMER=y
-CONFIG_ORION_WATCHDOG=y
-CONFIG_OUTER_CACHE=y
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_PAGE_POOL=y
-CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
-CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
-CONFIG_PCI=y
-CONFIG_PCI_BRIDGE_EMUL=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PCI_MVEBU=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PHYLINK=y
-# CONFIG_PHY_MVEBU_A3700_UTMI is not set
-# CONFIG_PHY_MVEBU_A38X_COMPHY is not set
-CONFIG_PHY_MVEBU_SATA=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_KIRKWOOD=y
-CONFIG_PINCTRL_MVEBU=y
-# CONFIG_PINCTRL_SINGLE is not set
-CONFIG_PINCTRL_SX150X=y
-CONFIG_PLAT_ORION=y
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_POWER_RESET_LINKSTATION=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
-CONFIG_RANDSTRUCT_NONE=y
-CONFIG_RATIONAL=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_MV=y
-CONFIG_RTC_I2C_AND_SPI=y
-CONFIG_RTC_MC146818_LIB=y
-CONFIG_SCSI=y
-CONFIG_SCSI_COMMON=y
-CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_MCTRL_GPIO=y
-# CONFIG_SERIAL_MVEBU_UART is not set
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SGL_ALLOC=y
-CONFIG_SG_POOL=y
-CONFIG_SOC_BUS=y
-CONFIG_SOFTIRQ_ON_OWN_STACK=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-# CONFIG_SPI_ARMADA_3700 is not set
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_MEM=y
-CONFIG_SPI_ORION=y
-CONFIG_SPLIT_PTLOCK_CPUS=999999
-CONFIG_SRAM=y
-CONFIG_SRAM_EXEC=y
-CONFIG_SRCU=y
-CONFIG_SWPHY=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
-CONFIG_THERMAL_GOV_STEP_WISE=y
-CONFIG_THERMAL_HWMON=y
-CONFIG_THERMAL_OF=y
-CONFIG_THREAD_INFO_IN_TASK=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_OF=y
-CONFIG_TIMER_PROBE=y
-CONFIG_TINY_SRCU=y
-CONFIG_UBIFS_FS=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_UNWINDER_ARM=y
-CONFIG_USB=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_LED_TRIG=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USE_OF=y
-# CONFIG_VFP is not set
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WAN=y
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XXHASH=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZSTD_COMMON=y
-CONFIG_ZSTD_COMPRESS=y
-CONFIG_ZSTD_DECOMPRESS=y
diff --git a/target/linux/kirkwood/image/Makefile b/target/linux/kirkwood/image/Makefile
index 2bd2f64159..e64785c5a1 100644
--- a/target/linux/kirkwood/image/Makefile
+++ b/target/linux/kirkwood/image/Makefile
@@ -112,9 +112,7 @@ endef
 
 define Device/Default
   PROFILES := Default
-ifdef CONFIG_LINUX_6_6
   DEVICE_DTS_DIR := $(DTS_DIR)/marvell
-endif
   DEVICE_DTS = kirkwood-$(lastword $(subst _, ,$(1)))
   KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
   KERNEL := kernel-bin | append-dtb | uImage none
diff --git a/target/linux/kirkwood/image/generic.mk b/target/linux/kirkwood/image/generic.mk
deleted file mode 100644
index fff46be172..0000000000
--- a/target/linux/kirkwood/image/generic.mk
+++ /dev/null
@@ -1,177 +0,0 @@
-define Device/checkpoint_l-50
-  DEVICE_VENDOR := Check Point
-  DEVICE_MODEL := L-50
-  DEVICE_PACKAGES := kmod-ath9k kmod-gpio-button-hotplug kmod-mvsdio \
-	kmod-rtc-s35390a kmod-usb-ledtrig-usbport wpad-basic-mbedtls
-  IMAGES := sysupgrade.bin
-endef
-TARGET_DEVICES += checkpoint_l-50
-
-define Device/cisco_on100
-  DEVICE_VENDOR := Cisco Systems
-  DEVICE_MODEL := ON100
-  KERNEL_SIZE := 5376k
-  KERNEL_IN_UBI :=
-  UBINIZE_OPTS := -E 5
-  IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi
-  DEVICE_PACKAGES := kmod-mvsdio kmod-rtc-mv
-  SUPPORTED_DEVICES += on100
-endef
-TARGET_DEVICES += cisco_on100
-
-define Device/cloudengines_pogoe02
-  DEVICE_VENDOR := Cloud Engines
-  DEVICE_MODEL := Pogoplug E02
-  DEVICE_DTS := kirkwood-pogo_e02
-  DEVICE_PACKAGES := kmod-rtc-mv
-  SUPPORTED_DEVICES += pogo_e02
-endef
-TARGET_DEVICES += cloudengines_pogoe02
-
-define Device/cloudengines_pogoplugv4
-  DEVICE_VENDOR := Cloud Engines
-  DEVICE_MODEL := Pogoplug V4
-  DEVICE_DTS := kirkwood-pogoplug-series-4
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-mvsdio kmod-usb3 \
-	kmod-gpio-button-hotplug kmod-rtc-mv
-endef
-TARGET_DEVICES += cloudengines_pogoplugv4
-
-define Device/ctera_c200-v1
-  DEVICE_VENDOR := Ctera
-  DEVICE_MODEL := C200
-  DEVICE_VARIANT := V1
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-gpio-button-hotplug \
-	kmod-hwmon-lm63 kmod-rtc-s35390a kmod-usb-ledtrig-usbport
-  KERNEL := kernel-bin | append-dtb | uImage none | ctera-firmware
-  KERNEL_IN_UBI :=
-  KERNEL_SUFFIX := -factory.firm
-  IMAGES := sysupgrade.bin
-endef
-TARGET_DEVICES += ctera_c200-v1
-
-define Device/endian_4i-edge-200
-  DEVICE_VENDOR := Endian
-  DEVICE_MODEL := 4i Edge 200
-  DEVICE_ALT0_VENDOR := Endian
-  DEVICE_ALT0_MODEL := UTM Mini Firewall
-  DEVICE_PACKAGES := kmod-ath9k kmod-mvsdio wpad-basic-mbedtls kmod-rtc-mv
-  KERNEL_SIZE := 4096k
-  IMAGES := sysupgrade.bin
-endef
-TARGET_DEVICES += endian_4i-edge-200
-
-define Device/globalscale_sheevaplug
-  DEVICE_VENDOR := Globalscale
-  DEVICE_MODEL := Sheevaplug
-  DEVICE_PACKAGES := kmod-mvsdio kmod-rtc-mv
-endef
-TARGET_DEVICES += globalscale_sheevaplug
-
-define Device/iom_iconnect-1.1
-  DEVICE_VENDOR := Iomega
-  DEVICE_MODEL := Iconnect
-  DEVICE_PACKAGES := kmod-rtc-mv
-  DEVICE_DTS := kirkwood-iconnect
-  SUPPORTED_DEVICES += iconnect
-endef
-TARGET_DEVICES += iom_iconnect-1.1
-
-define Device/iptime_nas1
-  DEVICE_VENDOR := ipTIME
-  DEVICE_MODEL := NAS1
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 \
-	kmod-gpio-button-hotplug kmod-gpio-pca953x kmod-hwmon-drivetemp \
-	kmod-hwmon-gpiofan kmod-usb-ledtrig-usbport kmod-rtc-mv kmod-thermal \
-  -uboot-envtools
-  KERNEL := $$(KERNEL) | iptime-naspkg nas1
-  BLOCKSIZE := 256k
-  IMAGE_SIZE := 15872k
-  IMAGES := sysupgrade.bin
-  IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | \
-	check-size | append-metadata
-endef
-TARGET_DEVICES += iptime_nas1
-
-define Device/netgear_readynas-duo-v2
-  DEVICE_VENDOR := NETGEAR
-  DEVICE_MODEL := ReadyNAS Duo
-  DEVICE_VARIANT := v2
-  DEVICE_DTS := kirkwood-netgear_readynas_duo_v2
-  KERNEL_IN_UBI :=
-  IMAGES := sysupgrade.bin
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 \
-	kmod-gpio-button-hotplug kmod-hwmon-g762 kmod-rtc-rs5c372a kmod-usb3
-endef
-TARGET_DEVICES += netgear_readynas-duo-v2
-
-define Device/raidsonic_ib-nas62x0
-  DEVICE_VENDOR := RaidSonic
-  DEVICE_MODEL := ICY BOX IB-NAS62x0
-  DEVICE_DTS := kirkwood-ib62x0
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-rtc-mv
-  SUPPORTED_DEVICES += ib62x0
-endef
-TARGET_DEVICES += raidsonic_ib-nas62x0
-
-define Device/seagate_blackarmor-nas220
-  DEVICE_VENDOR := Seagate
-  DEVICE_MODEL := Blackarmor NAS220
-  DEVICE_PACKAGES := kmod-hwmon-adt7475 kmod-fs-ext4 kmod-ata-marvell-sata \
-	mdadm kmod-gpio-button-hotplug kmod-rtc-mv
-  PAGESIZE := 512
-  SUBPAGESIZE := 256
-  BLOCKSIZE := 16k
-  UBINIZE_OPTS := -e 1
-endef
-TARGET_DEVICES += seagate_blackarmor-nas220
-
-define Device/seagate_dockstar
-  DEVICE_VENDOR := Seagate
-  DEVICE_MODEL := FreeAgent Dockstar
-  DEVICE_PACKAGES := kmod-rtc-mv
-  SUPPORTED_DEVICES += dockstar
-endef
-TARGET_DEVICES += seagate_dockstar
-
-define Device/seagate_goflexnet
-  DEVICE_VENDOR := Seagate
-  DEVICE_MODEL := GoFlexNet
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-rtc-mv
-  SUPPORTED_DEVICES += goflexnet
-endef
-TARGET_DEVICES += seagate_goflexnet
-
-define Device/seagate_goflexhome
-  DEVICE_VENDOR := Seagate
-  DEVICE_MODEL := GoFlexHome
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-rtc-mv
-  SUPPORTED_DEVICES += goflexhome
-endef
-TARGET_DEVICES += seagate_goflexhome
-
-define Device/zyxel_nsa310b
-  DEVICE_VENDOR := ZyXEL
-  DEVICE_MODEL := NSA310b
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-r8169 kmod-fs-ext4 \
-	kmod-gpio-button-hotplug kmod-hwmon-lm85 kmod-rtc-mv
-  SUPPORTED_DEVICES += nsa310b
-endef
-TARGET_DEVICES += zyxel_nsa310b
-
-define Device/zyxel_nsa310s
-  DEVICE_VENDOR := ZyXEL
-  DEVICE_MODEL := NSA310S
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 kmod-gpio-button-hotplug
-endef
-TARGET_DEVICES += zyxel_nsa310s
-
-define Device/zyxel_nsa325
-  DEVICE_VENDOR := ZyXEL
-  DEVICE_MODEL := NSA325
-  DEVICE_VARIANT := v1/v2
-  DEVICE_PACKAGES := kmod-ata-marvell-sata kmod-fs-ext4 \
-	kmod-gpio-button-hotplug kmod-rtc-pcf8563 kmod-usb3
-  SUPPORTED_DEVICES += nsa325
-endef
-TARGET_DEVICES += zyxel_nsa325
diff --git a/target/linux/kirkwood/patches-6.1/002-6.2-ARM-dts-kirkwood-Add-Zyxel-NSA310S-board.patch b/target/linux/kirkwood/patches-6.1/002-6.2-ARM-dts-kirkwood-Add-Zyxel-NSA310S-board.patch
deleted file mode 100644
index 6a8e8e8c9b..0000000000
--- a/target/linux/kirkwood/patches-6.1/002-6.2-ARM-dts-kirkwood-Add-Zyxel-NSA310S-board.patch
+++ /dev/null
@@ -1,301 +0,0 @@
-From e977a103840c57d72b52cbc8c17f87f86ef9aa8d Mon Sep 17 00:00:00 2001
-From: Pawel Dembicki <paweldembicki@gmail.com>
-Date: Sat, 29 Oct 2022 22:57:38 +0200
-Subject: [PATCH] ARM: dts: kirkwood: Add Zyxel NSA310S board
-
-Zyxel NSA310S is a NAS based on Marvell kirkwood SoC.
-
-Specification:
- - Processor Marvell 88F6702 1 GHz
- - 256MB RAM
- - 128MB NAND
- - 1x GBE LAN port (PHY: Marvell 88E1318)
- - 2x USB 2.0
- - 1x SATA
- - 3x button
- - 7x leds
- - serial on J1 connector (115200 8N1) (GND-NOPIN-RX-TX-VCC)
-
-Tested-by: Tony Dinh <mibodhi@gmail.com>
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
-Acked-by: Adam Baker <linux@baker-net.org.uk>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
----
- arch/arm/boot/dts/Makefile             |   1 +
- arch/arm/boot/dts/kirkwood-nsa310s.dts | 259 +++++++++++++++++++++++++
- 2 files changed, 260 insertions(+)
- create mode 100644 arch/arm/boot/dts/kirkwood-nsa310s.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -356,6 +356,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
- 	kirkwood-ns2mini.dtb \
- 	kirkwood-nsa310.dtb \
- 	kirkwood-nsa310a.dtb \
-+	kirkwood-nsa310s.dtb \
- 	kirkwood-nsa320.dtb \
- 	kirkwood-nsa325.dtb \
- 	kirkwood-openblocks_a6.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/kirkwood-nsa310s.dts
-@@ -0,0 +1,259 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * ZyXEL NSA310S Board Description
-+ * Copyright 2020-2022 Pawel Dembicki <paweldembicki@gmail.com>
-+ * Copyright (c) 2015-2021, Tony Dinh <mibodhi@gmail.com>
-+ * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
-+ * Based upon the board setup file created by Peter Schildmann
-+ */
-+/dts-v1/;
-+
-+#include "kirkwood.dtsi"
-+#include "kirkwood-6281.dtsi"
-+#include <dt-bindings/leds/common.h>
-+
-+/ {
-+	model = "ZyXEL NSA310S";
-+	compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x00000000 0x10000000>;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,115200n8 earlyprintk";
-+		stdout-path = &uart0;
-+	};
-+
-+	gpio_poweroff {
-+		compatible = "gpio-poweroff";
-+		pinctrl-0 = <&pmx_pwr_off>;
-+		pinctrl-names = "default";
-+		gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	keys {
-+		compatible = "gpio-keys";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		pinctrl-0 = <&pmx_buttons>;
-+		pinctrl-names = "default";
-+
-+		power {
-+			label = "Power Button";
-+			linux,code = <KEY_POWER>;
-+			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		copy {
-+			label = "Copy Button";
-+			linux,code = <KEY_COPY>;
-+			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		reset {
-+			label = "Reset Button";
-+			linux,code = <KEY_RESTART>;
-+			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-0 = <&pmx_leds>;
-+		pinctrl-names = "default";
-+
-+		led-1 {
-+			function = LED_FUNCTION_DISK_ERR;
-+			color = <LED_COLOR_ID_RED>;
-+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led-2 {
-+			function = LED_FUNCTION_USB;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "usb-host";
-+		};
-+
-+		led-3 {
-+			function = LED_FUNCTION_DISK;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "ata1";
-+		};
-+
-+		led-4 {
-+			function = LED_FUNCTION_INDICATOR;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led-5 {
-+			function = LED_FUNCTION_INDICATOR;
-+			color = <LED_COLOR_ID_RED>;
-+			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led-6 {
-+			function = LED_FUNCTION_STATUS;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "default-on";
-+		};
-+
-+		led-7 {
-+			function = LED_FUNCTION_STATUS;
-+			color = <LED_COLOR_ID_RED>;
-+			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+
-+	usb0_power: regulator@1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "USB Power";
-+
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+		gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	sata1_power: regulator@2 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "SATA1 Power";
-+
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+		gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	thermal-zones {
-+		disk-thermal {
-+			polling-delay = <20000>;
-+			polling-delay-passive = <2000>;
-+
-+			thermal-sensors = <&hdd_temp>;
-+
-+			trips {
-+				disk_alert: disk-alert {
-+					temperature = <40000>;
-+					hysteresis = <5000>;
-+					type = "active";
-+				};
-+				disk_crit: disk-crit {
-+					temperature = <60000>;
-+					hysteresis = <2000>;
-+					type = "critical";
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+
-+&eth0 {
-+	status = "okay";
-+
-+	ethernet0-port@0 {
-+		phy-handle = <&ethphy0>;
-+	};
-+};
-+
-+&i2c0 {
-+	status = "okay";
-+
-+	rtc@68 {
-+		compatible = "htk,ht1382";
-+		reg = <0x68>;
-+	};
-+};
-+
-+&mdio {
-+	status = "okay";
-+
-+	ethphy0: ethernet-phy@1 {
-+		reg = <1>;
-+		phy-mode = "rgmii-id";
-+		marvell,reg-init = <0x1 0x16 0x0 0x3>,
-+				   <0x1 0x10 0x0 0x1017>,
-+				   <0x1 0x11 0x0 0x4408>,
-+				   <0x1 0x16 0x0 0x0>;
-+	};
-+};
-+
-+&nand {
-+	status = "okay";
-+	chip-delay = <35>;
-+
-+	partition@0 {
-+		label = "uboot";
-+		reg = <0x0000000 0x00c0000>;
-+		read-only;
-+	};
-+	partition@c0000 {
-+		label = "uboot_env";
-+		reg = <0x00c0000 0x0080000>;
-+	};
-+	partition@140000 {
-+		label = "ubi";
-+		reg = <0x0140000 0x7ec0000>;
-+	};
-+};
-+
-+&pciec {
-+	status = "okay";
-+};
-+
-+&pcie0 {
-+	status = "okay";
-+};
-+
-+&pinctrl {
-+	pinctrl-names = "default";
-+
-+	pmx_buttons: pmx-buttons {
-+		marvell,pins = "mpp24", "mpp25", "mpp26";
-+		marvell,function = "gpio";
-+	};
-+
-+	pmx_leds: pmx-leds {
-+		marvell,pins = "mpp13", "mpp15", "mpp16", "mpp22", "mpp23",
-+						"mpp28", "mpp29";
-+		marvell,function = "gpio";
-+	};
-+
-+	pmx_power: pmx-power {
-+		marvell,pins = "mpp21", "mpp33";
-+		marvell,function = "gpio";
-+	};
-+
-+	pmx_pwr_off: pmx-pwr-off {
-+		marvell,pins = "mpp27";
-+		marvell,function = "gpio";
-+	};
-+};
-+
-+&rtc {
-+	status = "disabled";
-+};
-+
-+&sata {
-+	status = "okay";
-+	nr-ports = <1>;
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	hdd_temp: sata-port@0 {
-+		reg = <0>;
-+		#thermal-sensor-cells = <0>;
-+	};
-+};
-+
-+&uart0 {
-+	status = "okay";
-+};
diff --git a/target/linux/kirkwood/patches-6.1/003-6.5-ARM-dts-kirkwood-Add-Endian-4i-Edge-200-board.patch b/target/linux/kirkwood/patches-6.1/003-6.5-ARM-dts-kirkwood-Add-Endian-4i-Edge-200-board.patch
deleted file mode 100644
index cde281526b..0000000000
--- a/target/linux/kirkwood/patches-6.1/003-6.5-ARM-dts-kirkwood-Add-Endian-4i-Edge-200-board.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From 5668d088ee4ea05db9daaae0645d1d1f579b20f9 Mon Sep 17 00:00:00 2001
-From: Pawel Dembicki <paweldembicki@gmail.com>
-Date: Mon, 3 Oct 2022 09:34:43 +0200
-Subject: ARM: dts: kirkwood: Add Endian 4i Edge 200 board
-
-Add Endian 4i Edge 200 is 5-port firewall.
-It have also clone: Endian UTM Mini (The same hardware, with added WLAN
-card).
-
-Hardware:
-  - SoC: Marvell 88F6281-A1 ARMv5TE Processor 1.2GHz
-  - Ram: 512MB (4x Nanya NT5TU128M8GE-AC)
-  - NAND Flash: 512MB (Micron 29F4G08AAC)
-  - Lan 1-4: 4x GBE (Marvell 88E6171R-TFJ2)
-  - Lan 5: 1x GBE (Marvell 88E1116R-NNC1)
-  - Storage: MicroSD Slot
-  - MCPIE: MiniPCIe Slot present [fitted with SparkLan WPEA-110N/E
-          (Atheros AR9280 chipset) in Endian UTM Mini WLAN only]
-  - USB: 1x USB 2.0 port
-  - Console: RJ-45 port
-  - LEDs: 3x GPIO controlled
-
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
----
- arch/arm/boot/dts/Makefile                 |   1 +
- arch/arm/boot/dts/kirkwood-4i-edge-200.dts | 205 +++++++++++++++++++++++++++++
- 2 files changed, 206 insertions(+)
- create mode 100644 arch/arm/boot/dts/kirkwood-4i-edge-200.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -300,6 +300,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
- 	keystone-k2g-evm.dtb \
- 	keystone-k2g-ice.dtb
- dtb-$(CONFIG_MACH_KIRKWOOD) += \
-+	kirkwood-4i-edge-200.dtb \
- 	kirkwood-b3.dtb \
- 	kirkwood-blackarmor-nas220.dtb \
- 	kirkwood-c200-v1.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
-@@ -0,0 +1,205 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Endian 4i Edge 200 Board Description
-+ * Note: Endian UTM Mini is hardware clone of Endian Edge 200
-+ * Copyright 2021-2022 Pawel Dembicki <paweldembicki@gmail.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "kirkwood.dtsi"
-+#include "kirkwood-6281.dtsi"
-+#include <dt-bindings/leds/common.h>
-+
-+/ {
-+	model = "Endian 4i Edge 200";
-+	compatible = "endian,4i-edge-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x00000000 0x20000000>;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,115200n8";
-+		stdout-path = &uart0;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		pinctrl-0 = <&pmx_led>;
-+		pinctrl-names = "default";
-+
-+		led-1 {
-+			function = LED_FUNCTION_SD;
-+			color = <LED_COLOR_ID_AMBER>;
-+			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "mmc0";
-+		};
-+
-+		led-2 {
-+			function = LED_FUNCTION_STATUS;
-+			color = <LED_COLOR_ID_AMBER>;
-+			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led-3 {
-+			function = LED_FUNCTION_STATUS;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&eth0 {
-+	status = "okay";
-+};
-+
-+&eth0port {
-+	speed = <1000>;
-+	duplex = <1>;
-+};
-+
-+&eth1 {
-+	status = "okay";
-+};
-+
-+&eth1port {
-+	phy-handle = <&ethphyb>;
-+};
-+
-+&mdio {
-+	status = "okay";
-+
-+	ethphyb: ethernet-phy@b {
-+		reg = <0x0b>;
-+
-+		marvell,reg-init =
-+			/* link-activity, bi-color mode 4 */
-+			<3 0x10 0xfff0 0xf>; /* Reg 3,16 <- 0xzzzf */
-+	};
-+
-+	switch0: switch@11 {
-+		compatible = "marvell,mv88e6085";
-+		reg = <0x11>;
-+
-+		ports {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			port@0 {
-+				reg = <0>;
-+				label = "port1";
-+			};
-+
-+			port@1 {
-+				reg = <1>;
-+				label = "port2";
-+			};
-+
-+			port@2 {
-+				reg = <2>;
-+				label = "port3";
-+			};
-+
-+			port@3 {
-+				reg = <3>;
-+				label = "port4";
-+			};
-+
-+			port@5 {
-+				reg = <5>;
-+				phy-mode = "rgmii-id";
-+				ethernet = <&eth0port>;
-+
-+				fixed-link {
-+					speed = <1000>;
-+					full-duplex;
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&nand {
-+	status = "okay";
-+	pinctrl-0 = <&pmx_nand>;
-+	pinctrl-names = "default";
-+
-+	partition@0 {
-+		label = "u-boot";
-+		reg = <0x00000000 0x000a0000>;
-+		read-only;
-+	};
-+
-+	partition@a0000 {
-+		label = "u-boot-env";
-+		reg = <0x000a0000 0x00060000>;
-+		read-only;
-+	};
-+
-+	partition@100000 {
-+		label = "kernel";
-+		reg = <0x00100000 0x00400000>;
-+	};
-+
-+	partition@500000 {
-+		label = "ubi";
-+		reg = <0x00500000 0x1fb00000>;
-+	};
-+};
-+
-+&pciec {
-+	status = "okay";
-+};
-+
-+&pcie0 {
-+	status = "okay";
-+};
-+
-+&pinctrl {
-+	pinctrl-0 = <&pmx_sysrst>;
-+	pinctrl-names = "default";
-+
-+	pmx_sysrst: pmx-sysrst {
-+		marvell,pins = "mpp6";
-+		marvell,function = "sysrst";
-+	};
-+
-+	pmx_sdio_cd: pmx-sdio-cd {
-+		marvell,pins = "mpp28";
-+		marvell,function = "gpio";
-+	};
-+
-+	pmx_led: pmx-led {
-+		marvell,pins = "mpp34", "mpp35", "mpp49";
-+		marvell,function = "gpio";
-+	};
-+};
-+
-+&rtc {
-+	status = "okay";
-+};
-+
-+&sata_phy0 {
-+	status = "disabled";
-+};
-+
-+&sata_phy1 {
-+	status = "disabled";
-+};
-+
-+&sdio {
-+	pinctrl-0 = <&pmx_sdio_cd>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+	cd-gpios = <&gpio0 28 9>;
-+};
-+
-+&uart0 {
-+	status = "okay";
-+};
-+
-+&usb0 {
-+	status = "okay";
-+};
diff --git a/target/linux/kirkwood/patches-6.1/004-6.4-ARM-dts-kirkwood-Add-missing-phy-mode-and-fixed-link.patch b/target/linux/kirkwood/patches-6.1/004-6.4-ARM-dts-kirkwood-Add-missing-phy-mode-and-fixed-link.patch
deleted file mode 100644
index fd7adc3584..0000000000
--- a/target/linux/kirkwood/patches-6.1/004-6.4-ARM-dts-kirkwood-Add-missing-phy-mode-and-fixed-link.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 8aea8659a5f3ae8dc63c9f632ce1f676a1483556 Mon Sep 17 00:00:00 2001
-From: Andrew Lunn <andrew@lunn.ch>
-Date: Fri, 7 Apr 2023 17:17:20 +0200
-Subject: [PATCH] ARM: dts: kirkwood: Add missing phy-mode and fixed links
-
-The DSA framework has got more picky about always having a phy-mode
-for the CPU port. The Kirkwood Ethernet is an RGMII port. Set the
-switch to impose the RGMII delays.
-
-Additionally, the cpu label has never actually been used in the
-binding, so remove it.
-
-Signed-off-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
----
- arch/arm/boot/dts/kirkwood-dir665.dts          | 3 ++-
- arch/arm/boot/dts/kirkwood-l-50.dts            | 2 +-
- arch/arm/boot/dts/kirkwood-linksys-viper.dts   | 3 ++-
- arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 3 ++-
- arch/arm/boot/dts/kirkwood-rd88f6281.dtsi      | 2 +-
- 5 files changed, 8 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/kirkwood-dir665.dts
-+++ b/arch/arm/boot/dts/kirkwood-dir665.dts
-@@ -232,7 +232,7 @@
- 
- 			port@6 {
- 				reg = <6>;
--				label = "cpu";
-+				phy-mode = "rgmii-id";
- 				ethernet = <&eth0port>;
- 				fixed-link {
- 					speed = <1000>;
-@@ -251,6 +251,7 @@
- 	ethernet0-port@0 {
- 		speed = <1000>;
- 		duplex = <1>;
-+		phy-mode = "rgmii";
- 	};
- };
- 
---- a/arch/arm/boot/dts/kirkwood-l-50.dts
-+++ b/arch/arm/boot/dts/kirkwood-l-50.dts
-@@ -254,7 +254,6 @@
- 
- 			port@6 {
- 				reg = <6>;
--				label = "cpu";
- 				phy-mode = "rgmii-id";
- 				ethernet = <&eth1port>;
- 				fixed-link {
-@@ -330,6 +329,7 @@
- 	ethernet1-port@0 {
- 		speed = <1000>;
- 		duplex = <1>;
-+		phy-mode = "rgmii";
- 	};
- };
- 
---- a/arch/arm/boot/dts/kirkwood-linksys-viper.dts
-+++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
-@@ -198,7 +198,7 @@
- 
- 			port@5 {
- 				reg = <5>;
--				label = "cpu";
-+				phy-mode = "rgmii-id";
- 				ethernet = <&eth0port>;
- 				fixed-link {
- 					speed = <1000>;
-@@ -221,6 +221,7 @@
- 	ethernet0-port@0 {
- 		speed = <1000>;
- 		duplex = <1>;
-+		phy-mode = "rgmii";
- 	};
- };
- 
---- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
-+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
-@@ -149,7 +149,7 @@
- 
- 			port@5 {
- 				reg = <5>;
--				label = "cpu";
-+				phy-mode = "rgmii-id";
- 				ethernet = <&eth0port>;
- 				fixed-link {
- 					speed = <1000>;
-@@ -166,6 +166,7 @@
- 	ethernet0-port@0 {
- 		speed = <1000>;
- 		duplex = <1>;
-+		phy-mode = "rgmii";
- 	};
- };
- 
---- a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
-+++ b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
-@@ -105,7 +105,7 @@
- 
- 			port@5 {
- 				reg = <5>;
--				label = "cpu";
-+				phy-mode = "rgmii-id";
- 				ethernet = <&eth0port>;
- 				fixed-link {
- 					speed = <1000>;
diff --git a/target/linux/kirkwood/patches-6.1/100-ib62x0.patch b/target/linux/kirkwood/patches-6.1/100-ib62x0.patch
deleted file mode 100644
index 0637c24b63..0000000000
--- a/target/linux/kirkwood/patches-6.1/100-ib62x0.patch
+++ /dev/null
@@ -1,53 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
-+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
-@@ -6,7 +6,14 @@
- 
- / {
- 	model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
--	compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-+	compatible = "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-+
-+	aliases {
-+		led-boot = &led_green_os;
-+		led-failsafe = &led_red_os;
-+		led-running = &led_green_os;
-+		led-upgrade = &led_red_os;
-+	};
- 
- 	memory {
- 		device_type = "memory";
-@@ -81,12 +88,12 @@
- 			     &pmx_led_usb_transfer>;
- 		pinctrl-names = "default";
- 
--		green-os {
-+		led_green_os: green-os {
- 			label = "ib62x0:green:os";
- 			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
--		red-os {
-+		led_red_os: red-os {
- 			label = "ib62x0:red:os";
- 			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
- 		};
-@@ -118,13 +125,13 @@
- 	};
- 
- 	partition@100000 {
--		label = "uImage";
--		reg = <0x0100000 0x600000>;
-+		label = "second stage u-boot";
-+		reg = <0x100000 0x200000>;
- 	};
- 
--	partition@700000 {
--		label = "root";
--		reg = <0x0700000 0xf900000>;
-+	partition@200000 {
-+		label = "ubi";
-+		reg = <0x200000 0xfe00000>;
- 	};
- 
- };
diff --git a/target/linux/kirkwood/patches-6.1/101-iconnect.patch b/target/linux/kirkwood/patches-6.1/101-iconnect.patch
deleted file mode 100644
index 935e2dfcf5..0000000000
--- a/target/linux/kirkwood/patches-6.1/101-iconnect.patch
+++ /dev/null
@@ -1,80 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-iconnect.dts
-+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
-@@ -8,6 +8,13 @@
- 	model = "Iomega Iconnect";
- 	compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_power_blue;
-+		led-failsafe = &led_power_red;
-+		led-running = &led_power_blue;
-+		led-upgrade = &led_power_red;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x10000000>;
-@@ -16,8 +23,6 @@
- 	chosen {
- 		bootargs = "console=ttyS0,115200n8 earlyprintk";
- 		stdout-path = &uart0;
--		linux,initrd-start = <0x4500040>;
--		linux,initrd-end   = <0x4800000>;
- 	};
- 
- 	ocp@f1000000 {
-@@ -89,12 +94,12 @@
- 			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- 			default-state = "on";
- 		};
--		power-blue {
-+		led_power_blue: power-blue {
- 			label = "power:blue";
- 			gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
--		power-red {
-+		led_power_red: power-red {
- 			label = "power:red";
- 			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
- 		};
-@@ -146,28 +151,23 @@
- 	status = "okay";
- 
- 	partition@0 {
--		label = "uboot";
--		reg = <0x0000000 0xc0000>;
-+		label = "u-boot";
-+		reg = <0x0000000 0xe0000>;
- 	};
- 
--	partition@a0000 {
--		label = "env";
--		reg = <0xa0000 0x20000>;
-+	partition@e0000 {
-+		label = "u-boot environment";
-+		reg = <0xe0000 0x100000>;
- 	};
- 
- 	partition@100000 {
--		label = "zImage";
--		reg = <0x100000 0x300000>;
--	};
--
--	partition@540000 {
--		label = "initrd";
--		reg = <0x540000 0x300000>;
-+		label = "second stage u-boot";
-+		reg = <0x100000 0x200000>;
- 	};
- 
--	partition@980000 {
--		label = "boot";
--		reg = <0x980000 0x1f400000>;
-+	partition@200000 {
-+		label = "ubi";
-+		reg = <0x200000 0x1fe00000>;
- 	};
- };
- 
diff --git a/target/linux/kirkwood/patches-6.1/102-dockstar.patch b/target/linux/kirkwood/patches-6.1/102-dockstar.patch
deleted file mode 100644
index 127f84962c..0000000000
--- a/target/linux/kirkwood/patches-6.1/102-dockstar.patch
+++ /dev/null
@@ -1,62 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-dockstar.dts
-+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
-@@ -8,6 +8,13 @@
- 	model = "Seagate FreeAgent Dockstar";
- 	compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_health;
-+		led-failsafe = &led_fault;
-+		led-running = &led_health;
-+		led-upgrade = &led_fault;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x8000000>;
-@@ -42,12 +49,12 @@
- 		pinctrl-0 = <&pmx_led_green &pmx_led_orange>;
- 		pinctrl-names = "default";
- 
--		health {
-+		led_health: health {
- 			label = "status:green:health";
- 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
--		fault {
-+		led_fault: fault {
- 			label = "status:orange:fault";
- 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- 		};
-@@ -78,18 +85,22 @@
- 
- 	partition@0 {
- 		label = "u-boot";
--		reg = <0x0000000 0x100000>;
--		read-only;
-+		reg = <0x0000000 0xe0000>;
-+	};
-+
-+	partition@e0000 {
-+		label = "u-boot environment";
-+		reg = <0xe0000 0x100000>;
- 	};
- 
- 	partition@100000 {
--		label = "uImage";
--		reg = <0x0100000 0x400000>;
-+		label = "second stage u-boot";
-+		reg = <0x100000 0x200000>;
- 	};
- 
--	partition@500000 {
--		label = "data";
--		reg = <0x0500000 0xfb00000>;
-+	partition@200000 {
-+		label = "ubi";
-+		reg = <0x200000 0xfe00000>;
- 	};
- };
- 
diff --git a/target/linux/kirkwood/patches-6.1/103-iomega-ix2-200.patch b/target/linux/kirkwood/patches-6.1/103-iomega-ix2-200.patch
deleted file mode 100644
index db04c09f76..0000000000
--- a/target/linux/kirkwood/patches-6.1/103-iomega-ix2-200.patch
+++ /dev/null
@@ -1,71 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
-+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
-@@ -8,6 +8,13 @@
- 	model = "Iomega StorCenter ix2-200";
- 	compatible = "iom,ix2-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_power;
-+		led-failsafe = &led_health;
-+		led-running = &led_power;
-+		led-upgrade = &led_health;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x10000000>;
-@@ -127,16 +134,16 @@
- 			      &pmx_led_rebuild &pmx_led_health >;
- 		pinctrl-names = "default";
- 
--		power_led {
-+		led_power: power_led {
- 			label = "status:white:power_led";
- 			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
- 		rebuild_led {
- 			label = "status:white:rebuild_led";
- 			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
- 		};
--		health_led {
-+		led_health: health_led {
- 			label = "status:red:health_led";
- 			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
- 		};
-@@ -186,19 +193,19 @@
- 	};
- 
- 	partition@a0000 {
--		label = "env";
-+		label = "u-boot environment";
- 		reg = <0xa0000 0x20000>;
- 		read-only;
- 	};
- 
- 	partition@100000 {
--		label = "uImage";
--		reg = <0x100000 0x300000>;
-+		label = "kernel";
-+		reg = <0x100000 0x400000>;
- 	};
- 
--	partition@400000 {
--		label = "rootfs";
--		reg = <0x400000 0x1C00000>;
-+	partition@500000 {
-+		label = "ubi";
-+		reg = <0x500000 0x1C00000>;
- 	};
- };
- 
-@@ -211,7 +218,7 @@
- };
- 
- &eth0 {
--	status = "okay";
-+	status = "disabled";
- 	ethernet0-port@0 {
- 		speed = <1000>;
- 		duplex = <1>;
diff --git a/target/linux/kirkwood/patches-6.1/105-linksys-viper-dts.patch b/target/linux/kirkwood/patches-6.1/105-linksys-viper-dts.patch
deleted file mode 100644
index b1604ec92c..0000000000
--- a/target/linux/kirkwood/patches-6.1/105-linksys-viper-dts.patch
+++ /dev/null
@@ -1,59 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-linksys-viper.dts
-+++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
-@@ -24,6 +24,10 @@
- 	};
- 
- 	aliases {
-+		led-boot = &led_white_health;
-+		led-failsafe = &led_white_health;
-+		led-running = &led_white_health;
-+		led-upgrade = &led_white_health;
- 		serial0 = &uart0;
- 	};
- 
-@@ -56,9 +60,10 @@
- 		pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >;
- 		pinctrl-names = "default";
- 
--		white-health {
-+		led_white_health: white-health {
- 			label = "viper:white:health";
- 			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
-+			default-state = "on";
- 		};
- 
- 		white-pulse {
-@@ -114,23 +119,23 @@
- 		};
- 
- 		partition@200000 {
--			label = "kernel";
--			reg = <0x200000 0x2A0000>;
-+			label = "kernel1";
-+			reg = <0x200000 0x1A00000>;
- 		};
- 
--		partition@4a0000 {
--			label = "rootfs";
--			reg = <0x4A0000 0x1760000>;
-+		partition@600000 {
-+			label = "rootfs1";
-+			reg = <0x600000 0x1600000>;
- 		};
- 
- 		partition@1c00000 {
--			label = "alt_kernel";
--			reg = <0x1C00000 0x2A0000>;
-+			label = "kernel2";
-+			reg = <0x1C00000 0x1A00000>;
- 		};
- 
--		partition@1ea0000 {
--			label = "alt_rootfs";
--			reg = <0x1EA0000 0x1760000>;
-+		partition@2000000 {
-+			label = "rootfs2";
-+			reg = <0x2000000 0x1600000>;
- 		};
- 
- 		partition@3600000 {
diff --git a/target/linux/kirkwood/patches-6.1/106-goflexnet.patch b/target/linux/kirkwood/patches-6.1/106-goflexnet.patch
deleted file mode 100644
index 82cf90841e..0000000000
--- a/target/linux/kirkwood/patches-6.1/106-goflexnet.patch
+++ /dev/null
@@ -1,53 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
-+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
-@@ -8,6 +8,13 @@
- 	model = "Seagate GoFlex Net";
- 	compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_health;
-+		led-failsafe = &led_fault;
-+		led-running = &led_health;
-+		led-upgrade = &led_fault;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x8000000>;
-@@ -85,12 +92,12 @@
- 			    >;
- 		pinctrl-names = "default";
- 
--		health {
-+		led_health: health {
- 			label = "status:green:health";
- 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
--		fault {
-+		led_fault: fault {
- 			label = "status:orange:fault";
- 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- 		};
-@@ -159,18 +166,8 @@
- 	};
- 
- 	partition@100000 {
--		label = "uImage";
--		reg = <0x0100000 0x400000>;
--	};
--
--	partition@500000 {
--		label = "pogoplug";
--		reg = <0x0500000 0x2000000>;
--	};
--
--	partition@2500000 {
--		label = "root";
--		reg = <0x02500000 0xd800000>;
-+		label = "ubi";
-+		reg = <0x0100000 0x0ff00000>;
- 	};
- };
- 
diff --git a/target/linux/kirkwood/patches-6.1/107-01-zyxel-nsa3x0-common-nand-partitions.patch b/target/linux/kirkwood/patches-6.1/107-01-zyxel-nsa3x0-common-nand-partitions.patch
deleted file mode 100644
index df654033fd..0000000000
--- a/target/linux/kirkwood/patches-6.1/107-01-zyxel-nsa3x0-common-nand-partitions.patch
+++ /dev/null
@@ -1,48 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
-+++ b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
-@@ -112,40 +112,16 @@
- 
- 	partition@0 {
- 		label = "uboot";
--		reg = <0x0000000 0x0100000>;
-+		reg = <0x0000000 0x00c0000>;
- 		read-only;
- 	};
- 	partition@100000 {
- 		label = "uboot_env";
--		reg = <0x0100000 0x0080000>;
-+		reg = <0x00c0000 0x0080000>;
- 	};
--	partition@180000 {
--		label = "key_store";
--		reg = <0x0180000 0x0080000>;
--	};
--	partition@200000 {
--		label = "info";
--		reg = <0x0200000 0x0080000>;
--	};
--	partition@280000 {
--		label = "etc";
--		reg = <0x0280000 0x0a00000>;
--	};
--	partition@c80000 {
--		label = "kernel_1";
--		reg = <0x0c80000 0x0a00000>;
--	};
--	partition@1680000 {
--		label = "rootfs1";
--		reg = <0x1680000 0x2fc0000>;
--	};
--	partition@4640000 {
--		label = "kernel_2";
--		reg = <0x4640000 0x0a00000>;
--	};
--	partition@5040000 {
--		label = "rootfs2";
--		reg = <0x5040000 0x2fc0000>;
-+	partition@140000 {
-+		label = "ubi";
-+		reg = <0x0140000 0x7ec0000>;
- 	};
- };
- 
diff --git a/target/linux/kirkwood/patches-6.1/107-03-nsa325.patch b/target/linux/kirkwood/patches-6.1/107-03-nsa325.patch
deleted file mode 100644
index 374c0895a9..0000000000
--- a/target/linux/kirkwood/patches-6.1/107-03-nsa325.patch
+++ /dev/null
@@ -1,54 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-nsa325.dts
-+++ b/arch/arm/boot/dts/kirkwood-nsa325.dts
-@@ -15,6 +15,13 @@
- 	model = "ZyXEL NSA325";
- 	compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_green_sys;
-+		led-failsafe = &led_orange_sys;
-+		led-running = &led_green_sys;
-+		led-upgrade = &led_orange_sys;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x20000000>;
-@@ -162,17 +169,19 @@
- 			     &pmx_led_hdd1_green &pmx_led_hdd1_red>;
- 		pinctrl-names = "default";
- 
--		green-sys {
-+		led_green_sys: green-sys {
- 			label = "nsa325:green:sys";
- 			gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-+			default-state = "on";
- 		};
--		orange-sys {
-+		led_orange_sys: orange-sys {
- 			label = "nsa325:orange:sys";
- 			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- 		};
- 		green-hdd1 {
- 			label = "nsa325:green:hdd1";
- 			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "ata1";
- 		};
- 		red-hdd1 {
- 			label = "nsa325:red:hdd1";
-@@ -181,6 +190,7 @@
- 		green-hdd2 {
- 			label = "nsa325:green:hdd2";
- 			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "ata2";
- 		};
- 		red-hdd2 {
- 			label = "nsa325:red:hdd2";
-@@ -189,6 +199,7 @@
- 		green-usb {
- 			label = "nsa325:green:usb";
- 			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "usb-host";
- 		};
- 		green-copy {
- 			label = "nsa325:green:copy";
diff --git a/target/linux/kirkwood/patches-6.1/109-pogoplug_v4.patch b/target/linux/kirkwood/patches-6.1/109-pogoplug_v4.patch
deleted file mode 100644
index 4273eb9af1..0000000000
--- a/target/linux/kirkwood/patches-6.1/109-pogoplug_v4.patch
+++ /dev/null
@@ -1,87 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
-+++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
-@@ -18,12 +18,20 @@
- 	compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
- 		     "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_health;
-+		led-failsafe = &led_fault;
-+		led-running = &led_health;
-+		led-upgrade = &led_fault;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x08000000>;
- 	};
- 
- 	chosen {
-+		bootargs = "console=ttyS0,115200";
- 		stdout-path = "uart0:115200n8";
- 	};
- 
-@@ -37,8 +45,8 @@
- 		eject {
- 			debounce-interval = <50>;
- 			wakeup-source;
--			linux,code = <KEY_EJECTCD>;
--			label = "Eject Button";
-+			linux,code = <KEY_RESTART>;
-+			label = "Reset";
- 			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- 		};
- 	};
-@@ -48,12 +56,12 @@
- 		pinctrl-0 = <&pmx_led_green &pmx_led_red>;
- 		pinctrl-names = "default";
- 
--		health {
-+		led_health: health {
- 			label = "pogoplugv4:green:health";
- 			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- 			default-state = "on";
- 		};
--		fault {
-+		led_fault: fault {
- 			label = "pogoplugv4:red:fault";
- 			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- 		};
-@@ -137,29 +145,19 @@
- 		#size-cells = <1>;
- 
- 		partition@0 {
--			label = "u-boot";
--			reg = <0x00000000 0x200000>;
-+			label = "uboot";
-+			reg = <0x00000000 0x1c0000>;
- 			read-only;
- 		};
- 
--		partition@200000 {
--			label = "uImage";
--			reg = <0x00200000 0x300000>;
--		};
--
--		partition@500000 {
--			label = "uImage2";
--			reg = <0x00500000 0x300000>;
--		};
--
--		partition@800000 {
--			label = "failsafe";
--			reg = <0x00800000 0x800000>;
-+		partition@1c0000 {
-+			label = "uboot_env";
-+			reg = <0x001c0000 0x40000>;
- 		};
- 
--		partition@1000000 {
--			label = "root";
--			reg = <0x01000000 0x7000000>;
-+		partition@200000 {
-+			label = "ubi";
-+			reg = <0x00200000 0x7e00000>;
- 		};
- 	};
- };
diff --git a/target/linux/kirkwood/patches-6.1/110-pogo_e02.patch b/target/linux/kirkwood/patches-6.1/110-pogo_e02.patch
deleted file mode 100644
index fc384d3521..0000000000
--- a/target/linux/kirkwood/patches-6.1/110-pogo_e02.patch
+++ /dev/null
@@ -1,68 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-pogo_e02.dts
-+++ b/arch/arm/boot/dts/kirkwood-pogo_e02.dts
-@@ -20,6 +20,13 @@
- 	compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281",
- 		     "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_health;
-+		led-failsafe = &led_fault;
-+		led-running = &led_health;
-+		led-upgrade = &led_fault;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x10000000>;
-@@ -33,12 +40,12 @@
- 	gpio-leds {
- 		compatible = "gpio-leds";
- 
--		health {
-+		led_health: health {
- 			label = "pogo_e02:green:health";
- 			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
--		fault {
-+		led_fault: fault {
- 			label = "pogo_e02:orange:fault";
- 			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- 		};
-@@ -95,24 +102,24 @@
- 	status = "okay";
- 
- 	partition@0 {
--		label = "u-boot";
--		reg = <0x0000000 0x100000>;
-+		label = "uboot";
-+		reg = <0x0 0xe0000>;
- 		read-only;
- 	};
- 
--	partition@100000 {
--		label = "uImage";
--		reg = <0x0100000 0x400000>;
-+	partition@e0000 {
-+		label = "uboot_env";
-+		reg = <0xe0000 0x20000>;
- 	};
- 
--	partition@500000 {
--		label = "pogoplug";
--		reg = <0x0500000 0x2000000>;
-+	partition@100000 {
-+		label = "second_stage_uboot";
-+		reg = <0x100000 0x100000>;
- 	};
- 
--	partition@2500000 {
--		label = "root";
--		reg = <0x02500000 0x5b00000>;
-+	partition@200000 {
-+		label = "ubi";
-+		reg = <0x200000 0x7e00000>;
- 	};
- };
- 
diff --git a/target/linux/kirkwood/patches-6.1/111-l-50.patch b/target/linux/kirkwood/patches-6.1/111-l-50.patch
deleted file mode 100644
index bc933cb610..0000000000
--- a/target/linux/kirkwood/patches-6.1/111-l-50.patch
+++ /dev/null
@@ -1,47 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-l-50.dts
-+++ b/arch/arm/boot/dts/kirkwood-l-50.dts
-@@ -18,6 +18,13 @@
- 		reg = <0x00000000 0x20000000>;
- 	};
- 
-+	aliases {
-+		led-boot = &led_status_green;
-+		led-failsafe = &led_status_red;
-+		led-running = &led_status_green;
-+		led-upgrade = &led_status_red;
-+	};
-+
- 	chosen {
- 		bootargs = "console=ttyS0,115200n8";
- 		stdout-path = &uart0;
-@@ -95,12 +102,12 @@
- 	leds {
- 		compatible = "gpio-leds";
- 
--		status_green {
-+		led_status_green: status_green {
- 			label = "l-50:green:status";
- 			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- 		};
- 
--		status_red {
-+		led_status_red: status_red {
- 			label = "l-50:red:status";
- 			gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
- 		};
-@@ -349,13 +356,8 @@
- 	};
- 
- 	partition@100000 {
--		label = "kernel-1";
--		reg = <0x00100000 0x00800000>;
--	};
--
--	partition@900000 {
--		label = "rootfs-1";
--		reg = <0x00900000 0x07100000>;
-+		label = "ubi";
-+		reg = <0x00100000 0x07900000>;
- 	};
- 
- 	partition@7a00000 {
diff --git a/target/linux/kirkwood/patches-6.1/112-sheevaplug.patch b/target/linux/kirkwood/patches-6.1/112-sheevaplug.patch
deleted file mode 100644
index d1ff9884a0..0000000000
--- a/target/linux/kirkwood/patches-6.1/112-sheevaplug.patch
+++ /dev/null
@@ -1,47 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
-+++ b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
-@@ -78,13 +78,8 @@
- 	};
- 
- 	partition@100000 {
--		label = "uImage";
--		reg = <0x0100000 0x400000>;
--	};
--
--	partition@500000 {
--		label = "root";
--		reg = <0x0500000 0x1fb00000>;
-+		label = "ubi";
-+		reg = <0x0100000 0x1ff00000>;
- 	};
- };
- 
---- a/arch/arm/boot/dts/kirkwood-sheevaplug.dts
-+++ b/arch/arm/boot/dts/kirkwood-sheevaplug.dts
-@@ -13,6 +13,13 @@
- 	model = "Globalscale Technologies SheevaPlug";
- 	compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_health;
-+		led-failsafe = &led_health;
-+		led-running = &led_health;
-+		led-upgrade = &led_health;
-+	};
-+
- 	ocp@f1000000 {
- 		mvsdio@90000 {
- 			pinctrl-0 = <&pmx_sdio>;
-@@ -28,10 +35,10 @@
- 		pinctrl-0 = <&pmx_led_blue &pmx_led_red>;
- 		pinctrl-names = "default";
- 
--		health {
-+		led_health: health {
- 			label = "sheevaplug:blue:health";
- 			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
--			default-state = "keep";
-+			default-state = "on";
- 		};
- 
- 		misc {
diff --git a/target/linux/kirkwood/patches-6.1/113-readynas_duo_v2.patch b/target/linux/kirkwood/patches-6.1/113-readynas_duo_v2.patch
deleted file mode 100644
index c6452c55a3..0000000000
--- a/target/linux/kirkwood/patches-6.1/113-readynas_duo_v2.patch
+++ /dev/null
@@ -1,76 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
-+++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
-@@ -19,6 +19,13 @@
- 		reg = <0x00000000 0x10000000>;
- 	};
- 
-+	aliases {
-+		led-boot = &led_power;
-+		led-failsafe = &led_power;
-+		led-running = &led_power;
-+		led-upgrade = &led_power;
-+	};
-+
- 	chosen {
- 		bootargs = "console=ttyS0,115200n8 earlyprintk";
- 		stdout-path = &uart0;
-@@ -115,7 +122,7 @@
- 			      &pmx_led_blue_backup >;
- 		pinctrl-names = "default";
- 
--		power_led {
-+		led_power: power_led {
- 			label = "status:blue:power_led";
- 			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
- 			default-state = "keep";
-@@ -129,11 +136,13 @@
- 		disk1_led {
- 			label = "status:blue:disk1_led";
- 			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "ata1";
- 		};
- 
- 		disk2_led {
- 			label = "status:blue:disk2_led";
- 			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "ata2";
- 		};
- 
- 		backup_led {
-@@ -150,7 +159,13 @@
- 
- 		power-button {
- 			label = "Power Button";
--			linux,code = <KEY_POWER>;
-+			/* Power button and INT pin from PHY are both connected
-+			 * to this GPIO. Every network restart causes PHY restart
-+			 * and button is pressed. It's difficult to use it as
-+			 * KEY_POWER without changes in kernel (or netifd) so
-+			 * the button is configured as regular one.
-+			 */
-+			linux,code = <BTN_1>;
- 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- 		};
- 
-@@ -208,18 +223,13 @@
- 	};
- 
- 	partition@200000 {
--		label = "uImage";
-+		label = "kernel";
- 		reg = <0x0200000 0x600000>;
- 	};
- 
- 	partition@800000 {
--		label = "minirootfs";
--		reg = <0x0800000 0x1000000>;
--	};
--
--	partition@1800000 {
--		label = "jffs2";
--		reg = <0x1800000 0x6800000>;
-+		label = "ubi";
-+		reg = <0x0800000 0x7800000>;
- 	};
- };
- 
diff --git a/target/linux/kirkwood/patches-6.1/114-ctera-c-200-v1.patch b/target/linux/kirkwood/patches-6.1/114-ctera-c-200-v1.patch
deleted file mode 100644
index eb62e1a5ed..0000000000
--- a/target/linux/kirkwood/patches-6.1/114-ctera-c-200-v1.patch
+++ /dev/null
@@ -1,58 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-c200-v1.dts
-+++ b/arch/arm/boot/dts/kirkwood-c200-v1.dts
-@@ -14,6 +14,14 @@
- 	model = "Ctera C200 V1";
- 	compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood";
- 
-+
-+	aliases {
-+		led-boot = &led_status_green;
-+		led-failsafe = &led_status_red;
-+		led-running = &led_status_green;
-+		led-upgrade = &led_status_red;
-+	};
-+
- 	chosen {
- 		bootargs = "console=ttyS0,115200";
- 		stdout-path = &uart0;
-@@ -78,6 +86,7 @@
- 			function-enumerator = <1>;
- 			color = <LED_COLOR_ID_GREEN>;
- 			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "ata1";
- 		};
- 
- 		led-2 {
-@@ -85,6 +94,7 @@
- 			function-enumerator = <2>;
- 			color = <LED_COLOR_ID_GREEN>;
- 			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "ata2";
- 		};
- 
- 		led-3 {
-@@ -94,13 +104,13 @@
- 			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
- 		};
- 
--		led-4 {
-+		led_status_red: led-4 {
- 			function = LED_FUNCTION_STATUS;
- 			color = <LED_COLOR_ID_RED>;
- 			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- 		};
- 
--		led-5 {
-+		led_status_green: led-5 {
- 			function = LED_FUNCTION_STATUS;
- 			color = <LED_COLOR_ID_GREEN>;
- 			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
-@@ -240,7 +250,7 @@
- 	};
- 
- 	partition@7a00000 {
--		label = "rootfs";
-+		label = "ubi";
- 		reg = <0x7a00000 0x8600000>;
- 	};
- };
diff --git a/target/linux/kirkwood/patches-6.1/115-nsa310s.patch b/target/linux/kirkwood/patches-6.1/115-nsa310s.patch
deleted file mode 100644
index 4c6e08f49c..0000000000
--- a/target/linux/kirkwood/patches-6.1/115-nsa310s.patch
+++ /dev/null
@@ -1,35 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-nsa310s.dts
-+++ b/arch/arm/boot/dts/kirkwood-nsa310s.dts
-@@ -16,6 +16,13 @@
- 	model = "ZyXEL NSA310S";
- 	compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_green_sys;
-+		led-failsafe = &led_red_sys;
-+		led-running = &led_green_sys;
-+		led-upgrade = &led_red_sys;
-+	};
-+
- 	memory {
- 		device_type = "memory";
- 		reg = <0x00000000 0x10000000>;
-@@ -96,14 +103,16 @@
- 			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
- 		};
- 
--		led-6 {
-+		led_green_sys: led-6 {
-+			label = "nsa310s:green:sys";
- 			function = LED_FUNCTION_STATUS;
- 			color = <LED_COLOR_ID_GREEN>;
- 			gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- 			linux,default-trigger = "default-on";
- 		};
- 
--		led-7 {
-+		led_red_sys: led-7 {
-+			label = "nsa310s:red:sys";
- 			function = LED_FUNCTION_STATUS;
- 			color = <LED_COLOR_ID_RED>;
- 			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
diff --git a/target/linux/kirkwood/patches-6.1/116-4i-edge-200.patch b/target/linux/kirkwood/patches-6.1/116-4i-edge-200.patch
deleted file mode 100644
index ffc46c29dc..0000000000
--- a/target/linux/kirkwood/patches-6.1/116-4i-edge-200.patch
+++ /dev/null
@@ -1,34 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
-+++ b/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
-@@ -20,6 +20,13 @@
- 		reg = <0x00000000 0x20000000>;
- 	};
- 
-+	aliases {
-+		led-boot = &led_status_green;
-+		led-failsafe = &led_status_orange;
-+		led-running = &led_status_green;
-+		led-upgrade = &led_status_orange;
-+	};
-+
- 	chosen {
- 		bootargs = "console=ttyS0,115200n8";
- 		stdout-path = &uart0;
-@@ -37,13 +44,15 @@
- 			linux,default-trigger = "mmc0";
- 		};
- 
--		led-2 {
-+		led_status_orange: led-2 {
-+			label = "orange:status";
- 			function = LED_FUNCTION_STATUS;
- 			color = <LED_COLOR_ID_AMBER>;
- 			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
- 		};
- 
--		led-3 {
-+		led_status_green: led-3 {
-+			label = "green:status";
- 			function = LED_FUNCTION_STATUS;
- 			color = <LED_COLOR_ID_GREEN>;
- 			gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
diff --git a/target/linux/kirkwood/patches-6.1/117-netgear_stora.patch b/target/linux/kirkwood/patches-6.1/117-netgear_stora.patch
deleted file mode 100644
index c7518933b2..0000000000
--- a/target/linux/kirkwood/patches-6.1/117-netgear_stora.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -375,6 +375,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
- 	kirkwood-rs411.dtb \
- 	kirkwood-sheevaplug.dtb \
- 	kirkwood-sheevaplug-esata.dtb \
-+	kirkwood-stora.dtb \
- 	kirkwood-t5325.dtb \
- 	kirkwood-topkick.dtb \
- 	kirkwood-ts219-6281.dtb \
diff --git a/target/linux/kirkwood/patches-6.1/118-dns-320l.patch b/target/linux/kirkwood/patches-6.1/118-dns-320l.patch
deleted file mode 100644
index d6c84e2c59..0000000000
--- a/target/linux/kirkwood/patches-6.1/118-dns-320l.patch
+++ /dev/null
@@ -1,35 +0,0 @@
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -310,6 +310,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
- 	kirkwood-db-88f6282.dtb \
- 	kirkwood-dir665.dtb \
- 	kirkwood-dns320.dtb \
-+	kirkwood-dns320l.dtb \
- 	kirkwood-dns325.dtb \
- 	kirkwood-dockstar.dtb \
- 	kirkwood-dreamplug.dtb \
---- a/arch/arm/boot/dts/kirkwood-dns320l.dts
-+++ b/arch/arm/boot/dts/kirkwood-dns320l.dts
-@@ -32,6 +32,13 @@
- 		reg = <0x00000000 0x10000000>;
- 	};
- 
-+	aliases {
-+		led-boot = &led_orange_usb;
-+		led-failsafe = &led_orange_usb;
-+		led-running = &led_orange_usb;
-+		led-upgrade = &led_orange_usb;
-+	};
-+
- 	chosen {
- 		bootargs = "console=ttyS0,115200n8 earlyprintk";
- 		stdout-path = &uart0;
-@@ -68,7 +75,7 @@
- 			linux,default-trigger = "usbport";
- 		};
- 
--		orange-usb {
-+		led_orange_usb: orange-usb {
- 			label = "dns320l:usb:orange";
- 			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
- 		};
diff --git a/target/linux/kirkwood/patches-6.1/201-enable-sata-port-specific-led-triggers.patch b/target/linux/kirkwood/patches-6.1/201-enable-sata-port-specific-led-triggers.patch
deleted file mode 100644
index 3db362de9f..0000000000
--- a/target/linux/kirkwood/patches-6.1/201-enable-sata-port-specific-led-triggers.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/arch/arm/mach-mvebu/Kconfig
-+++ b/arch/arm/mach-mvebu/Kconfig
-@@ -115,6 +115,7 @@ config MACH_DOVE
- config MACH_KIRKWOOD
- 	bool "Marvell Kirkwood boards"
- 	depends on ARCH_MULTI_V5
-+	select ARCH_WANT_LIBATA_LEDS
- 	select CPU_FEROCEON
- 	select GPIOLIB
- 	select KIRKWOOD_CLK
diff --git a/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch b/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch
deleted file mode 100644
index 5029b1791c..0000000000
--- a/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-The WRT1900AC among other Linksys routers uses a dual-firmware layout.
-Dynamically rename the active partition to "ubi".
-
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
----
---- a/drivers/mtd/parsers/ofpart_core.c
-+++ b/drivers/mtd/parsers/ofpart_core.c
-@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d
- 	return of_get_property(pp, "compatible", NULL);
- }
- 
-+static int mangled_rootblock;
-+
- static int parse_fixed_partitions(struct mtd_info *master,
- 				  const struct mtd_partition **pparts,
- 				  struct mtd_part_parser_data *data)
-@@ -47,6 +49,7 @@ static int parse_fixed_partitions(struct
- 	struct mtd_partition *parts;
- 	struct device_node *mtd_node;
- 	struct device_node *ofpart_node;
-+	const char *owrtpart = "ubi";
- 	const char *partname;
- 	struct device_node *pp;
- 	int nr_parts, i, ret = 0;
-@@ -152,9 +155,15 @@ static int parse_fixed_partitions(struct
- 		parts[i].size = of_read_number(reg + a_cells, s_cells);
- 		parts[i].of_node = pp;
- 
--		partname = of_get_property(pp, "label", &len);
--		if (!partname)
--			partname = of_get_property(pp, "name", &len);
-+		if (mangled_rootblock && (i == mangled_rootblock)) {
-+			partname = owrtpart;
-+		} else {
-+			partname = of_get_property(pp, "label", &len);
-+
-+			if (!partname)
-+				partname = of_get_property(pp, "name", &len);
-+		}
-+
- 		parts[i].name = partname;
- 
- 		if (of_get_property(pp, "read-only", &len))
-@@ -271,6 +280,18 @@ static int __init ofpart_parser_init(voi
- 	return 0;
- }
- 
-+static int __init active_root(char *str)
-+{
-+	get_option(&str, &mangled_rootblock);
-+
-+	if (!mangled_rootblock)
-+		return 1;
-+
-+	return 1;
-+}
-+
-+__setup("mangled_rootblock=", active_root);
-+
- static void __exit ofpart_parser_exit(void)
- {
- 	deregister_mtd_parser(&ofpart_parser);
diff --git a/target/linux/kirkwood/patches-6.1/203-blackarmor-nas220.patch b/target/linux/kirkwood/patches-6.1/203-blackarmor-nas220.patch
deleted file mode 100644
index e04a28206a..0000000000
--- a/target/linux/kirkwood/patches-6.1/203-blackarmor-nas220.patch
+++ /dev/null
@@ -1,99 +0,0 @@
---- a/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts
-+++ b/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts
-@@ -17,6 +17,13 @@
- 	compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
- 		     "marvell,kirkwood";
- 
-+	aliases {
-+		led-boot = &led_status_amber;
-+		led-failsafe = &led_status_amber;
-+		led-running = &led_status_blue;
-+		led-upgrade = &led_status_amber;
-+	};
-+
- 	memory { /* 128 MB */
- 		device_type = "memory";
- 		reg = <0x00000000 0x8000000>;
-@@ -36,14 +43,14 @@
- 		compatible = "gpio-keys";
- 
- 		reset {
--			label = "Reset";
--			linux,code = <KEY_POWER>;
-+			label = "Reset Button";
-+			linux,code = <KEY_RESTART>;
- 			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- 		};
- 
--		button {
--			label = "Power";
--			linux,code = <KEY_SLEEP>;
-+		power {
-+			label = "Power Button";
-+			linux,code = <KEY_POWER>;
- 			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- 		};
- 	};
-@@ -51,11 +58,27 @@
- 	gpio-leds {
- 		compatible = "gpio-leds";
- 
--		blue-power {
-+		led_power_blue: power_blue {
- 			label = "nas220:blue:power";
- 			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- 			linux,default-trigger = "default-on";
- 		};
-+
-+		disk_blue {
-+			label = "nas220:blue:disk";
-+			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
-+			linux,default-trigger = "disk-activity";
-+		};
-+
-+		led_status_blue: status_blue {
-+			label = "nas220:blue:status";
-+			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
-+		};
-+
-+		led_status_amber: status_amber {
-+			label = "nas220:amber:status";
-+			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
-+		};
- 	};
- 
- 	regulators {
-@@ -153,6 +176,33 @@
- 
- &nand {
- 	status = "okay";
-+
-+	partitions {
-+		compatible = "fixed-partitions";
-+
-+		partition@0 {
-+			label = "uboot";
-+			reg = <0x0 0xa0000>;
-+			read-only;
-+		};
-+
-+		partition@a0000 {
-+			label = "uboot-env";
-+			reg = <0xa0000 0x10000>;
-+			read-only;
-+		};
-+
-+		partition@b0000 {
-+			label = "reserved";
-+			reg = <0xb0000 0x10000>;
-+			read-only;
-+		};
-+
-+		partition@c0000 {
-+			label = "ubi";
-+			reg = <0xc0000 0x1e80000>;
-+		};
-+	};
- };
- 
- &mdio {
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts
index 890eac972d..5315f3723e 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7525pw.dts
@@ -135,6 +135,10 @@
 					macaddr_boardconfig_16: macaddr@16 {
 						reg = <0x16 0x6>;
 					};
+
+					eeprom_boardconfig_410: eeprom@410 {
+						reg = <0x410 0x200>;
+					};
 				};
 			};
 		};
@@ -152,7 +156,8 @@
 	wifi@0,0 {
 		compatible = "pci0,0";
 		reg = <0x7000 0 0 0 0>;
-		ralink,mtd-eeprom = <&boardconfig 0x410>;
+		nvmem-cells = <&eeprom_boardconfig_410>;
+		nvmem-cell-names = "eeprom";
 	};
 };
 
diff --git a/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch
index 3e23c0f23d..b796de9c11 100644
--- a/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch
+++ b/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch
@@ -5524,7 +5524,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	  (transaction layer end-to-end CRC checking).
 --- a/include/linux/pci.h
 +++ b/include/linux/pci.h
-@@ -1599,6 +1599,8 @@ void pci_walk_bus_locked(struct pci_bus
+@@ -1602,6 +1602,8 @@ void pci_walk_bus_locked(struct pci_bus
  			 void *userdata);
  int pci_cfg_space_size(struct pci_dev *dev);
  unsigned char pci_bus_max_busnr(struct pci_bus *bus);
diff --git a/target/linux/lantiq/patches-6.6/0027-v6.11-net-ethernet-lantiq_etop-remove-redundant-device-nam.patch b/target/linux/lantiq/patches-6.6/0027-v6.11-net-ethernet-lantiq_etop-remove-redundant-device-nam.patch
new file mode 100644
index 0000000000..abaef6c3a8
--- /dev/null
+++ b/target/linux/lantiq/patches-6.6/0027-v6.11-net-ethernet-lantiq_etop-remove-redundant-device-nam.patch
@@ -0,0 +1,31 @@
+From 9283477e28913c1e7625c0a8d6959745e2431533 Mon Sep 17 00:00:00 2001
+From: Aleksander Jan Bajkowski <olek2@wp.pl>
+Date: Sat, 13 Jul 2024 19:09:20 +0200
+Subject: [PATCH] net: ethernet: lantiq_etop: remove redundant device name
+ setup
+
+The same name is set when allocating the netdevice structure in the
+alloc_etherdev_mq()->alloc_etherrdev_mqs() function. Therefore, there
+is no need to manually set it.
+
+This fixes CheckPatch warnings:
+WARNING: Prefer strscpy over strcpy - see: https://github.com/KSPP/linux/issues/88
+	strcpy(dev->name, "eth%d");
+
+Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
+Link: https://patch.msgid.link/20240713170920.863171-1-olek2@wp.pl
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/lantiq_etop.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/net/ethernet/lantiq_etop.c
++++ b/drivers/net/ethernet/lantiq_etop.c
+@@ -675,7 +675,6 @@ ltq_etop_probe(struct platform_device *p
+ 		err = -ENOMEM;
+ 		goto err_out;
+ 	}
+-	strcpy(dev->name, "eth%d");
+ 	dev->netdev_ops = &ltq_eth_netdev_ops;
+ 	dev->ethtool_ops = &ltq_etop_ethtool_ops;
+ 	priv = netdev_priv(dev);
diff --git a/target/linux/lantiq/patches-6.6/0028-NET-lantiq-various-etop-fixes.patch b/target/linux/lantiq/patches-6.6/0028-NET-lantiq-various-etop-fixes.patch
index 8ac1097267..788a34d61a 100644
--- a/target/linux/lantiq/patches-6.6/0028-NET-lantiq-various-etop-fixes.patch
+++ b/target/linux/lantiq/patches-6.6/0028-NET-lantiq-various-etop-fixes.patch
@@ -5,8 +5,8 @@ Subject: [PATCH 28/36] NET: lantiq: various etop fixes
 
 Signed-off-by: John Crispin <blogic@openwrt.org>
 ---
- drivers/net/ethernet/lantiq_etop.c |  555 +++++++++++++++++++++++++-----------
- 1 file changed, 389 insertions(+), 166 deletions(-)
+ drivers/net/ethernet/lantiq_etop.c | 530 ++++++++++++++++++++---------
+ 1 file changed, 375 insertions(+), 155 deletions(-)
 
 --- a/drivers/net/ethernet/lantiq_etop.c
 +++ b/drivers/net/ethernet/lantiq_etop.c
@@ -66,10 +66,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 -#define LTQ_ETOP_IGPLEN		0x16080
 +
 +#define MAC_CFG_MASK		0xfff
-+#define MAC_CFG_CGEN		(1 << 11)
-+#define MAC_CFG_DUPLEX		(1 << 2)
-+#define MAC_CFG_SPEED		(1 << 1)
-+#define MAC_CFG_LINK		(1 << 0)
++#define MAC_CFG_CGEN		BIT(11)
++#define MAC_CFG_DUPLEX		BIT(2)
++#define MAC_CFG_SPEED		BIT(1)
++#define MAC_CFG_LINK		BIT(0)
  
  #define MAX_DMA_CHAN		0x8
  #define MAX_DMA_CRC_LEN		0x4
@@ -89,11 +89,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 -#define IS_TX(x)		((x) == LTQ_ETOP_TX_CHANNEL)
 -#define IS_RX(x)		((x) == LTQ_ETOP_RX_CHANNEL)
 +#define ETOP_CFG_MASK           0xfff
-+#define ETOP_CFG_FEN0		(1 << 8)
-+#define ETOP_CFG_SEN0		(1 << 6)
-+#define ETOP_CFG_OFF1		(1 << 3)
-+#define ETOP_CFG_REMII0		(1 << 1)
-+#define ETOP_CFG_OFF0		(1 << 0)
++#define ETOP_CFG_FEN0		BIT(8)
++#define ETOP_CFG_SEN0		BIT(6)
++#define ETOP_CFG_OFF1		BIT(3)
++#define ETOP_CFG_REMII0		BIT(1)
++#define ETOP_CFG_OFF0		BIT(0)
 +
 +#define LTQ_GBIT_MDIO_CTL	0xCC
 +#define LTQ_GBIT_MDIO_DATA	0xd0
@@ -103,8 +103,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +#define LTQ_GBIT_PMAC_RX_IPG	0xa8
 +#define LTQ_GBIT_RGMII_CTL	0x78
 +
-+#define PMAC_HD_CTL_AS		(1 << 19)
-+#define PMAC_HD_CTL_RXSH	(1 << 22)
++#define PMAC_HD_CTL_AS		BIT(19)
++#define PMAC_HD_CTL_RXSH	BIT(22)
 +
 +/* Switch Enable (0=disable, 1=enable) */
 +#define GCTL0_SE		0x80000000
@@ -170,14 +170,13 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	int tx_burst_len;
  	int rx_burst_len;
  
--	spinlock_t lock;
 +	int tx_irq;
 +	int rx_irq;
 +
 +	unsigned char mac[6];
 +	phy_interface_t mii_mode;
-+ 
-+ 	spinlock_t lock;
++
+ 	spinlock_t lock;
 +
 +	struct clk *clk_ppe;
 +	struct clk *clk_switch;
@@ -186,7 +185,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  };
  
 +static int ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr,
-+				int phy_reg, u16 phy_data);
++			    int phy_reg, u16 phy_data);
 +
  static int
  ltq_etop_alloc_skb(struct ltq_etop_chan *ch)
@@ -256,12 +255,12 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	return 1;
  }
  
-@@ -202,9 +278,10 @@ static irqreturn_t
+@@ -202,9 +278,11 @@ static irqreturn_t
  ltq_etop_dma_irq(int irq, void *_priv)
  {
  	struct ltq_etop_priv *priv = _priv;
 -	int ch = irq - LTQ_DMA_CH0_INT;
--
+ 
 -	napi_schedule(&priv->ch[ch].napi);
 +	if (irq == priv->txch.dma.irq)
 +		napi_schedule(&priv->txch.napi);
@@ -270,16 +269,16 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	return IRQ_HANDLED;
  }
  
-@@ -216,7 +293,7 @@ ltq_etop_free_channel(struct net_device
+@@ -216,7 +294,7 @@ ltq_etop_free_channel(struct net_device
  	ltq_dma_free(&ch->dma);
  	if (ch->dma.irq)
  		free_irq(ch->dma.irq, priv);
 -	if (IS_RX(ch->idx)) {
-+	if (ch == &priv->txch) {
- 		int desc;
++	if (ch == &priv->rxch) {
+ 		struct ltq_dma_channel *dma = &ch->dma;
  
- 		for (desc = 0; desc < LTQ_DESC_NUM; desc++)
-@@ -228,80 +305,135 @@ static void
+ 		for (dma->desc = 0; dma->desc < LTQ_DESC_NUM; dma->desc++)
+@@ -228,80 +306,137 @@ static void
  ltq_etop_hw_exit(struct net_device *dev)
  {
  	struct ltq_etop_priv *priv = netdev_priv(dev);
@@ -320,13 +319,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	ltq_gbit_w32_mask(0x300, 0, LTQ_GBIT_GCTL0);
 +	/* disable pmac & dmac headers */
 +	ltq_gbit_w32_mask(PMAC_HD_CTL_AS | PMAC_HD_CTL_RXSH, 0,
-+		LTQ_GBIT_PMAC_HD_CTL);
++			  LTQ_GBIT_PMAC_HD_CTL);
 +	/* Due to traffic halt when burst length 8,
-+		replace default IPG value with 0x3B */
++	 *replace default IPG value with 0x3B
++	 */
 +	ltq_gbit_w32(0x3B, LTQ_GBIT_PMAC_RX_IPG);
 +	/* set mdc clock to 2.5 MHz */
 +	ltq_gbit_w32_mask(MDC_CLOCK_MASK, 4 << MDC_CLOCK_OFFSET,
-+		LTQ_GBIT_RGMII_CTL);
++			  LTQ_GBIT_RGMII_CTL);
  }
  
  static int
@@ -336,11 +336,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 -	int i;
 -	int err;
 +	phy_interface_t mii_mode = priv->mii_mode;
- 
--	ltq_pmu_enable(PMU_PPE);
++
 +	clk_enable(priv->clk_ppe);
  
--	switch (priv->pldata->mii_mode) {
+-	ltq_pmu_enable(PMU_PPE);
 +	if (of_machine_is_compatible("lantiq,ar9")) {
 +		ltq_etop_gbit_init(dev);
 +		/* force the etops link to the gbit to MII */
@@ -349,7 +348,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	ltq_etop_w32_mask(MDIO_CFG_MASK, 0, LTQ_ETOP_MDIO_CFG);
 +	ltq_etop_w32_mask(MAC_CFG_MASK, MAC_CFG_CGEN | MAC_CFG_DUPLEX |
 +			MAC_CFG_SPEED | MAC_CFG_LINK, LTQ_ETOP_MAC_CFG);
-+
+ 
+-	switch (priv->pldata->mii_mode) {
 +	switch (mii_mode) {
  	case PHY_INTERFACE_MODE_RMII:
 -		ltq_etop_w32_mask(ETOP_MII_MASK, ETOP_MII_REVERSE,
@@ -373,7 +373,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +			/* enable clock for internal PHY */
 +			clk_enable(priv->clk_ephycgu);
 +			/* we need to write this magic to the internal phy to
-+			   make it work */
++			 * make it work
++			 */
 +			ltq_etop_mdio_wr(NULL, 0x8, 0x12, 0xC020);
 +			pr_info("Selected EPHY mode\n");
 +			break;
@@ -464,12 +465,12 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  }
  
  static void
-@@ -320,6 +452,39 @@ static const struct ethtool_ops ltq_etop
+@@ -320,6 +455,39 @@ static const struct ethtool_ops ltq_etop
  };
  
  static int
 +ltq_etop_mdio_wr_xr9(struct mii_bus *bus, int phy_addr,
-+		int phy_reg, u16 phy_data)
++		     int phy_reg, u16 phy_data)
 +{
 +	u32 val = MDIO_XR9_REQUEST | MDIO_XR9_WRITE |
 +		(phy_data << MDIO_XR9_WR_OFFSET) |
@@ -504,7 +505,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data)
  {
  	u32 val = MDIO_REQUEST |
-@@ -327,9 +492,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in
+@@ -327,9 +495,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in
  		((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) |
  		phy_data;
  
@@ -516,7 +517,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	return 0;
  }
  
-@@ -340,12 +505,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in
+@@ -340,12 +508,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in
  		((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) |
  		((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET);
  
@@ -533,7 +534,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	return val;
  }
  
-@@ -361,7 +526,10 @@ ltq_etop_mdio_probe(struct net_device *d
+@@ -361,7 +529,10 @@ ltq_etop_mdio_probe(struct net_device *d
  	struct ltq_etop_priv *priv = netdev_priv(dev);
  	struct phy_device *phydev;
  
@@ -545,7 +546,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	if (!phydev) {
  		netdev_err(dev, "no PHY found\n");
-@@ -369,14 +537,17 @@ ltq_etop_mdio_probe(struct net_device *d
+@@ -369,14 +540,17 @@ ltq_etop_mdio_probe(struct net_device *d
  	}
  
  	phydev = phy_connect(dev, phydev_name(phydev),
@@ -565,7 +566,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	phy_attached_info(phydev);
  
-@@ -397,8 +568,13 @@ ltq_etop_mdio_init(struct net_device *de
+@@ -397,8 +571,13 @@ ltq_etop_mdio_init(struct net_device *de
  	}
  
  	priv->mii_bus->priv = dev;
@@ -581,7 +582,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	priv->mii_bus->name = "ltq_mii";
  	snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
  		 priv->pdev->name, priv->pdev->id);
-@@ -435,18 +611,21 @@ static int
+@@ -435,18 +614,21 @@ static int
  ltq_etop_open(struct net_device *dev)
  {
  	struct ltq_etop_priv *priv = netdev_priv(dev);
@@ -613,7 +614,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	netif_tx_start_all_queues(dev);
  	return 0;
  }
-@@ -455,18 +634,19 @@ static int
+@@ -455,18 +637,19 @@ static int
  ltq_etop_stop(struct net_device *dev)
  {
  	struct ltq_etop_priv *priv = netdev_priv(dev);
@@ -643,7 +644,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	return 0;
  }
  
-@@ -476,15 +656,16 @@ ltq_etop_tx(struct sk_buff *skb, struct
+@@ -476,15 +659,16 @@ ltq_etop_tx(struct sk_buff *skb, struct
  	int queue = skb_get_queue_mapping(skb);
  	struct netdev_queue *txq = netdev_get_tx_queue(dev, queue);
  	struct ltq_etop_priv *priv = netdev_priv(dev);
@@ -660,11 +661,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
 -	if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
 +	if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) ||
-+			priv->txch.skb[priv->txch.dma.desc]) {
++	    priv->txch.skb[priv->txch.dma.desc]) {
  		netdev_err(dev, "tx ring full\n");
  		netif_tx_stop_queue(txq);
  		return NETDEV_TX_BUSY;
-@@ -492,7 +673,7 @@ ltq_etop_tx(struct sk_buff *skb, struct
+@@ -492,7 +676,7 @@ ltq_etop_tx(struct sk_buff *skb, struct
  
  	/* dma needs to start on a burst length value aligned address */
  	byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
@@ -673,7 +674,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	netif_trans_update(dev);
  
-@@ -503,11 +684,11 @@ ltq_etop_tx(struct sk_buff *skb, struct
+@@ -503,11 +687,11 @@ ltq_etop_tx(struct sk_buff *skb, struct
  	wmb();
  	desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP |
  		LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
@@ -688,7 +689,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  		netif_tx_stop_queue(txq);
  
  	return NETDEV_TX_OK;
-@@ -518,11 +699,14 @@ ltq_etop_change_mtu(struct net_device *d
+@@ -518,11 +702,14 @@ ltq_etop_change_mtu(struct net_device *d
  {
  	struct ltq_etop_priv *priv = netdev_priv(dev);
  	unsigned long flags;
@@ -704,7 +705,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	spin_unlock_irqrestore(&priv->lock, flags);
  
  	return 0;
-@@ -575,6 +759,9 @@ ltq_etop_init(struct net_device *dev)
+@@ -575,6 +762,9 @@ ltq_etop_init(struct net_device *dev)
  	if (err)
  		goto err_hw;
  	ltq_etop_change_mtu(dev, 1500);
@@ -714,7 +715,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
  	if (!is_valid_ether_addr(mac.sa_data)) {
-@@ -592,9 +779,10 @@ ltq_etop_init(struct net_device *dev)
+@@ -592,9 +782,10 @@ ltq_etop_init(struct net_device *dev)
  		dev->addr_assign_type = NET_ADDR_RANDOM;
  
  	ltq_etop_set_multicast_list(dev);
@@ -724,11 +725,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	if (!ltq_etop_mdio_init(dev))
 +		dev->ethtool_ops = &ltq_etop_ethtool_ops;
 +	else
-+		pr_warn("etop: mdio probe failed\n");;
++		pr_warn("etop: mdio probe failed\n");
  	return 0;
  
  err_netdev:
-@@ -614,6 +802,9 @@ ltq_etop_tx_timeout(struct net_device *d
+@@ -614,6 +805,9 @@ ltq_etop_tx_timeout(struct net_device *d
  	err = ltq_etop_hw_init(dev);
  	if (err)
  		goto err_hw;
@@ -738,7 +739,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	netif_trans_update(dev);
  	netif_wake_queue(dev);
  	return;
-@@ -637,14 +828,18 @@ static const struct net_device_ops ltq_e
+@@ -637,14 +831,18 @@ static const struct net_device_ops ltq_e
  	.ndo_tx_timeout = ltq_etop_tx_timeout,
  };
  
@@ -761,7 +762,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  	if (!res) {
-@@ -670,19 +865,55 @@ ltq_etop_probe(struct platform_device *p
+@@ -670,18 +868,54 @@ ltq_etop_probe(struct platform_device *p
  		goto err_out;
  	}
  
@@ -777,7 +778,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +			goto err_out;
 +		}
 +		ltq_gbit_membase = devm_ioremap(&pdev->dev,
-+			gbit_res->start, resource_size(gbit_res));
++						gbit_res->start, resource_size(gbit_res));
 +		if (!ltq_gbit_membase) {
 +			dev_err(&pdev->dev, "failed to remap gigabit switch %d\n",
 +				pdev->id);
@@ -787,7 +788,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	}
 +
 +	dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4);
- 	strcpy(dev->name, "eth%d");
  	dev->netdev_ops = &ltq_eth_netdev_ops;
 -	dev->ethtool_ops = &ltq_etop_ethtool_ops;
  	priv = netdev_priv(dev);
@@ -823,7 +823,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	spin_lock_init(&priv->lock);
  	SET_NETDEV_DEV(dev, &pdev->dev);
  
-@@ -698,15 +929,10 @@ ltq_etop_probe(struct platform_device *p
+@@ -697,15 +931,10 @@ ltq_etop_probe(struct platform_device *p
  		goto err_free;
  	}
  
@@ -843,7 +843,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	err = register_netdev(dev);
  	if (err)
-@@ -735,31 +961,22 @@ ltq_etop_remove(struct platform_device *
+@@ -734,31 +963,22 @@ ltq_etop_remove(struct platform_device *
  	return 0;
  }
  
diff --git a/target/linux/lantiq/patches-6.6/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch b/target/linux/lantiq/patches-6.6/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
index b06c5ab47c..3e349d4c32 100644
--- a/target/linux/lantiq/patches-6.6/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
+++ b/target/linux/lantiq/patches-6.6/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
@@ -203,7 +203,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +early_param("ethaddr", setup_ethaddr);
 --- a/drivers/net/ethernet/lantiq_etop.c
 +++ b/drivers/net/ethernet/lantiq_etop.c
-@@ -763,7 +763,11 @@ ltq_etop_init(struct net_device *dev)
+@@ -766,7 +766,11 @@ ltq_etop_init(struct net_device *dev)
  	if (err)
  		goto err_hw;
  
diff --git a/target/linux/lantiq/patches-6.6/0701-NET-lantiq-etop-of-mido.patch b/target/linux/lantiq/patches-6.6/0701-NET-lantiq-etop-of-mido.patch
index 19c027b9f8..d80cdb0872 100644
--- a/target/linux/lantiq/patches-6.6/0701-NET-lantiq-etop-of-mido.patch
+++ b/target/linux/lantiq/patches-6.6/0701-NET-lantiq-etop-of-mido.patch
@@ -18,7 +18,7 @@ Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
  
  #include <asm/checksum.h>
  
-@@ -558,7 +559,8 @@ static int
+@@ -561,7 +562,8 @@ static int
  ltq_etop_mdio_init(struct net_device *dev)
  {
  	struct ltq_etop_priv *priv = netdev_priv(dev);
@@ -28,7 +28,7 @@ Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
  
  	priv->mii_bus = mdiobus_alloc();
  	if (!priv->mii_bus) {
-@@ -578,7 +580,15 @@ ltq_etop_mdio_init(struct net_device *de
+@@ -581,7 +583,15 @@ ltq_etop_mdio_init(struct net_device *de
  	priv->mii_bus->name = "ltq_mii";
  	snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
  		 priv->pdev->name, priv->pdev->id);
diff --git a/target/linux/lantiq/patches-6.6/0731-dt-bindings-net-dsa-lantiq_gswip-Add-missing-phy-mod.patch b/target/linux/lantiq/patches-6.6/0731-dt-bindings-net-dsa-lantiq_gswip-Add-missing-phy-mod.patch
deleted file mode 100644
index c337c564b6..0000000000
--- a/target/linux/lantiq/patches-6.6/0731-dt-bindings-net-dsa-lantiq_gswip-Add-missing-phy-mod.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 82ea7c7fb4e90620beba8b6436fc12df2379ef8d Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Mon, 10 Oct 2022 16:52:25 +0200
-Subject: [PATCH 731/768] dt-bindings: net: dsa: lantiq_gswip: Add missing
- phy-mode and fixed-link
-
-The CPU port has to specify a phy-mode and either a phy or a fixed-link.
-Since GSWIP is connected using a SoC internal protocol there's no PHY
-involved. Add phy-mode = "internal" and a fixed-link to describe the
-communication between the PMAC (Ethernet controller) and GSWIP switch.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
-+++ b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
-@@ -96,7 +96,13 @@ switch@e108000 {
- 
- 		port@6 {
- 			reg = <0x6>;
-+			phy-mode = "internal";
- 			ethernet = <&eth0>;
-+
-+			fixed-link {
-+				speed = <1000>;
-+				full-duplex;
-+			};
- 		};
- 	};
- 
diff --git a/target/linux/lantiq/patches-6.6/0731-v6.11-dt-bindings-net-dsa-lantiq-gswip-convert-to-YAML-schema.patch b/target/linux/lantiq/patches-6.6/0731-v6.11-dt-bindings-net-dsa-lantiq-gswip-convert-to-YAML-schema.patch
new file mode 100644
index 0000000000..40e52f2812
--- /dev/null
+++ b/target/linux/lantiq/patches-6.6/0731-v6.11-dt-bindings-net-dsa-lantiq-gswip-convert-to-YAML-schema.patch
@@ -0,0 +1,392 @@
+From c7f75954212b5e64f6b1f2375215b02fd79758ce Mon Sep 17 00:00:00 2001
+From: Martin Schiller <ms@dev.tdt.de>
+Date: Tue, 11 Jun 2024 15:54:23 +0200
+Subject: dt-bindings: net: dsa: lantiq,gswip: convert to YAML schema
+
+Convert the lantiq,gswip bindings to YAML format.
+
+Also add this new file to the MAINTAINERS file.
+
+Furthermore, the CPU port has to specify a phy-mode and either a phy or
+a fixed-link. Since GSWIP is connected using a SoC internal protocol
+there's no PHY involved. Add phy-mode = "internal" and a fixed-link to
+the example code to describe the communication between the PMAC
+(Ethernet controller) and GSWIP switch.
+
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Link: https://lore.kernel.org/r/20240611135434.3180973-2-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ .../devicetree/bindings/net/dsa/lantiq,gswip.yaml  | 202 +++++++++++++++++++++
+ .../devicetree/bindings/net/dsa/lantiq-gswip.txt   | 146 ---------------
+ MAINTAINERS                                        |   1 +
+ 3 files changed, 203 insertions(+), 146 deletions(-)
+ create mode 100644 Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
+ delete mode 100644 Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
+@@ -0,0 +1,202 @@
++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Lantiq GSWIP Ethernet switches
++
++allOf:
++  - $ref: dsa.yaml#/$defs/ethernet-ports
++
++maintainers:
++  - Hauke Mehrtens <hauke@hauke-m.de>
++
++properties:
++  compatible:
++    enum:
++      - lantiq,xrx200-gswip
++      - lantiq,xrx300-gswip
++      - lantiq,xrx330-gswip
++
++  reg:
++    minItems: 3
++    maxItems: 3
++
++  reg-names:
++    items:
++      - const: switch
++      - const: mdio
++      - const: mii
++
++  mdio:
++    $ref: /schemas/net/mdio.yaml#
++    unevaluatedProperties: false
++
++    properties:
++      compatible:
++        const: lantiq,xrx200-mdio
++
++    required:
++      - compatible
++
++  gphy-fw:
++    type: object
++    properties:
++      '#address-cells':
++        const: 1
++
++      '#size-cells':
++        const: 0
++
++      compatible:
++        items:
++          - enum:
++              - lantiq,xrx200-gphy-fw
++              - lantiq,xrx300-gphy-fw
++              - lantiq,xrx330-gphy-fw
++          - const: lantiq,gphy-fw
++
++      lantiq,rcu:
++        $ref: /schemas/types.yaml#/definitions/phandle
++        description: phandle to the RCU syscon
++
++    patternProperties:
++      "^gphy@[0-9a-f]{1,2}$":
++        type: object
++
++        additionalProperties: false
++
++        properties:
++          reg:
++            minimum: 0
++            maximum: 255
++            description:
++              Offset of the GPHY firmware register in the RCU register range
++
++          resets:
++            items:
++              - description: GPHY reset line
++
++          reset-names:
++            items:
++              - const: gphy
++
++        required:
++          - reg
++
++    required:
++      - compatible
++      - lantiq,rcu
++
++    additionalProperties: false
++
++required:
++  - compatible
++  - reg
++
++unevaluatedProperties: false
++
++examples:
++  - |
++    switch@e108000 {
++            compatible = "lantiq,xrx200-gswip";
++            reg = <0xe108000 0x3100>,  /* switch */
++                  <0xe10b100 0xd8>,    /* mdio */
++                  <0xe10b1d8 0x130>;   /* mii */
++            dsa,member = <0 0>;
++
++            ports {
++                    #address-cells = <1>;
++                    #size-cells = <0>;
++
++                    port@0 {
++                            reg = <0>;
++                            label = "lan3";
++                            phy-mode = "rgmii";
++                            phy-handle = <&phy0>;
++                    };
++
++                    port@1 {
++                            reg = <1>;
++                            label = "lan4";
++                            phy-mode = "rgmii";
++                            phy-handle = <&phy1>;
++                    };
++
++                    port@2 {
++                            reg = <2>;
++                            label = "lan2";
++                            phy-mode = "internal";
++                            phy-handle = <&phy11>;
++                    };
++
++                    port@4 {
++                            reg = <4>;
++                            label = "lan1";
++                            phy-mode = "internal";
++                            phy-handle = <&phy13>;
++                    };
++
++                    port@5 {
++                            reg = <5>;
++                            label = "wan";
++                            phy-mode = "rgmii";
++                            phy-handle = <&phy5>;
++                    };
++
++                    port@6 {
++                            reg = <0x6>;
++                            phy-mode = "internal";
++                            ethernet = <&eth0>;
++
++                            fixed-link {
++                                    speed = <1000>;
++                                    full-duplex;
++                            };
++                    };
++            };
++
++            mdio {
++                    #address-cells = <1>;
++                    #size-cells = <0>;
++                    compatible = "lantiq,xrx200-mdio";
++
++                    phy0: ethernet-phy@0 {
++                            reg = <0x0>;
++                    };
++                    phy1: ethernet-phy@1 {
++                            reg = <0x1>;
++                    };
++                    phy5: ethernet-phy@5 {
++                            reg = <0x5>;
++                    };
++                    phy11: ethernet-phy@11 {
++                            reg = <0x11>;
++                    };
++                    phy13: ethernet-phy@13 {
++                            reg = <0x13>;
++                    };
++            };
++
++            gphy-fw {
++                    #address-cells = <1>;
++                    #size-cells = <0>;
++                    compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
++                    lantiq,rcu = <&rcu0>;
++
++                    gphy@20 {
++                            reg = <0x20>;
++
++                            resets = <&reset0 31 30>;
++                            reset-names = "gphy";
++                    };
++
++                    gphy@68 {
++                            reg = <0x68>;
++
++                            resets = <&reset0 29 28>;
++                            reset-names = "gphy";
++                    };
++            };
++    };
+--- a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt
++++ /dev/null
+@@ -1,146 +0,0 @@
+-Lantiq GSWIP Ethernet switches
+-==================================
+-
+-Required properties for GSWIP core:
+-
+-- compatible	: "lantiq,xrx200-gswip" for the embedded GSWIP in the
+-		  xRX200 SoC
+-		  "lantiq,xrx300-gswip" for the embedded GSWIP in the
+-		  xRX300 SoC
+-		  "lantiq,xrx330-gswip" for the embedded GSWIP in the
+-		  xRX330 SoC
+-- reg		: memory range of the GSWIP core registers
+-		: memory range of the GSWIP MDIO registers
+-		: memory range of the GSWIP MII registers
+-
+-See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of
+-additional required and optional properties.
+-
+-
+-Required properties for MDIO bus:
+-- compatible	: "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP
+-		  core of the xRX200 SoC and the PHYs connected to it.
+-
+-See Documentation/devicetree/bindings/net/mdio.txt for a list of additional
+-required and optional properties.
+-
+-
+-Required properties for GPHY firmware loading:
+-- compatible	: "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
+-		  "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw"
+-		  "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw"
+-		  for the loading of the firmware into the embedded
+-		  GPHY core of the SoC.
+-- lantiq,rcu	: reference to the rcu syscon
+-
+-The GPHY firmware loader has a list of GPHY entries, one for each
+-embedded GPHY
+-
+-- reg		: Offset of the GPHY firmware register in the RCU
+-		  register range
+-- resets	: list of resets of the embedded GPHY
+-- reset-names	: list of names of the resets
+-
+-Example:
+-
+-Ethernet switch on the VRX200 SoC:
+-
+-switch@e108000 {
+-	#address-cells = <1>;
+-	#size-cells = <0>;
+-	compatible = "lantiq,xrx200-gswip";
+-	reg = <	0xe108000 0x3100	/* switch */
+-		0xe10b100 0xd8		/* mdio */
+-		0xe10b1d8 0x130		/* mii */
+-		>;
+-	dsa,member = <0 0>;
+-
+-	ports {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		port@0 {
+-			reg = <0>;
+-			label = "lan3";
+-			phy-mode = "rgmii";
+-			phy-handle = <&phy0>;
+-		};
+-
+-		port@1 {
+-			reg = <1>;
+-			label = "lan4";
+-			phy-mode = "rgmii";
+-			phy-handle = <&phy1>;
+-		};
+-
+-		port@2 {
+-			reg = <2>;
+-			label = "lan2";
+-			phy-mode = "internal";
+-			phy-handle = <&phy11>;
+-		};
+-
+-		port@4 {
+-			reg = <4>;
+-			label = "lan1";
+-			phy-mode = "internal";
+-			phy-handle = <&phy13>;
+-		};
+-
+-		port@5 {
+-			reg = <5>;
+-			label = "wan";
+-			phy-mode = "rgmii";
+-			phy-handle = <&phy5>;
+-		};
+-
+-		port@6 {
+-			reg = <0x6>;
+-			ethernet = <&eth0>;
+-		};
+-	};
+-
+-	mdio {
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-		compatible = "lantiq,xrx200-mdio";
+-		reg = <0>;
+-
+-		phy0: ethernet-phy@0 {
+-			reg = <0x0>;
+-		};
+-		phy1: ethernet-phy@1 {
+-			reg = <0x1>;
+-		};
+-		phy5: ethernet-phy@5 {
+-			reg = <0x5>;
+-		};
+-		phy11: ethernet-phy@11 {
+-			reg = <0x11>;
+-		};
+-		phy13: ethernet-phy@13 {
+-			reg = <0x13>;
+-		};
+-	};
+-
+-	gphy-fw {
+-		compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
+-		lantiq,rcu = <&rcu0>;
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		gphy@20 {
+-			reg = <0x20>;
+-
+-			resets = <&reset0 31 30>;
+-			reset-names = "gphy";
+-		};
+-
+-		gphy@68 {
+-			reg = <0x68>;
+-
+-			resets = <&reset0 29 28>;
+-			reset-names = "gphy";
+-		};
+-	};
+-};
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -11863,6 +11863,7 @@ LANTIQ / INTEL Ethernet drivers
+ M:	Hauke Mehrtens <hauke@hauke-m.de>
+ L:	netdev@vger.kernel.org
+ S:	Maintained
++F:	Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
+ F:	drivers/net/dsa/lantiq_gswip.c
+ F:	drivers/net/dsa/lantiq_pce.h
+ F:	drivers/net/ethernet/lantiq_xrx200.c
diff --git a/target/linux/lantiq/patches-6.6/0732-net-dsa-lantiq_gswip-Only-allow-phy-mode-internal-on.patch b/target/linux/lantiq/patches-6.6/0732-v6.11-net-dsa-lantiq_gswip-Only-allow-phy-mode-internal-on-the-CPU-port.patch
index 4800ee1dd2..305ad4c42c 100644
--- a/target/linux/lantiq/patches-6.6/0732-net-dsa-lantiq_gswip-Only-allow-phy-mode-internal-on.patch
+++ b/target/linux/lantiq/patches-6.6/0732-v6.11-net-dsa-lantiq_gswip-Only-allow-phy-mode-internal-on-the-CPU-port.patch
@@ -1,14 +1,19 @@
-From a55b9d802e11baceb35bd312419ad82086065b08 Mon Sep 17 00:00:00 2001
+From b98f122ebdac28b0c932f3f4474eb0927c39297b Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Mon, 10 Oct 2022 16:59:35 +0200
-Subject: [PATCH 732/768] net: dsa: lantiq_gswip: Only allow phy-mode =
- "internal" on the CPU port
+Date: Tue, 11 Jun 2024 15:54:24 +0200
+Subject: net: dsa: lantiq_gswip: Only allow phy-mode = "internal" on the CPU
+ port
 
 Add the CPU port to gswip_xrx200_phylink_get_caps() and
 gswip_xrx300_phylink_get_caps(). It connects through a SoC-internal bus,
 so the only allowed phy-mode is PHY_INTERFACE_MODE_INTERNAL.
 
 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-3-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
  drivers/net/dsa/lantiq_gswip.c | 2 ++
  1 file changed, 2 insertions(+)
diff --git a/target/linux/lantiq/patches-6.6/0733-v6.11-net-dsa-lantiq_gswip-add-terminating-n-where-missing.patch b/target/linux/lantiq/patches-6.6/0733-v6.11-net-dsa-lantiq_gswip-add-terminating-n-where-missing.patch
new file mode 100644
index 0000000000..55adfe021f
--- /dev/null
+++ b/target/linux/lantiq/patches-6.6/0733-v6.11-net-dsa-lantiq_gswip-add-terminating-n-where-missing.patch
@@ -0,0 +1,82 @@
+From dd6d364e1895211df8a8fe02c2a5a0b2a7049957 Mon Sep 17 00:00:00 2001
+From: Martin Schiller <ms@dev.tdt.de>
+Date: Tue, 11 Jun 2024 15:54:25 +0200
+Subject: net: dsa: lantiq_gswip: add terminating \n where missing
+
+Some dev_err are missing the terminating \n. Let's add that.
+
+Suggested-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Link: https://lore.kernel.org/r/20240611135434.3180973-4-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/dsa/lantiq_gswip.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/dsa/lantiq_gswip.c
++++ b/drivers/net/dsa/lantiq_gswip.c
+@@ -829,7 +829,7 @@ static int gswip_setup(struct dsa_switch
+ 
+ 	err = gswip_pce_load_microcode(priv);
+ 	if (err) {
+-		dev_err(priv->dev, "writing PCE microcode failed, %i", err);
++		dev_err(priv->dev, "writing PCE microcode failed, %i\n", err);
+ 		return err;
+ 	}
+ 
+@@ -1780,7 +1780,7 @@ static u32 gswip_bcm_ram_entry_read(stru
+ 	err = gswip_switch_r_timeout(priv, GSWIP_BM_RAM_CTRL,
+ 				     GSWIP_BM_RAM_CTRL_BAS);
+ 	if (err) {
+-		dev_err(priv->dev, "timeout while reading table: %u, index: %u",
++		dev_err(priv->dev, "timeout while reading table: %u, index: %u\n",
+ 			table, index);
+ 		return 0;
+ 	}
+@@ -2009,7 +2009,7 @@ static void gswip_gphy_fw_remove(struct
+ 
+ 	ret = regmap_write(priv->rcu_regmap, gphy_fw->fw_addr_offset, 0);
+ 	if (ret)
+-		dev_err(priv->dev, "can not reset GPHY FW pointer");
++		dev_err(priv->dev, "can not reset GPHY FW pointer\n");
+ 
+ 	clk_disable_unprepare(gphy_fw->clk_gate);
+ 
+@@ -2038,7 +2038,7 @@ static int gswip_gphy_fw_list(struct gsw
+ 			priv->gphy_fw_name_cfg = &xrx200a2x_gphy_data;
+ 			break;
+ 		default:
+-			dev_err(dev, "unknown GSWIP version: 0x%x", version);
++			dev_err(dev, "unknown GSWIP version: 0x%x\n", version);
+ 			return -ENOENT;
+ 		}
+ 	}
+@@ -2048,7 +2048,7 @@ static int gswip_gphy_fw_list(struct gsw
+ 		priv->gphy_fw_name_cfg = match->data;
+ 
+ 	if (!priv->gphy_fw_name_cfg) {
+-		dev_err(dev, "GPHY compatible type not supported");
++		dev_err(dev, "GPHY compatible type not supported\n");
+ 		return -ENOENT;
+ 	}
+ 
+@@ -2150,7 +2150,7 @@ static int gswip_probe(struct platform_d
+ 			return -EINVAL;
+ 		break;
+ 	default:
+-		dev_err(dev, "unknown GSWIP version: 0x%x", version);
++		dev_err(dev, "unknown GSWIP version: 0x%x\n", version);
+ 		return -ENOENT;
+ 	}
+ 
+@@ -2181,7 +2181,7 @@ static int gswip_probe(struct platform_d
+ 		goto mdio_bus;
+ 	}
+ 	if (!dsa_is_cpu_port(priv->ds, priv->hw_info->cpu_port)) {
+-		dev_err(dev, "wrong CPU port defined, HW only supports port: %i",
++		dev_err(dev, "wrong CPU port defined, HW only supports port: %i\n",
+ 			priv->hw_info->cpu_port);
+ 		err = -EINVAL;
+ 		goto disable_switch;
diff --git a/target/linux/lantiq/patches-6.6/0733-net-dsa-lantiq_gswip-Use-dev_err_probe-where-appropr.patch b/target/linux/lantiq/patches-6.6/0734-v6.11-net-dsa-lantiq_gswip-Use-dev_err_probe-where-appropr.patch
index f30e7ab00c..7894979707 100644
--- a/target/linux/lantiq/patches-6.6/0733-net-dsa-lantiq_gswip-Use-dev_err_probe-where-appropr.patch
+++ b/target/linux/lantiq/patches-6.6/0734-v6.11-net-dsa-lantiq_gswip-Use-dev_err_probe-where-appropr.patch
@@ -1,8 +1,7 @@
-From 4d3dd68a1c56674ff666d0622b545992fac31754 Mon Sep 17 00:00:00 2001
+From 1763b155da022ac0f984463e68cb0cda8ffc1fe8 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Sun, 31 Jul 2022 22:54:52 +0200
-Subject: [PATCH 733/768] net: dsa: lantiq_gswip: Use dev_err_probe where
- appropriate
+Date: Tue, 11 Jun 2024 15:54:26 +0200
+Subject: net: dsa: lantiq_gswip: Use dev_err_probe where appropriate
 
 dev_err_probe() can be used to simplify the existing code. Also it means
 we get rid of the following warning which is seen whenever the PMAC
@@ -11,8 +10,13 @@ probed yet:
   gswip 1e108000.switch: dsa switch register failed: -517
 
 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-5-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
- drivers/net/dsa/lantiq_gswip.c | 53 ++++++++++++++++------------------
+ drivers/net/dsa/lantiq_gswip.c | 53 ++++++++++++++++++++----------------------
  1 file changed, 25 insertions(+), 28 deletions(-)
 
 --- a/drivers/net/dsa/lantiq_gswip.c
@@ -70,10 +74,10 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  			priv->gphy_fw_name_cfg = &xrx200a2x_gphy_data;
  			break;
  		default:
--			dev_err(dev, "unknown GSWIP version: 0x%x", version);
+-			dev_err(dev, "unknown GSWIP version: 0x%x\n", version);
 -			return -ENOENT;
 +			return dev_err_probe(dev, -ENOENT,
-+					     "unknown GSWIP version: 0x%x",
++					     "unknown GSWIP version: 0x%x\n",
 +					     version);
  		}
  	}
@@ -83,12 +87,12 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  		priv->gphy_fw_name_cfg = match->data;
  
 -	if (!priv->gphy_fw_name_cfg) {
--		dev_err(dev, "GPHY compatible type not supported");
+-		dev_err(dev, "GPHY compatible type not supported\n");
 -		return -ENOENT;
 -	}
 +	if (!priv->gphy_fw_name_cfg)
 +		return dev_err_probe(dev, -ENOENT,
-+				     "GPHY compatible type not supported");
++				     "GPHY compatible type not supported\n");
  
  	priv->num_gphy_fw = of_get_available_child_count(gphy_fw_list_np);
  	if (!priv->num_gphy_fw)
@@ -96,10 +100,10 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  			return -EINVAL;
  		break;
  	default:
--		dev_err(dev, "unknown GSWIP version: 0x%x", version);
+-		dev_err(dev, "unknown GSWIP version: 0x%x\n", version);
 -		return -ENOENT;
 +		return dev_err_probe(dev, -ENOENT,
-+				     "unknown GSWIP version: 0x%x", version);
++				     "unknown GSWIP version: 0x%x\n", version);
  	}
  
  	/* bring up the mdio bus */
@@ -134,11 +138,11 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  		goto mdio_bus;
  	}
  	if (!dsa_is_cpu_port(priv->ds, priv->hw_info->cpu_port)) {
--		dev_err(dev, "wrong CPU port defined, HW only supports port: %i",
+-		dev_err(dev, "wrong CPU port defined, HW only supports port: %i\n",
 -			priv->hw_info->cpu_port);
 -		err = -EINVAL;
 +		err = dev_err_probe(dev, -EINVAL,
-+				    "wrong CPU port defined, HW only supports port: %i",
++				    "wrong CPU port defined, HW only supports port: %i\n",
 +				    priv->hw_info->cpu_port);
  		goto disable_switch;
  	}
diff --git a/target/linux/lantiq/patches-6.6/0734-net-dsa-lantiq_gswip-Don-t-manually-call-gswip_port_.patch b/target/linux/lantiq/patches-6.6/0735-v6.11-net-dsa-lantiq_gswip-Don-t-manually-call-gswip_port_.patch
index de8416380a..b7de069c5f 100644
--- a/target/linux/lantiq/patches-6.6/0734-net-dsa-lantiq_gswip-Don-t-manually-call-gswip_port_.patch
+++ b/target/linux/lantiq/patches-6.6/0735-v6.11-net-dsa-lantiq_gswip-Don-t-manually-call-gswip_port_.patch
@@ -1,13 +1,17 @@
-From 8cf0b680abc157adeec3fb93a10354c470694535 Mon Sep 17 00:00:00 2001
+From f5ebf9ab60940b00c36dfe64add41c80f3daff6a Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Thu, 28 Jul 2022 22:37:11 +0200
-Subject: [PATCH 734/768] net: dsa: lantiq_gswip: Don't manually call
- gswip_port_enable()
+Date: Tue, 11 Jun 2024 15:54:27 +0200
+Subject: net: dsa: lantiq_gswip: Don't manually call gswip_port_enable()
 
 We don't need to manually call gswip_port_enable() from within
 gswip_setup() for the CPU port. DSA does this automatically for us.
 
 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-6-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
  drivers/net/dsa/lantiq_gswip.c | 2 --
  1 file changed, 2 deletions(-)
diff --git a/target/linux/lantiq/patches-6.6/0735-net-dsa-lantiq_gswip-do-also-enable-or-disable-cpu-p.patch b/target/linux/lantiq/patches-6.6/0736-v6.11-net-dsa-lantiq_gswip-do-also-enable-or-disable-cpu-p.patch
index a653c85841..0baca3d7c2 100644
--- a/target/linux/lantiq/patches-6.6/0735-net-dsa-lantiq_gswip-do-also-enable-or-disable-cpu-p.patch
+++ b/target/linux/lantiq/patches-6.6/0736-v6.11-net-dsa-lantiq_gswip-do-also-enable-or-disable-cpu-p.patch
@@ -1,7 +1,7 @@
-From 54a2f7f2c134738bd3f4ea0a213138d169f2726e Mon Sep 17 00:00:00 2001
+From 86b9ea6412af41914ef6549f85a849c3b987f4f3 Mon Sep 17 00:00:00 2001
 From: Martin Schiller <ms@dev.tdt.de>
-Date: Fri, 10 May 2024 13:52:10 +0200
-Subject: [PATCH] net: dsa: lantiq_gswip: do also enable or disable cpu port
+Date: Tue, 11 Jun 2024 15:54:28 +0200
+Subject: net: dsa: lantiq_gswip: do also enable or disable cpu port
 
 Before commit 74be4babe72f ("net: dsa: do not enable or disable non user
 ports"), gswip_port_enable/disable() were also executed for the cpu port
@@ -9,10 +9,13 @@ in gswip_setup() which disabled the cpu port during initialization.
 
 Let's restore this by removing the dsa_is_user_port checks. Also, let's
 clean up the gswip_port_enable() function so that we only have to check
-for the cpu port once.
+for the cpu port once. The operation reordering done here is safe.
 
-Fixes: 74be4babe72f ("net: dsa: do not enable or disable non user ports")
 Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Link: https://lore.kernel.org/r/20240611135434.3180973-7-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
  drivers/net/dsa/lantiq_gswip.c | 24 ++++++++----------------
  1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/target/linux/lantiq/patches-6.6/0736-net-dsa-lantiq_gswip-Use-dsa_is_cpu_port-in-gswip_po.patch b/target/linux/lantiq/patches-6.6/0737-v6.11-net-dsa-lantiq_gswip-Use-dsa_is_cpu_port-in-gswip_po.patch
index fd19982264..493aea4295 100644
--- a/target/linux/lantiq/patches-6.6/0736-net-dsa-lantiq_gswip-Use-dsa_is_cpu_port-in-gswip_po.patch
+++ b/target/linux/lantiq/patches-6.6/0737-v6.11-net-dsa-lantiq_gswip-Use-dsa_is_cpu_port-in-gswip_po.patch
@@ -1,13 +1,18 @@
-From 8ab55ac9678ca1f50f786c84484599dd675c5a9f Mon Sep 17 00:00:00 2001
+From 7168ec1b06691295db6b335e5f5f6c86c7061213 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Wed, 18 May 2022 23:53:09 +0200
-Subject: [PATCH 736/768] net: dsa: lantiq_gswip: Use dsa_is_cpu_port() in
+Date: Tue, 11 Jun 2024 15:54:29 +0200
+Subject: net: dsa: lantiq_gswip: Use dsa_is_cpu_port() in
  gswip_port_change_mtu()
 
 Make the check for the CPU port in gswip_port_change_mtu() consistent
 with other areas of the driver by using dsa_is_cpu_port().
 
 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-8-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
  drivers/net/dsa/lantiq_gswip.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/linux/lantiq/patches-6.6/0738-net-dsa-lantiq_gswip-Consistently-use-macros-for-the.patch b/target/linux/lantiq/patches-6.6/0738-net-dsa-lantiq_gswip-Consistently-use-macros-for-the.patch
deleted file mode 100644
index 0ea90db483..0000000000
--- a/target/linux/lantiq/patches-6.6/0738-net-dsa-lantiq_gswip-Consistently-use-macros-for-the.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 61e9b19f6e6174afa7540f0b468a69bc940b91d4 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Mon, 1 Aug 2022 21:23:49 +0200
-Subject: [PATCH 738/768] net: dsa: lantiq_gswip: Consistently use macros for
- the mac bridge table
-
-Introduce a new GSWIP_TABLE_MAC_BRIDGE_PORT macro and use it throughout
-the driver. Also update GSWIP_TABLE_MAC_BRIDGE_STATIC to use the BIT()
-macro. This makes the driver code easier to understand.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/net/dsa/lantiq_gswip.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/drivers/net/dsa/lantiq_gswip.c
-+++ b/drivers/net/dsa/lantiq_gswip.c
-@@ -236,7 +236,8 @@
- #define GSWIP_TABLE_ACTIVE_VLAN		0x01
- #define GSWIP_TABLE_VLAN_MAPPING	0x02
- #define GSWIP_TABLE_MAC_BRIDGE		0x0b
--#define  GSWIP_TABLE_MAC_BRIDGE_STATIC	0x01	/* Static not, aging entry */
-+#define  GSWIP_TABLE_MAC_BRIDGE_STATIC	BIT(0)		/* Static not, aging entry */
-+#define  GSWIP_TABLE_MAC_BRIDGE_PORT	GENMASK(7, 4)	/* Port on learned entries */
- 
- #define XRX200_GPHY_FW_ALIGN	(16 * 1024)
- 
-@@ -1300,7 +1301,8 @@ static void gswip_port_fast_age(struct d
- 		if (mac_bridge.val[1] & GSWIP_TABLE_MAC_BRIDGE_STATIC)
- 			continue;
- 
--		if (((mac_bridge.val[0] & GENMASK(7, 4)) >> 4) != port)
-+		if (port != FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_PORT,
-+				      mac_bridge.val[0]))
- 			continue;
- 
- 		mac_bridge.valid = false;
-@@ -1438,7 +1440,8 @@ static int gswip_port_fdb_dump(struct ds
- 					return err;
- 			}
- 		} else {
--			if (((mac_bridge.val[0] & GENMASK(7, 4)) >> 4) == port) {
-+			if (port == FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_PORT,
-+					      mac_bridge.val[0])) {
- 				err = cb(addr, 0, false, data);
- 				if (err)
- 					return err;
diff --git a/target/linux/lantiq/patches-6.6/0737-net-dsa-lantiq_gswip-Change-literal-6-to-ETH_ALEN.patch b/target/linux/lantiq/patches-6.6/0738-v6.11-net-dsa-lantiq_gswip-Change-literal-6-to-ETH_ALEN.patch
index 74e52d1d18..773d43ee19 100644
--- a/target/linux/lantiq/patches-6.6/0737-net-dsa-lantiq_gswip-Change-literal-6-to-ETH_ALEN.patch
+++ b/target/linux/lantiq/patches-6.6/0738-v6.11-net-dsa-lantiq_gswip-Change-literal-6-to-ETH_ALEN.patch
@@ -1,12 +1,17 @@
-From ef98b183d8fc7187a2efcc21c8f54f3cf061d556 Mon Sep 17 00:00:00 2001
+From c927b6e47b5cc7324217bf5fe7e6ccd0633971a0 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Tue, 17 May 2022 22:39:58 +0200
-Subject: [PATCH 737/768] net: dsa: lantiq_gswip: Change literal 6 to ETH_ALEN
+Date: Tue, 11 Jun 2024 15:54:30 +0200
+Subject: net: dsa: lantiq_gswip: Change literal 6 to ETH_ALEN
 
 The addr variable in gswip_port_fdb_dump() stores a mac address. Use
 ETH_ALEN to make this consistent across other drivers.
 
 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-9-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
  drivers/net/dsa/lantiq_gswip.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/linux/lantiq/patches-6.6/0739-net-dsa-lantiq_gswip-Forbid-gswip_add_single_port_br.patch b/target/linux/lantiq/patches-6.6/0739-net-dsa-lantiq_gswip-Forbid-gswip_add_single_port_br.patch
deleted file mode 100644
index 1347a98c5c..0000000000
--- a/target/linux/lantiq/patches-6.6/0739-net-dsa-lantiq_gswip-Forbid-gswip_add_single_port_br.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 7a9e185075ababa827d1d3a33b787ad6d718c8ec Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Mon, 1 Aug 2022 22:24:24 +0200
-Subject: [PATCH 739/768] net: dsa: lantiq_gswip: Forbid
- gswip_add_single_port_br on the CPU port
-
-Calling gswip_add_single_port_br() with the CPU port would be a bug
-because then only the CPU port could talk to itself. Add the CPU port to
-the validation at the beginning of gswip_add_single_port_br().
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/net/dsa/lantiq_gswip.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/dsa/lantiq_gswip.c
-+++ b/drivers/net/dsa/lantiq_gswip.c
-@@ -650,7 +650,7 @@ static int gswip_add_single_port_br(stru
- 	unsigned int max_ports = priv->hw_info->max_ports;
- 	int err;
- 
--	if (port >= max_ports) {
-+	if (port >= max_ports || dsa_is_cpu_port(priv->ds, port)) {
- 		dev_err(priv->dev, "single port for %i supported\n", port);
- 		return -EIO;
- 	}
diff --git a/target/linux/lantiq/patches-6.6/0739-v6.11-net-dsa-lantiq_gswip-Consistently-use-macros-for-the.patch b/target/linux/lantiq/patches-6.6/0739-v6.11-net-dsa-lantiq_gswip-Consistently-use-macros-for-the.patch
new file mode 100644
index 0000000000..31f2e60bfb
--- /dev/null
+++ b/target/linux/lantiq/patches-6.6/0739-v6.11-net-dsa-lantiq_gswip-Consistently-use-macros-for-the.patch
@@ -0,0 +1,82 @@
+From e6c34597f89ac98c06176eed57f125252015a330 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Tue, 11 Jun 2024 15:54:31 +0200
+Subject: net: dsa: lantiq_gswip: Consistently use macros for the mac bridge
+ table
+
+Only bits [5:0] in mac_bridge.key[3] are reserved for the FID.
+Also, for dynamic (learned) entries, bits [7:4] in mac_bridge.val[0]
+represents the port.
+
+Introduce new macros GSWIP_TABLE_MAC_BRIDGE_KEY3_FID and
+GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT macro and use it throughout the driver.
+Also rename and update GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC to use the
+BIT() macro. This makes the driver code easier to understand.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Link: https://lore.kernel.org/r/20240611135434.3180973-10-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/dsa/lantiq_gswip.c | 18 +++++++++++-------
+ 1 file changed, 11 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/dsa/lantiq_gswip.c
++++ b/drivers/net/dsa/lantiq_gswip.c
+@@ -236,7 +236,9 @@
+ #define GSWIP_TABLE_ACTIVE_VLAN		0x01
+ #define GSWIP_TABLE_VLAN_MAPPING	0x02
+ #define GSWIP_TABLE_MAC_BRIDGE		0x0b
+-#define  GSWIP_TABLE_MAC_BRIDGE_STATIC	0x01	/* Static not, aging entry */
++#define  GSWIP_TABLE_MAC_BRIDGE_KEY3_FID	GENMASK(5, 0)	/* Filtering identifier */
++#define  GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT	GENMASK(7, 4)	/* Port on learned entries */
++#define  GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC	BIT(0)		/* Static, non-aging entry */
+ 
+ #define XRX200_GPHY_FW_ALIGN	(16 * 1024)
+ 
+@@ -1297,10 +1299,11 @@ static void gswip_port_fast_age(struct d
+ 		if (!mac_bridge.valid)
+ 			continue;
+ 
+-		if (mac_bridge.val[1] & GSWIP_TABLE_MAC_BRIDGE_STATIC)
++		if (mac_bridge.val[1] & GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC)
+ 			continue;
+ 
+-		if (((mac_bridge.val[0] & GENMASK(7, 4)) >> 4) != port)
++		if (port != FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,
++				      mac_bridge.val[0]))
+ 			continue;
+ 
+ 		mac_bridge.valid = false;
+@@ -1375,9 +1378,9 @@ static int gswip_port_fdb(struct dsa_swi
+ 	mac_bridge.key[0] = addr[5] | (addr[4] << 8);
+ 	mac_bridge.key[1] = addr[3] | (addr[2] << 8);
+ 	mac_bridge.key[2] = addr[1] | (addr[0] << 8);
+-	mac_bridge.key[3] = fid;
++	mac_bridge.key[3] = FIELD_PREP(GSWIP_TABLE_MAC_BRIDGE_KEY3_FID, fid);
+ 	mac_bridge.val[0] = add ? BIT(port) : 0; /* port map */
+-	mac_bridge.val[1] = GSWIP_TABLE_MAC_BRIDGE_STATIC;
++	mac_bridge.val[1] = GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC;
+ 	mac_bridge.valid = add;
+ 
+ 	err = gswip_pce_table_entry_write(priv, &mac_bridge);
+@@ -1431,14 +1434,15 @@ static int gswip_port_fdb_dump(struct ds
+ 		addr[2] = (mac_bridge.key[1] >> 8) & 0xff;
+ 		addr[1] = mac_bridge.key[2] & 0xff;
+ 		addr[0] = (mac_bridge.key[2] >> 8) & 0xff;
+-		if (mac_bridge.val[1] & GSWIP_TABLE_MAC_BRIDGE_STATIC) {
++		if (mac_bridge.val[1] & GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC) {
+ 			if (mac_bridge.val[0] & BIT(port)) {
+ 				err = cb(addr, 0, true, data);
+ 				if (err)
+ 					return err;
+ 			}
+ 		} else {
+-			if (((mac_bridge.val[0] & GENMASK(7, 4)) >> 4) == port) {
++			if (port == FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,
++					      mac_bridge.val[0])) {
+ 				err = cb(addr, 0, false, data);
+ 				if (err)
+ 					return err;
diff --git a/target/linux/lantiq/patches-6.6/0740-net-dsa-lantiq_gswip-Fix-error-message-in-gswip_add_.patch b/target/linux/lantiq/patches-6.6/0740-net-dsa-lantiq_gswip-Fix-error-message-in-gswip_add_.patch
deleted file mode 100644
index 732588308e..0000000000
--- a/target/linux/lantiq/patches-6.6/0740-net-dsa-lantiq_gswip-Fix-error-message-in-gswip_add_.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 28be6bfb735d851e646abb05b8e24eb6764596f5 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Mon, 1 Aug 2022 22:26:20 +0200
-Subject: [PATCH 740/768] net: dsa: lantiq_gswip: Fix error message in
- gswip_add_single_port_br()
-
-The error message is printed when the port cannot be used. Update the
-error message to reflect that.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/net/dsa/lantiq_gswip.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/dsa/lantiq_gswip.c
-+++ b/drivers/net/dsa/lantiq_gswip.c
-@@ -651,7 +651,8 @@ static int gswip_add_single_port_br(stru
- 	int err;
- 
- 	if (port >= max_ports || dsa_is_cpu_port(priv->ds, port)) {
--		dev_err(priv->dev, "single port for %i supported\n", port);
-+		dev_err(priv->dev, "single port for %i is not supported\n",
-+			port);
- 		return -EIO;
- 	}
- 
diff --git a/target/linux/lantiq/patches-6.6/0740-v6.11-net-dsa-lantiq_gswip-Remove-dead-code-from-gswip_add_single_port_br.patch b/target/linux/lantiq/patches-6.6/0740-v6.11-net-dsa-lantiq_gswip-Remove-dead-code-from-gswip_add_single_port_br.patch
new file mode 100644
index 0000000000..4e297715c1
--- /dev/null
+++ b/target/linux/lantiq/patches-6.6/0740-v6.11-net-dsa-lantiq_gswip-Remove-dead-code-from-gswip_add_single_port_br.patch
@@ -0,0 +1,35 @@
+From b068706b7831ccf7c7f1a56a65862fbcc28d061f Mon Sep 17 00:00:00 2001
+From: Martin Schiller <ms@dev.tdt.de>
+Date: Tue, 11 Jun 2024 15:54:32 +0200
+Subject: net: dsa: lantiq_gswip: Remove dead code from
+ gswip_add_single_port_br()
+
+The port validation in gswip_add_single_port_br() is superfluous and
+can be omitted.
+
+Suggested-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Link: https://lore.kernel.org/r/20240611135434.3180973-11-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/dsa/lantiq_gswip.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+--- a/drivers/net/dsa/lantiq_gswip.c
++++ b/drivers/net/dsa/lantiq_gswip.c
+@@ -648,14 +648,8 @@ static int gswip_add_single_port_br(stru
+ 	struct gswip_pce_table_entry vlan_active = {0,};
+ 	struct gswip_pce_table_entry vlan_mapping = {0,};
+ 	unsigned int cpu_port = priv->hw_info->cpu_port;
+-	unsigned int max_ports = priv->hw_info->max_ports;
+ 	int err;
+ 
+-	if (port >= max_ports) {
+-		dev_err(priv->dev, "single port for %i supported\n", port);
+-		return -EIO;
+-	}
+-
+ 	vlan_active.index = port + 1;
+ 	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;
+ 	vlan_active.key[0] = 0; /* vid */
diff --git a/target/linux/lantiq/patches-6.6/0741-net-dsa-lantiq_gswip-Fix-comments-in-gswip_port_vlan.patch b/target/linux/lantiq/patches-6.6/0741-v6.11-net-dsa-lantiq_gswip-Update-comments-in-gswip_port_vlan.patch
index 679dd53c47..16702c9356 100644
--- a/target/linux/lantiq/patches-6.6/0741-net-dsa-lantiq_gswip-Fix-comments-in-gswip_port_vlan.patch
+++ b/target/linux/lantiq/patches-6.6/0741-v6.11-net-dsa-lantiq_gswip-Update-comments-in-gswip_port_vlan.patch
@@ -1,7 +1,7 @@
-From 45a0371568b1f050d787564875653f41a1f6fb98 Mon Sep 17 00:00:00 2001
+From e19fbe3996aae35a467ebad35ff2b8d84975a65c Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Fri, 14 Oct 2022 14:06:40 +0200
-Subject: [PATCH 741/768] net: dsa: lantiq_gswip: Fix comments in
+Date: Tue, 11 Jun 2024 15:54:33 +0200
+Subject: net: dsa: lantiq_gswip: Update comments in
  gswip_port_vlan_filtering()
 
 Update the comments in gswip_port_vlan_filtering() so it's clear that
@@ -10,13 +10,18 @@ for "port based VLAN".
 
 Suggested-by: Martin Schiller <ms@dev.tdt.de>
 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-12-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 ---
  drivers/net/dsa/lantiq_gswip.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 --- a/drivers/net/dsa/lantiq_gswip.c
 +++ b/drivers/net/dsa/lantiq_gswip.c
-@@ -779,7 +779,7 @@ static int gswip_port_vlan_filtering(str
+@@ -773,7 +773,7 @@ static int gswip_port_vlan_filtering(str
  	}
  
  	if (vlan_filtering) {
@@ -25,7 +30,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  		gswip_switch_mask(priv,
  				  GSWIP_PCE_VCTRL_VSR,
  				  GSWIP_PCE_VCTRL_UVR | GSWIP_PCE_VCTRL_VIMR |
-@@ -788,7 +788,7 @@ static int gswip_port_vlan_filtering(str
+@@ -782,7 +782,7 @@ static int gswip_port_vlan_filtering(str
  		gswip_switch_mask(priv, GSWIP_PCE_PCTRL_0_TVM, 0,
  				  GSWIP_PCE_PCTRL_0p(port));
  	} else {
diff --git a/target/linux/lantiq/patches-6.6/0742-net-dsa-lantiq_gswip-Add-and-use-a-GSWIP_TABLE_MAC_B.patch b/target/linux/lantiq/patches-6.6/0742-net-dsa-lantiq_gswip-Add-and-use-a-GSWIP_TABLE_MAC_B.patch
deleted file mode 100644
index 3d284c2ea6..0000000000
--- a/target/linux/lantiq/patches-6.6/0742-net-dsa-lantiq_gswip-Add-and-use-a-GSWIP_TABLE_MAC_B.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 4775f9543e691d9a2f5dd9aa5d46c66d37928250 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Fri, 14 Oct 2022 14:19:05 +0200
-Subject: [PATCH 742/768] net: dsa: lantiq_gswip: Add and use a
- GSWIP_TABLE_MAC_BRIDGE_FID macro
-
-Only bits [5:0] in mac_bridge.key[3] are reserved for the FID. Add a
-macro so this becomes obvious when reading the driver code.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/net/dsa/lantiq_gswip.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/dsa/lantiq_gswip.c
-+++ b/drivers/net/dsa/lantiq_gswip.c
-@@ -238,6 +238,7 @@
- #define GSWIP_TABLE_MAC_BRIDGE		0x0b
- #define  GSWIP_TABLE_MAC_BRIDGE_STATIC	BIT(0)		/* Static not, aging entry */
- #define  GSWIP_TABLE_MAC_BRIDGE_PORT	GENMASK(7, 4)	/* Port on learned entries */
-+#define  GSWIP_TABLE_MAC_BRIDGE_FID	GENMASK(5, 0)	/* Filtering identifier */
- 
- #define XRX200_GPHY_FW_ALIGN	(16 * 1024)
- 
-@@ -1378,7 +1379,7 @@ static int gswip_port_fdb(struct dsa_swi
- 	mac_bridge.key[0] = addr[5] | (addr[4] << 8);
- 	mac_bridge.key[1] = addr[3] | (addr[2] << 8);
- 	mac_bridge.key[2] = addr[1] | (addr[0] << 8);
--	mac_bridge.key[3] = fid;
-+	mac_bridge.key[3] = FIELD_PREP(GSWIP_TABLE_MAC_BRIDGE_FID, fid);
- 	mac_bridge.val[0] = add ? BIT(port) : 0; /* port map */
- 	mac_bridge.val[1] = GSWIP_TABLE_MAC_BRIDGE_STATIC;
- 	mac_bridge.valid = add;
diff --git a/target/linux/lantiq/patches-6.6/0742-v6.11-net-dsa-lantiq_gswip-Improve-error-message-in-gswip_.patch b/target/linux/lantiq/patches-6.6/0742-v6.11-net-dsa-lantiq_gswip-Improve-error-message-in-gswip_.patch
new file mode 100644
index 0000000000..56d882c9f9
--- /dev/null
+++ b/target/linux/lantiq/patches-6.6/0742-v6.11-net-dsa-lantiq_gswip-Improve-error-message-in-gswip_.patch
@@ -0,0 +1,30 @@
+From 3b0a95ed7782dce88a5ef4860dcaab962cec9527 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Tue, 11 Jun 2024 15:54:34 +0200
+Subject: net: dsa: lantiq_gswip: Improve error message in gswip_port_fdb()
+
+Print that no FID is found for bridge %s instead of the incorrect
+message that the port is not part of a bridge.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Signed-off-by: Martin Schiller <ms@dev.tdt.de>
+Link: https://lore.kernel.org/r/20240611135434.3180973-13-ms@dev.tdt.de
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/dsa/lantiq_gswip.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/dsa/lantiq_gswip.c
++++ b/drivers/net/dsa/lantiq_gswip.c
+@@ -1363,7 +1363,8 @@ static int gswip_port_fdb(struct dsa_swi
+ 	}
+ 
+ 	if (fid == -1) {
+-		dev_err(priv->dev, "Port not part of a bridge\n");
++		dev_err(priv->dev, "no FID found for bridge %s\n",
++			bridge->name);
+ 		return -EINVAL;
+ 	}
+ 
diff --git a/target/linux/lantiq/patches-6.6/0743-net-dsa-lantiq_gswip-Improve-error-message-in-gswip_.patch b/target/linux/lantiq/patches-6.6/0743-net-dsa-lantiq_gswip-Improve-error-message-in-gswip_.patch
deleted file mode 100644
index 5c756c5a19..0000000000
--- a/target/linux/lantiq/patches-6.6/0743-net-dsa-lantiq_gswip-Improve-error-message-in-gswip_.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 00b5121435ccd4ce54f79179dd9ee3e2610d7dcf Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Fri, 14 Oct 2022 16:31:57 +0200
-Subject: [PATCH 743/768] net: dsa: lantiq_gswip: Improve error message in
- gswip_port_fdb()
-
-Print the port which is not found to be part of a bridge so it's easier
-to investigate the underlying issue.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/net/dsa/lantiq_gswip.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/dsa/lantiq_gswip.c
-+++ b/drivers/net/dsa/lantiq_gswip.c
-@@ -1370,7 +1370,8 @@ static int gswip_port_fdb(struct dsa_swi
- 	}
- 
- 	if (fid == -1) {
--		dev_err(priv->dev, "Port not part of a bridge\n");
-+		dev_err(priv->dev,
-+			"Port %d is not known to be part of bridge\n", port);
- 		return -EINVAL;
- 	}
- 
diff --git a/target/linux/layerscape/Makefile b/target/linux/layerscape/Makefile
index 30b9fb8f73..e0bc544f43 100644
--- a/target/linux/layerscape/Makefile
+++ b/target/linux/layerscape/Makefile
@@ -7,8 +7,7 @@ include $(TOPDIR)/rules.mk
 BOARD:=layerscape
 BOARDNAME:=NXP Layerscape
 
-KERNEL_PATCHVER:=6.1
-KERNEL_TESTING_PATCHVER:=6.6
+KERNEL_PATCHVER:=6.6
 
 FEATURES:=squashfs nand usb pcie gpio fpu ubifs ext4 rootfs-part boot-part
 SUBTARGETS:=armv8_64b armv7
diff --git a/target/linux/layerscape/armv8_64b/config-6.1 b/target/linux/layerscape/armv8_64b/config-6.1
index a2a4a633af..2ebe59c7cc 100644
--- a/target/linux/layerscape/armv8_64b/config-6.1
+++ b/target/linux/layerscape/armv8_64b/config-6.1
@@ -104,9 +104,6 @@ CONFIG_BLK_MQ_VIRTIO=y
 CONFIG_BLK_PM=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_BTRFS_FS=y
-# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
-CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_CAVIUM_ERRATUM_22375=y
 CONFIG_CAVIUM_ERRATUM_23144=y
 CONFIG_CAVIUM_ERRATUM_23154=y
diff --git a/target/linux/layerscape/armv8_64b/config-6.6 b/target/linux/layerscape/armv8_64b/config-6.6
index f95b4603be..6d9d2ba2d5 100644
--- a/target/linux/layerscape/armv8_64b/config-6.6
+++ b/target/linux/layerscape/armv8_64b/config-6.6
@@ -105,9 +105,6 @@ CONFIG_BLK_MQ_VIRTIO=y
 CONFIG_BLK_PM=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_BTRFS_FS=y
-# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
-CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_BUFFER_HEAD=y
 CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
 CONFIG_CAVIUM_ERRATUM_22375=y
diff --git a/target/linux/layerscape/armv8_64b/target.mk b/target/linux/layerscape/armv8_64b/target.mk
index c9a61701a9..d880afa7a3 100644
--- a/target/linux/layerscape/armv8_64b/target.mk
+++ b/target/linux/layerscape/armv8_64b/target.mk
@@ -5,6 +5,7 @@
 ARCH:=aarch64
 BOARDNAME:=ARMv8 64-bit based boards
 KERNELNAME:=Image dtbs
+DEPENDS:=+@KERNEL_BTRFS_FS +@KERNEL_BTRFS_FS_POSIX_ACL
 
 define Target/Description
 	Build firmware images for NXP Layerscape ARMv8 64-bit based boards.
diff --git a/target/linux/layerscape/image/armv7.mk b/target/linux/layerscape/image/armv7.mk
index 916f92eacf..6812d94e1f 100644
--- a/target/linux/layerscape/image/armv7.mk
+++ b/target/linux/layerscape/image/armv7.mk
@@ -6,11 +6,7 @@ define Device/Default
   PROFILES := Default
   FILESYSTEMS := squashfs
   IMAGES := firmware.bin sysupgrade.bin
-ifdef CONFIG_LINUX_6_1
-  DEVICE_DTS_DIR := $(DTS_DIR)
-else
   DEVICE_DTS_DIR := $(DTS_DIR)/nxp/ls
-endif
   KERNEL := kernel-bin | uImage none
   KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
   KERNEL_NAME := zImage
diff --git a/target/linux/layerscape/patches-6.1/302-arm64-dts-ls1012a-update-with-ppfe-support.patch b/target/linux/layerscape/patches-6.1/302-arm64-dts-ls1012a-update-with-ppfe-support.patch
deleted file mode 100644
index 70e624a2a9..0000000000
--- a/target/linux/layerscape/patches-6.1/302-arm64-dts-ls1012a-update-with-ppfe-support.patch
+++ /dev/null
@@ -1,288 +0,0 @@
-From 1bb35ff4ce33e65601c8d9c736be52e4aabd6252 Mon Sep 17 00:00:00 2001
-From: Calvin Johnson <calvin.johnson@nxp.com>
-Date: Sat, 16 Sep 2017 14:20:23 +0530
-Subject: [PATCH] arm64: dts: freescale: ls1012a: update with ppfe support
-
-Update ls1012a dtsi and platform dts files with support for ppfe.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
----
- .../boot/dts/freescale/fsl-ls1012a-frdm.dts   | 43 +++++++++++++++++
- .../boot/dts/freescale/fsl-ls1012a-frwy.dts   | 43 +++++++++++++++++
- .../boot/dts/freescale/fsl-ls1012a-qds.dts    | 43 +++++++++++++++++
- .../boot/dts/freescale/fsl-ls1012a-rdb.dts    | 47 +++++++++++++++++++
- .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 29 ++++++++++++
- 5 files changed, 205 insertions(+)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-@@ -14,6 +14,11 @@
- 	model = "LS1012A Freedom Board";
- 	compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
- 
-+	aliases {
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
-+	};
-+
- 	sys_mclk: clock-mclk {
- 		compatible = "fixed-clock";
- 		#clock-cells = <0>;
-@@ -95,6 +100,44 @@
- 	};
- };
- 
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	pfe_mac0: ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	pfe_mac1: ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
-+
- &qspi {
- 	status = "okay";
- 
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
-@@ -14,6 +14,11 @@
- / {
- 	model = "LS1012A FRWY Board";
- 	compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
-+
-+	aliases {
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
-+	};
- };
- 
- &duart0 {
-@@ -28,6 +33,44 @@
- 	status = "okay";
- };
- 
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	pfe_mac0: ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	pfe_mac1: ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
-+
- &qspi {
- 	status = "okay";
- 
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-@@ -18,6 +18,11 @@
- 		mmc1 = &esdhc1;
- 	};
- 
-+	aliases {
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
-+	};
-+
- 	sys_mclk: clock-mclk {
- 		compatible = "fixed-clock";
- 		#clock-cells = <0>;
-@@ -132,6 +137,44 @@
- 		};
- 	};
- };
-+
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	pfe_mac0: ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x2>;
-+		phy-mode = "sgmii-2500";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	pfe_mac1: ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x3>;
-+		phy-mode = "sgmii-2500";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
- 
- &qspi {
- 	status = "okay";
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-@@ -16,6 +16,8 @@
- 
- 	aliases {
- 		serial0 = &duart0;
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
- 		mmc0 = &esdhc0;
- 		mmc1 = &esdhc1;
- 	};
-@@ -86,6 +88,44 @@
- 	};
- };
- 
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	pfe_mac0: ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	pfe_mac1: ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = < 0x1 >;	/* BUS_ID */
-+		fsl,gemac-phy-id = < 0x1 >;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "rgmii-txid";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
-+
- &qspi {
- 	status = "okay";
- 
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-@@ -568,6 +568,35 @@
- 		};
- 	};
- 
-+	reserved-memory {
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		pfe_reserved: packetbuffer@83400000 {
-+			reg = <0 0x83400000 0 0xc00000>;
-+		};
-+	};
-+
-+	pfe: pfe@04000000 {
-+		compatible = "fsl,pfe";
-+		reg =   <0x0 0x04000000 0x0 0xc00000>,	/* AXI 16M */
-+			<0x0 0x83400000 0x0 0xc00000>;  /* PFE DDR 12M */
-+		reg-names = "pfe", "pfe-ddr";
-+		fsl,pfe-num-interfaces = <0x2>;
-+		interrupts = <0 172 0x4>,    /* HIF interrupt */
-+			     <0 173 0x4>,    /*HIF_NOCPY interrupt */
-+			     <0 174 0x4>;    /* WoL interrupt */
-+		interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
-+		memory-region = <&pfe_reserved>;
-+		fsl,pfe-scfg = <&scfg 0>;
-+		fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
-+		clocks = <&clockgen 4 0>;
-+		clock-names = "pfe";
-+
-+		status = "okay";
-+	};
-+
- 	firmware {
- 		optee {
- 			compatible = "linaro,optee-tz";
diff --git a/target/linux/layerscape/patches-6.1/303-arm64-dts-ls1012a-frdm-workaround-by-updating-qspi-f.patch b/target/linux/layerscape/patches-6.1/303-arm64-dts-ls1012a-frdm-workaround-by-updating-qspi-f.patch
deleted file mode 100644
index 5d19cb92dc..0000000000
--- a/target/linux/layerscape/patches-6.1/303-arm64-dts-ls1012a-frdm-workaround-by-updating-qspi-f.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 9c5c18dbf8e1845d349ef7020f8af5bc9b56ed1f Mon Sep 17 00:00:00 2001
-From: Pawel Dembicki <paweldembicki@gmail.com>
-Date: Fri, 28 Sep 2022 17:14:32 +0200
-Subject: [PATCH] arm64: dts: ls1012a-frdm/qds: workaround by updating qspi flash to
- single mode
-
-Update rx and tx bus-width to 1 to use single mode to workaround ubifs
-issue found with double mode. (The same method as RDB board)
-
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 4 ++--
- arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  | 4 ++--
- 2 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-@@ -148,8 +148,8 @@
- 		spi-max-frequency = <50000000>;
- 		m25p,fast-read;
- 		reg = <0>;
--		spi-rx-bus-width = <2>;
--		spi-tx-bus-width = <2>;
-+		spi-rx-bus-width = <1>;
-+		spi-tx-bus-width = <1>;
- 	};
- };
- 
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-@@ -186,8 +186,8 @@
- 		spi-max-frequency = <50000000>;
- 		m25p,fast-read;
- 		reg = <0>;
--		spi-rx-bus-width = <2>;
--		spi-tx-bus-width = <2>;
-+		spi-rx-bus-width = <1>;
-+		spi-tx-bus-width = <1>;
- 	};
- };
- 
diff --git a/target/linux/layerscape/patches-6.1/304-arm64-dts-ls1012a-rdb-workaround-by-updating-qspi-fl.patch b/target/linux/layerscape/patches-6.1/304-arm64-dts-ls1012a-rdb-workaround-by-updating-qspi-fl.patch
deleted file mode 100644
index 53cfd193b7..0000000000
--- a/target/linux/layerscape/patches-6.1/304-arm64-dts-ls1012a-rdb-workaround-by-updating-qspi-fl.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 9c5c18dbf8e1845d349ef7020f8af5bc9b56ed1f Mon Sep 17 00:00:00 2001
-From: Kuldeep Singh <kuldeep.singh@nxp.com>
-Date: Tue, 7 Jan 2020 17:14:32 +0530
-Subject: [PATCH] arm64: dts: ls1012a-rdb: workaround by updating qspi flash to
- single mode
-
-Update rx and tx bus-width to 1 to use single mode to workaround ubifs
-issue found with double mode.
-
-[ Leo: Local workaround ]
-
-Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-@@ -136,8 +136,8 @@
- 		spi-max-frequency = <50000000>;
- 		m25p,fast-read;
- 		reg = <0>;
--		spi-rx-bus-width = <2>;
--		spi-tx-bus-width = <2>;
-+		spi-rx-bus-width = <1>;
-+		spi-tx-bus-width = <1>;
- 	};
- };
- 
diff --git a/target/linux/layerscape/patches-6.1/305-arm64-dts-ls1046a-rdb-Update-qspi-spi-rx-bus-width-t.patch b/target/linux/layerscape/patches-6.1/305-arm64-dts-ls1046a-rdb-Update-qspi-spi-rx-bus-width-t.patch
deleted file mode 100644
index 9bc4e2b520..0000000000
--- a/target/linux/layerscape/patches-6.1/305-arm64-dts-ls1046a-rdb-Update-qspi-spi-rx-bus-width-t.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 38093ebbf25eb60a1aa863f46118a68a0300c56e Mon Sep 17 00:00:00 2001
-From: Kuldeep Singh <kuldeep.singh@nxp.com>
-Date: Fri, 3 Jan 2020 14:49:07 +0530
-Subject: [PATCH] arm64: dts: ls1046a-rdb: Update qspi spi-rx-bus-width to 1
-
-Update rx width from quad mode to single mode as a workaround.
-
-[Leo: Local workaround ]
-
-Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
-@@ -104,7 +104,7 @@
- 		#address-cells = <1>;
- 		#size-cells = <1>;
- 		spi-max-frequency = <50000000>;
--		spi-rx-bus-width = <4>;
-+		spi-rx-bus-width = <1>;
- 		spi-tx-bus-width = <1>;
- 		reg = <0>;
- 	};
-@@ -114,7 +114,7 @@
- 		#address-cells = <1>;
- 		#size-cells = <1>;
- 		spi-max-frequency = <50000000>;
--		spi-rx-bus-width = <4>;
-+		spi-rx-bus-width = <1>;
- 		spi-tx-bus-width = <1>;
- 		reg = <1>;
- 	};
diff --git a/target/linux/layerscape/patches-6.1/400-LF-20-3-mtd-spi-nor-Use-1-bit-mode-of-spansion-s25fs.patch b/target/linux/layerscape/patches-6.1/400-LF-20-3-mtd-spi-nor-Use-1-bit-mode-of-spansion-s25fs.patch
deleted file mode 100644
index b06c0f8133..0000000000
--- a/target/linux/layerscape/patches-6.1/400-LF-20-3-mtd-spi-nor-Use-1-bit-mode-of-spansion-s25fs.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 20b1193c8c1d81a8d44ae36e579f70e6fbab45b9 Mon Sep 17 00:00:00 2001
-From: Han Xu <han.xu@nxp.com>
-Date: Tue, 14 Apr 2020 11:58:44 -0500
-Subject: [PATCH] LF-20-3 mtd: spi-nor: Use 1 bit mode of spansion(s25fs512s)
- flash
-
-This is a workaround patch which uses only single bit mode of s25fs512s
-flash
-
-Signed-off-by: Han Xu <han.xu@nxp.com>
-Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
----
- drivers/mtd/spi-nor/spansion.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/spansion.c
-+++ b/drivers/mtd/spi-nor/spansion.c
-@@ -398,8 +398,8 @@ static const struct flash_info spansion_
- 		MFR_FLAGS(USE_CLSR)
- 	},
- 	{ "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
--		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- 		MFR_FLAGS(USE_CLSR)
-+		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
- 		.fixups = &s25fs_s_nor_fixups, },
- 	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64) },
- 	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256) },
diff --git a/target/linux/layerscape/patches-6.1/701-staging-add-fsl_ppfe-driver.patch b/target/linux/layerscape/patches-6.1/701-staging-add-fsl_ppfe-driver.patch
deleted file mode 100644
index a52ac6201f..0000000000
--- a/target/linux/layerscape/patches-6.1/701-staging-add-fsl_ppfe-driver.patch
+++ /dev/null
@@ -1,11808 +0,0 @@
-From 4bb50554937246443767e89d32e54df7a12396ca Mon Sep 17 00:00:00 2001
-From: Calvin Johnson <calvin.johnson@nxp.com>
-Date: Sat, 16 Sep 2017 07:05:49 +0530
-Subject: [PATCH] staging: add fsl_ppfe driver
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This is squash of all commits with ppfe driver taken from NXP 6.1 tree:
-https://github.com/nxp-qoriq/linux/tree/lf-6.1.y
-
-List of original commits:
-
-net: fsl_ppfe: dts binding for ppfe
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: header files for pfe driver
-
-This patch has all pfe header files.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: introduce pfe driver
-
-	This patch introduces Linux support for NXP's LS1012A Packet
-Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding
-engine to provide high performance Ethernet interfaces. The device
-includes two Ethernet ports.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: fix RGMII tx delay issue
-
-Recently logic to enable RGMII tx delay was changed by
-below patch.
-
-https://patchwork.kernel.org/patch/9447581/
-
-Based on the patch, appropriate change is made in PFE driver.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: remove unused functions
-
-Remove unused functions hif_xmit_pkt & hif_lib_xmit_pkt.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: fix read/write/ack idx issue
-
-While fixing checkpatch errors some of the index increments
-were commented out. They are enabled.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: Make phy_ethtool_ksettings_get return void
-
-Make return value void since function never return meaningful value
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: add function to update tmu credits
-
-__hif_lib_update_credit function is used to update the tmu credits.
-If tx_qos is set, tmu credit is updated based on the number of packets
-transmitted by tmu.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: Avoid packet drop at TMU queues
-
-Added flow control between TMU queues and PFE Linux driver,
-based on TMU credits availability.
-Added tx_qos module parameter to control this behavior.
-Use queue-0 as default queue to transmit packets.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-Signed-off-by: Akhila Kavi <akhila.kavi@nxp.com>
-Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: Enable PFE in clause 45 mode
-
-when we opearate in clause 45 mode, we need to call
-the function get_phy_device() with its 3rd argument as
-"true" and then the resultant phy device needs to be
-register with phy layer via phy_device_register()
-
-Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-
-staging: fsl_ppfe/eth: Disable autonegotiation for 2.5G SGMII
-
-PCS initialization sequence for 2.5G SGMII interface governs
-auto negotiation to be in disabled mode
-
-Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-
-staging: fsl_ppfe/eth: calculate PFE_PKT_SIZE with SKB_DATA_ALIGN
-
-pfe packet size was calculated without considering skb data alignment
-and this resulted in jumbo frames crashing kernel when the
-cacheline size increased from 64 to 128 bytes with
-commit 97303480753e ("arm64: Increase the max granular size").
-
-Modify pfe packet size caclulation to include skb data alignment of
-sizeof(struct skb_shared_info).
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: support for userspace networking
-
-This patch adds the userspace mode support to fsl_ppfe network driver.
-In the new mode, basic hardware initialization is performed in kernel, while
-the datapath and HIF handling is the responsibility of the userspace.
-
-The new command line parameter is added to initialize the ppfe module
-in userspace mode. By default the module remains in kernelspace networking
-mode.
-To enable userspace mode, use "insmod pfe.ko us=1"
-
-Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
-Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
-
-staging: fsl_ppfe/eth: unregister netdev after pfe_phy_exit
-
-rmmod pfe.ko throws below warning:
-
-kernfs: can not remove 'phydev', no directory
-------------[ cut here ]------------
-WARNING: CPU: 0 PID: 2230 at fs/kernfs/dir.c:1481
-kernfs_remove_by_name_ns+0x90/0xa0
-
-This is caused when the unregistered netdev structure is accessed to
-disconnect phy.
-
-Resolve the issue by unregistering netdev after disconnecting phy.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: HW parse results for DPDK
-
-HW Parse results are included in the packet headroom.
-Length and Offset calculation now accommodates parse info size.
-
-Signed-off-by: Archana Madhavan <archana.madhavan@nxp.com>
-
-staging: fsl_ppfe/eth: reorganize pfe_netdev_ops
-
-Reorganize members of struct pfe_netdev_ops to match with the order
-of members in struct net_device_ops defined in include/linux/netdevice.h
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: use mask for rx max frame len
-
-Define and use PFE_RCR_MAX_FL_MASK to properly set Rx max frame
-length of MAC Receive Control Register.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: define pfe ndo_change_mtu function
-
-Define ndo_change_mtu function for pfe. This sets the max Rx frame
-length to the new mtu.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: remove jumbo frame enable from gemac init
-
-MAC Receive Control Register was configured to allow jumbo frames.
-This is removed as jumbo frames can be supported anytime by changing
-mtu which will in turn modify MAX_FL field of MAC RCR.
-Jumbo frames caused pfe to hang on LS1012A rev 1.0 Silicon due to
-erratum A-010897.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: disable CRC removal
-
-Disable CRC removal from the packet, so that packets are forwarded
-as is to Linux.
-CRC configuration in MAC will be reflected in the packet received
-to Linux.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: handle ls1012a errata_a010897
-
-On LS1012A rev 1.0, Jumbo frames are not supported as it causes
-the PFE controller to hang. A reset of the entire chip is required
-to resume normal operation.
-
-To handle this errata, frames with length > 1900 are truncated for
-rev 1.0 of LS1012A.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: replace magic numbers
-
-Replace magic numbers and some cosmetic changes.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: resolve indentation warning
-
-Resolve the following indentation warning:
-
-drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:
-In function ‘pfe_get_gemac_if_proprties’:
-drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:96:2:
-warning: this ‘else’ clause does not guard...
-[-Wmisleading-indentation]
-  else
-  ^~~~
-drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:98:3:
-note: ...this statement, but the latter is misleadingly indented as
-if it were guarded by the ‘else’
-   pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
-   ^~~~~
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: add fixed-link support
-
-In cases where MAC is not connected to a normal MDIO-managed PHY
-device, and instead to a switch, it is configured as a "fixed-link".
-Code to handle this scenario is added here.
-
-phy_node in the dtb is checked to identify a fixed-link.
-On identification of a fixed-link, it is registered and connected.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe: add support for a char dev for link status
-
-Read and IOCTL support is added. Application would need to open,
-read/ioctl the /dev/pfe_us_cdev device.
-select is pending as it requires a wait_queue.
-
-Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe: enable hif event from userspace
-
-HIF interrupts are enabled using ioctl from user space,
-and epoll wait from user space wakes up when there is an HIF
-interrupt.
-
-Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
-
-staging: fsl_ppfe: performance tuning for user space
-
-interrupt coalescing of 100 usec is added.
-
-Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
-Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
-
-staging: fsl_ppfe/eth: Update to use SPDX identifiers
-
-Replace license text with corresponding SPDX identifiers and update the
-format of existing SPDX identifiers to follow the new guideline
-Documentation/process/license-rules.rst.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: misc clean up
-
-- remove redundant hwfeature init
-- remove unused vars from ls1012a_eth_platform_data
-- To handle ls1012a errata_a010897, PPFE driver requires GUTS driver
-to be compiled in. Select FSL_GUTS when PPFE driver is compiled.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: reorganize platform phy parameters
-
-- Use "phy-handle" and of_* functions to get phy node and fixed-link
-parameters
-
-- Reorganize phy parameters and initialize them only if phy-handle
-or fixed-link is defined in the dtb.
-
-- correct typo pfe_get_gemac_if_proprties to pfe_get_gemac_if_properties
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: support single interface initialization
-
-- arrange members of struct mii_bus in sequence matching phy.h
-- if mdio node is defined, use of_mdiobus_register to register
-  child nodes (phy devices) available on the mdio bus.
-- remove of_phy_register_fixed_link from pfe_phy_init as it is being
-  handled in pfe_get_gemac_if_properties
-- remove mdio enabled check
-- skip phy init, if no PHY or fixed-link
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-net: fsl_ppfe: update dts properties for phy
-
-Use commonly used phy-handle property and mdio subnode to handle
-phy properties.
-
-Deprecate bindings fsl,gemac-phy-id & fsl,pfe-phy-if-flags.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: remove unused code
-
-- remove gemac-bus-id related code that is unused.
-- remove unused prototype gemac_set_mdc_div.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: separate mdio init from mac init
-
-- separate mdio initialization from mac initialization
-- Define pfe_mdio_priv_s structure to hold mii_bus structure and other
-  related data.
-- Modify functions to work with the separted mdio init model.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: adapt to link mode based phydev changes
-
-Setting link mode bits have changed with the integration of
-commit (3c1bcc8 net: ethernet: Convert phydev advertize and
-supported from u32 to link mode). Adapt to the new method of
-setting and clearing the link mode bits.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: use generic soc_device infra instead of fsl_guts_get_svr()
-
-Commit ("soc: fsl: guts: make fsl_guts_get_svr() static") has
-made fsl_guts_get_svr() static and hence use generic soc_device
-infrastructure to check SoC revision.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: use memremap() to map RAM area used by PFE
-
-RAM area used by PFE should be mapped using memremap() instead of
-directly traslating physical addr to virtual. This will ensure proper
-checks are done before the area is used.
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-
-staging: fsl_ppfe/eth: remove 'fallback' argument from dev->ndo_select_queue()
-
-To be consistent with upstream API change.
-
-Signed-off-by: Li Yang <leoyang.li@nxp.com>
-
-staging: fsl_ppfe/eth: prefix header search paths with $(srctree)/
-
-Currently, the rules for configuring search paths in Kbuild have
-changed: https://lkml.org/lkml/2019/5/13/37
-
-This will lead the below error:
-
-fatal error: pfe/pfe.h: No such file or directory
-
-Fix it by adding $(srctree)/ prefix to the search paths.
-
-Signed-off-by: Ting Liu <ting.liu@nxp.com>
-
-staging: fsl_ppfe/eth: add pfe support to Kconfig and Makefile
-
-Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-[ Aisheng: fix minor conflict due to removed VBOXSF_FS ]
-Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
-
-staging: fsl_ppfe/eth: Disable termination of CRC fwd.
-
-LS1012A MAC PCS block has an erratum that is seen with specific PHY AR803x.
-The issue is triggered by the (spec-compliant) operation of the AR803x PHY
-on the LS1012A-FRWY board.Due to this, good FCS packet is reported as error
-packet by MAC, so for these error packets FCS should be validated and
-discard only real error packets in PFE Rx packet path.
-
-Signed-off-by: Nagesh Koneti <koneti.nagesh@nxp.com>
-Signed-off-by: Nagesh Koneti <“koneti.nagesh@nxp.com”>
-
-net: ppfe: Cope with of_get_phy_mode() API change
-
-Signed-off-by: Li Yang <leoyang.li@nxp.com>
-
-staging: fsl_ppfe/eth: Enhance error checking in platform probe
-
-Fix the kernel crash when MAC addr is not passed in dtb.
-
-Signed-off-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: reject unsupported coalescing params
-
-Set ethtool_ops->supported_coalesce_params to let
-the core reject unsupported coalescing parameters.
-
-Signed-off-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth:check "reg" property before pfe_get_gemac_if_properties()
-
-It has been observed that the function pfe_get_gemac_if_properties() is
-been called blindly for the next two child nodes. There might be some
-cases where it may go wrong and that lead to missing interfaces.
-with these changes it is ensured thats not the case.
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: "struct firmware" dereference is reduced in many functions
-
-firmware structure's data variable is the actual elf data. It has been
-dereferenced in multiple functions and this has been reduced.
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: LF-27 load pfe binaries from FDT
-
-FDT prepared in uboot now has pfe firmware part of it.
-These changes will read the firmware by default from it and tries to load
-the elf into the PFE PEs. This help build the pfe driver pasrt of kernel.
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
-
-staging: fsl_ppfe/eth: proper handling for RGMII delay mode
-
-The correct setting for the RGMII ports on LS1012ARDB is to
-enable delay on both Tx and Rx. So the phy mode to be matched
-is PHY_INTERFACE_MODE_RGMII_ID.
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-Signed-off-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-LF-1762-2 staging: fsl_ppfe: replace '---help---' in Kconfig files with 'help'
-
-Update Kconfig to cope with upstream change
-commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over
-'---help---'").
-
-Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
-
-staging: fsl_ppfe/eth: Nesting level does not match indentation
-
-corrected nesting level
-LF-1661 and Coverity CID: 8879316
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Initialized scalar variable
-
-Proper initialization of scalar variable
-LF-1657 and Coverity CID: 3335133
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: misspelt variable name
-
-variable name corrected
-LF-1656 and Coverity CID: 3335119
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Avoiding out-of-bound writes
-
-avoid out-of-bound writes with proper error handling
-LF-1654, LF-1652 and Coverity CID: 3335106, 3335090
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Initializing scalar variable
-
-proper initialization of scalar variable.
-LF-1653 and Coverity CID: 3335101
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: checking return value
-
-proper checks added and handled for return value.
-LF-1644 and Coverity CID: 241888
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Avoid out-of-bound access
-
-proper handling to avoid out-of-bound access
-LF-1642, LF-1641 and Coverity CID: 240910, 240891
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Avoiding out-of-bound writes
-
-avoid out-of-bound writes with proper error handling
-LF-1654, LF-1652 and Coverity CID: 3335106, 3335090
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: return value init in error case
-
-proper err return in error case.
-LF-1806 and Coverity CID: 10468592
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Avoid recursion in header inclusion
-
-Avoiding header inclusions that are not necessary and also that are
-causing header inclusion recursion.
-
-LF-2102 and Coverity CID: 240838
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Avoiding return value overwrite
-
-avoid return value overwrite at the end of function.
-LF-2136, LF-2137 and Coverity CID: 8879341, 8879364
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: LF-27 enabling PFE firmware load from FDT
-
-The macro, "LOAD_PFEFIRMWARE_FROM_FILESYSTEM" is been disabled to load
-the firmware from FDT by default. Enabling the macro will load the
-firmware from filesystem.
-
-Also, the Makefile is now tuned to build pfe as per the config option
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: Ethtool stats correction for IEEE_rx_drop counter
-
-Due to carrier extended bug the phy counter IEEE_rx_drop counter is
-incremented some times and phy reports the packet has crc error.
-Because of this PFE revalidates all the packets that are marked crc
-error by phy. Now, the counter phy reports is till bogus and this
-patch decrements the counter by pfe revalidated (and are crc ok)
-counter amount.
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe/eth: PFE firmware load enhancements
-
-PFE driver enhancements to load the PE firmware from filesystem
-when the firmware is not found in FDT.
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe: deal with upstream API change of of_get_mac_address()
-
-Uptream commit 83216e398 changed the of_get_mac_address() API, update
-the user accordingly.
-
-Signed-off-by: Li Yang <leoyang.li@nxp.com>
-
-staging: fsl_ppfe: update coalesce setting uAPI usage
-
-API changed since:
-f3ccfda19319 ("ethtool: extend coalesce setting uAPI with CQE mode")
-
-Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
-
-staging: fsl_ppfe: Addressed build warnings
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-staging: fsl_ppfe: Addressed build warnings
-
-Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
-
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
----
- .../devicetree/bindings/net/fsl_ppfe/pfe.txt  |  199 ++
- MAINTAINERS                                   |    8 +
- drivers/staging/Kconfig                       |    2 +
- drivers/staging/Makefile                      |    1 +
- drivers/staging/fsl_ppfe/Kconfig              |   21 +
- drivers/staging/fsl_ppfe/Makefile             |   20 +
- drivers/staging/fsl_ppfe/TODO                 |    2 +
- drivers/staging/fsl_ppfe/include/pfe/cbus.h   |   78 +
- .../staging/fsl_ppfe/include/pfe/cbus/bmu.h   |   55 +
- .../fsl_ppfe/include/pfe/cbus/class_csr.h     |  289 ++
- .../fsl_ppfe/include/pfe/cbus/emac_mtip.h     |  242 ++
- .../staging/fsl_ppfe/include/pfe/cbus/gpi.h   |   86 +
- .../staging/fsl_ppfe/include/pfe/cbus/hif.h   |  100 +
- .../fsl_ppfe/include/pfe/cbus/hif_nocpy.h     |   50 +
- .../fsl_ppfe/include/pfe/cbus/tmu_csr.h       |  168 ++
- .../fsl_ppfe/include/pfe/cbus/util_csr.h      |   61 +
- drivers/staging/fsl_ppfe/include/pfe/pfe.h    |  372 +++
- drivers/staging/fsl_ppfe/pfe_cdev.c           |  258 ++
- drivers/staging/fsl_ppfe/pfe_cdev.h           |   41 +
- drivers/staging/fsl_ppfe/pfe_ctrl.c           |  226 ++
- drivers/staging/fsl_ppfe/pfe_ctrl.h           |  100 +
- drivers/staging/fsl_ppfe/pfe_debugfs.c        |   99 +
- drivers/staging/fsl_ppfe/pfe_debugfs.h        |   13 +
- drivers/staging/fsl_ppfe/pfe_eth.c            | 2588 +++++++++++++++++
- drivers/staging/fsl_ppfe/pfe_eth.h            |  175 ++
- drivers/staging/fsl_ppfe/pfe_firmware.c       |  398 +++
- drivers/staging/fsl_ppfe/pfe_firmware.h       |   21 +
- drivers/staging/fsl_ppfe/pfe_hal.c            | 1517 ++++++++++
- drivers/staging/fsl_ppfe/pfe_hif.c            | 1063 +++++++
- drivers/staging/fsl_ppfe/pfe_hif.h            |  199 ++
- drivers/staging/fsl_ppfe/pfe_hif_lib.c        |  628 ++++
- drivers/staging/fsl_ppfe/pfe_hif_lib.h        |  229 ++
- drivers/staging/fsl_ppfe/pfe_hw.c             |  164 ++
- drivers/staging/fsl_ppfe/pfe_hw.h             |   15 +
- .../staging/fsl_ppfe/pfe_ls1012a_platform.c   |  383 +++
- drivers/staging/fsl_ppfe/pfe_mod.c            |  158 +
- drivers/staging/fsl_ppfe/pfe_mod.h            |  103 +
- drivers/staging/fsl_ppfe/pfe_perfmon.h        |   26 +
- drivers/staging/fsl_ppfe/pfe_sysfs.c          |  840 ++++++
- drivers/staging/fsl_ppfe/pfe_sysfs.h          |   17 +
- 40 files changed, 11015 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt
- create mode 100644 drivers/staging/fsl_ppfe/Kconfig
- create mode 100644 drivers/staging/fsl_ppfe/Makefile
- create mode 100644 drivers/staging/fsl_ppfe/TODO
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/bmu.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/class_csr.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/emac_mtip.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/gpi.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/hif.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/hif_nocpy.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/tmu_csr.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/cbus/util_csr.h
- create mode 100644 drivers/staging/fsl_ppfe/include/pfe/pfe.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_cdev.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_cdev.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_ctrl.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_ctrl.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_debugfs.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_debugfs.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_eth.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_eth.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_firmware.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_firmware.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hal.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hif.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hif.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hif_lib.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hif_lib.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hw.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_hw.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_mod.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_mod.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_perfmon.h
- create mode 100644 drivers/staging/fsl_ppfe/pfe_sysfs.c
- create mode 100644 drivers/staging/fsl_ppfe/pfe_sysfs.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt
-@@ -0,0 +1,199 @@
-+=============================================================================
-+NXP Programmable Packet Forwarding Engine Device Bindings
-+
-+CONTENTS
-+  - PFE Node
-+  - Ethernet Node
-+
-+=============================================================================
-+PFE Node
-+
-+DESCRIPTION
-+
-+PFE Node has all the properties associated with Packet Forwarding Engine block.
-+
-+PROPERTIES
-+
-+- compatible
-+		Usage: required
-+		Value type: <stringlist>
-+		Definition: Must include "fsl,pfe"
-+
-+- reg
-+		Usage: required
-+		Value type: <prop-encoded-array>
-+		Definition: A standard property.
-+		Specifies the offset of the following registers:
-+		- PFE configuration registers
-+		- DDR memory used by PFE
-+
-+- fsl,pfe-num-interfaces
-+		Usage: required
-+		Value type: <u32>
-+		Definition: Must be present. Value can be either one or two.
-+
-+- interrupts
-+		Usage: required
-+		Value type: <prop-encoded-array>
-+		Definition: Three interrupts are specified in this property.
-+		- HIF interrupt
-+		- HIF NO COPY interrupt
-+		- Wake On LAN interrupt
-+
-+- interrupt-names
-+		Usage: required
-+		Value type: <stringlist>
-+		Definition: Following strings are defined for the 3 interrupts.
-+		"pfe_hif" - HIF interrupt
-+		"pfe_hif_nocpy" - HIF NO COPY interrupt
-+		"pfe_wol" - Wake On LAN interrupt
-+
-+- memory-region
-+		Usage: required
-+		Value type: <phandle>
-+		Definition: phandle to a node describing reserved memory used by pfe.
-+		Refer:- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
-+
-+- fsl,pfe-scfg
-+		Usage: required
-+		Value type: <phandle>
-+		Definition: phandle for scfg.
-+
-+- fsl,rcpm-wakeup
-+		Usage: required
-+		Value type: <phandle>
-+		Definition: phandle for rcpm.
-+
-+- clocks
-+		Usage: required
-+		Value type: <phandle>
-+		Definition: phandle for clockgen.
-+
-+- clock-names
-+		Usage: required
-+		Value type: <string>
-+		Definition: phandle for clock name.
-+
-+EXAMPLE
-+
-+pfe: pfe@04000000 {
-+	compatible = "fsl,pfe";
-+	reg =   <0x0 0x04000000 0x0 0xc00000>,	/* AXI 16M */
-+		<0x0 0x83400000 0x0 0xc00000>;  /* PFE DDR 12M */
-+	reg-names = "pfe", "pfe-ddr";
-+	fsl,pfe-num-interfaces = <0x2>;
-+	interrupts = <0 172 0x4>,    /* HIF interrupt */
-+		     <0 173 0x4>,    /*HIF_NOCPY interrupt */
-+		     <0 174 0x4>;    /* WoL interrupt */
-+	interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
-+	memory-region = <&pfe_reserved>;
-+	fsl,pfe-scfg = <&scfg 0>;
-+	fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
-+	clocks = <&clockgen 4 0>;
-+	clock-names = "pfe";
-+
-+	status = "okay";
-+	pfe_mac0: ethernet@0 {
-+	};
-+
-+	pfe_mac1: ethernet@1 {
-+	};
-+};
-+
-+=============================================================================
-+Ethernet Node
-+
-+DESCRIPTION
-+
-+Ethernet Node has all the properties associated with PFE used by platforms to
-+connect to PHY:
-+
-+PROPERTIES
-+
-+- compatible
-+		Usage: required
-+		Value type: <stringlist>
-+		Definition: Must include "fsl,pfe-gemac-port"
-+
-+- reg
-+		Usage: required
-+		Value type: <prop-encoded-array>
-+		Definition: A standard property.
-+		Specifies the gemacid of the interface.
-+
-+- fsl,gemac-bus-id
-+		Usage: required
-+		Value type: <u32>
-+		Definition: Must be present. Value should be the id of the bus
-+		connected to gemac.
-+
-+- fsl,gemac-phy-id (deprecated binding)
-+               Usage: required
-+               Value type: <u32>
-+               Definition: This binding shouldn't be used with new platforms.
-+	       Must be present. Value should be the id of the phy
-+               connected to gemac.
-+
-+- fsl,mdio-mux-val
-+		Usage: required
-+		Value type: <u32>
-+		Definition: Must be present. Value can be either 0 or 2 or 3.
-+		This value is used to configure the mux to enable mdio.
-+
-+- phy-mode
-+		Usage: required
-+		Value type: <string>
-+		Definition: Must include "sgmii"
-+
-+- fsl,pfe-phy-if-flags (deprecated binding)
-+               Usage: required
-+               Value type: <u32>
-+               Definition: This binding shouldn't be used with new platforms.
-+               Must be present. Value should be 0 by default.
-+               If there is not phy connected, this need to be 1.
-+
-+- phy-handle
-+		Usage: optional
-+		Value type: <phandle>
-+		Definition: phandle to the PHY device connected to this device.
-+
-+- mdio : A required subnode which specifies the mdio bus in the PFE and used as
-+a container for phy nodes according to ../phy.txt.
-+
-+EXAMPLE
-+
-+ethernet@0 {
-+	compatible = "fsl,pfe-gemac-port";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	reg = <0x0>;	/* GEM_ID */
-+	fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+	fsl,mdio-mux-val = <0x0>;
-+	phy-mode = "sgmii";
-+	phy-handle = <&sgmii_phy1>;
-+};
-+
-+
-+ethernet@1 {
-+	compatible = "fsl,pfe-gemac-port";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+	reg = <0x1>;	/* GEM_ID */
-+	fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
-+	fsl,mdio-mux-val = <0x0>;
-+	phy-mode = "sgmii";
-+	phy-handle = <&sgmii_phy2>;
-+};
-+
-+mdio@0 {
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	sgmii_phy1: ethernet-phy@2 {
-+		reg = <0x2>;
-+	};
-+
-+	sgmii_phy2: ethernet-phy@1 {
-+		reg = <0x1>;
-+	};
-+};
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -8255,6 +8255,14 @@ F:	drivers/ptp/ptp_qoriq.c
- F:	drivers/ptp/ptp_qoriq_debugfs.c
- F:	include/linux/fsl/ptp_qoriq.h
- 
-+FREESCALE QORIQ PPFE ETHERNET DRIVER
-+M:	Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
-+M:	Calvin Johnson <calvin.johnson@nxp.com>
-+L:	netdev@vger.kernel.org
-+S:	Maintained
-+F:	drivers/staging/fsl_ppfe
-+F:	Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt
-+
- FREESCALE QUAD SPI DRIVER
- M:	Han Xu <han.xu@nxp.com>
- L:	linux-spi@vger.kernel.org
---- a/drivers/staging/Kconfig
-+++ b/drivers/staging/Kconfig
-@@ -80,4 +80,6 @@ source "drivers/staging/qlge/Kconfig"
- 
- source "drivers/staging/vme_user/Kconfig"
- 
-+source "drivers/staging/fsl_ppfe/Kconfig"
-+
- endif # STAGING
---- a/drivers/staging/Makefile
-+++ b/drivers/staging/Makefile
-@@ -29,3 +29,4 @@ obj-$(CONFIG_PI433)		+= pi433/
- obj-$(CONFIG_XIL_AXIS_FIFO)	+= axis-fifo/
- obj-$(CONFIG_FIELDBUS_DEV)     += fieldbus/
- obj-$(CONFIG_QLGE)		+= qlge/
-+obj-$(CONFIG_FSL_PPFE)		+= fsl_ppfe/
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/Kconfig
-@@ -0,0 +1,21 @@
-+#
-+# Freescale Programmable Packet Forwarding Engine driver
-+#
-+config FSL_PPFE
-+	tristate "Freescale PPFE Driver"
-+	select FSL_GUTS
-+	default n
-+	help
-+	Freescale LS1012A SoC has a Programmable Packet Forwarding Engine.
-+	It provides two high performance ethernet interfaces.
-+	This driver initializes, programs and controls the PPFE.
-+	Use this driver to enable network connectivity on LS1012A platforms.
-+
-+if FSL_PPFE
-+
-+config FSL_PPFE_UTIL_DISABLED
-+	bool "Disable PPFE UTIL Processor Engine"
-+	help
-+	UTIL PE has to be enabled only if required.
-+
-+endif # FSL_PPFE
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/Makefile
-@@ -0,0 +1,20 @@
-+#
-+# Makefile for Freesecale PPFE driver
-+#
-+
-+ccflags-y +=  -I $(srctree)/$(src)/include  -I $(srctree)/$(src)
-+
-+obj-$(CONFIG_FSL_PPFE) += pfe.o
-+
-+pfe-y += pfe_mod.o \
-+	pfe_hw.o \
-+	pfe_firmware.o \
-+	pfe_ctrl.o \
-+	pfe_hif.o \
-+	pfe_hif_lib.o\
-+	pfe_eth.o \
-+	pfe_sysfs.o \
-+	pfe_debugfs.o \
-+	pfe_ls1012a_platform.o \
-+	pfe_hal.o \
-+	pfe_cdev.o
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/TODO
-@@ -0,0 +1,2 @@
-+TODO:
-+	- provide pfe pe monitoring support
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus.h
-@@ -0,0 +1,78 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _CBUS_H_
-+#define _CBUS_H_
-+
-+#define EMAC1_BASE_ADDR	(CBUS_BASE_ADDR + 0x200000)
-+#define EGPI1_BASE_ADDR	(CBUS_BASE_ADDR + 0x210000)
-+#define EMAC2_BASE_ADDR	(CBUS_BASE_ADDR + 0x220000)
-+#define EGPI2_BASE_ADDR	(CBUS_BASE_ADDR + 0x230000)
-+#define BMU1_BASE_ADDR	(CBUS_BASE_ADDR + 0x240000)
-+#define BMU2_BASE_ADDR	(CBUS_BASE_ADDR + 0x250000)
-+#define ARB_BASE_ADDR	(CBUS_BASE_ADDR + 0x260000)
-+#define DDR_CONFIG_BASE_ADDR	(CBUS_BASE_ADDR + 0x270000)
-+#define HIF_BASE_ADDR	(CBUS_BASE_ADDR + 0x280000)
-+#define HGPI_BASE_ADDR	(CBUS_BASE_ADDR + 0x290000)
-+#define LMEM_BASE_ADDR	(CBUS_BASE_ADDR + 0x300000)
-+#define LMEM_SIZE	0x10000
-+#define LMEM_END	(LMEM_BASE_ADDR + LMEM_SIZE)
-+#define TMU_CSR_BASE_ADDR	(CBUS_BASE_ADDR + 0x310000)
-+#define CLASS_CSR_BASE_ADDR	(CBUS_BASE_ADDR + 0x320000)
-+#define HIF_NOCPY_BASE_ADDR	(CBUS_BASE_ADDR + 0x350000)
-+#define UTIL_CSR_BASE_ADDR	(CBUS_BASE_ADDR + 0x360000)
-+#define CBUS_GPT_BASE_ADDR	(CBUS_BASE_ADDR + 0x370000)
-+
-+/*
-+ * defgroup XXX_MEM_ACCESS_ADDR PE memory access through CSR
-+ * XXX_MEM_ACCESS_ADDR register bit definitions.
-+ */
-+#define PE_MEM_ACCESS_WRITE	BIT(31)	/* Internal Memory Write. */
-+#define PE_MEM_ACCESS_IMEM	BIT(15)
-+#define PE_MEM_ACCESS_DMEM	BIT(16)
-+
-+/* Byte Enables of the Internal memory access. These are interpred in BE */
-+#define PE_MEM_ACCESS_BYTE_ENABLE(offset, size)	\
-+	({ typeof(size) size_ = (size);		\
-+	(((BIT(size_) - 1) << (4 - (offset) - (size_))) & 0xf) << 24; })
-+
-+#include "cbus/emac_mtip.h"
-+#include "cbus/gpi.h"
-+#include "cbus/bmu.h"
-+#include "cbus/hif.h"
-+#include "cbus/tmu_csr.h"
-+#include "cbus/class_csr.h"
-+#include "cbus/hif_nocpy.h"
-+#include "cbus/util_csr.h"
-+
-+/* PFE cores states */
-+#define CORE_DISABLE	0x00000000
-+#define CORE_ENABLE	0x00000001
-+#define CORE_SW_RESET	0x00000002
-+
-+/* LMEM defines */
-+#define LMEM_HDR_SIZE	0x0010
-+#define LMEM_BUF_SIZE_LN2	0x7
-+#define LMEM_BUF_SIZE	BIT(LMEM_BUF_SIZE_LN2)
-+
-+/* DDR defines */
-+#define DDR_HDR_SIZE	0x0100
-+#define DDR_BUF_SIZE_LN2	0xb
-+#define DDR_BUF_SIZE	BIT(DDR_BUF_SIZE_LN2)
-+
-+#endif /* _CBUS_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/bmu.h
-@@ -0,0 +1,55 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _BMU_H_
-+#define _BMU_H_
-+
-+#define BMU_VERSION	0x000
-+#define BMU_CTRL	0x004
-+#define BMU_UCAST_CONFIG	0x008
-+#define BMU_UCAST_BASE_ADDR	0x00c
-+#define BMU_BUF_SIZE	0x010
-+#define BMU_BUF_CNT	0x014
-+#define BMU_THRES	0x018
-+#define BMU_INT_SRC	0x020
-+#define BMU_INT_ENABLE	0x024
-+#define BMU_ALLOC_CTRL	0x030
-+#define BMU_FREE_CTRL	0x034
-+#define BMU_FREE_ERR_ADDR	0x038
-+#define BMU_CURR_BUF_CNT	0x03c
-+#define BMU_MCAST_CNT	0x040
-+#define BMU_MCAST_ALLOC_CTRL	0x044
-+#define BMU_REM_BUF_CNT	0x048
-+#define BMU_LOW_WATERMARK	0x050
-+#define BMU_HIGH_WATERMARK	0x054
-+#define BMU_INT_MEM_ACCESS	0x100
-+
-+struct BMU_CFG {
-+	unsigned long baseaddr;
-+	u32 count;
-+	u32 size;
-+	u32 low_watermark;
-+	u32 high_watermark;
-+};
-+
-+#define BMU1_BUF_SIZE	LMEM_BUF_SIZE_LN2
-+#define BMU2_BUF_SIZE	DDR_BUF_SIZE_LN2
-+
-+#define BMU2_MCAST_ALLOC_CTRL	(BMU2_BASE_ADDR + BMU_MCAST_ALLOC_CTRL)
-+
-+#endif /* _BMU_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/class_csr.h
-@@ -0,0 +1,289 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _CLASS_CSR_H_
-+#define _CLASS_CSR_H_
-+
-+/* @file class_csr.h.
-+ * class_csr - block containing all the classifier control and status register.
-+ * Mapped on CBUS and accessible from all PE's and ARM.
-+ */
-+#define CLASS_VERSION	(CLASS_CSR_BASE_ADDR + 0x000)
-+#define CLASS_TX_CTRL	(CLASS_CSR_BASE_ADDR + 0x004)
-+#define CLASS_INQ_PKTPTR	(CLASS_CSR_BASE_ADDR + 0x010)
-+
-+/* (ddr_hdr_size[24:16], lmem_hdr_size[5:0]) */
-+#define CLASS_HDR_SIZE	(CLASS_CSR_BASE_ADDR + 0x014)
-+
-+/* LMEM header size for the Classifier block.\ Data in the LMEM
-+ * is written from this offset.
-+ */
-+#define CLASS_HDR_SIZE_LMEM(off)	((off) & 0x3f)
-+
-+/* DDR header size for the Classifier block.\ Data in the DDR
-+ * is written from this offset.
-+ */
-+#define CLASS_HDR_SIZE_DDR(off)	(((off) & 0x1ff) << 16)
-+
-+#define CLASS_PE0_QB_DM_ADDR0	(CLASS_CSR_BASE_ADDR + 0x020)
-+
-+/* DMEM address of first [15:0] and second [31:16] buffers on QB side. */
-+#define CLASS_PE0_QB_DM_ADDR1	(CLASS_CSR_BASE_ADDR + 0x024)
-+
-+/* DMEM address of third [15:0] and fourth [31:16] buffers on QB side. */
-+#define CLASS_PE0_RO_DM_ADDR0	(CLASS_CSR_BASE_ADDR + 0x060)
-+
-+/* DMEM address of first [15:0] and second [31:16] buffers on RO side. */
-+#define CLASS_PE0_RO_DM_ADDR1	(CLASS_CSR_BASE_ADDR + 0x064)
-+
-+/* DMEM address of third [15:0] and fourth [31:16] buffers on RO side. */
-+
-+/* @name Class PE memory access. Allows external PE's and HOST to
-+ * read/write PMEM/DMEM memory ranges for each classifier PE.
-+ */
-+/* {sr_pe_mem_cmd[31], csr_pe_mem_wren[27:24], csr_pe_mem_addr[23:0]},
-+ * See \ref XXX_MEM_ACCESS_ADDR for details.
-+ */
-+#define CLASS_MEM_ACCESS_ADDR	(CLASS_CSR_BASE_ADDR + 0x100)
-+
-+/* Internal Memory Access Write Data [31:0] */
-+#define CLASS_MEM_ACCESS_WDATA	(CLASS_CSR_BASE_ADDR + 0x104)
-+
-+/* Internal Memory Access Read Data [31:0] */
-+#define CLASS_MEM_ACCESS_RDATA	(CLASS_CSR_BASE_ADDR + 0x108)
-+#define CLASS_TM_INQ_ADDR	(CLASS_CSR_BASE_ADDR + 0x114)
-+#define CLASS_PE_STATUS	(CLASS_CSR_BASE_ADDR + 0x118)
-+
-+#define CLASS_PHY1_RX_PKTS	(CLASS_CSR_BASE_ADDR + 0x11c)
-+#define CLASS_PHY1_TX_PKTS	(CLASS_CSR_BASE_ADDR + 0x120)
-+#define CLASS_PHY1_LP_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x124)
-+#define CLASS_PHY1_INTF_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x128)
-+#define CLASS_PHY1_INTF_MATCH_PKTS	(CLASS_CSR_BASE_ADDR + 0x12c)
-+#define CLASS_PHY1_L3_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x130)
-+#define CLASS_PHY1_V4_PKTS	(CLASS_CSR_BASE_ADDR + 0x134)
-+#define CLASS_PHY1_V6_PKTS	(CLASS_CSR_BASE_ADDR + 0x138)
-+#define CLASS_PHY1_CHKSUM_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x13c)
-+#define CLASS_PHY1_TTL_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x140)
-+#define CLASS_PHY2_RX_PKTS	(CLASS_CSR_BASE_ADDR + 0x144)
-+#define CLASS_PHY2_TX_PKTS	(CLASS_CSR_BASE_ADDR + 0x148)
-+#define CLASS_PHY2_LP_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x14c)
-+#define CLASS_PHY2_INTF_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x150)
-+#define CLASS_PHY2_INTF_MATCH_PKTS	(CLASS_CSR_BASE_ADDR + 0x154)
-+#define CLASS_PHY2_L3_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x158)
-+#define CLASS_PHY2_V4_PKTS	(CLASS_CSR_BASE_ADDR + 0x15c)
-+#define CLASS_PHY2_V6_PKTS	(CLASS_CSR_BASE_ADDR + 0x160)
-+#define CLASS_PHY2_CHKSUM_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x164)
-+#define CLASS_PHY2_TTL_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x168)
-+#define CLASS_PHY3_RX_PKTS	(CLASS_CSR_BASE_ADDR + 0x16c)
-+#define CLASS_PHY3_TX_PKTS	(CLASS_CSR_BASE_ADDR + 0x170)
-+#define CLASS_PHY3_LP_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x174)
-+#define CLASS_PHY3_INTF_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x178)
-+#define CLASS_PHY3_INTF_MATCH_PKTS	(CLASS_CSR_BASE_ADDR + 0x17c)
-+#define CLASS_PHY3_L3_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x180)
-+#define CLASS_PHY3_V4_PKTS	(CLASS_CSR_BASE_ADDR + 0x184)
-+#define CLASS_PHY3_V6_PKTS	(CLASS_CSR_BASE_ADDR + 0x188)
-+#define CLASS_PHY3_CHKSUM_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x18c)
-+#define CLASS_PHY3_TTL_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x190)
-+#define CLASS_PHY1_ICMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x194)
-+#define CLASS_PHY1_IGMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x198)
-+#define CLASS_PHY1_TCP_PKTS	(CLASS_CSR_BASE_ADDR + 0x19c)
-+#define CLASS_PHY1_UDP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1a0)
-+#define CLASS_PHY2_ICMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1a4)
-+#define CLASS_PHY2_IGMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1a8)
-+#define CLASS_PHY2_TCP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1ac)
-+#define CLASS_PHY2_UDP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1b0)
-+#define CLASS_PHY3_ICMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1b4)
-+#define CLASS_PHY3_IGMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1b8)
-+#define CLASS_PHY3_TCP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1bc)
-+#define CLASS_PHY3_UDP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1c0)
-+#define CLASS_PHY4_ICMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1c4)
-+#define CLASS_PHY4_IGMP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1c8)
-+#define CLASS_PHY4_TCP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1cc)
-+#define CLASS_PHY4_UDP_PKTS	(CLASS_CSR_BASE_ADDR + 0x1d0)
-+#define CLASS_PHY4_RX_PKTS	(CLASS_CSR_BASE_ADDR + 0x1d4)
-+#define CLASS_PHY4_TX_PKTS	(CLASS_CSR_BASE_ADDR + 0x1d8)
-+#define CLASS_PHY4_LP_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x1dc)
-+#define CLASS_PHY4_INTF_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x1e0)
-+#define CLASS_PHY4_INTF_MATCH_PKTS	(CLASS_CSR_BASE_ADDR + 0x1e4)
-+#define CLASS_PHY4_L3_FAIL_PKTS	(CLASS_CSR_BASE_ADDR + 0x1e8)
-+#define CLASS_PHY4_V4_PKTS	(CLASS_CSR_BASE_ADDR + 0x1ec)
-+#define CLASS_PHY4_V6_PKTS	(CLASS_CSR_BASE_ADDR + 0x1f0)
-+#define CLASS_PHY4_CHKSUM_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x1f4)
-+#define CLASS_PHY4_TTL_ERR_PKTS	(CLASS_CSR_BASE_ADDR + 0x1f8)
-+
-+#define CLASS_PE_SYS_CLK_RATIO	(CLASS_CSR_BASE_ADDR + 0x200)
-+#define CLASS_AFULL_THRES	(CLASS_CSR_BASE_ADDR + 0x204)
-+#define CLASS_GAP_BETWEEN_READS	(CLASS_CSR_BASE_ADDR + 0x208)
-+#define CLASS_MAX_BUF_CNT	(CLASS_CSR_BASE_ADDR + 0x20c)
-+#define CLASS_TSQ_FIFO_THRES	(CLASS_CSR_BASE_ADDR + 0x210)
-+#define CLASS_TSQ_MAX_CNT	(CLASS_CSR_BASE_ADDR + 0x214)
-+#define CLASS_IRAM_DATA_0	(CLASS_CSR_BASE_ADDR + 0x218)
-+#define CLASS_IRAM_DATA_1	(CLASS_CSR_BASE_ADDR + 0x21c)
-+#define CLASS_IRAM_DATA_2	(CLASS_CSR_BASE_ADDR + 0x220)
-+#define CLASS_IRAM_DATA_3	(CLASS_CSR_BASE_ADDR + 0x224)
-+
-+#define CLASS_BUS_ACCESS_ADDR	(CLASS_CSR_BASE_ADDR + 0x228)
-+
-+#define CLASS_BUS_ACCESS_WDATA	(CLASS_CSR_BASE_ADDR + 0x22c)
-+#define CLASS_BUS_ACCESS_RDATA	(CLASS_CSR_BASE_ADDR + 0x230)
-+
-+/* (route_entry_size[9:0], route_hash_size[23:16]
-+ * (this is actually ln2(size)))
-+ */
-+#define CLASS_ROUTE_HASH_ENTRY_SIZE	(CLASS_CSR_BASE_ADDR + 0x234)
-+
-+#define CLASS_ROUTE_ENTRY_SIZE(size)	 ((size) & 0x1ff)
-+#define CLASS_ROUTE_HASH_SIZE(hash_bits) (((hash_bits) & 0xff) << 16)
-+
-+#define CLASS_ROUTE_TABLE_BASE	(CLASS_CSR_BASE_ADDR + 0x238)
-+
-+#define CLASS_ROUTE_MULTI	(CLASS_CSR_BASE_ADDR + 0x23c)
-+#define CLASS_SMEM_OFFSET	(CLASS_CSR_BASE_ADDR + 0x240)
-+#define CLASS_LMEM_BUF_SIZE	(CLASS_CSR_BASE_ADDR + 0x244)
-+#define CLASS_VLAN_ID	(CLASS_CSR_BASE_ADDR + 0x248)
-+#define CLASS_BMU1_BUF_FREE	(CLASS_CSR_BASE_ADDR + 0x24c)
-+#define CLASS_USE_TMU_INQ	(CLASS_CSR_BASE_ADDR + 0x250)
-+#define CLASS_VLAN_ID1	(CLASS_CSR_BASE_ADDR + 0x254)
-+
-+#define CLASS_BUS_ACCESS_BASE	(CLASS_CSR_BASE_ADDR + 0x258)
-+#define CLASS_BUS_ACCESS_BASE_MASK	(0xFF000000)
-+/* bit 31:24 of PE peripheral address are stored in CLASS_BUS_ACCESS_BASE */
-+
-+#define CLASS_HIF_PARSE	(CLASS_CSR_BASE_ADDR + 0x25c)
-+
-+#define CLASS_HOST_PE0_GP	(CLASS_CSR_BASE_ADDR + 0x260)
-+#define CLASS_PE0_GP	(CLASS_CSR_BASE_ADDR + 0x264)
-+#define CLASS_HOST_PE1_GP	(CLASS_CSR_BASE_ADDR + 0x268)
-+#define CLASS_PE1_GP	(CLASS_CSR_BASE_ADDR + 0x26c)
-+#define CLASS_HOST_PE2_GP	(CLASS_CSR_BASE_ADDR + 0x270)
-+#define CLASS_PE2_GP	(CLASS_CSR_BASE_ADDR + 0x274)
-+#define CLASS_HOST_PE3_GP	(CLASS_CSR_BASE_ADDR + 0x278)
-+#define CLASS_PE3_GP	(CLASS_CSR_BASE_ADDR + 0x27c)
-+#define CLASS_HOST_PE4_GP	(CLASS_CSR_BASE_ADDR + 0x280)
-+#define CLASS_PE4_GP	(CLASS_CSR_BASE_ADDR + 0x284)
-+#define CLASS_HOST_PE5_GP	(CLASS_CSR_BASE_ADDR + 0x288)
-+#define CLASS_PE5_GP	(CLASS_CSR_BASE_ADDR + 0x28c)
-+
-+#define CLASS_PE_INT_SRC	(CLASS_CSR_BASE_ADDR + 0x290)
-+#define CLASS_PE_INT_ENABLE	(CLASS_CSR_BASE_ADDR + 0x294)
-+
-+#define CLASS_TPID0_TPID1	(CLASS_CSR_BASE_ADDR + 0x298)
-+#define CLASS_TPID2	(CLASS_CSR_BASE_ADDR + 0x29c)
-+
-+#define CLASS_L4_CHKSUM_ADDR	(CLASS_CSR_BASE_ADDR + 0x2a0)
-+
-+#define CLASS_PE0_DEBUG	(CLASS_CSR_BASE_ADDR + 0x2a4)
-+#define CLASS_PE1_DEBUG	(CLASS_CSR_BASE_ADDR + 0x2a8)
-+#define CLASS_PE2_DEBUG	(CLASS_CSR_BASE_ADDR + 0x2ac)
-+#define CLASS_PE3_DEBUG	(CLASS_CSR_BASE_ADDR + 0x2b0)
-+#define CLASS_PE4_DEBUG	(CLASS_CSR_BASE_ADDR + 0x2b4)
-+#define CLASS_PE5_DEBUG	(CLASS_CSR_BASE_ADDR + 0x2b8)
-+
-+#define CLASS_STATE	(CLASS_CSR_BASE_ADDR + 0x2bc)
-+
-+/* CLASS defines */
-+#define CLASS_PBUF_SIZE	0x100	/* Fixed by hardware */
-+#define CLASS_PBUF_HEADER_OFFSET	0x80	/* Can be configured */
-+
-+/* Can be configured */
-+#define CLASS_PBUF0_BASE_ADDR	0x000
-+/* Can be configured */
-+#define CLASS_PBUF1_BASE_ADDR	(CLASS_PBUF0_BASE_ADDR + CLASS_PBUF_SIZE)
-+/* Can be configured */
-+#define CLASS_PBUF2_BASE_ADDR	(CLASS_PBUF1_BASE_ADDR + CLASS_PBUF_SIZE)
-+/* Can be configured */
-+#define CLASS_PBUF3_BASE_ADDR	(CLASS_PBUF2_BASE_ADDR + CLASS_PBUF_SIZE)
-+
-+#define CLASS_PBUF0_HEADER_BASE_ADDR	(CLASS_PBUF0_BASE_ADDR + \
-+						CLASS_PBUF_HEADER_OFFSET)
-+#define CLASS_PBUF1_HEADER_BASE_ADDR	(CLASS_PBUF1_BASE_ADDR + \
-+						CLASS_PBUF_HEADER_OFFSET)
-+#define CLASS_PBUF2_HEADER_BASE_ADDR	(CLASS_PBUF2_BASE_ADDR + \
-+						CLASS_PBUF_HEADER_OFFSET)
-+#define CLASS_PBUF3_HEADER_BASE_ADDR	(CLASS_PBUF3_BASE_ADDR + \
-+						CLASS_PBUF_HEADER_OFFSET)
-+
-+#define CLASS_PE0_RO_DM_ADDR0_VAL	((CLASS_PBUF1_BASE_ADDR << 16) | \
-+						CLASS_PBUF0_BASE_ADDR)
-+#define CLASS_PE0_RO_DM_ADDR1_VAL	((CLASS_PBUF3_BASE_ADDR << 16) | \
-+						CLASS_PBUF2_BASE_ADDR)
-+
-+#define CLASS_PE0_QB_DM_ADDR0_VAL	((CLASS_PBUF1_HEADER_BASE_ADDR << 16) |\
-+						CLASS_PBUF0_HEADER_BASE_ADDR)
-+#define CLASS_PE0_QB_DM_ADDR1_VAL	((CLASS_PBUF3_HEADER_BASE_ADDR << 16) |\
-+						CLASS_PBUF2_HEADER_BASE_ADDR)
-+
-+#define CLASS_ROUTE_SIZE	128
-+#define CLASS_MAX_ROUTE_SIZE	256
-+#define CLASS_ROUTE_HASH_BITS	20
-+#define CLASS_ROUTE_HASH_MASK	(BIT(CLASS_ROUTE_HASH_BITS) - 1)
-+
-+/* Can be configured */
-+#define	CLASS_ROUTE0_BASE_ADDR	0x400
-+/* Can be configured */
-+#define CLASS_ROUTE1_BASE_ADDR	(CLASS_ROUTE0_BASE_ADDR + CLASS_ROUTE_SIZE)
-+/* Can be configured */
-+#define CLASS_ROUTE2_BASE_ADDR	(CLASS_ROUTE1_BASE_ADDR + CLASS_ROUTE_SIZE)
-+/* Can be configured */
-+#define CLASS_ROUTE3_BASE_ADDR	(CLASS_ROUTE2_BASE_ADDR + CLASS_ROUTE_SIZE)
-+
-+#define CLASS_SA_SIZE	128
-+#define CLASS_IPSEC_SA0_BASE_ADDR	0x600
-+/* not used */
-+#define CLASS_IPSEC_SA1_BASE_ADDR  (CLASS_IPSEC_SA0_BASE_ADDR + CLASS_SA_SIZE)
-+/* not used */
-+#define CLASS_IPSEC_SA2_BASE_ADDR  (CLASS_IPSEC_SA1_BASE_ADDR + CLASS_SA_SIZE)
-+/* not used */
-+#define CLASS_IPSEC_SA3_BASE_ADDR  (CLASS_IPSEC_SA2_BASE_ADDR + CLASS_SA_SIZE)
-+
-+/* generic purpose free dmem buffer, last portion of 2K dmem pbuf */
-+#define CLASS_GP_DMEM_BUF_SIZE	(2048 - (CLASS_PBUF_SIZE * 4) - \
-+				(CLASS_ROUTE_SIZE * 4) - (CLASS_SA_SIZE))
-+#define CLASS_GP_DMEM_BUF	((void *)(CLASS_IPSEC_SA0_BASE_ADDR + \
-+					CLASS_SA_SIZE))
-+
-+#define TWO_LEVEL_ROUTE		BIT(0)
-+#define PHYNO_IN_HASH		BIT(1)
-+#define HW_ROUTE_FETCH		BIT(3)
-+#define HW_BRIDGE_FETCH		BIT(5)
-+#define IP_ALIGNED		BIT(6)
-+#define ARC_HIT_CHECK_EN	BIT(7)
-+#define CLASS_TOE		BIT(11)
-+#define HASH_NORMAL		(0 << 12)
-+#define HASH_CRC_PORT		BIT(12)
-+#define HASH_CRC_IP		(2 << 12)
-+#define HASH_CRC_PORT_IP	(3 << 12)
-+#define QB2BUS_LE		BIT(15)
-+
-+#define TCP_CHKSUM_DROP		BIT(0)
-+#define UDP_CHKSUM_DROP		BIT(1)
-+#define IPV4_CHKSUM_DROP	BIT(9)
-+
-+/*CLASS_HIF_PARSE bits*/
-+#define HIF_PKT_CLASS_EN	BIT(0)
-+#define HIF_PKT_OFFSET(ofst)	(((ofst) & 0xF) << 1)
-+
-+struct class_cfg {
-+	u32 toe_mode;
-+	unsigned long route_table_baseaddr;
-+	u32 route_table_hash_bits;
-+	u32 pe_sys_clk_ratio;
-+	u32 resume;
-+};
-+
-+#endif /* _CLASS_CSR_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/emac_mtip.h
-@@ -0,0 +1,242 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _EMAC_H_
-+#define _EMAC_H_
-+
-+#include <linux/ethtool.h>
-+
-+#define EMAC_IEVENT_REG		0x004
-+#define EMAC_IMASK_REG		0x008
-+#define EMAC_R_DES_ACTIVE_REG	0x010
-+#define EMAC_X_DES_ACTIVE_REG	0x014
-+#define EMAC_ECNTRL_REG		0x024
-+#define EMAC_MII_DATA_REG	0x040
-+#define EMAC_MII_CTRL_REG	0x044
-+#define EMAC_MIB_CTRL_STS_REG	0x064
-+#define EMAC_RCNTRL_REG		0x084
-+#define EMAC_TCNTRL_REG		0x0C4
-+#define EMAC_PHY_ADDR_LOW	0x0E4
-+#define EMAC_PHY_ADDR_HIGH	0x0E8
-+#define EMAC_GAUR		0x120
-+#define EMAC_GALR		0x124
-+#define EMAC_TFWR_STR_FWD	0x144
-+#define EMAC_RX_SECTION_FULL	0x190
-+#define EMAC_RX_SECTION_EMPTY	0x194
-+#define EMAC_TX_SECTION_EMPTY	0x1A0
-+#define EMAC_TRUNC_FL		0x1B0
-+
-+#define RMON_T_DROP	0x200 /* Count of frames not cntd correctly */
-+#define RMON_T_PACKETS	0x204 /* RMON TX packet count */
-+#define RMON_T_BC_PKT	0x208 /* RMON TX broadcast pkts */
-+#define RMON_T_MC_PKT	0x20c /* RMON TX multicast pkts */
-+#define RMON_T_CRC_ALIGN	0x210 /* RMON TX pkts with CRC align err */
-+#define RMON_T_UNDERSIZE	0x214 /* RMON TX pkts < 64 bytes, good CRC */
-+#define RMON_T_OVERSIZE	0x218 /* RMON TX pkts > MAX_FL bytes good CRC */
-+#define RMON_T_FRAG	0x21c /* RMON TX pkts < 64 bytes, bad CRC */
-+#define RMON_T_JAB	0x220 /* RMON TX pkts > MAX_FL bytes, bad CRC */
-+#define RMON_T_COL	0x224 /* RMON TX collision count */
-+#define RMON_T_P64	0x228 /* RMON TX 64 byte pkts */
-+#define RMON_T_P65TO127	0x22c /* RMON TX 65 to 127 byte pkts */
-+#define RMON_T_P128TO255	0x230 /* RMON TX 128 to 255 byte pkts */
-+#define RMON_T_P256TO511	0x234 /* RMON TX 256 to 511 byte pkts */
-+#define RMON_T_P512TO1023	0x238 /* RMON TX 512 to 1023 byte pkts */
-+#define RMON_T_P1024TO2047	0x23c /* RMON TX 1024 to 2047 byte pkts */
-+#define RMON_T_P_GTE2048	0x240 /* RMON TX pkts > 2048 bytes */
-+#define RMON_T_OCTETS	0x244 /* RMON TX octets */
-+#define IEEE_T_DROP	0x248 /* Count of frames not counted crtly */
-+#define IEEE_T_FRAME_OK	0x24c /* Frames tx'd OK */
-+#define IEEE_T_1COL	0x250 /* Frames tx'd with single collision */
-+#define IEEE_T_MCOL	0x254 /* Frames tx'd with multiple collision */
-+#define IEEE_T_DEF	0x258 /* Frames tx'd after deferral delay */
-+#define IEEE_T_LCOL	0x25c /* Frames tx'd with late collision */
-+#define IEEE_T_EXCOL	0x260 /* Frames tx'd with excesv collisions */
-+#define IEEE_T_MACERR	0x264 /* Frames tx'd with TX FIFO underrun */
-+#define IEEE_T_CSERR	0x268 /* Frames tx'd with carrier sense err */
-+#define IEEE_T_SQE	0x26c /* Frames tx'd with SQE err */
-+#define IEEE_T_FDXFC	0x270 /* Flow control pause frames tx'd */
-+#define IEEE_T_OCTETS_OK	0x274 /* Octet count for frames tx'd w/o err */
-+#define RMON_R_PACKETS	0x284 /* RMON RX packet count */
-+#define RMON_R_BC_PKT	0x288 /* RMON RX broadcast pkts */
-+#define RMON_R_MC_PKT	0x28c /* RMON RX multicast pkts */
-+#define RMON_R_CRC_ALIGN	0x290 /* RMON RX pkts with CRC alignment err */
-+#define RMON_R_UNDERSIZE	0x294 /* RMON RX pkts < 64 bytes, good CRC */
-+#define RMON_R_OVERSIZE	0x298 /* RMON RX pkts > MAX_FL bytes good CRC */
-+#define RMON_R_FRAG	0x29c /* RMON RX pkts < 64 bytes, bad CRC */
-+#define RMON_R_JAB	0x2a0 /* RMON RX pkts > MAX_FL bytes, bad CRC */
-+#define RMON_R_RESVD_O	0x2a4 /* Reserved */
-+#define RMON_R_P64	0x2a8 /* RMON RX 64 byte pkts */
-+#define RMON_R_P65TO127	0x2ac /* RMON RX 65 to 127 byte pkts */
-+#define RMON_R_P128TO255	0x2b0 /* RMON RX 128 to 255 byte pkts */
-+#define RMON_R_P256TO511	0x2b4 /* RMON RX 256 to 511 byte pkts */
-+#define RMON_R_P512TO1023	0x2b8 /* RMON RX 512 to 1023 byte pkts */
-+#define RMON_R_P1024TO2047	0x2bc /* RMON RX 1024 to 2047 byte pkts */
-+#define RMON_R_P_GTE2048	0x2c0 /* RMON RX pkts > 2048 bytes */
-+#define RMON_R_OCTETS	0x2c4 /* RMON RX octets */
-+#define IEEE_R_DROP	0x2c8 /* Count frames not counted correctly */
-+#define IEEE_R_FRAME_OK	0x2cc /* Frames rx'd OK */
-+#define IEEE_R_CRC	0x2d0 /* Frames rx'd with CRC err */
-+#define IEEE_R_ALIGN	0x2d4 /* Frames rx'd with alignment err */
-+#define IEEE_R_MACERR	0x2d8 /* Receive FIFO overflow count */
-+#define IEEE_R_FDXFC	0x2dc /* Flow control pause frames rx'd */
-+#define IEEE_R_OCTETS_OK	0x2e0 /* Octet cnt for frames rx'd w/o err */
-+
-+#define EMAC_SMAC_0_0	0x500 /*Supplemental MAC Address 0 (RW).*/
-+#define EMAC_SMAC_0_1	0x504 /*Supplemental MAC Address 0 (RW).*/
-+
-+/* GEMAC definitions and settings */
-+
-+#define EMAC_PORT_0	0
-+#define EMAC_PORT_1	1
-+
-+/* GEMAC Bit definitions */
-+#define EMAC_IEVENT_HBERR		 0x80000000
-+#define EMAC_IEVENT_BABR		 0x40000000
-+#define EMAC_IEVENT_BABT		 0x20000000
-+#define EMAC_IEVENT_GRA			 0x10000000
-+#define EMAC_IEVENT_TXF			 0x08000000
-+#define EMAC_IEVENT_TXB			 0x04000000
-+#define EMAC_IEVENT_RXF			 0x02000000
-+#define EMAC_IEVENT_RXB			 0x01000000
-+#define EMAC_IEVENT_MII			 0x00800000
-+#define EMAC_IEVENT_EBERR		 0x00400000
-+#define EMAC_IEVENT_LC			 0x00200000
-+#define EMAC_IEVENT_RL			 0x00100000
-+#define EMAC_IEVENT_UN			 0x00080000
-+
-+#define EMAC_IMASK_HBERR                 0x80000000
-+#define EMAC_IMASK_BABR                  0x40000000
-+#define EMAC_IMASKT_BABT                 0x20000000
-+#define EMAC_IMASK_GRA                   0x10000000
-+#define EMAC_IMASKT_TXF                  0x08000000
-+#define EMAC_IMASK_TXB                   0x04000000
-+#define EMAC_IMASKT_RXF                  0x02000000
-+#define EMAC_IMASK_RXB                   0x01000000
-+#define EMAC_IMASK_MII                   0x00800000
-+#define EMAC_IMASK_EBERR                 0x00400000
-+#define EMAC_IMASK_LC                    0x00200000
-+#define EMAC_IMASKT_RL                   0x00100000
-+#define EMAC_IMASK_UN                    0x00080000
-+
-+#define EMAC_RCNTRL_MAX_FL_SHIFT         16
-+#define EMAC_RCNTRL_LOOP                 0x00000001
-+#define EMAC_RCNTRL_DRT                  0x00000002
-+#define EMAC_RCNTRL_MII_MODE             0x00000004
-+#define EMAC_RCNTRL_PROM                 0x00000008
-+#define EMAC_RCNTRL_BC_REJ               0x00000010
-+#define EMAC_RCNTRL_FCE                  0x00000020
-+#define EMAC_RCNTRL_RGMII                0x00000040
-+#define EMAC_RCNTRL_SGMII                0x00000080
-+#define EMAC_RCNTRL_RMII                 0x00000100
-+#define EMAC_RCNTRL_RMII_10T             0x00000200
-+#define EMAC_RCNTRL_CRC_FWD		 0x00004000
-+
-+#define EMAC_TCNTRL_GTS                  0x00000001
-+#define EMAC_TCNTRL_HBC                  0x00000002
-+#define EMAC_TCNTRL_FDEN                 0x00000004
-+#define EMAC_TCNTRL_TFC_PAUSE            0x00000008
-+#define EMAC_TCNTRL_RFC_PAUSE            0x00000010
-+
-+#define EMAC_ECNTRL_RESET                0x00000001      /* reset the EMAC */
-+#define EMAC_ECNTRL_ETHER_EN             0x00000002      /* enable the EMAC */
-+#define EMAC_ECNTRL_MAGIC_ENA		 0x00000004
-+#define EMAC_ECNTRL_SLEEP		 0x00000008
-+#define EMAC_ECNTRL_SPEED                0x00000020
-+#define EMAC_ECNTRL_DBSWAP               0x00000100
-+
-+#define EMAC_X_WMRK_STRFWD               0x00000100
-+
-+#define EMAC_X_DES_ACTIVE_TDAR           0x01000000
-+#define EMAC_R_DES_ACTIVE_RDAR           0x01000000
-+
-+#define EMAC_RX_SECTION_EMPTY_V		0x00010006
-+/*
-+ * The possible operating speeds of the MAC, currently supporting 10, 100 and
-+ * 1000Mb modes.
-+ */
-+enum mac_speed {SPEED_10M, SPEED_100M, SPEED_1000M, SPEED_1000M_PCS};
-+
-+/* MII-related definitios */
-+#define EMAC_MII_DATA_ST         0x40000000      /* Start of frame delimiter */
-+#define EMAC_MII_DATA_OP_RD      0x20000000      /* Perform a read operation */
-+#define EMAC_MII_DATA_OP_CL45_RD 0x30000000      /* Perform a read operation */
-+#define EMAC_MII_DATA_OP_WR      0x10000000      /* Perform a write operation */
-+#define EMAC_MII_DATA_OP_CL45_WR 0x10000000      /* Perform a write operation */
-+#define EMAC_MII_DATA_PA_MSK     0x0f800000      /* PHY Address field mask */
-+#define EMAC_MII_DATA_RA_MSK     0x007c0000      /* PHY Register field mask */
-+#define EMAC_MII_DATA_TA         0x00020000      /* Turnaround */
-+#define EMAC_MII_DATA_DATAMSK    0x0000ffff      /* PHY data field */
-+
-+#define EMAC_MII_DATA_RA_SHIFT   18      /* MII Register address bits */
-+#define EMAC_MII_DATA_RA_MASK	 0x1F      /* MII Register address mask */
-+#define EMAC_MII_DATA_PA_SHIFT   23      /* MII PHY address bits */
-+#define EMAC_MII_DATA_PA_MASK    0x1F      /* MII PHY address mask */
-+
-+#define EMAC_MII_DATA_RA(v) (((v) & EMAC_MII_DATA_RA_MASK) << \
-+				EMAC_MII_DATA_RA_SHIFT)
-+#define EMAC_MII_DATA_PA(v) (((v) & EMAC_MII_DATA_RA_MASK) << \
-+				EMAC_MII_DATA_PA_SHIFT)
-+#define EMAC_MII_DATA(v)    ((v) & 0xffff)
-+
-+#define EMAC_MII_SPEED_SHIFT	1
-+#define EMAC_HOLDTIME_SHIFT	8
-+#define EMAC_HOLDTIME_MASK	0x7
-+#define EMAC_HOLDTIME(v)	(((v) & EMAC_HOLDTIME_MASK) << \
-+					EMAC_HOLDTIME_SHIFT)
-+
-+/*
-+ * The Address organisation for the MAC device.  All addresses are split into
-+ * two 32-bit register fields.  The first one (bottom) is the lower 32-bits of
-+ * the address and the other field are the high order bits - this may be 16-bits
-+ * in the case of MAC addresses, or 32-bits for the hash address.
-+ * In terms of memory storage, the first item (bottom) is assumed to be at a
-+ * lower address location than 'top'. i.e. top should be at address location of
-+ * 'bottom' + 4 bytes.
-+ */
-+struct pfe_mac_addr {
-+	u32 bottom;     /* Lower 32-bits of address. */
-+	u32 top;        /* Upper 32-bits of address. */
-+};
-+
-+/*
-+ * The following is the organisation of the address filters section of the MAC
-+ * registers.  The Cadence MAC contains four possible specific address match
-+ * addresses, if an incoming frame corresponds to any one of these four
-+ * addresses then the frame will be copied to memory.
-+ * It is not necessary for all four of the address match registers to be
-+ * programmed, this is application dependent.
-+ */
-+struct spec_addr {
-+	struct pfe_mac_addr one;        /* Specific address register 1. */
-+	struct pfe_mac_addr two;        /* Specific address register 2. */
-+	struct pfe_mac_addr three;      /* Specific address register 3. */
-+	struct pfe_mac_addr four;       /* Specific address register 4. */
-+};
-+
-+struct gemac_cfg {
-+	u32 mode;
-+	u32 speed;
-+	u32 duplex;
-+};
-+
-+/* EMAC Hash size */
-+#define EMAC_HASH_REG_BITS       64
-+
-+#define EMAC_SPEC_ADDR_MAX	4
-+
-+#endif /* _EMAC_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/gpi.h
-@@ -0,0 +1,86 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _GPI_H_
-+#define _GPI_H_
-+
-+#define GPI_VERSION	0x00
-+#define GPI_CTRL	0x04
-+#define GPI_RX_CONFIG	0x08
-+#define GPI_HDR_SIZE	0x0c
-+#define GPI_BUF_SIZE	0x10
-+#define GPI_LMEM_ALLOC_ADDR	0x14
-+#define GPI_LMEM_FREE_ADDR	0x18
-+#define GPI_DDR_ALLOC_ADDR	0x1c
-+#define GPI_DDR_FREE_ADDR	0x20
-+#define GPI_CLASS_ADDR	0x24
-+#define GPI_DRX_FIFO	0x28
-+#define GPI_TRX_FIFO	0x2c
-+#define GPI_INQ_PKTPTR	0x30
-+#define GPI_DDR_DATA_OFFSET	0x34
-+#define GPI_LMEM_DATA_OFFSET	0x38
-+#define GPI_TMLF_TX	0x4c
-+#define GPI_DTX_ASEQ	0x50
-+#define GPI_FIFO_STATUS	0x54
-+#define GPI_FIFO_DEBUG	0x58
-+#define GPI_TX_PAUSE_TIME	0x5c
-+#define GPI_LMEM_SEC_BUF_DATA_OFFSET	0x60
-+#define GPI_DDR_SEC_BUF_DATA_OFFSET	0x64
-+#define GPI_TOE_CHKSUM_EN	0x68
-+#define GPI_OVERRUN_DROPCNT	0x6c
-+#define GPI_CSR_MTIP_PAUSE_REG		0x74
-+#define GPI_CSR_MTIP_PAUSE_QUANTUM	0x78
-+#define GPI_CSR_RX_CNT			0x7c
-+#define GPI_CSR_TX_CNT			0x80
-+#define GPI_CSR_DEBUG1			0x84
-+#define GPI_CSR_DEBUG2			0x88
-+
-+struct gpi_cfg {
-+	u32 lmem_rtry_cnt;
-+	u32 tmlf_txthres;
-+	u32 aseq_len;
-+	u32 mtip_pause_reg;
-+};
-+
-+/* GPI commons defines */
-+#define GPI_LMEM_BUF_EN	0x1
-+#define GPI_DDR_BUF_EN	0x1
-+
-+/* EGPI 1 defines */
-+#define EGPI1_LMEM_RTRY_CNT	0x40
-+#define EGPI1_TMLF_TXTHRES	0xBC
-+#define EGPI1_ASEQ_LEN	0x50
-+
-+/* EGPI 2 defines */
-+#define EGPI2_LMEM_RTRY_CNT	0x40
-+#define EGPI2_TMLF_TXTHRES	0xBC
-+#define EGPI2_ASEQ_LEN	0x40
-+
-+/* EGPI 3 defines */
-+#define EGPI3_LMEM_RTRY_CNT	0x40
-+#define EGPI3_TMLF_TXTHRES	0xBC
-+#define EGPI3_ASEQ_LEN	0x40
-+
-+/* HGPI defines */
-+#define HGPI_LMEM_RTRY_CNT	0x40
-+#define HGPI_TMLF_TXTHRES	0xBC
-+#define HGPI_ASEQ_LEN	0x40
-+
-+#define EGPI_PAUSE_TIME		0x000007D0
-+#define EGPI_PAUSE_ENABLE	0x40000000
-+#endif /* _GPI_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/hif.h
-@@ -0,0 +1,100 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _HIF_H_
-+#define _HIF_H_
-+
-+/* @file hif.h.
-+ * hif - PFE hif block control and status register.
-+ * Mapped on CBUS and accessible from all PE's and ARM.
-+ */
-+#define HIF_VERSION	(HIF_BASE_ADDR + 0x00)
-+#define HIF_TX_CTRL	(HIF_BASE_ADDR + 0x04)
-+#define HIF_TX_CURR_BD_ADDR	(HIF_BASE_ADDR + 0x08)
-+#define HIF_TX_ALLOC	(HIF_BASE_ADDR + 0x0c)
-+#define HIF_TX_BDP_ADDR	(HIF_BASE_ADDR + 0x10)
-+#define HIF_TX_STATUS	(HIF_BASE_ADDR + 0x14)
-+#define HIF_RX_CTRL	(HIF_BASE_ADDR + 0x20)
-+#define HIF_RX_BDP_ADDR	(HIF_BASE_ADDR + 0x24)
-+#define HIF_RX_STATUS	(HIF_BASE_ADDR + 0x30)
-+#define HIF_INT_SRC	(HIF_BASE_ADDR + 0x34)
-+#define HIF_INT_ENABLE	(HIF_BASE_ADDR + 0x38)
-+#define HIF_POLL_CTRL	(HIF_BASE_ADDR + 0x3c)
-+#define HIF_RX_CURR_BD_ADDR	(HIF_BASE_ADDR + 0x40)
-+#define HIF_RX_ALLOC	(HIF_BASE_ADDR + 0x44)
-+#define HIF_TX_DMA_STATUS	(HIF_BASE_ADDR + 0x48)
-+#define HIF_RX_DMA_STATUS	(HIF_BASE_ADDR + 0x4c)
-+#define HIF_INT_COAL	(HIF_BASE_ADDR + 0x50)
-+
-+/* HIF_INT_SRC/ HIF_INT_ENABLE control bits */
-+#define HIF_INT		BIT(0)
-+#define HIF_RXBD_INT	BIT(1)
-+#define HIF_RXPKT_INT	BIT(2)
-+#define HIF_TXBD_INT	BIT(3)
-+#define HIF_TXPKT_INT	BIT(4)
-+
-+/* HIF_TX_CTRL bits */
-+#define HIF_CTRL_DMA_EN			BIT(0)
-+#define HIF_CTRL_BDP_POLL_CTRL_EN	BIT(1)
-+#define HIF_CTRL_BDP_CH_START_WSTB	BIT(2)
-+
-+/* HIF_RX_STATUS bits */
-+#define BDP_CSR_RX_DMA_ACTV     BIT(16)
-+
-+/* HIF_INT_ENABLE bits */
-+#define HIF_INT_EN		BIT(0)
-+#define HIF_RXBD_INT_EN		BIT(1)
-+#define HIF_RXPKT_INT_EN	BIT(2)
-+#define HIF_TXBD_INT_EN		BIT(3)
-+#define HIF_TXPKT_INT_EN	BIT(4)
-+
-+/* HIF_POLL_CTRL bits*/
-+#define HIF_RX_POLL_CTRL_CYCLE	0x0400
-+#define HIF_TX_POLL_CTRL_CYCLE	0x0400
-+
-+/* HIF_INT_COAL bits*/
-+#define HIF_INT_COAL_ENABLE	BIT(31)
-+
-+/* Buffer descriptor control bits */
-+#define BD_CTRL_BUFLEN_MASK	0x3fff
-+#define BD_BUF_LEN(x)	((x) & BD_CTRL_BUFLEN_MASK)
-+#define BD_CTRL_CBD_INT_EN	BIT(16)
-+#define BD_CTRL_PKT_INT_EN	BIT(17)
-+#define BD_CTRL_LIFM		BIT(18)
-+#define BD_CTRL_LAST_BD		BIT(19)
-+#define BD_CTRL_DIR		BIT(20)
-+#define BD_CTRL_LMEM_CPY	BIT(21) /* Valid only for HIF_NOCPY */
-+#define BD_CTRL_PKT_XFER	BIT(24)
-+#define BD_CTRL_DESC_EN		BIT(31)
-+#define BD_CTRL_PARSE_DISABLE	BIT(25)
-+#define BD_CTRL_BRFETCH_DISABLE	BIT(26)
-+#define BD_CTRL_RTFETCH_DISABLE	BIT(27)
-+
-+/* Buffer descriptor status bits*/
-+#define BD_STATUS_CONN_ID(x)	((x) & 0xffff)
-+#define BD_STATUS_DIR_PROC_ID	BIT(16)
-+#define BD_STATUS_CONN_ID_EN	BIT(17)
-+#define BD_STATUS_PE2PROC_ID(x)	(((x) & 7) << 18)
-+#define BD_STATUS_LE_DATA	BIT(21)
-+#define BD_STATUS_CHKSUM_EN	BIT(22)
-+
-+/* HIF Buffer descriptor status bits */
-+#define DIR_PROC_ID	BIT(16)
-+#define PROC_ID(id)	((id) << 18)
-+
-+#endif /* _HIF_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/hif_nocpy.h
-@@ -0,0 +1,50 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _HIF_NOCPY_H_
-+#define _HIF_NOCPY_H_
-+
-+#define HIF_NOCPY_VERSION	(HIF_NOCPY_BASE_ADDR + 0x00)
-+#define HIF_NOCPY_TX_CTRL	(HIF_NOCPY_BASE_ADDR + 0x04)
-+#define HIF_NOCPY_TX_CURR_BD_ADDR	(HIF_NOCPY_BASE_ADDR + 0x08)
-+#define HIF_NOCPY_TX_ALLOC	(HIF_NOCPY_BASE_ADDR + 0x0c)
-+#define HIF_NOCPY_TX_BDP_ADDR	(HIF_NOCPY_BASE_ADDR + 0x10)
-+#define HIF_NOCPY_TX_STATUS	(HIF_NOCPY_BASE_ADDR + 0x14)
-+#define HIF_NOCPY_RX_CTRL	(HIF_NOCPY_BASE_ADDR + 0x20)
-+#define HIF_NOCPY_RX_BDP_ADDR	(HIF_NOCPY_BASE_ADDR + 0x24)
-+#define HIF_NOCPY_RX_STATUS	(HIF_NOCPY_BASE_ADDR + 0x30)
-+#define HIF_NOCPY_INT_SRC	(HIF_NOCPY_BASE_ADDR + 0x34)
-+#define HIF_NOCPY_INT_ENABLE	(HIF_NOCPY_BASE_ADDR + 0x38)
-+#define HIF_NOCPY_POLL_CTRL	(HIF_NOCPY_BASE_ADDR + 0x3c)
-+#define HIF_NOCPY_RX_CURR_BD_ADDR	(HIF_NOCPY_BASE_ADDR + 0x40)
-+#define HIF_NOCPY_RX_ALLOC	(HIF_NOCPY_BASE_ADDR + 0x44)
-+#define HIF_NOCPY_TX_DMA_STATUS	(HIF_NOCPY_BASE_ADDR + 0x48)
-+#define HIF_NOCPY_RX_DMA_STATUS	(HIF_NOCPY_BASE_ADDR + 0x4c)
-+#define HIF_NOCPY_RX_INQ0_PKTPTR	(HIF_NOCPY_BASE_ADDR + 0x50)
-+#define HIF_NOCPY_RX_INQ1_PKTPTR	(HIF_NOCPY_BASE_ADDR + 0x54)
-+#define HIF_NOCPY_TX_PORT_NO	(HIF_NOCPY_BASE_ADDR + 0x60)
-+#define HIF_NOCPY_LMEM_ALLOC_ADDR	(HIF_NOCPY_BASE_ADDR + 0x64)
-+#define HIF_NOCPY_CLASS_ADDR	(HIF_NOCPY_BASE_ADDR + 0x68)
-+#define HIF_NOCPY_TMU_PORT0_ADDR	(HIF_NOCPY_BASE_ADDR + 0x70)
-+#define HIF_NOCPY_TMU_PORT1_ADDR	(HIF_NOCPY_BASE_ADDR + 0x74)
-+#define HIF_NOCPY_TMU_PORT2_ADDR	(HIF_NOCPY_BASE_ADDR + 0x7c)
-+#define HIF_NOCPY_TMU_PORT3_ADDR	(HIF_NOCPY_BASE_ADDR + 0x80)
-+#define HIF_NOCPY_TMU_PORT4_ADDR	(HIF_NOCPY_BASE_ADDR + 0x84)
-+#define HIF_NOCPY_INT_COAL	(HIF_NOCPY_BASE_ADDR + 0x90)
-+
-+#endif /* _HIF_NOCPY_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/tmu_csr.h
-@@ -0,0 +1,168 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _TMU_CSR_H_
-+#define _TMU_CSR_H_
-+
-+#define TMU_VERSION	(TMU_CSR_BASE_ADDR + 0x000)
-+#define TMU_INQ_WATERMARK	(TMU_CSR_BASE_ADDR + 0x004)
-+#define TMU_PHY_INQ_PKTPTR	(TMU_CSR_BASE_ADDR + 0x008)
-+#define TMU_PHY_INQ_PKTINFO	(TMU_CSR_BASE_ADDR + 0x00c)
-+#define TMU_PHY_INQ_FIFO_CNT	(TMU_CSR_BASE_ADDR + 0x010)
-+#define TMU_SYS_GENERIC_CONTROL	(TMU_CSR_BASE_ADDR + 0x014)
-+#define TMU_SYS_GENERIC_STATUS	(TMU_CSR_BASE_ADDR + 0x018)
-+#define TMU_SYS_GEN_CON0	(TMU_CSR_BASE_ADDR + 0x01c)
-+#define TMU_SYS_GEN_CON1	(TMU_CSR_BASE_ADDR + 0x020)
-+#define TMU_SYS_GEN_CON2	(TMU_CSR_BASE_ADDR + 0x024)
-+#define TMU_SYS_GEN_CON3	(TMU_CSR_BASE_ADDR + 0x028)
-+#define TMU_SYS_GEN_CON4	(TMU_CSR_BASE_ADDR + 0x02c)
-+#define TMU_TEQ_DISABLE_DROPCHK	(TMU_CSR_BASE_ADDR + 0x030)
-+#define TMU_TEQ_CTRL	(TMU_CSR_BASE_ADDR + 0x034)
-+#define TMU_TEQ_QCFG	(TMU_CSR_BASE_ADDR + 0x038)
-+#define TMU_TEQ_DROP_STAT	(TMU_CSR_BASE_ADDR + 0x03c)
-+#define TMU_TEQ_QAVG	(TMU_CSR_BASE_ADDR + 0x040)
-+#define TMU_TEQ_WREG_PROB	(TMU_CSR_BASE_ADDR + 0x044)
-+#define TMU_TEQ_TRANS_STAT	(TMU_CSR_BASE_ADDR + 0x048)
-+#define TMU_TEQ_HW_PROB_CFG0	(TMU_CSR_BASE_ADDR + 0x04c)
-+#define TMU_TEQ_HW_PROB_CFG1	(TMU_CSR_BASE_ADDR + 0x050)
-+#define TMU_TEQ_HW_PROB_CFG2	(TMU_CSR_BASE_ADDR + 0x054)
-+#define TMU_TEQ_HW_PROB_CFG3	(TMU_CSR_BASE_ADDR + 0x058)
-+#define TMU_TEQ_HW_PROB_CFG4	(TMU_CSR_BASE_ADDR + 0x05c)
-+#define TMU_TEQ_HW_PROB_CFG5	(TMU_CSR_BASE_ADDR + 0x060)
-+#define TMU_TEQ_HW_PROB_CFG6	(TMU_CSR_BASE_ADDR + 0x064)
-+#define TMU_TEQ_HW_PROB_CFG7	(TMU_CSR_BASE_ADDR + 0x068)
-+#define TMU_TEQ_HW_PROB_CFG8	(TMU_CSR_BASE_ADDR + 0x06c)
-+#define TMU_TEQ_HW_PROB_CFG9	(TMU_CSR_BASE_ADDR + 0x070)
-+#define TMU_TEQ_HW_PROB_CFG10	(TMU_CSR_BASE_ADDR + 0x074)
-+#define TMU_TEQ_HW_PROB_CFG11	(TMU_CSR_BASE_ADDR + 0x078)
-+#define TMU_TEQ_HW_PROB_CFG12	(TMU_CSR_BASE_ADDR + 0x07c)
-+#define TMU_TEQ_HW_PROB_CFG13	(TMU_CSR_BASE_ADDR + 0x080)
-+#define TMU_TEQ_HW_PROB_CFG14	(TMU_CSR_BASE_ADDR + 0x084)
-+#define TMU_TEQ_HW_PROB_CFG15	(TMU_CSR_BASE_ADDR + 0x088)
-+#define TMU_TEQ_HW_PROB_CFG16	(TMU_CSR_BASE_ADDR + 0x08c)
-+#define TMU_TEQ_HW_PROB_CFG17	(TMU_CSR_BASE_ADDR + 0x090)
-+#define TMU_TEQ_HW_PROB_CFG18	(TMU_CSR_BASE_ADDR + 0x094)
-+#define TMU_TEQ_HW_PROB_CFG19	(TMU_CSR_BASE_ADDR + 0x098)
-+#define TMU_TEQ_HW_PROB_CFG20	(TMU_CSR_BASE_ADDR + 0x09c)
-+#define TMU_TEQ_HW_PROB_CFG21	(TMU_CSR_BASE_ADDR + 0x0a0)
-+#define TMU_TEQ_HW_PROB_CFG22	(TMU_CSR_BASE_ADDR + 0x0a4)
-+#define TMU_TEQ_HW_PROB_CFG23	(TMU_CSR_BASE_ADDR + 0x0a8)
-+#define TMU_TEQ_HW_PROB_CFG24	(TMU_CSR_BASE_ADDR + 0x0ac)
-+#define TMU_TEQ_HW_PROB_CFG25	(TMU_CSR_BASE_ADDR + 0x0b0)
-+#define TMU_TDQ_IIFG_CFG	(TMU_CSR_BASE_ADDR + 0x0b4)
-+/* [9:0] Scheduler Enable for each of the scheduler in the TDQ.
-+ * This is a global Enable for all schedulers in PHY0
-+ */
-+#define TMU_TDQ0_SCH_CTRL	(TMU_CSR_BASE_ADDR + 0x0b8)
-+
-+#define TMU_LLM_CTRL	(TMU_CSR_BASE_ADDR + 0x0bc)
-+#define TMU_LLM_BASE_ADDR	(TMU_CSR_BASE_ADDR + 0x0c0)
-+#define TMU_LLM_QUE_LEN	(TMU_CSR_BASE_ADDR + 0x0c4)
-+#define TMU_LLM_QUE_HEADPTR	(TMU_CSR_BASE_ADDR + 0x0c8)
-+#define TMU_LLM_QUE_TAILPTR	(TMU_CSR_BASE_ADDR + 0x0cc)
-+#define TMU_LLM_QUE_DROPCNT	(TMU_CSR_BASE_ADDR + 0x0d0)
-+#define TMU_INT_EN	(TMU_CSR_BASE_ADDR + 0x0d4)
-+#define TMU_INT_SRC	(TMU_CSR_BASE_ADDR + 0x0d8)
-+#define TMU_INQ_STAT	(TMU_CSR_BASE_ADDR + 0x0dc)
-+#define TMU_CTRL	(TMU_CSR_BASE_ADDR + 0x0e0)
-+
-+/* [31] Mem Access Command. 0 = Internal Memory Read, 1 = Internal memory
-+ * Write [27:24] Byte Enables of the Internal memory access [23:0] Address of
-+ * the internal memory. This address is used to access both the PM and DM of
-+ * all the PE's
-+ */
-+#define TMU_MEM_ACCESS_ADDR	(TMU_CSR_BASE_ADDR + 0x0e4)
-+
-+/* Internal Memory Access Write Data */
-+#define TMU_MEM_ACCESS_WDATA	(TMU_CSR_BASE_ADDR + 0x0e8)
-+/* Internal Memory Access Read Data. The commands are blocked
-+ * at the mem_access only
-+ */
-+#define TMU_MEM_ACCESS_RDATA	(TMU_CSR_BASE_ADDR + 0x0ec)
-+
-+/* [31:0] PHY0 in queue address (must be initialized with one of the
-+ * xxx_INQ_PKTPTR cbus addresses)
-+ */
-+#define TMU_PHY0_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x0f0)
-+/* [31:0] PHY1 in queue address (must be initialized with one of the
-+ * xxx_INQ_PKTPTR cbus addresses)
-+ */
-+#define TMU_PHY1_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x0f4)
-+/* [31:0] PHY2 in queue address (must be initialized with one of the
-+ * xxx_INQ_PKTPTR cbus addresses)
-+ */
-+#define TMU_PHY2_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x0f8)
-+/* [31:0] PHY3 in queue address (must be initialized with one of the
-+ * xxx_INQ_PKTPTR cbus addresses)
-+ */
-+#define TMU_PHY3_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x0fc)
-+#define TMU_BMU_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x100)
-+#define TMU_TX_CTRL	(TMU_CSR_BASE_ADDR + 0x104)
-+
-+#define TMU_BUS_ACCESS_WDATA	(TMU_CSR_BASE_ADDR + 0x108)
-+#define TMU_BUS_ACCESS	(TMU_CSR_BASE_ADDR + 0x10c)
-+#define TMU_BUS_ACCESS_RDATA	(TMU_CSR_BASE_ADDR + 0x110)
-+
-+#define TMU_PE_SYS_CLK_RATIO	(TMU_CSR_BASE_ADDR + 0x114)
-+#define TMU_PE_STATUS	(TMU_CSR_BASE_ADDR + 0x118)
-+#define TMU_TEQ_MAX_THRESHOLD	(TMU_CSR_BASE_ADDR + 0x11c)
-+/* [31:0] PHY4 in queue address (must be initialized with one of the
-+ * xxx_INQ_PKTPTR cbus addresses)
-+ */
-+#define TMU_PHY4_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x134)
-+/* [9:0] Scheduler Enable for each of the scheduler in the TDQ.
-+ * This is a global Enable for all schedulers in PHY1
-+ */
-+#define TMU_TDQ1_SCH_CTRL	(TMU_CSR_BASE_ADDR + 0x138)
-+/* [9:0] Scheduler Enable for each of the scheduler in the TDQ.
-+ * This is a global Enable for all schedulers in PHY2
-+ */
-+#define TMU_TDQ2_SCH_CTRL	(TMU_CSR_BASE_ADDR + 0x13c)
-+/* [9:0] Scheduler Enable for each of the scheduler in the TDQ.
-+ * This is a global Enable for all schedulers in PHY3
-+ */
-+#define TMU_TDQ3_SCH_CTRL	(TMU_CSR_BASE_ADDR + 0x140)
-+#define TMU_BMU_BUF_SIZE	(TMU_CSR_BASE_ADDR + 0x144)
-+/* [31:0] PHY5 in queue address (must be initialized with one of the
-+ * xxx_INQ_PKTPTR cbus addresses)
-+ */
-+#define TMU_PHY5_INQ_ADDR	(TMU_CSR_BASE_ADDR + 0x148)
-+
-+#define SW_RESET		BIT(0)	/* Global software reset */
-+#define INQ_RESET		BIT(2)
-+#define TEQ_RESET		BIT(3)
-+#define TDQ_RESET		BIT(4)
-+#define PE_RESET		BIT(5)
-+#define MEM_INIT		BIT(6)
-+#define MEM_INIT_DONE		BIT(7)
-+#define LLM_INIT		BIT(8)
-+#define LLM_INIT_DONE		BIT(9)
-+#define ECC_MEM_INIT_DONE	BIT(10)
-+
-+struct tmu_cfg {
-+	u32 pe_sys_clk_ratio;
-+	unsigned long llm_base_addr;
-+	u32 llm_queue_len;
-+};
-+
-+/* Not HW related for pfe_ctrl / pfe common defines */
-+#define DEFAULT_MAX_QDEPTH	80
-+#define DEFAULT_Q0_QDEPTH	511 /*We keep one large queue for host tx qos */
-+#define DEFAULT_TMU3_QDEPTH	127
-+
-+#endif /* _TMU_CSR_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/cbus/util_csr.h
-@@ -0,0 +1,61 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _UTIL_CSR_H_
-+#define _UTIL_CSR_H_
-+
-+#define UTIL_VERSION	(UTIL_CSR_BASE_ADDR + 0x000)
-+#define UTIL_TX_CTRL	(UTIL_CSR_BASE_ADDR + 0x004)
-+#define UTIL_INQ_PKTPTR	(UTIL_CSR_BASE_ADDR + 0x010)
-+
-+#define UTIL_HDR_SIZE	(UTIL_CSR_BASE_ADDR + 0x014)
-+
-+#define UTIL_PE0_QB_DM_ADDR0	(UTIL_CSR_BASE_ADDR + 0x020)
-+#define UTIL_PE0_QB_DM_ADDR1	(UTIL_CSR_BASE_ADDR + 0x024)
-+#define UTIL_PE0_RO_DM_ADDR0	(UTIL_CSR_BASE_ADDR + 0x060)
-+#define UTIL_PE0_RO_DM_ADDR1	(UTIL_CSR_BASE_ADDR + 0x064)
-+
-+#define UTIL_MEM_ACCESS_ADDR	(UTIL_CSR_BASE_ADDR + 0x100)
-+#define UTIL_MEM_ACCESS_WDATA	(UTIL_CSR_BASE_ADDR + 0x104)
-+#define UTIL_MEM_ACCESS_RDATA	(UTIL_CSR_BASE_ADDR + 0x108)
-+
-+#define UTIL_TM_INQ_ADDR	(UTIL_CSR_BASE_ADDR + 0x114)
-+#define UTIL_PE_STATUS	(UTIL_CSR_BASE_ADDR + 0x118)
-+
-+#define UTIL_PE_SYS_CLK_RATIO	(UTIL_CSR_BASE_ADDR + 0x200)
-+#define UTIL_AFULL_THRES	(UTIL_CSR_BASE_ADDR + 0x204)
-+#define UTIL_GAP_BETWEEN_READS	(UTIL_CSR_BASE_ADDR + 0x208)
-+#define UTIL_MAX_BUF_CNT	(UTIL_CSR_BASE_ADDR + 0x20c)
-+#define UTIL_TSQ_FIFO_THRES	(UTIL_CSR_BASE_ADDR + 0x210)
-+#define UTIL_TSQ_MAX_CNT	(UTIL_CSR_BASE_ADDR + 0x214)
-+#define UTIL_IRAM_DATA_0	(UTIL_CSR_BASE_ADDR + 0x218)
-+#define UTIL_IRAM_DATA_1	(UTIL_CSR_BASE_ADDR + 0x21c)
-+#define UTIL_IRAM_DATA_2	(UTIL_CSR_BASE_ADDR + 0x220)
-+#define UTIL_IRAM_DATA_3	(UTIL_CSR_BASE_ADDR + 0x224)
-+
-+#define UTIL_BUS_ACCESS_ADDR	(UTIL_CSR_BASE_ADDR + 0x228)
-+#define UTIL_BUS_ACCESS_WDATA	(UTIL_CSR_BASE_ADDR + 0x22c)
-+#define UTIL_BUS_ACCESS_RDATA	(UTIL_CSR_BASE_ADDR + 0x230)
-+
-+#define UTIL_INQ_AFULL_THRES	(UTIL_CSR_BASE_ADDR + 0x234)
-+
-+struct util_cfg {
-+	u32 pe_sys_clk_ratio;
-+};
-+
-+#endif /* _UTIL_CSR_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/include/pfe/pfe.h
-@@ -0,0 +1,372 @@
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _PFE_H_
-+#define _PFE_H_
-+
-+#include "cbus.h"
-+
-+#define CLASS_DMEM_BASE_ADDR(i)	(0x00000000 | ((i) << 20))
-+/*
-+ * Only valid for mem access register interface
-+ */
-+#define CLASS_IMEM_BASE_ADDR(i)	(0x00000000 | ((i) << 20))
-+#define CLASS_DMEM_SIZE	0x00002000
-+#define CLASS_IMEM_SIZE	0x00008000
-+
-+#define TMU_DMEM_BASE_ADDR(i)	(0x00000000 + ((i) << 20))
-+/*
-+ * Only valid for mem access register interface
-+ */
-+#define TMU_IMEM_BASE_ADDR(i)	(0x00000000 + ((i) << 20))
-+#define TMU_DMEM_SIZE	0x00000800
-+#define TMU_IMEM_SIZE	0x00002000
-+
-+#define UTIL_DMEM_BASE_ADDR	0x00000000
-+#define UTIL_DMEM_SIZE	0x00002000
-+
-+#define PE_LMEM_BASE_ADDR	0xc3010000
-+#define PE_LMEM_SIZE	0x8000
-+#define PE_LMEM_END	(PE_LMEM_BASE_ADDR + PE_LMEM_SIZE)
-+
-+#define DMEM_BASE_ADDR	0x00000000
-+#define DMEM_SIZE	0x2000	/* TMU has less... */
-+#define DMEM_END	(DMEM_BASE_ADDR + DMEM_SIZE)
-+
-+#define PMEM_BASE_ADDR	0x00010000
-+#define PMEM_SIZE	0x8000	/* TMU has less... */
-+#define PMEM_END	(PMEM_BASE_ADDR + PMEM_SIZE)
-+
-+/* These check memory ranges from PE point of view/memory map */
-+#define IS_DMEM(addr, len)				\
-+	({ typeof(addr) addr_ = (addr);			\
-+	((unsigned long)(addr_) >= DMEM_BASE_ADDR) &&	\
-+	(((unsigned long)(addr_) + (len)) <= DMEM_END); })
-+
-+#define IS_PMEM(addr, len)				\
-+	({ typeof(addr) addr_ = (addr);			\
-+	((unsigned long)(addr_) >= PMEM_BASE_ADDR) &&	\
-+	(((unsigned long)(addr_) + (len)) <= PMEM_END); })
-+
-+#define IS_PE_LMEM(addr, len)				\
-+	({ typeof(addr) addr_ = (addr);			\
-+	((unsigned long)(addr_) >=			\
-+	PE_LMEM_BASE_ADDR) &&				\
-+	(((unsigned long)(addr_) +			\
-+	(len)) <= PE_LMEM_END); })
-+
-+#define IS_PFE_LMEM(addr, len)				\
-+	({ typeof(addr) addr_ = (addr);			\
-+	((unsigned long)(addr_) >=			\
-+	CBUS_VIRT_TO_PFE(LMEM_BASE_ADDR)) &&		\
-+	(((unsigned long)(addr_) + (len)) <=		\
-+	CBUS_VIRT_TO_PFE(LMEM_END)); })
-+
-+#define __IS_PHYS_DDR(addr, len)			\
-+	({ typeof(addr) addr_ = (addr);			\
-+	((unsigned long)(addr_) >=			\
-+	DDR_PHYS_BASE_ADDR) &&				\
-+	(((unsigned long)(addr_) + (len)) <=		\
-+	DDR_PHYS_END); })
-+
-+#define IS_PHYS_DDR(addr, len)	__IS_PHYS_DDR(DDR_PFE_TO_PHYS(addr), len)
-+
-+/*
-+ * If using a run-time virtual address for the cbus base address use this code
-+ */
-+extern void *cbus_base_addr;
-+extern void *ddr_base_addr;
-+extern unsigned long ddr_phys_base_addr;
-+extern unsigned int ddr_size;
-+
-+#define CBUS_BASE_ADDR	cbus_base_addr
-+#define DDR_PHYS_BASE_ADDR	ddr_phys_base_addr
-+#define DDR_BASE_ADDR	ddr_base_addr
-+#define DDR_SIZE	ddr_size
-+
-+#define DDR_PHYS_END	(DDR_PHYS_BASE_ADDR + DDR_SIZE)
-+
-+#define LS1012A_PFE_RESET_WA	/*
-+				 * PFE doesn't have global reset and re-init
-+				 * should takecare few things to make PFE
-+				 * functional after reset
-+				 */
-+#define PFE_CBUS_PHYS_BASE_ADDR	0xc0000000	/* CBUS physical base address
-+						 * as seen by PE's.
-+						 */
-+/* CBUS physical base address as seen by PE's. */
-+#define PFE_CBUS_PHYS_BASE_ADDR_FROM_PFE	0xc0000000
-+
-+#define DDR_PHYS_TO_PFE(p)	(((unsigned long int)(p)) & 0x7FFFFFFF)
-+#define DDR_PFE_TO_PHYS(p)	(((unsigned long int)(p)) | 0x80000000)
-+#define CBUS_PHYS_TO_PFE(p)	(((p) - PFE_CBUS_PHYS_BASE_ADDR) + \
-+				PFE_CBUS_PHYS_BASE_ADDR_FROM_PFE)
-+/* Translates to PFE address map */
-+
-+#define DDR_PHYS_TO_VIRT(p)	(((p) - DDR_PHYS_BASE_ADDR) + DDR_BASE_ADDR)
-+#define DDR_VIRT_TO_PHYS(v)	(((v) - DDR_BASE_ADDR) + DDR_PHYS_BASE_ADDR)
-+#define DDR_VIRT_TO_PFE(p)	(DDR_PHYS_TO_PFE(DDR_VIRT_TO_PHYS(p)))
-+
-+#define CBUS_VIRT_TO_PFE(v)	(((v) - CBUS_BASE_ADDR) + \
-+				PFE_CBUS_PHYS_BASE_ADDR)
-+#define CBUS_PFE_TO_VIRT(p)	(((unsigned long int)(p) - \
-+				PFE_CBUS_PHYS_BASE_ADDR) + CBUS_BASE_ADDR)
-+
-+/* The below part of the code is used in QOS control driver from host */
-+#define TMU_APB_BASE_ADDR       0xc1000000      /* TMU base address seen by
-+						 * pe's
-+						 */
-+
-+enum {
-+	CLASS0_ID = 0,
-+	CLASS1_ID,
-+	CLASS2_ID,
-+	CLASS3_ID,
-+	CLASS4_ID,
-+	CLASS5_ID,
-+	TMU0_ID,
-+	TMU1_ID,
-+	TMU2_ID,
-+	TMU3_ID,
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	UTIL_ID,
-+#endif
-+	MAX_PE
-+};
-+
-+#define CLASS_MASK	(BIT(CLASS0_ID) | BIT(CLASS1_ID) |\
-+			BIT(CLASS2_ID) | BIT(CLASS3_ID) |\
-+			BIT(CLASS4_ID) | BIT(CLASS5_ID))
-+#define CLASS_MAX_ID	CLASS5_ID
-+
-+#define TMU_MASK	(BIT(TMU0_ID) | BIT(TMU1_ID) |\
-+			BIT(TMU3_ID))
-+
-+#define TMU_MAX_ID	TMU3_ID
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+#define UTIL_MASK	BIT(UTIL_ID)
-+#endif
-+
-+struct pe_status {
-+	u32	cpu_state;
-+	u32	activity_counter;
-+	u32	rx;
-+	union {
-+	u32	tx;
-+	u32	tmu_qstatus;
-+	};
-+	u32	drop;
-+#if defined(CFG_PE_DEBUG)
-+	u32	debug_indicator;
-+	u32	debug[16];
-+#endif
-+} __aligned(16);
-+
-+struct pe_sync_mailbox {
-+	u32 stop;
-+	u32 stopped;
-+};
-+
-+/* Drop counter definitions */
-+
-+#define	CLASS_NUM_DROP_COUNTERS	13
-+#define	UTIL_NUM_DROP_COUNTERS	8
-+
-+/* PE information.
-+ * Structure containing PE's specific information. It is used to create
-+ * generic C functions common to all PE's.
-+ * Before using the library functions this structure needs to be initialized
-+ * with the different registers virtual addresses
-+ * (according to the ARM MMU mmaping). The default initialization supports a
-+ * virtual == physical mapping.
-+ */
-+struct pe_info {
-+	u32 dmem_base_addr;	/* PE's dmem base address */
-+	u32 pmem_base_addr;	/* PE's pmem base address */
-+	u32 pmem_size;	/* PE's pmem size */
-+
-+	void *mem_access_wdata;	/* PE's _MEM_ACCESS_WDATA register
-+				 * address
-+				 */
-+	void *mem_access_addr;	/* PE's _MEM_ACCESS_ADDR register
-+				 * address
-+				 */
-+	void *mem_access_rdata;	/* PE's _MEM_ACCESS_RDATA register
-+				 * address
-+				 */
-+};
-+
-+void pe_lmem_read(u32 *dst, u32 len, u32 offset);
-+void pe_lmem_write(u32 *src, u32 len, u32 offset);
-+
-+void pe_dmem_memcpy_to32(int id, u32 dst, const void *src, unsigned int len);
-+void pe_pmem_memcpy_to32(int id, u32 dst, const void *src, unsigned int len);
-+
-+u32 pe_pmem_read(int id, u32 addr, u8 size);
-+
-+void pe_dmem_write(int id, u32 val, u32 addr, u8 size);
-+u32 pe_dmem_read(int id, u32 addr, u8 size);
-+void class_pe_lmem_memcpy_to32(u32 dst, const void *src, unsigned int len);
-+void class_pe_lmem_memset(u32 dst, int val, unsigned int len);
-+void class_bus_write(u32 val, u32 addr, u8 size);
-+u32 class_bus_read(u32 addr, u8 size);
-+
-+#define class_bus_readl(addr)	class_bus_read(addr, 4)
-+#define class_bus_readw(addr)	class_bus_read(addr, 2)
-+#define class_bus_readb(addr)	class_bus_read(addr, 1)
-+
-+#define class_bus_writel(val, addr)	class_bus_write(val, addr, 4)
-+#define class_bus_writew(val, addr)	class_bus_write(val, addr, 2)
-+#define class_bus_writeb(val, addr)	class_bus_write(val, addr, 1)
-+
-+#define pe_dmem_readl(id, addr)	pe_dmem_read(id, addr, 4)
-+#define pe_dmem_readw(id, addr)	pe_dmem_read(id, addr, 2)
-+#define pe_dmem_readb(id, addr)	pe_dmem_read(id, addr, 1)
-+
-+#define pe_dmem_writel(id, val, addr)	pe_dmem_write(id, val, addr, 4)
-+#define pe_dmem_writew(id, val, addr)	pe_dmem_write(id, val, addr, 2)
-+#define pe_dmem_writeb(id, val, addr)	pe_dmem_write(id, val, addr, 1)
-+
-+/*int pe_load_elf_section(int id, const void *data, elf32_shdr *shdr); */
-+int pe_load_elf_section(int id, const void *data, struct elf32_shdr *shdr,
-+			struct device *dev);
-+
-+void pfe_lib_init(void *cbus_base, void *ddr_base, unsigned long ddr_phys_base,
-+		  unsigned int ddr_size);
-+void bmu_init(void *base, struct BMU_CFG *cfg);
-+void bmu_reset(void *base);
-+void bmu_enable(void *base);
-+void bmu_disable(void *base);
-+void bmu_set_config(void *base, struct BMU_CFG *cfg);
-+
-+/*
-+ * An enumerated type for loopback values.  This can be one of three values, no
-+ * loopback -normal operation, local loopback with internal loopback module of
-+ * MAC or PHY loopback which is through the external PHY.
-+ */
-+#ifndef __MAC_LOOP_ENUM__
-+#define __MAC_LOOP_ENUM__
-+enum mac_loop {LB_NONE, LB_EXT, LB_LOCAL};
-+#endif
-+
-+void gemac_init(void *base, void *config);
-+void gemac_disable_rx_checksum_offload(void *base);
-+void gemac_enable_rx_checksum_offload(void *base);
-+void gemac_set_speed(void *base, enum mac_speed gem_speed);
-+void gemac_set_duplex(void *base, int duplex);
-+void gemac_set_mode(void *base, int mode);
-+void gemac_enable(void *base);
-+void gemac_tx_disable(void *base);
-+void gemac_tx_enable(void *base);
-+void gemac_disable(void *base);
-+void gemac_reset(void *base);
-+void gemac_set_address(void *base, struct spec_addr *addr);
-+struct spec_addr gemac_get_address(void *base);
-+void gemac_set_loop(void *base, enum mac_loop gem_loop);
-+void gemac_set_laddr1(void *base, struct pfe_mac_addr *address);
-+void gemac_set_laddr2(void *base, struct pfe_mac_addr *address);
-+void gemac_set_laddr3(void *base, struct pfe_mac_addr *address);
-+void gemac_set_laddr4(void *base, struct pfe_mac_addr *address);
-+void gemac_set_laddrN(void *base, struct pfe_mac_addr *address,
-+		      unsigned int entry_index);
-+void gemac_clear_laddr1(void *base);
-+void gemac_clear_laddr2(void *base);
-+void gemac_clear_laddr3(void *base);
-+void gemac_clear_laddr4(void *base);
-+void gemac_clear_laddrN(void *base, unsigned int entry_index);
-+struct pfe_mac_addr gemac_get_hash(void *base);
-+void gemac_set_hash(void *base, struct pfe_mac_addr *hash);
-+struct pfe_mac_addr gem_get_laddr1(void *base);
-+struct pfe_mac_addr gem_get_laddr2(void *base);
-+struct pfe_mac_addr gem_get_laddr3(void *base);
-+struct pfe_mac_addr gem_get_laddr4(void *base);
-+struct pfe_mac_addr gem_get_laddrN(void *base, unsigned int entry_index);
-+void gemac_set_config(void *base, struct gemac_cfg *cfg);
-+void gemac_allow_broadcast(void *base);
-+void gemac_no_broadcast(void *base);
-+void gemac_enable_1536_rx(void *base);
-+void gemac_disable_1536_rx(void *base);
-+void gemac_set_rx_max_fl(void *base, int mtu);
-+void gemac_enable_rx_jmb(void *base);
-+void gemac_disable_rx_jmb(void *base);
-+void gemac_enable_stacked_vlan(void *base);
-+void gemac_disable_stacked_vlan(void *base);
-+void gemac_enable_pause_rx(void *base);
-+void gemac_disable_pause_rx(void *base);
-+void gemac_enable_copy_all(void *base);
-+void gemac_disable_copy_all(void *base);
-+void gemac_set_bus_width(void *base, int width);
-+void gemac_set_wol(void *base, u32 wol_conf);
-+
-+void gpi_init(void *base, struct gpi_cfg *cfg);
-+void gpi_reset(void *base);
-+void gpi_enable(void *base);
-+void gpi_disable(void *base);
-+void gpi_set_config(void *base, struct gpi_cfg *cfg);
-+
-+void class_init(struct class_cfg *cfg);
-+void class_reset(void);
-+void class_enable(void);
-+void class_disable(void);
-+void class_set_config(struct class_cfg *cfg);
-+
-+void tmu_reset(void);
-+void tmu_init(struct tmu_cfg *cfg);
-+void tmu_enable(u32 pe_mask);
-+void tmu_disable(u32 pe_mask);
-+u32  tmu_qstatus(u32 if_id);
-+u32  tmu_pkts_processed(u32 if_id);
-+
-+void util_init(struct util_cfg *cfg);
-+void util_reset(void);
-+void util_enable(void);
-+void util_disable(void);
-+
-+void hif_init(void);
-+void hif_tx_enable(void);
-+void hif_tx_disable(void);
-+void hif_rx_enable(void);
-+void hif_rx_disable(void);
-+
-+/* Get Chip Revision level
-+ *
-+ */
-+static inline unsigned int CHIP_REVISION(void)
-+{
-+	/*For LS1012A return always 1 */
-+	return 1;
-+}
-+
-+/* Start HIF rx DMA
-+ *
-+ */
-+static inline void hif_rx_dma_start(void)
-+{
-+	writel(HIF_CTRL_DMA_EN | HIF_CTRL_BDP_CH_START_WSTB, HIF_RX_CTRL);
-+}
-+
-+/* Start HIF tx DMA
-+ *
-+ */
-+static inline void hif_tx_dma_start(void)
-+{
-+	writel(HIF_CTRL_DMA_EN | HIF_CTRL_BDP_CH_START_WSTB, HIF_TX_CTRL);
-+}
-+
-+#endif /* _PFE_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_cdev.c
-@@ -0,0 +1,258 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2018 NXP
-+ */
-+
-+/* @pfe_cdev.c.
-+ *  Dummy device representing the PFE US in userspace.
-+ *  - used for interacting with the kernel layer for link status
-+ */
-+
-+#include <linux/eventfd.h>
-+#include <linux/irqreturn.h>
-+#include <linux/io.h>
-+#include <asm/irq.h>
-+
-+#include "pfe_cdev.h"
-+#include "pfe_mod.h"
-+
-+static int pfe_majno;
-+static struct class *pfe_char_class;
-+static struct device *pfe_char_dev;
-+struct eventfd_ctx *g_trigger;
-+
-+struct pfe_shared_info link_states[PFE_CDEV_ETH_COUNT];
-+
-+static int pfe_cdev_open(struct inode *inp, struct file *fp)
-+{
-+	pr_debug("PFE CDEV device opened.\n");
-+	return 0;
-+}
-+
-+static ssize_t pfe_cdev_read(struct file *fp, char *buf,
-+			     size_t len, loff_t *off)
-+{
-+	int ret = 0;
-+
-+	pr_info("PFE CDEV attempt copying (%lu) size of user.\n",
-+		sizeof(link_states));
-+
-+	pr_debug("Dump link_state on screen before copy_to_user\n");
-+	for (; ret < PFE_CDEV_ETH_COUNT; ret++) {
-+		pr_debug("%u  %u", link_states[ret].phy_id,
-+			 link_states[ret].state);
-+		pr_debug("\n");
-+	}
-+
-+	/* Copy to user the value in buffer sized len */
-+	ret = copy_to_user(buf, &link_states, sizeof(link_states));
-+	if (ret != 0) {
-+		pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
-+		       ret, len);
-+		return -EFAULT;
-+	}
-+
-+	/* offset set back to 0 as there is contextual reading offset */
-+	*off = 0;
-+	pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
-+
-+	return sizeof(link_states);
-+}
-+
-+/**
-+ * This function is for getting some commands from user through non-IOCTL
-+ * channel. It can used to configure the device.
-+ * TODO: To be filled in future, if require duplex communication with user
-+ * space.
-+ */
-+static ssize_t pfe_cdev_write(struct file *fp, const char *buf,
-+			      size_t len, loff_t *off)
-+{
-+	pr_info("PFE CDEV Write operation not supported!\n");
-+
-+	return -EFAULT;
-+}
-+
-+static int pfe_cdev_release(struct inode *inp, struct file *fp)
-+{
-+	if (g_trigger) {
-+		free_irq(pfe->hif_irq, g_trigger);
-+		eventfd_ctx_put(g_trigger);
-+		g_trigger = NULL;
-+	}
-+
-+	pr_info("PFE_CDEV: Device successfully closed\n");
-+	return 0;
-+}
-+
-+/*
-+ * hif_us_isr-
-+ * This ISR routine processes Rx/Tx done interrupts from the HIF hardware block
-+ */
-+static irqreturn_t hif_us_isr(int irq, void *arg)
-+{
-+	struct eventfd_ctx *trigger = (struct eventfd_ctx *)arg;
-+	int int_status;
-+	int int_enable_mask;
-+
-+	/*Read hif interrupt source register */
-+	int_status = readl_relaxed(HIF_INT_SRC);
-+	int_enable_mask = readl_relaxed(HIF_INT_ENABLE);
-+
-+	if ((int_status & HIF_INT) == 0)
-+		return IRQ_NONE;
-+
-+	if (int_status & HIF_RXPKT_INT) {
-+		int_enable_mask &= ~(HIF_RXPKT_INT);
-+		/* Disable interrupts, they will be enabled after
-+		 * they are serviced
-+		 */
-+		writel_relaxed(int_enable_mask, HIF_INT_ENABLE);
-+
-+		eventfd_signal(trigger, 1);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+#define PFE_INTR_COAL_USECS	100
-+static long pfe_cdev_ioctl(struct file *fp, unsigned int cmd,
-+			   unsigned long arg)
-+{
-+	int ret = -EFAULT;
-+	int __user *argp = (int __user *)arg;
-+
-+	pr_debug("PFE CDEV IOCTL Called with cmd=(%u)\n", cmd);
-+
-+	switch (cmd) {
-+	case PFE_CDEV_ETH0_STATE_GET:
-+		/* Return an unsigned int (link state) for ETH0 */
-+		*argp = link_states[0].state;
-+		pr_debug("Returning state=%d for ETH0\n", *argp);
-+		ret = 0;
-+		break;
-+	case PFE_CDEV_ETH1_STATE_GET:
-+		/* Return an unsigned int (link state) for ETH0 */
-+		*argp = link_states[1].state;
-+		pr_debug("Returning state=%d for ETH1\n", *argp);
-+		ret = 0;
-+		break;
-+	case PFE_CDEV_HIF_INTR_EN:
-+		/* Return success/failure */
-+		g_trigger = eventfd_ctx_fdget(*argp);
-+		if (IS_ERR(g_trigger))
-+			return PTR_ERR(g_trigger);
-+		ret = request_irq(pfe->hif_irq, hif_us_isr, 0, "pfe_hif",
-+				  g_trigger);
-+		if (ret) {
-+			pr_err("%s: failed to get the hif IRQ = %d\n",
-+			       __func__, pfe->hif_irq);
-+			eventfd_ctx_put(g_trigger);
-+			g_trigger = NULL;
-+		}
-+		writel((PFE_INTR_COAL_USECS * (pfe->ctrl.sys_clk / 1000)) |
-+			HIF_INT_COAL_ENABLE, HIF_INT_COAL);
-+
-+		pr_debug("request_irq for hif interrupt: %d\n", pfe->hif_irq);
-+		ret = 0;
-+		break;
-+	default:
-+		pr_info("Unsupport cmd (%d) for PFE CDEV.\n", cmd);
-+		break;
-+	};
-+
-+	return ret;
-+}
-+
-+static unsigned int pfe_cdev_poll(struct file *fp,
-+				  struct poll_table_struct *wait)
-+{
-+	pr_info("PFE CDEV poll method not supported\n");
-+	return 0;
-+}
-+
-+static const struct file_operations pfe_cdev_fops = {
-+	.open = pfe_cdev_open,
-+	.read = pfe_cdev_read,
-+	.write = pfe_cdev_write,
-+	.release = pfe_cdev_release,
-+	.unlocked_ioctl = pfe_cdev_ioctl,
-+	.poll = pfe_cdev_poll,
-+};
-+
-+int pfe_cdev_init(void)
-+{
-+	int ret;
-+
-+	pr_debug("PFE CDEV initialization begin\n");
-+
-+	/* Register the major number for the device */
-+	pfe_majno = register_chrdev(0, PFE_CDEV_NAME, &pfe_cdev_fops);
-+	if (pfe_majno < 0) {
-+		pr_err("Unable to register PFE CDEV. PFE CDEV not available\n");
-+		ret = pfe_majno;
-+		goto cleanup;
-+	}
-+
-+	pr_debug("PFE CDEV assigned major number: %d\n", pfe_majno);
-+
-+	/* Register the class for the device */
-+	pfe_char_class = class_create(THIS_MODULE, PFE_CLASS_NAME);
-+	if (IS_ERR(pfe_char_class)) {
-+		pr_err(
-+		"Failed to init class for PFE CDEV. PFE CDEV not available.\n");
-+		ret = PTR_ERR(pfe_char_class);
-+		goto cleanup;
-+	}
-+
-+	pr_debug("PFE CDEV Class created successfully.\n");
-+
-+	/* Create the device without any parent and without any callback data */
-+	    pfe_char_dev = device_create(pfe_char_class, NULL,
-+					 MKDEV(pfe_majno, 0), NULL,
-+					 PFE_CDEV_NAME);
-+	if (IS_ERR(pfe_char_dev)) {
-+		pr_err("Unable to PFE CDEV device. PFE CDEV not available.\n");
-+		ret = PTR_ERR(pfe_char_dev);
-+		goto cleanup;
-+	}
-+
-+	/* Information structure being shared with the userspace */
-+	memset(link_states, 0, sizeof(struct pfe_shared_info) *
-+			PFE_CDEV_ETH_COUNT);
-+
-+	pr_info("PFE CDEV created: %s\n", PFE_CDEV_NAME);
-+
-+	ret = 0;
-+	return ret;
-+
-+cleanup:
-+	if (!IS_ERR(pfe_char_class))
-+		class_destroy(pfe_char_class);
-+
-+	if (pfe_majno > 0)
-+		unregister_chrdev(pfe_majno, PFE_CDEV_NAME);
-+
-+	return ret;
-+}
-+
-+void pfe_cdev_exit(void)
-+{
-+	if (!IS_ERR(pfe_char_dev))
-+		device_destroy(pfe_char_class, MKDEV(pfe_majno, 0));
-+
-+	if (!IS_ERR(pfe_char_class)) {
-+		class_unregister(pfe_char_class);
-+		class_destroy(pfe_char_class);
-+	}
-+
-+	if (pfe_majno > 0)
-+		unregister_chrdev(pfe_majno, PFE_CDEV_NAME);
-+
-+	/* reset the variables */
-+	pfe_majno = 0;
-+	pfe_char_class = NULL;
-+	pfe_char_dev = NULL;
-+
-+	pr_info("PFE CDEV Removed.\n");
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_cdev.h
-@@ -0,0 +1,41 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2018 NXP
-+ */
-+
-+#ifndef _PFE_CDEV_H_
-+#define _PFE_CDEV_H_
-+
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/err.h>
-+#include <linux/kernel.h>
-+#include <linux/fs.h>
-+#include <linux/uaccess.h>
-+#include <linux/poll.h>
-+
-+#define  PFE_CDEV_NAME "pfe_us_cdev"
-+#define  PFE_CLASS_NAME  "ppfe_us"
-+
-+/* Extracted from ls1012a_pfe_platform_data, there are 3 interfaces which are
-+ * supported by PFE driver. Should be updated if number of eth devices are
-+ * changed.
-+ */
-+#define PFE_CDEV_ETH_COUNT 3
-+
-+struct pfe_shared_info {
-+	uint32_t phy_id; /* Link phy ID */
-+	uint8_t state;  /* Has either 0 or 1 */
-+};
-+
-+extern struct pfe_shared_info link_states[PFE_CDEV_ETH_COUNT];
-+
-+/* IOCTL Commands */
-+#define PFE_CDEV_ETH0_STATE_GET		_IOR('R', 0, int)
-+#define PFE_CDEV_ETH1_STATE_GET		_IOR('R', 1, int)
-+#define PFE_CDEV_HIF_INTR_EN		_IOWR('R', 2, int)
-+
-+int pfe_cdev_init(void);
-+void pfe_cdev_exit(void);
-+
-+#endif /* _PFE_CDEV_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_ctrl.c
-@@ -0,0 +1,226 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/sched.h>
-+#include <linux/module.h>
-+#include <linux/list.h>
-+#include <linux/kthread.h>
-+
-+#include "pfe_mod.h"
-+#include "pfe_ctrl.h"
-+
-+#define TIMEOUT_MS	1000
-+
-+int relax(unsigned long end)
-+{
-+	if (time_after(jiffies, end)) {
-+		if (time_after(jiffies, end + (TIMEOUT_MS * HZ) / 1000))
-+			return -1;
-+
-+		if (need_resched())
-+			schedule();
-+	}
-+
-+	return 0;
-+}
-+
-+void pfe_ctrl_suspend(struct pfe_ctrl *ctrl)
-+{
-+	int id;
-+
-+	mutex_lock(&ctrl->mutex);
-+
-+	for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++)
-+		pe_dmem_write(id, cpu_to_be32(0x1), CLASS_DM_RESUME, 4);
-+
-+	for (id = TMU0_ID; id <= TMU_MAX_ID; id++) {
-+		if (id == TMU2_ID)
-+			continue;
-+		pe_dmem_write(id, cpu_to_be32(0x1), TMU_DM_RESUME, 4);
-+	}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	pe_dmem_write(UTIL_ID, cpu_to_be32(0x1), UTIL_DM_RESUME, 4);
-+#endif
-+	mutex_unlock(&ctrl->mutex);
-+}
-+
-+void pfe_ctrl_resume(struct pfe_ctrl *ctrl)
-+{
-+	int pe_mask = CLASS_MASK | TMU_MASK;
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	pe_mask |= UTIL_MASK;
-+#endif
-+	mutex_lock(&ctrl->mutex);
-+	pe_start(&pfe->ctrl, pe_mask);
-+	mutex_unlock(&ctrl->mutex);
-+}
-+
-+/* PE sync stop.
-+ * Stops packet processing for a list of PE's (specified using a bitmask).
-+ * The caller must hold ctrl->mutex.
-+ *
-+ * @param ctrl		Control context
-+ * @param pe_mask	Mask of PE id's to stop
-+ *
-+ */
-+int pe_sync_stop(struct pfe_ctrl *ctrl, int pe_mask)
-+{
-+	struct pe_sync_mailbox *mbox;
-+	int pe_stopped = 0;
-+	unsigned long end = jiffies + 2;
-+	int i;
-+
-+	pe_mask &= 0x2FF;  /*Exclude Util + TMU2 */
-+
-+	for (i = 0; i < MAX_PE; i++)
-+		if (pe_mask & (1 << i)) {
-+			mbox = (void *)ctrl->sync_mailbox_baseaddr[i];
-+
-+			pe_dmem_write(i, cpu_to_be32(0x1), (unsigned
-+					long)&mbox->stop, 4);
-+		}
-+
-+	while (pe_stopped != pe_mask) {
-+		for (i = 0; i < MAX_PE; i++)
-+			if ((pe_mask & (1 << i)) && !(pe_stopped & (1 << i))) {
-+				mbox = (void *)ctrl->sync_mailbox_baseaddr[i];
-+
-+				if (pe_dmem_read(i, (unsigned
-+					long)&mbox->stopped, 4) &
-+					cpu_to_be32(0x1))
-+					pe_stopped |= (1 << i);
-+			}
-+
-+		if (relax(end) < 0)
-+			goto err;
-+	}
-+
-+	return 0;
-+
-+err:
-+	pr_err("%s: timeout, %x %x\n", __func__, pe_mask, pe_stopped);
-+
-+	for (i = 0; i < MAX_PE; i++)
-+		if (pe_mask & (1 << i)) {
-+			mbox = (void *)ctrl->sync_mailbox_baseaddr[i];
-+
-+			pe_dmem_write(i, cpu_to_be32(0x0), (unsigned
-+					long)&mbox->stop, 4);
-+	}
-+
-+	return -EIO;
-+}
-+
-+/* PE start.
-+ * Starts packet processing for a list of PE's (specified using a bitmask).
-+ * The caller must hold ctrl->mutex.
-+ *
-+ * @param ctrl		Control context
-+ * @param pe_mask	Mask of PE id's to start
-+ *
-+ */
-+void pe_start(struct pfe_ctrl *ctrl, int pe_mask)
-+{
-+	struct pe_sync_mailbox *mbox;
-+	int i;
-+
-+	for (i = 0; i < MAX_PE; i++)
-+		if (pe_mask & (1 << i)) {
-+			mbox = (void *)ctrl->sync_mailbox_baseaddr[i];
-+
-+			pe_dmem_write(i, cpu_to_be32(0x0), (unsigned
-+					long)&mbox->stop, 4);
-+		}
-+}
-+
-+/* This function will ensure all PEs are put in to idle state */
-+int pe_reset_all(struct pfe_ctrl *ctrl)
-+{
-+	struct pe_sync_mailbox *mbox;
-+	int pe_stopped = 0;
-+	unsigned long end = jiffies + 2;
-+	int i;
-+	int pe_mask  = CLASS_MASK | TMU_MASK;
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	pe_mask |= UTIL_MASK;
-+#endif
-+
-+	for (i = 0; i < MAX_PE; i++)
-+		if (pe_mask & (1 << i)) {
-+			mbox = (void *)ctrl->sync_mailbox_baseaddr[i];
-+
-+			pe_dmem_write(i, cpu_to_be32(0x2), (unsigned
-+					long)&mbox->stop, 4);
-+		}
-+
-+	while (pe_stopped != pe_mask) {
-+		for (i = 0; i < MAX_PE; i++)
-+			if ((pe_mask & (1 << i)) && !(pe_stopped & (1 << i))) {
-+				mbox = (void *)ctrl->sync_mailbox_baseaddr[i];
-+
-+				if (pe_dmem_read(i, (unsigned long)
-+							&mbox->stopped, 4) &
-+						cpu_to_be32(0x1))
-+					pe_stopped |= (1 << i);
-+			}
-+
-+		if (relax(end) < 0)
-+			goto err;
-+	}
-+
-+	return 0;
-+
-+err:
-+	pr_err("%s: timeout, %x %x\n", __func__, pe_mask, pe_stopped);
-+	return -EIO;
-+}
-+
-+int pfe_ctrl_init(struct pfe *pfe)
-+{
-+	struct pfe_ctrl *ctrl = &pfe->ctrl;
-+	int id;
-+
-+	pr_info("%s\n", __func__);
-+
-+	mutex_init(&ctrl->mutex);
-+	spin_lock_init(&ctrl->lock);
-+
-+	for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++) {
-+		ctrl->sync_mailbox_baseaddr[id] = CLASS_DM_SYNC_MBOX;
-+		ctrl->msg_mailbox_baseaddr[id] = CLASS_DM_MSG_MBOX;
-+	}
-+
-+	for (id = TMU0_ID; id <= TMU_MAX_ID; id++) {
-+		if (id == TMU2_ID)
-+			continue;
-+		ctrl->sync_mailbox_baseaddr[id] = TMU_DM_SYNC_MBOX;
-+		ctrl->msg_mailbox_baseaddr[id] = TMU_DM_MSG_MBOX;
-+	}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	ctrl->sync_mailbox_baseaddr[UTIL_ID] = UTIL_DM_SYNC_MBOX;
-+	ctrl->msg_mailbox_baseaddr[UTIL_ID] = UTIL_DM_MSG_MBOX;
-+#endif
-+
-+	ctrl->hash_array_baseaddr = pfe->ddr_baseaddr + ROUTE_TABLE_BASEADDR;
-+	ctrl->hash_array_phys_baseaddr = pfe->ddr_phys_baseaddr +
-+						ROUTE_TABLE_BASEADDR;
-+
-+	ctrl->dev = pfe->dev;
-+
-+	pr_info("%s finished\n", __func__);
-+
-+	return 0;
-+}
-+
-+void pfe_ctrl_exit(struct pfe *pfe)
-+{
-+	pr_info("%s\n", __func__);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_ctrl.h
-@@ -0,0 +1,100 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_CTRL_H_
-+#define _PFE_CTRL_H_
-+
-+#include <linux/dmapool.h>
-+
-+#include "pfe/pfe.h"
-+
-+#define DMA_BUF_SIZE_128	0x80	/* enough for 1 conntracks */
-+#define DMA_BUF_SIZE_256	0x100
-+/* enough for 2 conntracks, 1 bridge entry or 1 multicast entry */
-+#define DMA_BUF_SIZE_512	0x200
-+/* 512bytes dma allocated buffers used by rtp relay feature */
-+#define DMA_BUF_MIN_ALIGNMENT	8
-+#define DMA_BUF_BOUNDARY	(4 * 1024)
-+/* bursts can not cross 4k boundary */
-+
-+#define CMD_TX_ENABLE	0x0501
-+#define CMD_TX_DISABLE	0x0502
-+
-+#define CMD_RX_LRO		0x0011
-+#define CMD_PKTCAP_ENABLE       0x0d01
-+#define CMD_QM_EXPT_RATE	0x020c
-+
-+#define CLASS_DM_SH_STATIC		(0x800)
-+#define CLASS_DM_CPU_TICKS		(CLASS_DM_SH_STATIC)
-+#define CLASS_DM_SYNC_MBOX		(0x808)
-+#define CLASS_DM_MSG_MBOX		(0x810)
-+#define CLASS_DM_DROP_CNTR		(0x820)
-+#define CLASS_DM_RESUME			(0x854)
-+#define CLASS_DM_PESTATUS		(0x860)
-+#define CLASS_DM_CRC_VALIDATED		(0x14b0)
-+
-+#define TMU_DM_SH_STATIC		(0x80)
-+#define TMU_DM_CPU_TICKS		(TMU_DM_SH_STATIC)
-+#define TMU_DM_SYNC_MBOX		(0x88)
-+#define TMU_DM_MSG_MBOX			(0x90)
-+#define TMU_DM_RESUME			(0xA0)
-+#define TMU_DM_PESTATUS			(0xB0)
-+#define TMU_DM_CONTEXT			(0x300)
-+#define TMU_DM_TX_TRANS			(0x480)
-+
-+#define UTIL_DM_SH_STATIC		(0x0)
-+#define UTIL_DM_CPU_TICKS		(UTIL_DM_SH_STATIC)
-+#define UTIL_DM_SYNC_MBOX		(0x8)
-+#define UTIL_DM_MSG_MBOX		(0x10)
-+#define UTIL_DM_DROP_CNTR		(0x20)
-+#define UTIL_DM_RESUME			(0x40)
-+#define UTIL_DM_PESTATUS		(0x50)
-+
-+struct pfe_ctrl {
-+	struct mutex mutex; /* to serialize pfe control access */
-+	spinlock_t lock;
-+
-+	void *dma_pool;
-+	void *dma_pool_512;
-+	void *dma_pool_128;
-+
-+	struct device *dev;
-+
-+	void *hash_array_baseaddr;		/*
-+						 * Virtual base address of
-+						 * the conntrack hash array
-+						 */
-+	unsigned long hash_array_phys_baseaddr; /*
-+						 * Physical base address of
-+						 * the conntrack hash array
-+						 */
-+
-+	int (*event_cb)(u16, u16, u16*);
-+
-+	unsigned long sync_mailbox_baseaddr[MAX_PE]; /*
-+						      * Sync mailbox PFE
-+						      * internal address,
-+						      * initialized
-+						      * when parsing elf images
-+						      */
-+	unsigned long msg_mailbox_baseaddr[MAX_PE]; /*
-+						     * Msg mailbox PFE internal
-+						     * address, initialized
-+						     * when parsing elf images
-+						     */
-+	unsigned int sys_clk;			/* AXI clock value, in KHz */
-+};
-+
-+int pfe_ctrl_init(struct pfe *pfe);
-+void pfe_ctrl_exit(struct pfe *pfe);
-+int pe_sync_stop(struct pfe_ctrl *ctrl, int pe_mask);
-+void pe_start(struct pfe_ctrl *ctrl, int pe_mask);
-+int pe_reset_all(struct pfe_ctrl *ctrl);
-+void pfe_ctrl_suspend(struct pfe_ctrl *ctrl);
-+void pfe_ctrl_resume(struct pfe_ctrl *ctrl);
-+int relax(unsigned long end);
-+
-+#endif /* _PFE_CTRL_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_debugfs.c
-@@ -0,0 +1,99 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/debugfs.h>
-+#include <linux/platform_device.h>
-+
-+#include "pfe_mod.h"
-+
-+static int dmem_show(struct seq_file *s, void *unused)
-+{
-+	u32 dmem_addr, val;
-+	int id = (long int)s->private;
-+	int i;
-+
-+	for (dmem_addr = 0; dmem_addr < CLASS_DMEM_SIZE; dmem_addr += 8 * 4) {
-+		seq_printf(s, "%04x:", dmem_addr);
-+
-+		for (i = 0; i < 8; i++) {
-+			val = pe_dmem_read(id, dmem_addr + i * 4, 4);
-+			seq_printf(s, " %02x %02x %02x %02x", val & 0xff,
-+				   (val >> 8) & 0xff, (val >> 16) & 0xff,
-+				   (val >> 24) & 0xff);
-+		}
-+
-+		seq_puts(s, "\n");
-+	}
-+
-+	return 0;
-+}
-+
-+static int dmem_open(struct inode *inode, struct file *file)
-+{
-+	return single_open(file, dmem_show, inode->i_private);
-+}
-+
-+static const struct file_operations dmem_fops = {
-+	.open		= dmem_open,
-+	.read		= seq_read,
-+	.llseek		= seq_lseek,
-+	.release	= single_release,
-+};
-+
-+int pfe_debugfs_init(struct pfe *pfe)
-+{
-+	struct dentry *d;
-+
-+	pr_info("%s\n", __func__);
-+
-+	pfe->dentry = debugfs_create_dir("pfe", NULL);
-+	if (IS_ERR_OR_NULL(pfe->dentry))
-+		goto err_dir;
-+
-+	d = debugfs_create_file("pe0_dmem", 0444, pfe->dentry, (void *)0,
-+				&dmem_fops);
-+	if (IS_ERR_OR_NULL(d))
-+		goto err_pe;
-+
-+	d = debugfs_create_file("pe1_dmem", 0444, pfe->dentry, (void *)1,
-+				&dmem_fops);
-+	if (IS_ERR_OR_NULL(d))
-+		goto err_pe;
-+
-+	d = debugfs_create_file("pe2_dmem", 0444, pfe->dentry, (void *)2,
-+				&dmem_fops);
-+	if (IS_ERR_OR_NULL(d))
-+		goto err_pe;
-+
-+	d = debugfs_create_file("pe3_dmem", 0444, pfe->dentry, (void *)3,
-+				&dmem_fops);
-+	if (IS_ERR_OR_NULL(d))
-+		goto err_pe;
-+
-+	d = debugfs_create_file("pe4_dmem", 0444, pfe->dentry, (void *)4,
-+				&dmem_fops);
-+	if (IS_ERR_OR_NULL(d))
-+		goto err_pe;
-+
-+	d = debugfs_create_file("pe5_dmem", 0444, pfe->dentry, (void *)5,
-+				&dmem_fops);
-+	if (IS_ERR_OR_NULL(d))
-+		goto err_pe;
-+
-+	return 0;
-+
-+err_pe:
-+	debugfs_remove_recursive(pfe->dentry);
-+
-+err_dir:
-+	return -1;
-+}
-+
-+void pfe_debugfs_exit(struct pfe *pfe)
-+{
-+	debugfs_remove_recursive(pfe->dentry);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_debugfs.h
-@@ -0,0 +1,13 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_DEBUGFS_H_
-+#define _PFE_DEBUGFS_H_
-+
-+int pfe_debugfs_init(struct pfe *pfe);
-+void pfe_debugfs_exit(struct pfe *pfe);
-+
-+#endif /* _PFE_DEBUGFS_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_eth.c
-@@ -0,0 +1,2588 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+/* @pfe_eth.c.
-+ *  Ethernet driver for to handle exception path for PFE.
-+ *  - uses HIF functions to send/receive packets.
-+ *  - uses ctrl function to start/stop interfaces.
-+ *  - uses direct register accesses to control phy operation.
-+ */
-+#include <linux/version.h>
-+#include <linux/kernel.h>
-+#include <linux/interrupt.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/ethtool.h>
-+#include <linux/mii.h>
-+#include <linux/phy.h>
-+#include <linux/timer.h>
-+#include <linux/hrtimer.h>
-+#include <linux/platform_device.h>
-+
-+#include <net/ip.h>
-+#include <net/sock.h>
-+
-+#include <linux/of.h>
-+#include <linux/of_mdio.h>
-+
-+#include <linux/io.h>
-+#include <asm/irq.h>
-+#include <linux/delay.h>
-+#include <linux/regmap.h>
-+#include <linux/i2c.h>
-+#include <linux/sys_soc.h>
-+
-+#if defined(CONFIG_NF_CONNTRACK_MARK)
-+#include <net/netfilter/nf_conntrack.h>
-+#endif
-+
-+#include "pfe_mod.h"
-+#include "pfe_eth.h"
-+#include "pfe_cdev.h"
-+
-+#define LS1012A_REV_1_0		0x87040010
-+
-+bool pfe_use_old_dts_phy;
-+bool pfe_errata_a010897;
-+
-+static void *cbus_emac_base[3];
-+static void *cbus_gpi_base[3];
-+
-+/* Forward Declaration */
-+static void pfe_eth_exit_one(struct pfe_eth_priv_s *priv);
-+static void pfe_eth_flush_tx(struct pfe_eth_priv_s *priv);
-+static void pfe_eth_flush_txQ(struct pfe_eth_priv_s *priv, int tx_q_num, int
-+				from_tx, int n_desc);
-+
-+/* MDIO registers */
-+#define MDIO_SGMII_CR			0x00
-+#define MDIO_SGMII_SR			0x01
-+#define MDIO_SGMII_DEV_ABIL_SGMII	0x04
-+#define MDIO_SGMII_LINK_TMR_L		0x12
-+#define MDIO_SGMII_LINK_TMR_H		0x13
-+#define MDIO_SGMII_IF_MODE		0x14
-+
-+/* SGMII Control defines */
-+#define SGMII_CR_RST			0x8000
-+#define SGMII_CR_AN_EN			0x1000
-+#define SGMII_CR_RESTART_AN		0x0200
-+#define SGMII_CR_FD			0x0100
-+#define SGMII_CR_SPEED_SEL1_1G		0x0040
-+#define SGMII_CR_DEF_VAL		(SGMII_CR_AN_EN | SGMII_CR_FD | \
-+					 SGMII_CR_SPEED_SEL1_1G)
-+
-+/* SGMII IF Mode */
-+#define SGMII_DUPLEX_HALF		0x10
-+#define SGMII_SPEED_10MBPS		0x00
-+#define SGMII_SPEED_100MBPS		0x04
-+#define SGMII_SPEED_1GBPS		0x08
-+#define SGMII_USE_SGMII_AN		0x02
-+#define SGMII_EN			0x01
-+
-+/* SGMII Device Ability for SGMII */
-+#define SGMII_DEV_ABIL_ACK		0x4000
-+#define SGMII_DEV_ABIL_EEE_CLK_STP_EN	0x0100
-+#define SGMII_DEV_ABIL_SGMII		0x0001
-+
-+unsigned int gemac_regs[] = {
-+	0x0004, /* Interrupt event */
-+	0x0008, /* Interrupt mask */
-+	0x0024, /* Ethernet control */
-+	0x0064, /* MIB Control/Status */
-+	0x0084, /* Receive control/status */
-+	0x00C4, /* Transmit control */
-+	0x00E4, /* Physical address low */
-+	0x00E8, /* Physical address high */
-+	0x0144, /* Transmit FIFO Watermark and Store and Forward Control*/
-+	0x0190, /* Receive FIFO Section Full Threshold */
-+	0x01A0, /* Transmit FIFO Section Empty Threshold */
-+	0x01B0, /* Frame Truncation Length */
-+};
-+
-+const struct soc_device_attribute ls1012a_rev1_soc_attr[] = {
-+	{ .family = "QorIQ LS1012A",
-+	  .soc_id = "svr:0x87040010",
-+	  .revision = "1.0",
-+	  .data = NULL },
-+	{ },
-+};
-+
-+/********************************************************************/
-+/*                   SYSFS INTERFACE				    */
-+/********************************************************************/
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+/*
-+ * pfe_eth_show_napi_stats
-+ */
-+static ssize_t pfe_eth_show_napi_stats(struct device *dev,
-+				       struct device_attribute *attr,
-+				       char *buf)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+	ssize_t len = 0;
-+
-+	len += sprintf(buf + len, "sched:  %u\n",
-+			priv->napi_counters[NAPI_SCHED_COUNT]);
-+	len += sprintf(buf + len, "poll:   %u\n",
-+			priv->napi_counters[NAPI_POLL_COUNT]);
-+	len += sprintf(buf + len, "packet: %u\n",
-+			priv->napi_counters[NAPI_PACKET_COUNT]);
-+	len += sprintf(buf + len, "budget: %u\n",
-+			priv->napi_counters[NAPI_FULL_BUDGET_COUNT]);
-+	len += sprintf(buf + len, "desc:   %u\n",
-+			priv->napi_counters[NAPI_DESC_COUNT]);
-+
-+	return len;
-+}
-+
-+/*
-+ * pfe_eth_set_napi_stats
-+ */
-+static ssize_t pfe_eth_set_napi_stats(struct device *dev,
-+				      struct device_attribute *attr,
-+				      const char *buf, size_t count)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+
-+	memset(priv->napi_counters, 0, sizeof(priv->napi_counters));
-+
-+	return count;
-+}
-+#endif
-+#ifdef PFE_ETH_TX_STATS
-+/* pfe_eth_show_tx_stats
-+ *
-+ */
-+static ssize_t pfe_eth_show_tx_stats(struct device *dev,
-+				     struct device_attribute *attr,
-+				     char *buf)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+	ssize_t len = 0;
-+	int i;
-+
-+	len += sprintf(buf + len, "TX queues stats:\n");
-+
-+	for (i = 0; i < emac_txq_cnt; i++) {
-+		struct netdev_queue *tx_queue = netdev_get_tx_queue(priv->ndev,
-+									i);
-+
-+		len += sprintf(buf + len, "\n");
-+		__netif_tx_lock_bh(tx_queue);
-+
-+		hif_tx_lock(&pfe->hif);
-+		len += sprintf(buf + len,
-+				"Queue %2d :  credits               = %10d\n"
-+				, i, hif_lib_tx_credit_avail(pfe, priv->id, i));
-+		len += sprintf(buf + len,
-+				 "            tx packets            = %10d\n"
-+				,  pfe->tmu_credit.tx_packets[priv->id][i]);
-+		hif_tx_unlock(&pfe->hif);
-+
-+		/* Don't output additionnal stats if queue never used */
-+		if (!pfe->tmu_credit.tx_packets[priv->id][i])
-+			goto skip;
-+
-+		len += sprintf(buf + len,
-+				 "            clean_fail            = %10d\n"
-+				, priv->clean_fail[i]);
-+		len += sprintf(buf + len,
-+				 "            stop_queue            = %10d\n"
-+				, priv->stop_queue_total[i]);
-+		len += sprintf(buf + len,
-+				 "            stop_queue_hif        = %10d\n"
-+				, priv->stop_queue_hif[i]);
-+		len += sprintf(buf + len,
-+				"            stop_queue_hif_client = %10d\n"
-+				, priv->stop_queue_hif_client[i]);
-+		len += sprintf(buf + len,
-+				 "            stop_queue_credit     = %10d\n"
-+				, priv->stop_queue_credit[i]);
-+skip:
-+		__netif_tx_unlock_bh(tx_queue);
-+	}
-+	return len;
-+}
-+
-+/* pfe_eth_set_tx_stats
-+ *
-+ */
-+static ssize_t pfe_eth_set_tx_stats(struct device *dev,
-+				    struct device_attribute *attr,
-+				    const char *buf, size_t count)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+	int i;
-+
-+	for (i = 0; i < emac_txq_cnt; i++) {
-+		struct netdev_queue *tx_queue = netdev_get_tx_queue(priv->ndev,
-+									i);
-+
-+		__netif_tx_lock_bh(tx_queue);
-+		priv->clean_fail[i] = 0;
-+		priv->stop_queue_total[i] = 0;
-+		priv->stop_queue_hif[i] = 0;
-+		priv->stop_queue_hif_client[i] = 0;
-+		priv->stop_queue_credit[i] = 0;
-+		__netif_tx_unlock_bh(tx_queue);
-+	}
-+
-+	return count;
-+}
-+#endif
-+/* pfe_eth_show_txavail
-+ *
-+ */
-+static ssize_t pfe_eth_show_txavail(struct device *dev,
-+				    struct device_attribute *attr,
-+				    char *buf)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+	ssize_t len = 0;
-+	int i;
-+
-+	for (i = 0; i < emac_txq_cnt; i++) {
-+		struct netdev_queue *tx_queue = netdev_get_tx_queue(priv->ndev,
-+									i);
-+
-+		__netif_tx_lock_bh(tx_queue);
-+
-+		len += sprintf(buf + len, "%d",
-+				hif_lib_tx_avail(&priv->client, i));
-+
-+		__netif_tx_unlock_bh(tx_queue);
-+
-+		if (i == (emac_txq_cnt - 1))
-+			len += sprintf(buf + len, "\n");
-+		else
-+			len += sprintf(buf + len, " ");
-+	}
-+
-+	return len;
-+}
-+
-+/* pfe_eth_show_default_priority
-+ *
-+ */
-+static ssize_t pfe_eth_show_default_priority(struct device *dev,
-+					     struct device_attribute *attr,
-+						char *buf)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+	unsigned long flags;
-+	int rc;
-+
-+	spin_lock_irqsave(&priv->lock, flags);
-+	rc = sprintf(buf, "%d\n", priv->default_priority);
-+	spin_unlock_irqrestore(&priv->lock, flags);
-+
-+	return rc;
-+}
-+
-+/* pfe_eth_set_default_priority
-+ *
-+ */
-+
-+static ssize_t pfe_eth_set_default_priority(struct device *dev,
-+					    struct device_attribute *attr,
-+					    const char *buf, size_t count)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(to_net_dev(dev));
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&priv->lock, flags);
-+	priv->default_priority = kstrtoul(buf, 0, 0);
-+	spin_unlock_irqrestore(&priv->lock, flags);
-+
-+	return count;
-+}
-+
-+static DEVICE_ATTR(txavail, 0444, pfe_eth_show_txavail, NULL);
-+static DEVICE_ATTR(default_priority, 0644, pfe_eth_show_default_priority,
-+			pfe_eth_set_default_priority);
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+static DEVICE_ATTR(napi_stats, 0644, pfe_eth_show_napi_stats,
-+			pfe_eth_set_napi_stats);
-+#endif
-+
-+#ifdef PFE_ETH_TX_STATS
-+static DEVICE_ATTR(tx_stats, 0644, pfe_eth_show_tx_stats,
-+			pfe_eth_set_tx_stats);
-+#endif
-+
-+/*
-+ * pfe_eth_sysfs_init
-+ *
-+ */
-+static int pfe_eth_sysfs_init(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	int err;
-+
-+	/* Initialize the default values */
-+
-+	/*
-+	 * By default, packets without conntrack will use this default low
-+	 * priority queue
-+	 */
-+	priv->default_priority = 0;
-+
-+	/* Create our sysfs files */
-+	err = device_create_file(&ndev->dev, &dev_attr_default_priority);
-+	if (err) {
-+		netdev_err(ndev,
-+			   "failed to create default_priority sysfs files\n");
-+		goto err_priority;
-+	}
-+
-+	err = device_create_file(&ndev->dev, &dev_attr_txavail);
-+	if (err) {
-+		netdev_err(ndev,
-+			   "failed to create default_priority sysfs files\n");
-+		goto err_txavail;
-+	}
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+	err = device_create_file(&ndev->dev, &dev_attr_napi_stats);
-+	if (err) {
-+		netdev_err(ndev, "failed to create napi stats sysfs files\n");
-+		goto err_napi;
-+	}
-+#endif
-+
-+#ifdef PFE_ETH_TX_STATS
-+	err = device_create_file(&ndev->dev, &dev_attr_tx_stats);
-+	if (err) {
-+		netdev_err(ndev, "failed to create tx stats sysfs files\n");
-+		goto err_tx;
-+	}
-+#endif
-+
-+	return 0;
-+
-+#ifdef PFE_ETH_TX_STATS
-+err_tx:
-+#endif
-+#ifdef PFE_ETH_NAPI_STATS
-+	device_remove_file(&ndev->dev, &dev_attr_napi_stats);
-+
-+err_napi:
-+#endif
-+	device_remove_file(&ndev->dev, &dev_attr_txavail);
-+
-+err_txavail:
-+	device_remove_file(&ndev->dev, &dev_attr_default_priority);
-+
-+err_priority:
-+	return -1;
-+}
-+
-+/* pfe_eth_sysfs_exit
-+ *
-+ */
-+void pfe_eth_sysfs_exit(struct net_device *ndev)
-+{
-+#ifdef PFE_ETH_TX_STATS
-+	device_remove_file(&ndev->dev, &dev_attr_tx_stats);
-+#endif
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+	device_remove_file(&ndev->dev, &dev_attr_napi_stats);
-+#endif
-+	device_remove_file(&ndev->dev, &dev_attr_txavail);
-+	device_remove_file(&ndev->dev, &dev_attr_default_priority);
-+}
-+
-+/*************************************************************************/
-+/*		ETHTOOL INTERCAE					 */
-+/*************************************************************************/
-+
-+/*MTIP GEMAC */
-+static const struct fec_stat {
-+	char name[ETH_GSTRING_LEN];
-+	u16 offset;
-+} fec_stats[] = {
-+	/* RMON TX */
-+	{ "tx_dropped", RMON_T_DROP },
-+	{ "tx_packets", RMON_T_PACKETS },
-+	{ "tx_broadcast", RMON_T_BC_PKT },
-+	{ "tx_multicast", RMON_T_MC_PKT },
-+	{ "tx_crc_errors", RMON_T_CRC_ALIGN },
-+	{ "tx_undersize", RMON_T_UNDERSIZE },
-+	{ "tx_oversize", RMON_T_OVERSIZE },
-+	{ "tx_fragment", RMON_T_FRAG },
-+	{ "tx_jabber", RMON_T_JAB },
-+	{ "tx_collision", RMON_T_COL },
-+	{ "tx_64byte", RMON_T_P64 },
-+	{ "tx_65to127byte", RMON_T_P65TO127 },
-+	{ "tx_128to255byte", RMON_T_P128TO255 },
-+	{ "tx_256to511byte", RMON_T_P256TO511 },
-+	{ "tx_512to1023byte", RMON_T_P512TO1023 },
-+	{ "tx_1024to2047byte", RMON_T_P1024TO2047 },
-+	{ "tx_GTE2048byte", RMON_T_P_GTE2048 },
-+	{ "tx_octets", RMON_T_OCTETS },
-+
-+	/* IEEE TX */
-+	{ "IEEE_tx_drop", IEEE_T_DROP },
-+	{ "IEEE_tx_frame_ok", IEEE_T_FRAME_OK },
-+	{ "IEEE_tx_1col", IEEE_T_1COL },
-+	{ "IEEE_tx_mcol", IEEE_T_MCOL },
-+	{ "IEEE_tx_def", IEEE_T_DEF },
-+	{ "IEEE_tx_lcol", IEEE_T_LCOL },
-+	{ "IEEE_tx_excol", IEEE_T_EXCOL },
-+	{ "IEEE_tx_macerr", IEEE_T_MACERR },
-+	{ "IEEE_tx_cserr", IEEE_T_CSERR },
-+	{ "IEEE_tx_sqe", IEEE_T_SQE },
-+	{ "IEEE_tx_fdxfc", IEEE_T_FDXFC },
-+	{ "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK },
-+
-+	/* RMON RX */
-+	{ "rx_packets", RMON_R_PACKETS },
-+	{ "rx_broadcast", RMON_R_BC_PKT },
-+	{ "rx_multicast", RMON_R_MC_PKT },
-+	{ "rx_crc_errors", RMON_R_CRC_ALIGN },
-+	{ "rx_undersize", RMON_R_UNDERSIZE },
-+	{ "rx_oversize", RMON_R_OVERSIZE },
-+	{ "rx_fragment", RMON_R_FRAG },
-+	{ "rx_jabber", RMON_R_JAB },
-+	{ "rx_64byte", RMON_R_P64 },
-+	{ "rx_65to127byte", RMON_R_P65TO127 },
-+	{ "rx_128to255byte", RMON_R_P128TO255 },
-+	{ "rx_256to511byte", RMON_R_P256TO511 },
-+	{ "rx_512to1023byte", RMON_R_P512TO1023 },
-+	{ "rx_1024to2047byte", RMON_R_P1024TO2047 },
-+	{ "rx_GTE2048byte", RMON_R_P_GTE2048 },
-+	{ "rx_octets", RMON_R_OCTETS },
-+
-+	/* IEEE RX */
-+	{ "IEEE_rx_drop", IEEE_R_DROP },
-+	{ "IEEE_rx_frame_ok", IEEE_R_FRAME_OK },
-+	{ "IEEE_rx_crc", IEEE_R_CRC },
-+	{ "IEEE_rx_align", IEEE_R_ALIGN },
-+	{ "IEEE_rx_macerr", IEEE_R_MACERR },
-+	{ "IEEE_rx_fdxfc", IEEE_R_FDXFC },
-+	{ "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK },
-+};
-+
-+static void pfe_eth_fill_stats(struct net_device *ndev, struct ethtool_stats
-+				*stats, u64 *data)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	int i;
-+	u64 pfe_crc_validated = 0;
-+	int id;
-+
-+	for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++) {
-+		pfe_crc_validated += be32_to_cpu(pe_dmem_read(id,
-+			CLASS_DM_CRC_VALIDATED + (priv->id * 4), 4));
-+	}
-+
-+	for (i = 0; i < ARRAY_SIZE(fec_stats); i++) {
-+		data[i] = readl(priv->EMAC_baseaddr + fec_stats[i].offset);
-+
-+		if (fec_stats[i].offset == IEEE_R_DROP)
-+			data[i] -= pfe_crc_validated;
-+	}
-+}
-+
-+static void pfe_eth_gstrings(struct net_device *netdev,
-+			     u32 stringset, u8 *data)
-+{
-+	int i;
-+
-+	switch (stringset) {
-+	case ETH_SS_STATS:
-+		for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
-+			memcpy(data + i * ETH_GSTRING_LEN,
-+			       fec_stats[i].name, ETH_GSTRING_LEN);
-+		break;
-+	}
-+}
-+
-+static int pfe_eth_stats_count(struct net_device *ndev, int sset)
-+{
-+	switch (sset) {
-+	case ETH_SS_STATS:
-+		return ARRAY_SIZE(fec_stats);
-+	default:
-+		return -EOPNOTSUPP;
-+	}
-+}
-+
-+/*
-+ * pfe_eth_gemac_reglen - Return the length of the register structure.
-+ *
-+ */
-+static int pfe_eth_gemac_reglen(struct net_device *ndev)
-+{
-+	pr_info("%s()\n", __func__);
-+	return (sizeof(gemac_regs) / sizeof(u32));
-+}
-+
-+/*
-+ * pfe_eth_gemac_get_regs - Return the gemac register structure.
-+ *
-+ */
-+static void  pfe_eth_gemac_get_regs(struct net_device *ndev, struct ethtool_regs
-+					*regs, void *regbuf)
-+{
-+	int i;
-+
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	u32 *buf = (u32 *)regbuf;
-+
-+	pr_info("%s()\n", __func__);
-+	for (i = 0; i < sizeof(gemac_regs) / sizeof(u32); i++)
-+		buf[i] = readl(priv->EMAC_baseaddr + gemac_regs[i]);
-+}
-+
-+/*
-+ * pfe_eth_set_wol - Set the magic packet option, in WoL register.
-+ *
-+ */
-+static int pfe_eth_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	if (wol->wolopts & ~WAKE_MAGIC)
-+		return -EOPNOTSUPP;
-+
-+	/* for MTIP we store wol->wolopts */
-+	priv->wol = wol->wolopts;
-+
-+	device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC);
-+
-+	return 0;
-+}
-+
-+/*
-+ *
-+ * pfe_eth_get_wol - Get the WoL options.
-+ *
-+ */
-+static void pfe_eth_get_wol(struct net_device *ndev, struct ethtool_wolinfo
-+				*wol)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	wol->supported = WAKE_MAGIC;
-+	wol->wolopts = 0;
-+
-+	if (priv->wol & WAKE_MAGIC)
-+		wol->wolopts = WAKE_MAGIC;
-+
-+	memset(&wol->sopass, 0, sizeof(wol->sopass));
-+}
-+
-+/*
-+ * pfe_eth_get_drvinfo -  Fills in the drvinfo structure with some basic info
-+ *
-+ */
-+static void pfe_eth_get_drvinfo(struct net_device *ndev, struct ethtool_drvinfo
-+				*drvinfo)
-+{
-+	strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
-+	strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
-+	strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
-+	strlcpy(drvinfo->bus_info, "N/A", sizeof(drvinfo->bus_info));
-+}
-+
-+/*
-+ * pfe_eth_set_settings - Used to send commands to PHY.
-+ *
-+ */
-+static int pfe_eth_set_settings(struct net_device *ndev,
-+				const struct ethtool_link_ksettings *cmd)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	struct phy_device *phydev = priv->phydev;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_ksettings_set(phydev, cmd);
-+}
-+
-+/*
-+ * pfe_eth_getsettings - Return the current settings in the ethtool_cmd
-+ * structure.
-+ *
-+ */
-+static int pfe_eth_get_settings(struct net_device *ndev,
-+				struct ethtool_link_ksettings *cmd)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	struct phy_device *phydev = priv->phydev;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	phy_ethtool_ksettings_get(phydev, cmd);
-+
-+	return 0;
-+}
-+
-+/*
-+ * pfe_eth_get_msglevel - Gets the debug message mask.
-+ *
-+ */
-+static uint32_t pfe_eth_get_msglevel(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	return priv->msg_enable;
-+}
-+
-+/*
-+ * pfe_eth_set_msglevel - Sets the debug message mask.
-+ *
-+ */
-+static void pfe_eth_set_msglevel(struct net_device *ndev, uint32_t data)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	priv->msg_enable = data;
-+}
-+
-+#define HIF_RX_COAL_MAX_CLKS		(~(1 << 31))
-+#define HIF_RX_COAL_CLKS_PER_USEC	(pfe->ctrl.sys_clk / 1000)
-+#define HIF_RX_COAL_MAX_USECS		(HIF_RX_COAL_MAX_CLKS	/ \
-+						HIF_RX_COAL_CLKS_PER_USEC)
-+
-+/*
-+ * pfe_eth_set_coalesce - Sets rx interrupt coalescing timer.
-+ *
-+ */
-+static int pfe_eth_set_coalesce(struct net_device *ndev,
-+				struct ethtool_coalesce *ec,
-+				struct kernel_ethtool_coalesce *kernel_coal,
-+				struct netlink_ext_ack *extack)
-+{
-+	if (ec->rx_coalesce_usecs > HIF_RX_COAL_MAX_USECS)
-+		return -EINVAL;
-+
-+	if (!ec->rx_coalesce_usecs) {
-+		writel(0, HIF_INT_COAL);
-+		return 0;
-+	}
-+
-+	writel((ec->rx_coalesce_usecs * HIF_RX_COAL_CLKS_PER_USEC) |
-+			HIF_INT_COAL_ENABLE, HIF_INT_COAL);
-+
-+	return 0;
-+}
-+
-+/*
-+ * pfe_eth_get_coalesce - Gets rx interrupt coalescing timer value.
-+ *
-+ */
-+static int pfe_eth_get_coalesce(struct net_device *ndev,
-+				struct ethtool_coalesce *ec,
-+				struct kernel_ethtool_coalesce *kernel_coal,
-+				struct netlink_ext_ack *extack)
-+{
-+	int reg_val = readl(HIF_INT_COAL);
-+
-+	if (reg_val & HIF_INT_COAL_ENABLE)
-+		ec->rx_coalesce_usecs = (reg_val & HIF_RX_COAL_MAX_CLKS) /
-+						HIF_RX_COAL_CLKS_PER_USEC;
-+	else
-+		ec->rx_coalesce_usecs = 0;
-+
-+	return 0;
-+}
-+
-+/*
-+ * pfe_eth_set_pauseparam - Sets pause parameters
-+ *
-+ */
-+static int pfe_eth_set_pauseparam(struct net_device *ndev,
-+				  struct ethtool_pauseparam *epause)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	if (epause->tx_pause != epause->rx_pause) {
-+		netdev_info(ndev,
-+			    "hardware only support enable/disable both tx and rx\n");
-+		return -EINVAL;
-+	}
-+
-+	priv->pause_flag = 0;
-+	priv->pause_flag |= epause->rx_pause ? PFE_PAUSE_FLAG_ENABLE : 0;
-+	priv->pause_flag |= epause->autoneg ? PFE_PAUSE_FLAG_AUTONEG : 0;
-+
-+	if (epause->rx_pause || epause->autoneg) {
-+		gemac_enable_pause_rx(priv->EMAC_baseaddr);
-+		writel((readl(priv->GPI_baseaddr + GPI_TX_PAUSE_TIME) |
-+					EGPI_PAUSE_ENABLE),
-+				priv->GPI_baseaddr + GPI_TX_PAUSE_TIME);
-+		if (priv->phydev) {
-+			linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
-+					 priv->phydev->supported);
-+			linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
-+					 priv->phydev->supported);
-+			linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
-+					 priv->phydev->advertising);
-+			linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
-+					 priv->phydev->advertising);
-+		}
-+	} else {
-+		gemac_disable_pause_rx(priv->EMAC_baseaddr);
-+		writel((readl(priv->GPI_baseaddr + GPI_TX_PAUSE_TIME) &
-+					~EGPI_PAUSE_ENABLE),
-+				priv->GPI_baseaddr + GPI_TX_PAUSE_TIME);
-+		if (priv->phydev) {
-+			linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
-+					   priv->phydev->supported);
-+			linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
-+					   priv->phydev->supported);
-+			linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
-+					   priv->phydev->advertising);
-+			linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
-+					   priv->phydev->advertising);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+/*
-+ * pfe_eth_get_pauseparam - Gets pause parameters
-+ *
-+ */
-+static void pfe_eth_get_pauseparam(struct net_device *ndev,
-+				   struct ethtool_pauseparam *epause)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	epause->autoneg = (priv->pause_flag & PFE_PAUSE_FLAG_AUTONEG) != 0;
-+	epause->tx_pause = (priv->pause_flag & PFE_PAUSE_FLAG_ENABLE) != 0;
-+	epause->rx_pause = epause->tx_pause;
-+}
-+
-+/*
-+ * pfe_eth_get_hash
-+ */
-+#define PFE_HASH_BITS	6		/* #bits in hash */
-+#define CRC32_POLY	0xEDB88320
-+
-+static int pfe_eth_get_hash(u8 *addr)
-+{
-+	unsigned int i, bit, data, crc, hash;
-+
-+	/* calculate crc32 value of mac address */
-+	crc = 0xffffffff;
-+
-+	for (i = 0; i < 6; i++) {
-+		data = addr[i];
-+		for (bit = 0; bit < 8; bit++, data >>= 1) {
-+			crc = (crc >> 1) ^
-+				(((crc ^ data) & 1) ? CRC32_POLY : 0);
-+		}
-+	}
-+
-+	/*
-+	 * only upper 6 bits (PFE_HASH_BITS) are used
-+	 * which point to specific bit in the hash registers
-+	 */
-+	hash = (crc >> (32 - PFE_HASH_BITS)) & 0x3f;
-+
-+	return hash;
-+}
-+
-+const struct ethtool_ops pfe_ethtool_ops = {
-+	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS,
-+	.get_drvinfo = pfe_eth_get_drvinfo,
-+	.get_regs_len = pfe_eth_gemac_reglen,
-+	.get_regs = pfe_eth_gemac_get_regs,
-+	.get_link = ethtool_op_get_link,
-+	.get_wol  = pfe_eth_get_wol,
-+	.set_wol  = pfe_eth_set_wol,
-+	.set_pauseparam = pfe_eth_set_pauseparam,
-+	.get_pauseparam = pfe_eth_get_pauseparam,
-+	.get_strings = pfe_eth_gstrings,
-+	.get_sset_count = pfe_eth_stats_count,
-+	.get_ethtool_stats = pfe_eth_fill_stats,
-+	.get_msglevel = pfe_eth_get_msglevel,
-+	.set_msglevel = pfe_eth_set_msglevel,
-+	.set_coalesce = pfe_eth_set_coalesce,
-+	.get_coalesce = pfe_eth_get_coalesce,
-+	.get_link_ksettings = pfe_eth_get_settings,
-+	.set_link_ksettings = pfe_eth_set_settings,
-+};
-+
-+/* pfe_eth_mdio_reset
-+ */
-+int pfe_eth_mdio_reset(struct mii_bus *bus)
-+{
-+	struct pfe_mdio_priv_s *priv = (struct pfe_mdio_priv_s *)bus->priv;
-+	u32 phy_speed;
-+
-+
-+	mutex_lock(&bus->mdio_lock);
-+
-+	/*
-+	 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
-+	 *
-+	 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
-+	 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'.
-+	 */
-+	phy_speed = (DIV_ROUND_UP((pfe->ctrl.sys_clk * 1000), 4000000)
-+		     << EMAC_MII_SPEED_SHIFT);
-+	phy_speed |= EMAC_HOLDTIME(0x5);
-+	__raw_writel(phy_speed, priv->mdio_base + EMAC_MII_CTRL_REG);
-+
-+	mutex_unlock(&bus->mdio_lock);
-+
-+	return 0;
-+}
-+
-+/* pfe_eth_mdio_timeout
-+ *
-+ */
-+static int pfe_eth_mdio_timeout(struct pfe_mdio_priv_s *priv, int timeout)
-+{
-+	while (!(__raw_readl(priv->mdio_base + EMAC_IEVENT_REG) &
-+			EMAC_IEVENT_MII)) {
-+		if (timeout-- <= 0)
-+			return -1;
-+		usleep_range(10, 20);
-+	}
-+	__raw_writel(EMAC_IEVENT_MII, priv->mdio_base + EMAC_IEVENT_REG);
-+	return 0;
-+}
-+
-+static int pfe_eth_mdio_mux(u8 muxval)
-+{
-+	struct i2c_adapter *a;
-+	struct i2c_msg msg;
-+	unsigned char buf[2];
-+	int ret;
-+
-+	a = i2c_get_adapter(0);
-+	if (!a)
-+		return -ENODEV;
-+
-+	/* set bit 1 (the second bit) of chip at 0x09, register 0x13 */
-+	buf[0] = 0x54; /* reg number */
-+	buf[1] = (muxval << 6) | 0x3; /* data */
-+	msg.addr = 0x66;
-+	msg.buf = buf;
-+	msg.len = 2;
-+	msg.flags = 0;
-+	ret = i2c_transfer(a, &msg, 1);
-+	i2c_put_adapter(a);
-+	if (ret != 1)
-+		return -ENODEV;
-+	return 0;
-+}
-+
-+static int pfe_eth_mdio_write_addr(struct mii_bus *bus, int mii_id,
-+				   int dev_addr, int regnum)
-+{
-+	struct pfe_mdio_priv_s *priv = (struct pfe_mdio_priv_s *)bus->priv;
-+
-+	__raw_writel(EMAC_MII_DATA_PA(mii_id) |
-+		     EMAC_MII_DATA_RA(dev_addr) |
-+		     EMAC_MII_DATA_TA | EMAC_MII_DATA(regnum),
-+		     priv->mdio_base + EMAC_MII_DATA_REG);
-+
-+	if (pfe_eth_mdio_timeout(priv, EMAC_MDIO_TIMEOUT)) {
-+		dev_err(&bus->dev, "phy MDIO address write timeout\n");
-+		return -1;
-+	}
-+
-+	return 0;
-+}
-+
-+static int pfe_eth_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
-+			      u16 value)
-+{
-+	struct pfe_mdio_priv_s *priv = (struct pfe_mdio_priv_s *)bus->priv;
-+
-+	/*To access external PHYs on QDS board mux needs to be configured*/
-+	if ((mii_id) && (pfe->mdio_muxval[mii_id]))
-+		pfe_eth_mdio_mux(pfe->mdio_muxval[mii_id]);
-+
-+	if (regnum & MII_ADDR_C45) {
-+		pfe_eth_mdio_write_addr(bus, mii_id, (regnum >> 16) & 0x1f,
-+					regnum & 0xffff);
-+		__raw_writel(EMAC_MII_DATA_OP_CL45_WR |
-+			     EMAC_MII_DATA_PA(mii_id) |
-+			     EMAC_MII_DATA_RA((regnum >> 16) & 0x1f) |
-+			     EMAC_MII_DATA_TA | EMAC_MII_DATA(value),
-+			     priv->mdio_base + EMAC_MII_DATA_REG);
-+	} else {
-+		/* start a write op */
-+		__raw_writel(EMAC_MII_DATA_ST | EMAC_MII_DATA_OP_WR |
-+			     EMAC_MII_DATA_PA(mii_id) |
-+			     EMAC_MII_DATA_RA(regnum) |
-+			     EMAC_MII_DATA_TA | EMAC_MII_DATA(value),
-+			     priv->mdio_base + EMAC_MII_DATA_REG);
-+	}
-+
-+	if (pfe_eth_mdio_timeout(priv, EMAC_MDIO_TIMEOUT)) {
-+		dev_err(&bus->dev, "%s: phy MDIO write timeout\n", __func__);
-+		return -1;
-+	}
-+	return 0;
-+}
-+
-+static int pfe_eth_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
-+{
-+	struct pfe_mdio_priv_s *priv = (struct pfe_mdio_priv_s *)bus->priv;
-+	u16 value = 0;
-+
-+	/*To access external PHYs on QDS board mux needs to be configured*/
-+	if ((mii_id) && (pfe->mdio_muxval[mii_id]))
-+		pfe_eth_mdio_mux(pfe->mdio_muxval[mii_id]);
-+
-+	if (regnum & MII_ADDR_C45) {
-+		pfe_eth_mdio_write_addr(bus, mii_id, (regnum >> 16) & 0x1f,
-+					regnum & 0xffff);
-+		__raw_writel(EMAC_MII_DATA_OP_CL45_RD |
-+			     EMAC_MII_DATA_PA(mii_id) |
-+			     EMAC_MII_DATA_RA((regnum >> 16) & 0x1f) |
-+			     EMAC_MII_DATA_TA,
-+			     priv->mdio_base + EMAC_MII_DATA_REG);
-+	} else {
-+		/* start a read op */
-+		__raw_writel(EMAC_MII_DATA_ST | EMAC_MII_DATA_OP_RD |
-+			     EMAC_MII_DATA_PA(mii_id) |
-+			     EMAC_MII_DATA_RA(regnum) |
-+			     EMAC_MII_DATA_TA, priv->mdio_base +
-+			     EMAC_MII_DATA_REG);
-+	}
-+
-+	if (pfe_eth_mdio_timeout(priv, EMAC_MDIO_TIMEOUT)) {
-+		dev_err(&bus->dev, "%s: phy MDIO read timeout\n", __func__);
-+		return -1;
-+	}
-+
-+	value = EMAC_MII_DATA(__raw_readl(priv->mdio_base +
-+						EMAC_MII_DATA_REG));
-+	return value;
-+}
-+
-+static int pfe_eth_mdio_init(struct pfe *pfe,
-+			     struct ls1012a_pfe_platform_data *pfe_info,
-+			     int ii)
-+{
-+	struct pfe_mdio_priv_s *priv = NULL;
-+	struct ls1012a_mdio_platform_data *mdio_info;
-+	struct mii_bus *bus;
-+	struct device_node *mdio_node;
-+	int rc = 0;
-+
-+	mdio_info = (struct ls1012a_mdio_platform_data *)
-+					pfe_info->ls1012a_mdio_pdata;
-+	mdio_info->id = ii;
-+
-+	bus = mdiobus_alloc_size(sizeof(struct pfe_mdio_priv_s));
-+	if (!bus) {
-+		pr_err("mdiobus_alloc() failed\n");
-+		rc = -ENOMEM;
-+		goto err_mdioalloc;
-+	}
-+
-+	bus->name = "ls1012a MDIO Bus";
-+	snprintf(bus->id, MII_BUS_ID_SIZE, "ls1012a-%x", mdio_info->id);
-+
-+	bus->read = &pfe_eth_mdio_read;
-+	bus->write = &pfe_eth_mdio_write;
-+	bus->reset = &pfe_eth_mdio_reset;
-+	bus->parent = pfe->dev;
-+	bus->phy_mask = mdio_info->phy_mask;
-+	bus->irq[0] = mdio_info->irq[0];
-+	priv = bus->priv;
-+	priv->mdio_base = cbus_emac_base[ii];
-+
-+	priv->mdc_div = mdio_info->mdc_div;
-+	if (!priv->mdc_div)
-+		priv->mdc_div = 64;
-+
-+	dev_info(bus->parent, "%s: mdc_div: %d, phy_mask: %x\n",
-+		 __func__, priv->mdc_div, bus->phy_mask);
-+	mdio_node = of_get_child_by_name(pfe->dev->of_node, "mdio");
-+	if ((mdio_info->id == 0) && mdio_node) {
-+		rc = of_mdiobus_register(bus, mdio_node);
-+		of_node_put(mdio_node);
-+	} else {
-+		rc = mdiobus_register(bus);
-+	}
-+
-+	if (rc) {
-+		dev_err(bus->parent, "mdiobus_register(%s) failed\n",
-+			bus->name);
-+		goto err_mdioregister;
-+	}
-+
-+	priv->mii_bus = bus;
-+	pfe->mdio.mdio_priv[ii] = priv;
-+
-+	pfe_eth_mdio_reset(bus);
-+
-+	return 0;
-+
-+err_mdioregister:
-+	mdiobus_free(bus);
-+err_mdioalloc:
-+	return rc;
-+}
-+
-+/* pfe_eth_mdio_exit
-+ */
-+static void pfe_eth_mdio_exit(struct pfe *pfe,
-+			      int ii)
-+{
-+	struct pfe_mdio_priv_s *mdio_priv = pfe->mdio.mdio_priv[ii];
-+	struct mii_bus *bus = mdio_priv->mii_bus;
-+
-+	if (!bus)
-+		return;
-+	mdiobus_unregister(bus);
-+	mdiobus_free(bus);
-+}
-+
-+/* pfe_get_phydev_speed
-+ */
-+static int pfe_get_phydev_speed(struct phy_device *phydev)
-+{
-+	switch (phydev->speed) {
-+	case 10:
-+			return SPEED_10M;
-+	case 100:
-+			return SPEED_100M;
-+	case 1000:
-+	default:
-+			return SPEED_1000M;
-+	}
-+}
-+
-+/* pfe_set_rgmii_speed
-+ */
-+#define RGMIIPCR	0x434
-+/* RGMIIPCR bit definitions*/
-+#define SCFG_RGMIIPCR_EN_AUTO           (0x00000008)
-+#define SCFG_RGMIIPCR_SETSP_1000M       (0x00000004)
-+#define SCFG_RGMIIPCR_SETSP_100M        (0x00000000)
-+#define SCFG_RGMIIPCR_SETSP_10M         (0x00000002)
-+#define SCFG_RGMIIPCR_SETFD             (0x00000001)
-+
-+#define MDIOSELCR	0x484
-+#define MDIOSEL_SERDES	0x0
-+#define MDIOSEL_EXTPHY  0x80000000
-+
-+static void pfe_set_rgmii_speed(struct phy_device *phydev)
-+{
-+	u32 rgmii_pcr;
-+
-+	regmap_read(pfe->scfg, RGMIIPCR, &rgmii_pcr);
-+	rgmii_pcr  &= ~(SCFG_RGMIIPCR_SETSP_1000M | SCFG_RGMIIPCR_SETSP_10M);
-+
-+	switch (phydev->speed) {
-+	case 10:
-+			rgmii_pcr |= SCFG_RGMIIPCR_SETSP_10M;
-+			break;
-+	case 1000:
-+			rgmii_pcr |= SCFG_RGMIIPCR_SETSP_1000M;
-+			break;
-+	case 100:
-+	default:
-+			/* Default is 100M */
-+			break;
-+	}
-+	regmap_write(pfe->scfg, RGMIIPCR, rgmii_pcr);
-+}
-+
-+/* pfe_get_phydev_duplex
-+ */
-+static int pfe_get_phydev_duplex(struct phy_device *phydev)
-+{
-+	/*return (phydev->duplex == DUPLEX_HALF) ? DUP_HALF:DUP_FULL ; */
-+	return DUPLEX_FULL;
-+}
-+
-+/* pfe_eth_adjust_link
-+ */
-+static void pfe_eth_adjust_link(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	unsigned long flags;
-+	struct phy_device *phydev = priv->phydev;
-+	int new_state = 0;
-+
-+	netif_info(priv, drv, ndev, "%s\n", __func__);
-+
-+	spin_lock_irqsave(&priv->lock, flags);
-+
-+	if (phydev->link) {
-+		/*
-+		 * Now we make sure that we can be in full duplex mode.
-+		 * If not, we operate in half-duplex mode.
-+		 */
-+		if (phydev->duplex != priv->oldduplex) {
-+			new_state = 1;
-+			gemac_set_duplex(priv->EMAC_baseaddr,
-+					 pfe_get_phydev_duplex(phydev));
-+			priv->oldduplex = phydev->duplex;
-+		}
-+
-+		if (phydev->speed != priv->oldspeed) {
-+			new_state = 1;
-+			gemac_set_speed(priv->EMAC_baseaddr,
-+					pfe_get_phydev_speed(phydev));
-+			if (priv->einfo->mii_config ==
-+					PHY_INTERFACE_MODE_RGMII_ID)
-+				pfe_set_rgmii_speed(phydev);
-+			priv->oldspeed = phydev->speed;
-+		}
-+
-+		if (!priv->oldlink) {
-+			new_state = 1;
-+			priv->oldlink = 1;
-+		}
-+
-+	} else if (priv->oldlink) {
-+		new_state = 1;
-+		priv->oldlink = 0;
-+		priv->oldspeed = 0;
-+		priv->oldduplex = -1;
-+	}
-+
-+	if (new_state && netif_msg_link(priv))
-+		phy_print_status(phydev);
-+
-+	spin_unlock_irqrestore(&priv->lock, flags);
-+
-+	/* Now, dump the details to the cdev.
-+	 * XXX: Locking would be required? (uniprocess arch)
-+	 *      Or, maybe move it in spinlock above
-+	 */
-+	if (us && priv->einfo->gem_id < PFE_CDEV_ETH_COUNT) {
-+		pr_debug("Changing link state from (%u) to (%u) for ID=(%u)\n",
-+			 link_states[priv->einfo->gem_id].state,
-+			 phydev->link,
-+			 priv->einfo->gem_id);
-+		link_states[priv->einfo->gem_id].phy_id = priv->einfo->gem_id;
-+		link_states[priv->einfo->gem_id].state = phydev->link;
-+	}
-+}
-+
-+/* pfe_phy_exit
-+ */
-+static void pfe_phy_exit(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	netif_info(priv, drv, ndev, "%s\n", __func__);
-+
-+	phy_disconnect(priv->phydev);
-+	priv->phydev = NULL;
-+}
-+
-+/* pfe_eth_stop
-+ */
-+static void pfe_eth_stop(struct net_device *ndev, int wake)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	netif_info(priv, drv, ndev, "%s\n", __func__);
-+
-+	if (wake) {
-+		gemac_tx_disable(priv->EMAC_baseaddr);
-+	} else {
-+		gemac_disable(priv->EMAC_baseaddr);
-+		gpi_disable(priv->GPI_baseaddr);
-+
-+		if (priv->phydev)
-+			phy_stop(priv->phydev);
-+	}
-+}
-+
-+/* pfe_eth_start
-+ */
-+static int pfe_eth_start(struct pfe_eth_priv_s *priv)
-+{
-+	netif_info(priv, drv, priv->ndev, "%s\n", __func__);
-+
-+	if (priv->phydev)
-+		phy_start(priv->phydev);
-+
-+	gpi_enable(priv->GPI_baseaddr);
-+	gemac_enable(priv->EMAC_baseaddr);
-+
-+	return 0;
-+}
-+
-+/*
-+ * Configure on chip serdes through mdio
-+ */
-+static void ls1012a_configure_serdes(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *eth_priv = netdev_priv(ndev);
-+	struct pfe_mdio_priv_s *mdio_priv = pfe->mdio.mdio_priv[eth_priv->id];
-+	int sgmii_2500 = 0;
-+	struct mii_bus *bus = mdio_priv->mii_bus;
-+	u16 value = 0;
-+
-+	if (eth_priv->einfo->mii_config == PHY_INTERFACE_MODE_2500SGMII)
-+		sgmii_2500 = 1;
-+
-+	netif_info(eth_priv, drv, ndev, "%s\n", __func__);
-+	/* PCS configuration done with corresponding GEMAC */
-+
-+	pfe_eth_mdio_read(bus, 0, MDIO_SGMII_CR);
-+	pfe_eth_mdio_read(bus, 0, MDIO_SGMII_SR);
-+
-+	pfe_eth_mdio_write(bus, 0, MDIO_SGMII_CR, SGMII_CR_RST);
-+
-+	if (sgmii_2500) {
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_IF_MODE, SGMII_SPEED_1GBPS
-+							       | SGMII_EN);
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_DEV_ABIL_SGMII,
-+				   SGMII_DEV_ABIL_ACK | SGMII_DEV_ABIL_SGMII);
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_LINK_TMR_L, 0xa120);
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_LINK_TMR_H, 0x7);
-+		/* Autonegotiation need to be disabled for 2.5G SGMII mode*/
-+		value = SGMII_CR_FD | SGMII_CR_SPEED_SEL1_1G;
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_CR, value);
-+	} else {
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_IF_MODE,
-+				   SGMII_SPEED_1GBPS
-+				   | SGMII_USE_SGMII_AN
-+				   | SGMII_EN);
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_DEV_ABIL_SGMII,
-+				   SGMII_DEV_ABIL_EEE_CLK_STP_EN
-+				   | 0xa0
-+				   | SGMII_DEV_ABIL_SGMII);
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_LINK_TMR_L, 0x400);
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_LINK_TMR_H, 0x0);
-+		value = SGMII_CR_AN_EN | SGMII_CR_FD | SGMII_CR_SPEED_SEL1_1G;
-+		pfe_eth_mdio_write(bus, 0, MDIO_SGMII_CR, value);
-+	}
-+}
-+
-+/*
-+ * pfe_phy_init
-+ *
-+ */
-+static int pfe_phy_init(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	struct phy_device *phydev;
-+	char phy_id[MII_BUS_ID_SIZE + 3];
-+	char bus_id[MII_BUS_ID_SIZE];
-+	phy_interface_t interface;
-+
-+	priv->oldlink = 0;
-+	priv->oldspeed = 0;
-+	priv->oldduplex = -1;
-+
-+	snprintf(bus_id, MII_BUS_ID_SIZE, "ls1012a-%d", 0);
-+	snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
-+		 priv->einfo->phy_id);
-+	netif_info(priv, drv, ndev, "%s: %s\n", __func__, phy_id);
-+	interface = priv->einfo->mii_config;
-+	if ((interface == PHY_INTERFACE_MODE_SGMII) ||
-+	    (interface == PHY_INTERFACE_MODE_2500SGMII)) {
-+		/*Configure SGMII PCS */
-+		if (pfe->scfg) {
-+			/* Config MDIO from serdes */
-+			regmap_write(pfe->scfg, MDIOSELCR, MDIOSEL_SERDES);
-+		}
-+		ls1012a_configure_serdes(ndev);
-+	}
-+
-+	if (pfe->scfg) {
-+		/*Config MDIO from PAD */
-+		regmap_write(pfe->scfg, MDIOSELCR, MDIOSEL_EXTPHY);
-+	}
-+
-+	priv->oldlink = 0;
-+	priv->oldspeed = 0;
-+	priv->oldduplex = -1;
-+	pr_info("%s interface %x\n", __func__, interface);
-+
-+	if (priv->phy_node) {
-+		phydev = of_phy_connect(ndev, priv->phy_node,
-+					pfe_eth_adjust_link, 0,
-+					priv->einfo->mii_config);
-+		if (!(phydev)) {
-+			netdev_err(ndev, "Unable to connect to phy\n");
-+			return -ENODEV;
-+		}
-+
-+	} else {
-+		phydev = phy_connect(ndev, phy_id,
-+				     &pfe_eth_adjust_link, interface);
-+		if (IS_ERR(phydev)) {
-+			netdev_err(ndev, "Unable to connect to phy\n");
-+			return PTR_ERR(phydev);
-+		}
-+	}
-+
-+	priv->phydev = phydev;
-+	phydev->irq = PHY_POLL;
-+
-+	return 0;
-+}
-+
-+/* pfe_gemac_init
-+ */
-+static int pfe_gemac_init(struct pfe_eth_priv_s *priv)
-+{
-+	struct gemac_cfg cfg;
-+
-+	netif_info(priv, ifup, priv->ndev, "%s\n", __func__);
-+
-+	cfg.mode = 0;
-+	cfg.speed = SPEED_1000M;
-+	cfg.duplex = DUPLEX_FULL;
-+
-+	gemac_set_config(priv->EMAC_baseaddr, &cfg);
-+	gemac_allow_broadcast(priv->EMAC_baseaddr);
-+	gemac_enable_1536_rx(priv->EMAC_baseaddr);
-+	gemac_enable_stacked_vlan(priv->EMAC_baseaddr);
-+	gemac_enable_pause_rx(priv->EMAC_baseaddr);
-+	gemac_set_bus_width(priv->EMAC_baseaddr, 64);
-+
-+	/*GEM will perform checksum verifications*/
-+	if (priv->ndev->features & NETIF_F_RXCSUM)
-+		gemac_enable_rx_checksum_offload(priv->EMAC_baseaddr);
-+	else
-+		gemac_disable_rx_checksum_offload(priv->EMAC_baseaddr);
-+
-+	return 0;
-+}
-+
-+/* pfe_eth_event_handler
-+ */
-+static int pfe_eth_event_handler(void *data, int event, int qno)
-+{
-+	struct pfe_eth_priv_s *priv = data;
-+
-+	switch (event) {
-+	case EVENT_RX_PKT_IND:
-+
-+		if (qno == 0) {
-+			if (napi_schedule_prep(&priv->high_napi)) {
-+				netif_info(priv, intr, priv->ndev,
-+					   "%s: schedule high prio poll\n"
-+					   , __func__);
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+				priv->napi_counters[NAPI_SCHED_COUNT]++;
-+#endif
-+
-+				__napi_schedule(&priv->high_napi);
-+			}
-+		} else if (qno == 1) {
-+			if (napi_schedule_prep(&priv->low_napi)) {
-+				netif_info(priv, intr, priv->ndev,
-+					   "%s: schedule low prio poll\n"
-+					   , __func__);
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+				priv->napi_counters[NAPI_SCHED_COUNT]++;
-+#endif
-+				__napi_schedule(&priv->low_napi);
-+			}
-+		} else if (qno == 2) {
-+			if (napi_schedule_prep(&priv->lro_napi)) {
-+				netif_info(priv, intr, priv->ndev,
-+					   "%s: schedule lro prio poll\n"
-+					   , __func__);
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+				priv->napi_counters[NAPI_SCHED_COUNT]++;
-+#endif
-+				__napi_schedule(&priv->lro_napi);
-+			}
-+		}
-+
-+		break;
-+
-+	case EVENT_TXDONE_IND:
-+		pfe_eth_flush_tx(priv);
-+		hif_lib_event_handler_start(&priv->client, EVENT_TXDONE_IND, 0);
-+		break;
-+	case EVENT_HIGH_RX_WM:
-+	default:
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+static int pfe_eth_change_mtu(struct net_device *ndev, int new_mtu)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	ndev->mtu = new_mtu;
-+	new_mtu += ETH_HLEN + ETH_FCS_LEN;
-+	gemac_set_rx_max_fl(priv->EMAC_baseaddr, new_mtu);
-+
-+	return 0;
-+}
-+
-+/* pfe_eth_open
-+ */
-+static int pfe_eth_open(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	struct hif_client_s *client;
-+	int rc;
-+
-+	netif_info(priv, ifup, ndev, "%s\n", __func__);
-+
-+	/* Register client driver with HIF */
-+	client = &priv->client;
-+	memset(client, 0, sizeof(*client));
-+	client->id = PFE_CL_GEM0 + priv->id;
-+	client->tx_qn = emac_txq_cnt;
-+	client->rx_qn = EMAC_RXQ_CNT;
-+	client->priv = priv;
-+	client->pfe = priv->pfe;
-+	client->event_handler = pfe_eth_event_handler;
-+
-+	client->tx_qsize = EMAC_TXQ_DEPTH;
-+	client->rx_qsize = EMAC_RXQ_DEPTH;
-+
-+	rc = hif_lib_client_register(client);
-+	if (rc) {
-+		netdev_err(ndev, "%s: hif_lib_client_register(%d) failed\n",
-+			   __func__, client->id);
-+		goto err0;
-+	}
-+
-+	netif_info(priv, drv, ndev, "%s: registered client: %p\n", __func__,
-+		   client);
-+
-+	pfe_gemac_init(priv);
-+
-+	if (!is_valid_ether_addr(ndev->dev_addr)) {
-+		netdev_err(ndev, "%s: invalid MAC address\n", __func__);
-+		rc = -EADDRNOTAVAIL;
-+		goto err1;
-+	}
-+
-+	gemac_set_laddrN(priv->EMAC_baseaddr,
-+			 (struct pfe_mac_addr *)ndev->dev_addr, 1);
-+
-+	napi_enable(&priv->high_napi);
-+	napi_enable(&priv->low_napi);
-+	napi_enable(&priv->lro_napi);
-+
-+	rc = pfe_eth_start(priv);
-+
-+	netif_tx_wake_all_queues(ndev);
-+
-+	return rc;
-+
-+err1:
-+	hif_lib_client_unregister(&priv->client);
-+
-+err0:
-+	return rc;
-+}
-+
-+/*
-+ *  pfe_eth_shutdown
-+ */
-+int pfe_eth_shutdown(struct net_device *ndev, int wake)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	int i, qstatus, id;
-+	unsigned long next_poll = jiffies + 1, end = jiffies +
-+				(TX_POLL_TIMEOUT_MS * HZ) / 1000;
-+	int tx_pkts, prv_tx_pkts;
-+
-+	netif_info(priv, ifdown, ndev, "%s\n", __func__);
-+
-+	for (i = 0; i < emac_txq_cnt; i++)
-+		hrtimer_cancel(&priv->fast_tx_timeout[i].timer);
-+
-+	netif_tx_stop_all_queues(ndev);
-+
-+	do {
-+		tx_pkts = 0;
-+		pfe_eth_flush_tx(priv);
-+
-+		for (i = 0; i < emac_txq_cnt; i++)
-+			tx_pkts += hif_lib_tx_pending(&priv->client, i);
-+
-+		if (tx_pkts) {
-+			/*Don't wait forever, break if we cross max timeout */
-+			if (time_after(jiffies, end)) {
-+				pr_err(
-+					"(%s)Tx is not complete after %dmsec\n",
-+					ndev->name, TX_POLL_TIMEOUT_MS);
-+				break;
-+			}
-+
-+			pr_info("%s : (%s) Waiting for tx packets to free. Pending tx pkts = %d.\n"
-+				, __func__, ndev->name, tx_pkts);
-+			if (need_resched())
-+				schedule();
-+		}
-+
-+	} while (tx_pkts);
-+
-+	end = jiffies + (TX_POLL_TIMEOUT_MS * HZ) / 1000;
-+
-+	prv_tx_pkts = tmu_pkts_processed(priv->id);
-+	/*
-+	 * Wait till TMU transmits all pending packets
-+	 * poll tmu_qstatus and pkts processed by TMU for every 10ms
-+	 * Consider TMU is busy, If we see TMU qeueu pending or any packets
-+	 * processed by TMU
-+	 */
-+	while (1) {
-+		if (time_after(jiffies, next_poll)) {
-+			tx_pkts = tmu_pkts_processed(priv->id);
-+			qstatus = tmu_qstatus(priv->id) & 0x7ffff;
-+
-+			if (!qstatus && (tx_pkts == prv_tx_pkts))
-+				break;
-+			/* Don't wait forever, break if we cross max
-+			 * timeout(TX_POLL_TIMEOUT_MS)
-+			 */
-+			if (time_after(jiffies, end)) {
-+				pr_err("TMU%d is busy after %dmsec\n",
-+				       priv->id, TX_POLL_TIMEOUT_MS);
-+				break;
-+			}
-+			prv_tx_pkts = tx_pkts;
-+			next_poll++;
-+		}
-+		if (need_resched())
-+			schedule();
-+	}
-+	/* Wait for some more time to complete transmitting packet if any */
-+	next_poll = jiffies + 1;
-+	while (1) {
-+		if (time_after(jiffies, next_poll))
-+			break;
-+		if (need_resched())
-+			schedule();
-+	}
-+
-+	pfe_eth_stop(ndev, wake);
-+
-+	napi_disable(&priv->lro_napi);
-+	napi_disable(&priv->low_napi);
-+	napi_disable(&priv->high_napi);
-+
-+	for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++) {
-+		pe_dmem_write(id, 0, CLASS_DM_CRC_VALIDATED
-+			      + (priv->id * 4), 4);
-+	}
-+
-+	hif_lib_client_unregister(&priv->client);
-+
-+	return 0;
-+}
-+
-+/* pfe_eth_close
-+ *
-+ */
-+static int pfe_eth_close(struct net_device *ndev)
-+{
-+	pfe_eth_shutdown(ndev, 0);
-+
-+	return 0;
-+}
-+
-+/* pfe_eth_suspend
-+ *
-+ * return value : 1 if netdevice is configured to wakeup system
-+ *                0 otherwise
-+ */
-+int pfe_eth_suspend(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	int retval = 0;
-+
-+	if (priv->wol) {
-+		gemac_set_wol(priv->EMAC_baseaddr, priv->wol);
-+		retval = 1;
-+	}
-+	pfe_eth_shutdown(ndev, priv->wol);
-+
-+	return retval;
-+}
-+
-+/* pfe_eth_resume
-+ *
-+ */
-+int pfe_eth_resume(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	if (priv->wol)
-+		gemac_set_wol(priv->EMAC_baseaddr, 0);
-+	gemac_tx_enable(priv->EMAC_baseaddr);
-+
-+	return pfe_eth_open(ndev);
-+}
-+
-+/* pfe_eth_get_queuenum
-+ */
-+static int pfe_eth_get_queuenum(struct pfe_eth_priv_s *priv, struct sk_buff
-+					*skb)
-+{
-+	int queuenum = 0;
-+	unsigned long flags;
-+
-+	/* Get the Fast Path queue number */
-+	/*
-+	 * Use conntrack mark (if conntrack exists), then packet mark (if any),
-+	 * then fallback to default
-+	 */
-+#if defined(CONFIG_IP_NF_CONNTRACK_MARK) || defined(CONFIG_NF_CONNTRACK_MARK)
-+	if (skb->_nfct) {
-+		enum ip_conntrack_info cinfo;
-+		struct nf_conn *ct;
-+
-+		ct = nf_ct_get(skb, &cinfo);
-+
-+		if (ct) {
-+			u32 connmark;
-+
-+			connmark = ct->mark;
-+
-+			if ((connmark & 0x80000000) && priv->id != 0)
-+				connmark >>= 16;
-+
-+			queuenum = connmark & EMAC_QUEUENUM_MASK;
-+		}
-+	} else  {/* continued after #endif ... */
-+#endif
-+		if (skb->mark) {
-+			queuenum = skb->mark & EMAC_QUEUENUM_MASK;
-+		} else {
-+			spin_lock_irqsave(&priv->lock, flags);
-+			queuenum = priv->default_priority & EMAC_QUEUENUM_MASK;
-+			spin_unlock_irqrestore(&priv->lock, flags);
-+		}
-+#if defined(CONFIG_IP_NF_CONNTRACK_MARK) || defined(CONFIG_NF_CONNTRACK_MARK)
-+	}
-+#endif
-+	return queuenum;
-+}
-+
-+/* pfe_eth_might_stop_tx
-+ *
-+ */
-+static int pfe_eth_might_stop_tx(struct pfe_eth_priv_s *priv, int queuenum,
-+				 struct netdev_queue *tx_queue,
-+				 unsigned int n_desc,
-+				 unsigned int n_segs)
-+{
-+	ktime_t kt;
-+	int tried = 0;
-+
-+try_again:
-+	if (unlikely((__hif_tx_avail(&pfe->hif) < n_desc) ||
-+	(hif_lib_tx_avail(&priv->client, queuenum) < n_desc) ||
-+	(hif_lib_tx_credit_avail(pfe, priv->id, queuenum) < n_segs))) {
-+		if (!tried) {
-+			__hif_lib_update_credit(&priv->client, queuenum);
-+			tried = 1;
-+			goto try_again;
-+		}
-+#ifdef PFE_ETH_TX_STATS
-+		if (__hif_tx_avail(&pfe->hif) < n_desc) {
-+			priv->stop_queue_hif[queuenum]++;
-+		} else if (hif_lib_tx_avail(&priv->client, queuenum) < n_desc) {
-+			priv->stop_queue_hif_client[queuenum]++;
-+		} else if (hif_lib_tx_credit_avail(pfe, priv->id, queuenum) <
-+			n_segs) {
-+			priv->stop_queue_credit[queuenum]++;
-+		}
-+		priv->stop_queue_total[queuenum]++;
-+#endif
-+		netif_tx_stop_queue(tx_queue);
-+
-+		kt = ktime_set(0, LS1012A_TX_FAST_RECOVERY_TIMEOUT_MS *
-+				NSEC_PER_MSEC);
-+		hrtimer_start(&priv->fast_tx_timeout[queuenum].timer, kt,
-+			      HRTIMER_MODE_REL);
-+		return -1;
-+	} else {
-+		return 0;
-+	}
-+}
-+
-+#define SA_MAX_OP 2
-+/* pfe_hif_send_packet
-+ *
-+ * At this level if TX fails we drop the packet
-+ */
-+static void pfe_hif_send_packet(struct sk_buff *skb, struct  pfe_eth_priv_s
-+					*priv, int queuenum)
-+{
-+	struct skb_shared_info *sh = skb_shinfo(skb);
-+	unsigned int nr_frags;
-+	u32 ctrl = 0;
-+
-+	netif_info(priv, tx_queued, priv->ndev, "%s\n", __func__);
-+
-+	if (skb_is_gso(skb)) {
-+		priv->stats.tx_dropped++;
-+		return;
-+	}
-+
-+	if (skb->ip_summed == CHECKSUM_PARTIAL)
-+		ctrl = HIF_CTRL_TX_CHECKSUM;
-+
-+	nr_frags = sh->nr_frags;
-+
-+	if (nr_frags) {
-+		skb_frag_t *f;
-+		int i;
-+
-+		__hif_lib_xmit_pkt(&priv->client, queuenum, skb->data,
-+				   skb_headlen(skb), ctrl, HIF_FIRST_BUFFER,
-+				   skb);
-+
-+		for (i = 0; i < nr_frags - 1; i++) {
-+			f = &sh->frags[i];
-+			__hif_lib_xmit_pkt(&priv->client, queuenum,
-+					   skb_frag_address(f),
-+					   skb_frag_size(f),
-+					   0x0, 0x0, skb);
-+		}
-+
-+		f = &sh->frags[i];
-+
-+		__hif_lib_xmit_pkt(&priv->client, queuenum,
-+				   skb_frag_address(f), skb_frag_size(f),
-+				   0x0, HIF_LAST_BUFFER | HIF_DATA_VALID,
-+				   skb);
-+
-+		netif_info(priv, tx_queued, priv->ndev,
-+			   "%s: pkt sent successfully skb:%p nr_frags:%d len:%d\n",
-+			   __func__, skb, nr_frags, skb->len);
-+	} else {
-+		__hif_lib_xmit_pkt(&priv->client, queuenum, skb->data,
-+				   skb->len, ctrl, HIF_FIRST_BUFFER |
-+				   HIF_LAST_BUFFER | HIF_DATA_VALID,
-+				   skb);
-+		netif_info(priv, tx_queued, priv->ndev,
-+			   "%s: pkt sent successfully skb:%p len:%d\n",
-+			   __func__, skb, skb->len);
-+	}
-+	hif_tx_dma_start();
-+	priv->stats.tx_packets++;
-+	priv->stats.tx_bytes += skb->len;
-+	hif_lib_tx_credit_use(pfe, priv->id, queuenum, 1);
-+}
-+
-+/* pfe_eth_flush_txQ
-+ */
-+static void pfe_eth_flush_txQ(struct pfe_eth_priv_s *priv, int tx_q_num, int
-+				from_tx, int n_desc)
-+{
-+	struct sk_buff *skb;
-+	struct netdev_queue *tx_queue = netdev_get_tx_queue(priv->ndev,
-+								tx_q_num);
-+	unsigned int flags;
-+
-+	netif_info(priv, tx_done, priv->ndev, "%s\n", __func__);
-+
-+	if (!from_tx)
-+		__netif_tx_lock_bh(tx_queue);
-+
-+	/* Clean HIF and client queue */
-+	while ((skb = hif_lib_tx_get_next_complete(&priv->client,
-+						   tx_q_num, &flags,
-+						   HIF_TX_DESC_NT))) {
-+		if (flags & HIF_DATA_VALID)
-+			dev_kfree_skb_any(skb);
-+	}
-+	if (!from_tx)
-+		__netif_tx_unlock_bh(tx_queue);
-+}
-+
-+/* pfe_eth_flush_tx
-+ */
-+static void pfe_eth_flush_tx(struct pfe_eth_priv_s *priv)
-+{
-+	int ii;
-+
-+	netif_info(priv, tx_done, priv->ndev, "%s\n", __func__);
-+
-+	for (ii = 0; ii < emac_txq_cnt; ii++) {
-+		pfe_eth_flush_txQ(priv, ii, 0, 0);
-+		__hif_lib_update_credit(&priv->client, ii);
-+	}
-+}
-+
-+void pfe_tx_get_req_desc(struct sk_buff *skb, unsigned int *n_desc, unsigned int
-+				*n_segs)
-+{
-+	struct skb_shared_info *sh = skb_shinfo(skb);
-+
-+	/* Scattered data */
-+	if (sh->nr_frags) {
-+		*n_desc = sh->nr_frags + 1;
-+		*n_segs = 1;
-+	/* Regular case */
-+	} else {
-+		*n_desc = 1;
-+		*n_segs = 1;
-+	}
-+}
-+
-+/* pfe_eth_send_packet
-+ */
-+static int pfe_eth_send_packet(struct sk_buff *skb, struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	int tx_q_num = skb_get_queue_mapping(skb);
-+	int n_desc, n_segs;
-+	struct netdev_queue *tx_queue = netdev_get_tx_queue(priv->ndev,
-+								tx_q_num);
-+
-+	netif_info(priv, tx_queued, ndev, "%s\n", __func__);
-+
-+	if ((!skb_is_gso(skb)) && (skb_headroom(skb) < (PFE_PKT_HEADER_SZ +
-+			sizeof(unsigned long)))) {
-+		netif_warn(priv, tx_err, priv->ndev, "%s: copying skb\n",
-+			   __func__);
-+
-+		if (pskb_expand_head(skb, (PFE_PKT_HEADER_SZ + sizeof(unsigned
-+					long)), 0, GFP_ATOMIC)) {
-+			/* No need to re-transmit, no way to recover*/
-+			kfree_skb(skb);
-+			priv->stats.tx_dropped++;
-+			return NETDEV_TX_OK;
-+		}
-+	}
-+
-+	pfe_tx_get_req_desc(skb, &n_desc, &n_segs);
-+
-+	hif_tx_lock(&pfe->hif);
-+	if (unlikely(pfe_eth_might_stop_tx(priv, tx_q_num, tx_queue, n_desc,
-+					   n_segs))) {
-+#ifdef PFE_ETH_TX_STATS
-+		if (priv->was_stopped[tx_q_num]) {
-+			priv->clean_fail[tx_q_num]++;
-+			priv->was_stopped[tx_q_num] = 0;
-+		}
-+#endif
-+		hif_tx_unlock(&pfe->hif);
-+		return NETDEV_TX_BUSY;
-+	}
-+
-+	pfe_hif_send_packet(skb, priv, tx_q_num);
-+
-+	hif_tx_unlock(&pfe->hif);
-+
-+	tx_queue->trans_start = jiffies;
-+
-+#ifdef PFE_ETH_TX_STATS
-+	priv->was_stopped[tx_q_num] = 0;
-+#endif
-+
-+	return NETDEV_TX_OK;
-+}
-+
-+/* pfe_eth_select_queue
-+ *
-+ */
-+static u16 pfe_eth_select_queue(struct net_device *ndev, struct sk_buff *skb,
-+				struct net_device *sb_dev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	return pfe_eth_get_queuenum(priv, skb);
-+}
-+
-+/* pfe_eth_get_stats
-+ */
-+static struct net_device_stats *pfe_eth_get_stats(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+
-+	netif_info(priv, drv, ndev, "%s\n", __func__);
-+
-+	return &priv->stats;
-+}
-+
-+/* pfe_eth_set_mac_address
-+ */
-+static int pfe_eth_set_mac_address(struct net_device *ndev, void *addr)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	struct sockaddr *sa = addr;
-+
-+	netif_info(priv, drv, ndev, "%s\n", __func__);
-+
-+	if (!is_valid_ether_addr(sa->sa_data))
-+		return -EADDRNOTAVAIL;
-+
-+	dev_addr_set(ndev, sa->sa_data);
-+
-+	gemac_set_laddrN(priv->EMAC_baseaddr,
-+			 (struct pfe_mac_addr *)ndev->dev_addr, 1);
-+
-+	return 0;
-+}
-+
-+/* pfe_eth_enet_addr_byte_mac
-+ */
-+int pfe_eth_enet_addr_byte_mac(u8 *enet_byte_addr,
-+			       struct pfe_mac_addr *enet_addr)
-+{
-+	if (!enet_byte_addr || !enet_addr) {
-+		return -1;
-+
-+	} else {
-+		enet_addr->bottom = enet_byte_addr[0] |
-+			(enet_byte_addr[1] << 8) |
-+			(enet_byte_addr[2] << 16) |
-+			(enet_byte_addr[3] << 24);
-+		enet_addr->top = enet_byte_addr[4] |
-+			(enet_byte_addr[5] << 8);
-+		return 0;
-+	}
-+}
-+
-+/* pfe_eth_set_multi
-+ */
-+static void pfe_eth_set_multi(struct net_device *ndev)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	struct pfe_mac_addr    hash_addr; /* hash register structure */
-+	/* specific mac address	register structure */
-+	struct pfe_mac_addr    spec_addr;
-+	int		result; /* index into hash register to set.. */
-+	int		uc_count = 0;
-+	struct netdev_hw_addr *ha;
-+
-+	if (ndev->flags & IFF_PROMISC) {
-+		netif_info(priv, drv, ndev, "entering promiscuous mode\n");
-+
-+		priv->promisc = 1;
-+		gemac_enable_copy_all(priv->EMAC_baseaddr);
-+	} else {
-+		priv->promisc = 0;
-+		gemac_disable_copy_all(priv->EMAC_baseaddr);
-+	}
-+
-+	/* Enable broadcast frame reception if required. */
-+	if (ndev->flags & IFF_BROADCAST) {
-+		gemac_allow_broadcast(priv->EMAC_baseaddr);
-+	} else {
-+		netif_info(priv, drv, ndev,
-+			   "disabling broadcast frame reception\n");
-+
-+		gemac_no_broadcast(priv->EMAC_baseaddr);
-+	}
-+
-+	if (ndev->flags & IFF_ALLMULTI) {
-+		/* Set the hash to rx all multicast frames */
-+		hash_addr.bottom = 0xFFFFFFFF;
-+		hash_addr.top = 0xFFFFFFFF;
-+		gemac_set_hash(priv->EMAC_baseaddr, &hash_addr);
-+		netdev_for_each_uc_addr(ha, ndev) {
-+			if (uc_count >= MAX_UC_SPEC_ADDR_REG)
-+				break;
-+			pfe_eth_enet_addr_byte_mac(ha->addr, &spec_addr);
-+			gemac_set_laddrN(priv->EMAC_baseaddr, &spec_addr,
-+					 uc_count + 2);
-+			uc_count++;
-+		}
-+	} else if ((netdev_mc_count(ndev) > 0)  || (netdev_uc_count(ndev))) {
-+		u8 *addr;
-+
-+		hash_addr.bottom = 0;
-+		hash_addr.top = 0;
-+
-+		netdev_for_each_mc_addr(ha, ndev) {
-+			addr = ha->addr;
-+
-+			netif_info(priv, drv, ndev,
-+				   "adding multicast address %X:%X:%X:%X:%X:%X to gem filter\n",
-+				addr[0], addr[1], addr[2],
-+				addr[3], addr[4], addr[5]);
-+
-+			result = pfe_eth_get_hash(addr);
-+
-+			if (result < EMAC_HASH_REG_BITS) {
-+				if (result < 32)
-+					hash_addr.bottom |= (1 << result);
-+				else
-+					hash_addr.top |= (1 << (result - 32));
-+			} else {
-+				break;
-+			}
-+		}
-+
-+		uc_count = -1;
-+		netdev_for_each_uc_addr(ha, ndev) {
-+			addr = ha->addr;
-+
-+			if (++uc_count < MAX_UC_SPEC_ADDR_REG)   {
-+				netdev_info(ndev,
-+					    "adding unicast address %02x:%02x:%02x:%02x:%02x:%02x to gem filter\n",
-+					    addr[0], addr[1], addr[2],
-+					    addr[3], addr[4], addr[5]);
-+				pfe_eth_enet_addr_byte_mac(addr, &spec_addr);
-+				gemac_set_laddrN(priv->EMAC_baseaddr,
-+						 &spec_addr, uc_count + 2);
-+			} else {
-+				netif_info(priv, drv, ndev,
-+					   "adding unicast address %02x:%02x:%02x:%02x:%02x:%02x to gem hash\n",
-+					   addr[0], addr[1], addr[2],
-+					   addr[3], addr[4], addr[5]);
-+
-+				result = pfe_eth_get_hash(addr);
-+				if (result >= EMAC_HASH_REG_BITS) {
-+					break;
-+
-+				} else {
-+					if (result < 32)
-+						hash_addr.bottom |= (1 <<
-+								result);
-+					else
-+						hash_addr.top |= (1 <<
-+								(result - 32));
-+				}
-+			}
-+		}
-+
-+		gemac_set_hash(priv->EMAC_baseaddr, &hash_addr);
-+	}
-+
-+	if (!(netdev_uc_count(ndev) >= MAX_UC_SPEC_ADDR_REG)) {
-+		/*
-+		 *  Check if there are any specific address HW registers that
-+		 * need to be flushed
-+		 */
-+		for (uc_count = netdev_uc_count(ndev); uc_count <
-+			MAX_UC_SPEC_ADDR_REG; uc_count++)
-+			gemac_clear_laddrN(priv->EMAC_baseaddr, uc_count + 2);
-+	}
-+
-+	if (ndev->flags & IFF_LOOPBACK)
-+		gemac_set_loop(priv->EMAC_baseaddr, LB_LOCAL);
-+}
-+
-+/* pfe_eth_set_features
-+ */
-+static int pfe_eth_set_features(struct net_device *ndev, netdev_features_t
-+					features)
-+{
-+	struct pfe_eth_priv_s *priv = netdev_priv(ndev);
-+	int rc = 0;
-+
-+	if (features & NETIF_F_RXCSUM)
-+		gemac_enable_rx_checksum_offload(priv->EMAC_baseaddr);
-+	else
-+		gemac_disable_rx_checksum_offload(priv->EMAC_baseaddr);
-+	return rc;
-+}
-+
-+/* pfe_eth_fast_tx_timeout
-+ */
-+static enum hrtimer_restart pfe_eth_fast_tx_timeout(struct hrtimer *timer)
-+{
-+	struct pfe_eth_fast_timer *fast_tx_timeout = container_of(timer, struct
-+							pfe_eth_fast_timer,
-+							timer);
-+	struct pfe_eth_priv_s *priv =  container_of(fast_tx_timeout->base,
-+							struct pfe_eth_priv_s,
-+							fast_tx_timeout);
-+	struct netdev_queue *tx_queue = netdev_get_tx_queue(priv->ndev,
-+						fast_tx_timeout->queuenum);
-+
-+	if (netif_tx_queue_stopped(tx_queue)) {
-+#ifdef PFE_ETH_TX_STATS
-+		priv->was_stopped[fast_tx_timeout->queuenum] = 1;
-+#endif
-+		netif_tx_wake_queue(tx_queue);
-+	}
-+
-+	return HRTIMER_NORESTART;
-+}
-+
-+/* pfe_eth_fast_tx_timeout_init
-+ */
-+static void pfe_eth_fast_tx_timeout_init(struct pfe_eth_priv_s *priv)
-+{
-+	int i;
-+
-+	for (i = 0; i < emac_txq_cnt; i++) {
-+		priv->fast_tx_timeout[i].queuenum = i;
-+		hrtimer_init(&priv->fast_tx_timeout[i].timer, CLOCK_MONOTONIC,
-+			     HRTIMER_MODE_REL);
-+		priv->fast_tx_timeout[i].timer.function =
-+				pfe_eth_fast_tx_timeout;
-+		priv->fast_tx_timeout[i].base = priv->fast_tx_timeout;
-+	}
-+}
-+
-+static struct sk_buff *pfe_eth_rx_skb(struct net_device *ndev,
-+				      struct	pfe_eth_priv_s *priv,
-+				      unsigned int qno)
-+{
-+	void *buf_addr;
-+	unsigned int rx_ctrl;
-+	unsigned int desc_ctrl = 0;
-+	struct hif_ipsec_hdr *ipsec_hdr = NULL;
-+	struct sk_buff *skb;
-+	struct sk_buff *skb_frag, *skb_frag_last = NULL;
-+	int length = 0, offset;
-+
-+	skb = priv->skb_inflight[qno];
-+
-+	if (skb) {
-+		skb_frag_last = skb_shinfo(skb)->frag_list;
-+		if (skb_frag_last) {
-+			while (skb_frag_last->next)
-+				skb_frag_last = skb_frag_last->next;
-+		}
-+	}
-+
-+	while (!(desc_ctrl & CL_DESC_LAST)) {
-+		buf_addr = hif_lib_receive_pkt(&priv->client, qno, &length,
-+					       &offset, &rx_ctrl, &desc_ctrl,
-+					       (void **)&ipsec_hdr);
-+		if (!buf_addr)
-+			goto incomplete;
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+		priv->napi_counters[NAPI_DESC_COUNT]++;
-+#endif
-+
-+		/* First frag */
-+		if (desc_ctrl & CL_DESC_FIRST) {
-+			skb = build_skb(buf_addr, 0);
-+			if (unlikely(!skb))
-+				goto pkt_drop;
-+
-+			skb_reserve(skb, offset);
-+			skb_put(skb, length);
-+			skb->dev = ndev;
-+
-+			if ((ndev->features & NETIF_F_RXCSUM) && (rx_ctrl &
-+					HIF_CTRL_RX_CHECKSUMMED))
-+				skb->ip_summed = CHECKSUM_UNNECESSARY;
-+			else
-+				skb_checksum_none_assert(skb);
-+
-+		} else {
-+			/* Next frags */
-+			if (unlikely(!skb)) {
-+				pr_err("%s: NULL skb_inflight\n",
-+				       __func__);
-+				goto pkt_drop;
-+			}
-+
-+			skb_frag = build_skb(buf_addr, 0);
-+
-+			if (unlikely(!skb_frag)) {
-+				kfree(buf_addr);
-+				goto pkt_drop;
-+			}
-+
-+			skb_reserve(skb_frag, offset);
-+			skb_put(skb_frag, length);
-+
-+			skb_frag->dev = ndev;
-+
-+			if (skb_shinfo(skb)->frag_list)
-+				skb_frag_last->next = skb_frag;
-+			else
-+				skb_shinfo(skb)->frag_list = skb_frag;
-+
-+			skb->truesize += skb_frag->truesize;
-+			skb->data_len += length;
-+			skb->len += length;
-+			skb_frag_last = skb_frag;
-+		}
-+	}
-+
-+	priv->skb_inflight[qno] = NULL;
-+	return skb;
-+
-+incomplete:
-+	priv->skb_inflight[qno] = skb;
-+	return NULL;
-+
-+pkt_drop:
-+	priv->skb_inflight[qno] = NULL;
-+
-+	if (skb)
-+		kfree_skb(skb);
-+	else
-+		kfree(buf_addr);
-+
-+	priv->stats.rx_errors++;
-+
-+	return NULL;
-+}
-+
-+/* pfe_eth_poll
-+ */
-+static int pfe_eth_poll(struct pfe_eth_priv_s *priv, struct napi_struct *napi,
-+			unsigned int qno, int budget)
-+{
-+	struct net_device *ndev = priv->ndev;
-+	struct sk_buff *skb;
-+	int work_done = 0;
-+	unsigned int len;
-+
-+	netif_info(priv, intr, priv->ndev, "%s\n", __func__);
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+	priv->napi_counters[NAPI_POLL_COUNT]++;
-+#endif
-+
-+	do {
-+		skb = pfe_eth_rx_skb(ndev, priv, qno);
-+
-+		if (!skb)
-+			break;
-+
-+		len = skb->len;
-+
-+		/* Packet will be processed */
-+		skb->protocol = eth_type_trans(skb, ndev);
-+
-+		netif_receive_skb(skb);
-+
-+		priv->stats.rx_packets++;
-+		priv->stats.rx_bytes += len;
-+
-+		work_done++;
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+		priv->napi_counters[NAPI_PACKET_COUNT]++;
-+#endif
-+
-+	} while (work_done < budget);
-+
-+	/*
-+	 * If no Rx receive nor cleanup work was done, exit polling mode.
-+	 * No more netif_running(dev) check is required here , as this is
-+	 * checked in net/core/dev.c (2.6.33.5 kernel specific).
-+	 */
-+	if (work_done < budget) {
-+		napi_complete(napi);
-+
-+		hif_lib_event_handler_start(&priv->client, EVENT_RX_PKT_IND,
-+					    qno);
-+	}
-+#ifdef PFE_ETH_NAPI_STATS
-+	else
-+		priv->napi_counters[NAPI_FULL_BUDGET_COUNT]++;
-+#endif
-+
-+	return work_done;
-+}
-+
-+/*
-+ * pfe_eth_lro_poll
-+ */
-+static int pfe_eth_lro_poll(struct napi_struct *napi, int budget)
-+{
-+	struct pfe_eth_priv_s *priv = container_of(napi, struct pfe_eth_priv_s,
-+							lro_napi);
-+
-+	netif_info(priv, intr, priv->ndev, "%s\n", __func__);
-+
-+	return pfe_eth_poll(priv, napi, 2, budget);
-+}
-+
-+/* pfe_eth_low_poll
-+ */
-+static int pfe_eth_low_poll(struct napi_struct *napi, int budget)
-+{
-+	struct pfe_eth_priv_s *priv = container_of(napi, struct pfe_eth_priv_s,
-+							low_napi);
-+
-+	netif_info(priv, intr, priv->ndev, "%s\n", __func__);
-+
-+	return pfe_eth_poll(priv, napi, 1, budget);
-+}
-+
-+/* pfe_eth_high_poll
-+ */
-+static int pfe_eth_high_poll(struct napi_struct *napi, int budget)
-+{
-+	struct pfe_eth_priv_s *priv = container_of(napi, struct pfe_eth_priv_s,
-+							high_napi);
-+
-+	netif_info(priv, intr, priv->ndev, "%s\n", __func__);
-+
-+	return pfe_eth_poll(priv, napi, 0, budget);
-+}
-+
-+static const struct net_device_ops pfe_netdev_ops = {
-+	.ndo_open = pfe_eth_open,
-+	.ndo_stop = pfe_eth_close,
-+	.ndo_start_xmit = pfe_eth_send_packet,
-+	.ndo_select_queue = pfe_eth_select_queue,
-+	.ndo_set_rx_mode = pfe_eth_set_multi,
-+	.ndo_set_mac_address = pfe_eth_set_mac_address,
-+	.ndo_validate_addr = eth_validate_addr,
-+	.ndo_change_mtu = pfe_eth_change_mtu,
-+	.ndo_get_stats = pfe_eth_get_stats,
-+	.ndo_set_features = pfe_eth_set_features,
-+};
-+
-+/* pfe_eth_init_one
-+ */
-+static int pfe_eth_init_one(struct pfe *pfe,
-+			    struct ls1012a_pfe_platform_data *pfe_info,
-+			    int id)
-+{
-+	struct net_device *ndev = NULL;
-+	struct pfe_eth_priv_s *priv = NULL;
-+	struct ls1012a_eth_platform_data *einfo;
-+	int err;
-+
-+	einfo = (struct ls1012a_eth_platform_data *)
-+				pfe_info->ls1012a_eth_pdata;
-+
-+	/* einfo never be NULL, but no harm in having this check */
-+	if (!einfo) {
-+		pr_err(
-+			"%s: pfe missing additional gemacs platform data\n"
-+			, __func__);
-+		err = -ENODEV;
-+		goto err0;
-+	}
-+
-+	if (us)
-+		emac_txq_cnt = EMAC_TXQ_CNT;
-+	/* Create an ethernet device instance */
-+	ndev = alloc_etherdev_mq(sizeof(*priv), emac_txq_cnt);
-+
-+	if (!ndev) {
-+		pr_err("%s: gemac %d device allocation failed\n",
-+		       __func__, einfo[id].gem_id);
-+		err = -ENOMEM;
-+		goto err0;
-+	}
-+
-+	priv = netdev_priv(ndev);
-+	priv->ndev = ndev;
-+	priv->id = einfo[id].gem_id;
-+	priv->pfe = pfe;
-+	priv->phy_node = einfo[id].phy_node;
-+
-+	SET_NETDEV_DEV(priv->ndev, priv->pfe->dev);
-+
-+	pfe->eth.eth_priv[id] = priv;
-+
-+	/* Set the info in the priv to the current info */
-+	priv->einfo = &einfo[id];
-+	priv->EMAC_baseaddr = cbus_emac_base[id];
-+	priv->GPI_baseaddr = cbus_gpi_base[id];
-+
-+	spin_lock_init(&priv->lock);
-+
-+	pfe_eth_fast_tx_timeout_init(priv);
-+
-+	/* Copy the station address into the dev structure, */
-+	dev_addr_set(ndev, einfo[id].mac_addr);
-+
-+	if (us)
-+		goto phy_init;
-+
-+	ndev->mtu = 1500;
-+
-+	/* Set MTU limits */
-+	ndev->min_mtu = ETH_MIN_MTU;
-+
-+/*
-+ * Jumbo frames are not supported on LS1012A rev-1.0.
-+ * So max mtu should be restricted to supported frame length.
-+ */
-+	if (pfe_errata_a010897)
-+		ndev->max_mtu = JUMBO_FRAME_SIZE_V1 - ETH_HLEN - ETH_FCS_LEN;
-+	else
-+		ndev->max_mtu = JUMBO_FRAME_SIZE_V2 - ETH_HLEN - ETH_FCS_LEN;
-+
-+	/*Enable after checksum offload is validated */
-+	ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM |
-+		NETIF_F_IPV6_CSUM | NETIF_F_SG;
-+
-+	/* enabled by default */
-+	ndev->features = ndev->hw_features;
-+
-+	priv->usr_features = ndev->features;
-+
-+	ndev->netdev_ops = &pfe_netdev_ops;
-+
-+	ndev->ethtool_ops = &pfe_ethtool_ops;
-+
-+	/* Enable basic messages by default */
-+	priv->msg_enable = NETIF_MSG_IFUP | NETIF_MSG_IFDOWN | NETIF_MSG_LINK |
-+				NETIF_MSG_PROBE;
-+
-+	netif_napi_add(ndev, &priv->low_napi, pfe_eth_low_poll);
-+	netif_napi_add(ndev, &priv->high_napi, pfe_eth_high_poll);
-+	netif_napi_add(ndev, &priv->lro_napi, pfe_eth_lro_poll);
-+
-+	err = register_netdev(ndev);
-+	if (err) {
-+		netdev_err(ndev, "register_netdev() failed\n");
-+		goto err1;
-+	}
-+
-+	if ((!(pfe_use_old_dts_phy) && !(priv->phy_node)) ||
-+	    ((pfe_use_old_dts_phy) &&
-+	      (priv->einfo->phy_flags & GEMAC_NO_PHY))) {
-+		pr_info("%s: No PHY or fixed-link\n", __func__);
-+		goto skip_phy_init;
-+	}
-+
-+phy_init:
-+	device_init_wakeup(&ndev->dev, true);
-+
-+	err = pfe_phy_init(ndev);
-+	if (err) {
-+		netdev_err(ndev, "%s: pfe_phy_init() failed\n",
-+			   __func__);
-+		goto err2;
-+	}
-+
-+	if (us) {
-+		if (priv->phydev)
-+			phy_start(priv->phydev);
-+		return 0;
-+	}
-+
-+	netif_carrier_on(ndev);
-+
-+skip_phy_init:
-+	/* Create all the sysfs files */
-+	if (pfe_eth_sysfs_init(ndev))
-+		goto err3;
-+
-+	netif_info(priv, probe, ndev, "%s: created interface, baseaddr: %p\n",
-+		   __func__, priv->EMAC_baseaddr);
-+
-+	return 0;
-+
-+err3:
-+	pfe_phy_exit(priv->ndev);
-+err2:
-+	if (us)
-+		goto err1;
-+	unregister_netdev(ndev);
-+err1:
-+	free_netdev(priv->ndev);
-+err0:
-+	return err;
-+}
-+
-+/* pfe_eth_init
-+ */
-+int pfe_eth_init(struct pfe *pfe)
-+{
-+	int ii = 0;
-+	int err;
-+	struct ls1012a_pfe_platform_data *pfe_info;
-+
-+	pr_info("%s\n", __func__);
-+
-+	cbus_emac_base[0] = EMAC1_BASE_ADDR;
-+	cbus_emac_base[1] = EMAC2_BASE_ADDR;
-+
-+	cbus_gpi_base[0] = EGPI1_BASE_ADDR;
-+	cbus_gpi_base[1] = EGPI2_BASE_ADDR;
-+
-+	pfe_info = (struct ls1012a_pfe_platform_data *)
-+					pfe->dev->platform_data;
-+	if (!pfe_info) {
-+		pr_err("%s: pfe missing additional platform data\n", __func__);
-+		err = -ENODEV;
-+		goto err_pdata;
-+	}
-+
-+	for (ii = 0; ii < NUM_GEMAC_SUPPORT; ii++) {
-+		err = pfe_eth_mdio_init(pfe, pfe_info, ii);
-+		if (err) {
-+			pr_err("%s: pfe_eth_mdio_init() failed\n", __func__);
-+			goto err_mdio_init;
-+		}
-+	}
-+
-+	if (soc_device_match(ls1012a_rev1_soc_attr))
-+		pfe_errata_a010897 = true;
-+	else
-+		pfe_errata_a010897 = false;
-+
-+	for (ii = 0; ii < NUM_GEMAC_SUPPORT; ii++) {
-+		err = pfe_eth_init_one(pfe, pfe_info, ii);
-+		if (err)
-+			goto err_eth_init;
-+	}
-+
-+	return 0;
-+
-+err_eth_init:
-+	while (ii--) {
-+		pfe_eth_exit_one(pfe->eth.eth_priv[ii]);
-+		pfe_eth_mdio_exit(pfe, ii);
-+	}
-+
-+err_mdio_init:
-+err_pdata:
-+	return err;
-+}
-+
-+/* pfe_eth_exit_one
-+ */
-+static void pfe_eth_exit_one(struct pfe_eth_priv_s *priv)
-+{
-+	netif_info(priv, probe, priv->ndev, "%s\n", __func__);
-+
-+	if (!us)
-+		pfe_eth_sysfs_exit(priv->ndev);
-+
-+	if ((!(pfe_use_old_dts_phy) && !(priv->phy_node)) ||
-+	    ((pfe_use_old_dts_phy) &&
-+	      (priv->einfo->phy_flags & GEMAC_NO_PHY))) {
-+		pr_info("%s: No PHY or fixed-link\n", __func__);
-+		goto skip_phy_exit;
-+	}
-+
-+	pfe_phy_exit(priv->ndev);
-+
-+skip_phy_exit:
-+	if (!us)
-+		unregister_netdev(priv->ndev);
-+
-+	free_netdev(priv->ndev);
-+}
-+
-+/* pfe_eth_exit
-+ */
-+void pfe_eth_exit(struct pfe *pfe)
-+{
-+	int ii;
-+
-+	pr_info("%s\n", __func__);
-+
-+	for (ii = NUM_GEMAC_SUPPORT - 1; ii >= 0; ii--)
-+		pfe_eth_exit_one(pfe->eth.eth_priv[ii]);
-+
-+	for (ii = NUM_GEMAC_SUPPORT - 1; ii >= 0; ii--)
-+		pfe_eth_mdio_exit(pfe, ii);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_eth.h
-@@ -0,0 +1,175 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_ETH_H_
-+#define _PFE_ETH_H_
-+#include <linux/kernel.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/ethtool.h>
-+#include <linux/mii.h>
-+#include <linux/phy.h>
-+#include <linux/clk.h>
-+#include <linux/interrupt.h>
-+#include <linux/time.h>
-+
-+#define PFE_ETH_NAPI_STATS
-+#define PFE_ETH_TX_STATS
-+
-+#define PFE_ETH_FRAGS_MAX (65536 / HIF_RX_PKT_MIN_SIZE)
-+#define LRO_LEN_COUNT_MAX	32
-+#define LRO_NB_COUNT_MAX	32
-+
-+#define PFE_PAUSE_FLAG_ENABLE		1
-+#define PFE_PAUSE_FLAG_AUTONEG		2
-+
-+/* GEMAC configured by SW */
-+/* GEMAC configured by phy lines (not for MII/GMII) */
-+
-+#define GEMAC_SW_FULL_DUPLEX    BIT(9)
-+#define GEMAC_SW_SPEED_10M      (0 << 12)
-+#define GEMAC_SW_SPEED_100M     BIT(12)
-+#define GEMAC_SW_SPEED_1G       (2 << 12)
-+
-+#define GEMAC_NO_PHY            BIT(0)
-+
-+struct ls1012a_eth_platform_data {
-+	/* board specific information */
-+	phy_interface_t mii_config;
-+	u32 phy_flags;
-+	u32 gem_id;
-+	u32 phy_id;
-+	u32 mdio_muxval;
-+	u8 mac_addr[ETH_ALEN];
-+	struct device_node	*phy_node;
-+};
-+
-+struct ls1012a_mdio_platform_data {
-+	int id;
-+	int irq[32];
-+	u32 phy_mask;
-+	int mdc_div;
-+};
-+
-+struct ls1012a_pfe_platform_data {
-+	struct ls1012a_eth_platform_data ls1012a_eth_pdata[3];
-+	struct ls1012a_mdio_platform_data ls1012a_mdio_pdata[3];
-+};
-+
-+#define NUM_GEMAC_SUPPORT	2
-+#define DRV_NAME		"pfe-eth"
-+#define DRV_VERSION		"1.0"
-+
-+#define LS1012A_TX_FAST_RECOVERY_TIMEOUT_MS	3
-+#define TX_POLL_TIMEOUT_MS	1000
-+
-+#define EMAC_TXQ_CNT	16
-+#define EMAC_TXQ_DEPTH	(HIF_TX_DESC_NT)
-+
-+#define JUMBO_FRAME_SIZE_V1	1900
-+#define JUMBO_FRAME_SIZE_V2	10258
-+/*
-+ * Client Tx queue threshold, for txQ flush condition.
-+ * It must be smaller than the queue size (in case we ever change it in the
-+ * future).
-+ */
-+#define HIF_CL_TX_FLUSH_MARK	32
-+
-+/*
-+ * Max number of TX resources (HIF descriptors or skbs) that will be released
-+ * in a single go during batch recycling.
-+ * Should be lower than the flush mark so the SW can provide the HW with a
-+ * continuous stream of packets instead of bursts.
-+ */
-+#define TX_FREE_MAX_COUNT 16
-+#define EMAC_RXQ_CNT	3
-+#define EMAC_RXQ_DEPTH	HIF_RX_DESC_NT
-+/* make sure clients can receive a full burst of packets */
-+#define EMAC_RMON_TXBYTES_POS	0x00
-+#define EMAC_RMON_RXBYTES_POS	0x14
-+
-+#define EMAC_QUEUENUM_MASK      (emac_txq_cnt - 1)
-+#define EMAC_MDIO_TIMEOUT	1000
-+#define MAX_UC_SPEC_ADDR_REG 31
-+
-+struct pfe_eth_fast_timer {
-+	int queuenum;
-+	struct hrtimer timer;
-+	void *base;
-+};
-+
-+struct  pfe_eth_priv_s {
-+	struct pfe		*pfe;
-+	struct hif_client_s	client;
-+	struct napi_struct	lro_napi;
-+	struct napi_struct	low_napi;
-+	struct napi_struct	high_napi;
-+	int			low_tmu_q;
-+	int			high_tmu_q;
-+	struct net_device_stats stats;
-+	struct net_device	*ndev;
-+	int			id;
-+	int			promisc;
-+	unsigned int		msg_enable;
-+	unsigned int		usr_features;
-+
-+	spinlock_t		lock; /* protect member variables */
-+	unsigned int		event_status;
-+	int			irq;
-+	void			*EMAC_baseaddr;
-+	void			*GPI_baseaddr;
-+	/* PHY stuff */
-+	struct phy_device	*phydev;
-+	int			oldspeed;
-+	int			oldduplex;
-+	int			oldlink;
-+	struct device_node	*phy_node;
-+	struct clk		*gemtx_clk;
-+	int			wol;
-+	int			pause_flag;
-+
-+	int			default_priority;
-+	struct pfe_eth_fast_timer fast_tx_timeout[EMAC_TXQ_CNT];
-+
-+	struct ls1012a_eth_platform_data *einfo;
-+	struct sk_buff *skb_inflight[EMAC_RXQ_CNT + 6];
-+
-+#ifdef PFE_ETH_TX_STATS
-+	unsigned int stop_queue_total[EMAC_TXQ_CNT];
-+	unsigned int stop_queue_hif[EMAC_TXQ_CNT];
-+	unsigned int stop_queue_hif_client[EMAC_TXQ_CNT];
-+	unsigned int stop_queue_credit[EMAC_TXQ_CNT];
-+	unsigned int clean_fail[EMAC_TXQ_CNT];
-+	unsigned int was_stopped[EMAC_TXQ_CNT];
-+#endif
-+
-+#ifdef PFE_ETH_NAPI_STATS
-+	unsigned int napi_counters[NAPI_MAX_COUNT];
-+#endif
-+	unsigned int frags_inflight[EMAC_RXQ_CNT + 6];
-+};
-+
-+struct pfe_eth {
-+	struct pfe_eth_priv_s *eth_priv[3];
-+};
-+
-+struct pfe_mdio_priv_s {
-+	void __iomem *mdio_base;
-+	int			mdc_div;
-+	struct mii_bus		*mii_bus;
-+};
-+
-+struct pfe_mdio {
-+	struct pfe_mdio_priv_s *mdio_priv[3];
-+};
-+
-+int pfe_eth_init(struct pfe *pfe);
-+void pfe_eth_exit(struct pfe *pfe);
-+int pfe_eth_suspend(struct net_device *dev);
-+int pfe_eth_resume(struct net_device *dev);
-+int pfe_eth_mdio_reset(struct mii_bus *bus);
-+
-+#endif /* _PFE_ETH_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_firmware.c
-@@ -0,0 +1,398 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+/*
-+ * @file
-+ * Contains all the functions to handle parsing and loading of PE firmware
-+ * files.
-+ */
-+#include <linux/firmware.h>
-+
-+#include "pfe_mod.h"
-+#include "pfe_firmware.h"
-+#include "pfe/pfe.h"
-+#include <linux/of_platform.h>
-+#include <linux/of_address.h>
-+
-+static struct elf32_shdr *get_elf_section_header(const u8 *fw,
-+						 const char *section)
-+{
-+	struct elf32_hdr *elf_hdr = (struct elf32_hdr *)fw;
-+	struct elf32_shdr *shdr;
-+	struct elf32_shdr *shdr_shstr;
-+	Elf32_Off e_shoff = be32_to_cpu(elf_hdr->e_shoff);
-+	Elf32_Half e_shentsize = be16_to_cpu(elf_hdr->e_shentsize);
-+	Elf32_Half e_shnum = be16_to_cpu(elf_hdr->e_shnum);
-+	Elf32_Half e_shstrndx = be16_to_cpu(elf_hdr->e_shstrndx);
-+	Elf32_Off shstr_offset;
-+	Elf32_Word sh_name;
-+	const char *name;
-+	int i;
-+
-+	/* Section header strings */
-+	shdr_shstr = (struct elf32_shdr *)((u8 *)elf_hdr + e_shoff + e_shstrndx
-+					* e_shentsize);
-+	shstr_offset = be32_to_cpu(shdr_shstr->sh_offset);
-+
-+	for (i = 0; i < e_shnum; i++) {
-+		shdr = (struct elf32_shdr *)((u8 *)elf_hdr + e_shoff
-+					     + i * e_shentsize);
-+
-+		sh_name = be32_to_cpu(shdr->sh_name);
-+
-+		name = (const char *)((u8 *)elf_hdr + shstr_offset + sh_name);
-+
-+		if (!strcmp(name, section))
-+			return shdr;
-+	}
-+
-+	pr_err("%s: didn't find section %s\n", __func__, section);
-+
-+	return NULL;
-+}
-+
-+#if defined(CFG_DIAGS)
-+static int pfe_get_diags_info(const u8 *fw, struct pfe_diags_info
-+				*diags_info)
-+{
-+	struct elf32_shdr *shdr;
-+	unsigned long offset, size;
-+
-+	shdr = get_elf_section_header(fw, ".pfe_diags_str");
-+	if (shdr) {
-+		offset = be32_to_cpu(shdr->sh_offset);
-+		size = be32_to_cpu(shdr->sh_size);
-+		diags_info->diags_str_base = be32_to_cpu(shdr->sh_addr);
-+		diags_info->diags_str_size = size;
-+		diags_info->diags_str_array = kmalloc(size, GFP_KERNEL);
-+		memcpy(diags_info->diags_str_array, fw + offset, size);
-+
-+		return 0;
-+	} else {
-+		return -1;
-+	}
-+}
-+#endif
-+
-+static void pfe_check_version_info(const u8 *fw)
-+{
-+	/*static char *version = NULL;*/
-+	const u8 *elf_data = fw;
-+	static char *version;
-+
-+	struct elf32_shdr *shdr = get_elf_section_header(fw, ".version");
-+
-+	if (shdr) {
-+		if (!version) {
-+			/*
-+			 * this is the first fw we load, use its version
-+			 * string as reference (whatever it is)
-+			 */
-+			version = (char *)(elf_data +
-+					be32_to_cpu(shdr->sh_offset));
-+
-+			pr_info("PFE binary version: %s\n", version);
-+		} else {
-+			/*
-+			 * already have loaded at least one firmware, check
-+			 * sequence can start now
-+			 */
-+			if (strcmp(version, (char *)(elf_data +
-+				be32_to_cpu(shdr->sh_offset)))) {
-+				pr_info(
-+				"WARNING: PFE firmware binaries from incompatible version\n");
-+			}
-+		}
-+	} else {
-+		/*
-+		 * version cannot be verified, a potential issue that should
-+		 * be reported
-+		 */
-+		pr_info(
-+			 "WARNING: PFE firmware binaries from incompatible version\n");
-+	}
-+}
-+
-+/* PFE elf firmware loader.
-+ * Loads an elf firmware image into a list of PE's (specified using a bitmask)
-+ *
-+ * @param pe_mask	Mask of PE id's to load firmware to
-+ * @param fw		Pointer to the firmware image
-+ *
-+ * @return		0 on success, a negative value on error
-+ *
-+ */
-+int pfe_load_elf(int pe_mask, const u8 *fw, struct pfe *pfe)
-+{
-+	struct elf32_hdr *elf_hdr = (struct elf32_hdr *)fw;
-+	Elf32_Half sections = be16_to_cpu(elf_hdr->e_shnum);
-+	struct elf32_shdr *shdr = (struct elf32_shdr *)(fw +
-+					be32_to_cpu(elf_hdr->e_shoff));
-+	int id, section;
-+	int rc;
-+
-+	pr_info("%s\n", __func__);
-+
-+	/* Some sanity checks */
-+	if (strncmp(&elf_hdr->e_ident[EI_MAG0], ELFMAG, SELFMAG)) {
-+		pr_err("%s: incorrect elf magic number\n", __func__);
-+		return -EINVAL;
-+	}
-+
-+	if (elf_hdr->e_ident[EI_CLASS] != ELFCLASS32) {
-+		pr_err("%s: incorrect elf class(%x)\n", __func__,
-+		       elf_hdr->e_ident[EI_CLASS]);
-+		return -EINVAL;
-+	}
-+
-+	if (elf_hdr->e_ident[EI_DATA] != ELFDATA2MSB) {
-+		pr_err("%s: incorrect elf data(%x)\n", __func__,
-+		       elf_hdr->e_ident[EI_DATA]);
-+		return -EINVAL;
-+	}
-+
-+	if (be16_to_cpu(elf_hdr->e_type) != ET_EXEC) {
-+		pr_err("%s: incorrect elf file type(%x)\n", __func__,
-+		       be16_to_cpu(elf_hdr->e_type));
-+		return -EINVAL;
-+	}
-+
-+	for (section = 0; section < sections; section++, shdr++) {
-+		if (!(be32_to_cpu(shdr->sh_flags) & (SHF_WRITE | SHF_ALLOC |
-+			SHF_EXECINSTR)))
-+			continue;
-+
-+		for (id = 0; id < MAX_PE; id++)
-+			if (pe_mask & (1 << id)) {
-+				rc = pe_load_elf_section(id, elf_hdr, shdr,
-+							 pfe->dev);
-+				if (rc < 0)
-+					goto err;
-+			}
-+	}
-+
-+	pfe_check_version_info(fw);
-+
-+	return 0;
-+
-+err:
-+	return rc;
-+}
-+
-+int get_firmware_in_fdt(const u8 **pe_fw, const char *name)
-+{
-+	struct device_node *np;
-+	const unsigned int *len;
-+	const void *data;
-+
-+	if (!strcmp(name, CLASS_FIRMWARE_FILENAME)) {
-+		/* The firmware should be inside the device tree. */
-+		np = of_find_compatible_node(NULL, NULL,
-+					     "fsl,pfe-class-firmware");
-+		if (!np) {
-+			pr_info("Failed to find the node\n");
-+			return -ENOENT;
-+		}
-+
-+		data = of_get_property(np, "fsl,class-firmware", NULL);
-+		if (data) {
-+			len = of_get_property(np, "length", NULL);
-+			pr_info("CLASS fw of length %d bytes loaded from FDT.\n",
-+				be32_to_cpu(*len));
-+		} else {
-+			pr_info("fsl,class-firmware not found!!!!\n");
-+			return -ENOENT;
-+		}
-+		of_node_put(np);
-+		*pe_fw = data;
-+	} else if (!strcmp(name, TMU_FIRMWARE_FILENAME)) {
-+		np = of_find_compatible_node(NULL, NULL,
-+					     "fsl,pfe-tmu-firmware");
-+		if (!np) {
-+			pr_info("Failed to find the node\n");
-+			return -ENOENT;
-+		}
-+
-+		data = of_get_property(np, "fsl,tmu-firmware", NULL);
-+		if (data) {
-+			len = of_get_property(np, "length", NULL);
-+			pr_info("TMU fw of length %d bytes loaded from FDT.\n",
-+				be32_to_cpu(*len));
-+		} else {
-+			pr_info("fsl,tmu-firmware not found!!!!\n");
-+			return -ENOENT;
-+		}
-+		of_node_put(np);
-+		*pe_fw = data;
-+	} else if (!strcmp(name, UTIL_FIRMWARE_FILENAME)) {
-+		np = of_find_compatible_node(NULL, NULL,
-+					     "fsl,pfe-util-firmware");
-+		if (!np) {
-+			pr_info("Failed to find the node\n");
-+			return -ENOENT;
-+		}
-+
-+		data = of_get_property(np, "fsl,util-firmware", NULL);
-+		if (data) {
-+			len = of_get_property(np, "length", NULL);
-+			pr_info("UTIL fw of length %d bytes loaded from FDT.\n",
-+				be32_to_cpu(*len));
-+		} else {
-+			pr_info("fsl,util-firmware not found!!!!\n");
-+			return -ENOENT;
-+		}
-+		of_node_put(np);
-+		*pe_fw = data;
-+	} else {
-+		pr_err("firmware:%s not known\n", name);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+/* PFE firmware initialization.
-+ * Loads different firmware files from filesystem.
-+ * Initializes PE IMEM/DMEM and UTIL-PE DDR
-+ * Initializes control path symbol addresses (by looking them up in the elf
-+ * firmware files
-+ * Takes PE's out of reset
-+ *
-+ * @return	0 on success, a negative value on error
-+ *
-+ */
-+int pfe_firmware_init(struct pfe *pfe)
-+{
-+	const struct firmware *class_fw, *tmu_fw;
-+	const u8 *class_elf_fw, *tmu_elf_fw;
-+	int rc = 0, fs_load = 0;
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	const struct firmware *util_fw;
-+	const u8 *util_elf_fw;
-+
-+#endif
-+
-+	pr_info("%s\n", __func__);
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	if (get_firmware_in_fdt(&class_elf_fw, CLASS_FIRMWARE_FILENAME) ||
-+	    get_firmware_in_fdt(&tmu_elf_fw, TMU_FIRMWARE_FILENAME) ||
-+	    get_firmware_in_fdt(&util_elf_fw, UTIL_FIRMWARE_FILENAME))
-+#else
-+	if (get_firmware_in_fdt(&class_elf_fw, CLASS_FIRMWARE_FILENAME) ||
-+	    get_firmware_in_fdt(&tmu_elf_fw, TMU_FIRMWARE_FILENAME))
-+#endif
-+	{
-+		pr_info("%s:PFE firmware not found in FDT.\n", __func__);
-+		pr_info("%s:Trying to load firmware from filesystem...!\n", __func__);
-+
-+		/* look for firmware in filesystem...!*/
-+		fs_load = 1;
-+		if (request_firmware(&class_fw, CLASS_FIRMWARE_FILENAME, pfe->dev)) {
-+			pr_err("%s: request firmware %s failed\n", __func__,
-+			       CLASS_FIRMWARE_FILENAME);
-+			rc = -ETIMEDOUT;
-+			goto err0;
-+		}
-+		class_elf_fw = class_fw->data;
-+
-+		if (request_firmware(&tmu_fw, TMU_FIRMWARE_FILENAME, pfe->dev)) {
-+			pr_err("%s: request firmware %s failed\n", __func__,
-+			       TMU_FIRMWARE_FILENAME);
-+			rc = -ETIMEDOUT;
-+			goto err1;
-+		}
-+		tmu_elf_fw = tmu_fw->data;
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+		if (request_firmware(&util_fw, UTIL_FIRMWARE_FILENAME, pfe->dev)) {
-+			pr_err("%s: request firmware %s failed\n", __func__,
-+			       UTIL_FIRMWARE_FILENAME);
-+			rc = -ETIMEDOUT;
-+			goto err2;
-+		}
-+		util_elf_fw = util_fw->data;
-+#endif
-+	}
-+
-+	rc = pfe_load_elf(CLASS_MASK, class_elf_fw, pfe);
-+	if (rc < 0) {
-+		pr_err("%s: class firmware load failed\n", __func__);
-+		goto err3;
-+	}
-+
-+#if defined(CFG_DIAGS)
-+	rc = pfe_get_diags_info(class_elf_fw, &pfe->diags.class_diags_info);
-+	if (rc < 0) {
-+		pr_warn(
-+			"PFE diags won't be available for class PEs\n");
-+		rc = 0;
-+	}
-+#endif
-+
-+	rc = pfe_load_elf(TMU_MASK, tmu_elf_fw, pfe);
-+	if (rc < 0) {
-+		pr_err("%s: tmu firmware load failed\n", __func__);
-+		goto err3;
-+	}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	rc = pfe_load_elf(UTIL_MASK, util_elf_fw, pfe);
-+	if (rc < 0) {
-+		pr_err("%s: util firmware load failed\n", __func__);
-+		goto err3;
-+	}
-+
-+#if defined(CFG_DIAGS)
-+	rc = pfe_get_diags_info(util_elf_fw, &pfe->diags.util_diags_info);
-+	if (rc < 0) {
-+		pr_warn(
-+			"PFE diags won't be available for util PE\n");
-+		rc = 0;
-+	}
-+#endif
-+
-+	util_enable();
-+#endif
-+
-+	tmu_enable(0xf);
-+	class_enable();
-+
-+err3:
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	if (fs_load)
-+		release_firmware(util_fw);
-+err2:
-+#endif
-+	if (fs_load)
-+		release_firmware(tmu_fw);
-+
-+err1:
-+	if (fs_load)
-+		release_firmware(class_fw);
-+
-+err0:
-+	return rc;
-+}
-+
-+/* PFE firmware cleanup
-+ * Puts PE's in reset
-+ *
-+ *
-+ */
-+void pfe_firmware_exit(struct pfe *pfe)
-+{
-+	pr_info("%s\n", __func__);
-+
-+	if (pe_reset_all(&pfe->ctrl) != 0)
-+		pr_err("Error: Failed to stop PEs, PFE reload may not work correctly\n");
-+
-+	class_disable();
-+	tmu_disable(0xf);
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	util_disable();
-+#endif
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_firmware.h
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_FIRMWARE_H_
-+#define _PFE_FIRMWARE_H_
-+
-+#define CLASS_FIRMWARE_FILENAME		"ppfe_class_ls1012a.elf"
-+#define TMU_FIRMWARE_FILENAME		"ppfe_tmu_ls1012a.elf"
-+#define UTIL_FIRMWARE_FILENAME		"ppfe_util_ls1012a.elf"
-+
-+#define PFE_FW_CHECK_PASS		0
-+#define PFE_FW_CHECK_FAIL		1
-+#define NUM_PFE_FW				3
-+
-+int pfe_firmware_init(struct pfe *pfe);
-+void pfe_firmware_exit(struct pfe *pfe);
-+
-+#endif /* _PFE_FIRMWARE_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hal.c
-@@ -0,0 +1,1517 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include "pfe_mod.h"
-+#include "pfe/pfe.h"
-+
-+/* A-010897: Jumbo frame is not supported */
-+extern bool pfe_errata_a010897;
-+
-+#define PFE_RCR_MAX_FL_MASK	0xC000FFFF
-+
-+void *cbus_base_addr;
-+void *ddr_base_addr;
-+unsigned long ddr_phys_base_addr;
-+unsigned int ddr_size;
-+
-+static struct pe_info pe[MAX_PE];
-+
-+/* Initializes the PFE library.
-+ * Must be called before using any of the library functions.
-+ *
-+ * @param[in] cbus_base		CBUS virtual base address (as mapped in
-+ * the host CPU address space)
-+ * @param[in] ddr_base		PFE DDR range virtual base address (as
-+ * mapped in the host CPU address space)
-+ * @param[in] ddr_phys_base	PFE DDR range physical base address (as
-+ * mapped in platform)
-+ * @param[in] size		PFE DDR range size (as defined by the host
-+ * software)
-+ */
-+void pfe_lib_init(void *cbus_base, void *ddr_base, unsigned long ddr_phys_base,
-+		  unsigned int size)
-+{
-+	cbus_base_addr = cbus_base;
-+	ddr_base_addr = ddr_base;
-+	ddr_phys_base_addr = ddr_phys_base;
-+	ddr_size = size;
-+
-+	pe[CLASS0_ID].dmem_base_addr = CLASS_DMEM_BASE_ADDR(0);
-+	pe[CLASS0_ID].pmem_base_addr = CLASS_IMEM_BASE_ADDR(0);
-+	pe[CLASS0_ID].pmem_size = CLASS_IMEM_SIZE;
-+	pe[CLASS0_ID].mem_access_wdata = CLASS_MEM_ACCESS_WDATA;
-+	pe[CLASS0_ID].mem_access_addr = CLASS_MEM_ACCESS_ADDR;
-+	pe[CLASS0_ID].mem_access_rdata = CLASS_MEM_ACCESS_RDATA;
-+
-+	pe[CLASS1_ID].dmem_base_addr = CLASS_DMEM_BASE_ADDR(1);
-+	pe[CLASS1_ID].pmem_base_addr = CLASS_IMEM_BASE_ADDR(1);
-+	pe[CLASS1_ID].pmem_size = CLASS_IMEM_SIZE;
-+	pe[CLASS1_ID].mem_access_wdata = CLASS_MEM_ACCESS_WDATA;
-+	pe[CLASS1_ID].mem_access_addr = CLASS_MEM_ACCESS_ADDR;
-+	pe[CLASS1_ID].mem_access_rdata = CLASS_MEM_ACCESS_RDATA;
-+
-+	pe[CLASS2_ID].dmem_base_addr = CLASS_DMEM_BASE_ADDR(2);
-+	pe[CLASS2_ID].pmem_base_addr = CLASS_IMEM_BASE_ADDR(2);
-+	pe[CLASS2_ID].pmem_size = CLASS_IMEM_SIZE;
-+	pe[CLASS2_ID].mem_access_wdata = CLASS_MEM_ACCESS_WDATA;
-+	pe[CLASS2_ID].mem_access_addr = CLASS_MEM_ACCESS_ADDR;
-+	pe[CLASS2_ID].mem_access_rdata = CLASS_MEM_ACCESS_RDATA;
-+
-+	pe[CLASS3_ID].dmem_base_addr = CLASS_DMEM_BASE_ADDR(3);
-+	pe[CLASS3_ID].pmem_base_addr = CLASS_IMEM_BASE_ADDR(3);
-+	pe[CLASS3_ID].pmem_size = CLASS_IMEM_SIZE;
-+	pe[CLASS3_ID].mem_access_wdata = CLASS_MEM_ACCESS_WDATA;
-+	pe[CLASS3_ID].mem_access_addr = CLASS_MEM_ACCESS_ADDR;
-+	pe[CLASS3_ID].mem_access_rdata = CLASS_MEM_ACCESS_RDATA;
-+
-+	pe[CLASS4_ID].dmem_base_addr = CLASS_DMEM_BASE_ADDR(4);
-+	pe[CLASS4_ID].pmem_base_addr = CLASS_IMEM_BASE_ADDR(4);
-+	pe[CLASS4_ID].pmem_size = CLASS_IMEM_SIZE;
-+	pe[CLASS4_ID].mem_access_wdata = CLASS_MEM_ACCESS_WDATA;
-+	pe[CLASS4_ID].mem_access_addr = CLASS_MEM_ACCESS_ADDR;
-+	pe[CLASS4_ID].mem_access_rdata = CLASS_MEM_ACCESS_RDATA;
-+
-+	pe[CLASS5_ID].dmem_base_addr = CLASS_DMEM_BASE_ADDR(5);
-+	pe[CLASS5_ID].pmem_base_addr = CLASS_IMEM_BASE_ADDR(5);
-+	pe[CLASS5_ID].pmem_size = CLASS_IMEM_SIZE;
-+	pe[CLASS5_ID].mem_access_wdata = CLASS_MEM_ACCESS_WDATA;
-+	pe[CLASS5_ID].mem_access_addr = CLASS_MEM_ACCESS_ADDR;
-+	pe[CLASS5_ID].mem_access_rdata = CLASS_MEM_ACCESS_RDATA;
-+
-+	pe[TMU0_ID].dmem_base_addr = TMU_DMEM_BASE_ADDR(0);
-+	pe[TMU0_ID].pmem_base_addr = TMU_IMEM_BASE_ADDR(0);
-+	pe[TMU0_ID].pmem_size = TMU_IMEM_SIZE;
-+	pe[TMU0_ID].mem_access_wdata = TMU_MEM_ACCESS_WDATA;
-+	pe[TMU0_ID].mem_access_addr = TMU_MEM_ACCESS_ADDR;
-+	pe[TMU0_ID].mem_access_rdata = TMU_MEM_ACCESS_RDATA;
-+
-+	pe[TMU1_ID].dmem_base_addr = TMU_DMEM_BASE_ADDR(1);
-+	pe[TMU1_ID].pmem_base_addr = TMU_IMEM_BASE_ADDR(1);
-+	pe[TMU1_ID].pmem_size = TMU_IMEM_SIZE;
-+	pe[TMU1_ID].mem_access_wdata = TMU_MEM_ACCESS_WDATA;
-+	pe[TMU1_ID].mem_access_addr = TMU_MEM_ACCESS_ADDR;
-+	pe[TMU1_ID].mem_access_rdata = TMU_MEM_ACCESS_RDATA;
-+
-+	pe[TMU3_ID].dmem_base_addr = TMU_DMEM_BASE_ADDR(3);
-+	pe[TMU3_ID].pmem_base_addr = TMU_IMEM_BASE_ADDR(3);
-+	pe[TMU3_ID].pmem_size = TMU_IMEM_SIZE;
-+	pe[TMU3_ID].mem_access_wdata = TMU_MEM_ACCESS_WDATA;
-+	pe[TMU3_ID].mem_access_addr = TMU_MEM_ACCESS_ADDR;
-+	pe[TMU3_ID].mem_access_rdata = TMU_MEM_ACCESS_RDATA;
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	pe[UTIL_ID].dmem_base_addr = UTIL_DMEM_BASE_ADDR;
-+	pe[UTIL_ID].mem_access_wdata = UTIL_MEM_ACCESS_WDATA;
-+	pe[UTIL_ID].mem_access_addr = UTIL_MEM_ACCESS_ADDR;
-+	pe[UTIL_ID].mem_access_rdata = UTIL_MEM_ACCESS_RDATA;
-+#endif
-+}
-+
-+/* Writes a buffer to PE internal memory from the host
-+ * through indirect access registers.
-+ *
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] src		Buffer source address
-+ * @param[in] mem_access_addr	DMEM destination address (must be 32bit
-+ * aligned)
-+ * @param[in] len		Number of bytes to copy
-+ */
-+void pe_mem_memcpy_to32(int id, u32 mem_access_addr, const void *src, unsigned
-+int len)
-+{
-+	u32 offset = 0, val, addr;
-+	unsigned int len32 = len >> 2;
-+	int i;
-+
-+	addr = mem_access_addr | PE_MEM_ACCESS_WRITE |
-+		PE_MEM_ACCESS_BYTE_ENABLE(0, 4);
-+
-+	for (i = 0; i < len32; i++, offset += 4, src += 4) {
-+		val = *(u32 *)src;
-+		writel(cpu_to_be32(val), pe[id].mem_access_wdata);
-+		writel(addr + offset, pe[id].mem_access_addr);
-+	}
-+
-+	len = (len & 0x3);
-+	if (len) {
-+		val = 0;
-+
-+		addr = (mem_access_addr | PE_MEM_ACCESS_WRITE |
-+			PE_MEM_ACCESS_BYTE_ENABLE(0, len)) + offset;
-+
-+		for (i = 0; i < len; i++, src++)
-+			val |= (*(u8 *)src) << (8 * i);
-+
-+		writel(cpu_to_be32(val), pe[id].mem_access_wdata);
-+		writel(addr, pe[id].mem_access_addr);
-+	}
-+}
-+
-+/* Writes a buffer to PE internal data memory (DMEM) from the host
-+ * through indirect access registers.
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] src		Buffer source address
-+ * @param[in] dst		DMEM destination address (must be 32bit
-+ * aligned)
-+ * @param[in] len		Number of bytes to copy
-+ */
-+void pe_dmem_memcpy_to32(int id, u32 dst, const void *src, unsigned int len)
-+{
-+	pe_mem_memcpy_to32(id, pe[id].dmem_base_addr | dst |
-+				PE_MEM_ACCESS_DMEM, src, len);
-+}
-+
-+/* Writes a buffer to PE internal program memory (PMEM) from the host
-+ * through indirect access registers.
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., TMU3_ID)
-+ * @param[in] src		Buffer source address
-+ * @param[in] dst		PMEM destination address (must be 32bit
-+ * aligned)
-+ * @param[in] len		Number of bytes to copy
-+ */
-+void pe_pmem_memcpy_to32(int id, u32 dst, const void *src, unsigned int len)
-+{
-+	pe_mem_memcpy_to32(id, pe[id].pmem_base_addr | (dst & (pe[id].pmem_size
-+				- 1)) | PE_MEM_ACCESS_IMEM, src, len);
-+}
-+
-+/* Reads PE internal program memory (IMEM) from the host
-+ * through indirect access registers.
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., TMU3_ID)
-+ * @param[in] addr		PMEM read address (must be aligned on size)
-+ * @param[in] size		Number of bytes to read (maximum 4, must not
-+ * cross 32bit boundaries)
-+ * @return			the data read (in PE endianness, i.e BE).
-+ */
-+u32 pe_pmem_read(int id, u32 addr, u8 size)
-+{
-+	u32 offset = addr & 0x3;
-+	u32 mask = 0xffffffff >> ((4 - size) << 3);
-+	u32 val;
-+
-+	addr = pe[id].pmem_base_addr | ((addr & ~0x3) & (pe[id].pmem_size - 1))
-+		| PE_MEM_ACCESS_IMEM | PE_MEM_ACCESS_BYTE_ENABLE(offset, size);
-+
-+	writel(addr, pe[id].mem_access_addr);
-+	val = be32_to_cpu(readl(pe[id].mem_access_rdata));
-+
-+	return (val >> (offset << 3)) & mask;
-+}
-+
-+/* Writes PE internal data memory (DMEM) from the host
-+ * through indirect access registers.
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] addr		DMEM write address (must be aligned on size)
-+ * @param[in] val		Value to write (in PE endianness, i.e BE)
-+ * @param[in] size		Number of bytes to write (maximum 4, must not
-+ * cross 32bit boundaries)
-+ */
-+void pe_dmem_write(int id, u32 val, u32 addr, u8 size)
-+{
-+	u32 offset = addr & 0x3;
-+
-+	addr = pe[id].dmem_base_addr | (addr & ~0x3) | PE_MEM_ACCESS_WRITE |
-+		PE_MEM_ACCESS_DMEM | PE_MEM_ACCESS_BYTE_ENABLE(offset, size);
-+
-+	/* Indirect access interface is byte swapping data being written */
-+	writel(cpu_to_be32(val << (offset << 3)), pe[id].mem_access_wdata);
-+	writel(addr, pe[id].mem_access_addr);
-+}
-+
-+/* Reads PE internal data memory (DMEM) from the host
-+ * through indirect access registers.
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] addr		DMEM read address (must be aligned on size)
-+ * @param[in] size		Number of bytes to read (maximum 4, must not
-+ * cross 32bit boundaries)
-+ * @return			the data read (in PE endianness, i.e BE).
-+ */
-+u32 pe_dmem_read(int id, u32 addr, u8 size)
-+{
-+	u32 offset = addr & 0x3;
-+	u32 mask = 0xffffffff >> ((4 - size) << 3);
-+	u32 val;
-+
-+	addr = pe[id].dmem_base_addr | (addr & ~0x3) | PE_MEM_ACCESS_DMEM |
-+			PE_MEM_ACCESS_BYTE_ENABLE(offset, size);
-+
-+	writel(addr, pe[id].mem_access_addr);
-+
-+	/* Indirect access interface is byte swapping data being read */
-+	val = be32_to_cpu(readl(pe[id].mem_access_rdata));
-+
-+	return (val >> (offset << 3)) & mask;
-+}
-+
-+/* This function is used to write to CLASS internal bus peripherals (ccu,
-+ * pe-lem) from the host
-+ * through indirect access registers.
-+ * @param[in]	val	value to write
-+ * @param[in]	addr	Address to write to (must be aligned on size)
-+ * @param[in]	size	Number of bytes to write (1, 2 or 4)
-+ *
-+ */
-+void class_bus_write(u32 val, u32 addr, u8 size)
-+{
-+	u32 offset = addr & 0x3;
-+
-+	writel((addr & CLASS_BUS_ACCESS_BASE_MASK), CLASS_BUS_ACCESS_BASE);
-+
-+	addr = (addr & ~CLASS_BUS_ACCESS_BASE_MASK) | PE_MEM_ACCESS_WRITE |
-+			(size << 24);
-+
-+	writel(cpu_to_be32(val << (offset << 3)), CLASS_BUS_ACCESS_WDATA);
-+	writel(addr, CLASS_BUS_ACCESS_ADDR);
-+}
-+
-+/* Reads from CLASS internal bus peripherals (ccu, pe-lem) from the host
-+ * through indirect access registers.
-+ * @param[in] addr	Address to read from (must be aligned on size)
-+ * @param[in] size	Number of bytes to read (1, 2 or 4)
-+ * @return		the read data
-+ *
-+ */
-+u32 class_bus_read(u32 addr, u8 size)
-+{
-+	u32 offset = addr & 0x3;
-+	u32 mask = 0xffffffff >> ((4 - size) << 3);
-+	u32 val;
-+
-+	writel((addr & CLASS_BUS_ACCESS_BASE_MASK), CLASS_BUS_ACCESS_BASE);
-+
-+	addr = (addr & ~CLASS_BUS_ACCESS_BASE_MASK) | (size << 24);
-+
-+	writel(addr, CLASS_BUS_ACCESS_ADDR);
-+	val = be32_to_cpu(readl(CLASS_BUS_ACCESS_RDATA));
-+
-+	return (val >> (offset << 3)) & mask;
-+}
-+
-+/* Writes data to the cluster memory (PE_LMEM)
-+ * @param[in] dst	PE LMEM destination address (must be 32bit aligned)
-+ * @param[in] src	Buffer source address
-+ * @param[in] len	Number of bytes to copy
-+ */
-+void class_pe_lmem_memcpy_to32(u32 dst, const void *src, unsigned int len)
-+{
-+	u32 len32 = len >> 2;
-+	int i;
-+
-+	for (i = 0; i < len32; i++, src += 4, dst += 4)
-+		class_bus_write(*(u32 *)src, dst, 4);
-+
-+	if (len & 0x2) {
-+		class_bus_write(*(u16 *)src, dst, 2);
-+		src += 2;
-+		dst += 2;
-+	}
-+
-+	if (len & 0x1) {
-+		class_bus_write(*(u8 *)src, dst, 1);
-+		src++;
-+		dst++;
-+	}
-+}
-+
-+/* Writes value to the cluster memory (PE_LMEM)
-+ * @param[in] dst	PE LMEM destination address (must be 32bit aligned)
-+ * @param[in] val	Value to write
-+ * @param[in] len	Number of bytes to write
-+ */
-+void class_pe_lmem_memset(u32 dst, int val, unsigned int len)
-+{
-+	u32 len32 = len >> 2;
-+	int i;
-+
-+	val = val | (val << 8) | (val << 16) | (val << 24);
-+
-+	for (i = 0; i < len32; i++, dst += 4)
-+		class_bus_write(val, dst, 4);
-+
-+	if (len & 0x2) {
-+		class_bus_write(val, dst, 2);
-+		dst += 2;
-+	}
-+
-+	if (len & 0x1) {
-+		class_bus_write(val, dst, 1);
-+		dst++;
-+	}
-+}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+
-+/* Writes UTIL program memory (DDR) from the host.
-+ *
-+ * @param[in] addr	Address to write (virtual, must be aligned on size)
-+ * @param[in] val		Value to write (in PE endianness, i.e BE)
-+ * @param[in] size		Number of bytes to write (2 or 4)
-+ */
-+static void util_pmem_write(u32 val, void *addr, u8 size)
-+{
-+	void *addr64 = (void *)((unsigned long)addr & ~0x7);
-+	unsigned long off = 8 - ((unsigned long)addr & 0x7) - size;
-+
-+	/*
-+	 * IMEM should  be loaded as a 64bit swapped value in a 64bit aligned
-+	 * location
-+	 */
-+	if (size == 4)
-+		writel(be32_to_cpu(val), addr64 + off);
-+	else
-+		writew(be16_to_cpu((u16)val), addr64 + off);
-+}
-+
-+/* Writes a buffer to UTIL program memory (DDR) from the host.
-+ *
-+ * @param[in] dst	Address to write (virtual, must be at least 16bit
-+ * aligned)
-+ * @param[in] src	Buffer to write (in PE endianness, i.e BE, must have
-+ * same alignment as dst)
-+ * @param[in] len	Number of bytes to write (must be at least 16bit
-+ * aligned)
-+ */
-+static void util_pmem_memcpy(void *dst, const void *src, unsigned int len)
-+{
-+	unsigned int len32;
-+	int i;
-+
-+	if ((unsigned long)src & 0x2) {
-+		util_pmem_write(*(u16 *)src, dst, 2);
-+		src += 2;
-+		dst += 2;
-+		len -= 2;
-+	}
-+
-+	len32 = len >> 2;
-+
-+	for (i = 0; i < len32; i++, dst += 4, src += 4)
-+		util_pmem_write(*(u32 *)src, dst, 4);
-+
-+	if (len & 0x2)
-+		util_pmem_write(*(u16 *)src, dst, len & 0x2);
-+}
-+#endif
-+
-+/* Loads an elf section into pmem
-+ * Code needs to be at least 16bit aligned and only PROGBITS sections are
-+ * supported
-+ *
-+ * @param[in] id	PE identification (CLASS0_ID, ..., TMU0_ID, ...,
-+ * TMU3_ID)
-+ * @param[in] data	pointer to the elf firmware
-+ * @param[in] shdr	pointer to the elf section header
-+ *
-+ */
-+static int pe_load_pmem_section(int id, const void *data,
-+				struct elf32_shdr *shdr)
-+{
-+	u32 offset = be32_to_cpu(shdr->sh_offset);
-+	u32 addr = be32_to_cpu(shdr->sh_addr);
-+	u32 size = be32_to_cpu(shdr->sh_size);
-+	u32 type = be32_to_cpu(shdr->sh_type);
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	if (id == UTIL_ID) {
-+		pr_err("%s: unsupported pmem section for UTIL\n",
-+		       __func__);
-+		return -EINVAL;
-+	}
-+#endif
-+
-+	if (((unsigned long)(data + offset) & 0x3) != (addr & 0x3)) {
-+		pr_err(
-+			"%s: load address(%x) and elf file address(%lx) don't have the same alignment\n"
-+			, __func__, addr, (unsigned long)data + offset);
-+
-+		return -EINVAL;
-+	}
-+
-+	if (addr & 0x1) {
-+		pr_err("%s: load address(%x) is not 16bit aligned\n",
-+		       __func__, addr);
-+		return -EINVAL;
-+	}
-+
-+	if (size & 0x1) {
-+		pr_err("%s: load size(%x) is not 16bit aligned\n",
-+		       __func__, size);
-+		return -EINVAL;
-+	}
-+
-+	switch (type) {
-+	case SHT_PROGBITS:
-+		pe_pmem_memcpy_to32(id, addr, data + offset, size);
-+
-+		break;
-+
-+	default:
-+		pr_err("%s: unsupported section type(%x)\n", __func__,
-+		       type);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+/* Loads an elf section into dmem
-+ * Data needs to be at least 32bit aligned, NOBITS sections are correctly
-+ * initialized to 0
-+ *
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] data		pointer to the elf firmware
-+ * @param[in] shdr		pointer to the elf section header
-+ *
-+ */
-+static int pe_load_dmem_section(int id, const void *data,
-+				struct elf32_shdr *shdr)
-+{
-+	u32 offset = be32_to_cpu(shdr->sh_offset);
-+	u32 addr = be32_to_cpu(shdr->sh_addr);
-+	u32 size = be32_to_cpu(shdr->sh_size);
-+	u32 type = be32_to_cpu(shdr->sh_type);
-+	u32 size32 = size >> 2;
-+	int i;
-+
-+	if (((unsigned long)(data + offset) & 0x3) != (addr & 0x3)) {
-+		pr_err(
-+			"%s: load address(%x) and elf file address(%lx) don't have the same alignment\n",
-+			__func__, addr, (unsigned long)data + offset);
-+
-+		return -EINVAL;
-+	}
-+
-+	if (addr & 0x3) {
-+		pr_err("%s: load address(%x) is not 32bit aligned\n",
-+		       __func__, addr);
-+		return -EINVAL;
-+	}
-+
-+	switch (type) {
-+	case SHT_PROGBITS:
-+		pe_dmem_memcpy_to32(id, addr, data + offset, size);
-+		break;
-+
-+	case SHT_NOBITS:
-+		for (i = 0; i < size32; i++, addr += 4)
-+			pe_dmem_write(id, 0, addr, 4);
-+
-+		if (size & 0x3)
-+			pe_dmem_write(id, 0, addr, size & 0x3);
-+
-+		break;
-+
-+	default:
-+		pr_err("%s: unsupported section type(%x)\n", __func__,
-+		       type);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+/* Loads an elf section into DDR
-+ * Data needs to be at least 32bit aligned, NOBITS sections are correctly
-+ * initialized to 0
-+ *
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] data		pointer to the elf firmware
-+ * @param[in] shdr		pointer to the elf section header
-+ *
-+ */
-+static int pe_load_ddr_section(int id, const void *data,
-+			       struct elf32_shdr *shdr,
-+			       struct device *dev) {
-+	u32 offset = be32_to_cpu(shdr->sh_offset);
-+	u32 addr = be32_to_cpu(shdr->sh_addr);
-+	u32 size = be32_to_cpu(shdr->sh_size);
-+	u32 type = be32_to_cpu(shdr->sh_type);
-+	u32 flags = be32_to_cpu(shdr->sh_flags);
-+
-+	switch (type) {
-+	case SHT_PROGBITS:
-+		if (flags & SHF_EXECINSTR) {
-+			if (id <= CLASS_MAX_ID) {
-+				/* DO the loading only once in DDR */
-+				if (id == CLASS0_ID) {
-+					pr_err(
-+						"%s: load address(%x) and elf file address(%lx) rcvd\n",
-+						__func__, addr,
-+						(unsigned long)data + offset);
-+					if (((unsigned long)(data + offset)
-+						& 0x3) != (addr & 0x3)) {
-+						pr_err(
-+							"%s: load address(%x) and elf file address(%lx) don't have the same alignment\n"
-+							, __func__, addr,
-+						(unsigned long)data + offset);
-+
-+						return -EINVAL;
-+					}
-+
-+					if (addr & 0x1) {
-+						pr_err(
-+							"%s: load address(%x) is not 16bit aligned\n"
-+							, __func__, addr);
-+						return -EINVAL;
-+					}
-+
-+					if (size & 0x1) {
-+						pr_err(
-+							"%s: load length(%x) is not 16bit aligned\n"
-+							, __func__, size);
-+						return -EINVAL;
-+					}
-+					memcpy(DDR_PHYS_TO_VIRT(
-+						DDR_PFE_TO_PHYS(addr)),
-+						data + offset, size);
-+				}
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+			} else if (id == UTIL_ID) {
-+				if (((unsigned long)(data + offset) & 0x3)
-+					!= (addr & 0x3)) {
-+					pr_err(
-+						"%s: load address(%x) and elf file address(%lx) don't have the same alignment\n"
-+						, __func__, addr,
-+						(unsigned long)data + offset);
-+
-+					return -EINVAL;
-+				}
-+
-+				if (addr & 0x1) {
-+					pr_err(
-+						"%s: load address(%x) is not 16bit aligned\n"
-+						, __func__, addr);
-+					return -EINVAL;
-+				}
-+
-+				if (size & 0x1) {
-+					pr_err(
-+						"%s: load length(%x) is not 16bit aligned\n"
-+						, __func__, size);
-+					return -EINVAL;
-+				}
-+
-+				util_pmem_memcpy(DDR_PHYS_TO_VIRT(
-+							DDR_PFE_TO_PHYS(addr)),
-+							data + offset, size);
-+			}
-+#endif
-+			} else {
-+				pr_err(
-+					"%s: unsupported ddr section type(%x) for PE(%d)\n"
-+						, __func__, type, id);
-+				return -EINVAL;
-+			}
-+
-+		} else {
-+			memcpy(DDR_PHYS_TO_VIRT(DDR_PFE_TO_PHYS(addr)), data
-+				+ offset, size);
-+		}
-+
-+		break;
-+
-+	case SHT_NOBITS:
-+		memset(DDR_PHYS_TO_VIRT(DDR_PFE_TO_PHYS(addr)), 0, size);
-+
-+		break;
-+
-+	default:
-+		pr_err("%s: unsupported section type(%x)\n", __func__,
-+		       type);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+/* Loads an elf section into pe lmem
-+ * Data needs to be at least 32bit aligned, NOBITS sections are correctly
-+ * initialized to 0
-+ *
-+ * @param[in] id		PE identification (CLASS0_ID,..., CLASS5_ID)
-+ * @param[in] data		pointer to the elf firmware
-+ * @param[in] shdr		pointer to the elf section header
-+ *
-+ */
-+static int pe_load_pe_lmem_section(int id, const void *data,
-+				   struct elf32_shdr *shdr)
-+{
-+	u32 offset = be32_to_cpu(shdr->sh_offset);
-+	u32 addr = be32_to_cpu(shdr->sh_addr);
-+	u32 size = be32_to_cpu(shdr->sh_size);
-+	u32 type = be32_to_cpu(shdr->sh_type);
-+
-+	if (id > CLASS_MAX_ID) {
-+		pr_err(
-+			"%s: unsupported pe-lmem section type(%x) for PE(%d)\n",
-+			 __func__, type, id);
-+		return -EINVAL;
-+	}
-+
-+	if (((unsigned long)(data + offset) & 0x3) != (addr & 0x3)) {
-+		pr_err(
-+			"%s: load address(%x) and elf file address(%lx) don't have the same alignment\n",
-+			__func__, addr, (unsigned long)data + offset);
-+
-+		return -EINVAL;
-+	}
-+
-+	if (addr & 0x3) {
-+		pr_err("%s: load address(%x) is not 32bit aligned\n",
-+		       __func__, addr);
-+		return -EINVAL;
-+	}
-+
-+	switch (type) {
-+	case SHT_PROGBITS:
-+		class_pe_lmem_memcpy_to32(addr, data + offset, size);
-+		break;
-+
-+	case SHT_NOBITS:
-+		class_pe_lmem_memset(addr, 0, size);
-+		break;
-+
-+	default:
-+		pr_err("%s: unsupported section type(%x)\n", __func__,
-+		       type);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+/* Loads an elf section into a PE
-+ * For now only supports loading a section to dmem (all PE's), pmem (class and
-+ * tmu PE's),
-+ * DDDR (util PE code)
-+ *
-+ * @param[in] id		PE identification (CLASS0_ID, ..., TMU0_ID,
-+ * ..., UTIL_ID)
-+ * @param[in] data		pointer to the elf firmware
-+ * @param[in] shdr		pointer to the elf section header
-+ *
-+ */
-+int pe_load_elf_section(int id, const void *data, struct elf32_shdr *shdr,
-+			struct device *dev) {
-+	u32 addr = be32_to_cpu(shdr->sh_addr);
-+	u32 size = be32_to_cpu(shdr->sh_size);
-+
-+	if (IS_DMEM(addr, size))
-+		return pe_load_dmem_section(id, data, shdr);
-+	else if (IS_PMEM(addr, size))
-+		return pe_load_pmem_section(id, data, shdr);
-+	else if (IS_PFE_LMEM(addr, size))
-+		return 0;
-+	else if (IS_PHYS_DDR(addr, size))
-+		return pe_load_ddr_section(id, data, shdr, dev);
-+	else if (IS_PE_LMEM(addr, size))
-+		return pe_load_pe_lmem_section(id, data, shdr);
-+
-+	pr_err("%s: unsupported memory range(%x)\n", __func__,
-+	       addr);
-+	return 0;
-+}
-+
-+/**************************** BMU ***************************/
-+
-+/* Initializes a BMU block.
-+ * @param[in] base	BMU block base address
-+ * @param[in] cfg	BMU configuration
-+ */
-+void bmu_init(void *base, struct BMU_CFG *cfg)
-+{
-+	bmu_disable(base);
-+
-+	bmu_set_config(base, cfg);
-+
-+	bmu_reset(base);
-+}
-+
-+/* Resets a BMU block.
-+ * @param[in] base	BMU block base address
-+ */
-+void bmu_reset(void *base)
-+{
-+	writel(CORE_SW_RESET, base + BMU_CTRL);
-+
-+	/* Wait for self clear */
-+	while (readl(base + BMU_CTRL) & CORE_SW_RESET)
-+		;
-+}
-+
-+/* Enabled a BMU block.
-+ * @param[in] base	BMU block base address
-+ */
-+void bmu_enable(void *base)
-+{
-+	writel(CORE_ENABLE, base + BMU_CTRL);
-+}
-+
-+/* Disables a BMU block.
-+ * @param[in] base	BMU block base address
-+ */
-+void bmu_disable(void *base)
-+{
-+	writel(CORE_DISABLE, base + BMU_CTRL);
-+}
-+
-+/* Sets the configuration of a BMU block.
-+ * @param[in] base	BMU block base address
-+ * @param[in] cfg	BMU configuration
-+ */
-+void bmu_set_config(void *base, struct BMU_CFG *cfg)
-+{
-+	writel(cfg->baseaddr, base + BMU_UCAST_BASE_ADDR);
-+	writel(cfg->count & 0xffff, base + BMU_UCAST_CONFIG);
-+	writel(cfg->size & 0xffff, base + BMU_BUF_SIZE);
-+
-+	/* Interrupts are never used */
-+	writel(cfg->low_watermark, base + BMU_LOW_WATERMARK);
-+	writel(cfg->high_watermark, base + BMU_HIGH_WATERMARK);
-+	writel(0x0, base + BMU_INT_ENABLE);
-+}
-+
-+/**************************** MTIP GEMAC ***************************/
-+
-+/* Enable Rx Checksum Engine. With this enabled, Frame with bad IP,
-+ *   TCP or UDP checksums are discarded
-+ *
-+ * @param[in] base	GEMAC base address.
-+ */
-+void gemac_enable_rx_checksum_offload(void *base)
-+{
-+	/*Do not find configuration to do this */
-+}
-+
-+/* Disable Rx Checksum Engine.
-+ *
-+ * @param[in] base	GEMAC base address.
-+ */
-+void gemac_disable_rx_checksum_offload(void *base)
-+{
-+	/*Do not find configuration to do this */
-+}
-+
-+/* GEMAC set speed.
-+ * @param[in] base	GEMAC base address
-+ * @param[in] speed	GEMAC speed (10, 100 or 1000 Mbps)
-+ */
-+void gemac_set_speed(void *base, enum mac_speed gem_speed)
-+{
-+	u32 ecr = readl(base + EMAC_ECNTRL_REG) & ~EMAC_ECNTRL_SPEED;
-+	u32 rcr = readl(base + EMAC_RCNTRL_REG) & ~EMAC_RCNTRL_RMII_10T;
-+
-+	switch (gem_speed) {
-+	case SPEED_10M:
-+			rcr |= EMAC_RCNTRL_RMII_10T;
-+			break;
-+
-+	case SPEED_1000M:
-+			ecr |= EMAC_ECNTRL_SPEED;
-+			break;
-+
-+	case SPEED_100M:
-+	default:
-+			/*It is in 100M mode */
-+			break;
-+	}
-+	writel(ecr, (base + EMAC_ECNTRL_REG));
-+	writel(rcr, (base + EMAC_RCNTRL_REG));
-+}
-+
-+/* GEMAC set duplex.
-+ * @param[in] base	GEMAC base address
-+ * @param[in] duplex	GEMAC duplex mode (Full, Half)
-+ */
-+void gemac_set_duplex(void *base, int duplex)
-+{
-+	if (duplex == DUPLEX_HALF) {
-+		writel(readl(base + EMAC_TCNTRL_REG) & ~EMAC_TCNTRL_FDEN, base
-+			+ EMAC_TCNTRL_REG);
-+		writel(readl(base + EMAC_RCNTRL_REG) | EMAC_RCNTRL_DRT, (base
-+			+ EMAC_RCNTRL_REG));
-+	} else{
-+		writel(readl(base + EMAC_TCNTRL_REG) | EMAC_TCNTRL_FDEN, base
-+			+ EMAC_TCNTRL_REG);
-+		writel(readl(base + EMAC_RCNTRL_REG) & ~EMAC_RCNTRL_DRT, (base
-+			+ EMAC_RCNTRL_REG));
-+	}
-+}
-+
-+/* GEMAC set mode.
-+ * @param[in] base	GEMAC base address
-+ * @param[in] mode	GEMAC operation mode (MII, RMII, RGMII, SGMII)
-+ */
-+void gemac_set_mode(void *base, int mode)
-+{
-+	u32 val = readl(base + EMAC_RCNTRL_REG);
-+
-+	/*Remove loopbank*/
-+	val &= ~EMAC_RCNTRL_LOOP;
-+
-+	/* Enable flow control and MII mode.PFE firmware always expects
-+       CRC should be forwarded by MAC to validate CRC in software.*/
-+	val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE);
-+
-+	writel(val, base + EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC enable function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_enable(void *base)
-+{
-+	writel(readl(base + EMAC_ECNTRL_REG) | EMAC_ECNTRL_ETHER_EN, base +
-+		EMAC_ECNTRL_REG);
-+}
-+
-+/* GEMAC disable function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_disable(void *base)
-+{
-+	writel(readl(base + EMAC_ECNTRL_REG) & ~EMAC_ECNTRL_ETHER_EN, base +
-+		EMAC_ECNTRL_REG);
-+}
-+
-+/* GEMAC TX disable function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_tx_disable(void *base)
-+{
-+	writel(readl(base + EMAC_TCNTRL_REG) | EMAC_TCNTRL_GTS, base +
-+		EMAC_TCNTRL_REG);
-+}
-+
-+void gemac_tx_enable(void *base)
-+{
-+	writel(readl(base + EMAC_TCNTRL_REG) & ~EMAC_TCNTRL_GTS, base +
-+			EMAC_TCNTRL_REG);
-+}
-+
-+/* Sets the hash register of the MAC.
-+ * This register is used for matching unicast and multicast frames.
-+ *
-+ * @param[in] base	GEMAC base address.
-+ * @param[in] hash	64-bit hash to be configured.
-+ */
-+void gemac_set_hash(void *base, struct pfe_mac_addr *hash)
-+{
-+	writel(hash->bottom,  base + EMAC_GALR);
-+	writel(hash->top, base + EMAC_GAUR);
-+}
-+
-+void gemac_set_laddrN(void *base, struct pfe_mac_addr *address,
-+		      unsigned int entry_index)
-+{
-+	if ((entry_index < 1) || (entry_index > EMAC_SPEC_ADDR_MAX))
-+		return;
-+
-+	entry_index = entry_index - 1;
-+	if (entry_index < 1) {
-+		writel(htonl(address->bottom),  base + EMAC_PHY_ADDR_LOW);
-+		writel((htonl(address->top) | 0x8808), base +
-+			EMAC_PHY_ADDR_HIGH);
-+	} else {
-+		writel(htonl(address->bottom),  base + ((entry_index - 1) * 8)
-+			+ EMAC_SMAC_0_0);
-+		writel((htonl(address->top) | 0x8808), base + ((entry_index -
-+			1) * 8) + EMAC_SMAC_0_1);
-+	}
-+}
-+
-+void gemac_clear_laddrN(void *base, unsigned int entry_index)
-+{
-+	if ((entry_index < 1) || (entry_index > EMAC_SPEC_ADDR_MAX))
-+		return;
-+
-+	entry_index = entry_index - 1;
-+	if (entry_index < 1) {
-+		writel(0, base + EMAC_PHY_ADDR_LOW);
-+		writel(0, base + EMAC_PHY_ADDR_HIGH);
-+	} else {
-+		writel(0,  base + ((entry_index - 1) * 8) + EMAC_SMAC_0_0);
-+		writel(0, base + ((entry_index - 1) * 8) + EMAC_SMAC_0_1);
-+	}
-+}
-+
-+/* Set the loopback mode of the MAC.  This can be either no loopback for
-+ * normal operation, local loopback through MAC internal loopback module or PHY
-+ *   loopback for external loopback through a PHY.  This asserts the external
-+ * loop pin.
-+ *
-+ * @param[in] base	GEMAC base address.
-+ * @param[in] gem_loop	Loopback mode to be enabled. LB_LOCAL - MAC
-+ * Loopback,
-+ *			LB_EXT - PHY Loopback.
-+ */
-+void gemac_set_loop(void *base, enum mac_loop gem_loop)
-+{
-+	pr_info("%s()\n", __func__);
-+	writel(readl(base + EMAC_RCNTRL_REG) | EMAC_RCNTRL_LOOP, (base +
-+		EMAC_RCNTRL_REG));
-+}
-+
-+/* GEMAC allow frames
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_enable_copy_all(void *base)
-+{
-+	writel(readl(base + EMAC_RCNTRL_REG) | EMAC_RCNTRL_PROM, (base +
-+		EMAC_RCNTRL_REG));
-+}
-+
-+/* GEMAC do not allow frames
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_disable_copy_all(void *base)
-+{
-+	writel(readl(base + EMAC_RCNTRL_REG) & ~EMAC_RCNTRL_PROM, (base +
-+		EMAC_RCNTRL_REG));
-+}
-+
-+/* GEMAC allow broadcast function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_allow_broadcast(void *base)
-+{
-+	writel(readl(base + EMAC_RCNTRL_REG) & ~EMAC_RCNTRL_BC_REJ, base +
-+		EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC no broadcast function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_no_broadcast(void *base)
-+{
-+	writel(readl(base + EMAC_RCNTRL_REG) | EMAC_RCNTRL_BC_REJ, base +
-+		EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC enable 1536 rx function.
-+ * @param[in]	base	GEMAC base address
-+ */
-+void gemac_enable_1536_rx(void *base)
-+{
-+	/* Set 1536 as Maximum frame length */
-+	writel((readl(base + EMAC_RCNTRL_REG) & PFE_RCR_MAX_FL_MASK)
-+		| (1536 << 16), base +	EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC set rx Max frame length.
-+ * @param[in]	base	GEMAC base address
-+ * @param[in]	mtu	new mtu
-+ */
-+void gemac_set_rx_max_fl(void *base, int mtu)
-+{
-+	/* Set mtu as Maximum frame length */
-+	writel((readl(base + EMAC_RCNTRL_REG) & PFE_RCR_MAX_FL_MASK)
-+		| (mtu << 16), base + EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC enable stacked vlan function.
-+ * @param[in]	base	GEMAC base address
-+ */
-+void gemac_enable_stacked_vlan(void *base)
-+{
-+	/* MTIP doesn't support stacked vlan */
-+}
-+
-+/* GEMAC enable pause rx function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_enable_pause_rx(void *base)
-+{
-+	writel(readl(base + EMAC_RCNTRL_REG) | EMAC_RCNTRL_FCE,
-+	       base + EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC disable pause rx function.
-+ * @param[in] base	GEMAC base address
-+ */
-+void gemac_disable_pause_rx(void *base)
-+{
-+	writel(readl(base + EMAC_RCNTRL_REG) & ~EMAC_RCNTRL_FCE,
-+	       base + EMAC_RCNTRL_REG);
-+}
-+
-+/* GEMAC enable pause tx function.
-+ * @param[in] base GEMAC base address
-+ */
-+void gemac_enable_pause_tx(void *base)
-+{
-+	writel(EMAC_RX_SECTION_EMPTY_V, base + EMAC_RX_SECTION_EMPTY);
-+}
-+
-+/* GEMAC disable pause tx function.
-+ * @param[in] base GEMAC base address
-+ */
-+void gemac_disable_pause_tx(void *base)
-+{
-+	writel(0x0, base + EMAC_RX_SECTION_EMPTY);
-+}
-+
-+/* GEMAC wol configuration
-+ * @param[in] base	GEMAC base address
-+ * @param[in] wol_conf	WoL register configuration
-+ */
-+void gemac_set_wol(void *base, u32 wol_conf)
-+{
-+	u32  val = readl(base + EMAC_ECNTRL_REG);
-+
-+	if (wol_conf)
-+		val |= (EMAC_ECNTRL_MAGIC_ENA | EMAC_ECNTRL_SLEEP);
-+	else
-+		val &= ~(EMAC_ECNTRL_MAGIC_ENA | EMAC_ECNTRL_SLEEP);
-+	writel(val, base + EMAC_ECNTRL_REG);
-+}
-+
-+/* Sets Gemac bus width to 64bit
-+ * @param[in] base       GEMAC base address
-+ * @param[in] width     gemac bus width to be set possible values are 32/64/128
-+ */
-+void gemac_set_bus_width(void *base, int width)
-+{
-+}
-+
-+/* Sets Gemac configuration.
-+ * @param[in] base	GEMAC base address
-+ * @param[in] cfg	GEMAC configuration
-+ */
-+void gemac_set_config(void *base, struct gemac_cfg *cfg)
-+{
-+	/*GEMAC config taken from VLSI */
-+	writel(0x00000004, base + EMAC_TFWR_STR_FWD);
-+	writel(0x00000005, base + EMAC_RX_SECTION_FULL);
-+
-+	if (pfe_errata_a010897)
-+		writel(0x0000076c, base + EMAC_TRUNC_FL);
-+	else
-+		writel(0x00003fff, base + EMAC_TRUNC_FL);
-+
-+	writel(0x00000030, base + EMAC_TX_SECTION_EMPTY);
-+	writel(0x00000000, base + EMAC_MIB_CTRL_STS_REG);
-+
-+	gemac_set_mode(base, cfg->mode);
-+
-+	gemac_set_speed(base, cfg->speed);
-+
-+	gemac_set_duplex(base, cfg->duplex);
-+}
-+
-+/**************************** GPI ***************************/
-+
-+/* Initializes a GPI block.
-+ * @param[in] base	GPI base address
-+ * @param[in] cfg	GPI configuration
-+ */
-+void gpi_init(void *base, struct gpi_cfg *cfg)
-+{
-+	gpi_reset(base);
-+
-+	gpi_disable(base);
-+
-+	gpi_set_config(base, cfg);
-+}
-+
-+/* Resets a GPI block.
-+ * @param[in] base	GPI base address
-+ */
-+void gpi_reset(void *base)
-+{
-+	writel(CORE_SW_RESET, base + GPI_CTRL);
-+}
-+
-+/* Enables a GPI block.
-+ * @param[in] base	GPI base address
-+ */
-+void gpi_enable(void *base)
-+{
-+	writel(CORE_ENABLE, base + GPI_CTRL);
-+}
-+
-+/* Disables a GPI block.
-+ * @param[in] base	GPI base address
-+ */
-+void gpi_disable(void *base)
-+{
-+	writel(CORE_DISABLE, base + GPI_CTRL);
-+}
-+
-+/* Sets the configuration of a GPI block.
-+ * @param[in] base	GPI base address
-+ * @param[in] cfg	GPI configuration
-+ */
-+void gpi_set_config(void *base, struct gpi_cfg *cfg)
-+{
-+	writel(CBUS_VIRT_TO_PFE(BMU1_BASE_ADDR + BMU_ALLOC_CTRL),	base
-+		+ GPI_LMEM_ALLOC_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(BMU1_BASE_ADDR + BMU_FREE_CTRL),	base
-+		+ GPI_LMEM_FREE_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(BMU2_BASE_ADDR + BMU_ALLOC_CTRL),	base
-+		+ GPI_DDR_ALLOC_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(BMU2_BASE_ADDR + BMU_FREE_CTRL),	base
-+		+ GPI_DDR_FREE_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(CLASS_INQ_PKTPTR), base + GPI_CLASS_ADDR);
-+	writel(DDR_HDR_SIZE, base + GPI_DDR_DATA_OFFSET);
-+	writel(LMEM_HDR_SIZE, base + GPI_LMEM_DATA_OFFSET);
-+	writel(0, base + GPI_LMEM_SEC_BUF_DATA_OFFSET);
-+	writel(0, base + GPI_DDR_SEC_BUF_DATA_OFFSET);
-+	writel((DDR_HDR_SIZE << 16) |	LMEM_HDR_SIZE,	base + GPI_HDR_SIZE);
-+	writel((DDR_BUF_SIZE << 16) |	LMEM_BUF_SIZE,	base + GPI_BUF_SIZE);
-+
-+	writel(((cfg->lmem_rtry_cnt << 16) | (GPI_DDR_BUF_EN << 1) |
-+		GPI_LMEM_BUF_EN), base + GPI_RX_CONFIG);
-+	writel(cfg->tmlf_txthres, base + GPI_TMLF_TX);
-+	writel(cfg->aseq_len,	base + GPI_DTX_ASEQ);
-+	writel(1, base + GPI_TOE_CHKSUM_EN);
-+
-+	if (cfg->mtip_pause_reg) {
-+		writel(cfg->mtip_pause_reg, base + GPI_CSR_MTIP_PAUSE_REG);
-+		writel(EGPI_PAUSE_TIME, base + GPI_TX_PAUSE_TIME);
-+	}
-+}
-+
-+/**************************** CLASSIFIER ***************************/
-+
-+/* Initializes CLASSIFIER block.
-+ * @param[in] cfg	CLASSIFIER configuration
-+ */
-+void class_init(struct class_cfg *cfg)
-+{
-+	class_reset();
-+
-+	class_disable();
-+
-+	class_set_config(cfg);
-+}
-+
-+/* Resets CLASSIFIER block.
-+ *
-+ */
-+void class_reset(void)
-+{
-+	writel(CORE_SW_RESET, CLASS_TX_CTRL);
-+}
-+
-+/* Enables all CLASS-PE's cores.
-+ *
-+ */
-+void class_enable(void)
-+{
-+	writel(CORE_ENABLE, CLASS_TX_CTRL);
-+}
-+
-+/* Disables all CLASS-PE's cores.
-+ *
-+ */
-+void class_disable(void)
-+{
-+	writel(CORE_DISABLE, CLASS_TX_CTRL);
-+}
-+
-+/*
-+ * Sets the configuration of the CLASSIFIER block.
-+ * @param[in] cfg	CLASSIFIER configuration
-+ */
-+void class_set_config(struct class_cfg *cfg)
-+{
-+	u32 val;
-+
-+	/* Initialize route table */
-+	if (!cfg->resume)
-+		memset(DDR_PHYS_TO_VIRT(cfg->route_table_baseaddr), 0, (1 <<
-+		cfg->route_table_hash_bits) * CLASS_ROUTE_SIZE);
-+
-+#if !defined(LS1012A_PFE_RESET_WA)
-+	writel(cfg->pe_sys_clk_ratio,	CLASS_PE_SYS_CLK_RATIO);
-+#endif
-+
-+	writel((DDR_HDR_SIZE << 16) | LMEM_HDR_SIZE,	CLASS_HDR_SIZE);
-+	writel(LMEM_BUF_SIZE,				CLASS_LMEM_BUF_SIZE);
-+	writel(CLASS_ROUTE_ENTRY_SIZE(CLASS_ROUTE_SIZE) |
-+		CLASS_ROUTE_HASH_SIZE(cfg->route_table_hash_bits),
-+		CLASS_ROUTE_HASH_ENTRY_SIZE);
-+	writel(HIF_PKT_CLASS_EN | HIF_PKT_OFFSET(sizeof(struct hif_hdr)),
-+	       CLASS_HIF_PARSE);
-+
-+	val = HASH_CRC_PORT_IP | QB2BUS_LE;
-+
-+#if defined(CONFIG_IP_ALIGNED)
-+	val |= IP_ALIGNED;
-+#endif
-+
-+	/*
-+	 *  Class PE packet steering will only work if TOE mode, bridge fetch or
-+	 * route fetch are enabled (see class/qb_fet.v). Route fetch would
-+	 * trigger additional memory copies (likely from DDR because of hash
-+	 * table size, which cannot be reduced because PE software still
-+	 * relies on hash value computed in HW), so when not in TOE mode we
-+	 * simply enable HW bridge fetch even though we don't use it.
-+	 */
-+	if (cfg->toe_mode)
-+		val |= CLASS_TOE;
-+	else
-+		val |= HW_BRIDGE_FETCH;
-+
-+	writel(val, CLASS_ROUTE_MULTI);
-+
-+	writel(DDR_PHYS_TO_PFE(cfg->route_table_baseaddr),
-+	       CLASS_ROUTE_TABLE_BASE);
-+	writel(CLASS_PE0_RO_DM_ADDR0_VAL,		CLASS_PE0_RO_DM_ADDR0);
-+	writel(CLASS_PE0_RO_DM_ADDR1_VAL,		CLASS_PE0_RO_DM_ADDR1);
-+	writel(CLASS_PE0_QB_DM_ADDR0_VAL,		CLASS_PE0_QB_DM_ADDR0);
-+	writel(CLASS_PE0_QB_DM_ADDR1_VAL,		CLASS_PE0_QB_DM_ADDR1);
-+	writel(CBUS_VIRT_TO_PFE(TMU_PHY_INQ_PKTPTR),	CLASS_TM_INQ_ADDR);
-+
-+	writel(23, CLASS_AFULL_THRES);
-+	writel(23, CLASS_TSQ_FIFO_THRES);
-+
-+	writel(24, CLASS_MAX_BUF_CNT);
-+	writel(24, CLASS_TSQ_MAX_CNT);
-+}
-+
-+/**************************** TMU ***************************/
-+
-+void tmu_reset(void)
-+{
-+	writel(SW_RESET, TMU_CTRL);
-+}
-+
-+/* Initializes TMU block.
-+ * @param[in] cfg	TMU configuration
-+ */
-+void tmu_init(struct tmu_cfg *cfg)
-+{
-+	int q, phyno;
-+
-+	tmu_disable(0xF);
-+	mdelay(10);
-+
-+#if !defined(LS1012A_PFE_RESET_WA)
-+	/* keep in soft reset */
-+	writel(SW_RESET, TMU_CTRL);
-+#endif
-+	writel(0x3, TMU_SYS_GENERIC_CONTROL);
-+	writel(750, TMU_INQ_WATERMARK);
-+	writel(CBUS_VIRT_TO_PFE(EGPI1_BASE_ADDR +
-+		GPI_INQ_PKTPTR),	TMU_PHY0_INQ_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(EGPI2_BASE_ADDR +
-+		GPI_INQ_PKTPTR),	TMU_PHY1_INQ_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(HGPI_BASE_ADDR +
-+		GPI_INQ_PKTPTR),	TMU_PHY3_INQ_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(HIF_NOCPY_RX_INQ0_PKTPTR), TMU_PHY4_INQ_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(UTIL_INQ_PKTPTR), TMU_PHY5_INQ_ADDR);
-+	writel(CBUS_VIRT_TO_PFE(BMU2_BASE_ADDR + BMU_FREE_CTRL),
-+	       TMU_BMU_INQ_ADDR);
-+
-+	writel(0x3FF,	TMU_TDQ0_SCH_CTRL);	/*
-+						 * enabling all 10
-+						 * schedulers [9:0] of each TDQ
-+						 */
-+	writel(0x3FF,	TMU_TDQ1_SCH_CTRL);
-+	writel(0x3FF,	TMU_TDQ3_SCH_CTRL);
-+
-+#if !defined(LS1012A_PFE_RESET_WA)
-+	writel(cfg->pe_sys_clk_ratio,	TMU_PE_SYS_CLK_RATIO);
-+#endif
-+
-+#if !defined(LS1012A_PFE_RESET_WA)
-+	writel(DDR_PHYS_TO_PFE(cfg->llm_base_addr),	TMU_LLM_BASE_ADDR);
-+	/* Extra packet pointers will be stored from this address onwards */
-+
-+	writel(cfg->llm_queue_len,	TMU_LLM_QUE_LEN);
-+	writel(5,			TMU_TDQ_IIFG_CFG);
-+	writel(DDR_BUF_SIZE,		TMU_BMU_BUF_SIZE);
-+
-+	writel(0x0,			TMU_CTRL);
-+
-+	/* MEM init */
-+	pr_info("%s: mem init\n", __func__);
-+	writel(MEM_INIT,	TMU_CTRL);
-+
-+	while (!(readl(TMU_CTRL) & MEM_INIT_DONE))
-+		;
-+
-+	/* LLM init */
-+	pr_info("%s: lmem init\n", __func__);
-+	writel(LLM_INIT,	TMU_CTRL);
-+
-+	while (!(readl(TMU_CTRL) & LLM_INIT_DONE))
-+		;
-+#endif
-+	/* set up each queue for tail drop */
-+	for (phyno = 0; phyno < 4; phyno++) {
-+		if (phyno == 2)
-+			continue;
-+		for (q = 0; q < 16; q++) {
-+			u32 qdepth;
-+
-+			writel((phyno << 8) | q, TMU_TEQ_CTRL);
-+			writel(1 << 22, TMU_TEQ_QCFG); /*Enable tail drop */
-+
-+			if (phyno == 3)
-+				qdepth = DEFAULT_TMU3_QDEPTH;
-+			else
-+				qdepth = (q == 0) ? DEFAULT_Q0_QDEPTH :
-+						DEFAULT_MAX_QDEPTH;
-+
-+			/* LOG: 68855 */
-+			/*
-+			 * The following is a workaround for the reordered
-+			 * packet and BMU2 buffer leakage issue.
-+			 */
-+			if (CHIP_REVISION() == 0)
-+				qdepth = 31;
-+
-+			writel(qdepth << 18, TMU_TEQ_HW_PROB_CFG2);
-+			writel(qdepth >> 14, TMU_TEQ_HW_PROB_CFG3);
-+		}
-+	}
-+
-+#ifdef CFG_LRO
-+	/* Set TMU-3 queue 5 (LRO) in no-drop mode */
-+	writel((3 << 8) | TMU_QUEUE_LRO, TMU_TEQ_CTRL);
-+	writel(0, TMU_TEQ_QCFG);
-+#endif
-+
-+	writel(0x05, TMU_TEQ_DISABLE_DROPCHK);
-+
-+	writel(0x0, TMU_CTRL);
-+}
-+
-+/* Enables TMU-PE cores.
-+ * @param[in] pe_mask	TMU PE mask
-+ */
-+void tmu_enable(u32 pe_mask)
-+{
-+	writel(readl(TMU_TX_CTRL) | (pe_mask & 0xF), TMU_TX_CTRL);
-+}
-+
-+/* Disables TMU cores.
-+ * @param[in] pe_mask	TMU PE mask
-+ */
-+void tmu_disable(u32 pe_mask)
-+{
-+	writel(readl(TMU_TX_CTRL) & ~(pe_mask & 0xF), TMU_TX_CTRL);
-+}
-+
-+/* This will return the tmu queue status
-+ * @param[in] if_id	gem interface id or TMU index
-+ * @return		returns the bit mask of busy queues, zero means all
-+ * queues are empty
-+ */
-+u32 tmu_qstatus(u32 if_id)
-+{
-+	return cpu_to_be32(pe_dmem_read(TMU0_ID + if_id, TMU_DM_PESTATUS +
-+		offsetof(struct pe_status, tmu_qstatus), 4));
-+}
-+
-+u32 tmu_pkts_processed(u32 if_id)
-+{
-+	return cpu_to_be32(pe_dmem_read(TMU0_ID + if_id, TMU_DM_PESTATUS +
-+		offsetof(struct pe_status, rx), 4));
-+}
-+
-+/**************************** UTIL ***************************/
-+
-+/* Resets UTIL block.
-+ */
-+void util_reset(void)
-+{
-+	writel(CORE_SW_RESET, UTIL_TX_CTRL);
-+}
-+
-+/* Initializes UTIL block.
-+ * @param[in] cfg	UTIL configuration
-+ */
-+void util_init(struct util_cfg *cfg)
-+{
-+	writel(cfg->pe_sys_clk_ratio,   UTIL_PE_SYS_CLK_RATIO);
-+}
-+
-+/* Enables UTIL-PE core.
-+ *
-+ */
-+void util_enable(void)
-+{
-+	writel(CORE_ENABLE, UTIL_TX_CTRL);
-+}
-+
-+/* Disables UTIL-PE core.
-+ *
-+ */
-+void util_disable(void)
-+{
-+	writel(CORE_DISABLE, UTIL_TX_CTRL);
-+}
-+
-+/**************************** HIF ***************************/
-+/* Initializes HIF copy block.
-+ *
-+ */
-+void hif_init(void)
-+{
-+	/*Initialize HIF registers*/
-+	writel((HIF_RX_POLL_CTRL_CYCLE << 16) | HIF_TX_POLL_CTRL_CYCLE,
-+	       HIF_POLL_CTRL);
-+}
-+
-+/* Enable hif tx DMA and interrupt
-+ *
-+ */
-+void hif_tx_enable(void)
-+{
-+	writel(HIF_CTRL_DMA_EN, HIF_TX_CTRL);
-+	writel((readl(HIF_INT_ENABLE) | HIF_INT_EN | HIF_TXPKT_INT_EN),
-+	       HIF_INT_ENABLE);
-+}
-+
-+/* Disable hif tx DMA and interrupt
-+ *
-+ */
-+void hif_tx_disable(void)
-+{
-+	u32	hif_int;
-+
-+	writel(0, HIF_TX_CTRL);
-+
-+	hif_int = readl(HIF_INT_ENABLE);
-+	hif_int &= HIF_TXPKT_INT_EN;
-+	writel(hif_int, HIF_INT_ENABLE);
-+}
-+
-+/* Enable hif rx DMA and interrupt
-+ *
-+ */
-+void hif_rx_enable(void)
-+{
-+	hif_rx_dma_start();
-+	writel((readl(HIF_INT_ENABLE) | HIF_INT_EN | HIF_RXPKT_INT_EN),
-+	       HIF_INT_ENABLE);
-+}
-+
-+/* Disable hif rx DMA and interrupt
-+ *
-+ */
-+void hif_rx_disable(void)
-+{
-+	u32	hif_int;
-+
-+	writel(0, HIF_RX_CTRL);
-+
-+	hif_int = readl(HIF_INT_ENABLE);
-+	hif_int &= HIF_RXPKT_INT_EN;
-+	writel(hif_int, HIF_INT_ENABLE);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hif.c
-@@ -0,0 +1,1063 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/interrupt.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/sched.h>
-+#include <linux/module.h>
-+#include <linux/list.h>
-+#include <linux/kthread.h>
-+#include <linux/slab.h>
-+
-+#include <linux/io.h>
-+#include <asm/irq.h>
-+
-+#include "pfe_mod.h"
-+
-+#define HIF_INT_MASK	(HIF_INT | HIF_RXPKT_INT | HIF_TXPKT_INT)
-+
-+unsigned char napi_first_batch;
-+
-+static void pfe_tx_do_cleanup(unsigned long data);
-+
-+static int pfe_hif_alloc_descr(struct pfe_hif *hif)
-+{
-+	void *addr;
-+	dma_addr_t dma_addr;
-+	int err = 0;
-+
-+	pr_info("%s\n", __func__);
-+	addr = dma_alloc_coherent(pfe->dev,
-+				  HIF_RX_DESC_NT * sizeof(struct hif_desc) +
-+				  HIF_TX_DESC_NT * sizeof(struct hif_desc),
-+				  &dma_addr, GFP_KERNEL);
-+
-+	if (!addr) {
-+		pr_err("%s: Could not allocate buffer descriptors!\n"
-+			, __func__);
-+		err = -ENOMEM;
-+		goto err0;
-+	}
-+
-+	hif->descr_baseaddr_p = dma_addr;
-+	hif->descr_baseaddr_v = addr;
-+	hif->rx_ring_size = HIF_RX_DESC_NT;
-+	hif->tx_ring_size = HIF_TX_DESC_NT;
-+
-+	return 0;
-+
-+err0:
-+	return err;
-+}
-+
-+#if defined(LS1012A_PFE_RESET_WA)
-+static void pfe_hif_disable_rx_desc(struct pfe_hif *hif)
-+{
-+	int ii;
-+	struct hif_desc	*desc = hif->rx_base;
-+
-+	/*Mark all descriptors as LAST_BD */
-+	for (ii = 0; ii < hif->rx_ring_size; ii++) {
-+		desc->ctrl |= BD_CTRL_LAST_BD;
-+		desc++;
-+	}
-+}
-+
-+struct class_rx_hdr_t {
-+	u32     next_ptr;       /* ptr to the start of the first DDR buffer */
-+	u16     length;         /* total packet length */
-+	u16     phyno;          /* input physical port number */
-+	u32     status;         /* gemac status bits */
-+	u32     status2;            /* reserved for software usage */
-+};
-+
-+/* STATUS_BAD_FRAME_ERR is set for all errors (including checksums if enabled)
-+ * except overflow
-+ */
-+#define STATUS_BAD_FRAME_ERR            BIT(16)
-+#define STATUS_LENGTH_ERR               BIT(17)
-+#define STATUS_CRC_ERR                  BIT(18)
-+#define STATUS_TOO_SHORT_ERR            BIT(19)
-+#define STATUS_TOO_LONG_ERR             BIT(20)
-+#define STATUS_CODE_ERR                 BIT(21)
-+#define STATUS_MC_HASH_MATCH            BIT(22)
-+#define STATUS_CUMULATIVE_ARC_HIT       BIT(23)
-+#define STATUS_UNICAST_HASH_MATCH       BIT(24)
-+#define STATUS_IP_CHECKSUM_CORRECT      BIT(25)
-+#define STATUS_TCP_CHECKSUM_CORRECT     BIT(26)
-+#define STATUS_UDP_CHECKSUM_CORRECT     BIT(27)
-+#define STATUS_OVERFLOW_ERR             BIT(28) /* GPI error */
-+#define MIN_PKT_SIZE			64
-+
-+static inline void copy_to_lmem(u32 *dst, u32 *src, int len)
-+{
-+	int i;
-+
-+	for (i = 0; i < len; i += sizeof(u32))	{
-+		*dst = htonl(*src);
-+		dst++; src++;
-+	}
-+}
-+
-+static void send_dummy_pkt_to_hif(void)
-+{
-+	void *lmem_ptr, *ddr_ptr, *lmem_virt_addr;
-+	u32 physaddr;
-+	struct class_rx_hdr_t local_hdr;
-+	static u32 dummy_pkt[] =  {
-+		0x33221100, 0x2b785544, 0xd73093cb, 0x01000608,
-+		0x04060008, 0x2b780200, 0xd73093cb, 0x0a01a8c0,
-+		0x33221100, 0xa8c05544, 0x00000301, 0x00000000,
-+		0x00000000, 0x00000000, 0x00000000, 0xbe86c51f };
-+
-+	ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
-+	if (!ddr_ptr)
-+		return;
-+
-+	lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
-+	if (!lmem_ptr)
-+		return;
-+
-+	pr_info("Sending a dummy pkt to HIF %p %p\n", ddr_ptr, lmem_ptr);
-+	physaddr = (u32)DDR_VIRT_TO_PFE(ddr_ptr);
-+
-+	lmem_virt_addr = (void *)CBUS_PFE_TO_VIRT((unsigned long int)lmem_ptr);
-+
-+	local_hdr.phyno = htons(0); /* RX_PHY_0 */
-+	local_hdr.length = htons(MIN_PKT_SIZE);
-+
-+	local_hdr.next_ptr = htonl((u32)physaddr);
-+	/*Mark checksum is correct */
-+	local_hdr.status = htonl((STATUS_IP_CHECKSUM_CORRECT |
-+				STATUS_UDP_CHECKSUM_CORRECT |
-+				STATUS_TCP_CHECKSUM_CORRECT |
-+				STATUS_UNICAST_HASH_MATCH |
-+				STATUS_CUMULATIVE_ARC_HIT));
-+	local_hdr.status2 = 0;
-+
-+	copy_to_lmem((u32 *)lmem_virt_addr, (u32 *)&local_hdr,
-+		     sizeof(local_hdr));
-+
-+	copy_to_lmem((u32 *)(lmem_virt_addr + LMEM_HDR_SIZE), (u32 *)dummy_pkt,
-+		     0x40);
-+
-+	writel((unsigned long int)lmem_ptr, CLASS_INQ_PKTPTR);
-+}
-+
-+void pfe_hif_rx_idle(struct pfe_hif *hif)
-+{
-+	int hif_stop_loop = 10;
-+	u32 rx_status;
-+
-+	pfe_hif_disable_rx_desc(hif);
-+	pr_info("Bringing hif to idle state...");
-+	writel(0, HIF_INT_ENABLE);
-+	/*If HIF Rx BDP is busy send a dummy packet */
-+	do {
-+		rx_status = readl(HIF_RX_STATUS);
-+		if (rx_status & BDP_CSR_RX_DMA_ACTV)
-+			send_dummy_pkt_to_hif();
-+
-+		usleep_range(100, 150);
-+	} while (--hif_stop_loop);
-+
-+	if (readl(HIF_RX_STATUS) & BDP_CSR_RX_DMA_ACTV)
-+		pr_info("Failed\n");
-+	else
-+		pr_info("Done\n");
-+}
-+#endif
-+
-+static void pfe_hif_free_descr(struct pfe_hif *hif)
-+{
-+	pr_info("%s\n", __func__);
-+
-+	dma_free_coherent(pfe->dev,
-+			  hif->rx_ring_size * sizeof(struct hif_desc) +
-+			  hif->tx_ring_size * sizeof(struct hif_desc),
-+			  hif->descr_baseaddr_v, hif->descr_baseaddr_p);
-+}
-+
-+void pfe_hif_desc_dump(struct pfe_hif *hif)
-+{
-+	struct hif_desc	*desc;
-+	unsigned long desc_p;
-+	int ii = 0;
-+
-+	pr_info("%s\n", __func__);
-+
-+	desc = hif->rx_base;
-+	desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
-+			hif->descr_baseaddr_p);
-+
-+	pr_info("HIF Rx desc base %p physical %x\n", desc, (u32)desc_p);
-+	for (ii = 0; ii < hif->rx_ring_size; ii++) {
-+		pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
-+			readl(&desc->status), readl(&desc->ctrl),
-+			readl(&desc->data), readl(&desc->next));
-+			desc++;
-+	}
-+
-+	desc = hif->tx_base;
-+	desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
-+			hif->descr_baseaddr_p);
-+
-+	pr_info("HIF Tx desc base %p physical %x\n", desc, (u32)desc_p);
-+	for (ii = 0; ii < hif->tx_ring_size; ii++) {
-+		pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
-+			readl(&desc->status), readl(&desc->ctrl),
-+			readl(&desc->data), readl(&desc->next));
-+		desc++;
-+	}
-+}
-+
-+/* pfe_hif_release_buffers */
-+static void pfe_hif_release_buffers(struct pfe_hif *hif)
-+{
-+	struct hif_desc	*desc;
-+	int i = 0;
-+
-+	hif->rx_base = hif->descr_baseaddr_v;
-+
-+	pr_info("%s\n", __func__);
-+
-+	/*Free Rx buffers */
-+	desc = hif->rx_base;
-+	for (i = 0; i < hif->rx_ring_size; i++) {
-+		if (readl(&desc->data)) {
-+			if ((i < hif->shm->rx_buf_pool_cnt) &&
-+			    (!hif->shm->rx_buf_pool[i])) {
-+				/*
-+				 * dma_unmap_single(hif->dev, desc->data,
-+				 * hif->rx_buf_len[i], DMA_FROM_DEVICE);
-+				 */
-+				dma_unmap_single(hif->dev,
-+						 DDR_PFE_TO_PHYS(
-+						 readl(&desc->data)),
-+						 hif->rx_buf_len[i],
-+						 DMA_FROM_DEVICE);
-+				hif->shm->rx_buf_pool[i] = hif->rx_buf_addr[i];
-+			} else {
-+				pr_err("%s: buffer pool already full\n"
-+					, __func__);
-+			}
-+		}
-+
-+		writel(0, &desc->data);
-+		writel(0, &desc->status);
-+		writel(0, &desc->ctrl);
-+		desc++;
-+	}
-+}
-+
-+/*
-+ * pfe_hif_init_buffers
-+ * This function initializes the HIF Rx/Tx ring descriptors and
-+ * initialize Rx queue with buffers.
-+ */
-+static int pfe_hif_init_buffers(struct pfe_hif *hif)
-+{
-+	struct hif_desc	*desc, *first_desc_p;
-+	u32 data;
-+	int i = 0;
-+
-+	pr_info("%s\n", __func__);
-+
-+	/* Check enough Rx buffers available in the shared memory */
-+	if (hif->shm->rx_buf_pool_cnt < hif->rx_ring_size)
-+		return -ENOMEM;
-+
-+	hif->rx_base = hif->descr_baseaddr_v;
-+	memset(hif->rx_base, 0, hif->rx_ring_size * sizeof(struct hif_desc));
-+
-+	/*Initialize Rx descriptors */
-+	desc = hif->rx_base;
-+	first_desc_p = (struct hif_desc *)hif->descr_baseaddr_p;
-+
-+	for (i = 0; i < hif->rx_ring_size; i++) {
-+		/* Initialize Rx buffers from the shared memory */
-+
-+		data = (u32)dma_map_single(hif->dev, hif->shm->rx_buf_pool[i],
-+				pfe_pkt_size, DMA_FROM_DEVICE);
-+		hif->rx_buf_addr[i] = hif->shm->rx_buf_pool[i];
-+		hif->rx_buf_len[i] = pfe_pkt_size;
-+		hif->shm->rx_buf_pool[i] = NULL;
-+
-+		if (likely(dma_mapping_error(hif->dev, data) == 0)) {
-+			writel(DDR_PHYS_TO_PFE(data), &desc->data);
-+		} else {
-+			pr_err("%s : low on mem\n",  __func__);
-+
-+			goto err;
-+		}
-+
-+		writel(0, &desc->status);
-+
-+		/*
-+		 * Ensure everything else is written to DDR before
-+		 * writing bd->ctrl
-+		 */
-+		wmb();
-+
-+		writel((BD_CTRL_PKT_INT_EN | BD_CTRL_LIFM
-+			| BD_CTRL_DIR | BD_CTRL_DESC_EN
-+			| BD_BUF_LEN(pfe_pkt_size)), &desc->ctrl);
-+
-+		/* Chain descriptors */
-+		writel((u32)DDR_PHYS_TO_PFE(first_desc_p + i + 1), &desc->next);
-+		desc++;
-+	}
-+
-+	/* Overwrite last descriptor to chain it to first one*/
-+	desc--;
-+	writel((u32)DDR_PHYS_TO_PFE(first_desc_p), &desc->next);
-+
-+	hif->rxtoclean_index = 0;
-+
-+	/*Initialize Rx buffer descriptor ring base address */
-+	writel(DDR_PHYS_TO_PFE(hif->descr_baseaddr_p), HIF_RX_BDP_ADDR);
-+
-+	hif->tx_base = hif->rx_base + hif->rx_ring_size;
-+	first_desc_p = (struct hif_desc *)hif->descr_baseaddr_p +
-+				hif->rx_ring_size;
-+	memset(hif->tx_base, 0, hif->tx_ring_size * sizeof(struct hif_desc));
-+
-+	/*Initialize tx descriptors */
-+	desc = hif->tx_base;
-+
-+	for (i = 0; i < hif->tx_ring_size; i++) {
-+		/* Chain descriptors */
-+		writel((u32)DDR_PHYS_TO_PFE(first_desc_p + i + 1), &desc->next);
-+		writel(0, &desc->ctrl);
-+		desc++;
-+	}
-+
-+	/* Overwrite last descriptor to chain it to first one */
-+	desc--;
-+	writel((u32)DDR_PHYS_TO_PFE(first_desc_p), &desc->next);
-+	hif->txavail = hif->tx_ring_size;
-+	hif->txtosend = 0;
-+	hif->txtoclean = 0;
-+	hif->txtoflush = 0;
-+
-+	/*Initialize Tx buffer descriptor ring base address */
-+	writel((u32)DDR_PHYS_TO_PFE(first_desc_p), HIF_TX_BDP_ADDR);
-+
-+	return 0;
-+
-+err:
-+	pfe_hif_release_buffers(hif);
-+	return -ENOMEM;
-+}
-+
-+/*
-+ * pfe_hif_client_register
-+ *
-+ * This function used to register a client driver with the HIF driver.
-+ *
-+ * Return value:
-+ * 0 - on Successful registration
-+ */
-+static int pfe_hif_client_register(struct pfe_hif *hif, u32 client_id,
-+				   struct hif_client_shm *client_shm)
-+{
-+	struct hif_client *client = &hif->client[client_id];
-+	u32 i, cnt;
-+	struct rx_queue_desc *rx_qbase;
-+	struct tx_queue_desc *tx_qbase;
-+	struct hif_rx_queue *rx_queue;
-+	struct hif_tx_queue *tx_queue;
-+	int err = 0;
-+
-+	pr_info("%s\n", __func__);
-+
-+	spin_lock_bh(&hif->tx_lock);
-+
-+	if (test_bit(client_id, &hif->shm->g_client_status[0])) {
-+		pr_err("%s: client %d already registered\n",
-+		       __func__, client_id);
-+		err = -1;
-+		goto unlock;
-+	}
-+
-+	memset(client, 0, sizeof(struct hif_client));
-+
-+	/* Initialize client Rx queues baseaddr, size */
-+
-+	cnt = CLIENT_CTRL_RX_Q_CNT(client_shm->ctrl);
-+	/* Check if client is requesting for more queues than supported */
-+	if (cnt > HIF_CLIENT_QUEUES_MAX)
-+		cnt = HIF_CLIENT_QUEUES_MAX;
-+
-+	client->rx_qn = cnt;
-+	rx_qbase = (struct rx_queue_desc *)client_shm->rx_qbase;
-+	for (i = 0; i < cnt; i++) {
-+		rx_queue = &client->rx_q[i];
-+		rx_queue->base = rx_qbase + i * client_shm->rx_qsize;
-+		rx_queue->size = client_shm->rx_qsize;
-+		rx_queue->write_idx = 0;
-+	}
-+
-+	/* Initialize client Tx queues baseaddr, size */
-+	cnt = CLIENT_CTRL_TX_Q_CNT(client_shm->ctrl);
-+
-+	/* Check if client is requesting for more queues than supported */
-+	if (cnt > HIF_CLIENT_QUEUES_MAX)
-+		cnt = HIF_CLIENT_QUEUES_MAX;
-+
-+	client->tx_qn = cnt;
-+	tx_qbase = (struct tx_queue_desc *)client_shm->tx_qbase;
-+	for (i = 0; i < cnt; i++) {
-+		tx_queue = &client->tx_q[i];
-+		tx_queue->base = tx_qbase + i * client_shm->tx_qsize;
-+		tx_queue->size = client_shm->tx_qsize;
-+		tx_queue->ack_idx = 0;
-+	}
-+
-+	set_bit(client_id, &hif->shm->g_client_status[0]);
-+
-+unlock:
-+	spin_unlock_bh(&hif->tx_lock);
-+
-+	return err;
-+}
-+
-+/*
-+ * pfe_hif_client_unregister
-+ *
-+ * This function used to unregister a client  from the HIF driver.
-+ *
-+ */
-+static void pfe_hif_client_unregister(struct pfe_hif *hif, u32 client_id)
-+{
-+	pr_info("%s\n", __func__);
-+
-+	/*
-+	 * Mark client as no longer available (which prevents further packet
-+	 * receive for this client)
-+	 */
-+	spin_lock_bh(&hif->tx_lock);
-+
-+	if (!test_bit(client_id, &hif->shm->g_client_status[0])) {
-+		pr_err("%s: client %d not registered\n", __func__,
-+		       client_id);
-+
-+		spin_unlock_bh(&hif->tx_lock);
-+		return;
-+	}
-+
-+	clear_bit(client_id, &hif->shm->g_client_status[0]);
-+
-+	spin_unlock_bh(&hif->tx_lock);
-+}
-+
-+/*
-+ * client_put_rxpacket-
-+ * This functions puts the Rx pkt  in the given client Rx queue.
-+ * It actually swap the Rx pkt in the client Rx descriptor buffer
-+ * and returns the free buffer from it.
-+ *
-+ * If the function returns NULL means client Rx queue is full and
-+ * packet couldn't send to client queue.
-+ */
-+static void *client_put_rxpacket(struct hif_rx_queue *queue, void *pkt, u32 len,
-+				 u32 flags, u32 client_ctrl, u32 *rem_len)
-+{
-+	void *free_pkt = NULL;
-+	struct rx_queue_desc *desc = queue->base + queue->write_idx;
-+
-+	if (readl(&desc->ctrl) & CL_DESC_OWN) {
-+		if (page_mode) {
-+			int rem_page_size = PAGE_SIZE -
-+					PRESENT_OFST_IN_PAGE(pkt);
-+			int cur_pkt_size = ROUND_MIN_RX_SIZE(len +
-+					pfe_pkt_headroom);
-+			*rem_len = (rem_page_size - cur_pkt_size);
-+			if (*rem_len) {
-+				free_pkt = pkt + cur_pkt_size;
-+				get_page(virt_to_page(free_pkt));
-+			} else {
-+				free_pkt = (void
-+				*)__get_free_page(GFP_ATOMIC | GFP_DMA_PFE);
-+				*rem_len = pfe_pkt_size;
-+			}
-+		} else {
-+			free_pkt = kmalloc(PFE_BUF_SIZE, GFP_ATOMIC |
-+					GFP_DMA_PFE);
-+			*rem_len = PFE_BUF_SIZE - pfe_pkt_headroom;
-+		}
-+
-+		if (free_pkt) {
-+			desc->data = pkt;
-+			desc->client_ctrl = client_ctrl;
-+			/*
-+			 * Ensure everything else is written to DDR before
-+			 * writing bd->ctrl
-+			 */
-+			smp_wmb();
-+			writel(CL_DESC_BUF_LEN(len) | flags, &desc->ctrl);
-+			queue->write_idx = (queue->write_idx + 1)
-+					    & (queue->size - 1);
-+
-+			free_pkt += pfe_pkt_headroom;
-+		}
-+	}
-+
-+	return free_pkt;
-+}
-+
-+/*
-+ * pfe_hif_rx_process-
-+ * This function does pfe hif rx queue processing.
-+ * Dequeue packet from Rx queue and send it to corresponding client queue
-+ */
-+static int pfe_hif_rx_process(struct pfe_hif *hif, int budget)
-+{
-+	struct hif_desc	*desc;
-+	struct hif_hdr *pkt_hdr;
-+	struct __hif_hdr hif_hdr;
-+	void *free_buf;
-+	int rtc, len, rx_processed = 0;
-+	struct __hif_desc local_desc;
-+	int flags;
-+	unsigned int desc_p;
-+	unsigned int buf_size = 0;
-+
-+	spin_lock_bh(&hif->lock);
-+
-+	rtc = hif->rxtoclean_index;
-+
-+	while (rx_processed < budget) {
-+		desc = hif->rx_base + rtc;
-+
-+		__memcpy12(&local_desc, desc);
-+
-+		/* ACK pending Rx interrupt */
-+		if (local_desc.ctrl & BD_CTRL_DESC_EN) {
-+			writel(HIF_INT | HIF_RXPKT_INT, HIF_INT_SRC);
-+
-+			if (rx_processed == 0) {
-+				if (napi_first_batch == 1) {
-+					desc_p = hif->descr_baseaddr_p +
-+					((unsigned long int)(desc) -
-+					(unsigned long
-+					int)hif->descr_baseaddr_v);
-+					napi_first_batch = 0;
-+				}
-+			}
-+
-+			__memcpy12(&local_desc, desc);
-+
-+			if (local_desc.ctrl & BD_CTRL_DESC_EN)
-+				break;
-+		}
-+
-+		napi_first_batch = 0;
-+
-+#ifdef HIF_NAPI_STATS
-+		hif->napi_counters[NAPI_DESC_COUNT]++;
-+#endif
-+		len = BD_BUF_LEN(local_desc.ctrl);
-+		/*
-+		 * dma_unmap_single(hif->dev, DDR_PFE_TO_PHYS(local_desc.data),
-+		 * hif->rx_buf_len[rtc], DMA_FROM_DEVICE);
-+		 */
-+		dma_unmap_single(hif->dev, DDR_PFE_TO_PHYS(local_desc.data),
-+				 hif->rx_buf_len[rtc], DMA_FROM_DEVICE);
-+
-+		pkt_hdr = (struct hif_hdr *)hif->rx_buf_addr[rtc];
-+
-+		/* Track last HIF header received */
-+		if (!hif->started) {
-+			hif->started = 1;
-+
-+			__memcpy8(&hif_hdr, pkt_hdr);
-+
-+			hif->qno = hif_hdr.hdr.q_num;
-+			hif->client_id = hif_hdr.hdr.client_id;
-+			hif->client_ctrl = (hif_hdr.hdr.client_ctrl1 << 16) |
-+						hif_hdr.hdr.client_ctrl;
-+			flags = CL_DESC_FIRST;
-+
-+		} else {
-+			flags = 0;
-+		}
-+
-+		if (local_desc.ctrl & BD_CTRL_LIFM)
-+			flags |= CL_DESC_LAST;
-+
-+		/* Check for valid client id and still registered */
-+		if ((hif->client_id >= HIF_CLIENTS_MAX) ||
-+		    !(test_bit(hif->client_id,
-+			&hif->shm->g_client_status[0]))) {
-+			printk_ratelimited("%s: packet with invalid client id %d q_num %d\n",
-+					   __func__,
-+					   hif->client_id,
-+					   hif->qno);
-+
-+			free_buf = pkt_hdr;
-+
-+			goto pkt_drop;
-+		}
-+
-+		/* Check to valid queue number */
-+		if (hif->client[hif->client_id].rx_qn <= hif->qno) {
-+			pr_info("%s: packet with invalid queue: %d\n"
-+				, __func__, hif->qno);
-+			hif->qno = 0;
-+		}
-+
-+		free_buf =
-+		client_put_rxpacket(&hif->client[hif->client_id].rx_q[hif->qno],
-+				    (void *)pkt_hdr, len, flags,
-+			hif->client_ctrl, &buf_size);
-+
-+		hif_lib_indicate_client(hif->client_id, EVENT_RX_PKT_IND,
-+					hif->qno);
-+
-+		if (unlikely(!free_buf)) {
-+#ifdef HIF_NAPI_STATS
-+			hif->napi_counters[NAPI_CLIENT_FULL_COUNT]++;
-+#endif
-+			/*
-+			 * If we want to keep in polling mode to retry later,
-+			 * we need to tell napi that we consumed
-+			 * the full budget or we will hit a livelock scenario.
-+			 * The core code keeps this napi instance
-+			 * at the head of the list and none of the other
-+			 * instances get to run
-+			 */
-+			rx_processed = budget;
-+
-+			if (flags & CL_DESC_FIRST)
-+				hif->started = 0;
-+
-+			break;
-+		}
-+
-+pkt_drop:
-+		/*Fill free buffer in the descriptor */
-+		hif->rx_buf_addr[rtc] = free_buf;
-+		hif->rx_buf_len[rtc] = min(pfe_pkt_size, buf_size);
-+		writel((DDR_PHYS_TO_PFE
-+			((u32)dma_map_single(hif->dev,
-+			free_buf, hif->rx_buf_len[rtc], DMA_FROM_DEVICE))),
-+			&desc->data);
-+		/*
-+		 * Ensure everything else is written to DDR before
-+		 * writing bd->ctrl
-+		 */
-+		wmb();
-+		writel((BD_CTRL_PKT_INT_EN | BD_CTRL_LIFM | BD_CTRL_DIR |
-+			BD_CTRL_DESC_EN | BD_BUF_LEN(hif->rx_buf_len[rtc])),
-+			&desc->ctrl);
-+
-+		rtc = (rtc + 1) & (hif->rx_ring_size - 1);
-+
-+		if (local_desc.ctrl & BD_CTRL_LIFM) {
-+			if (!(hif->client_ctrl & HIF_CTRL_RX_CONTINUED)) {
-+				rx_processed++;
-+
-+#ifdef HIF_NAPI_STATS
-+				hif->napi_counters[NAPI_PACKET_COUNT]++;
-+#endif
-+			}
-+			hif->started = 0;
-+		}
-+	}
-+
-+	hif->rxtoclean_index = rtc;
-+	spin_unlock_bh(&hif->lock);
-+
-+	/* we made some progress, re-start rx dma in case it stopped */
-+	hif_rx_dma_start();
-+
-+	return rx_processed;
-+}
-+
-+/*
-+ * client_ack_txpacket-
-+ * This function ack the Tx packet in the give client Tx queue by resetting
-+ * ownership bit in the descriptor.
-+ */
-+static int client_ack_txpacket(struct pfe_hif *hif, unsigned int client_id,
-+			       unsigned int q_no)
-+{
-+	struct hif_tx_queue *queue = &hif->client[client_id].tx_q[q_no];
-+	struct tx_queue_desc *desc = queue->base + queue->ack_idx;
-+
-+	if (readl(&desc->ctrl) & CL_DESC_OWN) {
-+		writel((readl(&desc->ctrl) & ~CL_DESC_OWN), &desc->ctrl);
-+		queue->ack_idx = (queue->ack_idx + 1) & (queue->size - 1);
-+
-+		return 0;
-+
-+	} else {
-+		/*This should not happen */
-+		pr_err("%s: %d %d %d %d %d %p %d\n", __func__,
-+		       hif->txtosend, hif->txtoclean, hif->txavail,
-+			client_id, q_no, queue, queue->ack_idx);
-+		WARN(1, "%s: doesn't own this descriptor", __func__);
-+		return 1;
-+	}
-+}
-+
-+void __hif_tx_done_process(struct pfe_hif *hif, int count)
-+{
-+	struct hif_desc *desc;
-+	struct hif_desc_sw *desc_sw;
-+	int ttc, tx_avl;
-+	int pkts_done[HIF_CLIENTS_MAX] = {0, 0};
-+
-+	ttc = hif->txtoclean;
-+	tx_avl = hif->txavail;
-+
-+	while ((tx_avl < hif->tx_ring_size) && count--) {
-+		desc = hif->tx_base + ttc;
-+
-+		if (readl(&desc->ctrl) & BD_CTRL_DESC_EN)
-+			break;
-+
-+		desc_sw = &hif->tx_sw_queue[ttc];
-+
-+		if (desc_sw->data) {
-+			/*
-+			 * dmap_unmap_single(hif->dev, desc_sw->data,
-+			 * desc_sw->len, DMA_TO_DEVICE);
-+			 */
-+			dma_unmap_single(hif->dev, desc_sw->data,
-+					 desc_sw->len, DMA_TO_DEVICE);
-+		}
-+
-+		if (desc_sw->client_id >= HIF_CLIENTS_MAX) {
-+			pr_err("Invalid cl id %d\n", desc_sw->client_id);
-+			break;
-+		}
-+
-+		pkts_done[desc_sw->client_id]++;
-+
-+		client_ack_txpacket(hif, desc_sw->client_id, desc_sw->q_no);
-+
-+		ttc = (ttc + 1) & (hif->tx_ring_size - 1);
-+		tx_avl++;
-+	}
-+
-+	if (pkts_done[0])
-+		hif_lib_indicate_client(0, EVENT_TXDONE_IND, 0);
-+	if (pkts_done[1])
-+		hif_lib_indicate_client(1, EVENT_TXDONE_IND, 0);
-+
-+	hif->txtoclean = ttc;
-+	hif->txavail = tx_avl;
-+
-+	if (!count) {
-+		tasklet_schedule(&hif->tx_cleanup_tasklet);
-+	} else {
-+		/*Enable Tx done interrupt */
-+		writel(readl_relaxed(HIF_INT_ENABLE) | HIF_TXPKT_INT,
-+		       HIF_INT_ENABLE);
-+	}
-+}
-+
-+static void pfe_tx_do_cleanup(unsigned long data)
-+{
-+	struct pfe_hif *hif = (struct pfe_hif *)data;
-+
-+	writel(HIF_INT | HIF_TXPKT_INT, HIF_INT_SRC);
-+
-+	hif_tx_done_process(hif, 64);
-+}
-+
-+/*
-+ * __hif_xmit_pkt -
-+ * This function puts one packet in the HIF Tx queue
-+ */
-+void __hif_xmit_pkt(struct pfe_hif *hif, unsigned int client_id, unsigned int
-+			q_no, void *data, u32 len, unsigned int flags)
-+{
-+	struct hif_desc	*desc;
-+	struct hif_desc_sw *desc_sw;
-+
-+	desc = hif->tx_base + hif->txtosend;
-+	desc_sw = &hif->tx_sw_queue[hif->txtosend];
-+
-+	desc_sw->len = len;
-+	desc_sw->client_id = client_id;
-+	desc_sw->q_no = q_no;
-+	desc_sw->flags = flags;
-+
-+	if (flags & HIF_DONT_DMA_MAP) {
-+		desc_sw->data = 0;
-+		writel((u32)DDR_PHYS_TO_PFE(data), &desc->data);
-+	} else {
-+		desc_sw->data = dma_map_single(hif->dev, data, len,
-+						DMA_TO_DEVICE);
-+		writel((u32)DDR_PHYS_TO_PFE(desc_sw->data), &desc->data);
-+	}
-+
-+	hif->txtosend = (hif->txtosend + 1) & (hif->tx_ring_size - 1);
-+	hif->txavail--;
-+
-+	if ((!((flags & HIF_DATA_VALID) && (flags &
-+				HIF_LAST_BUFFER))))
-+		goto skip_tx;
-+
-+	/*
-+	 * Ensure everything else is written to DDR before
-+	 * writing bd->ctrl
-+	 */
-+	wmb();
-+
-+	do {
-+		desc_sw = &hif->tx_sw_queue[hif->txtoflush];
-+		desc = hif->tx_base + hif->txtoflush;
-+
-+		if (desc_sw->flags & HIF_LAST_BUFFER) {
-+			writel((BD_CTRL_LIFM |
-+			       BD_CTRL_BRFETCH_DISABLE | BD_CTRL_RTFETCH_DISABLE
-+			       | BD_CTRL_PARSE_DISABLE | BD_CTRL_DESC_EN |
-+				BD_CTRL_PKT_INT_EN | BD_BUF_LEN(desc_sw->len)),
-+				&desc->ctrl);
-+		} else {
-+			writel((BD_CTRL_DESC_EN |
-+				BD_BUF_LEN(desc_sw->len)), &desc->ctrl);
-+		}
-+		hif->txtoflush = (hif->txtoflush + 1) & (hif->tx_ring_size - 1);
-+	}
-+	while (hif->txtoflush != hif->txtosend)
-+		;
-+
-+skip_tx:
-+	return;
-+}
-+
-+static irqreturn_t wol_isr(int irq, void *dev_id)
-+{
-+	pr_info("WoL\n");
-+	gemac_set_wol(EMAC1_BASE_ADDR, 0);
-+	gemac_set_wol(EMAC2_BASE_ADDR, 0);
-+	return IRQ_HANDLED;
-+}
-+
-+/*
-+ * hif_isr-
-+ * This ISR routine processes Rx/Tx done interrupts from the HIF hardware block
-+ */
-+static irqreturn_t hif_isr(int irq, void *dev_id)
-+{
-+	struct pfe_hif *hif = (struct pfe_hif *)dev_id;
-+	int int_status;
-+	int int_enable_mask;
-+
-+	/*Read hif interrupt source register */
-+	int_status = readl_relaxed(HIF_INT_SRC);
-+	int_enable_mask = readl_relaxed(HIF_INT_ENABLE);
-+
-+	if ((int_status & HIF_INT) == 0)
-+		return IRQ_NONE;
-+
-+	int_status &= ~(HIF_INT);
-+
-+	if (int_status & HIF_RXPKT_INT) {
-+		int_status &= ~(HIF_RXPKT_INT);
-+		int_enable_mask &= ~(HIF_RXPKT_INT);
-+
-+		napi_first_batch = 1;
-+
-+		if (napi_schedule_prep(&hif->napi)) {
-+#ifdef HIF_NAPI_STATS
-+			hif->napi_counters[NAPI_SCHED_COUNT]++;
-+#endif
-+			__napi_schedule(&hif->napi);
-+		}
-+	}
-+
-+	if (int_status & HIF_TXPKT_INT) {
-+		int_status &= ~(HIF_TXPKT_INT);
-+		int_enable_mask &= ~(HIF_TXPKT_INT);
-+		/*Schedule tx cleanup tassklet */
-+		tasklet_schedule(&hif->tx_cleanup_tasklet);
-+	}
-+
-+	/*Disable interrupts, they will be enabled after they are serviced */
-+	writel_relaxed(int_enable_mask, HIF_INT_ENABLE);
-+
-+	if (int_status) {
-+		pr_info("%s : Invalid interrupt : %d\n", __func__,
-+			int_status);
-+		writel(int_status, HIF_INT_SRC);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+void hif_process_client_req(struct pfe_hif *hif, int req, int data1, int data2)
-+{
-+	unsigned int client_id = data1;
-+
-+	if (client_id >= HIF_CLIENTS_MAX) {
-+		pr_err("%s: client id %d out of bounds\n", __func__,
-+		       client_id);
-+		return;
-+	}
-+
-+	switch (req) {
-+	case REQUEST_CL_REGISTER:
-+			/* Request for register a client */
-+			pr_info("%s: register client_id %d\n",
-+				__func__, client_id);
-+			pfe_hif_client_register(hif, client_id, (struct
-+				hif_client_shm *)&hif->shm->client[client_id]);
-+			break;
-+
-+	case REQUEST_CL_UNREGISTER:
-+			pr_info("%s: unregister client_id %d\n",
-+				__func__, client_id);
-+
-+			/* Request for unregister a client */
-+			pfe_hif_client_unregister(hif, client_id);
-+
-+			break;
-+
-+	default:
-+			pr_err("%s: unsupported request %d\n",
-+			       __func__, req);
-+			break;
-+	}
-+
-+	/*
-+	 * Process client Tx queues
-+	 * Currently we don't have checking for tx pending
-+	 */
-+}
-+
-+/*
-+ * pfe_hif_rx_poll
-+ *  This function is NAPI poll function to process HIF Rx queue.
-+ */
-+static int pfe_hif_rx_poll(struct napi_struct *napi, int budget)
-+{
-+	struct pfe_hif *hif = container_of(napi, struct pfe_hif, napi);
-+	int work_done;
-+
-+#ifdef HIF_NAPI_STATS
-+	hif->napi_counters[NAPI_POLL_COUNT]++;
-+#endif
-+
-+	work_done = pfe_hif_rx_process(hif, budget);
-+
-+	if (work_done < budget) {
-+		napi_complete(napi);
-+		writel(readl_relaxed(HIF_INT_ENABLE) | HIF_RXPKT_INT,
-+		       HIF_INT_ENABLE);
-+	}
-+#ifdef HIF_NAPI_STATS
-+	else
-+		hif->napi_counters[NAPI_FULL_BUDGET_COUNT]++;
-+#endif
-+
-+	return work_done;
-+}
-+
-+/*
-+ * pfe_hif_init
-+ * This function initializes the baseaddresses and irq, etc.
-+ */
-+int pfe_hif_init(struct pfe *pfe)
-+{
-+	struct pfe_hif *hif = &pfe->hif;
-+	int err;
-+
-+	pr_info("%s\n", __func__);
-+
-+	hif->dev = pfe->dev;
-+	hif->irq = pfe->hif_irq;
-+
-+	err = pfe_hif_alloc_descr(hif);
-+	if (err)
-+		goto err0;
-+
-+	if (pfe_hif_init_buffers(hif)) {
-+		pr_err("%s: Could not initialize buffer descriptors\n"
-+			, __func__);
-+		err = -ENOMEM;
-+		goto err1;
-+	}
-+
-+	/* Initialize NAPI for Rx processing */
-+	init_dummy_netdev(&hif->dummy_dev);
-+	netif_napi_add(&hif->dummy_dev, &hif->napi, pfe_hif_rx_poll);
-+	napi_enable(&hif->napi);
-+
-+	spin_lock_init(&hif->tx_lock);
-+	spin_lock_init(&hif->lock);
-+
-+	hif_init();
-+	hif_rx_enable();
-+	hif_tx_enable();
-+
-+	/* Disable tx done interrupt */
-+	writel(HIF_INT_MASK, HIF_INT_ENABLE);
-+
-+	gpi_enable(HGPI_BASE_ADDR);
-+
-+	err = request_irq(hif->irq, hif_isr, 0, "pfe_hif", hif);
-+	if (err) {
-+		pr_err("%s: failed to get the hif IRQ = %d\n",
-+		       __func__, hif->irq);
-+		goto err1;
-+	}
-+
-+	err = request_irq(pfe->wol_irq, wol_isr, 0, "pfe_wol", pfe);
-+	if (err) {
-+		pr_err("%s: failed to get the wol IRQ = %d\n",
-+		       __func__, pfe->wol_irq);
-+		goto err1;
-+	}
-+
-+	tasklet_init(&hif->tx_cleanup_tasklet,
-+		     (void(*)(unsigned long))pfe_tx_do_cleanup,
-+		     (unsigned long)hif);
-+
-+	return 0;
-+err1:
-+	pfe_hif_free_descr(hif);
-+err0:
-+	return err;
-+}
-+
-+/* pfe_hif_exit- */
-+void pfe_hif_exit(struct pfe *pfe)
-+{
-+	struct pfe_hif *hif = &pfe->hif;
-+
-+	pr_info("%s\n", __func__);
-+
-+	tasklet_kill(&hif->tx_cleanup_tasklet);
-+
-+	spin_lock_bh(&hif->lock);
-+	hif->shm->g_client_status[0] = 0;
-+	/* Make sure all clients are disabled*/
-+	hif->shm->g_client_status[1] = 0;
-+
-+	spin_unlock_bh(&hif->lock);
-+
-+	/*Disable Rx/Tx */
-+	gpi_disable(HGPI_BASE_ADDR);
-+	hif_rx_disable();
-+	hif_tx_disable();
-+
-+	napi_disable(&hif->napi);
-+	netif_napi_del(&hif->napi);
-+
-+	free_irq(pfe->wol_irq, pfe);
-+	free_irq(hif->irq, hif);
-+
-+	pfe_hif_release_buffers(hif);
-+	pfe_hif_free_descr(hif);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hif.h
-@@ -0,0 +1,199 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_HIF_H_
-+#define _PFE_HIF_H_
-+
-+#include <linux/netdevice.h>
-+
-+#define HIF_NAPI_STATS
-+
-+#define HIF_CLIENT_QUEUES_MAX	16
-+#define HIF_RX_POLL_WEIGHT	64
-+
-+#define HIF_RX_PKT_MIN_SIZE 0x800 /* 2KB */
-+#define HIF_RX_PKT_MIN_SIZE_MASK ~(HIF_RX_PKT_MIN_SIZE - 1)
-+#define ROUND_MIN_RX_SIZE(_sz) (((_sz) + (HIF_RX_PKT_MIN_SIZE - 1)) \
-+					& HIF_RX_PKT_MIN_SIZE_MASK)
-+#define PRESENT_OFST_IN_PAGE(_buf) (((unsigned long int)(_buf) & (PAGE_SIZE \
-+					- 1)) & HIF_RX_PKT_MIN_SIZE_MASK)
-+
-+enum {
-+	NAPI_SCHED_COUNT = 0,
-+	NAPI_POLL_COUNT,
-+	NAPI_PACKET_COUNT,
-+	NAPI_DESC_COUNT,
-+	NAPI_FULL_BUDGET_COUNT,
-+	NAPI_CLIENT_FULL_COUNT,
-+	NAPI_MAX_COUNT
-+};
-+
-+/*
-+ * HIF_TX_DESC_NT value should be always greter than 4,
-+ * Otherwise HIF_TX_POLL_MARK will become zero.
-+ */
-+#define HIF_RX_DESC_NT		256
-+#define HIF_TX_DESC_NT		2048
-+
-+#define HIF_FIRST_BUFFER	BIT(0)
-+#define HIF_LAST_BUFFER		BIT(1)
-+#define HIF_DONT_DMA_MAP	BIT(2)
-+#define HIF_DATA_VALID		BIT(3)
-+#define HIF_TSO			BIT(4)
-+
-+enum {
-+	PFE_CL_GEM0 = 0,
-+	PFE_CL_GEM1,
-+	HIF_CLIENTS_MAX
-+};
-+
-+/*structure to store client queue info */
-+struct hif_rx_queue {
-+	struct rx_queue_desc *base;
-+	u32	size;
-+	u32	write_idx;
-+};
-+
-+struct hif_tx_queue {
-+	struct tx_queue_desc *base;
-+	u32	size;
-+	u32	ack_idx;
-+};
-+
-+/*Structure to store the client info */
-+struct hif_client {
-+	int	rx_qn;
-+	struct hif_rx_queue	rx_q[HIF_CLIENT_QUEUES_MAX];
-+	int	tx_qn;
-+	struct hif_tx_queue	tx_q[HIF_CLIENT_QUEUES_MAX];
-+};
-+
-+/*HIF hardware buffer descriptor */
-+struct hif_desc {
-+	u32 ctrl;
-+	u32 status;
-+	u32 data;
-+	u32 next;
-+};
-+
-+struct __hif_desc {
-+	u32 ctrl;
-+	u32 status;
-+	u32 data;
-+};
-+
-+struct hif_desc_sw {
-+	dma_addr_t data;
-+	u16 len;
-+	u8 client_id;
-+	u8 q_no;
-+	u16 flags;
-+};
-+
-+struct hif_hdr {
-+	u8 client_id;
-+	u8 q_num;
-+	u16 client_ctrl;
-+	u16 client_ctrl1;
-+};
-+
-+struct __hif_hdr {
-+	union {
-+		struct hif_hdr hdr;
-+		u32 word[2];
-+	};
-+};
-+
-+struct hif_ipsec_hdr {
-+	u16	sa_handle[2];
-+} __packed;
-+
-+/*  HIF_CTRL_TX... defines */
-+#define HIF_CTRL_TX_CHECKSUM		BIT(2)
-+
-+/*  HIF_CTRL_RX... defines */
-+#define HIF_CTRL_RX_OFFSET_OFST         (24)
-+#define HIF_CTRL_RX_CHECKSUMMED		BIT(2)
-+#define HIF_CTRL_RX_CONTINUED		BIT(1)
-+
-+struct pfe_hif {
-+	/* To store registered clients in hif layer */
-+	struct hif_client client[HIF_CLIENTS_MAX];
-+	struct hif_shm *shm;
-+	int	irq;
-+
-+	void	*descr_baseaddr_v;
-+	unsigned long	descr_baseaddr_p;
-+
-+	struct hif_desc *rx_base;
-+	u32	rx_ring_size;
-+	u32	rxtoclean_index;
-+	void	*rx_buf_addr[HIF_RX_DESC_NT];
-+	int	rx_buf_len[HIF_RX_DESC_NT];
-+	unsigned int qno;
-+	unsigned int client_id;
-+	unsigned int client_ctrl;
-+	unsigned int started;
-+
-+	struct hif_desc *tx_base;
-+	u32	tx_ring_size;
-+	u32	txtosend;
-+	u32	txtoclean;
-+	u32	txavail;
-+	u32	txtoflush;
-+	struct hif_desc_sw tx_sw_queue[HIF_TX_DESC_NT];
-+
-+/* tx_lock synchronizes hif packet tx as well as pfe_hif structure access */
-+	spinlock_t tx_lock;
-+/* lock synchronizes hif rx queue processing */
-+	spinlock_t lock;
-+	struct net_device	dummy_dev;
-+	struct napi_struct	napi;
-+	struct device *dev;
-+
-+#ifdef HIF_NAPI_STATS
-+	unsigned int napi_counters[NAPI_MAX_COUNT];
-+#endif
-+	struct tasklet_struct	tx_cleanup_tasklet;
-+};
-+
-+void __hif_xmit_pkt(struct pfe_hif *hif, unsigned int client_id, unsigned int
-+			q_no, void *data, u32 len, unsigned int flags);
-+int hif_xmit_pkt(struct pfe_hif *hif, unsigned int client_id, unsigned int q_no,
-+		 void *data, unsigned int len);
-+void __hif_tx_done_process(struct pfe_hif *hif, int count);
-+void hif_process_client_req(struct pfe_hif *hif, int req, int data1, int
-+				data2);
-+int pfe_hif_init(struct pfe *pfe);
-+void pfe_hif_exit(struct pfe *pfe);
-+void pfe_hif_rx_idle(struct pfe_hif *hif);
-+static inline void hif_tx_done_process(struct pfe_hif *hif, int count)
-+{
-+	spin_lock_bh(&hif->tx_lock);
-+	__hif_tx_done_process(hif, count);
-+	spin_unlock_bh(&hif->tx_lock);
-+}
-+
-+static inline void hif_tx_lock(struct pfe_hif *hif)
-+{
-+	spin_lock_bh(&hif->tx_lock);
-+}
-+
-+static inline void hif_tx_unlock(struct pfe_hif *hif)
-+{
-+	spin_unlock_bh(&hif->tx_lock);
-+}
-+
-+static inline int __hif_tx_avail(struct pfe_hif *hif)
-+{
-+	return hif->txavail;
-+}
-+
-+#define __memcpy8(dst, src)		memcpy(dst, src, 8)
-+#define __memcpy12(dst, src)		memcpy(dst, src, 12)
-+#define __memcpy(dst, src, len)		memcpy(dst, src, len)
-+
-+#endif /* _PFE_HIF_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.c
-@@ -0,0 +1,628 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/version.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/interrupt.h>
-+#include <linux/workqueue.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/sched.h>
-+#include <linux/skbuff.h>
-+#include <linux/moduleparam.h>
-+#include <linux/cpu.h>
-+
-+#include "pfe_mod.h"
-+#include "pfe_hif.h"
-+#include "pfe_hif_lib.h"
-+
-+unsigned int lro_mode;
-+unsigned int page_mode;
-+unsigned int tx_qos = 1;
-+module_param(tx_qos, uint, 0444);
-+MODULE_PARM_DESC(tx_qos, "0: disable ,\n"
-+			 "1: enable (default), guarantee no packet drop at TMU level\n");
-+unsigned int pfe_pkt_size;
-+unsigned int pfe_pkt_headroom;
-+unsigned int emac_txq_cnt;
-+
-+/*
-+ * @pfe_hal_lib.c.
-+ * Common functions used by HIF client drivers
-+ */
-+
-+/*HIF shared memory Global variable */
-+struct hif_shm ghif_shm;
-+
-+/* Cleanup the HIF shared memory, release HIF rx_buffer_pool.
-+ * This function should be called after pfe_hif_exit
-+ *
-+ * @param[in] hif_shm		Shared memory address location in DDR
-+ */
-+static void pfe_hif_shm_clean(struct hif_shm *hif_shm)
-+{
-+	int i;
-+	void *pkt;
-+
-+	for (i = 0; i < hif_shm->rx_buf_pool_cnt; i++) {
-+		pkt = hif_shm->rx_buf_pool[i];
-+		if (pkt) {
-+			hif_shm->rx_buf_pool[i] = NULL;
-+			pkt -= pfe_pkt_headroom;
-+
-+			if (page_mode)
-+				put_page(virt_to_page(pkt));
-+			else
-+				kfree(pkt);
-+		}
-+	}
-+}
-+
-+/* Initialize shared memory used between HIF driver and clients,
-+ * allocate rx_buffer_pool required for HIF Rx descriptors.
-+ * This function should be called before initializing HIF driver.
-+ *
-+ * @param[in] hif_shm		Shared memory address location in DDR
-+ * @rerurn			0 - on succes, <0 on fail to initialize
-+ */
-+static int pfe_hif_shm_init(struct hif_shm *hif_shm)
-+{
-+	int i;
-+	void *pkt;
-+
-+	memset(hif_shm, 0, sizeof(struct hif_shm));
-+	hif_shm->rx_buf_pool_cnt = HIF_RX_DESC_NT;
-+
-+	for (i = 0; i < hif_shm->rx_buf_pool_cnt; i++) {
-+		if (page_mode) {
-+			pkt = (void *)__get_free_page(GFP_KERNEL |
-+				GFP_DMA_PFE);
-+		} else {
-+			pkt = kmalloc(PFE_BUF_SIZE, GFP_KERNEL | GFP_DMA_PFE);
-+		}
-+
-+		if (pkt)
-+			hif_shm->rx_buf_pool[i] = pkt + pfe_pkt_headroom;
-+		else
-+			goto err0;
-+	}
-+
-+	return 0;
-+
-+err0:
-+	pr_err("%s Low memory\n", __func__);
-+	pfe_hif_shm_clean(hif_shm);
-+	return -ENOMEM;
-+}
-+
-+/*This function sends indication to HIF driver
-+ *
-+ * @param[in] hif	hif context
-+ */
-+static void hif_lib_indicate_hif(struct pfe_hif *hif, int req, int data1, int
-+					data2)
-+{
-+	hif_process_client_req(hif, req, data1, data2);
-+}
-+
-+void hif_lib_indicate_client(int client_id, int event_type, int qno)
-+{
-+	struct hif_client_s *client = pfe->hif_client[client_id];
-+
-+	if (!client || (event_type >= HIF_EVENT_MAX) || (qno >=
-+		HIF_CLIENT_QUEUES_MAX))
-+		return;
-+
-+	if (!test_and_set_bit(qno, &client->queue_mask[event_type]))
-+		client->event_handler(client->priv, event_type, qno);
-+}
-+
-+/*This function releases Rx queue descriptors memory and pre-filled buffers
-+ *
-+ * @param[in] client	hif_client context
-+ */
-+static void hif_lib_client_release_rx_buffers(struct hif_client_s *client)
-+{
-+	struct rx_queue_desc *desc;
-+	int qno, ii;
-+	void *buf;
-+
-+	for (qno = 0; qno < client->rx_qn; qno++) {
-+		desc = client->rx_q[qno].base;
-+
-+		for (ii = 0; ii < client->rx_q[qno].size; ii++) {
-+			buf = (void *)desc->data;
-+			if (buf) {
-+				buf -= pfe_pkt_headroom;
-+
-+				if (page_mode)
-+					free_page((unsigned long)buf);
-+				else
-+					kfree(buf);
-+
-+				desc->ctrl = 0;
-+			}
-+
-+			desc++;
-+		}
-+	}
-+
-+	kfree(client->rx_qbase);
-+}
-+
-+/*This function allocates memory for the rxq descriptors and pre-fill rx queues
-+ * with buffers.
-+ * @param[in] client	client context
-+ * @param[in] q_size	size of the rxQ, all queues are of same size
-+ */
-+static int hif_lib_client_init_rx_buffers(struct hif_client_s *client, int
-+						q_size)
-+{
-+	struct rx_queue_desc *desc;
-+	struct hif_client_rx_queue *queue;
-+	int ii, qno;
-+
-+	/*Allocate memory for the client queues */
-+	client->rx_qbase = kzalloc(client->rx_qn * q_size * sizeof(struct
-+				rx_queue_desc), GFP_KERNEL);
-+	if (!client->rx_qbase)
-+		goto err;
-+
-+	for (qno = 0; qno < client->rx_qn; qno++) {
-+		queue = &client->rx_q[qno];
-+
-+		queue->base = client->rx_qbase + qno * q_size * sizeof(struct
-+				rx_queue_desc);
-+		queue->size = q_size;
-+		queue->read_idx = 0;
-+		queue->write_idx = 0;
-+
-+		pr_debug("rx queue: %d, base: %p, size: %d\n", qno,
-+			 queue->base, queue->size);
-+	}
-+
-+	for (qno = 0; qno < client->rx_qn; qno++) {
-+		queue = &client->rx_q[qno];
-+		desc = queue->base;
-+
-+		for (ii = 0; ii < queue->size; ii++) {
-+			desc->ctrl = CL_DESC_BUF_LEN(pfe_pkt_size) |
-+					CL_DESC_OWN;
-+			desc++;
-+		}
-+	}
-+
-+	return 0;
-+
-+err:
-+	return 1;
-+}
-+
-+
-+static void hif_lib_client_cleanup_tx_queue(struct hif_client_tx_queue *queue)
-+{
-+	pr_debug("%s\n", __func__);
-+
-+	/*
-+	 * Check if there are any pending packets. Client must flush the tx
-+	 * queues before unregistering, by calling by calling
-+	 * hif_lib_tx_get_next_complete()
-+	 *
-+	 * Hif no longer calls since we are no longer registered
-+	 */
-+	if (queue->tx_pending)
-+		pr_err("%s: pending transmit packets\n", __func__);
-+}
-+
-+static void hif_lib_client_release_tx_buffers(struct hif_client_s *client)
-+{
-+	int qno;
-+
-+	pr_debug("%s\n", __func__);
-+
-+	for (qno = 0; qno < client->tx_qn; qno++)
-+		hif_lib_client_cleanup_tx_queue(&client->tx_q[qno]);
-+
-+	kfree(client->tx_qbase);
-+}
-+
-+static int hif_lib_client_init_tx_buffers(struct hif_client_s *client, int
-+						q_size)
-+{
-+	struct hif_client_tx_queue *queue;
-+	int qno;
-+
-+	client->tx_qbase = kzalloc(client->tx_qn * q_size * sizeof(struct
-+					tx_queue_desc), GFP_KERNEL);
-+	if (!client->tx_qbase)
-+		return 1;
-+
-+	for (qno = 0; qno < client->tx_qn; qno++) {
-+		queue = &client->tx_q[qno];
-+
-+		queue->base = client->tx_qbase + qno * q_size * sizeof(struct
-+				tx_queue_desc);
-+		queue->size = q_size;
-+		queue->read_idx = 0;
-+		queue->write_idx = 0;
-+		queue->tx_pending = 0;
-+		queue->nocpy_flag = 0;
-+		queue->prev_tmu_tx_pkts = 0;
-+		queue->done_tmu_tx_pkts = 0;
-+
-+		pr_debug("tx queue: %d, base: %p, size: %d\n", qno,
-+			 queue->base, queue->size);
-+	}
-+
-+	return 0;
-+}
-+
-+static int hif_lib_event_dummy(void *priv, int event_type, int qno)
-+{
-+	return 0;
-+}
-+
-+int hif_lib_client_register(struct hif_client_s *client)
-+{
-+	struct hif_shm *hif_shm;
-+	struct hif_client_shm *client_shm;
-+	int err, i;
-+	/* int loop_cnt = 0; */
-+
-+	pr_debug("%s\n", __func__);
-+
-+	/*Allocate memory before spin_lock*/
-+	if (hif_lib_client_init_rx_buffers(client, client->rx_qsize)) {
-+		err = -ENOMEM;
-+		goto err_rx;
-+	}
-+
-+	if (hif_lib_client_init_tx_buffers(client, client->tx_qsize)) {
-+		err = -ENOMEM;
-+		goto err_tx;
-+	}
-+
-+	spin_lock_bh(&pfe->hif.lock);
-+	if (!(client->pfe) || (client->id >= HIF_CLIENTS_MAX) ||
-+	    (pfe->hif_client[client->id])) {
-+		err = -EINVAL;
-+		goto err;
-+	}
-+
-+	hif_shm = client->pfe->hif.shm;
-+
-+	if (!client->event_handler)
-+		client->event_handler = hif_lib_event_dummy;
-+
-+	/*Initialize client specific shared memory */
-+	client_shm = (struct hif_client_shm *)&hif_shm->client[client->id];
-+	client_shm->rx_qbase = (unsigned long int)client->rx_qbase;
-+	client_shm->rx_qsize = client->rx_qsize;
-+	client_shm->tx_qbase = (unsigned long int)client->tx_qbase;
-+	client_shm->tx_qsize = client->tx_qsize;
-+	client_shm->ctrl = (client->tx_qn << CLIENT_CTRL_TX_Q_CNT_OFST) |
-+				(client->rx_qn << CLIENT_CTRL_RX_Q_CNT_OFST);
-+	/* spin_lock_init(&client->rx_lock); */
-+
-+	for (i = 0; i < HIF_EVENT_MAX; i++) {
-+		client->queue_mask[i] = 0;  /*
-+					     * By default all events are
-+					     * unmasked
-+					     */
-+	}
-+
-+	/*Indicate to HIF driver*/
-+	hif_lib_indicate_hif(&pfe->hif, REQUEST_CL_REGISTER, client->id, 0);
-+
-+	pr_debug("%s: client: %p, client_id: %d, tx_qsize: %d, rx_qsize: %d\n",
-+		 __func__, client, client->id, client->tx_qsize,
-+		 client->rx_qsize);
-+
-+	client->cpu_id = -1;
-+
-+	pfe->hif_client[client->id] = client;
-+	spin_unlock_bh(&pfe->hif.lock);
-+
-+	return 0;
-+
-+err:
-+	spin_unlock_bh(&pfe->hif.lock);
-+	hif_lib_client_release_tx_buffers(client);
-+
-+err_tx:
-+	hif_lib_client_release_rx_buffers(client);
-+
-+err_rx:
-+	return err;
-+}
-+
-+int hif_lib_client_unregister(struct hif_client_s *client)
-+{
-+	struct pfe *pfe = client->pfe;
-+	u32 client_id = client->id;
-+
-+	pr_info(
-+		"%s : client: %p, client_id: %d, txQ_depth: %d, rxQ_depth: %d\n"
-+		, __func__, client, client->id, client->tx_qsize,
-+		client->rx_qsize);
-+
-+	spin_lock_bh(&pfe->hif.lock);
-+	hif_lib_indicate_hif(&pfe->hif, REQUEST_CL_UNREGISTER, client->id, 0);
-+
-+	hif_lib_client_release_tx_buffers(client);
-+	hif_lib_client_release_rx_buffers(client);
-+	pfe->hif_client[client_id] = NULL;
-+	spin_unlock_bh(&pfe->hif.lock);
-+
-+	return 0;
-+}
-+
-+int hif_lib_event_handler_start(struct hif_client_s *client, int event,
-+				int qno)
-+{
-+	struct hif_client_rx_queue *queue = &client->rx_q[qno];
-+	struct rx_queue_desc *desc = queue->base + queue->read_idx;
-+
-+	if ((event >= HIF_EVENT_MAX) || (qno >= HIF_CLIENT_QUEUES_MAX)) {
-+		pr_debug("%s: Unsupported event : %d  queue number : %d\n",
-+			 __func__, event, qno);
-+		return -1;
-+	}
-+
-+	test_and_clear_bit(qno, &client->queue_mask[event]);
-+
-+	switch (event) {
-+	case EVENT_RX_PKT_IND:
-+		if (!(desc->ctrl & CL_DESC_OWN))
-+			hif_lib_indicate_client(client->id,
-+						EVENT_RX_PKT_IND, qno);
-+		break;
-+
-+	case EVENT_HIGH_RX_WM:
-+	case EVENT_TXDONE_IND:
-+	default:
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+/*
-+ * This function gets one packet from the specified client queue
-+ * It also refill the rx buffer
-+ */
-+void *hif_lib_receive_pkt(struct hif_client_s *client, int qno, int *len, int
-+				*ofst, unsigned int *rx_ctrl,
-+				unsigned int *desc_ctrl, void **priv_data)
-+{
-+	struct hif_client_rx_queue *queue = &client->rx_q[qno];
-+	struct rx_queue_desc *desc;
-+	void *pkt = NULL;
-+
-+	/*
-+	 * Following lock is to protect rx queue access from,
-+	 * hif_lib_event_handler_start.
-+	 * In general below lock is not required, because hif_lib_xmit_pkt and
-+	 * hif_lib_event_handler_start are called from napi poll and which is
-+	 * not re-entrant. But if some client use in different way this lock is
-+	 * required.
-+	 */
-+	/*spin_lock_irqsave(&client->rx_lock, flags); */
-+	desc = queue->base + queue->read_idx;
-+	if (!(desc->ctrl & CL_DESC_OWN)) {
-+		pkt = desc->data - pfe_pkt_headroom;
-+
-+		*rx_ctrl = desc->client_ctrl;
-+		*desc_ctrl = desc->ctrl;
-+
-+		if (desc->ctrl & CL_DESC_FIRST) {
-+			u16 size = *rx_ctrl >> HIF_CTRL_RX_OFFSET_OFST;
-+
-+			if (size) {
-+				size += PFE_PARSE_INFO_SIZE;
-+				*len = CL_DESC_BUF_LEN(desc->ctrl) -
-+						PFE_PKT_HEADER_SZ - size;
-+				*ofst = pfe_pkt_headroom + PFE_PKT_HEADER_SZ
-+								+ size;
-+				*priv_data = desc->data + PFE_PKT_HEADER_SZ;
-+			} else {
-+				*len = CL_DESC_BUF_LEN(desc->ctrl) -
-+				       PFE_PKT_HEADER_SZ - PFE_PARSE_INFO_SIZE;
-+				*ofst = pfe_pkt_headroom
-+					+ PFE_PKT_HEADER_SZ
-+					+ PFE_PARSE_INFO_SIZE;
-+				*priv_data = NULL;
-+			}
-+
-+		} else {
-+			*len = CL_DESC_BUF_LEN(desc->ctrl);
-+			*ofst = pfe_pkt_headroom;
-+		}
-+
-+		/*
-+		 * Needed so we don't free a buffer/page
-+		 * twice on module_exit
-+		 */
-+		desc->data = NULL;
-+
-+		/*
-+		 * Ensure everything else is written to DDR before
-+		 * writing bd->ctrl
-+		 */
-+		smp_wmb();
-+
-+		desc->ctrl = CL_DESC_BUF_LEN(pfe_pkt_size) | CL_DESC_OWN;
-+		queue->read_idx = (queue->read_idx + 1) & (queue->size - 1);
-+	}
-+
-+	/*spin_unlock_irqrestore(&client->rx_lock, flags); */
-+	return pkt;
-+}
-+
-+static inline void hif_hdr_write(struct hif_hdr *pkt_hdr, unsigned int
-+					client_id, unsigned int qno,
-+					u32 client_ctrl)
-+{
-+	/* Optimize the write since the destinaton may be non-cacheable */
-+	if (!((unsigned long)pkt_hdr & 0x3)) {
-+		((u32 *)pkt_hdr)[0] = (client_ctrl << 16) | (qno << 8) |
-+					client_id;
-+	} else {
-+		((u16 *)pkt_hdr)[0] = (qno << 8) | (client_id & 0xFF);
-+		((u16 *)pkt_hdr)[1] = (client_ctrl & 0xFFFF);
-+	}
-+}
-+
-+/*This function puts the given packet in the specific client queue */
-+void __hif_lib_xmit_pkt(struct hif_client_s *client, unsigned int qno, void
-+				*data, unsigned int len, u32 client_ctrl,
-+				unsigned int flags, void *client_data)
-+{
-+	struct hif_client_tx_queue *queue = &client->tx_q[qno];
-+	struct tx_queue_desc *desc = queue->base + queue->write_idx;
-+
-+	/* First buffer */
-+	if (flags & HIF_FIRST_BUFFER) {
-+		data -= sizeof(struct hif_hdr);
-+		len += sizeof(struct hif_hdr);
-+
-+		hif_hdr_write(data, client->id, qno, client_ctrl);
-+	}
-+
-+	desc->data = client_data;
-+	desc->ctrl = CL_DESC_OWN | CL_DESC_FLAGS(flags);
-+
-+	__hif_xmit_pkt(&pfe->hif, client->id, qno, data, len, flags);
-+
-+	queue->write_idx = (queue->write_idx + 1) & (queue->size - 1);
-+	queue->tx_pending++;
-+	queue->jiffies_last_packet = jiffies;
-+}
-+
-+void *hif_lib_tx_get_next_complete(struct hif_client_s *client, int qno,
-+				   unsigned int *flags, int count)
-+{
-+	struct hif_client_tx_queue *queue = &client->tx_q[qno];
-+	struct tx_queue_desc *desc = queue->base + queue->read_idx;
-+
-+	pr_debug("%s: qno : %d rd_indx: %d pending:%d\n", __func__, qno,
-+		 queue->read_idx, queue->tx_pending);
-+
-+	if (!queue->tx_pending)
-+		return NULL;
-+
-+	if (queue->nocpy_flag && !queue->done_tmu_tx_pkts) {
-+		u32 tmu_tx_pkts = be32_to_cpu(pe_dmem_read(TMU0_ID +
-+			client->id, TMU_DM_TX_TRANS, 4));
-+
-+		if (queue->prev_tmu_tx_pkts > tmu_tx_pkts)
-+			queue->done_tmu_tx_pkts = UINT_MAX -
-+				queue->prev_tmu_tx_pkts + tmu_tx_pkts;
-+		else
-+			queue->done_tmu_tx_pkts = tmu_tx_pkts -
-+						queue->prev_tmu_tx_pkts;
-+
-+		queue->prev_tmu_tx_pkts  = tmu_tx_pkts;
-+
-+		if (!queue->done_tmu_tx_pkts)
-+			return NULL;
-+	}
-+
-+	if (desc->ctrl & CL_DESC_OWN)
-+		return NULL;
-+
-+	queue->read_idx = (queue->read_idx + 1) & (queue->size - 1);
-+	queue->tx_pending--;
-+
-+	*flags = CL_DESC_GET_FLAGS(desc->ctrl);
-+
-+	if (queue->done_tmu_tx_pkts && (*flags & HIF_LAST_BUFFER))
-+		queue->done_tmu_tx_pkts--;
-+
-+	return desc->data;
-+}
-+
-+static void hif_lib_tmu_credit_init(struct pfe *pfe)
-+{
-+	int i, q;
-+
-+	for (i = 0; i < NUM_GEMAC_SUPPORT; i++)
-+		for (q = 0; q < emac_txq_cnt; q++) {
-+			pfe->tmu_credit.tx_credit_max[i][q] = (q == 0) ?
-+					DEFAULT_Q0_QDEPTH : DEFAULT_MAX_QDEPTH;
-+			pfe->tmu_credit.tx_credit[i][q] =
-+					pfe->tmu_credit.tx_credit_max[i][q];
-+		}
-+}
-+
-+/* __hif_lib_update_credit
-+ *
-+ * @param[in] client	hif client context
-+ * @param[in] queue	queue number in match with TMU
-+ */
-+void __hif_lib_update_credit(struct hif_client_s *client, unsigned int queue)
-+{
-+	unsigned int tmu_tx_packets, tmp;
-+
-+	if (tx_qos) {
-+		tmu_tx_packets = be32_to_cpu(pe_dmem_read(TMU0_ID +
-+			client->id, (TMU_DM_TX_TRANS + (queue * 4)), 4));
-+
-+		/* tx_packets counter overflowed */
-+		if (tmu_tx_packets >
-+		    pfe->tmu_credit.tx_packets[client->id][queue]) {
-+			tmp = UINT_MAX - tmu_tx_packets +
-+			pfe->tmu_credit.tx_packets[client->id][queue];
-+
-+			pfe->tmu_credit.tx_credit[client->id][queue] =
-+			pfe->tmu_credit.tx_credit_max[client->id][queue] - tmp;
-+		} else {
-+		/* TMU tx <= pfe_eth tx, normal case or both OF since
-+		 * last time
-+		 */
-+			pfe->tmu_credit.tx_credit[client->id][queue] =
-+			pfe->tmu_credit.tx_credit_max[client->id][queue] -
-+			(pfe->tmu_credit.tx_packets[client->id][queue] -
-+			tmu_tx_packets);
-+		}
-+	}
-+}
-+
-+int pfe_hif_lib_init(struct pfe *pfe)
-+{
-+	int rc;
-+
-+	pr_info("%s\n", __func__);
-+
-+	if (lro_mode) {
-+		page_mode = 1;
-+		pfe_pkt_size = min(PAGE_SIZE, MAX_PFE_PKT_SIZE);
-+		pfe_pkt_headroom = 0;
-+	} else {
-+		page_mode = 0;
-+		pfe_pkt_size = PFE_PKT_SIZE;
-+		pfe_pkt_headroom = PFE_PKT_HEADROOM;
-+	}
-+
-+	if (tx_qos)
-+		emac_txq_cnt = EMAC_TXQ_CNT / 2;
-+	else
-+		emac_txq_cnt = EMAC_TXQ_CNT;
-+
-+	hif_lib_tmu_credit_init(pfe);
-+	pfe->hif.shm = &ghif_shm;
-+	rc = pfe_hif_shm_init(pfe->hif.shm);
-+
-+	return rc;
-+}
-+
-+void pfe_hif_lib_exit(struct pfe *pfe)
-+{
-+	pr_info("%s\n", __func__);
-+
-+	pfe_hif_shm_clean(pfe->hif.shm);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.h
-@@ -0,0 +1,229 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_HIF_LIB_H_
-+#define _PFE_HIF_LIB_H_
-+
-+#include "pfe_hif.h"
-+
-+#define HIF_CL_REQ_TIMEOUT	10
-+#define GFP_DMA_PFE 0
-+#define PFE_PARSE_INFO_SIZE	16
-+
-+enum {
-+	REQUEST_CL_REGISTER = 0,
-+	REQUEST_CL_UNREGISTER,
-+	HIF_REQUEST_MAX
-+};
-+
-+enum {
-+	/* Event to indicate that client rx queue is reached water mark level */
-+	EVENT_HIGH_RX_WM = 0,
-+	/* Event to indicate that, packet received for client */
-+	EVENT_RX_PKT_IND,
-+	/* Event to indicate that, packet tx done for client */
-+	EVENT_TXDONE_IND,
-+	HIF_EVENT_MAX
-+};
-+
-+/*structure to store client queue info */
-+
-+/*structure to store client queue info */
-+struct hif_client_rx_queue {
-+	struct rx_queue_desc *base;
-+	u32	size;
-+	u32	read_idx;
-+	u32	write_idx;
-+};
-+
-+struct hif_client_tx_queue {
-+	struct tx_queue_desc *base;
-+	u32	size;
-+	u32	read_idx;
-+	u32	write_idx;
-+	u32	tx_pending;
-+	unsigned long jiffies_last_packet;
-+	u32	nocpy_flag;
-+	u32	prev_tmu_tx_pkts;
-+	u32	done_tmu_tx_pkts;
-+};
-+
-+struct hif_client_s {
-+	int	id;
-+	int	tx_qn;
-+	int	rx_qn;
-+	void	*rx_qbase;
-+	void	*tx_qbase;
-+	int	tx_qsize;
-+	int	rx_qsize;
-+	int	cpu_id;
-+	struct hif_client_tx_queue tx_q[HIF_CLIENT_QUEUES_MAX];
-+	struct hif_client_rx_queue rx_q[HIF_CLIENT_QUEUES_MAX];
-+	int (*event_handler)(void *priv, int event, int data);
-+	unsigned long queue_mask[HIF_EVENT_MAX];
-+	struct pfe *pfe;
-+	void *priv;
-+};
-+
-+/*
-+ * Client specific shared memory
-+ * It contains number of Rx/Tx queues, base addresses and queue sizes
-+ */
-+struct hif_client_shm {
-+	u32 ctrl; /*0-7: number of Rx queues, 8-15: number of tx queues */
-+	unsigned long rx_qbase; /*Rx queue base address */
-+	u32 rx_qsize; /*each Rx queue size, all Rx queues are of same size */
-+	unsigned long tx_qbase; /* Tx queue base address */
-+	u32 tx_qsize; /*each Tx queue size, all Tx queues are of same size */
-+};
-+
-+/*Client shared memory ctrl bit description */
-+#define CLIENT_CTRL_RX_Q_CNT_OFST	0
-+#define CLIENT_CTRL_TX_Q_CNT_OFST	8
-+#define CLIENT_CTRL_RX_Q_CNT(ctrl)	(((ctrl) >> CLIENT_CTRL_RX_Q_CNT_OFST) \
-+						& 0xFF)
-+#define CLIENT_CTRL_TX_Q_CNT(ctrl)	(((ctrl) >> CLIENT_CTRL_TX_Q_CNT_OFST) \
-+						& 0xFF)
-+
-+/*
-+ * Shared memory used to communicate between HIF driver and host/client drivers
-+ * Before starting the hif driver rx_buf_pool ans rx_buf_pool_cnt should be
-+ * initialized with host buffers and buffers count in the pool.
-+ * rx_buf_pool_cnt should be >= HIF_RX_DESC_NT.
-+ *
-+ */
-+struct hif_shm {
-+	u32 rx_buf_pool_cnt; /*Number of rx buffers available*/
-+	/*Rx buffers required to initialize HIF rx descriptors */
-+	void *rx_buf_pool[HIF_RX_DESC_NT];
-+	unsigned long g_client_status[2]; /*Global client status bit mask */
-+	/* Client specific shared memory */
-+	struct hif_client_shm client[HIF_CLIENTS_MAX];
-+};
-+
-+#define CL_DESC_OWN	BIT(31)
-+/* This sets owner ship to HIF driver */
-+#define CL_DESC_LAST	BIT(30)
-+/* This indicates last packet for multi buffers handling */
-+#define CL_DESC_FIRST	BIT(29)
-+/* This indicates first packet for multi buffers handling */
-+
-+#define CL_DESC_BUF_LEN(x)		((x) & 0xFFFF)
-+#define CL_DESC_FLAGS(x)		(((x) & 0xF) << 16)
-+#define CL_DESC_GET_FLAGS(x)		(((x) >> 16) & 0xF)
-+
-+struct rx_queue_desc {
-+	void *data;
-+	u32	ctrl; /*0-15bit len, 16-20bit flags, 31bit owner*/
-+	u32	client_ctrl;
-+};
-+
-+struct tx_queue_desc {
-+	void *data;
-+	u32	ctrl; /*0-15bit len, 16-20bit flags, 31bit owner*/
-+};
-+
-+/* HIF Rx is not working properly for 2-byte aligned buffers and
-+ * ip_header should be 4byte aligned for better iperformance.
-+ * "ip_header = 64 + 6(hif_header) + 14 (MAC Header)" will be 4byte aligned.
-+ */
-+#define PFE_PKT_HEADER_SZ	sizeof(struct hif_hdr)
-+/* must be big enough for headroom, pkt size and skb shared info */
-+#define PFE_BUF_SIZE		2048
-+#define PFE_PKT_HEADROOM	128
-+
-+#define SKB_SHARED_INFO_SIZE   SKB_DATA_ALIGN(sizeof(struct skb_shared_info))
-+#define PFE_PKT_SIZE		(PFE_BUF_SIZE - PFE_PKT_HEADROOM \
-+				 - SKB_SHARED_INFO_SIZE)
-+#define MAX_L2_HDR_SIZE		14	/* Not correct for VLAN/PPPoE */
-+#define MAX_L3_HDR_SIZE		20	/* Not correct for IPv6 */
-+#define MAX_L4_HDR_SIZE		60	/* TCP with maximum options */
-+#define MAX_HDR_SIZE		(MAX_L2_HDR_SIZE + MAX_L3_HDR_SIZE \
-+				 + MAX_L4_HDR_SIZE)
-+/* Used in page mode to clamp packet size to the maximum supported by the hif
-+ *hw interface (<16KiB)
-+ */
-+#define MAX_PFE_PKT_SIZE	16380UL
-+
-+extern unsigned int pfe_pkt_size;
-+extern unsigned int pfe_pkt_headroom;
-+extern unsigned int page_mode;
-+extern unsigned int lro_mode;
-+extern unsigned int tx_qos;
-+extern unsigned int emac_txq_cnt;
-+
-+int pfe_hif_lib_init(struct pfe *pfe);
-+void pfe_hif_lib_exit(struct pfe *pfe);
-+int hif_lib_client_register(struct hif_client_s *client);
-+int hif_lib_client_unregister(struct  hif_client_s *client);
-+void __hif_lib_xmit_pkt(struct hif_client_s *client, unsigned int qno, void
-+				*data, unsigned int len, u32 client_ctrl,
-+				unsigned int flags, void *client_data);
-+int hif_lib_xmit_pkt(struct hif_client_s *client, unsigned int qno, void *data,
-+		     unsigned int len, u32 client_ctrl, void *client_data);
-+void hif_lib_indicate_client(int cl_id, int event, int data);
-+int hif_lib_event_handler_start(struct hif_client_s *client, int event, int
-+					data);
-+int hif_lib_tmu_queue_start(struct hif_client_s *client, int qno);
-+int hif_lib_tmu_queue_stop(struct hif_client_s *client, int qno);
-+void *hif_lib_tx_get_next_complete(struct hif_client_s *client, int qno,
-+				   unsigned int *flags, int count);
-+void *hif_lib_receive_pkt(struct hif_client_s *client, int qno, int *len, int
-+				*ofst, unsigned int *rx_ctrl,
-+				unsigned int *desc_ctrl, void **priv_data);
-+void __hif_lib_update_credit(struct hif_client_s *client, unsigned int queue);
-+void hif_lib_set_rx_cpu_affinity(struct hif_client_s *client, int cpu_id);
-+void hif_lib_set_tx_queue_nocpy(struct hif_client_s *client, int qno, int
-+					enable);
-+static inline int hif_lib_tx_avail(struct hif_client_s *client, unsigned int
-+					qno)
-+{
-+	struct hif_client_tx_queue *queue = &client->tx_q[qno];
-+
-+	return (queue->size - queue->tx_pending);
-+}
-+
-+static inline int hif_lib_get_tx_wr_index(struct hif_client_s *client, unsigned
-+						int qno)
-+{
-+	struct hif_client_tx_queue *queue = &client->tx_q[qno];
-+
-+	return queue->write_idx;
-+}
-+
-+static inline int hif_lib_tx_pending(struct hif_client_s *client, unsigned int
-+					qno)
-+{
-+	struct hif_client_tx_queue *queue = &client->tx_q[qno];
-+
-+	return queue->tx_pending;
-+}
-+
-+#define hif_lib_tx_credit_avail(pfe, id, qno) \
-+				((pfe)->tmu_credit.tx_credit[id][qno])
-+
-+#define hif_lib_tx_credit_max(pfe, id, qno) \
-+				((pfe)->tmu_credit.tx_credit_max[id][qno])
-+
-+/*
-+ * Test comment
-+ */
-+#define hif_lib_tx_credit_use(pfe, id, qno, credit)			\
-+	({ typeof(pfe) pfe_ = pfe;					\
-+		typeof(id) id_ = id;					\
-+		typeof(qno) qno_ = qno;					\
-+		typeof(credit) credit_ = credit;			\
-+		do {							\
-+			if (tx_qos) {					\
-+				(pfe_)->tmu_credit.tx_credit[id_][qno_]\
-+					 -= credit_;			\
-+				(pfe_)->tmu_credit.tx_packets[id_][qno_]\
-+					+= credit_;			\
-+			}						\
-+		} while (0);						\
-+	})
-+
-+#endif /* _PFE_HIF_LIB_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hw.c
-@@ -0,0 +1,164 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include "pfe_mod.h"
-+#include "pfe_hw.h"
-+
-+/* Functions to handle most of pfe hw register initialization */
-+int pfe_hw_init(struct pfe *pfe, int resume)
-+{
-+	struct class_cfg class_cfg = {
-+		.pe_sys_clk_ratio = PE_SYS_CLK_RATIO,
-+		.route_table_baseaddr = pfe->ddr_phys_baseaddr +
-+					ROUTE_TABLE_BASEADDR,
-+		.route_table_hash_bits = ROUTE_TABLE_HASH_BITS,
-+	};
-+
-+	struct tmu_cfg tmu_cfg = {
-+		.pe_sys_clk_ratio = PE_SYS_CLK_RATIO,
-+		.llm_base_addr = pfe->ddr_phys_baseaddr + TMU_LLM_BASEADDR,
-+		.llm_queue_len = TMU_LLM_QUEUE_LEN,
-+	};
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	struct util_cfg util_cfg = {
-+		.pe_sys_clk_ratio = PE_SYS_CLK_RATIO,
-+	};
-+#endif
-+
-+	struct BMU_CFG bmu1_cfg = {
-+		.baseaddr = CBUS_VIRT_TO_PFE(LMEM_BASE_ADDR +
-+						BMU1_LMEM_BASEADDR),
-+		.count = BMU1_BUF_COUNT,
-+		.size = BMU1_BUF_SIZE,
-+		.low_watermark = 10,
-+		.high_watermark = 15,
-+	};
-+
-+	struct BMU_CFG bmu2_cfg = {
-+		.baseaddr = DDR_PHYS_TO_PFE(pfe->ddr_phys_baseaddr +
-+						BMU2_DDR_BASEADDR),
-+		.count = BMU2_BUF_COUNT,
-+		.size = BMU2_BUF_SIZE,
-+		.low_watermark = 250,
-+		.high_watermark = 253,
-+	};
-+
-+	struct gpi_cfg egpi1_cfg = {
-+		.lmem_rtry_cnt = EGPI1_LMEM_RTRY_CNT,
-+		.tmlf_txthres = EGPI1_TMLF_TXTHRES,
-+		.aseq_len = EGPI1_ASEQ_LEN,
-+		.mtip_pause_reg = CBUS_VIRT_TO_PFE(EMAC1_BASE_ADDR +
-+						EMAC_TCNTRL_REG),
-+	};
-+
-+	struct gpi_cfg egpi2_cfg = {
-+		.lmem_rtry_cnt = EGPI2_LMEM_RTRY_CNT,
-+		.tmlf_txthres = EGPI2_TMLF_TXTHRES,
-+		.aseq_len = EGPI2_ASEQ_LEN,
-+		.mtip_pause_reg = CBUS_VIRT_TO_PFE(EMAC2_BASE_ADDR +
-+						EMAC_TCNTRL_REG),
-+	};
-+
-+	struct gpi_cfg hgpi_cfg = {
-+		.lmem_rtry_cnt = HGPI_LMEM_RTRY_CNT,
-+		.tmlf_txthres = HGPI_TMLF_TXTHRES,
-+		.aseq_len = HGPI_ASEQ_LEN,
-+		.mtip_pause_reg = 0,
-+	};
-+
-+	pr_info("%s\n", __func__);
-+
-+#if !defined(LS1012A_PFE_RESET_WA)
-+	/* LS1012A needs this to make PE work correctly */
-+	writel(0x3,     CLASS_PE_SYS_CLK_RATIO);
-+	writel(0x3,     TMU_PE_SYS_CLK_RATIO);
-+	writel(0x3,     UTIL_PE_SYS_CLK_RATIO);
-+	usleep_range(10, 20);
-+#endif
-+
-+	pr_info("CLASS version: %x\n", readl(CLASS_VERSION));
-+	pr_info("TMU version: %x\n", readl(TMU_VERSION));
-+
-+	pr_info("BMU1 version: %x\n", readl(BMU1_BASE_ADDR +
-+		BMU_VERSION));
-+	pr_info("BMU2 version: %x\n", readl(BMU2_BASE_ADDR +
-+		BMU_VERSION));
-+
-+	pr_info("EGPI1 version: %x\n", readl(EGPI1_BASE_ADDR +
-+		GPI_VERSION));
-+	pr_info("EGPI2 version: %x\n", readl(EGPI2_BASE_ADDR +
-+		GPI_VERSION));
-+	pr_info("HGPI version: %x\n", readl(HGPI_BASE_ADDR +
-+		GPI_VERSION));
-+
-+	pr_info("HIF version: %x\n", readl(HIF_VERSION));
-+	pr_info("HIF NOPCY version: %x\n", readl(HIF_NOCPY_VERSION));
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	pr_info("UTIL version: %x\n", readl(UTIL_VERSION));
-+#endif
-+	while (!(readl(TMU_CTRL) & ECC_MEM_INIT_DONE))
-+		;
-+
-+	hif_rx_disable();
-+	hif_tx_disable();
-+
-+	bmu_init(BMU1_BASE_ADDR, &bmu1_cfg);
-+
-+	pr_info("bmu_init(1) done\n");
-+
-+	bmu_init(BMU2_BASE_ADDR, &bmu2_cfg);
-+
-+	pr_info("bmu_init(2) done\n");
-+
-+	class_cfg.resume = resume ? 1 : 0;
-+
-+	class_init(&class_cfg);
-+
-+	pr_info("class_init() done\n");
-+
-+	tmu_init(&tmu_cfg);
-+
-+	pr_info("tmu_init() done\n");
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	util_init(&util_cfg);
-+
-+	pr_info("util_init() done\n");
-+#endif
-+	gpi_init(EGPI1_BASE_ADDR, &egpi1_cfg);
-+
-+	pr_info("gpi_init(1) done\n");
-+
-+	gpi_init(EGPI2_BASE_ADDR, &egpi2_cfg);
-+
-+	pr_info("gpi_init(2) done\n");
-+
-+	gpi_init(HGPI_BASE_ADDR, &hgpi_cfg);
-+
-+	pr_info("gpi_init(hif) done\n");
-+
-+	bmu_enable(BMU1_BASE_ADDR);
-+
-+	pr_info("bmu_enable(1) done\n");
-+
-+	bmu_enable(BMU2_BASE_ADDR);
-+
-+	pr_info("bmu_enable(2) done\n");
-+
-+	return 0;
-+}
-+
-+void pfe_hw_exit(struct pfe *pfe)
-+{
-+	pr_info("%s\n", __func__);
-+
-+	bmu_disable(BMU1_BASE_ADDR);
-+	bmu_reset(BMU1_BASE_ADDR);
-+
-+	bmu_disable(BMU2_BASE_ADDR);
-+	bmu_reset(BMU2_BASE_ADDR);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_hw.h
-@@ -0,0 +1,15 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_HW_H_
-+#define _PFE_HW_H_
-+
-+#define PE_SYS_CLK_RATIO	1	/* SYS/AXI = 250MHz, HFE = 500MHz */
-+
-+int pfe_hw_init(struct pfe *pfe, int resume);
-+void pfe_hw_exit(struct pfe *pfe);
-+
-+#endif /* _PFE_HW_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c
-@@ -0,0 +1,383 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/device.h>
-+#include <linux/of.h>
-+#include <linux/of_net.h>
-+#include <linux/of_address.h>
-+#include <linux/of_mdio.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+#include <linux/clk.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/regmap.h>
-+
-+#include "pfe_mod.h"
-+
-+extern bool pfe_use_old_dts_phy;
-+struct ls1012a_pfe_platform_data pfe_platform_data;
-+
-+static int pfe_get_gemac_if_properties(struct device_node *gem,
-+				       int port,
-+				       struct ls1012a_pfe_platform_data	*pdata)
-+{
-+	struct device_node *phy_node = NULL;
-+	int size;
-+	int phy_id = 0;
-+	const u32 *addr;
-+	int err;
-+
-+	addr = of_get_property(gem, "reg", &size);
-+	if (addr)
-+		port = be32_to_cpup(addr);
-+	else
-+		goto err;
-+
-+	pdata->ls1012a_eth_pdata[port].gem_id = port;
-+
-+	err = of_get_mac_address(gem, pdata->ls1012a_eth_pdata[port].mac_addr);
-+
-+	phy_node = of_parse_phandle(gem, "phy-handle", 0);
-+	pdata->ls1012a_eth_pdata[port].phy_node = phy_node;
-+	if (phy_node) {
-+		pfe_use_old_dts_phy = false;
-+		goto process_phynode;
-+	} else if (of_phy_is_fixed_link(gem)) {
-+		pfe_use_old_dts_phy = false;
-+		if (of_phy_register_fixed_link(gem) < 0) {
-+			pr_err("broken fixed-link specification\n");
-+			goto err;
-+		}
-+		phy_node = of_node_get(gem);
-+		pdata->ls1012a_eth_pdata[port].phy_node = phy_node;
-+	} else if (of_get_property(gem, "fsl,pfe-phy-if-flags", &size)) {
-+		pfe_use_old_dts_phy = true;
-+		/* Use old dts properties for phy handling */
-+		addr = of_get_property(gem, "fsl,pfe-phy-if-flags", &size);
-+		pdata->ls1012a_eth_pdata[port].phy_flags = be32_to_cpup(addr);
-+
-+		addr = of_get_property(gem, "fsl,gemac-phy-id", &size);
-+		if (!addr) {
-+			pr_err("%s:%d Invalid gemac-phy-id....\n", __func__,
-+			       __LINE__);
-+		} else {
-+			phy_id = be32_to_cpup(addr);
-+			pdata->ls1012a_eth_pdata[port].phy_id = phy_id;
-+			pdata->ls1012a_mdio_pdata[0].phy_mask &= ~(1 << phy_id);
-+		}
-+
-+		/* If PHY is enabled, read mdio properties */
-+		if (pdata->ls1012a_eth_pdata[port].phy_flags & GEMAC_NO_PHY)
-+			goto done;
-+
-+	} else {
-+		pr_info("%s: No PHY or fixed-link\n", __func__);
-+		return 0;
-+	}
-+
-+process_phynode:
-+	err = of_get_phy_mode(gem, &pdata->ls1012a_eth_pdata[port].mii_config);
-+	if (err)
-+		pr_err("%s:%d Incorrect Phy mode....\n", __func__,
-+		       __LINE__);
-+
-+	addr = of_get_property(gem, "fsl,mdio-mux-val", &size);
-+	if (!addr) {
-+		pr_err("%s: Invalid mdio-mux-val....\n", __func__);
-+	} else {
-+		phy_id = be32_to_cpup(addr);
-+		pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
-+	}
-+
-+	if (pdata->ls1012a_eth_pdata[port].phy_id < 32)
-+		pfe->mdio_muxval[pdata->ls1012a_eth_pdata[port].phy_id] =
-+			 pdata->ls1012a_eth_pdata[port].mdio_muxval;
-+
-+
-+	pdata->ls1012a_mdio_pdata[port].irq[0] = PHY_POLL;
-+
-+done:
-+	return 0;
-+
-+err:
-+	return -1;
-+}
-+
-+/*
-+ *
-+ * pfe_platform_probe -
-+ *
-+ *
-+ */
-+static int pfe_platform_probe(struct platform_device *pdev)
-+{
-+	struct resource res;
-+	int ii = 0, rc, interface_count = 0, size = 0;
-+	const u32 *prop;
-+	struct device_node *np, *gem = NULL;
-+	struct clk *pfe_clk;
-+
-+	np = pdev->dev.of_node;
-+
-+	if (!np) {
-+		pr_err("Invalid device node\n");
-+		return -EINVAL;
-+	}
-+
-+	pfe = kzalloc(sizeof(*pfe), GFP_KERNEL);
-+	if (!pfe) {
-+		rc = -ENOMEM;
-+		goto err_alloc;
-+	}
-+
-+	platform_set_drvdata(pdev, pfe);
-+
-+	if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) {
-+		rc = -ENOMEM;
-+		pr_err("unable to configure DMA mask.\n");
-+		goto err_ddr;
-+	}
-+
-+	if (of_address_to_resource(np, 1, &res)) {
-+		rc = -ENOMEM;
-+		pr_err("failed to get ddr resource\n");
-+		goto err_ddr;
-+	}
-+
-+	pfe->ddr_phys_baseaddr = res.start;
-+	pfe->ddr_size = resource_size(&res);
-+
-+	pfe->ddr_baseaddr = memremap(res.start, resource_size(&res),
-+				     MEMREMAP_WB);
-+	if (!pfe->ddr_baseaddr) {
-+		pr_err("memremap() ddr failed\n");
-+		rc = -ENOMEM;
-+		goto err_ddr;
-+	}
-+
-+	pfe->scfg =
-+		syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+						"fsl,pfe-scfg");
-+	if (IS_ERR(pfe->scfg)) {
-+		dev_err(&pdev->dev, "No syscfg phandle specified\n");
-+		return PTR_ERR(pfe->scfg);
-+	}
-+
-+	pfe->cbus_baseaddr = of_iomap(np, 0);
-+	if (!pfe->cbus_baseaddr) {
-+		rc = -ENOMEM;
-+		pr_err("failed to get axi resource\n");
-+		goto err_axi;
-+	}
-+
-+	pfe->hif_irq = platform_get_irq(pdev, 0);
-+	if (pfe->hif_irq < 0) {
-+		pr_err("platform_get_irq for hif failed\n");
-+		rc = pfe->hif_irq;
-+		goto err_hif_irq;
-+	}
-+
-+	pfe->wol_irq = platform_get_irq(pdev, 2);
-+	if (pfe->wol_irq < 0) {
-+		pr_err("platform_get_irq for WoL failed\n");
-+		rc = pfe->wol_irq;
-+		goto err_hif_irq;
-+	}
-+
-+	/* Read interface count */
-+	prop = of_get_property(np, "fsl,pfe-num-interfaces", &size);
-+	if (!prop) {
-+		pr_err("Failed to read number of interfaces\n");
-+		rc = -ENXIO;
-+		goto err_prop;
-+	}
-+
-+	interface_count = be32_to_cpup(prop);
-+	if (interface_count <= 0) {
-+		pr_err("No ethernet interface count : %d\n",
-+		       interface_count);
-+		rc = -ENXIO;
-+		goto err_prop;
-+	}
-+
-+	pfe_platform_data.ls1012a_mdio_pdata[0].phy_mask = 0xffffffff;
-+
-+	while ((gem = of_get_next_child(np, gem))) {
-+		if (of_find_property(gem, "reg", &size)) {
-+			pfe_get_gemac_if_properties(gem, ii,
-+						&pfe_platform_data);
-+			ii++;
-+		}
-+	}
-+
-+	if (interface_count != ii)
-+		pr_info("missing some of gemac interface properties.\n");
-+
-+	pfe->dev = &pdev->dev;
-+
-+	pfe->dev->platform_data = &pfe_platform_data;
-+
-+	/* declare WoL capabilities */
-+	device_init_wakeup(&pdev->dev, true);
-+
-+	/* find the clocks */
-+	pfe_clk = devm_clk_get(pfe->dev, "pfe");
-+	if (IS_ERR(pfe_clk))
-+		return PTR_ERR(pfe_clk);
-+
-+	/* PFE clock is (platform clock / 2) */
-+	/* save sys_clk value as KHz */
-+	pfe->ctrl.sys_clk = clk_get_rate(pfe_clk) / (2 * 1000);
-+
-+	rc = pfe_probe(pfe);
-+	if (rc < 0)
-+		goto err_probe;
-+
-+	return 0;
-+
-+err_probe:
-+err_prop:
-+err_hif_irq:
-+	iounmap(pfe->cbus_baseaddr);
-+
-+err_axi:
-+	memunmap(pfe->ddr_baseaddr);
-+
-+err_ddr:
-+	platform_set_drvdata(pdev, NULL);
-+
-+	kfree(pfe);
-+
-+err_alloc:
-+	return rc;
-+}
-+
-+/*
-+ * pfe_platform_remove -
-+ */
-+static int pfe_platform_remove(struct platform_device *pdev)
-+{
-+	struct pfe *pfe = platform_get_drvdata(pdev);
-+	int rc;
-+
-+	pr_info("%s\n", __func__);
-+
-+	rc = pfe_remove(pfe);
-+
-+	iounmap(pfe->cbus_baseaddr);
-+
-+	memunmap(pfe->ddr_baseaddr);
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	kfree(pfe);
-+
-+	return rc;
-+}
-+
-+#ifdef CONFIG_PM
-+#ifdef CONFIG_PM_SLEEP
-+int pfe_platform_suspend(struct device *dev)
-+{
-+	struct pfe *pfe = platform_get_drvdata(to_platform_device(dev));
-+	struct net_device *netdev;
-+	int i;
-+
-+	pfe->wake = 0;
-+
-+	for (i = 0; i < (NUM_GEMAC_SUPPORT); i++) {
-+		netdev = pfe->eth.eth_priv[i]->ndev;
-+
-+		netif_device_detach(netdev);
-+
-+		if (netif_running(netdev))
-+			if (pfe_eth_suspend(netdev))
-+				pfe->wake = 1;
-+	}
-+
-+	/* Shutdown PFE only if we're not waking up the system */
-+	if (!pfe->wake) {
-+#if defined(LS1012A_PFE_RESET_WA)
-+		pfe_hif_rx_idle(&pfe->hif);
-+#endif
-+		pfe_ctrl_suspend(&pfe->ctrl);
-+		pfe_firmware_exit(pfe);
-+
-+		pfe_hif_exit(pfe);
-+		pfe_hif_lib_exit(pfe);
-+
-+		pfe_hw_exit(pfe);
-+	}
-+
-+	return 0;
-+}
-+
-+static int pfe_platform_resume(struct device *dev)
-+{
-+	struct pfe *pfe = platform_get_drvdata(to_platform_device(dev));
-+	struct net_device *netdev;
-+	int i;
-+
-+	if (!pfe->wake) {
-+		pfe_hw_init(pfe, 1);
-+		pfe_hif_lib_init(pfe);
-+		pfe_hif_init(pfe);
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+		util_enable();
-+#endif
-+		tmu_enable(0xf);
-+		class_enable();
-+		pfe_ctrl_resume(&pfe->ctrl);
-+	}
-+
-+	for (i = 0; i < (NUM_GEMAC_SUPPORT); i++) {
-+		netdev = pfe->eth.eth_priv[i]->ndev;
-+
-+		if (pfe->mdio.mdio_priv[i]->mii_bus)
-+			pfe_eth_mdio_reset(pfe->mdio.mdio_priv[i]->mii_bus);
-+
-+		if (netif_running(netdev))
-+			pfe_eth_resume(netdev);
-+
-+		netif_device_attach(netdev);
-+	}
-+	return 0;
-+}
-+#else
-+#define pfe_platform_suspend NULL
-+#define pfe_platform_resume NULL
-+#endif
-+
-+static const struct dev_pm_ops pfe_platform_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(pfe_platform_suspend, pfe_platform_resume)
-+};
-+#endif
-+
-+static const struct of_device_id pfe_match[] = {
-+	{
-+		.compatible = "fsl,pfe",
-+	},
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, pfe_match);
-+
-+static struct platform_driver pfe_platform_driver = {
-+	.probe = pfe_platform_probe,
-+	.remove = pfe_platform_remove,
-+	.driver = {
-+		.name = "pfe",
-+		.of_match_table = pfe_match,
-+#ifdef CONFIG_PM
-+		.pm = &pfe_platform_pm_ops,
-+#endif
-+	},
-+};
-+
-+module_platform_driver(pfe_platform_driver);
-+MODULE_LICENSE("GPL");
-+MODULE_DESCRIPTION("PFE Ethernet driver");
-+MODULE_AUTHOR("NXP DNCPE");
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_mod.c
-@@ -0,0 +1,158 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/dma-mapping.h>
-+#include "pfe_mod.h"
-+#include "pfe_cdev.h"
-+
-+unsigned int us;
-+module_param(us, uint, 0444);
-+MODULE_PARM_DESC(us, "0: module enabled for kernel networking (DEFAULT)\n"
-+			"1: module enabled for userspace networking\n");
-+struct pfe *pfe;
-+
-+/*
-+ * pfe_probe -
-+ */
-+int pfe_probe(struct pfe *pfe)
-+{
-+	int rc;
-+
-+	if (pfe->ddr_size < DDR_MAX_SIZE) {
-+		pr_err("%s: required DDR memory (%x) above platform ddr memory (%x)\n",
-+		       __func__, (unsigned int)DDR_MAX_SIZE, pfe->ddr_size);
-+		rc = -ENOMEM;
-+		goto err_hw;
-+	}
-+
-+	if (((int)(pfe->ddr_phys_baseaddr + BMU2_DDR_BASEADDR) &
-+			(8 * SZ_1M - 1)) != 0) {
-+		pr_err("%s: BMU2 base address (0x%x) must be aligned on 8MB boundary\n",
-+		       __func__, (int)pfe->ddr_phys_baseaddr +
-+			BMU2_DDR_BASEADDR);
-+		rc = -ENOMEM;
-+		goto err_hw;
-+	}
-+
-+	pr_info("cbus_baseaddr: %lx, ddr_baseaddr: %lx, ddr_phys_baseaddr: %lx, ddr_size: %x\n",
-+		(unsigned long)pfe->cbus_baseaddr,
-+		(unsigned long)pfe->ddr_baseaddr,
-+		pfe->ddr_phys_baseaddr, pfe->ddr_size);
-+
-+	pfe_lib_init(pfe->cbus_baseaddr, pfe->ddr_baseaddr,
-+		     pfe->ddr_phys_baseaddr, pfe->ddr_size);
-+
-+	rc = pfe_hw_init(pfe, 0);
-+	if (rc < 0)
-+		goto err_hw;
-+
-+	if (us)
-+		goto firmware_init;
-+
-+	rc = pfe_hif_lib_init(pfe);
-+	if (rc < 0)
-+		goto err_hif_lib;
-+
-+	rc = pfe_hif_init(pfe);
-+	if (rc < 0)
-+		goto err_hif;
-+
-+firmware_init:
-+	rc = pfe_firmware_init(pfe);
-+	if (rc < 0)
-+		goto err_firmware;
-+
-+	rc = pfe_ctrl_init(pfe);
-+	if (rc < 0)
-+		goto err_ctrl;
-+
-+	rc = pfe_eth_init(pfe);
-+	if (rc < 0)
-+		goto err_eth;
-+
-+	rc = pfe_sysfs_init(pfe);
-+	if (rc < 0)
-+		goto err_sysfs;
-+
-+	rc = pfe_debugfs_init(pfe);
-+	if (rc < 0)
-+		goto err_debugfs;
-+
-+	if (us) {
-+		/* Creating a character device */
-+		rc = pfe_cdev_init();
-+		if (rc < 0)
-+			goto err_cdev;
-+	}
-+
-+	return 0;
-+
-+err_cdev:
-+	pfe_debugfs_exit(pfe);
-+
-+err_debugfs:
-+	pfe_sysfs_exit(pfe);
-+
-+err_sysfs:
-+	pfe_eth_exit(pfe);
-+
-+err_eth:
-+	pfe_ctrl_exit(pfe);
-+
-+err_ctrl:
-+	pfe_firmware_exit(pfe);
-+
-+err_firmware:
-+	if (us)
-+		goto err_hif_lib;
-+
-+	pfe_hif_exit(pfe);
-+
-+err_hif:
-+	pfe_hif_lib_exit(pfe);
-+
-+err_hif_lib:
-+	pfe_hw_exit(pfe);
-+
-+err_hw:
-+	return rc;
-+}
-+
-+/*
-+ * pfe_remove -
-+ */
-+int pfe_remove(struct pfe *pfe)
-+{
-+	pr_info("%s\n", __func__);
-+
-+	if (us)
-+		pfe_cdev_exit();
-+
-+	pfe_debugfs_exit(pfe);
-+
-+	pfe_sysfs_exit(pfe);
-+
-+	pfe_eth_exit(pfe);
-+
-+	pfe_ctrl_exit(pfe);
-+
-+#if defined(LS1012A_PFE_RESET_WA)
-+	pfe_hif_rx_idle(&pfe->hif);
-+#endif
-+	pfe_firmware_exit(pfe);
-+
-+	if (us)
-+		goto hw_exit;
-+
-+	pfe_hif_exit(pfe);
-+
-+	pfe_hif_lib_exit(pfe);
-+
-+hw_exit:
-+	pfe_hw_exit(pfe);
-+
-+	return 0;
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_mod.h
-@@ -0,0 +1,103 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_MOD_H_
-+#define _PFE_MOD_H_
-+
-+#include <linux/device.h>
-+#include <linux/elf.h>
-+
-+extern unsigned int us;
-+
-+struct pfe;
-+
-+#include "pfe_hw.h"
-+#include "pfe_firmware.h"
-+#include "pfe_ctrl.h"
-+#include "pfe_hif.h"
-+#include "pfe_hif_lib.h"
-+#include "pfe_eth.h"
-+#include "pfe_sysfs.h"
-+#include "pfe_perfmon.h"
-+#include "pfe_debugfs.h"
-+
-+#define PHYID_MAX_VAL 32
-+
-+struct pfe_tmu_credit {
-+	/* Number of allowed TX packet in-flight, matches TMU queue size */
-+	unsigned int tx_credit[NUM_GEMAC_SUPPORT][EMAC_TXQ_CNT];
-+	unsigned int tx_credit_max[NUM_GEMAC_SUPPORT][EMAC_TXQ_CNT];
-+	unsigned int tx_packets[NUM_GEMAC_SUPPORT][EMAC_TXQ_CNT];
-+};
-+
-+struct pfe {
-+	struct regmap	*scfg;
-+	unsigned long ddr_phys_baseaddr;
-+	void *ddr_baseaddr;
-+	unsigned int ddr_size;
-+	void *cbus_baseaddr;
-+	void *apb_baseaddr;
-+	unsigned long iram_phys_baseaddr;
-+	void *iram_baseaddr;
-+	unsigned long ipsec_phys_baseaddr;
-+	void *ipsec_baseaddr;
-+	int hif_irq;
-+	int wol_irq;
-+	int hif_client_irq;
-+	struct device *dev;
-+	struct dentry *dentry;
-+	struct pfe_ctrl ctrl;
-+	struct pfe_hif hif;
-+	struct pfe_eth eth;
-+	struct pfe_mdio mdio;
-+	struct hif_client_s *hif_client[HIF_CLIENTS_MAX];
-+#if defined(CFG_DIAGS)
-+	struct pfe_diags diags;
-+#endif
-+	struct pfe_tmu_credit tmu_credit;
-+	struct pfe_cpumon cpumon;
-+	struct pfe_memmon memmon;
-+	int wake;
-+	int mdio_muxval[PHYID_MAX_VAL];
-+	struct clk *hfe_clock;
-+};
-+
-+extern struct pfe *pfe;
-+
-+int pfe_probe(struct pfe *pfe);
-+int pfe_remove(struct pfe *pfe);
-+
-+/* DDR Mapping in reserved memory*/
-+#define ROUTE_TABLE_BASEADDR	0
-+#define ROUTE_TABLE_HASH_BITS	15	/* 32K entries */
-+#define ROUTE_TABLE_SIZE	((1 << ROUTE_TABLE_HASH_BITS) \
-+				  * CLASS_ROUTE_SIZE)
-+#define BMU2_DDR_BASEADDR	(ROUTE_TABLE_BASEADDR + ROUTE_TABLE_SIZE)
-+#define BMU2_BUF_COUNT		(4096 - 256)
-+/* This is to get a total DDR size of 12MiB */
-+#define BMU2_DDR_SIZE		(DDR_BUF_SIZE * BMU2_BUF_COUNT)
-+#define UTIL_CODE_BASEADDR	(BMU2_DDR_BASEADDR + BMU2_DDR_SIZE)
-+#define UTIL_CODE_SIZE		(128 * SZ_1K)
-+#define UTIL_DDR_DATA_BASEADDR	(UTIL_CODE_BASEADDR + UTIL_CODE_SIZE)
-+#define UTIL_DDR_DATA_SIZE	(64 * SZ_1K)
-+#define CLASS_DDR_DATA_BASEADDR	(UTIL_DDR_DATA_BASEADDR + UTIL_DDR_DATA_SIZE)
-+#define CLASS_DDR_DATA_SIZE	(32 * SZ_1K)
-+#define TMU_DDR_DATA_BASEADDR	(CLASS_DDR_DATA_BASEADDR + CLASS_DDR_DATA_SIZE)
-+#define TMU_DDR_DATA_SIZE	(32 * SZ_1K)
-+#define TMU_LLM_BASEADDR	(TMU_DDR_DATA_BASEADDR + TMU_DDR_DATA_SIZE)
-+#define TMU_LLM_QUEUE_LEN	(8 * 512)
-+/* Must be power of two and at least 16 * 8 = 128 bytes */
-+#define TMU_LLM_SIZE		(4 * 16 * TMU_LLM_QUEUE_LEN)
-+/* (4 TMU's x 16 queues x queue_len) */
-+
-+#define DDR_MAX_SIZE		(TMU_LLM_BASEADDR + TMU_LLM_SIZE)
-+
-+/* LMEM Mapping */
-+#define BMU1_LMEM_BASEADDR	0
-+#define BMU1_BUF_COUNT		256
-+#define BMU1_LMEM_SIZE		(LMEM_BUF_SIZE * BMU1_BUF_COUNT)
-+
-+#endif /* _PFE_MOD_H */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_perfmon.h
-@@ -0,0 +1,26 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_PERFMON_H_
-+#define _PFE_PERFMON_H_
-+
-+#include "pfe/pfe.h"
-+
-+#define	CT_CPUMON_INTERVAL	(1 * TIMER_TICKS_PER_SEC)
-+
-+struct pfe_cpumon {
-+	u32 cpu_usage_pct[MAX_PE];
-+	u32 class_usage_pct;
-+};
-+
-+struct pfe_memmon {
-+	u32 kernel_memory_allocated;
-+};
-+
-+int pfe_perfmon_init(struct pfe *pfe);
-+void pfe_perfmon_exit(struct pfe *pfe);
-+
-+#endif /* _PFE_PERFMON_H_ */
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_sysfs.c
-@@ -0,0 +1,840 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include "pfe_mod.h"
-+
-+#define PE_EXCEPTION_DUMP_ADDRESS 0x1fa8
-+#define NUM_QUEUES		16
-+
-+static char register_name[20][5] = {
-+	"EPC", "ECAS", "EID", "ED",
-+	"r0", "r1", "r2", "r3",
-+	"r4", "r5", "r6", "r7",
-+	"r8", "r9", "r10", "r11",
-+	"r12", "r13", "r14", "r15",
-+};
-+
-+static char exception_name[14][20] = {
-+	"Reset",
-+	"HardwareFailure",
-+	"NMI",
-+	"InstBreakpoint",
-+	"DataBreakpoint",
-+	"Unsupported",
-+	"PrivilegeViolation",
-+	"InstBusError",
-+	"DataBusError",
-+	"AlignmentError",
-+	"ArithmeticError",
-+	"SystemCall",
-+	"MemoryManagement",
-+	"Interrupt",
-+};
-+
-+static unsigned long class_do_clear;
-+static unsigned long tmu_do_clear;
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+static unsigned long util_do_clear;
-+#endif
-+
-+static ssize_t display_pe_status(char *buf, int id, u32 dmem_addr, unsigned long
-+					do_clear)
-+{
-+	ssize_t len = 0;
-+	u32 val;
-+	char statebuf[5];
-+	struct pfe_cpumon *cpumon = &pfe->cpumon;
-+	u32 debug_indicator;
-+	u32 debug[20];
-+
-+	if (id < CLASS0_ID || id >= MAX_PE)
-+		return len;
-+
-+	*(u32 *)statebuf = pe_dmem_read(id, dmem_addr, 4);
-+	dmem_addr += 4;
-+
-+	statebuf[4] = '\0';
-+	len += sprintf(buf + len, "state=%4s ", statebuf);
-+
-+	val = pe_dmem_read(id, dmem_addr, 4);
-+	dmem_addr += 4;
-+	len += sprintf(buf + len, "ctr=%08x ", cpu_to_be32(val));
-+
-+	val = pe_dmem_read(id, dmem_addr, 4);
-+	if (do_clear && val)
-+		pe_dmem_write(id, 0, dmem_addr, 4);
-+	dmem_addr += 4;
-+	len += sprintf(buf + len, "rx=%u ", cpu_to_be32(val));
-+
-+	val = pe_dmem_read(id, dmem_addr, 4);
-+	if (do_clear && val)
-+		pe_dmem_write(id, 0, dmem_addr, 4);
-+	dmem_addr += 4;
-+	if (id >= TMU0_ID && id <= TMU_MAX_ID)
-+		len += sprintf(buf + len, "qstatus=%x", cpu_to_be32(val));
-+	else
-+		len += sprintf(buf + len, "tx=%u", cpu_to_be32(val));
-+
-+	val = pe_dmem_read(id, dmem_addr, 4);
-+	if (do_clear && val)
-+		pe_dmem_write(id, 0, dmem_addr, 4);
-+	dmem_addr += 4;
-+	if (val)
-+		len += sprintf(buf + len, " drop=%u", cpu_to_be32(val));
-+
-+	len += sprintf(buf + len, " load=%d%%", cpumon->cpu_usage_pct[id]);
-+
-+	len += sprintf(buf + len, "\n");
-+
-+	debug_indicator = pe_dmem_read(id, dmem_addr, 4);
-+	dmem_addr += 4;
-+	if (!strncmp((char *)&debug_indicator, "DBUG", 4)) {
-+		int j, last = 0;
-+
-+		for (j = 0; j < 16; j++) {
-+			debug[j] = pe_dmem_read(id, dmem_addr, 4);
-+			if (debug[j]) {
-+				if (do_clear)
-+					pe_dmem_write(id, 0, dmem_addr, 4);
-+				last = j + 1;
-+			}
-+			dmem_addr += 4;
-+		}
-+		for (j = 0; j < last; j++) {
-+			len += sprintf(buf + len, "%08x%s",
-+			cpu_to_be32(debug[j]),
-+			(j & 0x7) == 0x7 || j == last - 1 ? "\n" : " ");
-+		}
-+	}
-+
-+	if (!strncmp(statebuf, "DEAD", 4)) {
-+		u32 i, dump = PE_EXCEPTION_DUMP_ADDRESS;
-+
-+		len += sprintf(buf + len, "Exception details:\n");
-+		for (i = 0; i < 20; i++) {
-+			debug[i] = pe_dmem_read(id, dump, 4);
-+			dump += 4;
-+			if (i == 2)
-+				len += sprintf(buf + len, "%4s = %08x (=%s) ",
-+				register_name[i], cpu_to_be32(debug[i]),
-+				exception_name[min((u32)
-+				cpu_to_be32(debug[i]), (u32)13)]);
-+			else
-+				len += sprintf(buf + len, "%4s = %08x%s",
-+				register_name[i], cpu_to_be32(debug[i]),
-+				(i & 0x3) == 0x3 || i == 19 ? "\n" : " ");
-+		}
-+	}
-+
-+	return len;
-+}
-+
-+static ssize_t class_phy_stats(char *buf, int phy)
-+{
-+	ssize_t len = 0;
-+	int off1 = phy * 0x28;
-+	int off2 = phy * 0x10;
-+
-+	if (phy == 3)
-+		off1 = CLASS_PHY4_RX_PKTS - CLASS_PHY1_RX_PKTS;
-+
-+	len += sprintf(buf + len, "phy: %d\n", phy);
-+	len += sprintf(buf + len,
-+			"  rx:   %10u, tx:   %10u, intf:  %10u, ipv4:    %10u, ipv6: %10u\n",
-+			readl(CLASS_PHY1_RX_PKTS + off1),
-+			readl(CLASS_PHY1_TX_PKTS + off1),
-+			readl(CLASS_PHY1_INTF_MATCH_PKTS + off1),
-+			readl(CLASS_PHY1_V4_PKTS + off1),
-+			readl(CLASS_PHY1_V6_PKTS + off1));
-+
-+	len += sprintf(buf + len,
-+			"  icmp: %10u, igmp: %10u, tcp:   %10u, udp:     %10u\n",
-+			readl(CLASS_PHY1_ICMP_PKTS + off2),
-+			readl(CLASS_PHY1_IGMP_PKTS + off2),
-+			readl(CLASS_PHY1_TCP_PKTS + off2),
-+			readl(CLASS_PHY1_UDP_PKTS + off2));
-+
-+	len += sprintf(buf + len, "  err\n");
-+	len += sprintf(buf + len,
-+			"  lp:   %10u, intf: %10u, l3:    %10u, chcksum: %10u, ttl:  %10u\n",
-+			readl(CLASS_PHY1_LP_FAIL_PKTS + off1),
-+			readl(CLASS_PHY1_INTF_FAIL_PKTS + off1),
-+			readl(CLASS_PHY1_L3_FAIL_PKTS + off1),
-+			readl(CLASS_PHY1_CHKSUM_ERR_PKTS + off1),
-+			readl(CLASS_PHY1_TTL_ERR_PKTS + off1));
-+
-+	return len;
-+}
-+
-+/* qm_read_drop_stat
-+ * This function is used to read the drop statistics from the TMU
-+ * hw drop counter.  Since the hw counter is always cleared afer
-+ * reading, this function maintains the previous drop count, and
-+ * adds the new value to it.  That value can be retrieved by
-+ * passing a pointer to it with the total_drops arg.
-+ *
-+ * @param tmu		TMU number (0 - 3)
-+ * @param queue		queue number (0 - 15)
-+ * @param total_drops	pointer to location to store total drops (or NULL)
-+ * @param do_reset	if TRUE, clear total drops after updating
-+ */
-+u32 qm_read_drop_stat(u32 tmu, u32 queue, u32 *total_drops, int do_reset)
-+{
-+	static u32 qtotal[TMU_MAX_ID + 1][NUM_QUEUES];
-+	u32 val;
-+
-+	writel((tmu << 8) | queue, TMU_TEQ_CTRL);
-+	writel((tmu << 8) | queue, TMU_LLM_CTRL);
-+	val = readl(TMU_TEQ_DROP_STAT);
-+	qtotal[tmu][queue] += val;
-+	if (total_drops)
-+		*total_drops = qtotal[tmu][queue];
-+	if (do_reset)
-+		qtotal[tmu][queue] = 0;
-+	return val;
-+}
-+
-+static ssize_t tmu_queue_stats(char *buf, int tmu, int queue)
-+{
-+	ssize_t len = 0;
-+	u32 drops;
-+
-+	len += sprintf(buf + len, "%d-%02d, ", tmu, queue);
-+
-+	drops = qm_read_drop_stat(tmu, queue, NULL, 0);
-+
-+	/* Select queue */
-+	writel((tmu << 8) | queue, TMU_TEQ_CTRL);
-+	writel((tmu << 8) | queue, TMU_LLM_CTRL);
-+
-+	len += sprintf(buf + len,
-+			"(teq) drop: %10u, tx: %10u (llm) head: %08x, tail: %08x, drop: %10u\n",
-+		drops, readl(TMU_TEQ_TRANS_STAT),
-+		readl(TMU_LLM_QUE_HEADPTR), readl(TMU_LLM_QUE_TAILPTR),
-+		readl(TMU_LLM_QUE_DROPCNT));
-+
-+	return len;
-+}
-+
-+static ssize_t tmu_queues(char *buf, int tmu)
-+{
-+	ssize_t len = 0;
-+	int queue;
-+
-+	for (queue = 0; queue < 16; queue++)
-+		len += tmu_queue_stats(buf + len, tmu, queue);
-+
-+	return len;
-+}
-+
-+static ssize_t block_version(char *buf, void *addr)
-+{
-+	ssize_t len = 0;
-+	u32 val;
-+
-+	val = readl(addr);
-+	len += sprintf(buf + len, "revision: %x, version: %x, id: %x\n",
-+		(val >> 24) & 0xff, (val >> 16) & 0xff, val & 0xffff);
-+
-+	return len;
-+}
-+
-+static ssize_t bmu(char *buf, int id, void *base)
-+{
-+	ssize_t len = 0;
-+
-+	len += sprintf(buf + len, "%s: %d\n  ", __func__, id);
-+
-+	len += block_version(buf + len, base + BMU_VERSION);
-+
-+	len += sprintf(buf + len, "  buf size:  %x\n", (1 << readl(base +
-+			BMU_BUF_SIZE)));
-+	len += sprintf(buf + len, "  buf count: %x\n", readl(base +
-+			BMU_BUF_CNT));
-+	len += sprintf(buf + len, "  buf rem:   %x\n", readl(base +
-+			BMU_REM_BUF_CNT));
-+	len += sprintf(buf + len, "  buf curr:  %x\n", readl(base +
-+			BMU_CURR_BUF_CNT));
-+	len += sprintf(buf + len, "  free err:  %x\n", readl(base +
-+			BMU_FREE_ERR_ADDR));
-+
-+	return len;
-+}
-+
-+static ssize_t gpi(char *buf, int id, void *base)
-+{
-+	ssize_t len = 0;
-+	u32 val;
-+
-+	len += sprintf(buf + len, "%s%d:\n  ", __func__, id);
-+	len += block_version(buf + len, base + GPI_VERSION);
-+
-+	len += sprintf(buf + len, "  tx under stick: %x\n", readl(base +
-+			GPI_FIFO_STATUS));
-+	val = readl(base + GPI_FIFO_DEBUG);
-+	len += sprintf(buf + len, "  tx pkts:        %x\n", (val >> 23) &
-+			0x3f);
-+	len += sprintf(buf + len, "  rx pkts:        %x\n", (val >> 18) &
-+			0x3f);
-+	len += sprintf(buf + len, "  tx bytes:       %x\n", (val >> 9) &
-+			0x1ff);
-+	len += sprintf(buf + len, "  rx bytes:       %x\n", (val >> 0) &
-+			0x1ff);
-+	len += sprintf(buf + len, "  overrun:        %x\n", readl(base +
-+			GPI_OVERRUN_DROPCNT));
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_set_class(struct device *dev, struct device_attribute *attr,
-+			     const char *buf, size_t count)
-+{
-+	class_do_clear = kstrtoul(buf, 0, 0);
-+	return count;
-+}
-+
-+static ssize_t pfe_show_class(struct device *dev, struct device_attribute *attr,
-+			      char *buf)
-+{
-+	ssize_t len = 0;
-+	int id;
-+	u32 val;
-+	struct pfe_cpumon *cpumon = &pfe->cpumon;
-+
-+	len += block_version(buf + len, CLASS_VERSION);
-+
-+	for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++) {
-+		len += sprintf(buf + len, "%d: ", id - CLASS0_ID);
-+
-+		val = readl(CLASS_PE0_DEBUG + id * 4);
-+		len += sprintf(buf + len, "pc=1%04x ", val & 0xffff);
-+
-+		len += display_pe_status(buf + len, id, CLASS_DM_PESTATUS,
-+						class_do_clear);
-+	}
-+	len += sprintf(buf + len, "aggregate load=%d%%\n\n",
-+			cpumon->class_usage_pct);
-+
-+	len += sprintf(buf + len, "pe status:   0x%x\n",
-+			readl(CLASS_PE_STATUS));
-+	len += sprintf(buf + len, "max buf cnt: 0x%x   afull thres: 0x%x\n",
-+			readl(CLASS_MAX_BUF_CNT), readl(CLASS_AFULL_THRES));
-+	len += sprintf(buf + len, "tsq max cnt: 0x%x   tsq fifo thres: 0x%x\n",
-+			readl(CLASS_TSQ_MAX_CNT), readl(CLASS_TSQ_FIFO_THRES));
-+	len += sprintf(buf + len, "state:       0x%x\n", readl(CLASS_STATE));
-+
-+	len += class_phy_stats(buf + len, 0);
-+	len += class_phy_stats(buf + len, 1);
-+	len += class_phy_stats(buf + len, 2);
-+	len += class_phy_stats(buf + len, 3);
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_set_tmu(struct device *dev, struct device_attribute *attr,
-+			   const char *buf, size_t count)
-+{
-+	tmu_do_clear = kstrtoul(buf, 0, 0);
-+	return count;
-+}
-+
-+static ssize_t pfe_show_tmu(struct device *dev, struct device_attribute *attr,
-+			    char *buf)
-+{
-+	ssize_t len = 0;
-+	int id;
-+	u32 val;
-+
-+	len += block_version(buf + len, TMU_VERSION);
-+
-+	for (id = TMU0_ID; id <= TMU_MAX_ID; id++) {
-+		if (id == TMU2_ID)
-+			continue;
-+		len += sprintf(buf + len, "%d: ", id - TMU0_ID);
-+
-+		len += display_pe_status(buf + len, id, TMU_DM_PESTATUS,
-+						tmu_do_clear);
-+	}
-+
-+	len += sprintf(buf + len, "pe status:    %x\n", readl(TMU_PE_STATUS));
-+	len += sprintf(buf + len, "inq fifo cnt: %x\n",
-+			readl(TMU_PHY_INQ_FIFO_CNT));
-+	val = readl(TMU_INQ_STAT);
-+	len += sprintf(buf + len, "inq wr ptr:     %x\n", val & 0x3ff);
-+	len += sprintf(buf + len, "inq rd ptr:     %x\n", val >> 10);
-+
-+	return len;
-+}
-+
-+static unsigned long drops_do_clear;
-+static u32 class_drop_counter[CLASS_NUM_DROP_COUNTERS];
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+static u32 util_drop_counter[UTIL_NUM_DROP_COUNTERS];
-+#endif
-+
-+char *class_drop_description[CLASS_NUM_DROP_COUNTERS] = {
-+	"ICC",
-+	"Host Pkt Error",
-+	"Rx Error",
-+	"IPsec Outbound",
-+	"IPsec Inbound",
-+	"EXPT IPsec Error",
-+	"Reassembly",
-+	"Fragmenter",
-+	"NAT-T",
-+	"Socket",
-+	"Multicast",
-+	"NAT-PT",
-+	"Tx Disabled",
-+};
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+char *util_drop_description[UTIL_NUM_DROP_COUNTERS] = {
-+	"IPsec Outbound",
-+	"IPsec Inbound",
-+	"IPsec Rate Limiter",
-+	"Fragmenter",
-+	"Socket",
-+	"Tx Disabled",
-+	"Rx Error",
-+};
-+#endif
-+
-+static ssize_t pfe_set_drops(struct device *dev, struct device_attribute *attr,
-+			     const char *buf, size_t count)
-+{
-+	drops_do_clear = kstrtoul(buf, 0, 0);
-+	return count;
-+}
-+
-+static u32 tmu_drops[4][16];
-+static ssize_t pfe_show_drops(struct device *dev, struct device_attribute *attr,
-+			      char *buf)
-+{
-+	ssize_t len = 0;
-+	int id, dropnum;
-+	int tmu, queue;
-+	u32 val;
-+	u32 dmem_addr;
-+	int num_class_drops = 0, num_tmu_drops = 0, num_util_drops = 0;
-+	struct pfe_ctrl *ctrl = &pfe->ctrl;
-+
-+	memset(class_drop_counter, 0, sizeof(class_drop_counter));
-+	for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++) {
-+		if (drops_do_clear)
-+			pe_sync_stop(ctrl, (1 << id));
-+		for (dropnum = 0; dropnum < CLASS_NUM_DROP_COUNTERS;
-+			dropnum++) {
-+			dmem_addr = CLASS_DM_DROP_CNTR;
-+			val = be32_to_cpu(pe_dmem_read(id, dmem_addr, 4));
-+			class_drop_counter[dropnum] += val;
-+			num_class_drops += val;
-+			if (drops_do_clear)
-+				pe_dmem_write(id, 0, dmem_addr, 4);
-+		}
-+		if (drops_do_clear)
-+			pe_start(ctrl, (1 << id));
-+	}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	if (drops_do_clear)
-+		pe_sync_stop(ctrl, (1 << UTIL_ID));
-+	for (dropnum = 0; dropnum < UTIL_NUM_DROP_COUNTERS; dropnum++) {
-+		dmem_addr = UTIL_DM_DROP_CNTR;
-+		val = be32_to_cpu(pe_dmem_read(UTIL_ID, dmem_addr, 4));
-+		util_drop_counter[dropnum] = val;
-+		num_util_drops += val;
-+		if (drops_do_clear)
-+			pe_dmem_write(UTIL_ID, 0, dmem_addr, 4);
-+	}
-+	if (drops_do_clear)
-+		pe_start(ctrl, (1 << UTIL_ID));
-+#endif
-+	for (tmu = 0; tmu < 4; tmu++) {
-+		for (queue = 0; queue < 16; queue++) {
-+			qm_read_drop_stat(tmu, queue, &tmu_drops[tmu][queue],
-+					  drops_do_clear);
-+			num_tmu_drops += tmu_drops[tmu][queue];
-+		}
-+	}
-+
-+	if (num_class_drops == 0 && num_util_drops == 0 && num_tmu_drops == 0)
-+		len += sprintf(buf + len, "No PE drops\n\n");
-+
-+	if (num_class_drops > 0) {
-+		len += sprintf(buf + len, "Class PE drops --\n");
-+		for (dropnum = 0; dropnum < CLASS_NUM_DROP_COUNTERS;
-+			dropnum++) {
-+			if (class_drop_counter[dropnum] > 0)
-+				len += sprintf(buf + len, "  %s: %d\n",
-+					class_drop_description[dropnum],
-+					class_drop_counter[dropnum]);
-+		}
-+		len += sprintf(buf + len, "\n");
-+	}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	if (num_util_drops > 0) {
-+		len += sprintf(buf + len, "Util PE drops --\n");
-+		for (dropnum = 0; dropnum < UTIL_NUM_DROP_COUNTERS; dropnum++) {
-+			if (util_drop_counter[dropnum] > 0)
-+				len += sprintf(buf + len, "  %s: %d\n",
-+					util_drop_description[dropnum],
-+					util_drop_counter[dropnum]);
-+		}
-+		len += sprintf(buf + len, "\n");
-+	}
-+#endif
-+	if (num_tmu_drops > 0) {
-+		len += sprintf(buf + len, "TMU drops --\n");
-+		for (tmu = 0; tmu < 4; tmu++) {
-+			for (queue = 0; queue < 16; queue++) {
-+				if (tmu_drops[tmu][queue] > 0)
-+					len += sprintf(buf + len,
-+						"  TMU%d-Q%d: %d\n"
-+					, tmu, queue, tmu_drops[tmu][queue]);
-+			}
-+		}
-+		len += sprintf(buf + len, "\n");
-+	}
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_show_tmu0_queues(struct device *dev, struct device_attribute
-+					*attr, char *buf)
-+{
-+	return tmu_queues(buf, 0);
-+}
-+
-+static ssize_t pfe_show_tmu1_queues(struct device *dev, struct device_attribute
-+					*attr, char *buf)
-+{
-+	return tmu_queues(buf, 1);
-+}
-+
-+static ssize_t pfe_show_tmu2_queues(struct device *dev, struct device_attribute
-+					*attr, char *buf)
-+{
-+	return tmu_queues(buf, 2);
-+}
-+
-+static ssize_t pfe_show_tmu3_queues(struct device *dev, struct device_attribute
-+					*attr, char *buf)
-+{
-+	return tmu_queues(buf, 3);
-+}
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+static ssize_t pfe_set_util(struct device *dev, struct device_attribute *attr,
-+			    const char *buf, size_t count)
-+{
-+	util_do_clear = kstrtoul(buf, NULL, 0);
-+	return count;
-+}
-+
-+static ssize_t pfe_show_util(struct device *dev, struct device_attribute *attr,
-+			     char *buf)
-+{
-+	ssize_t len = 0;
-+	struct pfe_ctrl *ctrl = &pfe->ctrl;
-+
-+	len += block_version(buf + len, UTIL_VERSION);
-+
-+	pe_sync_stop(ctrl, (1 << UTIL_ID));
-+	len += display_pe_status(buf + len, UTIL_ID, UTIL_DM_PESTATUS,
-+					util_do_clear);
-+	pe_start(ctrl, (1 << UTIL_ID));
-+
-+	len += sprintf(buf + len, "pe status:   %x\n", readl(UTIL_PE_STATUS));
-+	len += sprintf(buf + len, "max buf cnt: %x\n",
-+			readl(UTIL_MAX_BUF_CNT));
-+	len += sprintf(buf + len, "tsq max cnt: %x\n",
-+			readl(UTIL_TSQ_MAX_CNT));
-+
-+	return len;
-+}
-+#endif
-+
-+static ssize_t pfe_show_bmu(struct device *dev, struct device_attribute *attr,
-+			    char *buf)
-+{
-+	ssize_t len = 0;
-+
-+	len += bmu(buf + len, 1, BMU1_BASE_ADDR);
-+	len += bmu(buf + len, 2, BMU2_BASE_ADDR);
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_show_hif(struct device *dev, struct device_attribute *attr,
-+			    char *buf)
-+{
-+	ssize_t len = 0;
-+
-+	len += sprintf(buf + len, "hif:\n  ");
-+	len += block_version(buf + len, HIF_VERSION);
-+
-+	len += sprintf(buf + len, "  tx curr bd:    %x\n",
-+			readl(HIF_TX_CURR_BD_ADDR));
-+	len += sprintf(buf + len, "  tx status:     %x\n",
-+			readl(HIF_TX_STATUS));
-+	len += sprintf(buf + len, "  tx dma status: %x\n",
-+			readl(HIF_TX_DMA_STATUS));
-+
-+	len += sprintf(buf + len, "  rx curr bd:    %x\n",
-+			readl(HIF_RX_CURR_BD_ADDR));
-+	len += sprintf(buf + len, "  rx status:     %x\n",
-+			readl(HIF_RX_STATUS));
-+	len += sprintf(buf + len, "  rx dma status: %x\n",
-+			readl(HIF_RX_DMA_STATUS));
-+
-+	len += sprintf(buf + len, "hif nocopy:\n  ");
-+	len += block_version(buf + len, HIF_NOCPY_VERSION);
-+
-+	len += sprintf(buf + len, "  tx curr bd:    %x\n",
-+			readl(HIF_NOCPY_TX_CURR_BD_ADDR));
-+	len += sprintf(buf + len, "  tx status:     %x\n",
-+			readl(HIF_NOCPY_TX_STATUS));
-+	len += sprintf(buf + len, "  tx dma status: %x\n",
-+			readl(HIF_NOCPY_TX_DMA_STATUS));
-+
-+	len += sprintf(buf + len, "  rx curr bd:    %x\n",
-+			readl(HIF_NOCPY_RX_CURR_BD_ADDR));
-+	len += sprintf(buf + len, "  rx status:     %x\n",
-+			readl(HIF_NOCPY_RX_STATUS));
-+	len += sprintf(buf + len, "  rx dma status: %x\n",
-+			readl(HIF_NOCPY_RX_DMA_STATUS));
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_show_gpi(struct device *dev, struct device_attribute *attr,
-+			    char *buf)
-+{
-+	ssize_t len = 0;
-+
-+	len += gpi(buf + len, 0, EGPI1_BASE_ADDR);
-+	len += gpi(buf + len, 1, EGPI2_BASE_ADDR);
-+	len += gpi(buf + len, 3, HGPI_BASE_ADDR);
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_show_pfemem(struct device *dev, struct device_attribute
-+				*attr, char *buf)
-+{
-+	ssize_t len = 0;
-+	struct pfe_memmon *memmon = &pfe->memmon;
-+
-+	len += sprintf(buf + len, "Kernel Memory: %d Bytes (%d KB)\n",
-+		memmon->kernel_memory_allocated,
-+		(memmon->kernel_memory_allocated + 1023) / 1024);
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_show_crc_revalidated(struct device *dev,
-+					struct device_attribute *attr,
-+					char *buf)
-+{
-+	u64 crc_validated = 0;
-+	ssize_t len = 0;
-+	int id, phyid;
-+
-+	len += sprintf(buf + len, "FCS re-validated by PFE:\n");
-+
-+	for (phyid = 0; phyid < 2; phyid++) {
-+		crc_validated = 0;
-+		for (id = CLASS0_ID; id <= CLASS_MAX_ID; id++) {
-+			crc_validated += be32_to_cpu(pe_dmem_read(id,
-+				CLASS_DM_CRC_VALIDATED + (phyid * 4), 4));
-+		}
-+		len += sprintf(buf + len, "MAC %d:\n    count:%10llu\n",
-+			       phyid, crc_validated);
-+	}
-+
-+	return len;
-+}
-+
-+#ifdef HIF_NAPI_STATS
-+static ssize_t pfe_show_hif_napi_stats(struct device *dev,
-+				       struct device_attribute *attr,
-+				       char *buf)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct pfe *pfe = platform_get_drvdata(pdev);
-+	ssize_t len = 0;
-+
-+	len += sprintf(buf + len, "sched:  %u\n",
-+			pfe->hif.napi_counters[NAPI_SCHED_COUNT]);
-+	len += sprintf(buf + len, "poll:   %u\n",
-+			pfe->hif.napi_counters[NAPI_POLL_COUNT]);
-+	len += sprintf(buf + len, "packet: %u\n",
-+			pfe->hif.napi_counters[NAPI_PACKET_COUNT]);
-+	len += sprintf(buf + len, "budget: %u\n",
-+			pfe->hif.napi_counters[NAPI_FULL_BUDGET_COUNT]);
-+	len += sprintf(buf + len, "desc:   %u\n",
-+			pfe->hif.napi_counters[NAPI_DESC_COUNT]);
-+	len += sprintf(buf + len, "full:   %u\n",
-+			pfe->hif.napi_counters[NAPI_CLIENT_FULL_COUNT]);
-+
-+	return len;
-+}
-+
-+static ssize_t pfe_set_hif_napi_stats(struct device *dev,
-+				      struct device_attribute *attr,
-+					const char *buf, size_t count)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct pfe *pfe = platform_get_drvdata(pdev);
-+
-+	memset(pfe->hif.napi_counters, 0, sizeof(pfe->hif.napi_counters));
-+
-+	return count;
-+}
-+
-+static DEVICE_ATTR(hif_napi_stats, 0644, pfe_show_hif_napi_stats,
-+			pfe_set_hif_napi_stats);
-+#endif
-+
-+static DEVICE_ATTR(class, 0644, pfe_show_class, pfe_set_class);
-+static DEVICE_ATTR(tmu, 0644, pfe_show_tmu, pfe_set_tmu);
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+static DEVICE_ATTR(util, 0644, pfe_show_util, pfe_set_util);
-+#endif
-+static DEVICE_ATTR(bmu, 0444, pfe_show_bmu, NULL);
-+static DEVICE_ATTR(hif, 0444, pfe_show_hif, NULL);
-+static DEVICE_ATTR(gpi, 0444, pfe_show_gpi, NULL);
-+static DEVICE_ATTR(drops, 0644, pfe_show_drops, pfe_set_drops);
-+static DEVICE_ATTR(tmu0_queues, 0444, pfe_show_tmu0_queues, NULL);
-+static DEVICE_ATTR(tmu1_queues, 0444, pfe_show_tmu1_queues, NULL);
-+static DEVICE_ATTR(tmu2_queues, 0444, pfe_show_tmu2_queues, NULL);
-+static DEVICE_ATTR(tmu3_queues, 0444, pfe_show_tmu3_queues, NULL);
-+static DEVICE_ATTR(pfemem, 0444, pfe_show_pfemem, NULL);
-+static DEVICE_ATTR(fcs_revalidated, 0444, pfe_show_crc_revalidated, NULL);
-+
-+int pfe_sysfs_init(struct pfe *pfe)
-+{
-+	if (device_create_file(pfe->dev, &dev_attr_class))
-+		goto err_class;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_tmu))
-+		goto err_tmu;
-+
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	if (device_create_file(pfe->dev, &dev_attr_util))
-+		goto err_util;
-+#endif
-+
-+	if (device_create_file(pfe->dev, &dev_attr_bmu))
-+		goto err_bmu;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_hif))
-+		goto err_hif;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_gpi))
-+		goto err_gpi;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_drops))
-+		goto err_drops;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_tmu0_queues))
-+		goto err_tmu0_queues;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_tmu1_queues))
-+		goto err_tmu1_queues;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_tmu2_queues))
-+		goto err_tmu2_queues;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_tmu3_queues))
-+		goto err_tmu3_queues;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_pfemem))
-+		goto err_pfemem;
-+
-+	if (device_create_file(pfe->dev, &dev_attr_fcs_revalidated))
-+		goto err_crc_revalidated;
-+
-+#ifdef HIF_NAPI_STATS
-+	if (device_create_file(pfe->dev, &dev_attr_hif_napi_stats))
-+		goto err_hif_napi_stats;
-+#endif
-+
-+	return 0;
-+
-+#ifdef HIF_NAPI_STATS
-+err_hif_napi_stats:
-+	device_remove_file(pfe->dev, &dev_attr_fcs_revalidated);
-+#endif
-+
-+err_crc_revalidated:
-+	device_remove_file(pfe->dev, &dev_attr_pfemem);
-+
-+err_pfemem:
-+	device_remove_file(pfe->dev, &dev_attr_tmu3_queues);
-+
-+err_tmu3_queues:
-+	device_remove_file(pfe->dev, &dev_attr_tmu2_queues);
-+
-+err_tmu2_queues:
-+	device_remove_file(pfe->dev, &dev_attr_tmu1_queues);
-+
-+err_tmu1_queues:
-+	device_remove_file(pfe->dev, &dev_attr_tmu0_queues);
-+
-+err_tmu0_queues:
-+	device_remove_file(pfe->dev, &dev_attr_drops);
-+
-+err_drops:
-+	device_remove_file(pfe->dev, &dev_attr_gpi);
-+
-+err_gpi:
-+	device_remove_file(pfe->dev, &dev_attr_hif);
-+
-+err_hif:
-+	device_remove_file(pfe->dev, &dev_attr_bmu);
-+
-+err_bmu:
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	device_remove_file(pfe->dev, &dev_attr_util);
-+
-+err_util:
-+#endif
-+	device_remove_file(pfe->dev, &dev_attr_tmu);
-+
-+err_tmu:
-+	device_remove_file(pfe->dev, &dev_attr_class);
-+
-+err_class:
-+	return -1;
-+}
-+
-+void pfe_sysfs_exit(struct pfe *pfe)
-+{
-+#ifdef HIF_NAPI_STATS
-+	device_remove_file(pfe->dev, &dev_attr_hif_napi_stats);
-+#endif
-+	device_remove_file(pfe->dev, &dev_attr_fcs_revalidated);
-+	device_remove_file(pfe->dev, &dev_attr_pfemem);
-+	device_remove_file(pfe->dev, &dev_attr_tmu3_queues);
-+	device_remove_file(pfe->dev, &dev_attr_tmu2_queues);
-+	device_remove_file(pfe->dev, &dev_attr_tmu1_queues);
-+	device_remove_file(pfe->dev, &dev_attr_tmu0_queues);
-+	device_remove_file(pfe->dev, &dev_attr_drops);
-+	device_remove_file(pfe->dev, &dev_attr_gpi);
-+	device_remove_file(pfe->dev, &dev_attr_hif);
-+	device_remove_file(pfe->dev, &dev_attr_bmu);
-+#if !defined(CONFIG_FSL_PPFE_UTIL_DISABLED)
-+	device_remove_file(pfe->dev, &dev_attr_util);
-+#endif
-+	device_remove_file(pfe->dev, &dev_attr_tmu);
-+	device_remove_file(pfe->dev, &dev_attr_class);
-+}
---- /dev/null
-+++ b/drivers/staging/fsl_ppfe/pfe_sysfs.h
-@@ -0,0 +1,17 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
-+ * Copyright 2017 NXP
-+ */
-+
-+#ifndef _PFE_SYSFS_H_
-+#define _PFE_SYSFS_H_
-+
-+#include <linux/proc_fs.h>
-+
-+u32 qm_read_drop_stat(u32 tmu, u32 queue, u32 *total_drops, int do_reset);
-+
-+int pfe_sysfs_init(struct pfe *pfe);
-+void pfe_sysfs_exit(struct pfe *pfe);
-+
-+#endif /* _PFE_SYSFS_H_ */
diff --git a/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch b/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch
deleted file mode 100644
index c125d293d7..0000000000
--- a/target/linux/layerscape/patches-6.1/702-phy-Add-2.5G-SGMII-interface-mode.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From fd32b1bc9a49919d3d59a50d775d03fe7ca5e654 Mon Sep 17 00:00:00 2001
-From: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-Date: Wed, 29 Nov 2017 15:27:57 +0530
-Subject: [PATCH] phy: Add 2.5G SGMII interface mode
-
-Add 2.5G SGMII interface mode(PHY_INTERFACE_MODE_2500SGMII)
-in existing phy_interface list
-
-Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
----
- drivers/net/phy/phy-core.c | 1 +
- drivers/net/phy/phylink.c  | 1 +
- include/linux/phy.h        | 3 +++
- 3 files changed, 5 insertions(+)
-
---- a/drivers/net/phy/phy-core.c
-+++ b/drivers/net/phy/phy-core.c
-@@ -136,6 +136,7 @@ int phy_interface_num_ports(phy_interfac
- 	case PHY_INTERFACE_MODE_RXAUI:
- 	case PHY_INTERFACE_MODE_XAUI:
- 	case PHY_INTERFACE_MODE_1000BASEKX:
-+	case PHY_INTERFACE_MODE_2500SGMII:
- 		return 1;
- 	case PHY_INTERFACE_MODE_QSGMII:
- 	case PHY_INTERFACE_MODE_QUSGMII:
---- a/drivers/net/phy/phylink.c
-+++ b/drivers/net/phy/phylink.c
-@@ -231,6 +231,7 @@ static int phylink_interface_max_speed(p
- 		return SPEED_1000;
- 
- 	case PHY_INTERFACE_MODE_2500BASEX:
-+	case PHY_INTERFACE_MODE_2500SGMII:
- 		return SPEED_2500;
- 
- 	case PHY_INTERFACE_MODE_5GBASER:
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -159,6 +159,7 @@ typedef enum {
- 	PHY_INTERFACE_MODE_10GKR,
- 	PHY_INTERFACE_MODE_QUSGMII,
- 	PHY_INTERFACE_MODE_1000BASEKX,
-+	PHY_INTERFACE_MODE_2500SGMII,
- 	PHY_INTERFACE_MODE_MAX,
- } phy_interface_t;
- 
-@@ -280,6 +281,8 @@ static inline const char *phy_modes(phy_
- 		return "100base-x";
- 	case PHY_INTERFACE_MODE_QUSGMII:
- 		return "qusgmii";
-+	case PHY_INTERFACE_MODE_2500SGMII:
-+		return "sgmii-2500";
- 	default:
- 		return "unknown";
- 	}
diff --git a/target/linux/layerscape/patches-6.1/703-layerscape-6.1-fix-compilation-warning-for-fsl-ppfe-.patch b/target/linux/layerscape/patches-6.1/703-layerscape-6.1-fix-compilation-warning-for-fsl-ppfe-.patch
deleted file mode 100644
index d49488ab4c..0000000000
--- a/target/linux/layerscape/patches-6.1/703-layerscape-6.1-fix-compilation-warning-for-fsl-ppfe-.patch
+++ /dev/null
@@ -1,239 +0,0 @@
-From 1dc3a2e216d99adc2df022ab37eab32f61d80e0e Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Mon, 8 May 2023 19:26:48 +0200
-Subject: [PATCH]  layerscape: 6.1: fix compilation warning for fsl ppfe driver
-
-Rework some desc dump and dummy pkt function to fix compilation warning.
-Fix compilation warning:
-drivers/staging/fsl_ppfe/pfe_hif.c: In function 'send_dummy_pkt_to_hif':
-drivers/staging/fsl_ppfe/pfe_hif.c:118:19: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
-  118 |         ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
-      |                   ^
-drivers/staging/fsl_ppfe/pfe_hif.c:122:20: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
-  122 |         lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
-      |                    ^
-drivers/staging/fsl_ppfe/pfe_hif.c: In function 'pfe_hif_desc_dump':
-drivers/staging/fsl_ppfe/pfe_hif.c:195:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
-  195 |         desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
-      |                        ^
-drivers/staging/fsl_ppfe/pfe_hif.c:195:36: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
-  195 |         desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
-      |                                    ^
-drivers/staging/fsl_ppfe/pfe_hif.c:207:19: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
-  207 |         desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
-      |                   ^
-drivers/staging/fsl_ppfe/pfe_hif.c:207:31: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
-  207 |         desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
-      |                               ^
-cc1: all warnings being treated as errors
-
-In file included from ./include/linux/kernel.h:19,
-                 from ./include/linux/list.h:9,
-                 from ./include/linux/wait.h:7,
-                 from ./include/linux/eventfd.h:13,
-                 from drivers/staging/fsl_ppfe/pfe_cdev.c:11:
-drivers/staging/fsl_ppfe/pfe_cdev.c: In function 'pfe_cdev_read':
-./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'int' [-Werror=format=]
-    5 | #define KERN_SOH        "\001"          /* ASCII Start Of Header */
-      |                         ^~~~~~
-./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
-  422 |                 _p_func(_fmt, ##__VA_ARGS__);                           \
-      |                         ^~~~
-./include/linux/printk.h:132:17: note: in expansion of macro 'printk'
-  132 |                 printk(fmt, ##__VA_ARGS__);             \
-      |                 ^~~~~~
-./include/linux/printk.h:580:9: note: in expansion of macro 'no_printk'
-  580 |         no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
-      |         ^~~~~~~~~
-./include/linux/kern_levels.h:15:25: note: in expansion of macro 'KERN_SOH'
-   15 | #define KERN_DEBUG      KERN_SOH "7"    /* debug-level messages */
-      |                         ^~~~~~~~
-./include/linux/printk.h:580:19: note: in expansion of macro 'KERN_DEBUG'
-  580 |         no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
-      |                   ^~~~~~~~~~
-drivers/staging/fsl_ppfe/pfe_cdev.c:42:17: note: in expansion of macro 'pr_debug'
-   42 |                 pr_debug("%u  %lu", link_states[ret].phy_id,
-      |                 ^~~~~~~~
-./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Werror=format=]
-    5 | #define KERN_SOH        "\001"          /* ASCII Start Of Header */
-      |                         ^~~~~~
-./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
-  422 |                 _p_func(_fmt, ##__VA_ARGS__);                           \
-      |                         ^~~~
-./include/linux/printk.h:493:9: note: in expansion of macro 'printk'
-  493 |         printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
-      |         ^~~~~~
-./include/linux/kern_levels.h:11:25: note: in expansion of macro 'KERN_SOH'
-   11 | #define KERN_ERR        KERN_SOH "3"    /* error conditions */
-      |                         ^~~~~~~~
-./include/linux/printk.h:493:16: note: in expansion of macro 'KERN_ERR'
-  493 |         printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
-      |                ^~~~~~~~
-drivers/staging/fsl_ppfe/pfe_cdev.c:50:17: note: in expansion of macro 'pr_err'
-   50 |                 pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
-      |                 ^~~~~~
-./include/linux/kern_levels.h:5:25: error: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'unsigned int' [-Werror=format=]
-    5 | #define KERN_SOH        "\001"          /* ASCII Start Of Header */
-      |                         ^~~~~~
-./include/linux/printk.h:422:25: note: in definition of macro 'printk_index_wrap'
-  422 |                 _p_func(_fmt, ##__VA_ARGS__);                           \
-      |                         ^~~~
-./include/linux/printk.h:132:17: note: in expansion of macro 'printk'
-  132 |                 printk(fmt, ##__VA_ARGS__);             \
-      |                 ^~~~~~
-./include/linux/printk.h:580:9: note: in expansion of macro 'no_printk'
-  580 |         no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
-      |         ^~~~~~~~~
-./include/linux/kern_levels.h:15:25: note: in expansion of macro 'KERN_SOH'
-   15 | #define KERN_DEBUG      KERN_SOH "7"    /* debug-level messages */
-      |                         ^~~~~~~~
-./include/linux/printk.h:580:19: note: in expansion of macro 'KERN_DEBUG'
-  580 |         no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
-      |                   ^~~~~~~~~~
-drivers/staging/fsl_ppfe/pfe_cdev.c:57:9: note: in expansion of macro 'pr_debug'
-   57 |         pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
-      |         ^~~~~~~~
-cc1: all warnings being treated as errors
-
-In file included from ./include/uapi/linux/posix_types.h:5,
-                 from ./include/uapi/linux/types.h:14,
-                 from ./include/linux/types.h:6,
-                 from ./include/linux/list.h:5,
-                 from ./include/linux/module.h:12,
-                 from drivers/staging/fsl_ppfe/pfe_sysfs.c:7:
-drivers/staging/fsl_ppfe/pfe_sysfs.c: In function 'pfe_set_util':
-./include/linux/stddef.h:8:14: error: passing argument 2 of 'kstrtoul' makes integer from pointer without a cast [-Werror=int-conversion]
-    8 | #define NULL ((void *)0)
-      |              ^~~~~~~~~~~
-      |              |
-      |              void *
-drivers/staging/fsl_ppfe/pfe_sysfs.c:538:39: note: in expansion of macro 'NULL'
-  538 |         util_do_clear = kstrtoul(buf, NULL, 0);
-      |                                       ^~~~
-In file included from ./include/linux/kernel.h:13,
-                 from ./include/linux/list.h:9:
-./include/linux/kstrtox.h:30:69: note: expected 'unsigned int' but argument is of type 'void *'
-   30 | static inline int __must_check kstrtoul(const char *s, unsigned int base, unsigned long *res)
-      |                                                        ~~~~~~~~~~~~~^~~~
-cc1: all warnings being treated as errors
-
-With UTIL compiled on, fix compilation warning:
-drivers/staging/fsl_ppfe/pfe_hal.c: In function 'pe_load_ddr_section':
-drivers/staging/fsl_ppfe/pfe_hal.c:617:19: error: 'else' without a previous 'if'
-  617 |                 } else {
-      |                   ^~~~
-drivers/staging/fsl_ppfe/pfe_hal.c:622:17: error: break statement not within loop or switch
-  622 |                 break;
-      |                 ^~~~~
-drivers/staging/fsl_ppfe/pfe_hal.c:624:9: error: case label not within a switch statement
-  624 |         case SHT_NOBITS:
-      |         ^~~~
-drivers/staging/fsl_ppfe/pfe_hal.c:627:17: error: break statement not within loop or switch
-  627 |                 break;
-      |                 ^~~~~
-drivers/staging/fsl_ppfe/pfe_hal.c:629:9: error: 'default' label not within a switch statement
-  629 |         default:
-      |         ^~~~~~~
-drivers/staging/fsl_ppfe/pfe_hal.c: At top level:
-drivers/staging/fsl_ppfe/pfe_hal.c:635:9: error: expected identifier or '(' before 'return'
-  635 |         return 0;
-      |         ^~~~~~
-drivers/staging/fsl_ppfe/pfe_hal.c:636:1: error: expected identifier or '(' before '}' token
-  636 | }
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
----
- drivers/staging/fsl_ppfe/pfe_cdev.c  |  6 +++---
- drivers/staging/fsl_ppfe/pfe_hif.c   | 14 +++++++-------
- drivers/staging/fsl_ppfe/pfe_sysfs.c |  2 +-
- 3 files changed, 11 insertions(+), 11 deletions(-)
-
---- a/drivers/staging/fsl_ppfe/pfe_cdev.c
-+++ b/drivers/staging/fsl_ppfe/pfe_cdev.c
-@@ -34,7 +34,7 @@ static ssize_t pfe_cdev_read(struct file
- {
- 	int ret = 0;
- 
--	pr_info("PFE CDEV attempt copying (%lu) size of user.\n",
-+	pr_info("PFE CDEV attempt copying (%zu) size of user.\n",
- 		sizeof(link_states));
- 
- 	pr_debug("Dump link_state on screen before copy_to_user\n");
-@@ -47,14 +47,14 @@ static ssize_t pfe_cdev_read(struct file
- 	/* Copy to user the value in buffer sized len */
- 	ret = copy_to_user(buf, &link_states, sizeof(link_states));
- 	if (ret != 0) {
--		pr_err("Failed to send (%d)bytes of (%lu) requested.\n",
-+		pr_err("Failed to send (%d)bytes of (%zu) requested.\n",
- 		       ret, len);
- 		return -EFAULT;
- 	}
- 
- 	/* offset set back to 0 as there is contextual reading offset */
- 	*off = 0;
--	pr_debug("Read of (%lu) bytes performed.\n", sizeof(link_states));
-+	pr_debug("Read of (%zu) bytes performed.\n", sizeof(link_states));
- 
- 	return sizeof(link_states);
- }
---- a/drivers/staging/fsl_ppfe/pfe_hif.c
-+++ b/drivers/staging/fsl_ppfe/pfe_hif.c
-@@ -115,11 +115,11 @@ static void send_dummy_pkt_to_hif(void)
- 		0x33221100, 0xa8c05544, 0x00000301, 0x00000000,
- 		0x00000000, 0x00000000, 0x00000000, 0xbe86c51f };
- 
--	ddr_ptr = (void *)((u64)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
-+	ddr_ptr = (void *)((uintptr_t)readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL));
- 	if (!ddr_ptr)
- 		return;
- 
--	lmem_ptr = (void *)((u64)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
-+	lmem_ptr = (void *)((uintptr_t)readl(BMU1_BASE_ADDR + BMU_ALLOC_CTRL));
- 	if (!lmem_ptr)
- 		return;
- 
-@@ -186,16 +186,16 @@ static void pfe_hif_free_descr(struct pf
- void pfe_hif_desc_dump(struct pfe_hif *hif)
- {
- 	struct hif_desc	*desc;
--	unsigned long desc_p;
-+	u64 desc_p;
- 	int ii = 0;
- 
- 	pr_info("%s\n", __func__);
- 
- 	desc = hif->rx_base;
--	desc_p = (u32)((u64)desc - (u64)hif->descr_baseaddr_v +
-+	desc_p = ((void *)desc - hif->descr_baseaddr_v +
- 			hif->descr_baseaddr_p);
- 
--	pr_info("HIF Rx desc base %p physical %x\n", desc, (u32)desc_p);
-+	pr_info("HIF Rx desc base %p physical %llx\n", desc, desc_p);
- 	for (ii = 0; ii < hif->rx_ring_size; ii++) {
- 		pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
- 			readl(&desc->status), readl(&desc->ctrl),
-@@ -204,10 +204,10 @@ void pfe_hif_desc_dump(struct pfe_hif *h
- 	}
- 
- 	desc = hif->tx_base;
--	desc_p = ((u64)desc - (u64)hif->descr_baseaddr_v +
-+	desc_p = ((void *)desc - hif->descr_baseaddr_v +
- 			hif->descr_baseaddr_p);
- 
--	pr_info("HIF Tx desc base %p physical %x\n", desc, (u32)desc_p);
-+	pr_info("HIF Tx desc base %p physical %llx\n", desc, desc_p);
- 	for (ii = 0; ii < hif->tx_ring_size; ii++) {
- 		pr_info("status: %08x, ctrl: %08x, data: %08x, next: %x\n",
- 			readl(&desc->status), readl(&desc->ctrl),
---- a/drivers/staging/fsl_ppfe/pfe_sysfs.c
-+++ b/drivers/staging/fsl_ppfe/pfe_sysfs.c
-@@ -535,7 +535,7 @@ static ssize_t pfe_show_tmu3_queues(stru
- static ssize_t pfe_set_util(struct device *dev, struct device_attribute *attr,
- 			    const char *buf, size_t count)
- {
--	util_do_clear = kstrtoul(buf, NULL, 0);
-+	util_do_clear = kstrtoul(buf, 0, 0);
- 	return count;
- }
- 
diff --git a/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch b/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch
deleted file mode 100644
index ed7b2c2609..0000000000
--- a/target/linux/layerscape/patches-6.1/704-net-phylink-treat-PHY_INTERFACE_MODE_2500SGMII-in-ph.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From eb57941154e2ad142c07d47e874a221328467349 Mon Sep 17 00:00:00 2001
-From: Ioana Ciornei <ioana.ciornei@nxp.com>
-Date: Thu, 2 Jun 2022 12:11:11 +0300
-Subject: [PATCH] net: phylink: treat PHY_INTERFACE_MODE_2500SGMII in
- phylink_get_linkmodes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There is a downstream patch which adds a new interface type -
-PHY_INTERFACE_MODE_2500SGMII (which is really the same one as
-PHY_INTERFACE_MODE_2500BASEX).
-
-We backported from upstream the following phylink patch which, of
-course, does not treat the PHY_INTERFACE_MODE_2500SGMII interface mode
-in a switch case statement.
-	34ae2c09d46a ("net: phylink: add generic validate implementation")
-
-Because of this, we get the following build warning.
-
-drivers/net/phy/phylink.c: In function ‘phylink_get_linkmodes’:
-drivers/net/phy/phylink.c:322:2: warning: enumeration value ‘PHY_INTERFACE_MODE_2500SGMII’ not handled in switch [-Wswitch]
-  322 |  switch (interface) {
-      |  ^~~~~~
-
-Fix it by treating the new interface mode in the switch-case statement.
-
-Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
----
- drivers/net/phy/phylink.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/phy/phylink.c
-+++ b/drivers/net/phy/phylink.c
-@@ -518,6 +518,7 @@ unsigned long phylink_get_capabilities(p
- 		break;
- 
- 	case PHY_INTERFACE_MODE_2500BASEX:
-+	case PHY_INTERFACE_MODE_2500SGMII:
- 		caps |= MAC_2500FD;
- 		break;
- 
diff --git a/target/linux/mediatek/base-files/lib/preinit/07_trigger_fip_scrubbing b/target/linux/mediatek/base-files/lib/preinit/07_trigger_fip_scrubbing
new file mode 100644
index 0000000000..74458e075b
--- /dev/null
+++ b/target/linux/mediatek/base-files/lib/preinit/07_trigger_fip_scrubbing
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+trigger_fip_scrubbing() {
+	local vol voltype volname
+	for vol in /sys/class/ubi/ubi*_*; do
+		[ -e "$vol" ] || continue
+		voltype="$(cat "$vol"/type)"
+		volname="$(cat "$vol"/name)"
+		if [ "$voltype" = "static" ] && [ "$volname" = "fip" ]; then
+			cat "/dev/${vol##*/}" > /dev/null
+			break
+		fi
+	done
+}
+
+boot_hook_add preinit_main trigger_fip_scrubbing
diff --git a/target/linux/mediatek/dts/mt7629-linksys-ea7500-v3.dts b/target/linux/mediatek/dts/mt7629-linksys-ea7500-v3.dts
new file mode 100644
index 0000000000..70b7cde6d9
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7629-linksys-ea7500-v3.dts
@@ -0,0 +1,300 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include "mt7629.dtsi"
+
+/ {
+	model = "Linksys EA7500 v3";
+	compatible = "linksys,ea7500-v3", "mediatek,mt7629";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs-override = "console=ttyS0,115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 52 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 60 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 58 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x40000000 0x10000000>;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_5v: regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&eth_pins>;
+	pinctrl-1 = <&ephy_leds_pins>;
+	status = "okay";
+
+	gmac0: mac@0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-mode = "gmii";
+		phy-handle = <&phy0>;
+	};
+
+	mdio: mdio-bus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+
+		switch@1f {
+			compatible = "mediatek,mt7531";
+			reg = <31>;
+			reset-gpios = <&pio 28 0>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&pio>;
+			interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					label = "lan1";
+				};
+
+				port@1 {
+					reg = <1>;
+					label = "lan2";
+				};
+
+				port@2 {
+					reg = <2>;
+					label = "lan3";
+				};
+
+				port@3 {
+					reg = <3>;
+					label = "lan4";
+				};
+
+				port@6 {
+					reg = <6>;
+					ethernet = <&gmac0>;
+					phy-mode = "2500base-x";
+
+					fixed-link {
+						speed = <2500>;
+						full-duplex;
+						pause;
+					};
+				};
+			};
+		};
+	};
+};
+
+&bch {
+	status = "okay";
+};
+
+&snfi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&serial_nand_pins>;
+	status = "okay";
+	flash@0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		nand-ecc-engine = <&snfi>;
+		mediatek,bmt-v2;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "Bootloader";
+				reg = <0x0 0x100000>;
+				read-only;
+			};
+
+			partition@100000 {
+				label = "Config";
+				reg = <0x100000 0x40000>;
+			};
+
+			partition@140000 {
+				label = "Factory";
+				reg = <0x140000 0x80000>;
+				read-only;
+			};
+
+			partition@1c0000 {
+				label = "kernel";
+				reg = <0x1c0000 0x800000>;
+			};
+
+			partition@9c0000 {
+				label = "ubi";
+				reg = <0x9c0000 0x2000000>;
+			};
+
+			partition@29c0000 {
+				label = "Kernel2";
+				reg = <0x29c0000 0x2800000>;
+				read-only;
+			};
+
+			partition@51c0000 {
+				label = "devinfo";
+				reg = <0x51c0000 0x40000>;
+				read-only;
+			};
+
+			partition@5200000 {
+				label = "sysdiag";
+				reg = <0x5200000 0x100000>;
+				read-only;
+			};
+
+			partition@5300000 {
+				label = "syscfg";
+				reg = <0x5300000 0x2000000>;
+				read-only;
+			};
+
+			partition@7300000 {
+				label = "s_env";
+				reg = <0x7300000 0x40000>;
+			};
+		};
+	};
+};
+
+&pio {
+	eth_pins: eth-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio";
+		};
+	};
+
+	ephy_leds_pins: ephy-leds-pins {
+		mux {
+			function = "led";
+			groups = "ephy_leds";
+		};
+	};
+
+	/* Serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	uart0_pins: uart0-pins {
+		mux {
+			function = "uart";
+			groups = "uart0_txd_rxd" ;
+		};
+	};
+
+	watchdog_pins: watchdog-pins {
+		mux {
+			function = "watchdog";
+			groups = "watchdog";
+		};
+	};
+};
+
+&ssusb {
+	vusb33-supply = <&reg_3p3v>;
+	vbus-supply = <&reg_5v>;
+	status = "okay";
+};
+
+&u3phy0 {
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
+&watchdog {
+	pinctrl-names = "default";
+	pinctrl-0 = <&watchdog_pins>;
+	status = "okay";
+
+	interrupt-controller;
+	#interrupt-cells = <1>;
+	interrupt-parent = <&pio>;
+	interrupts = <GIC_SPI 0x80 IRQ_TYPE_EDGE_FALLING>;
+};
diff --git a/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts b/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts
index c306a5eb7b..0e7c4fe8b5 100644
--- a/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts
+++ b/target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts
@@ -15,6 +15,7 @@
 		led-failsafe = &led_green;
 		led-running = &led_green;
 		led-upgrade = &led_green;
+		label-mac-device = &gmac1;
 	};
 
 	chosen {
diff --git a/target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi b/target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi
index e9050e02e5..919fb23c53 100644
--- a/target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi
+++ b/target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi
@@ -148,7 +148,7 @@
 					partname = "u-boot-env";
 
 					nvmem-layout {
-						compatible = "u-boot,env-layout";
+						compatible = "u-boot,env";
 					};
 				};
 
diff --git a/target/linux/mediatek/dts/mt7981b-abt-asr3000.dts b/target/linux/mediatek/dts/mt7981b-abt-asr3000.dts
new file mode 100644
index 0000000000..dd07def303
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-abt-asr3000.dts
@@ -0,0 +1,275 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include "mt7981.dtsi"
+
+/ {
+	model = "ABT ASR3000";
+	compatible = "abt,asr3000", "mediatek,mt7981";
+
+	aliases {
+		led-boot = &mesh_led;
+		led-failsafe = &mesh_led;
+		led-upgrade = &mesh_led;
+		label-mac-device = &gmac1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		rootdisk = <&ubi_rootdisk>;
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@40000000 {
+		reg = <0 0x40000000 0 0x10000000>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		button-reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+		};
+
+		button-mesh {
+			label = "mesh";
+			linux,code = <BTN_9>;
+			linux,input-type = <EV_SW>;
+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&pio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		led-1 {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		mesh_led: led-2 {
+			label = "green:mesh";
+			gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		led-3 {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 34 GPIO_ACTIVE_LOW>;
+		};
+
+		led-4 {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&eth {
+	status = "okay";
+
+	gmac0: mac@0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+
+		nvmem-cells = <&macaddr_art_0 0>;
+		nvmem-cell-names = "mac-address";
+
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-mode = "gmii";
+		phy-handle = <&int_gbe_phy>;
+
+		nvmem-cells = <&macaddr_art_0 0>;
+		nvmem-cell-names = "mac-address";
+	};
+};
+
+&mdio_bus {
+	switch: switch@1f {
+		compatible = "mediatek,mt7531";
+		reg = <31>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		interrupt-parent = <&pio>;
+		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+	};
+};
+
+&pio {
+	spi0_flash_pins: spi0-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+
+		conf-pu {
+			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+			drive-strength = <8>;
+			mediatek,pull-up-adv = <0>; /* bias-disable */
+		};
+
+		conf-pd {
+			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+			drive-strength = <8>;
+			mediatek,pull-up-adv = <0>; /* bias-disable */
+		};
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_flash_pins>;
+	status = "okay";
+
+	spi_nand: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		reg = <0>;
+
+		spi-max-frequency = <52000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bl2";
+				reg = <0x0 0x100000>;
+				read-only;
+			};
+
+			partition@100000 {
+				label = "u-boot-env";
+				reg = <0x100000 0x80000>;
+			};
+
+			partition@180000 {
+				label = "art";
+				reg = <0x180000 0x100000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_art_0: macaddr@0 {
+						compatible = "mac-base";
+						reg = <0x0 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+
+			partition@280000 {
+				label = "factory";
+				reg = <0x280000 0x100000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x1000>;
+					};
+				};
+			};
+
+			partition@380000 {
+				label = "fip";
+				reg = <0x380000 0x200000>;
+				read-only;
+			};
+
+			partition@580000 {
+				compatible = "linux,ubi";
+				label = "ubi";
+				reg = <0x580000 0x7a80000>;
+
+				volumes {
+					ubi_rootdisk: ubi-volume-fit {
+						volname = "fit";
+					};
+				};
+			};
+		};
+	};
+};
+
+&switch {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			label = "lan3";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan1";
+		};
+
+		port@6 {
+			reg = <6>;
+			ethernet = <&gmac0>;
+			phy-mode = "2500base-x";
+
+			fixed-link {
+				speed = <2500>;
+				full-duplex;
+				pause;
+			};
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&wifi {
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
+	status = "okay";
+};
diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso
index c1c9c75c27..e6b140bfad 100644
--- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso
+++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso
@@ -7,6 +7,29 @@
 	compatible = "cmcc,rax3000m", "mediatek,mt7981";
 
 	fragment@0 {
+		target = <&chosen>;
+		__overlay__ {
+			rootdisk = <&emmc_rootdisk>;
+		};
+	};
+
+	fragment@1 {
+		target = <&gmac0>;
+		__overlay__ {
+			nvmem-cells = <&macaddr_factory_2a 0>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+
+	fragment@2 {
+		target = <&gmac1>;
+		__overlay__ {
+			nvmem-cells = <&macaddr_factory_24 0>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+
+	fragment@3 {
 		target = <&mmc0>;
 		__overlay__ {
 			bus-width = <8>;
@@ -19,10 +42,51 @@
 			pinctrl-1 = <&mmc0_pins_uhs>;
 			vmmc-supply = <&reg_3p3v>;
 			status = "okay";
+
+			card@0 {
+				compatible = "mmc-card";
+				reg = <0>;
+
+				block {
+					compatible = "block-device";
+
+					partitions {
+						block-partition-factory {
+							partname = "factory";
+
+							nvmem-layout {
+								compatible = "fixed-layout";
+								#address-cells = <1>;
+								#size-cells = <1>;
+
+								eeprom_factory_0: eeprom@0 {
+									reg = <0x0 0x1000>;
+								};
+
+								macaddr_factory_24: macaddr@24 {
+									compatible = "mac-base";
+									reg = <0x24 0x6>;
+									#nvmem-cell-cells = <1>;
+								};
+
+								macaddr_factory_2a: macaddr@2a {
+									compatible = "mac-base";
+									reg = <0x2a 0x6>;
+									#nvmem-cell-cells = <1>;
+								};
+							};
+						};
+
+						emmc_rootdisk: block-partition-production {
+							partname = "production";
+						};
+					};
+				};
+			};
 		};
 	};
 
-	fragment@1 {
+	fragment@4 {
 		target = <&pio>;
 		__overlay__ {
 			mmc0_pins_default: mmc0-pins {
@@ -40,4 +104,12 @@
 			};
 		};
 	};
+
+	fragment@5 {
+		target = <&wifi>;
+		__overlay__ {
+			nvmem-cells = <&eeprom_factory_0>;
+			nvmem-cell-names = "eeprom";
+		};
+	};
 };
diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso
index 4d2b01cb63..fded878332 100644
--- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso
+++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso
@@ -7,6 +7,13 @@
 	compatible = "cmcc,rax3000m", "mediatek,mt7981";
 
 	fragment@0 {
+		target = <&chosen>;
+		__overlay__ {
+			rootdisk = <&ubi_rootdisk>;
+		};
+	};
+
+	fragment@1 {
 		target = <&gmac0>;
 		__overlay__ {
 			nvmem-cells = <&macaddr_factory_2a 0>;
@@ -14,7 +21,7 @@
 		};
 	};
 
-	fragment@1 {
+	fragment@2 {
 		target = <&gmac1>;
 		__overlay__ {
 			nvmem-cells = <&macaddr_factory_24 0>;
@@ -22,7 +29,7 @@
 		};
 	};
 
-	fragment@2 {
+	fragment@3 {
 		target = <&pio>;
 		__overlay__ {
 			spi0_flash_pins: spi0-pins {
@@ -46,7 +53,7 @@
 		};
 	};
 
-	fragment@3 {
+	fragment@4 {
 		target = <&spi0>;
 		__overlay__ {
 			pinctrl-names = "default";
@@ -79,7 +86,7 @@
 						reg = <0x100000 0x80000>;
 					};
 
-					factory: partition@180000 {
+					partition@180000 {
 						label = "factory";
 						reg = <0x180000 0x200000>;
 						read-only;
@@ -89,6 +96,10 @@
 							#address-cells = <1>;
 							#size-cells = <1>;
 
+							eeprom_factory_0: eeprom@0 {
+								reg = <0x0 0x1000>;
+							};
+
 							macaddr_factory_24: macaddr@24 {
 								compatible = "mac-base";
 								reg = <0x24 0x6>;
@@ -110,18 +121,26 @@
 					};
 
 					partition@580000 {
+						compatible = "linux,ubi";
 						label = "ubi";
 						reg = <0x580000 0x7200000>;
+
+						volumes {
+							ubi_rootdisk: ubi-volume-fit {
+								volname = "fit";
+							};
+						};
 					};
 				};
 			};
 		};
 	};
 
-	fragment@4 {
+	fragment@5 {
 		target = <&wifi>;
 		__overlay__ {
-			mediatek,mtd-eeprom = <&factory 0x0>;
+			nvmem-cells = <&eeprom_factory_0>;
+			nvmem-cell-names = "eeprom";
 		};
 	};
 };
diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts
index c8db5b58f5..977a613333 100644
--- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts
+++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m.dts
@@ -22,7 +22,8 @@
 		serial0 = &uart0;
 	};
 
-	chosen {
+	chosen: chosen {
+		bootargs-override = "root=/dev/fit0 rootwait";
 		stdout-path = "serial0:115200n8";
 	};
 
diff --git a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts
index 15818a90fc..0bd3ac0a29 100644
--- a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts
+++ b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts
@@ -164,7 +164,7 @@
 				block-partition-u-boot-env {
 					partname = "u-boot-env";
 					nvmem-layout {
-						compatible = "u-boot,env-layout";
+						compatible = "u-boot,env";
 					};
 				};
 			};
diff --git a/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts
index abd4d4e59d..264c985612 100644
--- a/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts
+++ b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts
@@ -32,7 +32,7 @@
 					partname = "u-boot-env";
 
 					nvmem-layout {
-						compatible = "u-boot,env-layout";
+						compatible = "u-boot,env";
 					};
 				};
 
diff --git a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts
index fd0e1a6915..fe55f2ea3a 100644
--- a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts
+++ b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts
@@ -325,7 +325,7 @@
 					partname = "u-boot-env";
 
 					nvmem-layout {
-						compatible = "u-boot,env-layout";
+						compatible = "u-boot,env";
 					};
 				};
 
diff --git a/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts b/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
index 372d4ec22a..7461cdd49b 100644
--- a/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
+++ b/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
@@ -133,8 +133,8 @@
 		reg = <6>;
 
 		reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
-		reset-assert-us = <10000>;
-		reset-deassert-us = <50000>;
+		reset-assert-us = <15000>;
+		reset-deassert-us = <68000>;
 		realtek,aldps-enable;
 	};
 
diff --git a/target/linux/mediatek/dts/mt7986a-tplink-tl-xtr8488.dts b/target/linux/mediatek/dts/mt7986a-tplink-tl-xtr8488.dts
new file mode 100644
index 0000000000..1b26b25f49
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7986a-tplink-tl-xtr8488.dts
@@ -0,0 +1,390 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+#include "mt7986a.dtsi"
+
+/ {
+	model = "TP-Link TL-XTR8488";
+	compatible = "tplink,tl-xtr8488", "mediatek,mt7986a";
+
+	aliases {
+		serial0 = &uart0;
+		label-mac-device = &gmac0;
+		led-boot = &led_status_green;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_green;
+		led-upgrade = &led_status_red;
+	};
+
+	chosen {
+		bootargs = "root=/dev/fit0 rootwait";
+		rootdisk = <&ubi_rootdisk>;
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0 0x40000000 0 0x40000000>;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_5v: regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 16 GPIO_ACTIVE_LOW>;
+		};
+
+		turbo {
+			label = "turbo";
+			linux,code = <BTN_1>;
+			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_red: status-red {
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_status_green: status-green {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
+		};
+
+		turbo {
+			label = "green:turbo";
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&crypto {
+	status = "okay";
+};
+
+&eth {
+	status = "okay";
+
+	gmac0: mac@0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+
+		nvmem-cells = <&macaddr_config_1c 0>;
+		nvmem-cell-names = "mac-address";
+
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-handle = <&phy7>;
+		phy-mode = "2500base-x";
+
+		nvmem-cells = <&macaddr_config_1c 1>;
+		nvmem-cell-names = "mac-address";
+	};
+
+	mdio: mdio-bus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
+
+&mdio {
+	phy5: phy@5 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <5>;
+		realtek,aldps-enable;
+	};
+
+	phy7: phy@7 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <7>;
+		realtek,aldps-enable;
+	};
+
+	switch: switch@1f {
+		compatible = "mediatek,mt7531";
+		reg = <31>;
+		reset-gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		interrupt-parent = <&pio>;
+		interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
+	};
+};
+
+&switch {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "lan5";
+			phy-handle = <&phy5>;
+			phy-mode = "2500base-x";
+		};
+
+		port@6 {
+			reg = <6>;
+			ethernet = <&gmac0>;
+			phy-mode = "2500base-x";
+
+			fixed-link {
+				speed = <2500>;
+				full-duplex;
+				pause;
+			};
+		};
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi_flash_pins>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "spi-nand";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+
+		spi-max-frequency = <20000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "bl2";
+				reg = <0x000000 0x0100000>;
+				read-only;
+			};
+
+			partition@100000 {
+				label = "config";
+				reg = <0x100000 0x0040000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_config_1c: macaddr@1c {
+						compatible = "mac-base";
+						reg = <0x1c 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+
+			partition@140000 {
+				label = "factory";
+				reg = <0x140000 0x0040000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x1000>;
+					};
+
+					eeprom_factory_1000: eeprom@1000 {
+						reg = <0x1000 0xe00>;
+					};
+				};
+			};
+
+			partition@180000 {
+				label = "reserved";
+				reg = <0x180000 0x0200000>;
+				read-only;
+			};
+
+			partition@380000 {
+				label = "fip";
+				reg = <0x380000 0x0200000>;
+				read-only;
+			};
+
+			partition@580000 {
+				compatible = "linux,ubi";
+				reg = <0x580000 0x7800000>;
+				label = "ubi";
+
+				volumes {
+					ubi_rootdisk: ubi-volume-fit {
+						volname = "fit";
+					};
+				};
+			};
+		};
+	};
+};
+
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_pins>;
+	status = "okay";
+
+	pcie@0,0 {
+		reg = <0x0000 0 0 0 0>;
+
+		wifi@0,0 {
+			compatible = "mediatek,mt76";
+			reg = <0x0000 0 0 0 0>;
+			ieee80211-freq-limit = <5470000 5875000>;
+
+			nvmem-cells = <&eeprom_factory_1000>, <&macaddr_config_1c 3>;
+			nvmem-cell-names = "eeprom", "mac-address";
+		};
+	};
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+&pio {
+	pcie_pins: pcie-pins {
+		mux {
+			function = "pcie";
+			groups = "pcie_clk", "pcie_wake", "pcie_pereset";
+		};
+	};
+
+	spi_flash_pins: spi-flash-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+		conf-pu {
+			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+			drive-strength = <8>;
+			mediatek,pull-up-adv = <0>; /* bias-disable */
+		};
+		conf-pd {
+			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+			drive-strength = <8>;
+			mediatek,pull-down-adv = <0>; /* bias-disable */
+		};
+	};
+
+	wf_2g_5g_pins: wf_2g_5g-pins {
+		mux {
+			function = "wifi";
+			groups = "wf_2g", "wf_5g";
+		};
+		conf {
+			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+			       "WF1_TOP_CLK", "WF1_TOP_DATA";
+			drive-strength = <4>;
+		};
+	};
+};
+
+&ssusb {
+	vusb33-supply = <&reg_3p3v>;
+	vbus-supply = <&reg_5v>;
+	status = "okay";
+};
+
+&trng {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb_phy {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&wifi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&wf_2g_5g_pins>;
+	ieee80211-freq-limit = <2400000 2500000>, <5170000 5350000>;
+	nvmem-cells = <&eeprom_factory_0>, <&macaddr_config_1c 2>;
+	nvmem-cell-names = "eeprom", "mac-address";
+	status = "okay";
+};
diff --git a/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart.dtsi b/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart.dtsi
index 2b468f9bb3..fac267abf4 100644
--- a/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart.dtsi
+++ b/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart.dtsi
@@ -481,8 +481,6 @@
 	max-frequency = <200000000>;
 	cap-mmc-highspeed;
 	mmc-hs200-1_8v;
-	mmc-hs400-1_8v;
-	hs400-ds-delay = <0x12814>;
 	vmmc-supply = <&reg_3p3v>;
 	vqmmc-supply = <&reg_1p8v>;
 	non-removable;
diff --git a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
index 4945185d69..cd266d6b0f 100644
--- a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
+++ b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
@@ -41,7 +41,7 @@
 						block-partition-env {
 							partname = "ubootenv";
 							nvmem-layout {
-								compatible = "u-boot,env-layout";
+								compatible = "u-boot,env";
 							};
 						};
 						emmc_rootfs: block-partition-production {
diff --git a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
index 1f5e1491a4..c2ab424e3e 100644
--- a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
+++ b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
@@ -39,7 +39,7 @@
 						block-partition-env {
 							partname = "ubootenv";
 							nvmem-layout {
-								compatible = "u-boot,env-layout";
+								compatible = "u-boot,env";
 							};
 						};
 						sd_rootfs: block-partition-production {
diff --git a/target/linux/mediatek/files/block/partitions/fit.c b/target/linux/mediatek/files/block/partitions/fit.c
index 463cd4e9ab..01b0f42c7c 100644
--- a/target/linux/mediatek/files/block/partitions/fit.c
+++ b/target/linux/mediatek/files/block/partitions/fit.c
@@ -161,7 +161,7 @@ int parse_fit_partitions(struct parsed_partitions *state, u64 fit_start_sector,
 
 	config = fdt_path_offset(fit, FIT_CONFS_PATH);
 	if (config < 0) {
-		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", FIT_CONFS_PATH, images);
+		printk(KERN_ERR "FIT: Cannot find %s node: %d\n", FIT_CONFS_PATH, config);
 		ret = -ENOENT;
 		goto ret_out;
 	}
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index 16d8617c54..82f61dd5d9 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -6,6 +6,11 @@ board=$(board_name)
 board_config_update
 
 case $board in
+abt,asr3000)
+	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
+	ucidef_set_led_netdev "wlan2g" "WLAN2G" "green:wlan-2ghz" "phy0-ap0"
+	ucidef_set_led_netdev "wlan5g" "WLAN5G" "green:wlan-5ghz" "phy1-ap0"
+	;;
 confiabits,mt7981)
 	ucidef_set_led_netdev "lan1" "lan1" "blue:lan-1" "lan1" "link tx rx"
 	ucidef_set_led_netdev "lan2" "lan2" "blue:lan-2" "lan2" "link tx rx"
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 1a210810bc..cf48926ad1 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -11,6 +11,13 @@ mediatek_setup_interfaces()
 	acelink,ew-7886cax)
 		ucidef_set_interface_lan "eth0" "dhcp"
 		;;
+	abt,asr3000|\
+	cmcc,rax3000m|\
+	h3c,magic-nx30-pro|\
+	nokia,ea0326gmp|\
+	zbtlink,zbt-z8103ax)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
+		;;
 	acer,predator-w6)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
 		;;
@@ -46,12 +53,6 @@ mediatek_setup_interfaces()
 	bananapi,bpi-r4-poe)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 eth1" "wan eth2"
 		;;
-	cmcc,rax3000m|\
-	h3c,magic-nx30-pro|\
-	nokia,ea0326gmp|\
-	zbtlink,zbt-z8103ax)
-		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
-		;;
 	comfast,cf-e393ax)
 		ucidef_set_interfaces_lan_wan "lan1" eth1
 		;;
@@ -70,7 +71,8 @@ mediatek_setup_interfaces()
 		;;
 	glinet,gl-mt6000|\
 	tplink,tl-xdr4288|\
-	tplink,tl-xdr6088)
+	tplink,tl-xdr6088|\
+	tplink,tl-xtr8488)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" eth1
 		;;
 	mediatek,mt7986a-rfb)
@@ -134,15 +136,6 @@ mediatek_setup_macs()
 	bananapi,bpi-r4)
 		wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1)
 		;;
-	cmcc,rax3000m)
-		case "$(cmdline_get_var root)" in
-		/dev/mmc*)
-			wan_mac=$(mmc_get_mac_binary factory 0x2a)
-			lan_mac=$(mmc_get_mac_binary factory 0x24)
-			label_mac=$wan_mac
-		;;
-		esac
-		;;
 	h3c,magic-nx30-pro)
 		wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr)
 		lan_mac=$(macaddr_add "$wan_mac" 1)
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
index 920a16d05d..c6900e6ebd 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
@@ -24,13 +24,6 @@ case "$FIRMWARE" in
 	;;
 "mediatek/mt7981_eeprom_mt7976_dbdc.bin")
 	case "$board" in
-	cmcc,rax3000m)
-		case "$(cmdline_get_var root)" in
-		/dev/mmc*)
-			caldata_extract_mmc "factory" 0x0 0x1000
-			;;
-		esac
-		;;
 	ubnt,unifi-6-plus)
 		caldata_extract_mmc "factory" 0x0 0x1000
 		;;
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index 942facee87..1605c0086d 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -10,6 +10,13 @@ PHYNBR=${DEVPATH##*/phy}
 board=$(board_name)
 
 case "$board" in
+	abt,asr3000)
+		# Originally, phy1 is phy0 mac with LA bit set. However, this would conflict
+		# addresses on multiple VIFs with the other radio. Use label mac to set LA bit.
+		addr=$(cat /sys/class/net/eth1/address)
+		[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
+		[ "$PHYNBR" = "1" ] && macaddr_setbit_la $addr > /sys${DEVPATH}/macaddress
+		;;
 	acer,predator-w6)
 		key_path="/var/qcidata/data"
 		[ "$PHYNBR" = "0" ] && cat $key_path/2gMAC > /sys${DEVPATH}/macaddress
@@ -55,15 +62,8 @@ case "$board" in
 		[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress
 		;;
 	cmcc,rax3000m)
-		case "$(cmdline_get_var root)" in
-		/dev/mmc*)
-			addr=$(mmc_get_mac_binary factory 0xa)
-			;;
-		*)
-			addr=$(mtd_get_mac_binary factory 0xa)
-			;;
-		esac
-		[ "$PHYNBR" = "1" ] && echo "$addr" > /sys${DEVPATH}/macaddress
+		addr=$(cat /sys/class/net/eth0/address)
+		[ "$PHYNBR" = "1" ] && macaddr_add $addr -1 > /sys${DEVPATH}/macaddress
 		;;
 	comfast,cf-e393ax)
 		addr=$(mtd_get_mac_binary "Factory" 0x8000)
@@ -159,6 +159,9 @@ case "$board" in
 	tplink,tl-xdr6088)
 		[ "$PHYNBR" = "0" ] && get_mac_label > /sys${DEVPATH}/macaddress
 		;;
+	tplink,tl-xtr8488)
+		[ "$PHYNBR" = "1" ] && get_mac_label > /sys${DEVPATH}/macaddress
+		;;
 	ubnt,unifi-6-plus)
 		addr=$(mtd_get_mac_binary EEPROM 0x6)
 		[ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index 800e6bc5de..2398040e33 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -64,6 +64,23 @@ platform_do_upgrade() {
 	local board=$(board_name)
 
 	case "$board" in
+	abt,asr3000|\
+	bananapi,bpi-r3|\
+	bananapi,bpi-r3-mini|\
+	bananapi,bpi-r4|\
+	bananapi,bpi-r4-poe|\
+	cmcc,rax3000m|\
+	jdcloud,re-cp-03|\
+	mediatek,mt7988a-rfb|\
+	nokia,ea0326gmp|\
+	openwrt,one|\
+	tplink,tl-xdr4288|\
+	tplink,tl-xdr6086|\
+	tplink,tl-xdr6088|\
+	tplink,tl-xtr8488|\
+	xiaomi,redmi-router-ax6000-ubootmod)
+		fit_do_upgrade "$1"
+		;;
 	acer,predator-w6|\
 	smartrg,sdg-8612|\
 	smartrg,sdg-8614|\
@@ -82,43 +99,6 @@ platform_do_upgrade() {
 		CI_KERNPART="linux"
 		nand_do_upgrade "$1"
 		;;
-	bananapi,bpi-r3|\
-	bananapi,bpi-r3-mini|\
-	bananapi,bpi-r4|\
-	bananapi,bpi-r4-poe|\
-	jdcloud,re-cp-03|\
-	mediatek,mt7988a-rfb|\
-	openwrt,one)
-		[ -e /dev/fit0 ] && fitblk /dev/fit0
-		[ -e /dev/fitrw ] && fitblk /dev/fitrw
-		bootdev="$(fitblk_get_bootdev)"
-		case "$bootdev" in
-		mmcblk*)
-			EMMC_KERN_DEV="/dev/$bootdev"
-			emmc_do_upgrade "$1"
-			;;
-		mtdblock*)
-			PART_NAME="/dev/mtd${bootdev:8}"
-			default_do_upgrade "$1"
-			;;
-		ubiblock*)
-			CI_KERNPART="fit"
-			nand_do_upgrade "$1"
-			;;
-		esac
-		;;
-	cmcc,rax3000m)
-		case "$(cmdline_get_var root)" in
-		/dev/mmc*)
-			CI_KERNPART="production"
-			emmc_do_upgrade "$1"
-			;;
-		*)
-			CI_KERNPART="fit"
-			nand_do_upgrade "$1"
-			;;
-		esac
-		;;
 	cudy,re3000-v1|\
 	cudy,wr3000-v1|\
 	yuncore,ax835)
@@ -147,16 +127,6 @@ platform_do_upgrade() {
 		CI_UBIPART="ubi0"
 		nand_do_upgrade "$1"
 		;;
-	nokia,ea0326gmp|\
-	tplink,tl-xdr4288|\
-	tplink,tl-xdr6086|\
-	tplink,tl-xdr6088|\
-	xiaomi,redmi-router-ax6000-ubootmod)
-		[ -e /dev/fit0 ] && fitblk /dev/fit0
-		[ -e /dev/fitrw ] && fitblk /dev/fitrw
-		CI_KERNPART="fit"
-		nand_do_upgrade "$1"
-		;;
 	ubnt,unifi-6-plus)
 		CI_KERNPART="kernel0"
 		EMMC_ROOT_DEV="$(cmdline_get_var root)"
@@ -207,6 +177,7 @@ platform_check_image() {
 
 	case "$board" in
 	bananapi,bpi-r3|\
+	bananapi,bpi-r3-mini|\
 	bananapi,bpi-r4|\
 	bananapi,bpi-r4-poe|\
 	cmcc,rax3000m)
@@ -227,22 +198,14 @@ platform_check_image() {
 
 platform_copy_config() {
 	case "$(board_name)" in
-	cmcc,rax3000m)
-		case "$(cmdline_get_var root)" in
-		/dev/mmc*)
-			emmc_copy_config
-			;;
-		esac
-		;;
 	bananapi,bpi-r3|\
 	bananapi,bpi-r3-mini|\
 	bananapi,bpi-r4|\
-	bananapi,bpi-r4-poe)
-		case "$(fitblk_get_bootdev)" in
-		mmcblk*)
+	bananapi,bpi-r4-poe|\
+	cmcc,rax3000m)
+		if [ "$CI_METHOD" = "emmc" ]; then
 			emmc_copy_config
-			;;
-		esac
+		fi
 		;;
 	acer,predator-w6|\
 	glinet,gl-mt2500|\
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 94b3098b3d..453bdf1046 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -105,6 +105,30 @@ define Build/cetron-header
 	rm $@.tmp
 endef
 
+define Device/abt_asr3000
+  DEVICE_VENDOR := ABT
+  DEVICE_MODEL := ASR3000
+  DEVICE_DTS := mt7981b-abt-asr3000
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  KERNEL_IN_UBI := 1
+  UBOOTENV_IN_UBI := 1
+  IMAGES := sysupgrade.itb
+  KERNEL_INITRAMFS_SUFFIX := -recovery.itb
+  KERNEL := kernel-bin | gzip
+  KERNEL_INITRAMFS := kernel-bin | lzma | \
+        fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+  IMAGE/sysupgrade.itb := append-kernel | \
+        fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
+  ARTIFACTS := preloader.bin bl31-uboot.fip
+  ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
+  ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot abt_asr3000
+endef
+TARGET_DEVICES += abt_asr3000
+
 define Device/acelink_ew-7886cax
   DEVICE_VENDOR := Acelink
   DEVICE_MODEL := EW-7886CAX
@@ -444,7 +468,7 @@ endef
 TARGET_DEVICES += cmcc_rax3000m
 
 define Device/comfast_cf-e393ax
-  DEVICE_VENDOR := Comfast
+  DEVICE_VENDOR := COMFAST
   DEVICE_MODEL := CF-E393AX
   DEVICE_DTS := mt7981a-comfast-cf-e393ax
   DEVICE_DTS_DIR := ../dts
@@ -1143,9 +1167,19 @@ define Device/tplink_tl-xdr6088
 endef
 TARGET_DEVICES += tplink_tl-xdr6088
 
+define Device/tplink_tl-xtr8488
+  DEVICE_MODEL := TL-XTR8488
+  DEVICE_DTS := mt7986a-tplink-tl-xtr8488
+  $(call Device/tplink_tl-xdr-common)
+  DEVICE_PACKAGES += kmod-mt7915-firmware
+  ARTIFACT/preloader.bin := mt7986-bl2 spim-nand-ddr4
+  ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot tplink_tl-xtr8488
+endef
+TARGET_DEVICES += tplink_tl-xtr8488
+
 define Device/ubnt_unifi-6-plus
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 Plus
+  DEVICE_MODEL := UniFi U6+
   DEVICE_DTS := mt7981a-ubnt-unifi-6-plus
   DEVICE_DTS_DIR := ../dts
   DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware e2fsprogs f2fsck mkf2fs fdisk partx-utils
diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
index f91720479a..e1d9a09c64 100644
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@@ -328,7 +328,7 @@ TARGET_DEVICES += totolink_a8000ru
 
 define Device/ubnt_unifi-6-lr-v1
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v1
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v1
@@ -340,7 +340,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v1
 
 define Device/ubnt_unifi-6-lr-v1-ubootmod
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v1 U-Boot mod
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v1-ubootmod
   DEVICE_DTS_DIR := ../dts
@@ -359,7 +359,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v1-ubootmod
 
 define Device/ubnt_unifi-6-lr-v2
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v2
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v2
@@ -370,7 +370,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v2
 
 define Device/ubnt_unifi-6-lr-v2-ubootmod
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v2 U-Boot mod
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v2-ubootmod
   DEVICE_DTS_DIR := ../dts
@@ -388,7 +388,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v2-ubootmod
 
 define Device/ubnt_unifi-6-lr-v3
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v3
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v3
@@ -399,7 +399,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v3
 
 define Device/ubnt_unifi-6-lr-v3-ubootmod
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v3 U-Boot mod
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v3-ubootmod
   DEVICE_DTS_DIR := ../dts
diff --git a/target/linux/mediatek/image/mt7629.mk b/target/linux/mediatek/image/mt7629.mk
index 9f0ea98950..57c0a5bc54 100644
--- a/target/linux/mediatek/image/mt7629.mk
+++ b/target/linux/mediatek/image/mt7629.mk
@@ -27,6 +27,22 @@ define Device/iptime_a6004mx
 endef
 TARGET_DEVICES += iptime_a6004mx
 
+define Device/linksys_ea7500-v3
+  $(Device/uimage-lzma-loader)
+  DEVICE_VENDOR := Linksys
+  DEVICE_MODEL := EA7500
+  DEVICE_VARIANT := v3
+  DEVICE_DTS := mt7629-linksys-ea7500-v3
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_PACKAGES := kmod-usb3 uboot-envtools
+  IMAGE_SIZE := 40m
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata | check-size
+endef
+TARGET_DEVICES += linksys_ea7500-v3
+
 define Device/netgear_ex6250-v2
   DEVICE_VENDOR := NETGEAR
   DEVICE_MODEL := EX6250
diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
index 59375ccd9b..61025fb380 100755
--- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
@@ -12,25 +12,8 @@ platform_do_upgrade() {
 	ubnt,unifi-6-lr-v2-ubootmod|\
 	ubnt,unifi-6-lr-v3-ubootmod|\
 	xiaomi,redmi-router-ax6s)
-		[ -e /dev/fit0 ] && fitblk /dev/fit0
-		[ -e /dev/fitrw ] && fitblk /dev/fitrw
-		bootdev="$(fitblk_get_bootdev)"
-		case "$bootdev" in
-		mmcblk*)
-			EMMC_KERN_DEV="/dev/$bootdev"
-			emmc_do_upgrade "$1"
-			;;
-		mtdblock*)
-			PART_NAME="/dev/mtd${bootdev:8}"
-			default_do_upgrade "$1"
-			;;
-		ubiblock*)
-			CI_KERNPART="fit"
-			nand_do_upgrade "$1"
-			;;
-		esac
+		fit_do_upgrade "$1"
 		;;
-
 	buffalo,wsr-2533dhp2|\
 	buffalo,wsr-3200ax4s)
 		local magic="$(get_magic_long "$1")"
@@ -103,7 +86,7 @@ platform_check_image() {
 platform_copy_config() {
 	case "$(board_name)" in
 	bananapi,bpi-r64)
-		if fitblk_get_bootdev | grep -q mmc; then
+		if [ "$CI_METHOD" = "emmc" ]; then
 			emmc_copy_config
 		fi
 		;;
diff --git a/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
index 9cfb15cf3d..bce6709a58 100755
--- a/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh
@@ -1,4 +1,5 @@
 REQUIRE_IMAGE_METADATA=1
+RAMFS_COPY_BIN='fitblk'
 
 # Legacy full system upgrade including preloader for MediaTek SoCs on eMMC or SD
 legacy_mtk_mmc_full_upgrade() {
@@ -83,11 +84,7 @@ platform_do_upgrade() {
 	case "$board" in
 	bananapi,bpi-r2|\
 	unielec,u7623-02)
-		[ -e /dev/fit0 ] && fitblk /dev/fit0
-		[ -e /dev/fitrw ] && fitblk /dev/fitrw
-		bootdev="$(fitblk_get_bootdev)"
-		EMMC_KERN_DEV="/dev/$bootdev"
-		emmc_do_upgrade "$1"
+		fit_do_upgrade "$1"
 		;;
 	unielec,u7623-02-emmc-512m)
 		local magic="$(get_magic_long "$1")"
diff --git a/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
index df042f8ad2..875ed34dcc 100644
--- a/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/mt7629/base-files/etc/board.d/02_network
@@ -8,7 +8,8 @@ mediatek_setup_interfaces()
 	local board="$1"
 
 	case $board in
-	iptime,a6004mx)
+	iptime,a6004mx|\
+	linksys,ea7500-v3)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "eth1"
 		;;
 	mediatek,mt7629-rfb)
@@ -28,6 +29,11 @@ mediatek_setup_macs()
 	local board="$1"
 
 	case $board in
+	linksys,ea7500-v3)
+		lan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
+		wan_mac=$lan_mac
+		label_mac=$lan_mac
+		;;
 	netgear,ex6250-v2)
 		lan_mac=$(mtd_get_mac_ascii Config mac)
 		label_mac=$lan_mac
diff --git a/target/linux/mediatek/mt7629/base-files/etc/init.d/bootcount b/target/linux/mediatek/mt7629/base-files/etc/init.d/bootcount
index a6b8fac1d9..959944fef8 100755
--- a/target/linux/mediatek/mt7629/base-files/etc/init.d/bootcount
+++ b/target/linux/mediatek/mt7629/base-files/etc/init.d/bootcount
@@ -13,5 +13,8 @@ boot() {
 			exit 1
 		fi
 		;;
+	linksys,ea7500-v3)
+		mtd resetbc s_env || true
+		;;
 	esac
 }
diff --git a/target/linux/mediatek/mt7629/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7629/base-files/lib/upgrade/platform.sh
index f10ad14b49..ebd3678c2e 100755
--- a/target/linux/mediatek/mt7629/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7629/base-files/lib/upgrade/platform.sh
@@ -12,6 +12,11 @@ platform_do_upgrade() {
 	iptime,a6004mx)
 		nand_do_upgrade "$1"
 		;;
+	linksys,ea7500-v3)
+		fw_setenv boot_part 1
+		fw_setenv bootimage 1
+		nand_do_upgrade "$1"
+		;;
 	*)
 		default_do_upgrade "$1"
 		;;
diff --git a/target/linux/mediatek/patches-6.6/041-block-fit-partition-parser.patch b/target/linux/mediatek/patches-6.6/041-block-fit-partition-parser.patch
index 49fc7e638c..de91497a85 100644
--- a/target/linux/mediatek/patches-6.6/041-block-fit-partition-parser.patch
+++ b/target/linux/mediatek/patches-6.6/041-block-fit-partition-parser.patch
@@ -92,7 +92,7 @@ Subject: [PATCH] kernel: add block fit partition parser
  #ifdef CONFIG_SGI_PARTITION
  	sgi_partition,
  #endif
-@@ -430,6 +436,11 @@ static struct block_device *add_partitio
+@@ -464,6 +470,11 @@ static struct block_device *add_partitio
  			goto out_del;
  	}
  
@@ -104,7 +104,7 @@ Subject: [PATCH] kernel: add block fit partition parser
  	/* everything is up and running, commence */
  	err = xa_insert(&disk->part_tbl, partno, bdev, GFP_KERNEL);
  	if (err)
-@@ -622,6 +633,11 @@ static bool blk_add_partition(struct gen
+@@ -656,6 +667,11 @@ static bool blk_add_partition(struct gen
  	    (state->parts[p].flags & ADDPART_FLAG_RAID))
  		md_autodetect_dev(part->bd_dev);
  
diff --git a/target/linux/mediatek/patches-6.6/330-snand-mtk-bmt-support.patch b/target/linux/mediatek/patches-6.6/330-snand-mtk-bmt-support.patch
index 8a4ec2bcbd..de8e880643 100644
--- a/target/linux/mediatek/patches-6.6/330-snand-mtk-bmt-support.patch
+++ b/target/linux/mediatek/patches-6.6/330-snand-mtk-bmt-support.patch
@@ -8,7 +8,7 @@
  
  static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
  {
-@@ -1345,6 +1346,7 @@ static int spinand_probe(struct spi_mem
+@@ -1346,6 +1347,7 @@ static int spinand_probe(struct spi_mem
  	if (ret)
  		return ret;
  
@@ -16,7 +16,7 @@
  	ret = mtd_device_register(mtd, NULL, 0);
  	if (ret)
  		goto err_spinand_cleanup;
-@@ -1352,6 +1354,7 @@ static int spinand_probe(struct spi_mem
+@@ -1353,6 +1355,7 @@ static int spinand_probe(struct spi_mem
  	return 0;
  
  err_spinand_cleanup:
@@ -24,7 +24,7 @@
  	spinand_cleanup(spinand);
  
  	return ret;
-@@ -1370,6 +1373,7 @@ static int spinand_remove(struct spi_mem
+@@ -1371,6 +1374,7 @@ static int spinand_remove(struct spi_mem
  	if (ret)
  		return ret;
  
diff --git a/target/linux/mediatek/patches-6.6/432-drivers-spi-Add-support-for-dynamic-calibration.patch b/target/linux/mediatek/patches-6.6/432-drivers-spi-Add-support-for-dynamic-calibration.patch
index 7ad07c3583..19fe984aa6 100644
--- a/target/linux/mediatek/patches-6.6/432-drivers-spi-Add-support-for-dynamic-calibration.patch
+++ b/target/linux/mediatek/patches-6.6/432-drivers-spi-Add-support-for-dynamic-calibration.patch
@@ -224,7 +224,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
  	int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs);
  
  	/*
-@@ -1600,6 +1639,9 @@ spi_register_board_info(struct spi_board
+@@ -1601,6 +1640,9 @@ spi_register_board_info(struct spi_board
  	{ return 0; }
  #endif
  
diff --git a/target/linux/mediatek/patches-6.6/830-v6.7-39-thermal-lvts-Convert-to-platform-remove-callback-ret.patch b/target/linux/mediatek/patches-6.6/830-v6.7-39-thermal-lvts-Convert-to-platform-remove-callback-ret.patch
index 76fe8326d6..2793f3857f 100644
--- a/target/linux/mediatek/patches-6.6/830-v6.7-39-thermal-lvts-Convert-to-platform-remove-callback-ret.patch
+++ b/target/linux/mediatek/patches-6.6/830-v6.7-39-thermal-lvts-Convert-to-platform-remove-callback-ret.patch
@@ -29,7 +29,7 @@ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
 
 --- a/drivers/thermal/mediatek/lvts_thermal.c
 +++ b/drivers/thermal/mediatek/lvts_thermal.c
-@@ -1247,7 +1247,7 @@ static int lvts_probe(struct platform_de
+@@ -1249,7 +1249,7 @@ static int lvts_probe(struct platform_de
  	return 0;
  }
  
@@ -38,7 +38,7 @@ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  {
  	struct lvts_domain *lvts_td;
  	int i;
-@@ -1258,8 +1258,6 @@ static int lvts_remove(struct platform_d
+@@ -1260,8 +1260,6 @@ static int lvts_remove(struct platform_d
  		lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], false);
  
  	lvts_debugfs_exit(lvts_td);
@@ -47,7 +47,7 @@ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  }
  
  static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
-@@ -1360,7 +1358,7 @@ MODULE_DEVICE_TABLE(of, lvts_of_match);
+@@ -1362,7 +1360,7 @@ MODULE_DEVICE_TABLE(of, lvts_of_match);
  
  static struct platform_driver lvts_driver = {
  	.probe = lvts_probe,
diff --git a/target/linux/mediatek/patches-6.6/830-v6.7-40-thermal-drivers-mediatek-lvts_thermal-Make-coeff-con.patch b/target/linux/mediatek/patches-6.6/830-v6.7-40-thermal-drivers-mediatek-lvts_thermal-Make-coeff-con.patch
index 0b965c9521..a9f84a4c7d 100644
--- a/target/linux/mediatek/patches-6.6/830-v6.7-40-thermal-drivers-mediatek-lvts_thermal-Make-coeff-con.patch
+++ b/target/linux/mediatek/patches-6.6/830-v6.7-40-thermal-drivers-mediatek-lvts_thermal-Make-coeff-con.patch
@@ -171,7 +171,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
  
  		lvts_ctrl[i].low_thresh = INT_MIN;
  		lvts_ctrl[i].high_thresh = INT_MIN;
-@@ -1229,6 +1240,8 @@ static int lvts_probe(struct platform_de
+@@ -1231,6 +1242,8 @@ static int lvts_probe(struct platform_de
  	if (irq < 0)
  		return irq;
  
@@ -180,7 +180,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
  	ret = lvts_domain_init(dev, lvts_td, lvts_data);
  	if (ret)
  		return dev_err_probe(dev, ret, "Failed to initialize the lvts domain\n");
-@@ -1342,11 +1355,15 @@ static const struct lvts_ctrl_data mt819
+@@ -1344,11 +1357,15 @@ static const struct lvts_ctrl_data mt819
  static const struct lvts_data mt8195_lvts_mcu_data = {
  	.lvts_ctrl	= mt8195_lvts_mcu_data_ctrl,
  	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
diff --git a/target/linux/mediatek/patches-6.6/830-v6.7-42-thermal-drivers-mediatek-lvts_thermal-Add-mt7988-sup.patch b/target/linux/mediatek/patches-6.6/830-v6.7-42-thermal-drivers-mediatek-lvts_thermal-Add-mt7988-sup.patch
index 65d90899f8..a32d950fc9 100644
--- a/target/linux/mediatek/patches-6.6/830-v6.7-42-thermal-drivers-mediatek-lvts_thermal-Add-mt7988-sup.patch
+++ b/target/linux/mediatek/patches-6.6/830-v6.7-42-thermal-drivers-mediatek-lvts_thermal-Add-mt7988-sup.patch
@@ -33,7 +33,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de
  #define LVTS_HW_SHUTDOWN_MT8195		105000
  
  #define LVTS_MINIMUM_THRESHOLD		20000
-@@ -1273,6 +1276,33 @@ static void lvts_remove(struct platform_
+@@ -1275,6 +1278,33 @@ static void lvts_remove(struct platform_
  	lvts_debugfs_exit(lvts_td);
  }
  
@@ -67,7 +67,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de
  static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
  	{
  		.cal_offset = { 0x04, 0x07 },
-@@ -1352,6 +1382,13 @@ static const struct lvts_ctrl_data mt819
+@@ -1354,6 +1384,13 @@ static const struct lvts_ctrl_data mt819
  	}
  };
  
@@ -81,7 +81,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de
  static const struct lvts_data mt8195_lvts_mcu_data = {
  	.lvts_ctrl	= mt8195_lvts_mcu_data_ctrl,
  	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
-@@ -1367,6 +1404,7 @@ static const struct lvts_data mt8195_lvt
+@@ -1369,6 +1406,7 @@ static const struct lvts_data mt8195_lvt
  };
  
  static const struct of_device_id lvts_of_match[] = {
diff --git a/target/linux/mediatek/patches-6.6/830-v6.7-45-thermal-drivers-mediatek-lvts_thermal-Add-suspend-an.patch b/target/linux/mediatek/patches-6.6/830-v6.7-45-thermal-drivers-mediatek-lvts_thermal-Add-suspend-an.patch
index 98946fc814..46e1eeb239 100644
--- a/target/linux/mediatek/patches-6.6/830-v6.7-45-thermal-drivers-mediatek-lvts_thermal-Add-suspend-an.patch
+++ b/target/linux/mediatek/patches-6.6/830-v6.7-45-thermal-drivers-mediatek-lvts_thermal-Add-suspend-an.patch
@@ -24,7 +24,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-3-bero@baylibre.com
 
 --- a/drivers/thermal/mediatek/lvts_thermal.c
 +++ b/drivers/thermal/mediatek/lvts_thermal.c
-@@ -1303,6 +1303,38 @@ static const struct lvts_ctrl_data mt798
+@@ -1305,6 +1305,38 @@ static const struct lvts_ctrl_data mt798
  	}
  };
  
@@ -63,7 +63,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-3-bero@baylibre.com
  static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
  	{
  		.cal_offset = { 0x04, 0x07 },
-@@ -1411,12 +1443,17 @@ static const struct of_device_id lvts_of
+@@ -1413,12 +1445,17 @@ static const struct of_device_id lvts_of
  };
  MODULE_DEVICE_TABLE(of, lvts_of_match);
  
diff --git a/target/linux/mediatek/patches-6.6/830-v6.7-47-thermal-drivers-mediatek-lvts_thermal-Add-mt8192-sup.patch b/target/linux/mediatek/patches-6.6/830-v6.7-47-thermal-drivers-mediatek-lvts_thermal-Add-mt8192-sup.patch
index d478856359..3b7d9489f2 100644
--- a/target/linux/mediatek/patches-6.6/830-v6.7-47-thermal-drivers-mediatek-lvts_thermal-Add-mt8192-sup.patch
+++ b/target/linux/mediatek/patches-6.6/830-v6.7-47-thermal-drivers-mediatek-lvts_thermal-Add-mt8192-sup.patch
@@ -34,7 +34,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com
  #define LVTS_HW_SHUTDOWN_MT8195		105000
  
  #define LVTS_MINIMUM_THRESHOLD		20000
-@@ -1335,6 +1336,88 @@ static int lvts_resume(struct device *de
+@@ -1337,6 +1338,88 @@ static int lvts_resume(struct device *de
  	return 0;
  }
  
@@ -123,7 +123,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com
  static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
  	{
  		.cal_offset = { 0x04, 0x07 },
-@@ -1421,6 +1504,16 @@ static const struct lvts_data mt7988_lvt
+@@ -1423,6 +1506,16 @@ static const struct lvts_data mt7988_lvt
  	.temp_offset	= LVTS_COEFF_B_MT7988,
  };
  
@@ -140,7 +140,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com
  static const struct lvts_data mt8195_lvts_mcu_data = {
  	.lvts_ctrl	= mt8195_lvts_mcu_data_ctrl,
  	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
-@@ -1437,6 +1530,8 @@ static const struct lvts_data mt8195_lvt
+@@ -1439,6 +1532,8 @@ static const struct lvts_data mt8195_lvt
  
  static const struct of_device_id lvts_of_match[] = {
  	{ .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data },
diff --git a/target/linux/mediatek/patches-6.6/911-dts-mt7622-bpi-r64-add-rootdisk.patch b/target/linux/mediatek/patches-6.6/911-dts-mt7622-bpi-r64-add-rootdisk.patch
index 4feb0e5d1a..a28d274493 100644
--- a/target/linux/mediatek/patches-6.6/911-dts-mt7622-bpi-r64-add-rootdisk.patch
+++ b/target/linux/mediatek/patches-6.6/911-dts-mt7622-bpi-r64-add-rootdisk.patch
@@ -25,7 +25,7 @@
 +				block-partition-env {
 +					partname = "ubootenv";
 +					nvmem-layout {
-+						compatible = "u-boot,env-layout";
++						compatible = "u-boot,env";
 +					};
 +				};
 +				emmc_rootfs: block-partition-production {
@@ -52,7 +52,7 @@
 +				block-partition-env {
 +					partname = "ubootenv";
 +					nvmem-layout {
-+						compatible = "u-boot,env-layout";
++						compatible = "u-boot,env";
 +					};
 +				};
 +				sd_rootfs: block-partition-production {
diff --git a/target/linux/mediatek/patches-6.6/951-net-ethernet-mtk_wed-fix-use-after-free-panic-in-mtk.patch b/target/linux/mediatek/patches-6.6/951-net-ethernet-mtk_wed-fix-use-after-free-panic-in-mtk.patch
new file mode 100644
index 0000000000..1647b056e0
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/951-net-ethernet-mtk_wed-fix-use-after-free-panic-in-mtk.patch
@@ -0,0 +1,59 @@
+From 3da41fe88ff52c578f3155550bcbe0ecf388f079 Mon Sep 17 00:00:00 2001
+From: Zheng Zhang <everything411@qq.com>
+Date: Sat, 10 Aug 2024 12:01:56 +0800
+Subject: [PATCH] net: ethernet: mtk_wed: fix use-after-free panic in
+ mtk_wed_setup_tc_block_cb()
+
+When there are multiple ap interfaces on one band and with WED on,
+turning the interface down will cause a kernel panic on MT798X.
+
+Previously, cb_priv was freed in mtk_wed_setup_tc_block() without
+marking NULL,and mtk_wed_setup_tc_block_cb() didn't check the value, too.
+
+Assign NULL after free cb_priv in mtk_wed_setup_tc_block() and check NULL
+in mtk_wed_setup_tc_block_cb().
+
+----------
+Unable to handle kernel paging request at virtual address 0072460bca32b4f5
+Call trace:
+ mtk_wed_setup_tc_block_cb+0x4/0x38
+ 0xffffffc0794084bc
+ tcf_block_playback_offloads+0x70/0x1e8
+ tcf_block_unbind+0x6c/0xc8
+...
+---------
+
+Fixes: 799684448e3e ("net: ethernet: mtk_wed: introduce wed wo support")
+Signed-off-by: Zheng Zhang <everything411@qq.com>
+---
+ drivers/net/ethernet/mediatek/mtk_wed.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_wed.c
++++ b/drivers/net/ethernet/mediatek/mtk_wed.c
+@@ -2685,14 +2685,15 @@ mtk_wed_setup_tc_block_cb(enum tc_setup_
+ {
+ 	struct mtk_wed_flow_block_priv *priv = cb_priv;
+ 	struct flow_cls_offload *cls = type_data;
+-	struct mtk_wed_hw *hw = priv->hw;
++	struct mtk_wed_hw *hw = NULL;
+ 
+-	if (!tc_can_offload(priv->dev))
++	if (!priv || !tc_can_offload(priv->dev))
+ 		return -EOPNOTSUPP;
+ 
+ 	if (type != TC_SETUP_CLSFLOWER)
+ 		return -EOPNOTSUPP;
+ 
++	hw = priv->hw;
+ 	return mtk_flow_offload_cmd(hw->eth, cls, hw->index);
+ }
+ 
+@@ -2748,6 +2749,7 @@ mtk_wed_setup_tc_block(struct mtk_wed_hw
+ 			flow_block_cb_remove(block_cb, f);
+ 			list_del(&block_cb->driver_list);
+ 			kfree(block_cb->cb_priv);
++			block_cb->cb_priv = NULL;
+ 		}
+ 		return 0;
+ 	default:
diff --git a/target/linux/mpc85xx/Makefile b/target/linux/mpc85xx/Makefile
index b9bf0eaff0..a095714c8a 100644
--- a/target/linux/mpc85xx/Makefile
+++ b/target/linux/mpc85xx/Makefile
@@ -11,8 +11,7 @@ CPU_TYPE:=8548
 FEATURES:=squashfs ramdisk nand
 SUBTARGETS:=p1010 p1020 p2020
 
-KERNEL_PATCHVER:=6.1
-KERNEL_TESTING_PATCHVER:=6.6
+KERNEL_PATCHVER:=6.6
 
 KERNELNAME:=zImage
 
@@ -21,6 +20,6 @@ include $(INCLUDE_DIR)/target.mk
 DEFAULT_PACKAGES += \
 	kmod-input-core kmod-input-gpio-keys kmod-button-hotplug \
 	kmod-leds-gpio swconfig kmod-ath9k wpad-basic-mbedtls kmod-usb2 \
-	uboot-envtools
+	uboot-envtools kmod-crypto-hw-talitos
 
 $(eval $(call BuildTarget))
diff --git a/target/linux/mpc85xx/base-files/etc/board.d/02_network b/target/linux/mpc85xx/base-files/etc/board.d/02_network
index 2574ebc9b9..e5afcf7df6 100644
--- a/target/linux/mpc85xx/base-files/etc/board.d/02_network
+++ b/target/linux/mpc85xx/base-files/etc/board.d/02_network
@@ -24,9 +24,7 @@ hpe,msm460)
 	ucidef_set_interface_lan "eth0"
 	;;	
 ocedo,panda)
-	ucidef_set_interface_wan "eth1"
-	ucidef_add_switch "switch0" \
-		"0:lan" "1:lan" "2:lan" "3:lan" "4:lan" "5:lan" "6:lan" "7:lan" "8u@eth0"
+	ucidef_set_interface_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8" "eth1"
 	;;
 tplink,tl-wdr4900-v1)
 	ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
diff --git a/target/linux/mpc85xx/config-6.1 b/target/linux/mpc85xx/config-6.1
deleted file mode 100644
index c017422714..0000000000
--- a/target/linux/mpc85xx/config-6.1
+++ /dev/null
@@ -1,295 +0,0 @@
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_ADVANCED_OPTIONS is not set
-CONFIG_ARCH_32BIT_OFF_T=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_KEEP_MEMBLOCK=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
-CONFIG_ARCH_MMAP_RND_BITS=11
-CONFIG_ARCH_MMAP_RND_BITS_MAX=17
-CONFIG_ARCH_MMAP_RND_BITS_MIN=11
-CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
-CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
-CONFIG_ARCH_SPLIT_ARG64=y
-CONFIG_ARCH_STACKWALK=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
-CONFIG_ASN1=y
-CONFIG_AUDIT_ARCH=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BOOKE=y
-CONFIG_BOOKE_OR_40x=y
-CONFIG_BOOKE_WDT=y
-# CONFIG_BR200_WP is not set
-# CONFIG_BSC9131_RDB is not set
-# CONFIG_BSC9132_QDS is not set
-# CONFIG_C293_PCIE is not set
-CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
-CONFIG_CC_NO_ARRAY_BOUNDS=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CLZ_TAB=y
-CONFIG_CMDLINE="console=ttyS0,115200"
-CONFIG_CMDLINE_FROM_BOOTLOADER=y
-# CONFIG_CMDLINE_OVERRIDE is not set
-# CONFIG_COMMON_CLK is not set
-CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
-CONFIG_COMPAT_32BIT_TIME=y
-# CONFIG_CORENET_GENERIC is not set
-# CONFIG_CPM2 is not set
-CONFIG_CPU_BIG_ENDIAN=y
-# CONFIG_CRYPTO_AES_PPC_SPE is not set
-CONFIG_CRYPTO_AUTHENC=y
-CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
-CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
-CONFIG_CRYPTO_LIB_SHA1=y
-CONFIG_CRYPTO_LIB_UTILS=y
-# CONFIG_CRYPTO_MD5_PPC is not set
-CONFIG_CRYPTO_RNG=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_RSA=y
-# CONFIG_CRYPTO_SHA1_PPC is not set
-# CONFIG_CRYPTO_SHA1_PPC_SPE is not set
-# CONFIG_CRYPTO_SHA256_PPC_SPE is not set
-CONFIG_DATA_SHIFT=24
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DNOTIFY=y
-CONFIG_DTC=y
-CONFIG_E500_CPU=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_EDAC=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-# CONFIG_EDAC_DEBUG is not set
-CONFIG_EDAC_LEGACY_SYSFS=y
-CONFIG_EDAC_MPC85XX=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EXCLUSIVE_SYSTEM_RAM=y
-# CONFIG_FIREBOX_T10 is not set
-CONFIG_FIXED_PHY=y
-CONFIG_FSL_EMB_PERFMON=y
-# CONFIG_FSL_FMAN is not set
-CONFIG_FSL_LBC=y
-CONFIG_FSL_PCI=y
-CONFIG_FSL_PQ_MDIO=y
-CONFIG_FSL_SOC=y
-CONFIG_FSL_SOC_BOOKE=y
-CONFIG_FWNODE_MDIO=y
-CONFIG_FW_LOADER_PAGED_BUF=y
-CONFIG_FW_LOADER_SYSFS=y
-CONFIG_GCC11_NO_ARRAY_BOUNDS=y
-CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_CPU_VULNERABILITIES=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_GETTIMEOFDAY=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GEN_RTC=y
-# CONFIG_GE_IMP3A is not set
-CONFIG_GIANFAR=y
-CONFIG_GPIO_CDEV=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_MPC8XXX=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HIVEAP_330 is not set
-CONFIG_HW_RANDOM=y
-CONFIG_HZ_PERIODIC=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_MPC=y
-CONFIG_ILLEGAL_POINTER_VALUE=0
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_ISA_DMA_API=y
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_KSI8560 is not set
-CONFIG_LIBFDT=y
-CONFIG_LOCK_DEBUGGING_SUPPORT=y
-CONFIG_LOWMEM_CAM_NUM=9
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_LXT_PHY=y
-# CONFIG_MATH_EMULATION is not set
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVICE=y
-CONFIG_MDIO_DEVRES=y
-CONFIG_MEMFD_CREATE=y
-CONFIG_MIGRATION=y
-CONFIG_MMU_GATHER_MERGE_VMAS=y
-CONFIG_MMU_GATHER_PAGE_SIZE=y
-CONFIG_MODULES_USE_ELF_RELA=y
-# CONFIG_MPC8536_DS is not set
-# CONFIG_MPC8540_ADS is not set
-# CONFIG_MPC8560_ADS is not set
-# CONFIG_MPC85xx_CDS is not set
-# CONFIG_MPC85xx_DS is not set
-# CONFIG_MPC85xx_MDS is not set
-# CONFIG_MPC85xx_RDB is not set
-CONFIG_MPIC=y
-# CONFIG_MPIC_MSGR is not set
-CONFIG_MPIC_TIMER=y
-CONFIG_MPILIB=y
-# CONFIG_MSM460 is not set
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_NAND_CORE=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_ECC_SW_HAMMING=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_SPI_NOR=y
-# CONFIG_MVME2500 is not set
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NEED_SG_DMA_LENGTH=y
-CONFIG_NET_SELFTESTS=y
-CONFIG_NLS=y
-CONFIG_NR_CPUS=1
-CONFIG_NR_IRQS=512
-CONFIG_NVMEM=y
-CONFIG_NVMEM_LAYOUTS=y
-# CONFIG_NVMEM_QORIQ_EFUSE is not set
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_DMA_DEFAULT_COHERENT=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_KOBJ=y
-CONFIG_OF_MDIO=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND=y
-# CONFIG_P1010_RDB is not set
-# CONFIG_P1022_DS is not set
-# CONFIG_P1022_RDK is not set
-# CONFIG_P1023_RDB is not set
-CONFIG_PAGE_OFFSET=0xc0000000
-CONFIG_PAGE_POOL=y
-CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
-CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
-# CONFIG_PANDA is not set
-CONFIG_PCI=y
-CONFIG_PCIEAER=y
-CONFIG_PCIEASPM=y
-CONFIG_PCIEASPM_DEFAULT=y
-# CONFIG_PCIEASPM_PERFORMANCE is not set
-# CONFIG_PCIEASPM_POWERSAVE is not set
-# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_LEDS=y
-CONFIG_PHYSICAL_ALIGN=0x04000000
-CONFIG_PHYSICAL_START=0x00000000
-# CONFIG_PHYS_64BIT is not set
-# CONFIG_PMU_SYSFS is not set
-# CONFIG_PPA8548 is not set
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_PPC64 is not set
-CONFIG_PPC_85xx=y
-# CONFIG_PPC_8xx is not set
-CONFIG_PPC_ADV_DEBUG_DACS=2
-CONFIG_PPC_ADV_DEBUG_DVCS=0
-CONFIG_PPC_ADV_DEBUG_IACS=2
-CONFIG_PPC_ADV_DEBUG_REGS=y
-CONFIG_PPC_BARRIER_NOSPEC=y
-# CONFIG_PPC_BOOK3S_32 is not set
-CONFIG_PPC_DOORBELL=y
-CONFIG_PPC_E500=y
-# CONFIG_PPC_E500MC is not set
-# CONFIG_PPC_EARLY_DEBUG is not set
-CONFIG_PPC_INDIRECT_PCI=y
-CONFIG_PPC_KUAP=y
-# CONFIG_PPC_KUAP_DEBUG is not set
-CONFIG_PPC_KUEP=y
-CONFIG_PPC_MMU_NOHASH=y
-CONFIG_PPC_PAGE_SHIFT=12
-# CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT is not set
-# CONFIG_PPC_QEMU_E500 is not set
-CONFIG_PPC_SMP_MUXED_IPI=y
-CONFIG_PPC_UDBG_16550=y
-CONFIG_PPC_WERROR=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
-CONFIG_QE_GPIO=y
-CONFIG_QUICC_ENGINE=y
-CONFIG_RANDSTRUCT_NONE=y
-CONFIG_RAS=y
-# CONFIG_RED_15W_REV1 is not set
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_GENERIC=y
-CONFIG_RTC_I2C_AND_SPI=y
-CONFIG_RTC_MC146818_LIB=y
-# CONFIG_SCOM_DEBUGFS is not set
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_MCTRL_GPIO=y
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_SERIAL_QE is not set
-# CONFIG_SOCRATES is not set
-CONFIG_SOFTIRQ_ON_OWN_STACK=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPE=y
-CONFIG_SPE_POSSIBLE=y
-CONFIG_SPI=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_MEM=y
-CONFIG_SRCU=y
-# CONFIG_STATIC_CALL_SELFTEST is not set
-# CONFIG_STRIP_ASM_SYMS is not set
-# CONFIG_STX_GP3 is not set
-CONFIG_SWPHY=y
-CONFIG_SYSCTL_EXCEPTION_TRACE=y
-CONFIG_TARGET_CPU="8540"
-CONFIG_TARGET_CPU_BOOL=y
-CONFIG_TASK_SIZE=0xc0000000
-CONFIG_THREAD_INFO_IN_TASK=y
-CONFIG_THREAD_SHIFT=13
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TINY_SRCU=y
-# CONFIG_TL_WDR4900_V1 is not set
-# CONFIG_TOOLCHAIN_DEFAULT_CPU is not set
-# CONFIG_TQM8540 is not set
-# CONFIG_TQM8541 is not set
-# CONFIG_TQM8548 is not set
-# CONFIG_TQM8555 is not set
-# CONFIG_TQM8560 is not set
-# CONFIG_TWR_P102x is not set
-CONFIG_UCC=y
-CONFIG_UCC_FAST=y
-CONFIG_UCC_GETH=y
-# CONFIG_UGETH_TX_ON_DEMAND is not set
-CONFIG_USB_SUPPORT=y
-CONFIG_VDSO32=y
-# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WATCHDOG_CORE=y
-# CONFIG_WS_AP3710I is not set
-# CONFIG_WS_AP3715I is not set
-# CONFIG_WS_AP3825I is not set
-# CONFIG_XES_MPC85xx is not set
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_XZ_DEC_POWERPC=y
diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/panda.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/panda.dts
index 4b3b52d35b..c4125052ec 100644
--- a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/panda.dts
+++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/panda.dts
@@ -87,6 +87,7 @@
 			};
 
 			switch0: ethernet-phy@0 {
+				compatible = "brcm,bcm53128";
 				reg = <0x0>;
 
 				ports {
@@ -135,7 +136,8 @@
 
 					port@8 {
 						reg = <8>;
-						label = "cpu";
+						phy-mode = "rgmii-id";
+						ethernet = <&enet0>;
 
 						fixed-link {
 							speed = <1000>;
@@ -160,7 +162,6 @@
 
 		enet0: ethernet@b0000 {
 			phy-connection-type = "rgmii-id";
-			phy-handle = <&switch0>;
 
 			fixed-link {
 				speed = <1000>;
diff --git a/target/linux/mpc85xx/image/p1020.mk b/target/linux/mpc85xx/image/p1020.mk
index e3902d23d6..c310b26c87 100644
--- a/target/linux/mpc85xx/image/p1020.mk
+++ b/target/linux/mpc85xx/image/p1020.mk
@@ -120,5 +120,7 @@ define Device/ocedo_panda
   IMAGES := fdt.bin sysupgrade.bin
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   IMAGE/fdt.bin := append-dtb
+  DEVICE_COMPAT_VERSION := 1.1
+  DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
 endef
 TARGET_DEVICES += ocedo_panda
diff --git a/target/linux/mpc85xx/p1010/config-default b/target/linux/mpc85xx/p1010/config-default
index f00fb4d5fd..afa930f4b4 100644
--- a/target/linux/mpc85xx/p1010/config-default
+++ b/target/linux/mpc85xx/p1010/config-default
@@ -1,4 +1,3 @@
-CONFIG_AT803X_PHY=y
 CONFIG_BR200_WP=y
 CONFIG_CMDLINE_OVERRIDE=y
 CONFIG_FIREBOX_T10=y
@@ -21,6 +20,8 @@ CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y
 CONFIG_NET_DSA_TAG_QCA=y
 CONFIG_NET_SWITCHDEV=y
 CONFIG_PHYLINK=y
+CONFIG_QCA83XX_PHY=y
+CONFIG_QCOM_NET_PHYLIB=y
 CONFIG_REALTEK_PHY=y
 CONFIG_RED_15W_REV1=y
 CONFIG_REGMAP=y
diff --git a/target/linux/mpc85xx/p1020/config-default b/target/linux/mpc85xx/p1020/config-default
index d1c0532582..36ace8015f 100644
--- a/target/linux/mpc85xx/p1020/config-default
+++ b/target/linux/mpc85xx/p1020/config-default
@@ -1,5 +1,8 @@
 CONFIG_ARCH_HAS_TICK_BROADCAST=y
 CONFIG_AT803X_PHY=y
+CONFIG_B53=y
+CONFIG_B53_MDIO_DRIVER=y
+CONFIG_BCM_NET_PHYLIB=y
 CONFIG_BROADCOM_PHY=y
 CONFIG_CMDLINE_OVERRIDE=y
 CONFIG_CPU_RMAP=y
@@ -8,6 +11,7 @@ CONFIG_EEPROM_LEGACY=y
 CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
 CONFIG_GENERIC_TBSYNC=y
 CONFIG_GPIO_74X164=y
+CONFIG_GRO_CELLS=y
 # CONFIG_GPIO_MAX77620 is not set
 CONFIG_HAVE_RCU_TABLE_FREE=y
 CONFIG_HIVEAP_330=y
@@ -32,7 +36,15 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
 CONFIG_MTD_UBI_BLOCK=y
 CONFIG_MTD_UBI_WL_THRESHOLD=4096
 CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_TAG_BRCM=y
+CONFIG_NET_DSA_TAG_BRCM_COMMON=y
+CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
+CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
+CONFIG_NET_DSA_TAG_NONE=y
 CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_SWITCHDEV=y
 CONFIG_NR_CPUS=2
 CONFIG_PADATA=y
 CONFIG_REGMAP_IRQ=y
@@ -43,13 +55,6 @@ CONFIG_RPS=y
 CONFIG_RWSEM_SPIN_ON_OWNER=y
 CONFIG_SMP=y
 CONFIG_SPI_GPIO=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_B53=y
-# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
-CONFIG_SWCONFIG_B53_PHY_DRIVER=y
-# CONFIG_SWCONFIG_B53_PHY_FIXUP is not set
-# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
-# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
 CONFIG_TREE_RCU=y
 CONFIG_UBIFS_FS=y
 CONFIG_WS_AP3710I=y
diff --git a/target/linux/mpc85xx/patches-6.1/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch b/target/linux/mpc85xx/patches-6.1/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch
deleted file mode 100644
index 5e5ab10daf..0000000000
--- a/target/linux/mpc85xx/patches-6.1/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/arch/powerpc/platforms/85xx/common.c
-+++ b/arch/powerpc/platforms/85xx/common.c
-@@ -30,6 +30,7 @@ static const struct of_device_id mpc85xx
- 	{ .compatible = "fsl,mpc8548-guts", },
- 	/* Probably unnecessary? */
- 	{ .compatible = "gpio-leds", },
-+	{ .compatible = "gpio-keys", },
- 	/* For all PCI controllers */
- 	{ .compatible = "fsl,mpc8540-pci", },
- 	{ .compatible = "fsl,mpc8548-pcie", },
diff --git a/target/linux/mpc85xx/patches-6.1/010-powerpc-add-compressed-zImage-for-mpc85xx.patch b/target/linux/mpc85xx/patches-6.1/010-powerpc-add-compressed-zImage-for-mpc85xx.patch
deleted file mode 100644
index 16ef37bd78..0000000000
--- a/target/linux/mpc85xx/patches-6.1/010-powerpc-add-compressed-zImage-for-mpc85xx.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From b30ba76a980b3a9282f309c23e3bb0b0eb2c72cd Mon Sep 17 00:00:00 2001
-From: David Bauer <mail@david-bauer.net>
-Date: Thu, 30 May 2024 02:55:38 +0200
-Subject: [PATCH] powerpc: add compressed zImage for mpc85xx
-
-Add a universal zImage which can be loaded by mpc85xx boards at
-load address 0x3000000. This allows boards to boot kernels larger than
-16MB even if the image is loaded temporarily from NAND at offset
-0x1000000 which some bootloaders do by default.
-
-Signed-off-by: David Bauer <mail@david-bauer.net>
----
- arch/powerpc/boot/Makefile | 1 +
- arch/powerpc/boot/wrapper  | 5 +++++
- 2 files changed, 6 insertions(+)
-
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -175,6 +175,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
- src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
- src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
- src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
-+src-plat-$(CONFIG_PPC_ZIMAGE_LA3000000) += fixed-head.S
- src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S
- src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
- src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
-@@ -345,6 +346,7 @@ image-$(CONFIG_MPC836x_MDS)		+= cuImage.
- image-$(CONFIG_ASP834x)			+= dtbImage.asp834x-redboot
- 
- # Board ports in arch/powerpc/platform/85xx/Kconfig
-+image-$(CONFIG_PPC_ZIMAGE_LA3000000)   += zImage.la3000000
- image-$(CONFIG_MPC8540_ADS)		+= cuImage.mpc8540ads
- image-$(CONFIG_MPC8560_ADS)		+= cuImage.mpc8560ads
- image-$(CONFIG_MPC85xx_CDS)		+= cuImage.mpc8541cds \
---- a/arch/powerpc/boot/wrapper
-+++ b/arch/powerpc/boot/wrapper
-@@ -254,6 +254,11 @@ if [ -n "$esm_blob" -a "$platform" != "p
- fi
- 
- case "$platform" in
-+la3000000)
-+    binary=y
-+    platformo="$object/fixed-head.o $object/of.o $object/epapr.o"
-+    link_address='0x3000000'
-+    ;;
- of)
-     platformo="$object/of.o $object/epapr.o"
-     make_space=n
---- a/arch/powerpc/Kconfig
-+++ b/arch/powerpc/Kconfig
-@@ -74,6 +74,10 @@ config NMI_IPI
- 	depends on SMP && (DEBUGGER || KEXEC_CORE || HARDLOCKUP_DETECTOR)
- 	default y
- 
-+config PPC_ZIMAGE_LA3000000
-+       bool
-+       default n
-+
- config PPC_WATCHDOG
- 	bool
- 	depends on HARDLOCKUP_DETECTOR
diff --git a/target/linux/mpc85xx/patches-6.1/100-powerpc-85xx-tl-wdr4900-v1-support.patch b/target/linux/mpc85xx/patches-6.1/100-powerpc-85xx-tl-wdr4900-v1-support.patch
deleted file mode 100644
index 5f8d84ccee..0000000000
--- a/target/linux/mpc85xx/patches-6.1/100-powerpc-85xx-tl-wdr4900-v1-support.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 1d9f596e572917772b87a2a37e1680902964782f Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 20 Feb 2013 08:40:33 +0100
-Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
- board
-
-This patch adds support for the TP-Link TL-WDR4900 v1
-concurrent dual-band wireless router. The devices uses
-the Freescale P1014 SoC.
-
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
----
- arch/powerpc/boot/Makefile           |  3 ++-
- arch/powerpc/boot/wrapper            |  5 +++++
- arch/powerpc/platforms/85xx/Kconfig  | 12 ++++++++++++
- arch/powerpc/platforms/85xx/Makefile |  1 +
- 4 files changed, 20 insertions(+), 1 deletion(-)
-
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -180,6 +180,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
- src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
- src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
- src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
-+src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
- 
- src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
- 
-@@ -361,7 +362,7 @@ image-$(CONFIG_TQM8548)			+= cuImage.tqm
- image-$(CONFIG_TQM8555)			+= cuImage.tqm8555
- image-$(CONFIG_TQM8560)			+= cuImage.tqm8560
- image-$(CONFIG_KSI8560)			+= cuImage.ksi8560
--
-+image-$(CONFIG_TL_WDR4900_V1)		+= simpleImage.tl-wdr4900-v1
- # Board ports in arch/powerpc/platform/86xx/Kconfig
- image-$(CONFIG_MVME7100)                += dtbImage.mvme7100
- 
---- a/arch/powerpc/boot/wrapper
-+++ b/arch/powerpc/boot/wrapper
-@@ -346,6 +346,11 @@ adder875-redboot)
-     platformo="$object/fixed-head.o $object/redboot-8xx.o"
-     binary=y
-     ;;
-+simpleboot-tl-wdr4900-v1)
-+    platformo="$object/fixed-head.o $object/simpleboot.o"
-+    link_address='0x1500000'
-+    binary=y
-+    ;;
- simpleboot-*)
-     platformo="$object/fixed-head.o $object/simpleboot.o"
-     binary=y
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -163,6 +163,18 @@ config STX_GP3
- 	select CPM2
- 	select DEFAULT_UIMAGE
- 
-+config TL_WDR4900_V1
-+    bool "TP-Link TL-WDR4900 v1"
-+    select DEFAULT_UIMAGE
-+    select ARCH_REQUIRE_GPIOLIB
-+    select GPIO_MPC8XXX
-+    select SWIOTLB
-+    help
-+      This option enables support for the TP-Link TL-WDR4900 v1 board.
-+
-+      This board is a Concurrent Dual-Band wireless router with a
-+      Freescale P1014 SoC.
-+
- config TQM8540
- 	bool "TQ Components TQM8540"
- 	help
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -27,6 +27,7 @@ obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
- obj-$(CONFIG_FB_FSL_DIU)	+= t1042rdb_diu.o
- obj-$(CONFIG_STX_GP3)	  += stx_gp3.o
-+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
- obj-$(CONFIG_TQM85xx)	  += tqm85xx.o
- obj-$(CONFIG_PPA8548)     += ppa8548.o
- obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
diff --git a/target/linux/mpc85xx/patches-6.1/101-powerpc-85xx-hiveap-330-support.patch b/target/linux/mpc85xx/patches-6.1/101-powerpc-85xx-hiveap-330-support.patch
deleted file mode 100644
index 18466216c0..0000000000
--- a/target/linux/mpc85xx/patches-6.1/101-powerpc-85xx-hiveap-330-support.patch
+++ /dev/null
@@ -1,58 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -40,6 +40,17 @@ config BSC9132_QDS
- 	  and dual StarCore SC3850 DSP cores.
- 	  Manufacturer : Freescale Semiconductor, Inc
- 
-+config HIVEAP_330
-+    bool "Aerohive HiveAP-330"
-+    select DEFAULT_UIMAGE
-+    select ARCH_REQUIRE_GPIOLIB
-+    select GPIO_MPC8XXX
-+    help
-+      This option enables support for the Aerohive HiveAP-330 board.
-+
-+      This board is a Concurrent Dual-Band wireless access point with a
-+      Freescale P1020 SoC.
-+
- config MPC8540_ADS
- 	bool "Freescale MPC8540 ADS"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -12,6 +12,7 @@ obj-y += common.o
- obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
- obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
- obj-$(CONFIG_C293_PCIE)   += c293pcie.o
-+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
- obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
- obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
- obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -180,6 +180,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
- src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
- src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
- src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
-+src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
- 
- src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
-@@ -362,6 +363,7 @@ image-$(CONFIG_TQM8548)			+= cuImage.tqm
- image-$(CONFIG_TQM8555)			+= cuImage.tqm8555
- image-$(CONFIG_TQM8560)			+= cuImage.tqm8560
- image-$(CONFIG_KSI8560)			+= cuImage.ksi8560
-+image-$(CONFIG_HIVEAP_330)		+= simpleImage.hiveap-330
- image-$(CONFIG_TL_WDR4900_V1)		+= simpleImage.tl-wdr4900-v1
- # Board ports in arch/powerpc/platform/86xx/Kconfig
- image-$(CONFIG_MVME7100)                += dtbImage.mvme7100
---- a/arch/powerpc/boot/wrapper
-+++ b/arch/powerpc/boot/wrapper
-@@ -346,6 +346,7 @@ adder875-redboot)
-     platformo="$object/fixed-head.o $object/redboot-8xx.o"
-     binary=y
-     ;;
-+simpleboot-hiveap-330|\
- simpleboot-tl-wdr4900-v1)
-     platformo="$object/fixed-head.o $object/simpleboot.o"
-     link_address='0x1500000'
diff --git a/target/linux/mpc85xx/patches-6.1/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-6.1/102-powerpc-add-cmdline-override.patch
deleted file mode 100644
index 2ac10eae8e..0000000000
--- a/target/linux/mpc85xx/patches-6.1/102-powerpc-add-cmdline-override.patch
+++ /dev/null
@@ -1,37 +0,0 @@
---- a/arch/powerpc/Kconfig
-+++ b/arch/powerpc/Kconfig
-@@ -958,6 +958,14 @@ config CMDLINE_FORCE
- 
- endchoice
- 
-+config CMDLINE_OVERRIDE
-+    bool "Use alternative cmdline from device tree"
-+    help
-+      Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can
-+      be used, this is not a good option for kernels that are shared across
-+      devices. This setting enables using "chosen/cmdline-override" as the
-+      cmdline if it exists in the device tree.
-+
- config EXTRA_TARGETS
- 	string "Additional default image types"
- 	help
---- a/drivers/of/fdt.c
-+++ b/drivers/of/fdt.c
-@@ -1187,6 +1187,17 @@ int __init early_init_dt_scan_chosen(cha
- 	if (p != NULL && l > 0)
- 		strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
- 
-+    /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different
-+     * device tree option of chosen/bootargs-override. This is
-+     * helpful on boards where u-boot sets bootargs, and is unable
-+     * to be modified.
-+     */
-+#ifdef CONFIG_CMDLINE_OVERRIDE
-+	p = of_get_flat_dt_prop(node, "bootargs-override", &l);
-+	if (p != NULL && l > 0)
-+		strlcpy(cmdline, p, min((int)l, COMMAND_LINE_SIZE));
-+#endif
-+
- handle_cmdline:
- 	/*
- 	 * CONFIG_CMDLINE is meant to be a default in case nothing else
diff --git a/target/linux/mpc85xx/patches-6.1/103-powerpc-85xx-red-15w-rev1.patch b/target/linux/mpc85xx/patches-6.1/103-powerpc-85xx-red-15w-rev1.patch
deleted file mode 100644
index 711d98abe7..0000000000
--- a/target/linux/mpc85xx/patches-6.1/103-powerpc-85xx-red-15w-rev1.patch
+++ /dev/null
@@ -1,29 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -166,6 +166,16 @@ config XES_MPC85xx
- 	  Manufacturer: Extreme Engineering Solutions, Inc.
- 	  URL: <https://www.xes-inc.com/>
- 
-+config RED_15W_REV1
-+	bool "Sophos RED 15w Rev.1"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	help
-+	  This option enables support for the Sophos RED 15w Rev.1 board.
-+
-+	  This board is a wireless VPN router with a Freescale P1010 SoC.
-+
- config STX_GP3
- 	bool "Silicon Turnkey Express GP3"
- 	help
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -27,6 +27,7 @@ obj-$(CONFIG_P1023_RDB)   += p1023_rdb.o
- obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
- obj-$(CONFIG_FB_FSL_DIU)	+= t1042rdb_diu.o
-+obj-$(CONFIG_RED_15W_REV1)	+= red15w_rev1.o
- obj-$(CONFIG_STX_GP3)	  += stx_gp3.o
- obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
- obj-$(CONFIG_TQM85xx)	  += tqm85xx.o
diff --git a/target/linux/mpc85xx/patches-6.1/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch b/target/linux/mpc85xx/patches-6.1/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch
deleted file mode 100644
index 94ed26c3df..0000000000
--- a/target/linux/mpc85xx/patches-6.1/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch
+++ /dev/null
@@ -1,170 +0,0 @@
-From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
-From: Pawel Dembicki <paweldembicki@gmail.com>
-Date: Sun, 30 Dec 2018 23:24:41 +0100
-Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT
-
-This patch apply chages for OpenWRT in P2020RDB
-dts file.
-
-Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
----
- arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
- 1 file changed, 63 insertions(+), 35 deletions(-)
-
---- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
-+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
-@@ -5,10 +5,15 @@
-  * Copyright 2009-2012 Freescale Semiconductor Inc.
-  */
- 
-+/dts-v1/;
-+
- /include/ "p2020si-pre.dtsi"
- 
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
- / {
--	model = "fsl,P2020RDB";
-+	model = "Freescale P2020RDB";
- 	compatible = "fsl,P2020RDB";
- 
- 	aliases {
-@@ -34,48 +39,38 @@
- 			  0x2 0x0 0x0 0xffb00000 0x00020000>;
- 
- 		nor@0,0 {
--			#address-cells = <1>;
--			#size-cells = <1>;
- 			compatible = "cfi-flash";
- 			reg = <0x0 0x0 0x1000000>;
- 			bank-width = <2>;
- 			device-width = <1>;
- 
--			partition@0 {
--				/* This location must not be altered  */
--				/* 256KB for Vitesse 7385 Switch firmware */
--				reg = <0x0 0x00040000>;
--				label = "NOR (RO) Vitesse-7385 Firmware";
--				read-only;
--			};
--
--			partition@40000 {
--				/* 256KB for DTB Image */
--				reg = <0x00040000 0x00040000>;
--				label = "NOR (RO) DTB Image";
--				read-only;
--			};
-+			partitions {
-+				compatible = "fixed-partitions";
-+				#address-cells = <1>;
-+				#size-cells = <1>;
- 
--			partition@80000 {
--				/* 3.5 MB for Linux Kernel Image */
--				reg = <0x00080000 0x00380000>;
--				label = "NOR (RO) Linux Kernel Image";
--				read-only;
--			};
-+				partition@0 {
-+					/* This location must not be altered  */
-+					/* 256KB for Vitesse 7385 Switch firmware */
-+					reg = <0x0 0x00040000>;
-+					label = "NOR (RO) Vitesse-7385 Firmware";
-+					read-only;
-+				};
- 
--			partition@400000 {
--				/* 11MB for JFFS2 based Root file System */
--				reg = <0x00400000 0x00b00000>;
--				label = "NOR (RW) JFFS2 Root File System";
--			};
-+				partition@40000 {
-+					compatible = "denx,fit";
-+					reg = <0x00040000 0x00ec0000>;
-+					label = "firmware";
-+				};
- 
--			partition@f00000 {
--				/* This location must not be altered  */
--				/* 512KB for u-boot Bootloader Image */
--				/* 512KB for u-boot Environment Variables */
--				reg = <0x00f00000 0x00100000>;
--				label = "NOR (RO) U-Boot Image";
--				read-only;
-+				partition@f00000 {
-+					/* This location must not be altered  */
-+					/* 512KB for u-boot Bootloader Image */
-+					/* 512KB for u-boot Environment Variables */
-+					reg = <0x00f00000 0x00100000>;
-+					label = "u-boot";
-+					read-only;
-+				};
- 			};
- 		};
- 
-@@ -85,6 +80,7 @@
- 			compatible = "fsl,p2020-fcm-nand",
- 				     "fsl,elbc-fcm-nand";
- 			reg = <0x1 0x0 0x40000>;
-+			nand-ecc-mode = "none";
- 
- 			partition@0 {
- 				/* This location must not be altered  */
-@@ -140,13 +136,43 @@
- 	soc: soc@ffe00000 {
- 		ranges = <0x0 0x0 0xffe00000 0x100000>;
- 
-+		gpio0: gpio-controller@fc00 {
-+		};
-+
- 		i2c@3000 {
-+			temperature-sensor@4c {
-+				compatible = "adi,adt7461";
-+				reg = <0x4c>;
-+			};
-+
-+			eeprom@50 {
-+				compatible = "atmel,24c256";
-+				reg = <0x50>;
-+			};
-+
- 			rtc@68 {
- 				compatible = "dallas,ds1339";
- 				reg = <0x68>;
- 			};
- 		};
- 
-+		i2c@3100 {
-+			pmic@11 {
-+				compatible = "zl2006";
-+				reg = <0x11>;
-+			};
-+
-+			gpio@18 {
-+				compatible = "nxp,pca9557";
-+				reg = <0x18>;
-+			};
-+
-+			eeprom@52 {
-+				compatible = "atmel,24c01";
-+				reg = <0x52>;
-+			};
-+		};
-+
- 		spi@7000 {
- 			flash@0 {
- 				#address-cells = <1>;
-@@ -200,10 +226,12 @@
- 			phy0: ethernet-phy@0 {
- 				interrupts = <3 1 0 0>;
- 				reg = <0x0>;
-+				reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
- 			};
- 			phy1: ethernet-phy@1 {
- 				interrupts = <3 1 0 0>;
- 				reg = <0x1>;
-+				reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
- 			};
- 			tbi-phy@2 {
- 				device_type = "tbi-phy";
diff --git a/target/linux/mpc85xx/patches-6.1/105-powerpc-85xx-panda-support.patch b/target/linux/mpc85xx/patches-6.1/105-powerpc-85xx-panda-support.patch
deleted file mode 100644
index 3c24a373ab..0000000000
--- a/target/linux/mpc85xx/patches-6.1/105-powerpc-85xx-panda-support.patch
+++ /dev/null
@@ -1,30 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -51,6 +51,17 @@ config HIVEAP_330
-       This board is a Concurrent Dual-Band wireless access point with a
-       Freescale P1020 SoC.
- 
-+config PANDA
-+	bool "OCEDO PANDA"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	help
-+	  This option enables support for the OCEDO PANDA board.
-+
-+	  This board is a Concurrent Dual-Band wireless access point with a
-+	  Freescale P1020 SoC.
-+
- config MPC8540_ADS
- 	bool "Freescale MPC8540 ADS"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -24,6 +24,7 @@ obj-$(CONFIG_P1010_RDB)   += p1010rdb.o
- obj-$(CONFIG_P1022_DS)    += p1022_ds.o
- obj-$(CONFIG_P1022_RDK)   += p1022_rdk.o
- obj-$(CONFIG_P1023_RDB)   += p1023_rdb.o
-+obj-$(CONFIG_PANDA)       += panda.o
- obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
- obj-$(CONFIG_FB_FSL_DIU)	+= t1042rdb_diu.o
diff --git a/target/linux/mpc85xx/patches-6.1/106-powerpc-85xx-ws-ap3710i-support.patch b/target/linux/mpc85xx/patches-6.1/106-powerpc-85xx-ws-ap3710i-support.patch
deleted file mode 100644
index 742fe7c2c0..0000000000
--- a/target/linux/mpc85xx/patches-6.1/106-powerpc-85xx-ws-ap3710i-support.patch
+++ /dev/null
@@ -1,60 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -62,6 +62,17 @@ config PANDA
- 	  This board is a Concurrent Dual-Band wireless access point with a
- 	  Freescale P1020 SoC.
- 
-+config WS_AP3710I
-+	bool "Enterasys WS-AP3710i"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	help
-+	  This option enables support for the Enterasys WS-AP3710i board.
-+
-+	  This board is a Concurrent Dual-Band wireless access point with a
-+	  Freescale P1020 SoC.
-+
- config MPC8540_ADS
- 	bool "Freescale MPC8540 ADS"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -26,6 +26,7 @@ obj-$(CONFIG_P1022_RDK)   += p1022_rdk.o
- obj-$(CONFIG_P1023_RDB)   += p1023_rdb.o
- obj-$(CONFIG_PANDA)       += panda.o
- obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
-+obj-$(CONFIG_WS_AP3710I)  += ws-ap3710i.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
- obj-$(CONFIG_FB_FSL_DIU)	+= t1042rdb_diu.o
- obj-$(CONFIG_RED_15W_REV1)	+= red15w_rev1.o
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -182,6 +182,7 @@ src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) +=
- src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
- src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
-+src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
- 
- src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
- 
-@@ -365,6 +366,7 @@ image-$(CONFIG_TQM8560)			+= cuImage.tqm
- image-$(CONFIG_KSI8560)			+= cuImage.ksi8560
- image-$(CONFIG_HIVEAP_330)		+= simpleImage.hiveap-330
- image-$(CONFIG_TL_WDR4900_V1)		+= simpleImage.tl-wdr4900-v1
-+image-$(CONFIG_WS_AP3710I)		+= simpleImage.ws-ap3710i
- # Board ports in arch/powerpc/platform/86xx/Kconfig
- image-$(CONFIG_MVME7100)                += dtbImage.mvme7100
- 
---- a/arch/powerpc/boot/wrapper
-+++ b/arch/powerpc/boot/wrapper
-@@ -347,7 +347,8 @@ adder875-redboot)
-     binary=y
-     ;;
- simpleboot-hiveap-330|\
--simpleboot-tl-wdr4900-v1)
-+simpleboot-tl-wdr4900-v1|\
-+simpleboot-ws-ap3710i)
-     platformo="$object/fixed-head.o $object/simpleboot.o"
-     link_address='0x1500000'
-     binary=y
diff --git a/target/linux/mpc85xx/patches-6.1/107-powerpc-85xx-add-ws-ap3825i-support.patch b/target/linux/mpc85xx/patches-6.1/107-powerpc-85xx-add-ws-ap3825i-support.patch
deleted file mode 100644
index 346001271b..0000000000
--- a/target/linux/mpc85xx/patches-6.1/107-powerpc-85xx-add-ws-ap3825i-support.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 2fa1a7983ef30f3c7486f9b07c001bee87d1f6d6 Mon Sep 17 00:00:00 2001
-From: Martin Kennedy <hurricos@gmail.com>
-Date: Sat, 1 Jan 2022 11:01:37 -0500
-Subject: [PATCH] PowerPC 85xx: Add WS-AP3825i support
-
-This patch adds support for building Linux for the Extreme Networks
-WS-AP3825i AP.
-
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -73,6 +73,16 @@ config WS_AP3710I
- 	  This board is a Concurrent Dual-Band wireless access point with a
- 	  Freescale P1020 SoC.
- 
-+config WS_AP3825I
-+	bool "Extreme Networks WS-AP3825i"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	help
-+	  This option enables support for the Extreme Networks WS-AP3825i board.
-+	  This board is a Concurrent Dual-Band wireless access point with a
-+	  Freescale P1020 SoC.
-+
- config MPC8540_ADS
- 	bool "Freescale MPC8540 ADS"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -27,6 +27,7 @@ obj-$(CONFIG_P1023_RDB)   += p1023_rdb.o
- obj-$(CONFIG_PANDA)       += panda.o
- obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
- obj-$(CONFIG_WS_AP3710I)  += ws-ap3710i.o
-+obj-$(CONFIG_WS_AP3825I)  += ws-ap3825i.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
- obj-$(CONFIG_FB_FSL_DIU)	+= t1042rdb_diu.o
- obj-$(CONFIG_RED_15W_REV1)	+= red15w_rev1.o
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -183,6 +183,7 @@ src-plat-$(CONFIG_MVME7100) += motload-h
- src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
-+src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
- 
- src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
- 
-@@ -367,6 +368,7 @@ image-$(CONFIG_KSI8560)			+= cuImage.ksi
- image-$(CONFIG_HIVEAP_330)		+= simpleImage.hiveap-330
- image-$(CONFIG_TL_WDR4900_V1)		+= simpleImage.tl-wdr4900-v1
- image-$(CONFIG_WS_AP3710I)		+= simpleImage.ws-ap3710i
-+image-$(CONFIG_WS_AP3825I)		+= simpleImage.ws-ap3825i
- # Board ports in arch/powerpc/platform/86xx/Kconfig
- image-$(CONFIG_MVME7100)                += dtbImage.mvme7100
- 
---- a/arch/powerpc/boot/wrapper
-+++ b/arch/powerpc/boot/wrapper
-@@ -348,7 +348,8 @@ adder875-redboot)
-     ;;
- simpleboot-hiveap-330|\
- simpleboot-tl-wdr4900-v1|\
--simpleboot-ws-ap3710i)
-+simpleboot-ws-ap3710i|\
-+simpleboot-ws-ap3825i)
-     platformo="$object/fixed-head.o $object/simpleboot.o"
-     link_address='0x1500000'
-     binary=y
diff --git a/target/linux/mpc85xx/patches-6.1/108-powerpc-85xx-firebox-t10-support.patch.patch b/target/linux/mpc85xx/patches-6.1/108-powerpc-85xx-firebox-t10-support.patch.patch
deleted file mode 100644
index 0b3a93b848..0000000000
--- a/target/linux/mpc85xx/patches-6.1/108-powerpc-85xx-firebox-t10-support.patch.patch
+++ /dev/null
@@ -1,29 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -83,6 +83,16 @@ config WS_AP3825I
- 	  This board is a Concurrent Dual-Band wireless access point with a
- 	  Freescale P1020 SoC.
- 
-+config FIREBOX_T10
-+	bool "Watchguard Firebox T10"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	help
-+	  This option enables support for the Watchguard Firebox T10 board.
-+	  This board is a VPN Gateway-Router with a
-+	  Freescale P1010 SoC.
-+
- config MPC8540_ADS
- 	bool "Freescale MPC8540 ADS"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -28,6 +28,7 @@ obj-$(CONFIG_PANDA)       += panda.o
- obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
- obj-$(CONFIG_WS_AP3710I)  += ws-ap3710i.o
- obj-$(CONFIG_WS_AP3825I)  += ws-ap3825i.o
-+obj-$(CONFIG_FIREBOX_T10) += firebox_t10.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
- obj-$(CONFIG_FB_FSL_DIU)	+= t1042rdb_diu.o
- obj-$(CONFIG_RED_15W_REV1)	+= red15w_rev1.o
diff --git a/target/linux/mpc85xx/patches-6.1/109-powerpc-85xx-add-ws-ap3715i-support.patch b/target/linux/mpc85xx/patches-6.1/109-powerpc-85xx-add-ws-ap3715i-support.patch
deleted file mode 100644
index a9f7079866..0000000000
--- a/target/linux/mpc85xx/patches-6.1/109-powerpc-85xx-add-ws-ap3715i-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -73,6 +73,17 @@ config WS_AP3710I
- 	  This board is a Concurrent Dual-Band wireless access point with a
- 	  Freescale P1020 SoC.
- 
-+config WS_AP3715I
-+	bool "Enterasys WS-AP3715i"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	help
-+	  This option enables support for the Enterasys WS-AP3715i board.
-+
-+	  This board is a Concurrent Dual-Band wireless access point with a
-+	  Freescale P1010 SoC.
-+
- config WS_AP3825I
- 	bool "Extreme Networks WS-AP3825i"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -27,6 +27,7 @@ obj-$(CONFIG_P1023_RDB)   += p1023_rdb.o
- obj-$(CONFIG_PANDA)       += panda.o
- obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
- obj-$(CONFIG_WS_AP3710I)  += ws-ap3710i.o
-+obj-$(CONFIG_WS_AP3715I)  += ws-ap3715i.o
- obj-$(CONFIG_WS_AP3825I)  += ws-ap3825i.o
- obj-$(CONFIG_FIREBOX_T10) += firebox_t10.o
- obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -183,6 +183,7 @@ src-plat-$(CONFIG_MVME7100) += motload-h
- src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
-+src-plat-$(CONFIG_WS_AP3715I) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
- 
- src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
-@@ -368,6 +369,7 @@ image-$(CONFIG_KSI8560)			+= cuImage.ksi
- image-$(CONFIG_HIVEAP_330)		+= simpleImage.hiveap-330
- image-$(CONFIG_TL_WDR4900_V1)		+= simpleImage.tl-wdr4900-v1
- image-$(CONFIG_WS_AP3710I)		+= simpleImage.ws-ap3710i
-+image-$(CONFIG_WS_AP3715I)		+= simpleImage.ws-ap3715i
- image-$(CONFIG_WS_AP3825I)		+= simpleImage.ws-ap3825i
- # Board ports in arch/powerpc/platform/86xx/Kconfig
- image-$(CONFIG_MVME7100)                += dtbImage.mvme7100
diff --git a/target/linux/mpc85xx/patches-6.1/110-powerpc-85xx-br200-wp-support.patch b/target/linux/mpc85xx/patches-6.1/110-powerpc-85xx-br200-wp-support.patch
deleted file mode 100644
index a58d12aef2..0000000000
--- a/target/linux/mpc85xx/patches-6.1/110-powerpc-85xx-br200-wp-support.patch
+++ /dev/null
@@ -1,57 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -40,6 +40,16 @@ config BSC9132_QDS
- 	  and dual StarCore SC3850 DSP cores.
- 	  Manufacturer : Freescale Semiconductor, Inc
- 
-+config BR200_WP
-+    bool "Aerohive BR200-WP"
-+    select DEFAULT_UIMAGE
-+    select ARCH_REQUIRE_GPIOLIB
-+    select GPIO_MPC8XXX
-+    help
-+      This option enables support for the Aerohive BR200-WP board.
-+
-+      This board is a wireless router with a Freescale P1011 SoC.
-+
- config HIVEAP_330
-     bool "Aerohive HiveAP-330"
-     select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -12,6 +12,7 @@ obj-y += common.o
- obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
- obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
- obj-$(CONFIG_C293_PCIE)   += c293pcie.o
-+obj-$(CONFIG_BR200_WP) += br200-wp.o
- obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
- obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
- obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -180,6 +180,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
- src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
- src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
- src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
-+src-plat-$(CONFIG_BR200_WP) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
- src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
-@@ -366,6 +367,7 @@ image-$(CONFIG_TQM8548)			+= cuImage.tqm
- image-$(CONFIG_TQM8555)			+= cuImage.tqm8555
- image-$(CONFIG_TQM8560)			+= cuImage.tqm8560
- image-$(CONFIG_KSI8560)			+= cuImage.ksi8560
-+image-$(CONFIG_BR200_WP)		+= simpleImage.br200-wp
- image-$(CONFIG_HIVEAP_330)		+= simpleImage.hiveap-330
- image-$(CONFIG_TL_WDR4900_V1)		+= simpleImage.tl-wdr4900-v1
- image-$(CONFIG_WS_AP3710I)		+= simpleImage.ws-ap3710i
---- a/arch/powerpc/boot/wrapper
-+++ b/arch/powerpc/boot/wrapper
-@@ -346,6 +346,7 @@ adder875-redboot)
-     platformo="$object/fixed-head.o $object/redboot-8xx.o"
-     binary=y
-     ;;
-+simpleboot-br200-wp|\
- simpleboot-hiveap-330|\
- simpleboot-tl-wdr4900-v1|\
- simpleboot-ws-ap3710i|\
diff --git a/target/linux/mpc85xx/patches-6.1/111-powerpc-85xx-hpe-msm-support.patch b/target/linux/mpc85xx/patches-6.1/111-powerpc-85xx-hpe-msm-support.patch
deleted file mode 100644
index 4b9c6f8219..0000000000
--- a/target/linux/mpc85xx/patches-6.1/111-powerpc-85xx-hpe-msm-support.patch
+++ /dev/null
@@ -1,31 +0,0 @@
---- a/arch/powerpc/platforms/85xx/Kconfig
-+++ b/arch/powerpc/platforms/85xx/Kconfig
-@@ -114,6 +114,18 @@ config FIREBOX_T10
- 	  This board is a VPN Gateway-Router with a
- 	  Freescale P1010 SoC.
- 
-+config MSM460
-+	bool "HPE MSM460"
-+	select DEFAULT_UIMAGE
-+	select ARCH_REQUIRE_GPIOLIB
-+	select GPIO_MPC8XXX
-+	select PPC_ZIMAGE_LA3000000
-+	help
-+	  This option enables support for the HPE MSM460 board.
-+
-+	  This board is a Concurrent Dual-Band wireless access point with a
-+	  Freescale P1020 SoC.
-+
- config MPC8540_ADS
- 	bool "Freescale MPC8540 ADS"
- 	select DEFAULT_UIMAGE
---- a/arch/powerpc/platforms/85xx/Makefile
-+++ b/arch/powerpc/platforms/85xx/Makefile
-@@ -21,6 +21,7 @@ obj-$(CONFIG_MPC8536_DS)  += mpc8536_ds.
- obj-$(CONFIG_MPC85xx_DS)  += mpc85xx_ds.o
- obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
- obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
-+obj-$(CONFIG_MSM460)      += msm460.o
- obj-$(CONFIG_P1010_RDB)   += p1010rdb.o
- obj-$(CONFIG_P1022_DS)    += p1022_ds.o
- obj-$(CONFIG_P1022_RDK)   += p1022_rdk.o
diff --git a/target/linux/mpc85xx/patches-6.1/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch b/target/linux/mpc85xx/patches-6.1/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch
deleted file mode 100644
index 1ff80a5016..0000000000
--- a/target/linux/mpc85xx/patches-6.1/150-arch-powerpc-simpleboot-prevent-overwrite-of-CPU1-sp.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 5f856ccc34df25060d36a5a81b7b45b574d86e35 Mon Sep 17 00:00:00 2001
-From: David Bauer <mail@david-bauer.net>
-Date: Sun, 3 Dec 2023 20:09:24 +0100
-Subject: [PATCH] arch: powerpc: simpleboot: prevent overwrite of CPU1
- spin-table
-
-Don't overwrite the spin-table of additional CPU cores with loader-heap.
-
-U-Boot places the spin-table for CPU1 on P1020 SoCs in the top 1MB of
-system-memory. Instead of parsing reserved-memory (which would be
-considerable more work), reduce the available system-memory for the
-loader by 1MB.
-
-This prevents the loader from overwriting the spin-table of
-additional CPU cores on these platforms.
-
-Linux itself needs to be made aware by this using reserved-memory
-definitions.
-
-This patch is required for using CPU1 on the Extreme Networks
-WS-AP3825i.
-
-Signed-off-by: David Bauer <mail@david-bauer.net>
----
- arch/powerpc/boot/simpleboot.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/powerpc/boot/simpleboot.c
-+++ b/arch/powerpc/boot/simpleboot.c
-@@ -65,6 +65,11 @@ void platform_init(unsigned long r3, uns
- 	if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
- 		memsize64 = 0xffffffff;
- 
-+	/* Reserve upper 1 MB of memory for CPU1 spin-table */
-+	if (memsize64 > 0x100000) {
-+		memsize64 = memsize64 - 0x100000;
-+	}
-+
- 	/* finally, setup the timebase */
- 	node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
- 					     "cpu", sizeof("cpu"));
diff --git a/target/linux/mpc85xx/patches-6.1/900-powerpc-bootwrapper-disable-uImage-generation.patch b/target/linux/mpc85xx/patches-6.1/900-powerpc-bootwrapper-disable-uImage-generation.patch
deleted file mode 100644
index a997a1b9b7..0000000000
--- a/target/linux/mpc85xx/patches-6.1/900-powerpc-bootwrapper-disable-uImage-generation.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d43ab14605510d9d2bd257a8cd70f24ada4621b0 Mon Sep 17 00:00:00 2001
-From: David Bauer <mail@david-bauer.net>
-Date: Sat, 29 Feb 2020 14:27:04 +0100
-Subject: [PATCH] powerpc: bootwrapper: disable uImage generation
-
-Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to
-instruct the mkimage to use the xz compression, which isn't
-supported. This disables the uImage generation, as OpenWrt
-generates individual uImages for each board using it's own
-toolchain.
-
-Signed-off-by: David Bauer <mail@david-bauer.net>
----
- arch/powerpc/boot/Makefile | 9 ---------
- 1 file changed, 9 deletions(-)
-
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -294,7 +294,6 @@ image-$(CONFIG_PPC_CHRP)		+= zImage.chrp
- image-$(CONFIG_PPC_EFIKA)		+= zImage.chrp
- image-$(CONFIG_PPC_PMAC)		+= zImage.pmac
- image-$(CONFIG_PPC_HOLLY)		+= dtbImage.holly
--image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
- image-$(CONFIG_EPAPR_BOOT)		+= zImage.epapr
- 
- #
-@@ -432,15 +431,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
- $(obj)/vmlinux.strip: vmlinux
- 	$(STRIP) -s -R .comment $< -o $@
- 
--$(obj)/uImage: vmlinux $(wrapperbits) FORCE
--	$(call if_changed,wrap,uboot)
--
--$(obj)/uImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
--	$(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz)
--
--$(obj)/uImage.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
--	$(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb)
--
- $(obj)/cuImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
- 	$(call if_changed,wrap,cuboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz)
- 
diff --git a/target/linux/mvebu/config-6.6 b/target/linux/mvebu/config-6.6
index 88e5fff4d9..a4572d8a89 100644
--- a/target/linux/mvebu/config-6.6
+++ b/target/linux/mvebu/config-6.6
@@ -270,6 +270,7 @@ CONFIG_MTD_NAND_ECC_SW_HAMMING=y
 CONFIG_MTD_NAND_MARVELL=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
 CONFIG_MTD_SPLIT_FIRMWARE=y
 CONFIG_MTD_UBI=y
 CONFIG_MTD_UBI_BEB_LIMIT=20
diff --git a/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds b/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds
index 809a64a60e..2d18587a62 100644
--- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds
+++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds
@@ -13,6 +13,10 @@ iei,puzzle-m901)
 iei,puzzle-m902)
 	ucidef_set_led_netdev "wan" "WAN" "white:network" "eth2" "link"
 	;;
+mikrotik,rb5009)
+	ucidef_set_led_netdev "sfp" "SFP" "green:sfp" "sfp"
+	ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "!cp0!config-space@f2000000!mdio@12a200!switch@0!mdio1:00:green:" "p1" "tx rx link_10 link_100 link_1000 link_2500"
+	;;
 esac
 
 board_config_flush
diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
index 07400fce3a..e098ede75f 100644
--- a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
+++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
@@ -100,7 +100,6 @@
 			partition@f0000 {
 				label = "u-boot-env";
 				reg = <0xf0000 0x8000>;
-				read-only;
 			};
 
 			factory: partition@f8000 {
diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
index 8cd744f64d..dfbf3af137 100644
--- a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
+++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
@@ -5,6 +5,7 @@
 #include "armada-7040.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 
 / {
 	model = "MikroTik RB5009";
@@ -71,23 +72,27 @@
 		compatible = "gpio-leds";
 
 		led_user: user {
-			label = "green:user";
+			function = "user";
 			gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
 		};
 
 		sfp {
-			label = "green:sfp";
+			function = "sfp";
 			gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
 		};
 
 		hdr1 {
-			label = "blue:hdr1";
+			function = "hdr1";
 			gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_BLUE>;
 		};
 
 		hdr2 {
-			label = "blue:hdr2";
+			function = "hdr2";
 			gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_BLUE>;
 		};
 	};
 
@@ -378,6 +383,19 @@
 
 			qca8081: qca8081@0 {
 				reg = <0>;
+
+				leds {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					led@1 {
+						reg = <1>;
+						color = <LED_COLOR_ID_GREEN>;
+						function = LED_FUNCTION_WAN;
+						default-state = "keep";
+						active-low;
+					};
+				};
 			};
 		};
 	};
diff --git a/target/linux/mvebu/image/cortexa53.mk b/target/linux/mvebu/image/cortexa53.mk
index afe8d9ce21..2a3b5ee11e 100644
--- a/target/linux/mvebu/image/cortexa53.mk
+++ b/target/linux/mvebu/image/cortexa53.mk
@@ -3,6 +3,7 @@ define Device/glinet_gl-mv1000
   DEVICE_VENDOR := GL.iNet
   DEVICE_MODEL := GL-MV1000
   SOC := armada-3720
+  BOOT_SCRIPT := gl-mv1000
 endef
 TARGET_DEVICES += glinet_gl-mv1000
 
diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index b3b8960a32..a396b48675 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -106,7 +106,8 @@ define Device/cznic_turris-omnia
   DEVICE_PACKAGES :=  \
     mkf2fs e2fsprogs kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 \
     wpad-basic-mbedtls kmod-ath9k kmod-ath10k-ct ath10k-firmware-qca988x-ct \
-    kmod-mt7915-firmware partx-utils kmod-i2c-mux-pca954x kmod-leds-turris-omnia
+    kmod-mt7915-firmware partx-utils kmod-i2c-mux-pca954x kmod-leds-turris-omnia \
+    kmod-turris-omnia-mcu kmod-gpio-button-hotplug omnia-mcu-firmware omnia-mcutool
   IMAGES := sysupgrade.img.gz
   IMAGE/sysupgrade.img.gz := boot-scr | boot-img | sdcard-img | gzip | append-metadata
   SUPPORTED_DEVICES += armada-385-turris-omnia
diff --git a/target/linux/mvebu/image/gl-mv1000.bootscript b/target/linux/mvebu/image/gl-mv1000.bootscript
new file mode 100644
index 0000000000..be93aa36a0
--- /dev/null
+++ b/target/linux/mvebu/image/gl-mv1000.bootscript
@@ -0,0 +1,28 @@
+# Boot script for GL.iNet GL-MV1000 to make it easier to boot from eMMC or SD
+# card.
+
+setenv bootargs "root=PARTUUID=@ROOT@-02 rw rootwait"
+
+if test -n "${console}"; then
+	setenv bootargs "${bootargs} ${console}"
+fi
+
+# Should mmc_dev not be present, default to internal MMC boot
+if test -z "${mmc_dev}"; then
+	setenv mmc_dev 0
+fi
+
+setenv mmcdev "${mmc_dev}"
+
+if test -n "${fdt_addr_r}"; then
+       setenv fdt_addr ${fdt_addr_r}
+fi
+
+if test -n "${kernel_addr_r}"; then
+       setenv kernel_addr ${kernel_addr_r}
+fi
+
+load mmc ${mmcdev}:1 ${fdt_addr} @DTB@.dtb
+load mmc ${mmcdev}:1 ${kernel_addr} Image
+
+booti ${kernel_addr} - ${fdt_addr}
diff --git a/target/linux/mvebu/modules.mk b/target/linux/mvebu/modules.mk
index 311cc07c7f..e6fa6ab3ed 100644
--- a/target/linux/mvebu/modules.mk
+++ b/target/linux/mvebu/modules.mk
@@ -17,6 +17,27 @@ endef
 $(eval $(call KernelPackage,linkstation-poweroff))
 
 
+define KernelPackage/turris-omnia-mcu
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=CZ.NIC's Turris Omnia MCU driver
+  DEPENDS:=@TARGET_mvebu_cortexa9
+  KCONFIG:= \
+   CONFIG_CZNIC_PLATFORMS=y \
+   CONFIG_TURRIS_OMNIA_MCU
+  FILES:=$(LINUX_DIR)/drivers/platform/cznic/turris-omnia-mcu.ko
+  AUTOLOAD:=$(call AutoProbe,turris-omnia-mcu,1)
+endef
+
+define KernelPackage/turris-omnia-mcu/description
+  This adds support for the features implemented by the microcontroller
+  on the CZ.NIC's Turris Omnia SOHO router, including true board
+  poweroff, the ability to configure wake up from powered off state at
+  a specific time, MCU watchdog and MCU connected GPIO pins.
+endef
+
+$(eval $(call KernelPackage,turris-omnia-mcu))
+
+
 define KernelPackage/leds-turris-omnia
    SUBMENU:=$(LEDS_MENU)
    TITLE:=LED support for CZ.NIC's Turris Omnia
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-01-dt-bindings-firmware-add-cznic-turris-omnia-mcu-bind.patch b/target/linux/mvebu/patches-6.6/820-v6.11-01-dt-bindings-firmware-add-cznic-turris-omnia-mcu-bind.patch
new file mode 100644
index 0000000000..4d6d8e82c2
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-01-dt-bindings-firmware-add-cznic-turris-omnia-mcu-bind.patch
@@ -0,0 +1,125 @@
+From cdfed4d05780450817ef96567e2cd8d355ca9e70 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:03 +0200
+Subject: [PATCH 01/11] dt-bindings: firmware: add cznic,turris-omnia-mcu
+ binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add binding for cznic,turris-omnia-mcu, the device-tree node
+representing the system-controller features provided by the MCU on the
+Turris Omnia router.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20240701113010.16447-2-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ .../firmware/cznic,turris-omnia-mcu.yaml      | 86 +++++++++++++++++++
+ MAINTAINERS                                   |  1 +
+ 2 files changed, 87 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/firmware/cznic,turris-omnia-mcu.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/firmware/cznic,turris-omnia-mcu.yaml
+@@ -0,0 +1,86 @@
++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/firmware/cznic,turris-omnia-mcu.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: CZ.NIC's Turris Omnia MCU
++
++maintainers:
++  - Marek Behún <kabel@kernel.org>
++
++description:
++  The MCU on Turris Omnia acts as a system controller providing additional
++  GPIOs, interrupts, watchdog, system power off and wakeup configuration.
++
++properties:
++  compatible:
++    const: cznic,turris-omnia-mcu
++
++  reg:
++    description: MCU I2C slave address
++    maxItems: 1
++
++  interrupts:
++    maxItems: 1
++
++  interrupt-controller: true
++
++  '#interrupt-cells':
++    const: 2
++    description: |
++      The first cell specifies the interrupt number (0 to 63), the second cell
++      specifies interrupt type (which can be one of IRQ_TYPE_EDGE_RISING,
++      IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH).
++      The interrupt numbers correspond sequentially to GPIO numbers, taking the
++      GPIO banks into account:
++        IRQ number   GPIO bank   GPIO pin within bank
++           0 - 15      0           0 - 15
++          16 - 47      1           0 - 31
++          48 - 63      2           0 - 15
++      There are several exceptions:
++        IRQ number   meaning
++          11           LED panel brightness changed by button press
++          13           TRNG entropy ready
++          14           ECDSA message signature computation done
++
++  gpio-controller: true
++
++  '#gpio-cells':
++    const: 3
++    description:
++      The first cell is bank number (0, 1 or 2), the second cell is pin number
++      within the bank (0 to 15 for banks 0 and 2, 0 to 31 for bank 1), and the
++      third cell specifies consumer flags.
++
++required:
++  - compatible
++  - reg
++  - interrupts
++  - interrupt-controller
++  - gpio-controller
++
++additionalProperties: false
++
++examples:
++  - |
++    #include <dt-bindings/interrupt-controller/irq.h>
++
++    i2c {
++        #address-cells = <1>;
++        #size-cells = <0>;
++
++        system-controller@2a {
++            compatible = "cznic,turris-omnia-mcu";
++            reg = <0x2a>;
++
++            interrupt-parent = <&gpio1>;
++            interrupts = <11 IRQ_TYPE_NONE>;
++
++            gpio-controller;
++            #gpio-cells = <3>;
++
++            interrupt-controller;
++            #interrupt-cells = <2>;
++        };
++    };
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -2104,6 +2104,7 @@ F:	Documentation/ABI/testing/sysfs-bus-m
+ F:	Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm
+ F:	Documentation/devicetree/bindings/bus/moxtet.txt
+ F:	Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt
++F:	Documentation/devicetree/bindings/firmware/cznic,turris-omnia-mcu.yaml
+ F:	Documentation/devicetree/bindings/gpio/gpio-moxtet.txt
+ F:	Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml
+ F:	Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-02-platform-cznic-Add-preliminary-support-for-Turris-Om.patch b/target/linux/mvebu/patches-6.6/820-v6.11-02-platform-cznic-Add-preliminary-support-for-Turris-Om.patch
new file mode 100644
index 0000000000..72bd18d144
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-02-platform-cznic-Add-preliminary-support-for-Turris-Om.patch
@@ -0,0 +1,922 @@
+From 4a63f684c8badfc43f384df2291ed2566909a3bc Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:04 +0200
+Subject: [PATCH 02/11] platform: cznic: Add preliminary support for Turris
+ Omnia MCU
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add the basic skeleton for a new platform driver for the microcontroller
+found on the Turris Omnia board.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20240701113010.16447-3-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ .../sysfs-bus-i2c-devices-turris-omnia-mcu    |  81 ++++
+ MAINTAINERS                                   |   3 +
+ drivers/platform/Kconfig                      |   2 +
+ drivers/platform/Makefile                     |   1 +
+ drivers/platform/cznic/Kconfig                |  25 ++
+ drivers/platform/cznic/Makefile               |   4 +
+ .../platform/cznic/turris-omnia-mcu-base.c    | 393 ++++++++++++++++++
+ drivers/platform/cznic/turris-omnia-mcu.h     |  74 ++++
+ include/linux/turris-omnia-mcu-interface.h    | 249 +++++++++++
+ 9 files changed, 832 insertions(+)
+ create mode 100644 Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
+ create mode 100644 drivers/platform/cznic/Kconfig
+ create mode 100644 drivers/platform/cznic/Makefile
+ create mode 100644 drivers/platform/cznic/turris-omnia-mcu-base.c
+ create mode 100644 drivers/platform/cznic/turris-omnia-mcu.h
+ create mode 100644 include/linux/turris-omnia-mcu-interface.h
+
+--- /dev/null
++++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
+@@ -0,0 +1,81 @@
++What:		/sys/bus/i2c/devices/<mcu_device>/board_revision
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains board revision number.
++
++		Only available if board information is burned in the MCU (older
++		revisions have board information burned in the ATSHA204-A chip).
++
++		Format: %u.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/first_mac_address
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains device first MAC address. Each Turris Omnia is
++		allocated 3 MAC addresses. The two additional addresses are
++		computed from the first one by incrementing it.
++
++		Only available if board information is burned in the MCU (older
++		revisions have board information burned in the ATSHA204-A chip).
++
++		Format: %pM.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/fw_features
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Newer versions of the microcontroller firmware report the
++		features they support. These can be read from this file. If the
++		MCU firmware is too old, this file reads 0x0.
++
++		Format: 0x%x.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/fw_version_hash_application
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains the version hash (commit hash) of the application
++		part of the microcontroller firmware.
++
++		Format: %s.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/fw_version_hash_bootloader
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains the version hash (commit hash) of the bootloader
++		part of the microcontroller firmware.
++
++		Format: %s.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/mcu_type
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains the microcontroller type (STM32, GD32, MKL).
++
++		Format: %s.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/reset_selector
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains the selected factory reset level, determined by
++		how long the rear reset button was held by the user during board
++		reset.
++
++		Format: %i.
++
++What:		/sys/bus/i2c/devices/<mcu_device>/serial_number
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RO) Contains the 64-bit board serial number in hexadecimal
++		format.
++
++		Only available if board information is burned in the MCU (older
++		revisions have board information burned in the ATSHA204-A chip).
++
++		Format: %016X.
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -2100,6 +2100,7 @@ M:	Marek Behún <kabel@kernel.org>
+ S:	Maintained
+ W:	https://www.turris.cz/
+ F:	Documentation/ABI/testing/debugfs-moxtet
++F:	Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
+ F:	Documentation/ABI/testing/sysfs-bus-moxtet-devices
+ F:	Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm
+ F:	Documentation/devicetree/bindings/bus/moxtet.txt
+@@ -2113,10 +2114,12 @@ F:	drivers/firmware/turris-mox-rwtm.c
+ F:	drivers/gpio/gpio-moxtet.c
+ F:	drivers/leds/leds-turris-omnia.c
+ F:	drivers/mailbox/armada-37xx-rwtm-mailbox.c
++F:	drivers/platform/cznic/
+ F:	drivers/watchdog/armada_37xx_wdt.c
+ F:	include/dt-bindings/bus/moxtet.h
+ F:	include/linux/armada-37xx-rwtm-mailbox.h
+ F:	include/linux/moxtet.h
++F:	include/linux/turris-omnia-mcu-interface.h
+ 
+ ARM/FARADAY FA526 PORT
+ M:	Hans Ulli Kroll <ulli.kroll@googlemail.com>
+--- a/drivers/platform/Kconfig
++++ b/drivers/platform/Kconfig
+@@ -7,6 +7,8 @@ source "drivers/platform/goldfish/Kconfi
+ 
+ source "drivers/platform/chrome/Kconfig"
+ 
++source "drivers/platform/cznic/Kconfig"
++
+ source "drivers/platform/mellanox/Kconfig"
+ 
+ source "drivers/platform/olpc/Kconfig"
+--- a/drivers/platform/Makefile
++++ b/drivers/platform/Makefile
+@@ -10,5 +10,6 @@ obj-$(CONFIG_MIPS)		+= mips/
+ obj-$(CONFIG_OLPC_EC)		+= olpc/
+ obj-$(CONFIG_GOLDFISH)		+= goldfish/
+ obj-$(CONFIG_CHROME_PLATFORMS)	+= chrome/
++obj-$(CONFIG_CZNIC_PLATFORMS)	+= cznic/
+ obj-$(CONFIG_SURFACE_PLATFORMS)	+= surface/
+ obj-$(CONFIG_MIKROTIK)		+= mikrotik/
+--- /dev/null
++++ b/drivers/platform/cznic/Kconfig
+@@ -0,0 +1,25 @@
++# SPDX-License-Identifier: GPL-2.0-only
++#
++# For a description of the syntax of this configuration file,
++# see Documentation/kbuild/kconfig-language.rst.
++#
++
++menuconfig CZNIC_PLATFORMS
++	bool "Platform support for CZ.NIC's Turris hardware"
++	help
++	  Say Y here to be able to choose driver support for CZ.NIC's Turris
++	  devices. This option alone does not add any kernel code.
++
++if CZNIC_PLATFORMS
++
++config TURRIS_OMNIA_MCU
++	tristate "Turris Omnia MCU driver"
++	depends on MACH_ARMADA_38X || COMPILE_TEST
++	depends on I2C
++	help
++	  Say Y here to add support for the features implemented by the
++	  microcontroller on the CZ.NIC's Turris Omnia SOHO router.
++	  To compile this driver as a module, choose M here; the module will be
++	  called turris-omnia-mcu.
++
++endif # CZNIC_PLATFORMS
+--- /dev/null
++++ b/drivers/platform/cznic/Makefile
+@@ -0,0 +1,4 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++obj-$(CONFIG_TURRIS_OMNIA_MCU)	+= turris-omnia-mcu.o
++turris-omnia-mcu-y		:= turris-omnia-mcu-base.o
+--- /dev/null
++++ b/drivers/platform/cznic/turris-omnia-mcu-base.c
+@@ -0,0 +1,393 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * CZ.NIC's Turris Omnia MCU driver
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#include <linux/bits.h>
++#include <linux/device.h>
++#include <linux/errno.h>
++#include <linux/hex.h>
++#include <linux/i2c.h>
++#include <linux/module.h>
++#include <linux/string.h>
++#include <linux/sysfs.h>
++#include <linux/types.h>
++
++#include <linux/turris-omnia-mcu-interface.h>
++#include "turris-omnia-mcu.h"
++
++#define OMNIA_FW_VERSION_LEN		20
++#define OMNIA_FW_VERSION_HEX_LEN	(2 * OMNIA_FW_VERSION_LEN + 1)
++#define OMNIA_BOARD_INFO_LEN		16
++
++int omnia_cmd_write_read(const struct i2c_client *client,
++			 void *cmd, unsigned int cmd_len,
++			 void *reply, unsigned int reply_len)
++{
++	struct i2c_msg msgs[2];
++	int ret, num;
++
++	msgs[0].addr = client->addr;
++	msgs[0].flags = 0;
++	msgs[0].len = cmd_len;
++	msgs[0].buf = cmd;
++	num = 1;
++
++	if (reply_len) {
++		msgs[1].addr = client->addr;
++		msgs[1].flags = I2C_M_RD;
++		msgs[1].len = reply_len;
++		msgs[1].buf = reply;
++		num++;
++	}
++
++	ret = i2c_transfer(client->adapter, msgs, num);
++	if (ret < 0)
++		return ret;
++	if (ret != num)
++		return -EIO;
++
++	return 0;
++}
++
++static int omnia_get_version_hash(struct omnia_mcu *mcu, bool bootloader,
++				  char version[static OMNIA_FW_VERSION_HEX_LEN])
++{
++	u8 reply[OMNIA_FW_VERSION_LEN];
++	char *p;
++	int err;
++
++	err = omnia_cmd_read(mcu->client,
++			     bootloader ? OMNIA_CMD_GET_FW_VERSION_BOOT
++					: OMNIA_CMD_GET_FW_VERSION_APP,
++			     reply, sizeof(reply));
++	if (err)
++		return err;
++
++	p = bin2hex(version, reply, OMNIA_FW_VERSION_LEN);
++	*p = '\0';
++
++	return 0;
++}
++
++static ssize_t fw_version_hash_show(struct device *dev, char *buf,
++				    bool bootloader)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++	char version[OMNIA_FW_VERSION_HEX_LEN];
++	int err;
++
++	err = omnia_get_version_hash(mcu, bootloader, version);
++	if (err)
++		return err;
++
++	return sysfs_emit(buf, "%s\n", version);
++}
++
++static ssize_t fw_version_hash_application_show(struct device *dev,
++						struct device_attribute *a,
++						char *buf)
++{
++	return fw_version_hash_show(dev, buf, false);
++}
++static DEVICE_ATTR_RO(fw_version_hash_application);
++
++static ssize_t fw_version_hash_bootloader_show(struct device *dev,
++					       struct device_attribute *a,
++					       char *buf)
++{
++	return fw_version_hash_show(dev, buf, true);
++}
++static DEVICE_ATTR_RO(fw_version_hash_bootloader);
++
++static ssize_t fw_features_show(struct device *dev, struct device_attribute *a,
++				char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	return sysfs_emit(buf, "0x%x\n", mcu->features);
++}
++static DEVICE_ATTR_RO(fw_features);
++
++static ssize_t mcu_type_show(struct device *dev, struct device_attribute *a,
++			     char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	return sysfs_emit(buf, "%s\n", mcu->type);
++}
++static DEVICE_ATTR_RO(mcu_type);
++
++static ssize_t reset_selector_show(struct device *dev,
++				   struct device_attribute *a, char *buf)
++{
++	u8 reply;
++	int err;
++
++	err = omnia_cmd_read_u8(to_i2c_client(dev), OMNIA_CMD_GET_RESET,
++				&reply);
++	if (err)
++		return err;
++
++	return sysfs_emit(buf, "%d\n", reply);
++}
++static DEVICE_ATTR_RO(reset_selector);
++
++static ssize_t serial_number_show(struct device *dev,
++				  struct device_attribute *a, char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	return sysfs_emit(buf, "%016llX\n", mcu->board_serial_number);
++}
++static DEVICE_ATTR_RO(serial_number);
++
++static ssize_t first_mac_address_show(struct device *dev,
++				      struct device_attribute *a, char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	return sysfs_emit(buf, "%pM\n", mcu->board_first_mac);
++}
++static DEVICE_ATTR_RO(first_mac_address);
++
++static ssize_t board_revision_show(struct device *dev,
++				   struct device_attribute *a, char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	return sysfs_emit(buf, "%u\n", mcu->board_revision);
++}
++static DEVICE_ATTR_RO(board_revision);
++
++static struct attribute *omnia_mcu_base_attrs[] = {
++	&dev_attr_fw_version_hash_application.attr,
++	&dev_attr_fw_version_hash_bootloader.attr,
++	&dev_attr_fw_features.attr,
++	&dev_attr_mcu_type.attr,
++	&dev_attr_reset_selector.attr,
++	&dev_attr_serial_number.attr,
++	&dev_attr_first_mac_address.attr,
++	&dev_attr_board_revision.attr,
++	NULL
++};
++
++static umode_t omnia_mcu_base_attrs_visible(struct kobject *kobj,
++					    struct attribute *a, int n)
++{
++	struct device *dev = kobj_to_dev(kobj);
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	if ((a == &dev_attr_serial_number.attr ||
++	     a == &dev_attr_first_mac_address.attr ||
++	     a == &dev_attr_board_revision.attr) &&
++	    !(mcu->features & OMNIA_FEAT_BOARD_INFO))
++		return 0;
++
++	return a->mode;
++}
++
++static const struct attribute_group omnia_mcu_base_group = {
++	.attrs = omnia_mcu_base_attrs,
++	.is_visible = omnia_mcu_base_attrs_visible,
++};
++
++static const struct attribute_group *omnia_mcu_groups[] = {
++	&omnia_mcu_base_group,
++	NULL
++};
++
++static void omnia_mcu_print_version_hash(struct omnia_mcu *mcu, bool bootloader)
++{
++	const char *type = bootloader ? "bootloader" : "application";
++	struct device *dev = &mcu->client->dev;
++	char version[OMNIA_FW_VERSION_HEX_LEN];
++	int err;
++
++	err = omnia_get_version_hash(mcu, bootloader, version);
++	if (err) {
++		dev_err(dev, "Cannot read MCU %s firmware version: %d\n",
++			type, err);
++		return;
++	}
++
++	dev_info(dev, "MCU %s firmware version hash: %s\n", type, version);
++}
++
++static const char *omnia_status_to_mcu_type(u16 status)
++{
++	switch (status & OMNIA_STS_MCU_TYPE_MASK) {
++	case OMNIA_STS_MCU_TYPE_STM32:
++		return "STM32";
++	case OMNIA_STS_MCU_TYPE_GD32:
++		return "GD32";
++	case OMNIA_STS_MCU_TYPE_MKL:
++		return "MKL";
++	default:
++		return "unknown";
++	}
++}
++
++static void omnia_info_missing_feature(struct device *dev, const char *feature)
++{
++	dev_info(dev,
++		 "Your board's MCU firmware does not support the %s feature.\n",
++		 feature);
++}
++
++static int omnia_mcu_read_features(struct omnia_mcu *mcu)
++{
++	static const struct {
++		u16 mask;
++		const char *name;
++	} features[] = {
++#define _DEF_FEAT(_n, _m) { OMNIA_FEAT_ ## _n, _m }
++		_DEF_FEAT(EXT_CMDS,		"extended control and status"),
++		_DEF_FEAT(WDT_PING,		"watchdog pinging"),
++		_DEF_FEAT(LED_STATE_EXT_MASK,	"peripheral LED pins reading"),
++		_DEF_FEAT(NEW_INT_API,		"new interrupt API"),
++		_DEF_FEAT(POWEROFF_WAKEUP,	"poweroff and wakeup"),
++		_DEF_FEAT(TRNG,			"true random number generator"),
++#undef _DEF_FEAT
++	};
++	struct i2c_client *client = mcu->client;
++	struct device *dev = &client->dev;
++	bool suggest_fw_upgrade = false;
++	u16 status;
++	int err;
++
++	/* status word holds MCU type, which we need below */
++	err = omnia_cmd_read_u16(client, OMNIA_CMD_GET_STATUS_WORD, &status);
++	if (err)
++		return err;
++
++	/*
++	 * Check whether MCU firmware supports the OMNIA_CMD_GET_FEATURES
++	 * command.
++	 */
++	if (status & OMNIA_STS_FEATURES_SUPPORTED) {
++		/* try read 32-bit features */
++		err = omnia_cmd_read_u32(client, OMNIA_CMD_GET_FEATURES,
++					 &mcu->features);
++		if (err) {
++			/* try read 16-bit features */
++			u16 features16;
++
++			err = omnia_cmd_read_u16(client, OMNIA_CMD_GET_FEATURES,
++						 &features16);
++			if (err)
++				return err;
++
++			mcu->features = features16;
++		} else {
++			if (mcu->features & OMNIA_FEAT_FROM_BIT_16_INVALID)
++				mcu->features &= GENMASK(15, 0);
++		}
++	} else {
++		dev_info(dev,
++			 "Your board's MCU firmware does not support feature reading.\n");
++		suggest_fw_upgrade = true;
++	}
++
++	mcu->type = omnia_status_to_mcu_type(status);
++	dev_info(dev, "MCU type %s%s\n", mcu->type,
++		 (mcu->features & OMNIA_FEAT_PERIPH_MCU) ?
++			", with peripheral resets wired" : "");
++
++	omnia_mcu_print_version_hash(mcu, true);
++
++	if (mcu->features & OMNIA_FEAT_BOOTLOADER)
++		dev_warn(dev,
++			 "MCU is running bootloader firmware. Was firmware upgrade interrupted?\n");
++	else
++		omnia_mcu_print_version_hash(mcu, false);
++
++	for (unsigned int i = 0; i < ARRAY_SIZE(features); i++) {
++		if (mcu->features & features[i].mask)
++			continue;
++
++		omnia_info_missing_feature(dev, features[i].name);
++		suggest_fw_upgrade = true;
++	}
++
++	if (suggest_fw_upgrade)
++		dev_info(dev,
++			 "Consider upgrading MCU firmware with the omnia-mcutool utility.\n");
++
++	return 0;
++}
++
++static int omnia_mcu_read_board_info(struct omnia_mcu *mcu)
++{
++	u8 reply[1 + OMNIA_BOARD_INFO_LEN];
++	int err;
++
++	err = omnia_cmd_read(mcu->client, OMNIA_CMD_BOARD_INFO_GET, reply,
++			     sizeof(reply));
++	if (err)
++		return err;
++
++	if (reply[0] != OMNIA_BOARD_INFO_LEN)
++		return -EIO;
++
++	mcu->board_serial_number = get_unaligned_le64(&reply[1]);
++
++	/* we can't use ether_addr_copy() because reply is not u16-aligned */
++	memcpy(mcu->board_first_mac, &reply[9], sizeof(mcu->board_first_mac));
++
++	mcu->board_revision = reply[15];
++
++	return 0;
++}
++
++static int omnia_mcu_probe(struct i2c_client *client)
++{
++	struct device *dev = &client->dev;
++	struct omnia_mcu *mcu;
++	int err;
++
++	if (!client->irq)
++		return dev_err_probe(dev, -EINVAL, "IRQ resource not found\n");
++
++	mcu = devm_kzalloc(dev, sizeof(*mcu), GFP_KERNEL);
++	if (!mcu)
++		return -ENOMEM;
++
++	mcu->client = client;
++	i2c_set_clientdata(client, mcu);
++
++	err = omnia_mcu_read_features(mcu);
++	if (err)
++		return dev_err_probe(dev, err,
++				     "Cannot determine MCU supported features\n");
++
++	if (mcu->features & OMNIA_FEAT_BOARD_INFO) {
++		err = omnia_mcu_read_board_info(mcu);
++		if (err)
++			return dev_err_probe(dev, err,
++					     "Cannot read board info\n");
++	}
++
++	return 0;
++}
++
++static const struct of_device_id of_omnia_mcu_match[] = {
++	{ .compatible = "cznic,turris-omnia-mcu" },
++	{}
++};
++
++static struct i2c_driver omnia_mcu_driver = {
++	.probe		= omnia_mcu_probe,
++	.driver		= {
++		.name	= "turris-omnia-mcu",
++		.of_match_table = of_omnia_mcu_match,
++		.dev_groups = omnia_mcu_groups,
++	},
++};
++module_i2c_driver(omnia_mcu_driver);
++
++MODULE_AUTHOR("Marek Behun <kabel@kernel.org>");
++MODULE_DESCRIPTION("CZ.NIC's Turris Omnia MCU");
++MODULE_LICENSE("GPL");
+--- /dev/null
++++ b/drivers/platform/cznic/turris-omnia-mcu.h
+@@ -0,0 +1,74 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/*
++ * CZ.NIC's Turris Omnia MCU driver
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#ifndef __TURRIS_OMNIA_MCU_H
++#define __TURRIS_OMNIA_MCU_H
++
++#include <linux/if_ether.h>
++#include <linux/types.h>
++#include <asm/byteorder.h>
++
++struct i2c_client;
++
++struct omnia_mcu {
++	struct i2c_client *client;
++	const char *type;
++	u32 features;
++
++	/* board information */
++	u64 board_serial_number;
++	u8 board_first_mac[ETH_ALEN];
++	u8 board_revision;
++};
++
++int omnia_cmd_write_read(const struct i2c_client *client,
++			 void *cmd, unsigned int cmd_len,
++			 void *reply, unsigned int reply_len);
++
++static inline int omnia_cmd_read(const struct i2c_client *client, u8 cmd,
++				 void *reply, unsigned int len)
++{
++	return omnia_cmd_write_read(client, &cmd, 1, reply, len);
++}
++
++static inline int omnia_cmd_read_u32(const struct i2c_client *client, u8 cmd,
++				     u32 *dst)
++{
++	__le32 reply;
++	int err;
++
++	err = omnia_cmd_read(client, cmd, &reply, sizeof(reply));
++	if (err)
++		return err;
++
++	*dst = le32_to_cpu(reply);
++
++	return 0;
++}
++
++static inline int omnia_cmd_read_u16(const struct i2c_client *client, u8 cmd,
++				     u16 *dst)
++{
++	__le16 reply;
++	int err;
++
++	err = omnia_cmd_read(client, cmd, &reply, sizeof(reply));
++	if (err)
++		return err;
++
++	*dst = le16_to_cpu(reply);
++
++	return 0;
++}
++
++static inline int omnia_cmd_read_u8(const struct i2c_client *client, u8 cmd,
++				    u8 *reply)
++{
++	return omnia_cmd_read(client, cmd, reply, sizeof(*reply));
++}
++
++#endif /* __TURRIS_OMNIA_MCU_H */
+--- /dev/null
++++ b/include/linux/turris-omnia-mcu-interface.h
+@@ -0,0 +1,249 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/*
++ * CZ.NIC's Turris Omnia MCU I2C interface commands definitions
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#ifndef __TURRIS_OMNIA_MCU_INTERFACE_H
++#define __TURRIS_OMNIA_MCU_INTERFACE_H
++
++#include <linux/bitfield.h>
++#include <linux/bits.h>
++
++enum omnia_commands_e {
++	OMNIA_CMD_GET_STATUS_WORD		= 0x01, /* slave sends status word back */
++	OMNIA_CMD_GENERAL_CONTROL		= 0x02,
++	OMNIA_CMD_LED_MODE			= 0x03, /* default/user */
++	OMNIA_CMD_LED_STATE			= 0x04, /* LED on/off */
++	OMNIA_CMD_LED_COLOR			= 0x05, /* LED number + RED + GREEN + BLUE */
++	OMNIA_CMD_USER_VOLTAGE			= 0x06,
++	OMNIA_CMD_SET_BRIGHTNESS		= 0x07,
++	OMNIA_CMD_GET_BRIGHTNESS		= 0x08,
++	OMNIA_CMD_GET_RESET			= 0x09,
++	OMNIA_CMD_GET_FW_VERSION_APP		= 0x0A, /* 20B git hash number */
++	OMNIA_CMD_SET_WATCHDOG_STATE		= 0x0B, /* 0 - disable
++							 * 1 - enable / ping
++							 * after boot watchdog is started
++							 * with 2 minutes timeout
++							 */
++
++	/* OMNIA_CMD_WATCHDOG_STATUS		= 0x0C, not implemented anymore */
++
++	OMNIA_CMD_GET_WATCHDOG_STATE		= 0x0D,
++	OMNIA_CMD_GET_FW_VERSION_BOOT		= 0x0E, /* 20B Git hash number */
++	OMNIA_CMD_GET_FW_CHECKSUM		= 0x0F, /* 4B length, 4B checksum */
++
++	/* available if FEATURES_SUPPORTED bit set in status word */
++	OMNIA_CMD_GET_FEATURES			= 0x10,
++
++	/* available if EXT_CMD bit set in features */
++	OMNIA_CMD_GET_EXT_STATUS_DWORD		= 0x11,
++	OMNIA_CMD_EXT_CONTROL			= 0x12,
++	OMNIA_CMD_GET_EXT_CONTROL_STATUS	= 0x13,
++
++	/* available if NEW_INT_API bit set in features */
++	OMNIA_CMD_GET_INT_AND_CLEAR		= 0x14,
++	OMNIA_CMD_GET_INT_MASK			= 0x15,
++	OMNIA_CMD_SET_INT_MASK			= 0x16,
++
++	/* available if FLASHING bit set in features */
++	OMNIA_CMD_FLASH				= 0x19,
++
++	/* available if WDT_PING bit set in features */
++	OMNIA_CMD_SET_WDT_TIMEOUT		= 0x20,
++	OMNIA_CMD_GET_WDT_TIMELEFT		= 0x21,
++
++	/* available if POWEROFF_WAKEUP bit set in features */
++	OMNIA_CMD_SET_WAKEUP			= 0x22,
++	OMNIA_CMD_GET_UPTIME_AND_WAKEUP		= 0x23,
++	OMNIA_CMD_POWER_OFF			= 0x24,
++
++	/* available if USB_OVC_PROT_SETTING bit set in features */
++	OMNIA_CMD_SET_USB_OVC_PROT		= 0x25,
++	OMNIA_CMD_GET_USB_OVC_PROT		= 0x26,
++
++	/* available if TRNG bit set in features */
++	OMNIA_CMD_TRNG_COLLECT_ENTROPY		= 0x28,
++
++	/* available if CRYPTO bit set in features */
++	OMNIA_CMD_CRYPTO_GET_PUBLIC_KEY		= 0x29,
++	OMNIA_CMD_CRYPTO_SIGN_MESSAGE		= 0x2A,
++	OMNIA_CMD_CRYPTO_COLLECT_SIGNATURE	= 0x2B,
++
++	/* available if BOARD_INFO it set in features */
++	OMNIA_CMD_BOARD_INFO_GET		= 0x2C,
++	OMNIA_CMD_BOARD_INFO_BURN		= 0x2D,
++
++	/* available only at address 0x2b (LED-controller) */
++	/* available only if LED_GAMMA_CORRECTION bit set in features */
++	OMNIA_CMD_SET_GAMMA_CORRECTION		= 0x30,
++	OMNIA_CMD_GET_GAMMA_CORRECTION		= 0x31,
++
++	/* available only at address 0x2b (LED-controller) */
++	/* available only if PER_LED_CORRECTION bit set in features */
++	/* available only if FROM_BIT_16_INVALID bit NOT set in features */
++	OMNIA_CMD_SET_LED_CORRECTIONS		= 0x32,
++	OMNIA_CMD_GET_LED_CORRECTIONS		= 0x33,
++};
++
++enum omnia_flashing_commands_e {
++	OMNIA_FLASH_CMD_UNLOCK		= 0x01,
++	OMNIA_FLASH_CMD_SIZE_AND_CSUM	= 0x02,
++	OMNIA_FLASH_CMD_PROGRAM		= 0x03,
++	OMNIA_FLASH_CMD_RESET		= 0x04,
++};
++
++enum omnia_sts_word_e {
++	OMNIA_STS_MCU_TYPE_MASK			= GENMASK(1, 0),
++	OMNIA_STS_MCU_TYPE_STM32		= FIELD_PREP_CONST(OMNIA_STS_MCU_TYPE_MASK, 0),
++	OMNIA_STS_MCU_TYPE_GD32			= FIELD_PREP_CONST(OMNIA_STS_MCU_TYPE_MASK, 1),
++	OMNIA_STS_MCU_TYPE_MKL			= FIELD_PREP_CONST(OMNIA_STS_MCU_TYPE_MASK, 2),
++	OMNIA_STS_FEATURES_SUPPORTED		= BIT(2),
++	OMNIA_STS_USER_REGULATOR_NOT_SUPPORTED	= BIT(3),
++	OMNIA_STS_CARD_DET			= BIT(4),
++	OMNIA_STS_MSATA_IND			= BIT(5),
++	OMNIA_STS_USB30_OVC			= BIT(6),
++	OMNIA_STS_USB31_OVC			= BIT(7),
++	OMNIA_STS_USB30_PWRON			= BIT(8),
++	OMNIA_STS_USB31_PWRON			= BIT(9),
++	OMNIA_STS_ENABLE_4V5			= BIT(10),
++	OMNIA_STS_BUTTON_MODE			= BIT(11),
++	OMNIA_STS_BUTTON_PRESSED		= BIT(12),
++	OMNIA_STS_BUTTON_COUNTER_MASK		= GENMASK(15, 13),
++};
++
++enum omnia_ctl_byte_e {
++	OMNIA_CTL_LIGHT_RST	= BIT(0),
++	OMNIA_CTL_HARD_RST	= BIT(1),
++	/* BIT(2) is currently reserved */
++	OMNIA_CTL_USB30_PWRON	= BIT(3),
++	OMNIA_CTL_USB31_PWRON	= BIT(4),
++	OMNIA_CTL_ENABLE_4V5	= BIT(5),
++	OMNIA_CTL_BUTTON_MODE	= BIT(6),
++	OMNIA_CTL_BOOTLOADER	= BIT(7),
++};
++
++enum omnia_features_e {
++	OMNIA_FEAT_PERIPH_MCU		= BIT(0),
++	OMNIA_FEAT_EXT_CMDS		= BIT(1),
++	OMNIA_FEAT_WDT_PING		= BIT(2),
++	OMNIA_FEAT_LED_STATE_EXT_MASK	= GENMASK(4, 3),
++	OMNIA_FEAT_LED_STATE_EXT	= FIELD_PREP_CONST(OMNIA_FEAT_LED_STATE_EXT_MASK, 1),
++	OMNIA_FEAT_LED_STATE_EXT_V32	= FIELD_PREP_CONST(OMNIA_FEAT_LED_STATE_EXT_MASK, 2),
++	OMNIA_FEAT_LED_GAMMA_CORRECTION	= BIT(5),
++	OMNIA_FEAT_NEW_INT_API		= BIT(6),
++	OMNIA_FEAT_BOOTLOADER		= BIT(7),
++	OMNIA_FEAT_FLASHING		= BIT(8),
++	OMNIA_FEAT_NEW_MESSAGE_API	= BIT(9),
++	OMNIA_FEAT_BRIGHTNESS_INT	= BIT(10),
++	OMNIA_FEAT_POWEROFF_WAKEUP	= BIT(11),
++	OMNIA_FEAT_CAN_OLD_MESSAGE_API	= BIT(12),
++	OMNIA_FEAT_TRNG			= BIT(13),
++	OMNIA_FEAT_CRYPTO		= BIT(14),
++	OMNIA_FEAT_BOARD_INFO		= BIT(15),
++
++	/*
++	 * Orginally the features command replied only 16 bits. If more were
++	 * read, either the I2C transaction failed or 0xff bytes were sent.
++	 * Therefore to consider bits 16 - 31 valid, one bit (20) was reserved
++	 * to be zero.
++	 */
++
++	/* Bits 16 - 19 correspond to bits 0 - 3 of status word */
++	OMNIA_FEAT_MCU_TYPE_MASK		= GENMASK(17, 16),
++	OMNIA_FEAT_MCU_TYPE_STM32		= FIELD_PREP_CONST(OMNIA_FEAT_MCU_TYPE_MASK, 0),
++	OMNIA_FEAT_MCU_TYPE_GD32		= FIELD_PREP_CONST(OMNIA_FEAT_MCU_TYPE_MASK, 1),
++	OMNIA_FEAT_MCU_TYPE_MKL			= FIELD_PREP_CONST(OMNIA_FEAT_MCU_TYPE_MASK, 2),
++	OMNIA_FEAT_FEATURES_SUPPORTED		= BIT(18),
++	OMNIA_FEAT_USER_REGULATOR_NOT_SUPPORTED	= BIT(19),
++
++	/* must not be set */
++	OMNIA_FEAT_FROM_BIT_16_INVALID	= BIT(20),
++
++	OMNIA_FEAT_PER_LED_CORRECTION	= BIT(21),
++	OMNIA_FEAT_USB_OVC_PROT_SETTING	= BIT(22),
++};
++
++enum omnia_ext_sts_dword_e {
++	OMNIA_EXT_STS_SFP_nDET		= BIT(0),
++	OMNIA_EXT_STS_LED_STATES_MASK	= GENMASK(31, 12),
++	OMNIA_EXT_STS_WLAN0_MSATA_LED	= BIT(12),
++	OMNIA_EXT_STS_WLAN1_LED		= BIT(13),
++	OMNIA_EXT_STS_WLAN2_LED		= BIT(14),
++	OMNIA_EXT_STS_WPAN0_LED		= BIT(15),
++	OMNIA_EXT_STS_WPAN1_LED		= BIT(16),
++	OMNIA_EXT_STS_WPAN2_LED		= BIT(17),
++	OMNIA_EXT_STS_WAN_LED0		= BIT(18),
++	OMNIA_EXT_STS_WAN_LED1		= BIT(19),
++	OMNIA_EXT_STS_LAN0_LED0		= BIT(20),
++	OMNIA_EXT_STS_LAN0_LED1		= BIT(21),
++	OMNIA_EXT_STS_LAN1_LED0		= BIT(22),
++	OMNIA_EXT_STS_LAN1_LED1		= BIT(23),
++	OMNIA_EXT_STS_LAN2_LED0		= BIT(24),
++	OMNIA_EXT_STS_LAN2_LED1		= BIT(25),
++	OMNIA_EXT_STS_LAN3_LED0		= BIT(26),
++	OMNIA_EXT_STS_LAN3_LED1		= BIT(27),
++	OMNIA_EXT_STS_LAN4_LED0		= BIT(28),
++	OMNIA_EXT_STS_LAN4_LED1		= BIT(29),
++	OMNIA_EXT_STS_LAN5_LED0		= BIT(30),
++	OMNIA_EXT_STS_LAN5_LED1		= BIT(31),
++};
++
++enum omnia_ext_ctl_e {
++	OMNIA_EXT_CTL_nRES_MMC		= BIT(0),
++	OMNIA_EXT_CTL_nRES_LAN		= BIT(1),
++	OMNIA_EXT_CTL_nRES_PHY		= BIT(2),
++	OMNIA_EXT_CTL_nPERST0		= BIT(3),
++	OMNIA_EXT_CTL_nPERST1		= BIT(4),
++	OMNIA_EXT_CTL_nPERST2		= BIT(5),
++	OMNIA_EXT_CTL_PHY_SFP		= BIT(6),
++	OMNIA_EXT_CTL_PHY_SFP_AUTO	= BIT(7),
++	OMNIA_EXT_CTL_nVHV_CTRL		= BIT(8),
++};
++
++enum omnia_int_e {
++	OMNIA_INT_CARD_DET		= BIT(0),
++	OMNIA_INT_MSATA_IND		= BIT(1),
++	OMNIA_INT_USB30_OVC		= BIT(2),
++	OMNIA_INT_USB31_OVC		= BIT(3),
++	OMNIA_INT_BUTTON_PRESSED	= BIT(4),
++	OMNIA_INT_SFP_nDET		= BIT(5),
++	OMNIA_INT_BRIGHTNESS_CHANGED	= BIT(6),
++	OMNIA_INT_TRNG			= BIT(7),
++	OMNIA_INT_MESSAGE_SIGNED	= BIT(8),
++
++	OMNIA_INT_LED_STATES_MASK	= GENMASK(31, 12),
++	OMNIA_INT_WLAN0_MSATA_LED	= BIT(12),
++	OMNIA_INT_WLAN1_LED		= BIT(13),
++	OMNIA_INT_WLAN2_LED		= BIT(14),
++	OMNIA_INT_WPAN0_LED		= BIT(15),
++	OMNIA_INT_WPAN1_LED		= BIT(16),
++	OMNIA_INT_WPAN2_LED		= BIT(17),
++	OMNIA_INT_WAN_LED0		= BIT(18),
++	OMNIA_INT_WAN_LED1		= BIT(19),
++	OMNIA_INT_LAN0_LED0		= BIT(20),
++	OMNIA_INT_LAN0_LED1		= BIT(21),
++	OMNIA_INT_LAN1_LED0		= BIT(22),
++	OMNIA_INT_LAN1_LED1		= BIT(23),
++	OMNIA_INT_LAN2_LED0		= BIT(24),
++	OMNIA_INT_LAN2_LED1		= BIT(25),
++	OMNIA_INT_LAN3_LED0		= BIT(26),
++	OMNIA_INT_LAN3_LED1		= BIT(27),
++	OMNIA_INT_LAN4_LED0		= BIT(28),
++	OMNIA_INT_LAN4_LED1		= BIT(29),
++	OMNIA_INT_LAN5_LED0		= BIT(30),
++	OMNIA_INT_LAN5_LED1		= BIT(31),
++};
++
++enum omnia_cmd_poweroff_e {
++	OMNIA_CMD_POWER_OFF_POWERON_BUTTON	= BIT(0),
++	OMNIA_CMD_POWER_OFF_MAGIC		= 0xdead,
++};
++
++enum omnia_cmd_usb_ovc_prot_e {
++	OMNIA_CMD_xET_USB_OVC_PROT_PORT_MASK	= GENMASK(3, 0),
++	OMNIA_CMD_xET_USB_OVC_PROT_ENABLE	= BIT(4),
++};
++
++#endif /* __TURRIS_OMNIA_MCU_INTERFACE_H */
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-03-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch b/target/linux/mvebu/patches-6.6/820-v6.11-03-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch
new file mode 100644
index 0000000000..3309a773a9
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-03-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch
@@ -0,0 +1,1311 @@
+From 7f4f2744f9788312e12940b516b51a0a466b137e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:05 +0200
+Subject: [PATCH 03/11] platform: cznic: turris-omnia-mcu: Add support for MCU
+ connected GPIOs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add support for GPIOs connected to the MCU on the Turris Omnia board.
+
+This includes:
+- front button pin
+- enable pins for USB regulators
+- MiniPCIe / mSATA card presence pins in MiniPCIe port 0
+- LED output pins from WAN ethernet PHY, LAN switch and MiniPCIe ports
+- on board revisions 32+ also various peripheral resets and another
+  voltage regulator enable pin
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20240701113010.16447-4-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ .../sysfs-bus-i2c-devices-turris-omnia-mcu    |   16 +
+ drivers/platform/cznic/Kconfig                |   15 +
+ drivers/platform/cznic/Makefile               |    1 +
+ .../platform/cznic/turris-omnia-mcu-base.c    |    3 +-
+ .../platform/cznic/turris-omnia-mcu-gpio.c    | 1094 +++++++++++++++++
+ drivers/platform/cznic/turris-omnia-mcu.h     |   68 +
+ 6 files changed, 1196 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/platform/cznic/turris-omnia-mcu-gpio.c
+
+--- a/Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
++++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
+@@ -22,6 +22,22 @@ Description:	(RO) Contains device first
+ 
+ 		Format: %pM.
+ 
++What:		/sys/bus/i2c/devices/<mcu_device>/front_button_mode
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RW) The front button on the Turris Omnia router can be
++		configured either to change the intensity of all the LEDs on the
++		front panel, or to send the press event to the CPU as an
++		interrupt.
++
++		This file switches between these two modes:
++		- "mcu" makes the button press event be handled by the MCU to
++		  change the LEDs panel intensity.
++		- "cpu" makes the button press event be handled by the CPU.
++
++		Format: %s.
++
+ What:		/sys/bus/i2c/devices/<mcu_device>/fw_features
+ Date:		September 2024
+ KernelVersion:	6.11
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -16,9 +16,24 @@ config TURRIS_OMNIA_MCU
+ 	tristate "Turris Omnia MCU driver"
+ 	depends on MACH_ARMADA_38X || COMPILE_TEST
+ 	depends on I2C
++	select GPIOLIB
++	select GPIOLIB_IRQCHIP
+ 	help
+ 	  Say Y here to add support for the features implemented by the
+ 	  microcontroller on the CZ.NIC's Turris Omnia SOHO router.
++	  The features include:
++	  - GPIO pins
++	    - to get front button press events (the front button can be
++	      configured either to generate press events to the CPU or to change
++	      front LEDs panel brightness)
++	    - to enable / disable USB port voltage regulators and to detect
++	      USB overcurrent
++	    - to detect MiniPCIe / mSATA card presence in MiniPCIe port 0
++	    - to configure resets of various peripherals on board revisions 32+
++	    - to enable / disable the VHV voltage regulator to the SOC in order
++	      to be able to program SOC's OTP on board revisions 32+
++	    - to get input from the LED output pins of the WAN ethernet PHY, LAN
++	      switch and MiniPCIe ports
+ 	  To compile this driver as a module, choose M here; the module will be
+ 	  called turris-omnia-mcu.
+ 
+--- a/drivers/platform/cznic/Makefile
++++ b/drivers/platform/cznic/Makefile
+@@ -2,3 +2,4 @@
+ 
+ obj-$(CONFIG_TURRIS_OMNIA_MCU)	+= turris-omnia-mcu.o
+ turris-omnia-mcu-y		:= turris-omnia-mcu-base.o
++turris-omnia-mcu-y		+= turris-omnia-mcu-gpio.o
+--- a/drivers/platform/cznic/turris-omnia-mcu-base.c
++++ b/drivers/platform/cznic/turris-omnia-mcu-base.c
+@@ -196,6 +196,7 @@ static const struct attribute_group omni
+ 
+ static const struct attribute_group *omnia_mcu_groups[] = {
+ 	&omnia_mcu_base_group,
++	&omnia_mcu_gpio_group,
+ 	NULL
+ };
+ 
+@@ -370,7 +371,7 @@ static int omnia_mcu_probe(struct i2c_cl
+ 					     "Cannot read board info\n");
+ 	}
+ 
+-	return 0;
++	return omnia_mcu_register_gpiochip(mcu);
+ }
+ 
+ static const struct of_device_id of_omnia_mcu_match[] = {
+--- /dev/null
++++ b/drivers/platform/cznic/turris-omnia-mcu-gpio.c
+@@ -0,0 +1,1094 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * CZ.NIC's Turris Omnia MCU GPIO and IRQ driver
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#include <linux/bitfield.h>
++#include <linux/bitops.h>
++#include <linux/bug.h>
++#include <linux/cleanup.h>
++#include <linux/device.h>
++#include <linux/devm-helpers.h>
++#include <linux/errno.h>
++#include <linux/gpio/driver.h>
++#include <linux/i2c.h>
++#include <linux/interrupt.h>
++#include <linux/mutex.h>
++#include <linux/sysfs.h>
++#include <linux/types.h>
++#include <linux/workqueue.h>
++#include <asm/unaligned.h>
++
++#include <linux/turris-omnia-mcu-interface.h>
++#include "turris-omnia-mcu.h"
++
++#define OMNIA_CMD_INT_ARG_LEN		8
++#define FRONT_BUTTON_RELEASE_DELAY_MS	50
++
++static const char * const omnia_mcu_gpio_templates[64] = {
++	/* GPIOs with value read from the 16-bit wide status */
++	[4]  = "MiniPCIe0 Card Detect",
++	[5]  = "MiniPCIe0 mSATA Indicator",
++	[6]  = "Front USB3 port over-current",
++	[7]  = "Rear USB3 port over-current",
++	[8]  = "Front USB3 port power",
++	[9]  = "Rear USB3 port power",
++	[12] = "Front Button",
++
++	/* GPIOs with value read from the 32-bit wide extended status */
++	[16] = "SFP nDET",
++	[28] = "MiniPCIe0 LED",
++	[29] = "MiniPCIe1 LED",
++	[30] = "MiniPCIe2 LED",
++	[31] = "MiniPCIe0 PAN LED",
++	[32] = "MiniPCIe1 PAN LED",
++	[33] = "MiniPCIe2 PAN LED",
++	[34] = "WAN PHY LED0",
++	[35] = "WAN PHY LED1",
++	[36] = "LAN switch p0 LED0",
++	[37] = "LAN switch p0 LED1",
++	[38] = "LAN switch p1 LED0",
++	[39] = "LAN switch p1 LED1",
++	[40] = "LAN switch p2 LED0",
++	[41] = "LAN switch p2 LED1",
++	[42] = "LAN switch p3 LED0",
++	[43] = "LAN switch p3 LED1",
++	[44] = "LAN switch p4 LED0",
++	[45] = "LAN switch p4 LED1",
++	[46] = "LAN switch p5 LED0",
++	[47] = "LAN switch p5 LED1",
++
++	/* GPIOs with value read from the 16-bit wide extended control status */
++	[48] = "eMMC nRESET",
++	[49] = "LAN switch nRESET",
++	[50] = "WAN PHY nRESET",
++	[51] = "MiniPCIe0 nPERST",
++	[52] = "MiniPCIe1 nPERST",
++	[53] = "MiniPCIe2 nPERST",
++	[54] = "WAN PHY SFP mux",
++	[56] = "VHV power disable",
++};
++
++struct omnia_gpio {
++	u8 cmd;
++	u8 ctl_cmd;
++	u8 bit;
++	u8 ctl_bit;
++	u8 int_bit;
++	u16 feat;
++	u16 feat_mask;
++};
++
++#define OMNIA_GPIO_INVALID_INT_BIT	0xff
++
++#define _DEF_GPIO(_cmd, _ctl_cmd, _bit, _ctl_bit, _int_bit, _feat, _feat_mask) \
++	{								\
++		.cmd = _cmd,						\
++		.ctl_cmd = _ctl_cmd,					\
++		.bit = _bit,						\
++		.ctl_bit = _ctl_bit,					\
++		.int_bit = (_int_bit) < 0 ? OMNIA_GPIO_INVALID_INT_BIT	\
++					  : (_int_bit),			\
++		.feat = _feat,						\
++		.feat_mask = _feat_mask,				\
++	}
++
++#define _DEF_GPIO_STS(_name) \
++	_DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, 0, __bf_shf(OMNIA_STS_ ## _name), \
++		  0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)
++
++#define _DEF_GPIO_CTL(_name) \
++	_DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, OMNIA_CMD_GENERAL_CONTROL, \
++		  __bf_shf(OMNIA_STS_ ## _name), __bf_shf(OMNIA_CTL_ ## _name), \
++		  -1, 0, 0)
++
++#define _DEF_GPIO_EXT_STS(_name, _feat) \
++	_DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
++		  __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
++		  __bf_shf(OMNIA_INT_ ## _name), \
++		  OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \
++		  OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)
++
++#define _DEF_GPIO_EXT_STS_LED(_name, _ledext) \
++	_DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
++		  __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
++		  __bf_shf(OMNIA_INT_ ## _name), \
++		  OMNIA_FEAT_LED_STATE_ ## _ledext, \
++		  OMNIA_FEAT_LED_STATE_EXT_MASK)
++
++#define _DEF_GPIO_EXT_STS_LEDALL(_name) \
++	_DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
++		  __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
++		  __bf_shf(OMNIA_INT_ ## _name), \
++		  OMNIA_FEAT_LED_STATE_EXT_MASK, 0)
++
++#define _DEF_GPIO_EXT_CTL(_name, _feat) \
++	_DEF_GPIO(OMNIA_CMD_GET_EXT_CONTROL_STATUS, OMNIA_CMD_EXT_CONTROL, \
++		  __bf_shf(OMNIA_EXT_CTL_ ## _name), \
++		  __bf_shf(OMNIA_EXT_CTL_ ## _name), -1, \
++		  OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \
++		  OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)
++
++#define _DEF_INT(_name) \
++	_DEF_GPIO(0, 0, 0, 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)
++
++static inline bool is_int_bit_valid(const struct omnia_gpio *gpio)
++{
++	return gpio->int_bit != OMNIA_GPIO_INVALID_INT_BIT;
++}
++
++static const struct omnia_gpio omnia_gpios[64] = {
++	/* GPIOs with value read from the 16-bit wide status */
++	[4]  = _DEF_GPIO_STS(CARD_DET),
++	[5]  = _DEF_GPIO_STS(MSATA_IND),
++	[6]  = _DEF_GPIO_STS(USB30_OVC),
++	[7]  = _DEF_GPIO_STS(USB31_OVC),
++	[8]  = _DEF_GPIO_CTL(USB30_PWRON),
++	[9]  = _DEF_GPIO_CTL(USB31_PWRON),
++
++	/* brightness changed interrupt, no GPIO */
++	[11] = _DEF_INT(BRIGHTNESS_CHANGED),
++
++	[12] = _DEF_GPIO_STS(BUTTON_PRESSED),
++
++	/* TRNG interrupt, no GPIO */
++	[13] = _DEF_INT(TRNG),
++
++	/* MESSAGE_SIGNED interrupt, no GPIO */
++	[14] = _DEF_INT(MESSAGE_SIGNED),
++
++	/* GPIOs with value read from the 32-bit wide extended status */
++	[16] = _DEF_GPIO_EXT_STS(SFP_nDET, PERIPH_MCU),
++	[28] = _DEF_GPIO_EXT_STS_LEDALL(WLAN0_MSATA_LED),
++	[29] = _DEF_GPIO_EXT_STS_LEDALL(WLAN1_LED),
++	[30] = _DEF_GPIO_EXT_STS_LEDALL(WLAN2_LED),
++	[31] = _DEF_GPIO_EXT_STS_LED(WPAN0_LED, EXT),
++	[32] = _DEF_GPIO_EXT_STS_LED(WPAN1_LED, EXT),
++	[33] = _DEF_GPIO_EXT_STS_LED(WPAN2_LED, EXT),
++	[34] = _DEF_GPIO_EXT_STS_LEDALL(WAN_LED0),
++	[35] = _DEF_GPIO_EXT_STS_LED(WAN_LED1, EXT_V32),
++	[36] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED0),
++	[37] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED1),
++	[38] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED0),
++	[39] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED1),
++	[40] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED0),
++	[41] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED1),
++	[42] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED0),
++	[43] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED1),
++	[44] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED0),
++	[45] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED1),
++	[46] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED0),
++	[47] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED1),
++
++	/* GPIOs with value read from the 16-bit wide extended control status */
++	[48] = _DEF_GPIO_EXT_CTL(nRES_MMC, PERIPH_MCU),
++	[49] = _DEF_GPIO_EXT_CTL(nRES_LAN, PERIPH_MCU),
++	[50] = _DEF_GPIO_EXT_CTL(nRES_PHY, PERIPH_MCU),
++	[51] = _DEF_GPIO_EXT_CTL(nPERST0, PERIPH_MCU),
++	[52] = _DEF_GPIO_EXT_CTL(nPERST1, PERIPH_MCU),
++	[53] = _DEF_GPIO_EXT_CTL(nPERST2, PERIPH_MCU),
++	[54] = _DEF_GPIO_EXT_CTL(PHY_SFP, PERIPH_MCU),
++	[56] = _DEF_GPIO_EXT_CTL(nVHV_CTRL, PERIPH_MCU),
++};
++
++/* mapping from interrupts to indexes of GPIOs in the omnia_gpios array */
++static const u8 omnia_int_to_gpio_idx[32] = {
++	[__bf_shf(OMNIA_INT_CARD_DET)]			= 4,
++	[__bf_shf(OMNIA_INT_MSATA_IND)]			= 5,
++	[__bf_shf(OMNIA_INT_USB30_OVC)]			= 6,
++	[__bf_shf(OMNIA_INT_USB31_OVC)]			= 7,
++	[__bf_shf(OMNIA_INT_BUTTON_PRESSED)]		= 12,
++	[__bf_shf(OMNIA_INT_TRNG)]			= 13,
++	[__bf_shf(OMNIA_INT_MESSAGE_SIGNED)]		= 14,
++	[__bf_shf(OMNIA_INT_SFP_nDET)]			= 16,
++	[__bf_shf(OMNIA_INT_BRIGHTNESS_CHANGED)]	= 11,
++	[__bf_shf(OMNIA_INT_WLAN0_MSATA_LED)]		= 28,
++	[__bf_shf(OMNIA_INT_WLAN1_LED)]			= 29,
++	[__bf_shf(OMNIA_INT_WLAN2_LED)]			= 30,
++	[__bf_shf(OMNIA_INT_WPAN0_LED)]			= 31,
++	[__bf_shf(OMNIA_INT_WPAN1_LED)]			= 32,
++	[__bf_shf(OMNIA_INT_WPAN2_LED)]			= 33,
++	[__bf_shf(OMNIA_INT_WAN_LED0)]			= 34,
++	[__bf_shf(OMNIA_INT_WAN_LED1)]			= 35,
++	[__bf_shf(OMNIA_INT_LAN0_LED0)]			= 36,
++	[__bf_shf(OMNIA_INT_LAN0_LED1)]			= 37,
++	[__bf_shf(OMNIA_INT_LAN1_LED0)]			= 38,
++	[__bf_shf(OMNIA_INT_LAN1_LED1)]			= 39,
++	[__bf_shf(OMNIA_INT_LAN2_LED0)]			= 40,
++	[__bf_shf(OMNIA_INT_LAN2_LED1)]			= 41,
++	[__bf_shf(OMNIA_INT_LAN3_LED0)]			= 42,
++	[__bf_shf(OMNIA_INT_LAN3_LED1)]			= 43,
++	[__bf_shf(OMNIA_INT_LAN4_LED0)]			= 44,
++	[__bf_shf(OMNIA_INT_LAN4_LED1)]			= 45,
++	[__bf_shf(OMNIA_INT_LAN5_LED0)]			= 46,
++	[__bf_shf(OMNIA_INT_LAN5_LED1)]			= 47,
++};
++
++/* index of PHY_SFP GPIO in the omnia_gpios array */
++#define OMNIA_GPIO_PHY_SFP_OFFSET	54
++
++static int omnia_ctl_cmd_locked(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)
++{
++	unsigned int len;
++	u8 buf[5];
++
++	buf[0] = cmd;
++
++	switch (cmd) {
++	case OMNIA_CMD_GENERAL_CONTROL:
++		buf[1] = val;
++		buf[2] = mask;
++		len = 3;
++		break;
++
++	case OMNIA_CMD_EXT_CONTROL:
++		put_unaligned_le16(val, &buf[1]);
++		put_unaligned_le16(mask, &buf[3]);
++		len = 5;
++		break;
++
++	default:
++		BUG();
++	}
++
++	return omnia_cmd_write(mcu->client, buf, len);
++}
++
++static int omnia_ctl_cmd(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)
++{
++	guard(mutex)(&mcu->lock);
++
++	return omnia_ctl_cmd_locked(mcu, cmd, val, mask);
++}
++
++static int omnia_gpio_request(struct gpio_chip *gc, unsigned int offset)
++{
++	if (!omnia_gpios[offset].cmd)
++		return -EINVAL;
++
++	return 0;
++}
++
++static int omnia_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
++{
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++
++	if (offset == OMNIA_GPIO_PHY_SFP_OFFSET) {
++		int val;
++
++		scoped_guard(mutex, &mcu->lock) {
++			val = omnia_cmd_read_bit(mcu->client,
++						 OMNIA_CMD_GET_EXT_CONTROL_STATUS,
++						 OMNIA_EXT_CTL_PHY_SFP_AUTO);
++			if (val < 0)
++				return val;
++		}
++
++		if (val)
++			return GPIO_LINE_DIRECTION_IN;
++
++		return GPIO_LINE_DIRECTION_OUT;
++	}
++
++	if (omnia_gpios[offset].ctl_cmd)
++		return GPIO_LINE_DIRECTION_OUT;
++
++	return GPIO_LINE_DIRECTION_IN;
++}
++
++static int omnia_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
++{
++	const struct omnia_gpio *gpio = &omnia_gpios[offset];
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++
++	if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)
++		return omnia_ctl_cmd(mcu, OMNIA_CMD_EXT_CONTROL,
++				     OMNIA_EXT_CTL_PHY_SFP_AUTO,
++				     OMNIA_EXT_CTL_PHY_SFP_AUTO);
++
++	if (gpio->ctl_cmd)
++		return -ENOTSUPP;
++
++	return 0;
++}
++
++static int omnia_gpio_direction_output(struct gpio_chip *gc,
++				       unsigned int offset, int value)
++{
++	const struct omnia_gpio *gpio = &omnia_gpios[offset];
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	u16 val, mask;
++
++	if (!gpio->ctl_cmd)
++		return -ENOTSUPP;
++
++	mask = BIT(gpio->ctl_bit);
++	val = value ? mask : 0;
++
++	if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)
++		mask |= OMNIA_EXT_CTL_PHY_SFP_AUTO;
++
++	return omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);
++}
++
++static int omnia_gpio_get(struct gpio_chip *gc, unsigned int offset)
++{
++	const struct omnia_gpio *gpio = &omnia_gpios[offset];
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++
++	/*
++	 * If firmware does not support the new interrupt API, we are informed
++	 * of every change of the status word by an interrupt from MCU and save
++	 * its value in the interrupt service routine. Simply return the saved
++	 * value.
++	 */
++	if (gpio->cmd == OMNIA_CMD_GET_STATUS_WORD &&
++	    !(mcu->features & OMNIA_FEAT_NEW_INT_API))
++		return test_bit(gpio->bit, &mcu->last_status);
++
++	guard(mutex)(&mcu->lock);
++
++	/*
++	 * If firmware does support the new interrupt API, we may have cached
++	 * the value of a GPIO in the interrupt service routine. If not, read
++	 * the relevant bit now.
++	 */
++	if (is_int_bit_valid(gpio) && test_bit(gpio->int_bit, &mcu->is_cached))
++		return test_bit(gpio->int_bit, &mcu->cached);
++
++	return omnia_cmd_read_bit(mcu->client, gpio->cmd, BIT(gpio->bit));
++}
++
++static unsigned long *
++_relevant_field_for_sts_cmd(u8 cmd, unsigned long *sts, unsigned long *ext_sts,
++			    unsigned long *ext_ctl)
++{
++	switch (cmd) {
++	case OMNIA_CMD_GET_STATUS_WORD:
++		return sts;
++	case OMNIA_CMD_GET_EXT_STATUS_DWORD:
++		return ext_sts;
++	case OMNIA_CMD_GET_EXT_CONTROL_STATUS:
++		return ext_ctl;
++	default:
++		return NULL;
++	}
++}
++
++static int omnia_gpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,
++				   unsigned long *bits)
++{
++	unsigned long sts = 0, ext_sts = 0, ext_ctl = 0, *field;
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	struct i2c_client *client = mcu->client;
++	unsigned int i;
++	int err;
++
++	/* determine which bits to read from the 3 possible commands */
++	for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
++		field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,
++						    &sts, &ext_sts, &ext_ctl);
++		if (!field)
++			continue;
++
++		__set_bit(omnia_gpios[i].bit, field);
++	}
++
++	guard(mutex)(&mcu->lock);
++
++	if (mcu->features & OMNIA_FEAT_NEW_INT_API) {
++		/* read relevant bits from status */
++		err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_STATUS_WORD,
++					  sts, &sts);
++		if (err)
++			return err;
++	} else {
++		/*
++		 * Use status word value cached in the interrupt service routine
++		 * if firmware does not support the new interrupt API.
++		 */
++		sts = mcu->last_status;
++	}
++
++	/* read relevant bits from extended status */
++	err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_STATUS_DWORD,
++				  ext_sts, &ext_sts);
++	if (err)
++		return err;
++
++	/* read relevant bits from extended control */
++	err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_CONTROL_STATUS,
++				  ext_ctl, &ext_ctl);
++	if (err)
++		return err;
++
++	/* assign relevant bits in result */
++	for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
++		field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,
++						    &sts, &ext_sts, &ext_ctl);
++		if (!field)
++			continue;
++
++		__assign_bit(i, bits, test_bit(omnia_gpios[i].bit, field));
++	}
++
++	return 0;
++}
++
++static void omnia_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
++{
++	const struct omnia_gpio *gpio = &omnia_gpios[offset];
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	u16 val, mask;
++
++	if (!gpio->ctl_cmd)
++		return;
++
++	mask = BIT(gpio->ctl_bit);
++	val = value ? mask : 0;
++
++	omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);
++}
++
++static void omnia_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
++				    unsigned long *bits)
++{
++	unsigned long ctl = 0, ctl_mask = 0, ext_ctl = 0, ext_ctl_mask = 0;
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	unsigned int i;
++
++	for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
++		unsigned long *field, *field_mask;
++		u8 bit = omnia_gpios[i].ctl_bit;
++
++		switch (omnia_gpios[i].ctl_cmd) {
++		case OMNIA_CMD_GENERAL_CONTROL:
++			field = &ctl;
++			field_mask = &ctl_mask;
++			break;
++		case OMNIA_CMD_EXT_CONTROL:
++			field = &ext_ctl;
++			field_mask = &ext_ctl_mask;
++			break;
++		default:
++			field = field_mask = NULL;
++			break;
++		}
++
++		if (!field)
++			continue;
++
++		__set_bit(bit, field_mask);
++		__assign_bit(bit, field, test_bit(i, bits));
++	}
++
++	guard(mutex)(&mcu->lock);
++
++	if (ctl_mask)
++		omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,
++				     ctl, ctl_mask);
++
++	if (ext_ctl_mask)
++		omnia_ctl_cmd_locked(mcu, OMNIA_CMD_EXT_CONTROL,
++				     ext_ctl, ext_ctl_mask);
++}
++
++static bool omnia_gpio_available(struct omnia_mcu *mcu,
++				 const struct omnia_gpio *gpio)
++{
++	if (gpio->feat_mask)
++		return (mcu->features & gpio->feat_mask) == gpio->feat;
++
++	if (gpio->feat)
++		return mcu->features & gpio->feat;
++
++	return true;
++}
++
++static int omnia_gpio_init_valid_mask(struct gpio_chip *gc,
++				      unsigned long *valid_mask,
++				      unsigned int ngpios)
++{
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++
++	for (unsigned int i = 0; i < ngpios; i++) {
++		const struct omnia_gpio *gpio = &omnia_gpios[i];
++
++		if (gpio->cmd || is_int_bit_valid(gpio))
++			__assign_bit(i, valid_mask,
++				     omnia_gpio_available(mcu, gpio));
++		else
++			__clear_bit(i, valid_mask);
++	}
++
++	return 0;
++}
++
++static int omnia_gpio_of_xlate(struct gpio_chip *gc,
++			       const struct of_phandle_args *gpiospec,
++			       u32 *flags)
++{
++	u32 bank, gpio;
++
++	if (WARN_ON(gpiospec->args_count != 3))
++		return -EINVAL;
++
++	if (flags)
++		*flags = gpiospec->args[2];
++
++	bank = gpiospec->args[0];
++	gpio = gpiospec->args[1];
++
++	switch (bank) {
++	case 0:
++		return gpio < 16 ? gpio : -EINVAL;
++	case 1:
++		return gpio < 32 ? 16 + gpio : -EINVAL;
++	case 2:
++		return gpio < 16 ? 48 + gpio : -EINVAL;
++	default:
++		return -EINVAL;
++	}
++}
++
++static void omnia_irq_shutdown(struct irq_data *d)
++{
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	irq_hw_number_t hwirq = irqd_to_hwirq(d);
++	u8 bit = omnia_gpios[hwirq].int_bit;
++
++	__clear_bit(bit, &mcu->rising);
++	__clear_bit(bit, &mcu->falling);
++}
++
++static void omnia_irq_mask(struct irq_data *d)
++{
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	irq_hw_number_t hwirq = irqd_to_hwirq(d);
++	u8 bit = omnia_gpios[hwirq].int_bit;
++
++	if (!omnia_gpios[hwirq].cmd)
++		__clear_bit(bit, &mcu->rising);
++	__clear_bit(bit, &mcu->mask);
++	gpiochip_disable_irq(gc, hwirq);
++}
++
++static void omnia_irq_unmask(struct irq_data *d)
++{
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	irq_hw_number_t hwirq = irqd_to_hwirq(d);
++	u8 bit = omnia_gpios[hwirq].int_bit;
++
++	gpiochip_enable_irq(gc, hwirq);
++	__set_bit(bit, &mcu->mask);
++	if (!omnia_gpios[hwirq].cmd)
++		__set_bit(bit, &mcu->rising);
++}
++
++static int omnia_irq_set_type(struct irq_data *d, unsigned int type)
++{
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	irq_hw_number_t hwirq = irqd_to_hwirq(d);
++	struct device *dev = &mcu->client->dev;
++	u8 bit = omnia_gpios[hwirq].int_bit;
++
++	if (!(type & IRQ_TYPE_EDGE_BOTH)) {
++		dev_err(dev, "irq %u: unsupported type %u\n", d->irq, type);
++		return -EINVAL;
++	}
++
++	__assign_bit(bit, &mcu->rising, type & IRQ_TYPE_EDGE_RISING);
++	__assign_bit(bit, &mcu->falling, type & IRQ_TYPE_EDGE_FALLING);
++
++	return 0;
++}
++
++static void omnia_irq_bus_lock(struct irq_data *d)
++{
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++
++	/* nothing to do if MCU firmware does not support new interrupt API */
++	if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))
++		return;
++
++	mutex_lock(&mcu->lock);
++}
++
++/**
++ * omnia_mask_interleave - Interleaves the bytes from @rising and @falling
++ * @dst: the destination u8 array of interleaved bytes
++ * @rising: rising mask
++ * @falling: falling mask
++ *
++ * Interleaves the little-endian bytes from @rising and @falling words.
++ *
++ * If @rising = (r0, r1, r2, r3) and @falling = (f0, f1, f2, f3), the result is
++ * @dst = (r0, f0, r1, f1, r2, f2, r3, f3).
++ *
++ * The MCU receives an interrupt mask and reports a pending interrupt bitmap in
++ * this interleaved format. The rationale behind this is that the low-indexed
++ * bits are more important - in many cases, the user will be interested only in
++ * interrupts with indexes 0 to 7, and so the system can stop reading after
++ * first 2 bytes (r0, f0), to save time on the slow I2C bus.
++ *
++ * Feel free to remove this function and its inverse, omnia_mask_deinterleave,
++ * and use an appropriate bitmap_*() function once such a function exists.
++ */
++static void
++omnia_mask_interleave(u8 *dst, unsigned long rising, unsigned long falling)
++{
++	for (unsigned int i = 0; i < sizeof(u32); i++) {
++		dst[2 * i] = rising >> (8 * i);
++		dst[2 * i + 1] = falling >> (8 * i);
++	}
++}
++
++/**
++ * omnia_mask_deinterleave - Deinterleaves the bytes into @rising and @falling
++ * @src: the source u8 array containing the interleaved bytes
++ * @rising: pointer where to store the rising mask gathered from @src
++ * @falling: pointer where to store the falling mask gathered from @src
++ *
++ * This is the inverse function to omnia_mask_interleave.
++ */
++static void omnia_mask_deinterleave(const u8 *src, unsigned long *rising,
++				    unsigned long *falling)
++{
++	*rising = *falling = 0;
++
++	for (unsigned int i = 0; i < sizeof(u32); i++) {
++		*rising |= src[2 * i] << (8 * i);
++		*falling |= src[2 * i + 1] << (8 * i);
++	}
++}
++
++static void omnia_irq_bus_sync_unlock(struct irq_data *d)
++{
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	struct device *dev = &mcu->client->dev;
++	u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN];
++	unsigned long rising, falling;
++	int err;
++
++	/* nothing to do if MCU firmware does not support new interrupt API */
++	if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))
++		return;
++
++	cmd[0] = OMNIA_CMD_SET_INT_MASK;
++
++	rising = mcu->rising & mcu->mask;
++	falling = mcu->falling & mcu->mask;
++
++	/* interleave the rising and falling bytes into the command arguments */
++	omnia_mask_interleave(&cmd[1], rising, falling);
++
++	dev_dbg(dev, "set int mask %8ph\n", &cmd[1]);
++
++	err = omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
++	if (err) {
++		dev_err(dev, "Cannot set mask: %d\n", err);
++		goto unlock;
++	}
++
++	/*
++	 * Remember which GPIOs have both rising and falling interrupts enabled.
++	 * For those we will cache their value so that .get() method is faster.
++	 * We also need to forget cached values of GPIOs that aren't cached
++	 * anymore.
++	 */
++	mcu->both = rising & falling;
++	mcu->is_cached &= mcu->both;
++
++unlock:
++	mutex_unlock(&mcu->lock);
++}
++
++static const struct irq_chip omnia_mcu_irq_chip = {
++	.name			= "Turris Omnia MCU interrupts",
++	.irq_shutdown		= omnia_irq_shutdown,
++	.irq_mask		= omnia_irq_mask,
++	.irq_unmask		= omnia_irq_unmask,
++	.irq_set_type		= omnia_irq_set_type,
++	.irq_bus_lock		= omnia_irq_bus_lock,
++	.irq_bus_sync_unlock	= omnia_irq_bus_sync_unlock,
++	.flags			= IRQCHIP_IMMUTABLE,
++	GPIOCHIP_IRQ_RESOURCE_HELPERS,
++};
++
++static void omnia_irq_init_valid_mask(struct gpio_chip *gc,
++				      unsigned long *valid_mask,
++				      unsigned int ngpios)
++{
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++
++	for (unsigned int i = 0; i < ngpios; i++) {
++		const struct omnia_gpio *gpio = &omnia_gpios[i];
++
++		if (is_int_bit_valid(gpio))
++			__assign_bit(i, valid_mask,
++				     omnia_gpio_available(mcu, gpio));
++		else
++			__clear_bit(i, valid_mask);
++	}
++}
++
++static int omnia_irq_init_hw(struct gpio_chip *gc)
++{
++	struct omnia_mcu *mcu = gpiochip_get_data(gc);
++	u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN] = {};
++
++	cmd[0] = OMNIA_CMD_SET_INT_MASK;
++
++	return omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
++}
++
++/*
++ * Determine how many bytes we need to read from the reply to the
++ * OMNIA_CMD_GET_INT_AND_CLEAR command in order to retrieve all unmasked
++ * interrupts.
++ */
++static unsigned int
++omnia_irq_compute_pending_length(unsigned long rising, unsigned long falling)
++{
++	return max(omnia_compute_reply_length(rising, true, 0),
++		   omnia_compute_reply_length(falling, true, 1));
++}
++
++static bool omnia_irq_read_pending_new(struct omnia_mcu *mcu,
++				       unsigned long *pending)
++{
++	struct device *dev = &mcu->client->dev;
++	u8 reply[OMNIA_CMD_INT_ARG_LEN] = {};
++	unsigned long rising, falling;
++	unsigned int len;
++	int err;
++
++	len = omnia_irq_compute_pending_length(mcu->rising & mcu->mask,
++					       mcu->falling & mcu->mask);
++	if (!len)
++		return false;
++
++	guard(mutex)(&mcu->lock);
++
++	err = omnia_cmd_read(mcu->client, OMNIA_CMD_GET_INT_AND_CLEAR, reply,
++			     len);
++	if (err) {
++		dev_err(dev, "Cannot read pending IRQs: %d\n", err);
++		return false;
++	}
++
++	/* deinterleave the reply bytes into rising and falling */
++	omnia_mask_deinterleave(reply, &rising, &falling);
++
++	rising &= mcu->mask;
++	falling &= mcu->mask;
++	*pending = rising | falling;
++
++	/* cache values for GPIOs that have both edges enabled */
++	mcu->is_cached &= ~(rising & falling);
++	mcu->is_cached |= mcu->both & (rising ^ falling);
++	mcu->cached = (mcu->cached | rising) & ~falling;
++
++	return true;
++}
++
++static int omnia_read_status_word_old_fw(struct omnia_mcu *mcu,
++					 unsigned long *status)
++{
++	u16 raw_status;
++	int err;
++
++	err = omnia_cmd_read_u16(mcu->client, OMNIA_CMD_GET_STATUS_WORD,
++				 &raw_status);
++	if (err)
++		return err;
++
++	/*
++	 * Old firmware has a bug wherein it never resets the USB port
++	 * overcurrent bits back to zero. Ignore them.
++	 */
++	*status = raw_status & ~(OMNIA_STS_USB30_OVC | OMNIA_STS_USB31_OVC);
++
++	return 0;
++}
++
++static void button_release_emul_fn(struct work_struct *work)
++{
++	struct omnia_mcu *mcu = container_of(to_delayed_work(work),
++					     struct omnia_mcu,
++					     button_release_emul_work);
++
++	mcu->button_pressed_emul = false;
++	generic_handle_irq_safe(mcu->client->irq);
++}
++
++static void
++fill_int_from_sts(unsigned long *rising, unsigned long *falling,
++		  unsigned long rising_sts, unsigned long falling_sts,
++		  unsigned long sts_bit, unsigned long int_bit)
++{
++	if (rising_sts & sts_bit)
++		*rising |= int_bit;
++	if (falling_sts & sts_bit)
++		*falling |= int_bit;
++}
++
++static bool omnia_irq_read_pending_old(struct omnia_mcu *mcu,
++				       unsigned long *pending)
++{
++	unsigned long status, rising_sts, falling_sts, rising, falling;
++	struct device *dev = &mcu->client->dev;
++	int err;
++
++	guard(mutex)(&mcu->lock);
++
++	err = omnia_read_status_word_old_fw(mcu, &status);
++	if (err) {
++		dev_err(dev, "Cannot read pending IRQs: %d\n", err);
++		return false;
++	}
++
++	/*
++	 * The old firmware triggers an interrupt whenever status word changes,
++	 * but does not inform about which bits rose or fell. We need to compute
++	 * this here by comparing with the last status word value.
++	 *
++	 * The OMNIA_STS_BUTTON_PRESSED bit needs special handling, because the
++	 * old firmware clears the OMNIA_STS_BUTTON_PRESSED bit on successful
++	 * completion of the OMNIA_CMD_GET_STATUS_WORD command, resulting in
++	 * another interrupt:
++	 * - first we get an interrupt, we read the status word where
++	 *   OMNIA_STS_BUTTON_PRESSED is present,
++	 * - MCU clears the OMNIA_STS_BUTTON_PRESSED bit because we read the
++	 *   status word,
++	 * - we get another interrupt because the status word changed again
++	 *   (the OMNIA_STS_BUTTON_PRESSED bit was cleared).
++	 *
++	 * The gpiolib-cdev, gpiolib-sysfs and gpio-keys input driver all call
++	 * the gpiochip's .get() method after an edge event on a requested GPIO
++	 * occurs.
++	 *
++	 * We ensure that the .get() method reads 1 for the button GPIO for some
++	 * time.
++	 */
++
++	if (status & OMNIA_STS_BUTTON_PRESSED) {
++		mcu->button_pressed_emul = true;
++		mod_delayed_work(system_wq, &mcu->button_release_emul_work,
++				 msecs_to_jiffies(FRONT_BUTTON_RELEASE_DELAY_MS));
++	} else if (mcu->button_pressed_emul) {
++		status |= OMNIA_STS_BUTTON_PRESSED;
++	}
++
++	rising_sts = ~mcu->last_status & status;
++	falling_sts = mcu->last_status & ~status;
++
++	mcu->last_status = status;
++
++	/*
++	 * Fill in the relevant interrupt bits from status bits for CARD_DET,
++	 * MSATA_IND and BUTTON_PRESSED.
++	 */
++	rising = 0;
++	falling = 0;
++	fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
++			  OMNIA_STS_CARD_DET, OMNIA_INT_CARD_DET);
++	fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
++			  OMNIA_STS_MSATA_IND, OMNIA_INT_MSATA_IND);
++	fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
++			  OMNIA_STS_BUTTON_PRESSED, OMNIA_INT_BUTTON_PRESSED);
++
++	/* Use only bits that are enabled */
++	rising &= mcu->rising & mcu->mask;
++	falling &= mcu->falling & mcu->mask;
++	*pending = rising | falling;
++
++	return true;
++}
++
++static bool omnia_irq_read_pending(struct omnia_mcu *mcu,
++				   unsigned long *pending)
++{
++	if (mcu->features & OMNIA_FEAT_NEW_INT_API)
++		return omnia_irq_read_pending_new(mcu, pending);
++	else
++		return omnia_irq_read_pending_old(mcu, pending);
++}
++
++static irqreturn_t omnia_irq_thread_handler(int irq, void *dev_id)
++{
++	struct omnia_mcu *mcu = dev_id;
++	struct irq_domain *domain;
++	unsigned long pending;
++	unsigned int i;
++
++	if (!omnia_irq_read_pending(mcu, &pending))
++		return IRQ_NONE;
++
++	domain = mcu->gc.irq.domain;
++
++	for_each_set_bit(i, &pending, 32) {
++		unsigned int nested_irq;
++
++		nested_irq = irq_find_mapping(domain, omnia_int_to_gpio_idx[i]);
++
++		handle_nested_irq(nested_irq);
++	}
++
++	return IRQ_RETVAL(pending);
++}
++
++static const char * const front_button_modes[] = { "mcu", "cpu" };
++
++static ssize_t front_button_mode_show(struct device *dev,
++				      struct device_attribute *a, char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++	int val;
++
++	if (mcu->features & OMNIA_FEAT_NEW_INT_API) {
++		val = omnia_cmd_read_bit(mcu->client, OMNIA_CMD_GET_STATUS_WORD,
++					 OMNIA_STS_BUTTON_MODE);
++		if (val < 0)
++			return val;
++	} else {
++		val = !!(mcu->last_status & OMNIA_STS_BUTTON_MODE);
++	}
++
++	return sysfs_emit(buf, "%s\n", front_button_modes[val]);
++}
++
++static ssize_t front_button_mode_store(struct device *dev,
++				       struct device_attribute *a,
++				       const char *buf, size_t count)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++	int err, i;
++
++	i = sysfs_match_string(front_button_modes, buf);
++	if (i < 0)
++		return i;
++
++	err = omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,
++				   i ? OMNIA_CTL_BUTTON_MODE : 0,
++				   OMNIA_CTL_BUTTON_MODE);
++	if (err)
++		return err;
++
++	return count;
++}
++static DEVICE_ATTR_RW(front_button_mode);
++
++static struct attribute *omnia_mcu_gpio_attrs[] = {
++	&dev_attr_front_button_mode.attr,
++	NULL
++};
++
++const struct attribute_group omnia_mcu_gpio_group = {
++	.attrs = omnia_mcu_gpio_attrs,
++};
++
++int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu)
++{
++	bool new_api = mcu->features & OMNIA_FEAT_NEW_INT_API;
++	struct device *dev = &mcu->client->dev;
++	unsigned long irqflags;
++	int err;
++
++	err = devm_mutex_init(dev, &mcu->lock);
++	if (err)
++		return err;
++
++	mcu->gc.request = omnia_gpio_request;
++	mcu->gc.get_direction = omnia_gpio_get_direction;
++	mcu->gc.direction_input = omnia_gpio_direction_input;
++	mcu->gc.direction_output = omnia_gpio_direction_output;
++	mcu->gc.get = omnia_gpio_get;
++	mcu->gc.get_multiple = omnia_gpio_get_multiple;
++	mcu->gc.set = omnia_gpio_set;
++	mcu->gc.set_multiple = omnia_gpio_set_multiple;
++	mcu->gc.init_valid_mask = omnia_gpio_init_valid_mask;
++	mcu->gc.can_sleep = true;
++	mcu->gc.names = omnia_mcu_gpio_templates;
++	mcu->gc.base = -1;
++	mcu->gc.ngpio = ARRAY_SIZE(omnia_gpios);
++	mcu->gc.label = "Turris Omnia MCU GPIOs";
++	mcu->gc.parent = dev;
++	mcu->gc.owner = THIS_MODULE;
++	mcu->gc.of_gpio_n_cells = 3;
++	mcu->gc.of_xlate = omnia_gpio_of_xlate;
++
++	gpio_irq_chip_set_chip(&mcu->gc.irq, &omnia_mcu_irq_chip);
++	/* This will let us handle the parent IRQ in the driver */
++	mcu->gc.irq.parent_handler = NULL;
++	mcu->gc.irq.num_parents = 0;
++	mcu->gc.irq.parents = NULL;
++	mcu->gc.irq.default_type = IRQ_TYPE_NONE;
++	mcu->gc.irq.handler = handle_bad_irq;
++	mcu->gc.irq.threaded = true;
++	if (new_api)
++		mcu->gc.irq.init_hw = omnia_irq_init_hw;
++	mcu->gc.irq.init_valid_mask = omnia_irq_init_valid_mask;
++
++	err = devm_gpiochip_add_data(dev, &mcu->gc, mcu);
++	if (err)
++		return dev_err_probe(dev, err, "Cannot add GPIO chip\n");
++
++	/*
++	 * Before requesting the interrupt, if firmware does not support the new
++	 * interrupt API, we need to cache the value of the status word, so that
++	 * when it changes, we may compare the new value with the cached one in
++	 * the interrupt handler.
++	 */
++	if (!new_api) {
++		err = omnia_read_status_word_old_fw(mcu, &mcu->last_status);
++		if (err)
++			return dev_err_probe(dev, err,
++					     "Cannot read status word\n");
++
++		INIT_DELAYED_WORK(&mcu->button_release_emul_work,
++				  button_release_emul_fn);
++	}
++
++	irqflags = IRQF_ONESHOT;
++	if (new_api)
++		irqflags |= IRQF_TRIGGER_LOW;
++	else
++		irqflags |= IRQF_TRIGGER_FALLING;
++
++	err = devm_request_threaded_irq(dev, mcu->client->irq, NULL,
++					omnia_irq_thread_handler, irqflags,
++					"turris-omnia-mcu", mcu);
++	if (err)
++		return dev_err_probe(dev, err, "Cannot request IRQ\n");
++
++	if (!new_api) {
++		/*
++		 * The button_release_emul_work has to be initialized before the
++		 * thread is requested, and on driver remove it needs to be
++		 * canceled before the thread is freed. Therefore we can't use
++		 * devm_delayed_work_autocancel() directly, because the order
++		 *   devm_delayed_work_autocancel();
++		 *   devm_request_threaded_irq();
++		 * would cause improper release order:
++		 *   free_irq();
++		 *   cancel_delayed_work_sync();
++		 * Instead we first initialize the work above, and only now
++		 * after IRQ is requested we add the work devm action.
++		 */
++		err = devm_add_action(dev, devm_delayed_work_drop,
++				      &mcu->button_release_emul_work);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
+--- a/drivers/platform/cznic/turris-omnia-mcu.h
++++ b/drivers/platform/cznic/turris-omnia-mcu.h
+@@ -8,8 +8,12 @@
+ #ifndef __TURRIS_OMNIA_MCU_H
+ #define __TURRIS_OMNIA_MCU_H
+ 
++#include <linux/bitops.h>
++#include <linux/gpio/driver.h>
+ #include <linux/if_ether.h>
++#include <linux/mutex.h>
+ #include <linux/types.h>
++#include <linux/workqueue.h>
+ #include <asm/byteorder.h>
+ 
+ struct i2c_client;
+@@ -23,18 +27,78 @@ struct omnia_mcu {
+ 	u64 board_serial_number;
+ 	u8 board_first_mac[ETH_ALEN];
+ 	u8 board_revision;
++
++	/* GPIO chip */
++	struct gpio_chip gc;
++	struct mutex lock;
++	unsigned long mask, rising, falling, both, cached, is_cached;
++	/* Old MCU firmware handling needs the following */
++	struct delayed_work button_release_emul_work;
++	unsigned long last_status;
++	bool button_pressed_emul;
+ };
+ 
+ int omnia_cmd_write_read(const struct i2c_client *client,
+ 			 void *cmd, unsigned int cmd_len,
+ 			 void *reply, unsigned int reply_len);
+ 
++static inline int omnia_cmd_write(const struct i2c_client *client, void *cmd,
++				  unsigned int len)
++{
++	return omnia_cmd_write_read(client, cmd, len, NULL, 0);
++}
++
+ static inline int omnia_cmd_read(const struct i2c_client *client, u8 cmd,
+ 				 void *reply, unsigned int len)
+ {
+ 	return omnia_cmd_write_read(client, &cmd, 1, reply, len);
+ }
+ 
++static inline unsigned int
++omnia_compute_reply_length(unsigned long mask, bool interleaved,
++			   unsigned int offset)
++{
++	if (!mask)
++		return 0;
++
++	return ((__fls(mask) >> 3) << interleaved) + 1 + offset;
++}
++
++/* Returns 0 on success */
++static inline int omnia_cmd_read_bits(const struct i2c_client *client, u8 cmd,
++				      unsigned long bits, unsigned long *dst)
++{
++	__le32 reply;
++	int err;
++
++	if (!bits) {
++		*dst = 0;
++		return 0;
++	}
++
++	err = omnia_cmd_read(client, cmd, &reply,
++			     omnia_compute_reply_length(bits, false, 0));
++	if (err)
++		return err;
++
++	*dst = le32_to_cpu(reply) & bits;
++
++	return 0;
++}
++
++static inline int omnia_cmd_read_bit(const struct i2c_client *client, u8 cmd,
++				     unsigned long bit)
++{
++	unsigned long reply;
++	int err;
++
++	err = omnia_cmd_read_bits(client, cmd, bit, &reply);
++	if (err)
++		return err;
++
++	return !!reply;
++}
++
+ static inline int omnia_cmd_read_u32(const struct i2c_client *client, u8 cmd,
+ 				     u32 *dst)
+ {
+@@ -71,4 +135,8 @@ static inline int omnia_cmd_read_u8(cons
+ 	return omnia_cmd_read(client, cmd, reply, sizeof(*reply));
+ }
+ 
++extern const struct attribute_group omnia_mcu_gpio_group;
++
++int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu);
++
+ #endif /* __TURRIS_OMNIA_MCU_H */
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-04-platform-cznic-turris-omnia-mcu-Add-support-for-powe.patch b/target/linux/mvebu/patches-6.6/820-v6.11-04-platform-cznic-turris-omnia-mcu-Add-support-for-powe.patch
new file mode 100644
index 0000000000..2ef6242d70
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-04-platform-cznic-turris-omnia-mcu-Add-support-for-powe.patch
@@ -0,0 +1,415 @@
+From f69e0a731ab471f3a57c48258ad2d9990820c173 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:06 +0200
+Subject: [PATCH 04/11] platform: cznic: turris-omnia-mcu: Add support for
+ poweroff and wakeup
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add support for true board poweroff (MCU can disable all unnecessary
+voltage regulators) and wakeup at a specified time, implemented via a
+RTC driver so that the rtcwake utility can be used to configure it.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20240701113010.16447-5-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ .../sysfs-bus-i2c-devices-turris-omnia-mcu    |  16 ++
+ drivers/platform/cznic/Kconfig                |   4 +
+ drivers/platform/cznic/Makefile               |   1 +
+ .../platform/cznic/turris-omnia-mcu-base.c    |   5 +
+ .../cznic/turris-omnia-mcu-sys-off-wakeup.c   | 260 ++++++++++++++++++
+ drivers/platform/cznic/turris-omnia-mcu.h     |  20 ++
+ 6 files changed, 306 insertions(+)
+ create mode 100644 drivers/platform/cznic/turris-omnia-mcu-sys-off-wakeup.c
+
+--- a/Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
++++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu
+@@ -38,6 +38,22 @@ Description:	(RW) The front button on th
+ 
+ 		Format: %s.
+ 
++What:		/sys/bus/i2c/devices/<mcu_device>/front_button_poweron
++Date:		September 2024
++KernelVersion:	6.11
++Contact:	Marek Behún <kabel@kernel.org>
++Description:	(RW) Newer versions of the microcontroller firmware of the
++		Turris Omnia router support powering off the router into true
++		low power mode. The router can be powered on by pressing the
++		front button.
++
++		This file configures whether front button power on is enabled.
++
++		This file is present only if the power off feature is supported
++		by the firmware.
++
++		Format: %i.
++
+ What:		/sys/bus/i2c/devices/<mcu_device>/fw_features
+ Date:		September 2024
+ KernelVersion:	6.11
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -18,10 +18,14 @@ config TURRIS_OMNIA_MCU
+ 	depends on I2C
+ 	select GPIOLIB
+ 	select GPIOLIB_IRQCHIP
++	select RTC_CLASS
+ 	help
+ 	  Say Y here to add support for the features implemented by the
+ 	  microcontroller on the CZ.NIC's Turris Omnia SOHO router.
+ 	  The features include:
++	  - board poweroff into true low power mode (with voltage regulators
++	    disabled) and the ability to configure wake up from this mode (via
++	    rtcwake)
+ 	  - GPIO pins
+ 	    - to get front button press events (the front button can be
+ 	      configured either to generate press events to the CPU or to change
+--- a/drivers/platform/cznic/Makefile
++++ b/drivers/platform/cznic/Makefile
+@@ -3,3 +3,4 @@
+ obj-$(CONFIG_TURRIS_OMNIA_MCU)	+= turris-omnia-mcu.o
+ turris-omnia-mcu-y		:= turris-omnia-mcu-base.o
+ turris-omnia-mcu-y		+= turris-omnia-mcu-gpio.o
++turris-omnia-mcu-y		+= turris-omnia-mcu-sys-off-wakeup.o
+--- a/drivers/platform/cznic/turris-omnia-mcu-base.c
++++ b/drivers/platform/cznic/turris-omnia-mcu-base.c
+@@ -197,6 +197,7 @@ static const struct attribute_group omni
+ static const struct attribute_group *omnia_mcu_groups[] = {
+ 	&omnia_mcu_base_group,
+ 	&omnia_mcu_gpio_group,
++	&omnia_mcu_poweroff_group,
+ 	NULL
+ };
+ 
+@@ -371,6 +372,10 @@ static int omnia_mcu_probe(struct i2c_cl
+ 					     "Cannot read board info\n");
+ 	}
+ 
++	err = omnia_mcu_register_sys_off_and_wakeup(mcu);
++	if (err)
++		return err;
++
+ 	return omnia_mcu_register_gpiochip(mcu);
+ }
+ 
+--- /dev/null
++++ b/drivers/platform/cznic/turris-omnia-mcu-sys-off-wakeup.c
+@@ -0,0 +1,260 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * CZ.NIC's Turris Omnia MCU system off and RTC wakeup driver
++ *
++ * This is not a true RTC driver (in the sense that it does not provide a
++ * real-time clock), rather the MCU implements a wakeup from powered off state
++ * at a specified time relative to MCU boot, and we expose this feature via RTC
++ * alarm, so that it can be used via the rtcwake command, which is the standard
++ * Linux command for this.
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#include <linux/crc32.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/err.h>
++#include <linux/i2c.h>
++#include <linux/kstrtox.h>
++#include <linux/reboot.h>
++#include <linux/rtc.h>
++#include <linux/sysfs.h>
++#include <linux/types.h>
++
++#include <linux/turris-omnia-mcu-interface.h>
++#include "turris-omnia-mcu.h"
++
++static int omnia_get_uptime_wakeup(const struct i2c_client *client, u32 *uptime,
++				   u32 *wakeup)
++{
++	__le32 reply[2];
++	int err;
++
++	err = omnia_cmd_read(client, OMNIA_CMD_GET_UPTIME_AND_WAKEUP, reply,
++			     sizeof(reply));
++	if (err)
++		return err;
++
++	if (uptime)
++		*uptime = le32_to_cpu(reply[0]);
++
++	if (wakeup)
++		*wakeup = le32_to_cpu(reply[1]);
++
++	return 0;
++}
++
++static int omnia_read_time(struct device *dev, struct rtc_time *tm)
++{
++	u32 uptime;
++	int err;
++
++	err = omnia_get_uptime_wakeup(to_i2c_client(dev), &uptime, NULL);
++	if (err)
++		return err;
++
++	rtc_time64_to_tm(uptime, tm);
++
++	return 0;
++}
++
++static int omnia_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++	struct omnia_mcu *mcu = i2c_get_clientdata(client);
++	u32 wakeup;
++	int err;
++
++	err = omnia_get_uptime_wakeup(client, NULL, &wakeup);
++	if (err)
++		return err;
++
++	alrm->enabled = !!wakeup;
++	rtc_time64_to_tm(wakeup ?: mcu->rtc_alarm, &alrm->time);
++
++	return 0;
++}
++
++static int omnia_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++	struct omnia_mcu *mcu = i2c_get_clientdata(client);
++
++	mcu->rtc_alarm = rtc_tm_to_time64(&alrm->time);
++
++	if (alrm->enabled)
++		return omnia_cmd_write_u32(client, OMNIA_CMD_SET_WAKEUP,
++					   mcu->rtc_alarm);
++
++	return 0;
++}
++
++static int omnia_alarm_irq_enable(struct device *dev, unsigned int enabled)
++{
++	struct i2c_client *client = to_i2c_client(dev);
++	struct omnia_mcu *mcu = i2c_get_clientdata(client);
++
++	return omnia_cmd_write_u32(client, OMNIA_CMD_SET_WAKEUP,
++				   enabled ? mcu->rtc_alarm : 0);
++}
++
++static const struct rtc_class_ops omnia_rtc_ops = {
++	.read_time		= omnia_read_time,
++	.read_alarm		= omnia_read_alarm,
++	.set_alarm		= omnia_set_alarm,
++	.alarm_irq_enable	= omnia_alarm_irq_enable,
++};
++
++static int omnia_power_off(struct sys_off_data *data)
++{
++	struct omnia_mcu *mcu = data->cb_data;
++	__be32 tmp;
++	u8 cmd[9];
++	u16 arg;
++	int err;
++
++	if (mcu->front_button_poweron)
++		arg = OMNIA_CMD_POWER_OFF_POWERON_BUTTON;
++	else
++		arg = 0;
++
++	cmd[0] = OMNIA_CMD_POWER_OFF;
++	put_unaligned_le16(OMNIA_CMD_POWER_OFF_MAGIC, &cmd[1]);
++	put_unaligned_le16(arg, &cmd[3]);
++
++	/*
++	 * Although all values from and to MCU are passed in little-endian, the
++	 * MCU's CRC unit uses big-endian CRC32 polynomial (0x04c11db7), so we
++	 * need to use crc32_be() here.
++	 */
++	tmp = cpu_to_be32(get_unaligned_le32(&cmd[1]));
++	put_unaligned_le32(crc32_be(~0, (void *)&tmp, sizeof(tmp)), &cmd[5]);
++
++	err = omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
++	if (err)
++		dev_err(&mcu->client->dev,
++			"Unable to send the poweroff command: %d\n", err);
++
++	return NOTIFY_DONE;
++}
++
++static int omnia_restart(struct sys_off_data *data)
++{
++	struct omnia_mcu *mcu = data->cb_data;
++	u8 cmd[3];
++	int err;
++
++	cmd[0] = OMNIA_CMD_GENERAL_CONTROL;
++
++	if (reboot_mode == REBOOT_HARD)
++		cmd[1] = cmd[2] = OMNIA_CTL_HARD_RST;
++	else
++		cmd[1] = cmd[2] = OMNIA_CTL_LIGHT_RST;
++
++	err = omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
++	if (err)
++		dev_err(&mcu->client->dev,
++			"Unable to send the restart command: %d\n", err);
++
++	/*
++	 * MCU needs a little bit to process the I2C command, otherwise it will
++	 * do a light reset based on SOC SYSRES_OUT pin.
++	 */
++	mdelay(1);
++
++	return NOTIFY_DONE;
++}
++
++static ssize_t front_button_poweron_show(struct device *dev,
++					 struct device_attribute *a, char *buf)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	return sysfs_emit(buf, "%d\n", mcu->front_button_poweron);
++}
++
++static ssize_t front_button_poweron_store(struct device *dev,
++					  struct device_attribute *a,
++					  const char *buf, size_t count)
++{
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++	bool val;
++	int err;
++
++	err = kstrtobool(buf, &val);
++	if (err)
++		return err;
++
++	mcu->front_button_poweron = val;
++
++	return count;
++}
++static DEVICE_ATTR_RW(front_button_poweron);
++
++static struct attribute *omnia_mcu_poweroff_attrs[] = {
++	&dev_attr_front_button_poweron.attr,
++	NULL
++};
++
++static umode_t poweroff_attrs_visible(struct kobject *kobj, struct attribute *a,
++				      int n)
++{
++	struct device *dev = kobj_to_dev(kobj);
++	struct omnia_mcu *mcu = dev_get_drvdata(dev);
++
++	if (mcu->features & OMNIA_FEAT_POWEROFF_WAKEUP)
++		return a->mode;
++
++	return 0;
++}
++
++const struct attribute_group omnia_mcu_poweroff_group = {
++	.attrs = omnia_mcu_poweroff_attrs,
++	.is_visible = poweroff_attrs_visible,
++};
++
++int omnia_mcu_register_sys_off_and_wakeup(struct omnia_mcu *mcu)
++{
++	struct device *dev = &mcu->client->dev;
++	int err;
++
++	/* MCU restart is always available */
++	err = devm_register_sys_off_handler(dev, SYS_OFF_MODE_RESTART,
++					    SYS_OFF_PRIO_FIRMWARE,
++					    omnia_restart, mcu);
++	if (err)
++		return dev_err_probe(dev, err,
++				     "Cannot register system restart handler\n");
++
++	/*
++	 * Poweroff and wakeup are available only if POWEROFF_WAKEUP feature is
++	 * present.
++	 */
++	if (!(mcu->features & OMNIA_FEAT_POWEROFF_WAKEUP))
++		return 0;
++
++	err = devm_register_sys_off_handler(dev, SYS_OFF_MODE_POWER_OFF,
++					    SYS_OFF_PRIO_FIRMWARE,
++					    omnia_power_off, mcu);
++	if (err)
++		return dev_err_probe(dev, err,
++				     "Cannot register system power off handler\n");
++
++	mcu->rtcdev = devm_rtc_allocate_device(dev);
++	if (IS_ERR(mcu->rtcdev))
++		return dev_err_probe(dev, PTR_ERR(mcu->rtcdev),
++				     "Cannot allocate RTC device\n");
++
++	mcu->rtcdev->ops = &omnia_rtc_ops;
++	mcu->rtcdev->range_max = U32_MAX;
++	set_bit(RTC_FEATURE_ALARM_WAKEUP_ONLY, mcu->rtcdev->features);
++
++	err = devm_rtc_register_device(mcu->rtcdev);
++	if (err)
++		return dev_err_probe(dev, err, "Cannot register RTC device\n");
++
++	mcu->front_button_poweron = true;
++
++	return 0;
++}
+--- a/drivers/platform/cznic/turris-omnia-mcu.h
++++ b/drivers/platform/cznic/turris-omnia-mcu.h
+@@ -15,8 +15,10 @@
+ #include <linux/types.h>
+ #include <linux/workqueue.h>
+ #include <asm/byteorder.h>
++#include <asm/unaligned.h>
+ 
+ struct i2c_client;
++struct rtc_device;
+ 
+ struct omnia_mcu {
+ 	struct i2c_client *client;
+@@ -36,6 +38,11 @@ struct omnia_mcu {
+ 	struct delayed_work button_release_emul_work;
+ 	unsigned long last_status;
+ 	bool button_pressed_emul;
++
++	/* RTC device for configuring wake-up */
++	struct rtc_device *rtcdev;
++	u32 rtc_alarm;
++	bool front_button_poweron;
+ };
+ 
+ int omnia_cmd_write_read(const struct i2c_client *client,
+@@ -48,6 +55,17 @@ static inline int omnia_cmd_write(const
+ 	return omnia_cmd_write_read(client, cmd, len, NULL, 0);
+ }
+ 
++static inline int omnia_cmd_write_u32(const struct i2c_client *client, u8 cmd,
++				      u32 val)
++{
++	u8 buf[5];
++
++	buf[0] = cmd;
++	put_unaligned_le32(val, &buf[1]);
++
++	return omnia_cmd_write(client, buf, sizeof(buf));
++}
++
+ static inline int omnia_cmd_read(const struct i2c_client *client, u8 cmd,
+ 				 void *reply, unsigned int len)
+ {
+@@ -136,7 +154,9 @@ static inline int omnia_cmd_read_u8(cons
+ }
+ 
+ extern const struct attribute_group omnia_mcu_gpio_group;
++extern const struct attribute_group omnia_mcu_poweroff_group;
+ 
+ int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu);
++int omnia_mcu_register_sys_off_and_wakeup(struct omnia_mcu *mcu);
+ 
+ #endif /* __TURRIS_OMNIA_MCU_H */
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-05-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch b/target/linux/mvebu/patches-6.6/820-v6.11-05-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch
new file mode 100644
index 0000000000..cf3f88bfcf
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-05-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch
@@ -0,0 +1,250 @@
+From 33ae4e4c86bc6ff298489fb8b743e2743dd0af6d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:07 +0200
+Subject: [PATCH 05/11] platform: cznic: turris-omnia-mcu: Add support for MCU
+ watchdog
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add support for the watchdog mechanism provided by the MCU.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20240701113010.16447-6-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ drivers/platform/cznic/Kconfig                |   2 +
+ drivers/platform/cznic/Makefile               |   1 +
+ .../platform/cznic/turris-omnia-mcu-base.c    |   4 +
+ .../cznic/turris-omnia-mcu-watchdog.c         | 130 ++++++++++++++++++
+ drivers/platform/cznic/turris-omnia-mcu.h     |  24 ++++
+ 5 files changed, 161 insertions(+)
+ create mode 100644 drivers/platform/cznic/turris-omnia-mcu-watchdog.c
+
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -19,6 +19,7 @@ config TURRIS_OMNIA_MCU
+ 	select GPIOLIB
+ 	select GPIOLIB_IRQCHIP
+ 	select RTC_CLASS
++	select WATCHDOG_CORE
+ 	help
+ 	  Say Y here to add support for the features implemented by the
+ 	  microcontroller on the CZ.NIC's Turris Omnia SOHO router.
+@@ -26,6 +27,7 @@ config TURRIS_OMNIA_MCU
+ 	  - board poweroff into true low power mode (with voltage regulators
+ 	    disabled) and the ability to configure wake up from this mode (via
+ 	    rtcwake)
++	  - MCU watchdog
+ 	  - GPIO pins
+ 	    - to get front button press events (the front button can be
+ 	      configured either to generate press events to the CPU or to change
+--- a/drivers/platform/cznic/Makefile
++++ b/drivers/platform/cznic/Makefile
+@@ -4,3 +4,4 @@ obj-$(CONFIG_TURRIS_OMNIA_MCU)	+= turris
+ turris-omnia-mcu-y		:= turris-omnia-mcu-base.o
+ turris-omnia-mcu-y		+= turris-omnia-mcu-gpio.o
+ turris-omnia-mcu-y		+= turris-omnia-mcu-sys-off-wakeup.o
++turris-omnia-mcu-y		+= turris-omnia-mcu-watchdog.o
+--- a/drivers/platform/cznic/turris-omnia-mcu-base.c
++++ b/drivers/platform/cznic/turris-omnia-mcu-base.c
+@@ -376,6 +376,10 @@ static int omnia_mcu_probe(struct i2c_cl
+ 	if (err)
+ 		return err;
+ 
++	err = omnia_mcu_register_watchdog(mcu);
++	if (err)
++		return err;
++
+ 	return omnia_mcu_register_gpiochip(mcu);
+ }
+ 
+--- /dev/null
++++ b/drivers/platform/cznic/turris-omnia-mcu-watchdog.c
+@@ -0,0 +1,130 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * CZ.NIC's Turris Omnia MCU watchdog driver
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#include <linux/bitops.h>
++#include <linux/device.h>
++#include <linux/i2c.h>
++#include <linux/moduleparam.h>
++#include <linux/types.h>
++#include <linux/units.h>
++#include <linux/watchdog.h>
++
++#include <linux/turris-omnia-mcu-interface.h>
++#include "turris-omnia-mcu.h"
++
++#define WATCHDOG_TIMEOUT		120
++
++static unsigned int timeout;
++module_param(timeout, int, 0);
++MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
++
++static bool nowayout = WATCHDOG_NOWAYOUT;
++module_param(nowayout, bool, 0);
++MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
++			   __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
++
++static int omnia_wdt_start(struct watchdog_device *wdt)
++{
++	struct omnia_mcu *mcu = watchdog_get_drvdata(wdt);
++
++	return omnia_cmd_write_u8(mcu->client, OMNIA_CMD_SET_WATCHDOG_STATE, 1);
++}
++
++static int omnia_wdt_stop(struct watchdog_device *wdt)
++{
++	struct omnia_mcu *mcu = watchdog_get_drvdata(wdt);
++
++	return omnia_cmd_write_u8(mcu->client, OMNIA_CMD_SET_WATCHDOG_STATE, 0);
++}
++
++static int omnia_wdt_ping(struct watchdog_device *wdt)
++{
++	struct omnia_mcu *mcu = watchdog_get_drvdata(wdt);
++
++	return omnia_cmd_write_u8(mcu->client, OMNIA_CMD_SET_WATCHDOG_STATE, 1);
++}
++
++static int omnia_wdt_set_timeout(struct watchdog_device *wdt,
++				 unsigned int timeout)
++{
++	struct omnia_mcu *mcu = watchdog_get_drvdata(wdt);
++
++	return omnia_cmd_write_u16(mcu->client, OMNIA_CMD_SET_WDT_TIMEOUT,
++				   timeout * DECI);
++}
++
++static unsigned int omnia_wdt_get_timeleft(struct watchdog_device *wdt)
++{
++	struct omnia_mcu *mcu = watchdog_get_drvdata(wdt);
++	u16 timeleft;
++	int err;
++
++	err = omnia_cmd_read_u16(mcu->client, OMNIA_CMD_GET_WDT_TIMELEFT,
++				 &timeleft);
++	if (err) {
++		dev_err(&mcu->client->dev, "Cannot get watchdog timeleft: %d\n",
++			err);
++		return 0;
++	}
++
++	return timeleft / DECI;
++}
++
++static const struct watchdog_info omnia_wdt_info = {
++	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
++	.identity = "Turris Omnia MCU Watchdog",
++};
++
++static const struct watchdog_ops omnia_wdt_ops = {
++	.owner		= THIS_MODULE,
++	.start		= omnia_wdt_start,
++	.stop		= omnia_wdt_stop,
++	.ping		= omnia_wdt_ping,
++	.set_timeout	= omnia_wdt_set_timeout,
++	.get_timeleft	= omnia_wdt_get_timeleft,
++};
++
++int omnia_mcu_register_watchdog(struct omnia_mcu *mcu)
++{
++	struct device *dev = &mcu->client->dev;
++	u8 state;
++	int err;
++
++	if (!(mcu->features & OMNIA_FEAT_WDT_PING))
++		return 0;
++
++	mcu->wdt.info = &omnia_wdt_info;
++	mcu->wdt.ops = &omnia_wdt_ops;
++	mcu->wdt.parent = dev;
++	mcu->wdt.min_timeout = 1;
++	mcu->wdt.max_timeout = 65535 / DECI;
++
++	mcu->wdt.timeout = WATCHDOG_TIMEOUT;
++	watchdog_init_timeout(&mcu->wdt, timeout, dev);
++
++	watchdog_set_drvdata(&mcu->wdt, mcu);
++
++	omnia_wdt_set_timeout(&mcu->wdt, mcu->wdt.timeout);
++
++	err = omnia_cmd_read_u8(mcu->client, OMNIA_CMD_GET_WATCHDOG_STATE,
++				&state);
++	if (err)
++		return dev_err_probe(dev, err,
++				     "Cannot get MCU watchdog state\n");
++
++	if (state)
++		set_bit(WDOG_HW_RUNNING, &mcu->wdt.status);
++
++	watchdog_set_nowayout(&mcu->wdt, nowayout);
++	watchdog_stop_on_reboot(&mcu->wdt);
++	err = devm_watchdog_register_device(dev, &mcu->wdt);
++	if (err)
++		return dev_err_probe(dev, err,
++				     "Cannot register MCU watchdog\n");
++
++	return 0;
++}
+--- a/drivers/platform/cznic/turris-omnia-mcu.h
++++ b/drivers/platform/cznic/turris-omnia-mcu.h
+@@ -13,6 +13,7 @@
+ #include <linux/if_ether.h>
+ #include <linux/mutex.h>
+ #include <linux/types.h>
++#include <linux/watchdog.h>
+ #include <linux/workqueue.h>
+ #include <asm/byteorder.h>
+ #include <asm/unaligned.h>
+@@ -43,6 +44,9 @@ struct omnia_mcu {
+ 	struct rtc_device *rtcdev;
+ 	u32 rtc_alarm;
+ 	bool front_button_poweron;
++
++	/* MCU watchdog */
++	struct watchdog_device wdt;
+ };
+ 
+ int omnia_cmd_write_read(const struct i2c_client *client,
+@@ -55,6 +59,25 @@ static inline int omnia_cmd_write(const
+ 	return omnia_cmd_write_read(client, cmd, len, NULL, 0);
+ }
+ 
++static inline int omnia_cmd_write_u8(const struct i2c_client *client, u8 cmd,
++				     u8 val)
++{
++	u8 buf[2] = { cmd, val };
++
++	return omnia_cmd_write(client, buf, sizeof(buf));
++}
++
++static inline int omnia_cmd_write_u16(const struct i2c_client *client, u8 cmd,
++				      u16 val)
++{
++	u8 buf[3];
++
++	buf[0] = cmd;
++	put_unaligned_le16(val, &buf[1]);
++
++	return omnia_cmd_write(client, buf, sizeof(buf));
++}
++
+ static inline int omnia_cmd_write_u32(const struct i2c_client *client, u8 cmd,
+ 				      u32 val)
+ {
+@@ -158,5 +181,6 @@ extern const struct attribute_group omni
+ 
+ int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu);
+ int omnia_mcu_register_sys_off_and_wakeup(struct omnia_mcu *mcu);
++int omnia_mcu_register_watchdog(struct omnia_mcu *mcu);
+ 
+ #endif /* __TURRIS_OMNIA_MCU_H */
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-06-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch b/target/linux/mvebu/patches-6.6/820-v6.11-06-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch
new file mode 100644
index 0000000000..35387e34c7
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-06-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch
@@ -0,0 +1,225 @@
+From b3ed8645c45567b598bef0868dca166f8ed166a0 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:08 +0200
+Subject: [PATCH 06/11] platform: cznic: turris-omnia-mcu: Add support for MCU
+ provided TRNG
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add support for true random number generator provided by the MCU.
+New Omnia boards come without the Atmel SHA204-A chip. Instead the
+crypto functionality is provided by new microcontroller, which has
+a TRNG peripheral.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Link: https://lore.kernel.org/r/20240701113010.16447-7-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ drivers/platform/cznic/Kconfig                |   2 +
+ drivers/platform/cznic/Makefile               |   1 +
+ .../platform/cznic/turris-omnia-mcu-base.c    |   6 +-
+ .../platform/cznic/turris-omnia-mcu-gpio.c    |   2 +-
+ .../platform/cznic/turris-omnia-mcu-trng.c    | 105 ++++++++++++++++++
+ drivers/platform/cznic/turris-omnia-mcu.h     |   8 ++
+ 6 files changed, 122 insertions(+), 2 deletions(-)
+ create mode 100644 drivers/platform/cznic/turris-omnia-mcu-trng.c
+
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -18,6 +18,7 @@ config TURRIS_OMNIA_MCU
+ 	depends on I2C
+ 	select GPIOLIB
+ 	select GPIOLIB_IRQCHIP
++	select HW_RANDOM
+ 	select RTC_CLASS
+ 	select WATCHDOG_CORE
+ 	help
+@@ -27,6 +28,7 @@ config TURRIS_OMNIA_MCU
+ 	  - board poweroff into true low power mode (with voltage regulators
+ 	    disabled) and the ability to configure wake up from this mode (via
+ 	    rtcwake)
++	  - true random number generator (if available on the MCU)
+ 	  - MCU watchdog
+ 	  - GPIO pins
+ 	    - to get front button press events (the front button can be
+--- a/drivers/platform/cznic/Makefile
++++ b/drivers/platform/cznic/Makefile
+@@ -4,4 +4,5 @@ obj-$(CONFIG_TURRIS_OMNIA_MCU)	+= turris
+ turris-omnia-mcu-y		:= turris-omnia-mcu-base.o
+ turris-omnia-mcu-y		+= turris-omnia-mcu-gpio.o
+ turris-omnia-mcu-y		+= turris-omnia-mcu-sys-off-wakeup.o
++turris-omnia-mcu-y		+= turris-omnia-mcu-trng.o
+ turris-omnia-mcu-y		+= turris-omnia-mcu-watchdog.o
+--- a/drivers/platform/cznic/turris-omnia-mcu-base.c
++++ b/drivers/platform/cznic/turris-omnia-mcu-base.c
+@@ -380,7 +380,11 @@ static int omnia_mcu_probe(struct i2c_cl
+ 	if (err)
+ 		return err;
+ 
+-	return omnia_mcu_register_gpiochip(mcu);
++	err = omnia_mcu_register_gpiochip(mcu);
++	if (err)
++		return err;
++
++	return omnia_mcu_register_trng(mcu);
+ }
+ 
+ static const struct of_device_id of_omnia_mcu_match[] = {
+--- a/drivers/platform/cznic/turris-omnia-mcu-gpio.c
++++ b/drivers/platform/cznic/turris-omnia-mcu-gpio.c
+@@ -194,7 +194,7 @@ static const struct omnia_gpio omnia_gpi
+ };
+ 
+ /* mapping from interrupts to indexes of GPIOs in the omnia_gpios array */
+-static const u8 omnia_int_to_gpio_idx[32] = {
++const u8 omnia_int_to_gpio_idx[32] = {
+ 	[__bf_shf(OMNIA_INT_CARD_DET)]			= 4,
+ 	[__bf_shf(OMNIA_INT_MSATA_IND)]			= 5,
+ 	[__bf_shf(OMNIA_INT_USB30_OVC)]			= 6,
+--- /dev/null
++++ b/drivers/platform/cznic/turris-omnia-mcu-trng.c
+@@ -0,0 +1,105 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * CZ.NIC's Turris Omnia MCU TRNG driver
++ *
++ * 2024 by Marek Behún <kabel@kernel.org>
++ */
++
++#include <linux/bitfield.h>
++#include <linux/completion.h>
++#include <linux/container_of.h>
++#include <linux/errno.h>
++#include <linux/gpio/consumer.h>
++#include <linux/gpio/driver.h>
++#include <linux/hw_random.h>
++#include <linux/i2c.h>
++#include <linux/interrupt.h>
++#include <linux/minmax.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include "../../gpio/gpiolib.h"
++
++#include <linux/turris-omnia-mcu-interface.h>
++#include "turris-omnia-mcu.h"
++
++#define OMNIA_CMD_TRNG_MAX_ENTROPY_LEN	64
++
++static irqreturn_t omnia_trng_irq_handler(int irq, void *dev_id)
++{
++	struct omnia_mcu *mcu = dev_id;
++
++	complete(&mcu->trng_entropy_ready);
++
++	return IRQ_HANDLED;
++}
++
++static int omnia_trng_read(struct hwrng *rng, void *data, size_t max, bool wait)
++{
++	struct omnia_mcu *mcu = container_of(rng, struct omnia_mcu, trng);
++	u8 reply[1 + OMNIA_CMD_TRNG_MAX_ENTROPY_LEN];
++	int err, bytes;
++
++	if (!wait && !completion_done(&mcu->trng_entropy_ready))
++		return 0;
++
++	do {
++		if (wait_for_completion_interruptible(&mcu->trng_entropy_ready))
++			return -ERESTARTSYS;
++
++		err = omnia_cmd_read(mcu->client,
++				     OMNIA_CMD_TRNG_COLLECT_ENTROPY,
++				     reply, sizeof(reply));
++		if (err)
++			return err;
++
++		bytes = min3(reply[0], max, OMNIA_CMD_TRNG_MAX_ENTROPY_LEN);
++	} while (wait && !bytes);
++
++	memcpy(data, &reply[1], bytes);
++
++	return bytes;
++}
++
++int omnia_mcu_register_trng(struct omnia_mcu *mcu)
++{
++	struct device *dev = &mcu->client->dev;
++	u8 irq_idx, dummy;
++	int irq, err;
++
++	if (!(mcu->features & OMNIA_FEAT_TRNG))
++		return 0;
++
++	irq_idx = omnia_int_to_gpio_idx[__bf_shf(OMNIA_INT_TRNG)];
++	irq = gpiod_to_irq(gpiochip_get_desc(&mcu->gc, irq_idx));
++	if (!irq)
++		return dev_err_probe(dev, -ENXIO, "Cannot get TRNG IRQ\n");
++
++	/*
++	 * If someone else cleared the TRNG interrupt but did not read the
++	 * entropy, a new interrupt won't be generated, and entropy collection
++	 * will be stuck. Ensure an interrupt will be generated by executing
++	 * the collect entropy command (and discarding the result).
++	 */
++	err = omnia_cmd_read(mcu->client, OMNIA_CMD_TRNG_COLLECT_ENTROPY,
++			     &dummy, 1);
++	if (err)
++		return err;
++
++	init_completion(&mcu->trng_entropy_ready);
++
++	err = devm_request_threaded_irq(dev, irq, NULL, omnia_trng_irq_handler,
++					IRQF_ONESHOT, "turris-omnia-mcu-trng",
++					mcu);
++	if (err)
++		return dev_err_probe(dev, err, "Cannot request TRNG IRQ\n");
++
++	mcu->trng.name = "turris-omnia-mcu-trng";
++	mcu->trng.read = omnia_trng_read;
++
++	err = devm_hwrng_register(dev, &mcu->trng);
++	if (err)
++		return dev_err_probe(dev, err, "Cannot register TRNG\n");
++
++	return 0;
++}
+--- a/drivers/platform/cznic/turris-omnia-mcu.h
++++ b/drivers/platform/cznic/turris-omnia-mcu.h
+@@ -9,7 +9,9 @@
+ #define __TURRIS_OMNIA_MCU_H
+ 
+ #include <linux/bitops.h>
++#include <linux/completion.h>
+ #include <linux/gpio/driver.h>
++#include <linux/hw_random.h>
+ #include <linux/if_ether.h>
+ #include <linux/mutex.h>
+ #include <linux/types.h>
+@@ -47,6 +49,10 @@ struct omnia_mcu {
+ 
+ 	/* MCU watchdog */
+ 	struct watchdog_device wdt;
++
++	/* true random number generator */
++	struct hwrng trng;
++	struct completion trng_entropy_ready;
+ };
+ 
+ int omnia_cmd_write_read(const struct i2c_client *client,
+@@ -176,11 +182,13 @@ static inline int omnia_cmd_read_u8(cons
+ 	return omnia_cmd_read(client, cmd, reply, sizeof(*reply));
+ }
+ 
++extern const u8 omnia_int_to_gpio_idx[32];
+ extern const struct attribute_group omnia_mcu_gpio_group;
+ extern const struct attribute_group omnia_mcu_poweroff_group;
+ 
+ int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu);
+ int omnia_mcu_register_sys_off_and_wakeup(struct omnia_mcu *mcu);
++int omnia_mcu_register_trng(struct omnia_mcu *mcu);
+ int omnia_mcu_register_watchdog(struct omnia_mcu *mcu);
+ 
+ #endif /* __TURRIS_OMNIA_MCU_H */
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-07-ARM-dts-turris-omnia-Add-MCU-system-controller-node.patch b/target/linux/mvebu/patches-6.6/820-v6.11-07-ARM-dts-turris-omnia-Add-MCU-system-controller-node.patch
new file mode 100644
index 0000000000..ad65de2f52
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-07-ARM-dts-turris-omnia-Add-MCU-system-controller-node.patch
@@ -0,0 +1,69 @@
+From 4f11095a4ae00b2fe4cebb21e36ee37cc62f5e1a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:09 +0200
+Subject: [PATCH 07/11] ARM: dts: turris-omnia: Add MCU system-controller node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Turris Omnia's MCU provides various features that can be configured over
+I2C at address 0x2a. Add device-tree node.
+
+This does not carry a Fixes tag - we do not want this to get backported
+to stable kernels for the following reason: U-Boot since v2022.10
+inserts a phy-reset-gpio property into the WAN ethernet node pointing to
+the MCU node if it finds the MCU node with a cznic,turris-omnia-mcu
+compatible. Thus if this change got backported to a stable kernel, the
+WAN interface driver would defer probe indefinitely (since it would wait
+for the turris-omnia-mcu driver which would not be present).
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
+Link: https://lore.kernel.org/r/20240701113010.16447-8-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ .../dts/marvell/armada-385-turris-omnia.dts   | 22 ++++++++++++++++++-
+ 1 file changed, 21 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
++++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
+@@ -218,7 +218,22 @@
+ 			#size-cells = <0>;
+ 			reg = <0>;
+ 
+-			/* STM32F0 command interface at address 0x2a */
++			mcu: system-controller@2a {
++				compatible = "cznic,turris-omnia-mcu";
++				reg = <0x2a>;
++
++				pinctrl-names = "default";
++				pinctrl-0 = <&mcu_pins>;
++
++				interrupt-parent = <&gpio1>;
++				interrupts = <11 IRQ_TYPE_NONE>;
++
++				gpio-controller;
++				#gpio-cells = <3>;
++
++				interrupt-controller;
++				#interrupt-cells = <2>;
++			};
+ 
+ 			led-controller@2b {
+ 				compatible = "cznic,turris-omnia-leds";
+@@ -503,6 +518,11 @@
+ };
+ 
+ &pinctrl {
++	mcu_pins: mcu-pins {
++		marvell,pins = "mpp43";
++		marvell,function = "gpio";
++	};
++
+ 	pcawan_pins: pcawan-pins {
+ 		marvell,pins = "mpp46";
+ 		marvell,function = "gpio";
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-08-ARM-dts-turris-omnia-Add-GPIO-key-node-for-front-but.patch b/target/linux/mvebu/patches-6.6/820-v6.11-08-ARM-dts-turris-omnia-Add-GPIO-key-node-for-front-but.patch
new file mode 100644
index 0000000000..4b36167d66
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-08-ARM-dts-turris-omnia-Add-GPIO-key-node-for-front-but.patch
@@ -0,0 +1,46 @@
+From c3eeabe0b8d22d7c869278cc0cb35b83512fbed5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 1 Jul 2024 13:30:10 +0200
+Subject: [PATCH 08/11] ARM: dts: turris-omnia: Add GPIO key node for front
+ button
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Now that we have the MCU device-tree node, which acts as a GPIO
+controller, add GPIO key node for the front button.
+
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
+Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
+Link: https://lore.kernel.org/r/20240701113010.16447-9-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ .../boot/dts/marvell/armada-385-turris-omnia.dts    | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
++++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
+@@ -112,6 +112,19 @@
+ 		status = "disabled";
+ 	};
+ 
++	gpio-keys {
++		compatible = "gpio-keys";
++
++		front-button {
++			label = "Front Button";
++			linux,code = <KEY_VENDOR>;
++			linux,can-disable;
++			gpios = <&mcu 0 12 GPIO_ACTIVE_HIGH>;
++			/* debouncing is done by the microcontroller */
++			debounce-interval = <0>;
++		};
++	};
++
+ 	sound {
+ 		compatible = "simple-audio-card";
+ 		simple-audio-card,name = "SPDIF";
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-09-platform-cznic-turris-omnia-mcu-Depend-on-OF.patch b/target/linux/mvebu/patches-6.6/820-v6.11-09-platform-cznic-turris-omnia-mcu-Depend-on-OF.patch
new file mode 100644
index 0000000000..80c9e1a3cc
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-09-platform-cznic-turris-omnia-mcu-Depend-on-OF.patch
@@ -0,0 +1,32 @@
+From 08838657bbc35494276c7ba4ef53f30a9816f8c9 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 8 Jul 2024 13:40:01 +0200
+Subject: [PATCH 09/11] platform: cznic: turris-omnia-mcu: Depend on OF
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add depend on OF, otherwise the compilation fails with
+  error: no member named 'of_gpio_n_cells' in 'struct gpio_chip'
+  error: no member named 'of_xlate' in 'struct gpio_chip'
+
+Fixes: dfa556e45ae9 ("platform: cznic: turris-omnia-mcu: Add support for MCU connected GPIOs")
+Reported-by: kernel test robot <lkp@intel.com>
+Closes: https://lore.kernel.org/oe-kbuild-all/202407031646.trNSwajF-lkp@intel.com/
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Link: https://lore.kernel.org/r/20240708114002.4285-2-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ drivers/platform/cznic/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -16,6 +16,7 @@ config TURRIS_OMNIA_MCU
+ 	tristate "Turris Omnia MCU driver"
+ 	depends on MACH_ARMADA_38X || COMPILE_TEST
+ 	depends on I2C
++	depends on OF
+ 	select GPIOLIB
+ 	select GPIOLIB_IRQCHIP
+ 	select HW_RANDOM
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-10-platform-cznic-turris-omnia-mcu-Depend-on-WATCHDOG.patch b/target/linux/mvebu/patches-6.6/820-v6.11-10-platform-cznic-turris-omnia-mcu-Depend-on-WATCHDOG.patch
new file mode 100644
index 0000000000..50e028752a
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-10-platform-cznic-turris-omnia-mcu-Depend-on-WATCHDOG.patch
@@ -0,0 +1,32 @@
+From 5e425e6eca155c162da58d4e58e896ed4109c7fd Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
+Date: Mon, 8 Jul 2024 13:40:02 +0200
+Subject: [PATCH 10/11] platform: cznic: turris-omnia-mcu: Depend on WATCHDOG
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add depend on WATCHDOG, otherwise modpost fails with
+  ERROR: modpost: "watchdog_init_timeout" [drivers/platform/cznic/turris-omnia-mcu.ko] undefined!
+  ERROR: modpost: "devm_watchdog_register_device" [drivers/platform/cznic/turris-omnia-mcu.ko] undefined!
+
+Fixes: ab89fb5fb92c ("platform: cznic: turris-omnia-mcu: Add support for MCU watchdog")
+Reported-by: kernel test robot <lkp@intel.com>
+Closes: https://lore.kernel.org/oe-kbuild-all/202407040711.g19y3cWq-lkp@intel.com/
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Link: https://lore.kernel.org/r/20240708114002.4285-3-kabel@kernel.org
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ drivers/platform/cznic/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -17,6 +17,7 @@ config TURRIS_OMNIA_MCU
+ 	depends on MACH_ARMADA_38X || COMPILE_TEST
+ 	depends on I2C
+ 	depends on OF
++	depends on WATCHDOG
+ 	select GPIOLIB
+ 	select GPIOLIB_IRQCHIP
+ 	select HW_RANDOM
diff --git a/target/linux/mvebu/patches-6.6/820-v6.11-11-platform-cznic-turris-omnia-mcu-fix-Kconfig-dependen.patch b/target/linux/mvebu/patches-6.6/820-v6.11-11-platform-cznic-turris-omnia-mcu-fix-Kconfig-dependen.patch
new file mode 100644
index 0000000000..30a476586e
--- /dev/null
+++ b/target/linux/mvebu/patches-6.6/820-v6.11-11-platform-cznic-turris-omnia-mcu-fix-Kconfig-dependen.patch
@@ -0,0 +1,45 @@
+From 24c68c2525de5fcd0f3b16b2ad1028fb13b53393 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Mon, 15 Jul 2024 08:02:30 +0200
+Subject: [PATCH 11/11] platform: cznic: turris-omnia-mcu: fix Kconfig
+ dependencies
+
+The newly added driver causes a Kconfig warning:
+
+WARNING: unmet direct dependencies detected for RTC_CLASS
+  Depends on [n]: !S390 [=y]
+  Selected by [m]:
+  - TURRIS_OMNIA_MCU [=m] && CZNIC_PLATFORMS [=y] && (MACH_ARMADA_38X || COMPILE_TEST [=y]) && I2C [=m] && OF [=y] && WATCHDOG [=y]
+
+The problem here is that it selects entire subsystems, which normal
+device drivers should not do. Changes all of these to 'depends on'
+instead.
+
+Fixes: dfa556e45ae9e ("platform: cznic: turris-omnia-mcu: Add support for MCU connected GPIOs")
+Fixes: 90e700fd12b61 ("platform: cznic: turris-omnia-mcu: Add support for poweroff and wakeup")
+Fixes: ab89fb5fb92c7 ("platform: cznic: turris-omnia-mcu: Add support for MCU watchdog")
+Fixes: 41bb142a40289 ("platform: cznic: turris-omnia-mcu: Add support for MCU provided TRNG")
+Reported-by: Nathan Chancellor <nathan@kernel.org>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+ drivers/platform/cznic/Kconfig | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/platform/cznic/Kconfig
++++ b/drivers/platform/cznic/Kconfig
+@@ -18,11 +18,11 @@ config TURRIS_OMNIA_MCU
+ 	depends on I2C
+ 	depends on OF
+ 	depends on WATCHDOG
+-	select GPIOLIB
++	depends on GPIOLIB
++	depends on HW_RANDOM
++	depends on RTC_CLASS
++	depends on WATCHDOG_CORE
+ 	select GPIOLIB_IRQCHIP
+-	select HW_RANDOM
+-	select RTC_CLASS
+-	select WATCHDOG_CORE
+ 	help
+ 	  Say Y here to add support for the features implemented by the
+ 	  microcontroller on the CZ.NIC's Turris Omnia SOHO router.
diff --git a/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch b/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch
index 2a8397d0b5..dad8c16be1 100644
--- a/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch
+++ b/target/linux/mvebu/patches-6.6/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch
@@ -16,7 +16,7 @@ Cc: Robert Marko <robert.marko@sartura.hr>
 
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
-@@ -10138,6 +10138,22 @@ IFCVF VIRTIO DATA PATH ACCELERATOR
+@@ -10142,6 +10142,22 @@ IFCVF VIRTIO DATA PATH ACCELERATOR
  R:	Zhu Lingshan <lingshan.zhu@intel.com>
  F:	drivers/vdpa/ifcvf/
  
diff --git a/target/linux/octeon/image/Makefile b/target/linux/octeon/image/Makefile
index dcab815791..536ec5ff7c 100644
--- a/target/linux/octeon/image/Makefile
+++ b/target/linux/octeon/image/Makefile
@@ -42,7 +42,8 @@ define Device/itus_shield-router
 endef
 TARGET_DEVICES += itus_shield-router
 
-ER_CMDLINE:=-mtdparts=phys_mapped_flash:640k(boot0)ro,640k(boot1)ro,64k(eeprom)ro root=/dev/mmcblk0p2 rootfstype=squashfs,ext4 rootwait
+# Disable PCIe on ER as it doesn't have PCIe peripherals and some devices lock up on initialization
+ER_CMDLINE:=-mtdparts=phys_mapped_flash:640k(boot0)ro,640k(boot1)ro,64k(eeprom)ro root=/dev/mmcblk0p2 rootfstype=squashfs,ext4 rootwait pcie_octeon.pcie_disable=1
 define Device/ubnt_edgerouter
   DEVICE_VENDOR := Ubiquiti
   DEVICE_MODEL := EdgeRouter
diff --git a/target/linux/omap/Makefile b/target/linux/omap/Makefile
index fc0842d056..a3c61efc9a 100644
--- a/target/linux/omap/Makefile
+++ b/target/linux/omap/Makefile
@@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk
 ARCH:=arm
 BOARD:=omap
 BOARDNAME:=TI OMAP3/4/AM33xx
-FEATURES:=usb usbgadget ext4 targz fpu audio display nand rootfs-part squashfs source-only
+FEATURES:=usb usbgadget ext4 targz fpu audio display nand rootfs-part squashfs
 CPU_TYPE:=cortex-a8
 CPU_SUBTYPE:=vfpv3
 SUBTARGETS:=generic
diff --git a/target/linux/omap/patches/900-use-cpsw-ethernet-driver.patch b/target/linux/omap/patches/900-use-cpsw-ethernet-driver.patch
new file mode 100644
index 0000000000..17c07fbdfb
--- /dev/null
+++ b/target/linux/omap/patches/900-use-cpsw-ethernet-driver.patch
@@ -0,0 +1,93 @@
+From: Jan Hoffmann <jan@3e8.eu>
+Date: Sat, 27 Apr 2024 20:41:43 +0200
+Subject: ARM: dts: Use cpsw ethernet driver for some am335x devices
+
+The new cpsw-switch driver requires a vid for every port which is
+reserved for internal usage (defaulting to 1 and 2). As a result, some
+network configurations are impossible, such as a bridge with
+default_pvid of 1 (even if it is not vlan aware).
+
+As a simple workaround, the ti,dual-emac-pvid property could be changed
+to another value, but that would just shift the problem. Instead, switch
+some devices back to the older cpsw ethernet driver.
+
+(This patch is not suitable for upstreaming, it just makes the affected
+devices in OpenWrt usable again with the default network config.)
+
+Signed-off-by: Jan Hoffmann <jan@3e8.eu>
+---
+
+--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
+@@ -353,27 +353,24 @@
+ 	};
+ };
+ 
+-&cpsw_port1 {
++&cpsw_emac0 {
+ 	phy-handle = <&ethphy0>;
+ 	phy-mode = "mii";
+-	ti,dual-emac-pvid = <1>;
+ };
+ 
+-&cpsw_port2 {
+-	status = "disabled";
+-};
+-
+-&mac_sw {
++&mac {
++	slaves = <1>;
+ 	pinctrl-names = "default", "sleep";
+ 	pinctrl-0 = <&cpsw_default>;
+ 	pinctrl-1 = <&cpsw_sleep>;
+ 	status = "okay";
+ };
+ 
+-&davinci_mdio_sw {
++&davinci_mdio {
+ 	pinctrl-names = "default", "sleep";
+ 	pinctrl-0 = <&davinci_mdio_default>;
+ 	pinctrl-1 = <&davinci_mdio_sleep>;
++	status = "okay";
+ 
+ 	ethphy0: ethernet-phy@0 {
+ 		reg = <0>;
+--- a/arch/arm/boot/dts/am335x-evm.dts
++++ b/arch/arm/boot/dts/am335x-evm.dts
+@@ -682,31 +682,28 @@
+ 	};
+ };
+ 
+-&mac_sw {
++&mac {
++	slaves = <1>;
+ 	pinctrl-names = "default", "sleep";
+ 	pinctrl-0 = <&cpsw_default>;
+ 	pinctrl-1 = <&cpsw_sleep>;
+ 	status = "okay";
+ };
+ 
+-&davinci_mdio_sw {
++&davinci_mdio {
+ 	pinctrl-names = "default", "sleep";
+ 	pinctrl-0 = <&davinci_mdio_default>;
+ 	pinctrl-1 = <&davinci_mdio_sleep>;
++	status = "okay";
+ 
+ 	ethphy0: ethernet-phy@0 {
+ 		reg = <0>;
+ 	};
+ };
+ 
+-&cpsw_port1 {
++&cpsw_emac0 {
+ 	phy-handle = <&ethphy0>;
+ 	phy-mode = "rgmii-id";
+-	ti,dual-emac-pvid = <1>;
+-};
+-
+-&cpsw_port2 {
+-	 status = "disabled";
+ };
+ 
+ &tscadc {
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-xe3-4.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-xe3-4.dts
new file mode 100644
index 0000000000..eba4d116ad
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-xe3-4.dts
@@ -0,0 +1,454 @@
+// SPDX-License-Identifier: (GPL-2.0+)
+
+/dts-v1/;
+
+#include "ipq6018.dtsi"
+#include "ipq6018-fixed-smps.dtsi"
+#include "ipq6018-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	/* Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C3 */
+	model = "Cambium Networks XE3-4";
+	compatible = "cambiumnetworks,xe3-4", "qcom,ipq6018-cp01", "qcom,ipq6018";
+
+	aliases {
+		serial0 = &blsp1_uart3;
+		sdhc2 = &sdhc_1;
+		ethernet0 = &dp5;
+		ethernet1 = &dp4;
+		label-mac-device = &dp5;
+
+		led-boot = &led_status_amber;
+		led-failsafe = &led_status_amber;
+		led-running = &led_status_white;
+		led-upgrade = &led_status_amber;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs-append = " root=/dev/ubiblock0_1";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&led_pins>;
+		pinctrl-names = "default";
+
+		led_status_white: status-white {
+			color = <LED_COLOR_ID_WHITE>;
+			function = LED_FUNCTION_STATUS;
+			gpio = <&tlmm 56 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_amber: status-amber {
+			color = <LED_COLOR_ID_AMBER>;
+			function = LED_FUNCTION_STATUS;
+			gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	reg_sd_vmmc: regulator-sdcard-vmmc {
+		compatible = "regulator-fixed";
+		regulator-name = "sdcard-vmmc";
+		regulator-min-microvolt = <2950000>;
+		regulator-max-microvolt = <2950000>;
+
+		startup-delay-us = <200>;
+
+		gpio = <&tlmm 66 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&sd_vmmc_en_default>;
+	};
+};
+
+&blsp1_uart3 {
+	pinctrl-0 = <&serial_3_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&blsp1_i2c3 {
+	pinctrl-0 = <&i2c_1_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&tlmm {
+	/* TZ has exclusive control over GPIO20 */
+	gpio-reserved-ranges = <20 1>;
+
+	mdio_pins: mdio-pins {
+		mdc {
+			pins = "gpio64";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mdio {
+			pins = "gpio65";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	i2c_1_pins: i2c-1-state {
+		pins = "gpio42", "gpio43";
+		function = "blsp2_i2c";
+		drive-strength = <8>;
+	};
+
+	spi_0_pins: spi-0-state {
+		pins = "gpio38", "gpio39", "gpio40", "gpio41";
+		function = "blsp0_spi";
+		drive-strength = <8>;
+		bias-pull-down;
+	};
+
+	led_pins: led_pins {
+		leds {
+			pins = "gpio35", "gpio37", "gpio50";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	sd_vmmc_en_default: sd-vmmc-en-default-state {
+		pins = "gpio66";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-down;
+	};
+
+	sd_pins: sd-state {
+		pins = "gpio62";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+	perst-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
+
+	bridge@0,0 {
+		reg = <0x00000000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		wifi@1,0 {
+			status = "okay";
+
+			/* ath11k has no DT compatible for PCI cards */
+			compatible = "pci17cb,1104";
+			reg = <0x00010000 0 0 0 0>;
+
+			qcom,ath11k-fw-memory-mode = <0>;
+			qcom,ath11k-calibration-variant = "CambiumNetworks-XE34";
+		};
+	};
+};
+
+&sdhc_1 {
+	pinctrl-0 = <&sd_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
+	vqmmc-supply = <&reg_sd_vmmc>;
+	bus-width = <4>;
+};
+
+&edma {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+
+	switch_lan_bmp = <(ESS_PORT4 | ESS_PORT5)>;
+	switch_mac_mode = <MAC_MODE_PSGMII>;
+	switch_mac_mode2 = <MAC_MODE_SGMII_PLUS>;
+
+	qcom,port_phyinfo {
+		port@4 {
+			port_id = <4>;
+			phy_address = <3>;
+		};
+
+		port@5 {
+			port_id = <5>;
+			phy_address = <24>;
+			port_mac_sel = "QGMAC_PORT";
+		};
+	};
+};
+
+&mdio {
+	status = "okay";
+	pinctrl-0 = <&mdio_pins>;
+	pinctrl-names = "default";
+	reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <10000>;
+	reset-post-delay-us = <50000>;
+
+	ethernet-phy-package@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "qcom,qca8075-package";
+		reg = <0>;
+
+		qcom,package-mode = "psgmii";
+
+		qca8072: ethernet-phy@3 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <3>;
+		};
+	};
+
+	qca8081: ethernet-phy@24 {
+		compatible = "ethernet-phy-id004d.d101";
+		reg = <24>;
+		reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
+		reset-deassert-us = <50000>;
+	};
+};
+
+&dp4 {
+	status = "okay";
+
+	phy-handle = <&qca8072>;
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&eth1addr 0>;
+	label = "lan2";
+};
+
+&dp5 {
+	status = "okay";
+
+	phy-mode = "sgmii";
+	phy-handle = <&qca8081>;
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&ethaddr 0>;
+	label = "lan1";
+};
+
+&blsp1_spi1 {
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		/*
+		 * U-boot looks for "n25q128a11" node,
+		 * if we don't have it, it will spit out the following warning:
+		 * "ipq: fdt fixup unable to find compatible node".
+		 */
+		linux,modalias = "m25p80", "mx30uf2g18ac", "n25q128a11";
+		compatible = "micron,n25q128a11", "jedec,spi-nor";
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "0:SBL1";
+				reg = <0x0 0xc0000>;
+				read-only;
+			};
+
+			partition@c0000 {
+				label = "0:MIBIB";
+				reg = <0xc0000 0x10000>;
+				read-only;
+			};
+
+			partition@d0000 {
+				label = "0:BOOTCONFIG";
+				reg = <0xd0000 0x20000>;
+				read-only;
+			};
+
+			partition@f0000 {
+				label = "0:BOOTCONFIG1";
+				reg = <0xf0000 0x20000>;
+				read-only;
+			};
+
+			partition@110000 {
+				label = "0:QSEE";
+				reg = <0x110000 0x1a0000>;
+				read-only;
+			};
+
+			partition@2b0000 {
+				label = "0:QSEE_1";
+				reg = <0x2b0000 0x1a0000>;
+				read-only;
+			};
+
+			partition@450000 {
+				label = "0:DEVCFG";
+				reg = <0x450000 0x10000>;
+				read-only;
+			};
+
+			partition@460000 {
+				label = "mfginfo";
+				reg = <0x460000 0x10000>;
+				read-only;
+			};
+
+			partition@470000 {
+				label = "0:RPM";
+				reg = <0x470000 0x40000>;
+				read-only;
+			};
+
+			partition@4b0000 {
+				label = "0:RPM_1";
+				reg = <0x4b0000 0x40000>;
+				read-only;
+			};
+
+			partition@4f0000 {
+				label = "0:CDT";
+				reg = <0x4f0000 0x10000>;
+				read-only;
+			};
+
+			partition@500000 {
+				label = "0:CDT_1";
+				reg = <0x500000 0x10000>;
+				read-only;
+			};
+
+			partition@510000 {
+				compatible = "u-boot,env";
+				label = "0:APPSBLENV";
+				reg = <0x510000 0x10000>;
+
+				ethaddr: ethaddr {
+					#nvmem-cell-cells = <0>;
+				};
+
+				eth1addr: eth1addr {
+					#nvmem-cell-cells = <0>;
+				};
+
+				eth2addr: eth2addr {
+					#nvmem-cell-cells = <0>;
+				};
+
+				eth5addr: eth5addr {
+					#nvmem-cell-cells = <0>;
+				};
+			};
+
+			partition@520000 {
+				label = "0:APPSBL";
+				reg = <0x520000 0xa0000>;
+				read-only;
+			};
+
+			partition@5c0000 {
+				label = "0:APPSBL_1";
+				reg = <0x5c0000 0xa0000>;
+				read-only;
+			};
+
+			partition@660000 {
+				label = "0:ART";
+				reg = <0x660000 0x80000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&qpic_bam {
+	status = "okay";
+};
+
+&qpic_nand {
+	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "rootfs";
+				reg = <0x0 0x6000000>;
+			};
+
+			partition@6000000 {
+				label = "rootfs_1";
+				reg = <0x6000000 0x6000000>;
+			};
+
+			partition@c000000 {
+				label = "NVRAM";
+				reg = <0xc000000 0x3000000>;
+			};
+
+			partition@f000000 {
+				label = "crashLog";
+				reg = <0xf000000 0x1000000>;
+			};
+		};
+	};
+};
+
+&wifi {
+	status = "okay";
+	qcom,ath11k-calibration-variant = "CambiumNetworks-XE34";
+
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&eth2addr>;
+};
+
+&qusb_phy_1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-fixed-smps.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-fixed-smps.dtsi
new file mode 100644
index 0000000000..e867daf866
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-fixed-smps.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/*
+ * Board does not use companion MP5496 PMIC,
+ * but rather uses fixed external SMPS.
+ */
+
+&rpm {
+	status = "disabled";
+};
+
+&CPU0 {
+	/delete-property/ cpu-supply;
+};
+
+&CPU1 {
+	/delete-property/ cpu-supply;
+};
+
+&CPU2 {
+	/delete-property/ cpu-supply;
+};
+
+&CPU3 {
+	/delete-property/ cpu-supply;
+};
+
+&cpu_opp_table {
+	opp-864000000 {
+		opp-microvolt = <1100000>;
+	};
+
+	opp-1056000000 {
+		opp-microvolt = <1100000>;
+	};
+
+	opp-1320000000 {
+		opp-microvolt = <1100000>;
+	};
+
+	opp-1440000000 {
+		opp-microvolt = <1100000>;
+	};
+
+	opp-1608000000 {
+		opp-microvolt = <1100000>;
+	};
+
+	opp-1800000000 {
+		opp-microvolt = <1100000>;
+	};
+};
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
index 76838b86c5..194540aac1 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-ess.dtsi
@@ -17,407 +17,413 @@
 };
 
 &soc {
-	switch: ess-switch@3a000000 {
-		compatible = "qcom,ess-switch-ipq807x";
-		reg = <0x3a000000 0x1000000>;
-		switch_access_mode = "local bus";
-		switch_cpu_bmp = <ESS_PORT0>;  /* cpu port bitmap */
-		switch_inner_bmp = <ESS_PORT7>; /*inner port bitmap*/
-		clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
-			 <&gcc GCC_CMN_12GPLL_SYS_CLK>,
-			 <&gcc GCC_UNIPHY0_AHB_CLK>,
-			 <&gcc GCC_UNIPHY0_SYS_CLK>,
-			 <&gcc GCC_UNIPHY1_AHB_CLK>,
-			 <&gcc GCC_UNIPHY1_SYS_CLK>,
-			 <&gcc GCC_UNIPHY2_AHB_CLK>,
-			 <&gcc GCC_UNIPHY2_SYS_CLK>,
-			 <&gcc GCC_PORT1_MAC_CLK>,
-			 <&gcc GCC_PORT2_MAC_CLK>,
-			 <&gcc GCC_PORT3_MAC_CLK>,
-			 <&gcc GCC_PORT4_MAC_CLK>,
-			 <&gcc GCC_PORT5_MAC_CLK>,
-			 <&gcc GCC_PORT6_MAC_CLK>,
-			 <&gcc GCC_NSS_PPE_CLK>,
-			 <&gcc GCC_NSS_PPE_CFG_CLK>,
-			 <&gcc GCC_NSSNOC_PPE_CLK>,
-			 <&gcc GCC_NSSNOC_PPE_CFG_CLK>,
-			 <&gcc GCC_NSS_EDMA_CLK>,
-			 <&gcc GCC_NSS_EDMA_CFG_CLK>,
-			 <&gcc GCC_NSS_PPE_IPE_CLK>,
-			 <&gcc GCC_NSS_PPE_BTQ_CLK>,
-			 <&gcc GCC_MDIO_AHB_CLK>,
-			 <&gcc GCC_NSS_NOC_CLK>,
-			 <&gcc GCC_NSSNOC_SNOC_CLK>,
-			 <&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
-			 <&gcc GCC_NSS_CRYPTO_CLK>,
-			 <&gcc GCC_NSS_IMEM_CLK>,
-			 <&gcc GCC_NSS_PTP_REF_CLK>,
-			 <&gcc GCC_NSS_PORT1_RX_CLK>,
-			 <&gcc GCC_NSS_PORT1_TX_CLK>,
-			 <&gcc GCC_NSS_PORT2_RX_CLK>,
-			 <&gcc GCC_NSS_PORT2_TX_CLK>,
-			 <&gcc GCC_NSS_PORT3_RX_CLK>,
-			 <&gcc GCC_NSS_PORT3_TX_CLK>,
-			 <&gcc GCC_NSS_PORT4_RX_CLK>,
-			 <&gcc GCC_NSS_PORT4_TX_CLK>,
-			 <&gcc GCC_NSS_PORT5_RX_CLK>,
-			 <&gcc GCC_NSS_PORT5_TX_CLK>,
-			 <&gcc GCC_NSS_PORT6_RX_CLK>,
-			 <&gcc GCC_NSS_PORT6_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT1_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT1_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT2_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT2_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT3_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT3_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT4_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT4_TX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT5_RX_CLK>,
-			 <&gcc GCC_UNIPHY0_PORT5_TX_CLK>,
-			 <&gcc GCC_UNIPHY1_PORT5_RX_CLK>,
-			 <&gcc GCC_UNIPHY1_PORT5_TX_CLK>,
-			 <&gcc GCC_UNIPHY2_PORT6_RX_CLK>,
-			 <&gcc GCC_UNIPHY2_PORT6_TX_CLK>,
-			 <&gcc NSS_PORT5_RX_CLK_SRC>,
-			 <&gcc NSS_PORT5_TX_CLK_SRC>;
-		clock-names = "cmn_ahb_clk", "cmn_sys_clk",
-			      "uniphy0_ahb_clk", "uniphy0_sys_clk",
-			      "uniphy1_ahb_clk", "uniphy1_sys_clk",
-			      "uniphy2_ahb_clk", "uniphy2_sys_clk",
-			      "port1_mac_clk", "port2_mac_clk",
-			      "port3_mac_clk", "port4_mac_clk",
-			      "port5_mac_clk", "port6_mac_clk",
-			      "nss_ppe_clk", "nss_ppe_cfg_clk",
-			      "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk",
-			      "nss_edma_clk", "nss_edma_cfg_clk",
-			      "nss_ppe_ipe_clk", "nss_ppe_btq_clk",
-			      "gcc_mdio_ahb_clk", "gcc_nss_noc_clk",
-			      "gcc_nssnoc_snoc_clk",
-			      "gcc_mem_noc_nss_axi_clk",
-			      "gcc_nss_crypto_clk",
-			      "gcc_nss_imem_clk",
-			      "gcc_nss_ptp_ref_clk",
-			      "nss_port1_rx_clk", "nss_port1_tx_clk",
-			      "nss_port2_rx_clk", "nss_port2_tx_clk",
-			      "nss_port3_rx_clk", "nss_port3_tx_clk",
-			      "nss_port4_rx_clk", "nss_port4_tx_clk",
-			      "nss_port5_rx_clk", "nss_port5_tx_clk",
-			      "nss_port6_rx_clk", "nss_port6_tx_clk",
-			      "uniphy0_port1_rx_clk",
-			      "uniphy0_port1_tx_clk",
-			      "uniphy0_port2_rx_clk",
-			      "uniphy0_port2_tx_clk",
-			      "uniphy0_port3_rx_clk",
-			      "uniphy0_port3_tx_clk",
-			      "uniphy0_port4_rx_clk",
-			      "uniphy0_port4_tx_clk",
-			      "uniphy0_port5_rx_clk",
-			      "uniphy0_port5_tx_clk",
-			      "uniphy1_port5_rx_clk",
-			      "uniphy1_port5_tx_clk",
-			      "uniphy2_port6_rx_clk",
-			      "uniphy2_port6_tx_clk",
-			      "nss_port5_rx_clk_src",
-			      "nss_port5_tx_clk_src";
-		resets = <&gcc GCC_PPE_FULL_RESET>,
-			 <&gcc GCC_UNIPHY0_SOFT_RESET>,
-			 <&gcc GCC_UNIPHY0_XPCS_RESET>,
-			 <&gcc GCC_UNIPHY1_SOFT_RESET>,
-			 <&gcc GCC_UNIPHY1_XPCS_RESET>,
-			 <&gcc GCC_UNIPHY2_SOFT_RESET>,
-			 <&gcc GCC_UNIPHY2_XPCS_RESET>,
-			 <&gcc GCC_NSSPORT1_RESET>,
-			 <&gcc GCC_NSSPORT2_RESET>,
-			 <&gcc GCC_NSSPORT3_RESET>,
-			 <&gcc GCC_NSSPORT4_RESET>,
-			 <&gcc GCC_NSSPORT5_RESET>,
-			 <&gcc GCC_NSSPORT6_RESET>;
-		reset-names = "ppe_rst", "uniphy0_soft_rst",
-			      "uniphy0_xpcs_rst", "uniphy1_soft_rst",
-			      "uniphy1_xpcs_rst", "uniphy2_soft_rst",
-			      "uniphy2_xpcs_rst", "nss_port1_rst",
-			      "nss_port2_rst", "nss_port3_rst",
-			      "nss_port4_rst", "nss_port5_rst",
-			      "nss_port6_rst";
-		mdio-bus = <&mdio>;
+	ess_instance: ess-instance {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		num_devices = <1>;
 
-		switch_mac_mode = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 0 */
-		switch_mac_mode1 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 1 */
-		switch_mac_mode2 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 2 */
+		switch: ess-switch@3a000000 {
+			compatible = "qcom,ess-switch-ipq807x";
+			reg = <0x3a000000 0x1000000>;
+			switch_access_mode = "local bus";
+			switch_cpu_bmp = <ESS_PORT0>;  /* cpu port bitmap */
+			switch_inner_bmp = <ESS_PORT7>; /*inner port bitmap*/
+			clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
+				 <&gcc GCC_CMN_12GPLL_SYS_CLK>,
+				 <&gcc GCC_UNIPHY0_AHB_CLK>,
+				 <&gcc GCC_UNIPHY0_SYS_CLK>,
+				 <&gcc GCC_UNIPHY1_AHB_CLK>,
+				 <&gcc GCC_UNIPHY1_SYS_CLK>,
+				 <&gcc GCC_UNIPHY2_AHB_CLK>,
+				 <&gcc GCC_UNIPHY2_SYS_CLK>,
+				 <&gcc GCC_PORT1_MAC_CLK>,
+				 <&gcc GCC_PORT2_MAC_CLK>,
+				 <&gcc GCC_PORT3_MAC_CLK>,
+				 <&gcc GCC_PORT4_MAC_CLK>,
+				 <&gcc GCC_PORT5_MAC_CLK>,
+				 <&gcc GCC_PORT6_MAC_CLK>,
+				 <&gcc GCC_NSS_PPE_CLK>,
+				 <&gcc GCC_NSS_PPE_CFG_CLK>,
+				 <&gcc GCC_NSSNOC_PPE_CLK>,
+				 <&gcc GCC_NSSNOC_PPE_CFG_CLK>,
+				 <&gcc GCC_NSS_EDMA_CLK>,
+				 <&gcc GCC_NSS_EDMA_CFG_CLK>,
+				 <&gcc GCC_NSS_PPE_IPE_CLK>,
+				 <&gcc GCC_NSS_PPE_BTQ_CLK>,
+				 <&gcc GCC_MDIO_AHB_CLK>,
+				 <&gcc GCC_NSS_NOC_CLK>,
+				 <&gcc GCC_NSSNOC_SNOC_CLK>,
+				 <&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
+				 <&gcc GCC_NSS_CRYPTO_CLK>,
+				 <&gcc GCC_NSS_IMEM_CLK>,
+				 <&gcc GCC_NSS_PTP_REF_CLK>,
+				 <&gcc GCC_NSS_PORT1_RX_CLK>,
+				 <&gcc GCC_NSS_PORT1_TX_CLK>,
+				 <&gcc GCC_NSS_PORT2_RX_CLK>,
+				 <&gcc GCC_NSS_PORT2_TX_CLK>,
+				 <&gcc GCC_NSS_PORT3_RX_CLK>,
+				 <&gcc GCC_NSS_PORT3_TX_CLK>,
+				 <&gcc GCC_NSS_PORT4_RX_CLK>,
+				 <&gcc GCC_NSS_PORT4_TX_CLK>,
+				 <&gcc GCC_NSS_PORT5_RX_CLK>,
+				 <&gcc GCC_NSS_PORT5_TX_CLK>,
+				 <&gcc GCC_NSS_PORT6_RX_CLK>,
+				 <&gcc GCC_NSS_PORT6_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT1_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT1_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT2_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT2_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT3_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT3_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT4_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT4_TX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT5_RX_CLK>,
+				 <&gcc GCC_UNIPHY0_PORT5_TX_CLK>,
+				 <&gcc GCC_UNIPHY1_PORT5_RX_CLK>,
+				 <&gcc GCC_UNIPHY1_PORT5_TX_CLK>,
+				 <&gcc GCC_UNIPHY2_PORT6_RX_CLK>,
+				 <&gcc GCC_UNIPHY2_PORT6_TX_CLK>,
+				 <&gcc NSS_PORT5_RX_CLK_SRC>,
+				 <&gcc NSS_PORT5_TX_CLK_SRC>;
+			clock-names = "cmn_ahb_clk", "cmn_sys_clk",
+				      "uniphy0_ahb_clk", "uniphy0_sys_clk",
+				      "uniphy1_ahb_clk", "uniphy1_sys_clk",
+				      "uniphy2_ahb_clk", "uniphy2_sys_clk",
+				      "port1_mac_clk", "port2_mac_clk",
+				      "port3_mac_clk", "port4_mac_clk",
+				      "port5_mac_clk", "port6_mac_clk",
+				      "nss_ppe_clk", "nss_ppe_cfg_clk",
+				      "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk",
+				      "nss_edma_clk", "nss_edma_cfg_clk",
+				      "nss_ppe_ipe_clk", "nss_ppe_btq_clk",
+				      "gcc_mdio_ahb_clk", "gcc_nss_noc_clk",
+				      "gcc_nssnoc_snoc_clk",
+				      "gcc_mem_noc_nss_axi_clk",
+				      "gcc_nss_crypto_clk",
+				      "gcc_nss_imem_clk",
+				      "gcc_nss_ptp_ref_clk",
+				      "nss_port1_rx_clk", "nss_port1_tx_clk",
+				      "nss_port2_rx_clk", "nss_port2_tx_clk",
+				      "nss_port3_rx_clk", "nss_port3_tx_clk",
+				      "nss_port4_rx_clk", "nss_port4_tx_clk",
+				      "nss_port5_rx_clk", "nss_port5_tx_clk",
+				      "nss_port6_rx_clk", "nss_port6_tx_clk",
+				      "uniphy0_port1_rx_clk",
+				      "uniphy0_port1_tx_clk",
+				      "uniphy0_port2_rx_clk",
+				      "uniphy0_port2_tx_clk",
+				      "uniphy0_port3_rx_clk",
+				      "uniphy0_port3_tx_clk",
+				      "uniphy0_port4_rx_clk",
+				      "uniphy0_port4_tx_clk",
+				      "uniphy0_port5_rx_clk",
+				      "uniphy0_port5_tx_clk",
+				      "uniphy1_port5_rx_clk",
+				      "uniphy1_port5_tx_clk",
+				      "uniphy2_port6_rx_clk",
+				      "uniphy2_port6_tx_clk",
+				      "nss_port5_rx_clk_src",
+				      "nss_port5_tx_clk_src";
+			resets = <&gcc GCC_PPE_FULL_RESET>,
+				 <&gcc GCC_UNIPHY0_SOFT_RESET>,
+				 <&gcc GCC_UNIPHY0_XPCS_RESET>,
+				 <&gcc GCC_UNIPHY1_SOFT_RESET>,
+				 <&gcc GCC_UNIPHY1_XPCS_RESET>,
+				 <&gcc GCC_UNIPHY2_SOFT_RESET>,
+				 <&gcc GCC_UNIPHY2_XPCS_RESET>,
+				 <&gcc GCC_NSSPORT1_RESET>,
+				 <&gcc GCC_NSSPORT2_RESET>,
+				 <&gcc GCC_NSSPORT3_RESET>,
+				 <&gcc GCC_NSSPORT4_RESET>,
+				 <&gcc GCC_NSSPORT5_RESET>,
+				 <&gcc GCC_NSSPORT6_RESET>;
+			reset-names = "ppe_rst", "uniphy0_soft_rst",
+				      "uniphy0_xpcs_rst", "uniphy1_soft_rst",
+				      "uniphy1_xpcs_rst", "uniphy2_soft_rst",
+				      "uniphy2_xpcs_rst", "nss_port1_rst",
+				      "nss_port2_rst", "nss_port3_rst",
+				      "nss_port4_rst", "nss_port5_rst",
+				      "nss_port6_rst";
+			mdio-bus = <&mdio>;
 
-		bm_tick_mode = <0>; /* bm tick mode */
-		tm_tick_mode = <0>; /* tm tick mode */
+			switch_mac_mode = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 0 */
+			switch_mac_mode1 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 1 */
+			switch_mac_mode2 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 2 */
 
-		status = "disabled";
+			bm_tick_mode = <0>; /* bm tick mode */
+			tm_tick_mode = <0>; /* tm tick mode */
 
-		port_scheduler_resource {
-			port@0 {
-				port_id = <0>;
-				ucast_queue = <0 143>;
-				mcast_queue = <256 271>;
-				l0sp = <0 35>;
-				l0cdrr = <0 47>;
-				l0edrr = <0 47>;
-				l1cdrr = <0 7>;
-				l1edrr = <0 7>;
-			};
-			port@1 {
-				port_id = <1>;
-				ucast_queue = <144 159>;
-				mcast_queue = <272 275>;
-				l0sp = <36 39>;
-				l0cdrr = <48 63>;
-				l0edrr = <48 63>;
-				l1cdrr = <8 11>;
-				l1edrr = <8 11>;
-			};
-			port@2 {
-				port_id = <2>;
-				ucast_queue = <160 175>;
-				mcast_queue = <276 279>;
-				l0sp = <40 43>;
-				l0cdrr = <64 79>;
-				l0edrr = <64 79>;
-				l1cdrr = <12 15>;
-				l1edrr = <12 15>;
-			};
-			port@3 {
-				port_id = <3>;
-				ucast_queue = <176 191>;
-				mcast_queue = <280 283>;
-				l0sp = <44 47>;
-				l0cdrr = <80 95>;
-				l0edrr = <80 95>;
-				l1cdrr = <16 19>;
-				l1edrr = <16 19>;
-			};
-			port@4 {
-				port_id = <4>;
-				ucast_queue = <192 207>;
-				mcast_queue = <284 287>;
-				l0sp = <48 51>;
-				l0cdrr = <96 111>;
-				l0edrr = <96 111>;
-				l1cdrr = <20 23>;
-				l1edrr = <20 23>;
-			};
-			port@5 {
-				port_id = <5>;
-				ucast_queue = <208 223>;
-				mcast_queue = <288 291>;
-				l0sp = <52 55>;
-				l0cdrr = <112 127>;
-				l0edrr = <112 127>;
-				l1cdrr = <24 27>;
-				l1edrr = <24 27>;
-			};
-			port@6 {
-				port_id = <6>;
-				ucast_queue = <224 239>;
-				mcast_queue = <292 295>;
-				l0sp = <56 59>;
-				l0cdrr = <128 143>;
-				l0edrr = <128 143>;
-				l1cdrr = <28 31>;
-				l1edrr = <28 31>;
-			};
-			port@7 {
-				port_id = <7>;
-				ucast_queue = <240 255>;
-				mcast_queue = <296 299>;
-				l0sp = <60 63>;
-				l0cdrr = <144 159>;
-				l0edrr = <144 159>;
-				l1cdrr = <32 35>;
-				l1edrr = <32 35>;
-			};
-		};
-		port_scheduler_config {
-			port@0 {
-				port_id = <0>;
-				l1scheduler {
-					group@0 {
-						sp = <0 1>; /*L0 SPs*/
-						/*cpri cdrr epri edrr*/
-						cfg = <0 0 0 0>;
-					};
+			status = "disabled";
+
+			port_scheduler_resource {
+				port@0 {
+					port_id = <0>;
+					ucast_queue = <0 143>;
+					mcast_queue = <256 271>;
+					l0sp = <0 35>;
+					l0cdrr = <0 47>;
+					l0edrr = <0 47>;
+					l1cdrr = <0 7>;
+					l1edrr = <0 7>;
 				};
-				l0scheduler {
-					group@0 {
-						/*unicast queues*/
-						ucast_queue = <0 4 8>;
-						/*multicast queues*/
-						mcast_queue = <256 260>;
-						/*sp cpri cdrr epri edrr*/
-						cfg = <0 0 0 0 0>;
-					};
-					group@1 {
-						ucast_queue = <1 5 9>;
-						mcast_queue = <257 261>;
-						cfg = <0 1 1 1 1>;
-					};
-					group@2 {
-						ucast_queue = <2 6 10>;
-						mcast_queue = <258 262>;
-						cfg = <0 2 2 2 2>;
-					};
-					group@3 {
-						ucast_queue = <3 7 11>;
-						mcast_queue = <259 263>;
-						cfg = <0 3 3 3 3>;
-					};
+				port@1 {
+					port_id = <1>;
+					ucast_queue = <144 159>;
+					mcast_queue = <272 275>;
+					l0sp = <36 39>;
+					l0cdrr = <48 63>;
+					l0edrr = <48 63>;
+					l1cdrr = <8 11>;
+					l1edrr = <8 11>;
 				};
-			};
-			port@1 {
-				port_id = <1>;
-				l1scheduler {
-					group@0 {
-						sp = <36>;
-						cfg = <0 8 0 8>;
-					};
-					group@1 {
-						sp = <37>;
-						cfg = <1 9 1 9>;
-					};
+				port@2 {
+					port_id = <2>;
+					ucast_queue = <160 175>;
+					mcast_queue = <276 279>;
+					l0sp = <40 43>;
+					l0cdrr = <64 79>;
+					l0edrr = <64 79>;
+					l1cdrr = <12 15>;
+					l1edrr = <12 15>;
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <144>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <272>;
-						mcast_loop_pri = <4>;
-						cfg = <36 0 48 0 48>;
-					};
+				port@3 {
+					port_id = <3>;
+					ucast_queue = <176 191>;
+					mcast_queue = <280 283>;
+					l0sp = <44 47>;
+					l0cdrr = <80 95>;
+					l0edrr = <80 95>;
+					l1cdrr = <16 19>;
+					l1edrr = <16 19>;
 				};
-			};
-			port@2 {
-				port_id = <2>;
-				l1scheduler {
-					group@0 {
-						sp = <40>;
-						cfg = <0 12 0 12>;
-					};
-					group@1 {
-						sp = <41>;
-						cfg = <1 13 1 13>;
-					};
+				port@4 {
+					port_id = <4>;
+					ucast_queue = <192 207>;
+					mcast_queue = <284 287>;
+					l0sp = <48 51>;
+					l0cdrr = <96 111>;
+					l0edrr = <96 111>;
+					l1cdrr = <20 23>;
+					l1edrr = <20 23>;
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <160>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <276>;
-						mcast_loop_pri = <4>;
-						cfg = <40 0 64 0 64>;
-					};
+				port@5 {
+					port_id = <5>;
+					ucast_queue = <208 223>;
+					mcast_queue = <288 291>;
+					l0sp = <52 55>;
+					l0cdrr = <112 127>;
+					l0edrr = <112 127>;
+					l1cdrr = <24 27>;
+					l1edrr = <24 27>;
 				};
-			};
-			port@3 {
-				port_id = <3>;
-				l1scheduler {
-					group@0 {
-						sp = <44>;
-						cfg = <0 16 0 16>;
-					};
-					group@1 {
-						sp = <45>;
-						cfg = <1 17 1 17>;
-					};
+				port@6 {
+					port_id = <6>;
+					ucast_queue = <224 239>;
+					mcast_queue = <292 295>;
+					l0sp = <56 59>;
+					l0cdrr = <128 143>;
+					l0edrr = <128 143>;
+					l1cdrr = <28 31>;
+					l1edrr = <28 31>;
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <176>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <280>;
-						mcast_loop_pri = <4>;
-						cfg = <44 0 80 0 80>;
-					};
+				port@7 {
+					port_id = <7>;
+					ucast_queue = <240 255>;
+					mcast_queue = <296 299>;
+					l0sp = <60 63>;
+					l0cdrr = <144 159>;
+					l0edrr = <144 159>;
+					l1cdrr = <32 35>;
+					l1edrr = <32 35>;
 				};
 			};
-			port@4 {
-				port_id = <4>;
-				l1scheduler {
-					group@0 {
-						sp = <48>;
-						cfg = <0 20 0 20>;
+			port_scheduler_config {
+				port@0 {
+					port_id = <0>;
+					l1scheduler {
+						group@0 {
+							sp = <0 1>; /*L0 SPs*/
+							/*cpri cdrr epri edrr*/
+							cfg = <0 0 0 0>;
+						};
 					};
-					group@1 {
-						sp = <49>;
-						cfg = <1 21 1 21>;
+					l0scheduler {
+						group@0 {
+							/*unicast queues*/
+							ucast_queue = <0 4 8>;
+							/*multicast queues*/
+							mcast_queue = <256 260>;
+							/*sp cpri cdrr epri edrr*/
+							cfg = <0 0 0 0 0>;
+						};
+						group@1 {
+							ucast_queue = <1 5 9>;
+							mcast_queue = <257 261>;
+							cfg = <0 1 1 1 1>;
+						};
+						group@2 {
+							ucast_queue = <2 6 10>;
+							mcast_queue = <258 262>;
+							cfg = <0 2 2 2 2>;
+						};
+						group@3 {
+							ucast_queue = <3 7 11>;
+							mcast_queue = <259 263>;
+							cfg = <0 3 3 3 3>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <192>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <284>;
-						mcast_loop_pri = <4>;
-						cfg = <48 0 96 0 96>;
+				port@1 {
+					port_id = <1>;
+					l1scheduler {
+						group@0 {
+							sp = <36>;
+							cfg = <0 8 0 8>;
+						};
+						group@1 {
+							sp = <37>;
+							cfg = <1 9 1 9>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <144>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <272>;
+							mcast_loop_pri = <4>;
+							cfg = <36 0 48 0 48>;
+						};
 					};
 				};
-			};
-			port@5 {
-				port_id = <5>;
-				l1scheduler {
-					group@0 {
-						sp = <52>;
-						cfg = <0 24 0 24>;
+				port@2 {
+					port_id = <2>;
+					l1scheduler {
+						group@0 {
+							sp = <40>;
+							cfg = <0 12 0 12>;
+						};
+						group@1 {
+							sp = <41>;
+							cfg = <1 13 1 13>;
+						};
 					};
-					group@1 {
-						sp = <53>;
-						cfg = <1 25 1 25>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <160>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <276>;
+							mcast_loop_pri = <4>;
+							cfg = <40 0 64 0 64>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <208>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <288>;
-						mcast_loop_pri = <4>;
-						cfg = <52 0 112 0 112>;
+				port@3 {
+					port_id = <3>;
+					l1scheduler {
+						group@0 {
+							sp = <44>;
+							cfg = <0 16 0 16>;
+						};
+						group@1 {
+							sp = <45>;
+							cfg = <1 17 1 17>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <176>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <280>;
+							mcast_loop_pri = <4>;
+							cfg = <44 0 80 0 80>;
+						};
 					};
 				};
-			};
-			port@6 {
-				port_id = <6>;
-				l1scheduler {
-					group@0 {
-						sp = <56>;
-						cfg = <0 28 0 28>;
+				port@4 {
+					port_id = <4>;
+					l1scheduler {
+						group@0 {
+							sp = <48>;
+							cfg = <0 20 0 20>;
+						};
+						group@1 {
+							sp = <49>;
+							cfg = <1 21 1 21>;
+						};
 					};
-					group@1 {
-						sp = <57>;
-						cfg = <1 29 1 29>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <192>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <284>;
+							mcast_loop_pri = <4>;
+							cfg = <48 0 96 0 96>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <224>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <292>;
-						mcast_loop_pri = <4>;
-						cfg = <56 0 128 0 128>;
+				port@5 {
+					port_id = <5>;
+					l1scheduler {
+						group@0 {
+							sp = <52>;
+							cfg = <0 24 0 24>;
+						};
+						group@1 {
+							sp = <53>;
+							cfg = <1 25 1 25>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <208>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <288>;
+							mcast_loop_pri = <4>;
+							cfg = <52 0 112 0 112>;
+						};
 					};
 				};
-			};
-			port@7 {
-				port_id = <7>;
-				l1scheduler {
-					group@0 {
-						sp = <60>;
-						cfg = <0 32 0 32>;
+				port@6 {
+					port_id = <6>;
+					l1scheduler {
+						group@0 {
+							sp = <56>;
+							cfg = <0 28 0 28>;
+						};
+						group@1 {
+							sp = <57>;
+							cfg = <1 29 1 29>;
+						};
 					};
-					group@1 {
-						sp = <61>;
-						cfg = <1 33 1 33>;
+					l0scheduler {
+						group@0 {
+							ucast_queue = <224>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <292>;
+							mcast_loop_pri = <4>;
+							cfg = <56 0 128 0 128>;
+						};
 					};
 				};
-				l0scheduler {
-					group@0 {
-						ucast_queue = <240>;
-						ucast_loop_pri = <16>;
-						mcast_queue = <296>;
-						cfg = <60 0 144 0 144>;
+				port@7 {
+					port_id = <7>;
+					l1scheduler {
+						group@0 {
+							sp = <60>;
+							cfg = <0 32 0 32>;
+						};
+						group@1 {
+							sp = <61>;
+							cfg = <1 33 1 33>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <240>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <296>;
+							cfg = <60 0 144 0 144>;
+						};
 					};
 				};
 			};
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts
new file mode 100644
index 0000000000..4af942c289
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rt-ax89x.dts
@@ -0,0 +1,741 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/* Copyright (c) 2024, Robert Marko <robimarko@gmail.com> */
+
+/dts-v1/;
+
+#include "ipq8074.dtsi"
+#include "ipq8074-hk-cpu.dtsi"
+#include "ipq8074-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Asus RT-AX89X";
+	compatible = "asus,rt-ax89x", "qcom,ipq8074";
+
+	aliases {
+		serial0 = &blsp1_uart5;
+		mdio-gpio0 = &mdio1;
+		ethernet0 = &dp1;
+		ethernet1 = &dp2;
+		ethernet2 = &dp3;
+		ethernet3 = &dp4;
+		ethernet4 = &dp5_syn;
+		ethernet5 = &dp6_syn;
+		led-boot = &led_pwr;
+		led-failsafe = &led_pwr;
+		led-running = &led_pwr;
+		led-upgrade = &led_pwr;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		/* We have to override root and ubi device passed by bootloader */
+		bootargs-append = " ubi.block=0,jffs2 root=/dev/ubiblock0_4";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		wifi-button {
+			label = "wifi";
+			gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WLAN>;
+		};
+
+		reset-button {
+			label = "reset";
+			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps-button {
+			label = "wps";
+			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		led-button {
+			label = "led";
+			gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_LIGHTS_TOGGLE>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&led_pins>;
+		pinctrl-names = "default";
+
+		led_pwr: led-pwr {
+			function = LED_FUNCTION_POWER;
+			gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-2g {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		led-5g {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+			linux,default-trigger = "phy1radio";
+		};
+
+		led-10g-copper {
+			function = "aqr10g";
+			gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-lan {
+			function = LED_FUNCTION_LAN;
+			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-sfp {
+			function = "sfp";
+			gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+
+		led-wan-red {
+			function = LED_FUNCTION_WAN;
+			gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+		};
+
+		led-wan-white {
+			function = LED_FUNCTION_WAN;
+			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_WHITE>;
+		};
+	};
+
+	gpio_fan: gpio-fan {
+		compatible = "gpio-fan";
+		pinctrl-0 = <&fan_pins>;
+		pinctrl-names = "default";
+		gpios = <&tlmm 64 GPIO_ACTIVE_HIGH
+			 &tlmm 66 GPIO_ACTIVE_HIGH>;
+		/*
+		 * Not supported upstream, but good to document for
+		 * future uses.
+		 * It seems that Delta AFB0712VHB fan has its tacho
+		 * output connected to GPIO 65.
+		 */
+		//rpm-gpios = <&tlmm 65 GPIO_ACTIVE_HIGH>;
+		gpio-fan,speed-map = <    0 0
+				          1600 1
+				          1850 2
+				          2100 3 >;
+		#cooling-cells = <2>;
+	};
+
+	usb0_vbus: regulator-usb0-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb0_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&tlmm 30 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+
+	usb1_vbus: regulator-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+
+	output-usb0-power {
+		compatible = "regulator-output";
+		vout-supply = <&usb0_vbus>;
+	};
+
+	output-usb1-power {
+		compatible = "regulator-output";
+		vout-supply = <&usb1_vbus>;
+	};
+};
+
+&cpu0_thermal {
+	trips {
+		cpu0_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu0_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cpu1_thermal {
+	trips {
+		cpu1_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu1_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cpu2_thermal {
+	trips {
+		cpu2_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu2_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cpu3_thermal {
+	trips {
+		cpu3_active: cpu-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu3_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&cluster_thermal {
+	trips {
+		cluster_active: cluster-active {
+			temperature = <70000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cluster_active>;
+			cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&tlmm {
+	button_pins: button-state {
+		pins = "gpio25", "gpio26", "gpio34", "gpio61";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	i2c_pins: i2c-pins {
+		pins = "gpio42", "gpio43";
+		function = "blsp1_i2c";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	mdio_pins: mdio-pins {
+		mdc {
+			pins = "gpio68";
+			function = "mdc";
+			drive-strength = <16>;
+			bias-pull-up;
+		};
+
+		mdio {
+			pins = "gpio69";
+			function = "mdio";
+			drive-strength = <16>;
+			bias-pull-up;
+		};
+	};
+
+	mdio_gpio_pins: mdio-gpio-pins {
+		pins = "gpio54", "gpio56";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	uniphy_pins: uniphy_pinmux {
+		mux {
+			pins = "gpio60";
+			function = "rx2";
+			bias-disable;
+		};
+
+		sfp_tx_disable {
+			pins = "gpio48";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+			output-low;
+		};
+
+		sfp_tx_fault {
+			pins = "gpio62";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+			output-high;
+		};
+
+		sfp_mod_def0 {
+			pins = "gpio46";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	led_pins: led-state {
+		power {
+			pins = "gpio21";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		default_off {
+			pins = "gpio18", "gpio19", "gpio20", "gpio47",
+			       "gpio44", "gpio35", "gpio36";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	fan_pins: fan-state {
+		pins = "gpio64", "gpio66";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+		output-high;
+	};
+};
+
+&blsp1_uart5 {
+	status = "okay";
+};
+
+&prng {
+	status = "okay";
+};
+
+&cryptobam {
+	status = "okay";
+};
+
+&crypto {
+	status = "okay";
+};
+
+&ssphy_0 {
+	status = "okay";
+};
+
+&qusb_phy_0 {
+	status = "okay";
+};
+
+&ssphy_1 {
+	status = "okay";
+};
+
+&qusb_phy_1 {
+	status = "okay";
+};
+
+&usb_0 {
+	status = "okay";
+};
+
+&usb_1 {
+	status = "okay";
+};
+
+&qpic_bam {
+	status = "okay";
+};
+
+&qpic_nand {
+	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "0:sbl1";
+				reg = <0x0 0x60000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "0:mibib";
+				reg = <0x00060000 0x40000>;
+				read-only;
+			};
+
+			partition@a0000 {
+				label = "0:qsee";
+				reg = <0x000a0000 0x1e0000>;
+				read-only;
+			};
+
+			partition@280000 {
+				label = "0:devcfg";
+				reg = <0x00280000 0x20000>;
+				read-only;
+			};
+
+			partition@2a0000 {
+				label = "0:apdp";
+				reg = <0x002a0000 0x20000>;
+				read-only;
+			};
+
+			partition@2c0000 {
+				label = "0:rpm";
+				reg = <0x002c0000 0x40000>;
+				read-only;
+			};
+
+			partition@300000 {
+				label = "0:cdt";
+				reg = <0x00300000 0x20000>;
+				read-only;
+			};
+
+			partition@320000 {
+				label = "0:appsbl";
+				reg = <0x00320000 0xc0000>;
+				read-only;
+			};
+
+			partition@3e0000 {
+				label = "0:appsblenv";
+				reg = <0x003e0000 0x20000>;
+			};
+
+			partition@400000 {
+				compatible = "linux,ubi";
+				label = "UBI_DEV";
+				reg = <0x00400000 0xfc00000>;
+			};
+		};
+	};
+};
+
+&blsp1_i2c2 {
+	status = "okay";
+};
+
+&mdio {
+	status = "okay";
+
+	pinctrl-0 = <&mdio_pins>;
+	pinctrl-names = "default";
+	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+
+	qca8337_0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+	};
+
+	qca8337_1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x1>;
+	};
+
+	qca8337_2: ethernet-phy@2 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x2>;
+	};
+
+	qca8337_3: ethernet-phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x3>;
+	};
+
+	qca8337_4: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x4>;
+	};
+
+	/*
+	 * Vendor bootloader has path for ethernet-phy@5 hardcoded
+	 * and if its there it will delete the node, but since we
+	 * need the QCA8035 for DSA lets fool the bootloader by using
+	 * ethernet-phy@05 even though it causes DTC to print a warning.
+	 */
+	qca8035: ethernet-phy@05 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x5>;
+	};
+
+	qca8033: ethernet-phy@6 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x6>;
+	};
+
+	ethernet-phy-package@8 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "qcom,qca8075-package";
+		reg = <8>;
+
+		qcom,package-mode = "qsgmii";
+
+		qca8075_8: ethernet-phy@8 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0x8>;
+		};
+
+		qca8075_9: ethernet-phy@9 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0x9>;
+		};
+
+		qca8075_a: ethernet-phy@a {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0xa>;
+		};
+
+		qca8075_b: ethernet-phy@b {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0xb>;
+		};
+	};
+
+	qca8337: switch@10 {
+		compatible = "qca,qca8337";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x10>;
+
+		ports {
+			port@0 {
+				reg = <0>;
+				label = "cpu";
+				ethernet = <&dp1>;
+				phy-mode = "rgmii-rxid";
+				phy-handle = <&qca8035>;
+			};
+
+			port@1 {
+				reg = <1>;
+				label = "lan7";
+				phy-handle = <&qca8337_0>;
+			};
+
+			port@2 {
+				reg = <2>;
+				label = "lan6";
+				phy-handle = <&qca8337_1>;
+			};
+
+			port@3 {
+				reg = <3>;
+				label = "lan5";
+				phy-handle = <&qca8337_2>;
+			};
+
+			port@4 {
+				reg = <4>;
+				label = "lan4";
+				phy-handle = <&qca8337_3>;
+			};
+
+			port@5 {
+				reg = <5>;
+				label = "lan3";
+				phy-handle = <&qca8337_4>;
+			};
+
+			port@6 {
+				reg = <6>;
+				label = "lan8";
+				phy-mode = "sgmii";
+				phy-handle = <&qca8033>;
+				managed = "in-band-status";
+				qca,sgmii-enable-pll;
+			};
+		};
+	};
+};
+
+&soc {
+	/*
+	 * This is techically incorrect and will cause a DTC warning as
+	 * all nodes under a bus are supposed to have addresses as well
+	 * but its required as bootloader has this path hardcoded in
+	 * order to enable AQR113C on newer revisions.
+	 */
+	mdio1: mdio1 {
+		compatible = "virtual,mdio-gpio";
+		pinctrl-0 = <&mdio_gpio_pins>;
+		pinctrl-names = "default";
+		gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>,
+			<&tlmm 54 GPIO_ACTIVE_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/*
+		 * PCB R5.00, AQR113C
+		 * No idea why the bitbanged this one.
+		 * @5 is wrong, but their bootloader has it hardcoded in
+		 * order to dynamically enable the PHY for newer HW.
+		 */
+		aqr113c: ethernet-phy@5 {
+			status = "disabled";
+			compatible ="ethernet-phy-ieee802.3-c45";
+			reg = <8>;
+		};
+	};
+};
+
+&switch {
+	status = "okay";
+
+	pinctrl-0 = <&uniphy_pins>;
+	pinctrl-names = "default";
+
+	switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT5 | ESS_PORT6)>; /* lan port bitmap */
+	switch_wan_bmp = <ESS_PORT4>; /* wan port bitmap */
+	switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
+	switch_mac_mode1 = <MAC_MODE_10GBASE_R>; /* mac mode for uniphy instance1*/
+	switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
+
+	qcom,port_phyinfo {
+		port@0 {
+			port_id = <1>;
+			phy_address = <0x8>;
+		};
+		port@1 {
+			port_id = <2>;
+			phy_address = <0x9>;
+		};
+		port@2 {
+			port_id = <3>;
+			phy_address = <0xa>;
+		};
+		port@3 {
+			port_id = <4>;
+			phy_address = <0xb>;
+		};
+
+		sfp: port@4 {
+			port_id = <5>;
+			phy_address = <30>;
+			phy_i2c_address = <30>;
+			phy-i2c-mode; /*i2c access phy */
+			media-type = "sfp"; /* fiber mode */
+			sfp_tx_dis_pin = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+			sfp_mod_present_pin = <&tlmm 46 GPIO_ACTIVE_LOW>;
+		};
+
+		/* PCB R5.00, AQR113C */
+		port@5_113c {
+			status = "disabled";
+			port_id = <6>;
+			phy_address = <8>;
+			ethernet-phy-ieee802.3-c45;
+			mdiobus = <&mdio1>;
+		};
+	};
+};
+
+&edma {
+	status = "okay";
+};
+
+&dp1 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_8>;
+	label = "switch";
+};
+
+&dp2 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_9>;
+	label = "lan2";
+};
+
+&dp3 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_a>;
+	label = "lan1";
+};
+
+&dp4 {
+	status = "okay";
+	phy-mode = "qsgmii";
+	phy-handle = <&qca8075_b>;
+	label = "wan";
+};
+
+&dp5_syn {
+	status = "okay";
+	phy-handle = <&sfp>;
+	label = "10g-sfp";
+};
+
+&dp6_syn {
+	status = "okay";
+	phy-handle = <&aqr113c>;
+	label = "10g-copper";
+};
+
+&wifi {
+	status = "okay";
+	qcom,ath11k-calibration-variant = "Asus-RT-AX89X";
+};
diff --git a/target/linux/qualcommax/image/ipq60xx.mk b/target/linux/qualcommax/image/ipq60xx.mk
index 79822ceb01..41cfd164ee 100644
--- a/target/linux/qualcommax/image/ipq60xx.mk
+++ b/target/linux/qualcommax/image/ipq60xx.mk
@@ -11,6 +11,19 @@ define Device/8devices_mango-dvk
 endef
 TARGET_DEVICES += 8devices_mango-dvk
 
+define Device/cambiumnetworks_xe3-4
+       $(call Device/FitImage)
+       $(call Device/UbiFit)
+       DEVICE_VENDOR := Cambium Networks
+       DEVICE_MODEL := XE3-4
+       BLOCKSIZE := 128k
+       PAGESIZE := 2048
+       DEVICE_DTS_CONFIG := config@cp01-c3-xv3-4
+       SOC := ipq6010
+       DEVICE_PACKAGES := ipq-wifi-cambiumnetworks_xe34 ath11k-firmware-qcn9074 kmod-ath11k-pci
+endef
+TARGET_DEVICES += cambiumnetworks_xe3-4
+
 define Device/netgear_wax214
        $(call Device/FitImage)
        $(call Device/UbiFit)
diff --git a/target/linux/qualcommax/image/ipq807x.mk b/target/linux/qualcommax/image/ipq807x.mk
index d75cf3dd3c..8caa6a322c 100644
--- a/target/linux/qualcommax/image/ipq807x.mk
+++ b/target/linux/qualcommax/image/ipq807x.mk
@@ -1,3 +1,26 @@
+define Build/asus-fake-ramdisk
+	rm -rf $(KDIR)/tmp/fakerd
+	dd if=/dev/zero bs=32 count=1 > $(KDIR)/tmp/fakerd
+	$(info KERNEL_INITRAMFS is $(KERNEL_INITRAMFS))
+endef
+
+define Build/asus-fake-rootfs
+	$(eval comp=$(word 1,$(1)))
+	$(eval filepath=$(word 2,$(1)))
+	$(eval filecont=$(word 3,$(1)))
+	rm -rf $(KDIR)/tmp/fakefs $(KDIR)/tmp/fakehsqs
+	mkdir -p $(KDIR)/tmp/fakefs/$$(dirname $(filepath))
+	echo '$(filecont)' > $(KDIR)/tmp/fakefs/$(filepath)
+	$(STAGING_DIR_HOST)/bin/mksquashfs4 $(KDIR)/tmp/fakefs $(KDIR)/tmp/fakehsqs -comp $(comp) \
+		-b 4096 -no-exports -no-sparse -no-xattrs -all-root -noappend \
+		$(wordlist 4,$(words $(1)),$(1))
+endef
+
+define Build/asus-trx
+	$(STAGING_DIR_HOST)/bin/asusuimage $(wordlist 1,$(words $(1)),$(1)) -i $@ -o $@.new
+	mv $@.new $@
+endef
+
 define Build/wax6xx-netgear-tar
 	mkdir $@.tmp
 	mv $@ $@.tmp/nand-ipq807x-apps.img
@@ -22,6 +45,34 @@ define Device/arcadyan_aw1000
 endef
 TARGET_DEVICES += arcadyan_aw1000
 
+define Device/asus_rt-ax89x
+       DEVICE_VENDOR := Asus
+	DEVICE_MODEL := RT-AX89X
+	BLOCKSIZE := 128k
+	PAGESIZE := 2048
+	DEVICE_DTS_CONFIG := config@hk01
+	SOC := ipq8074
+	DEVICE_PACKAGES := kmod-hwmon-gpiofan ipq-wifi-asus_rt-ax89x
+	KERNEL_NAME := vmlinux
+	KERNEL := kernel-bin | libdeflate-gzip
+	KERNEL_IN_UBI := 1
+	IMAGE/sysupgrade.bin/squashfs := \
+		append-kernel | asus-fake-ramdisk |\
+		multiImage gzip $$(KDIR)/tmp/fakerd $$(KDIR)/image-$$(DEVICE_DTS).dtb |\
+		sysupgrade-tar kernel=$$$$@ | append-metadata
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+	ARTIFACTS := initramfs-factory.trx initramfs-uImage.itb
+	ARTIFACT/initramfs-uImage.itb := \
+		append-image-stage initramfs-kernel.bin | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
+	ARTIFACT/initramfs-factory.trx := \
+		append-image-stage initramfs-kernel.bin |\
+		asus-fake-rootfs xz /lib/firmware/IPQ8074A/fw_version.txt "fake" -no-compression |\
+		multiImage gzip $$(KDIR)/tmp/fakehsqs $$(KDIR)/image-$$(DEVICE_DTS).dtb |\
+		asus-trx -v 2 -n RT-AX89U -b 388 -e 49000
+endif
+endef
+TARGET_DEVICES += asus_rt-ax89x
+
 define Device/buffalo_wxr-5950ax12
 	$(call Device/FitImage)
 	DEVICE_VENDOR := Buffalo
@@ -162,10 +213,12 @@ define Device/netgear_rax120v2
 	NETGEAR_HW_ID := 29765589+0+512+1024+4x4+8x8
 	DEVICE_PACKAGES := ipq-wifi-netgear_rax120v2 kmod-spi-gpio \
 		kmod-spi-bitbang kmod-gpio-nxp-74hc164 kmod-hwmon-g762
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
 	IMAGES += web-ui-factory.img
 	IMAGE/web-ui-factory.img := append-image initramfs-uImage.itb | \
 		pad-offset $$$$(BLOCKSIZE) 64 | append-uImage-fakehdr filesystem | \
 		netgear-dni
+endif
 	IMAGE/sysupgrade.bin := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | \
 		append-uImage-fakehdr filesystem | sysupgrade-tar kernel=$$$$@ | \
 		append-metadata
diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network
index f5fd35cf44..86d55de7b8 100644
--- a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network
+++ b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network
@@ -14,6 +14,9 @@ ipq60xx_setup_interfaces()
 	8devices,mango-dvk)
 		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
 		;;
+	cambiumnetworks,xe3-4)
+		ucidef_set_interface_lan "lan1 lan2" "dhcp"
+		;;
 	netgear,wax214)
 		ucidef_set_interfaces_lan_wan "lan"
 		;;
diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata
index 23a3da0b4b..cc2de7514e 100644
--- a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata
+++ b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11-caldata
@@ -12,6 +12,9 @@ case "$FIRMWARE" in
 	8devices,mango-dvk)
 		caldata_extract "0:ART" 0x1000 0x20000
 		;;
+	cambiumnetworks,xe3-4)
+		caldata_extract "0:ART" 0x1000 0x10000
+		;;
 	netgear,wax214)
 		caldata_extract "0:art" 0x1000 0x10000
 		;;
@@ -20,6 +23,13 @@ case "$FIRMWARE" in
 		;;
 	esac
 	;;
+"ath11k/QCN9074/hw1.0/cal-pci-0000:01:00.0.bin")
+	case "$board" in
+	cambiumnetworks,xe3-4)
+		caldata_extract "0:ART" 0x26800 0x20000
+		;;
+	esac
+	;;
 *)
 	exit 1
 	;;
diff --git a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh
index a8e4872cdd..cbc6292978 100644
--- a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh
@@ -33,6 +33,10 @@ EOF
 
 platform_do_upgrade() {
 	case "$(board_name)" in
+	cambiumnetworks,xe3-4)
+		fw_setenv bootcount 0
+		nand_do_upgrade "$1"
+		;;
 	netgear,wax214)
 		nand_do_upgrade "$1"
 		;;
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
index 23d87f1b2d..b5c3cbc736 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
@@ -11,6 +11,11 @@ arcadyan,aw1000)
 	ucidef_set_led_netdev "wan" "WAN" "green:internet" "wan"
 	ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "90000.mdio-1:1c:green:wan" "wan" "tx rx link_10 link_100 link_1000 link_2500"
 	;;
+asus,rt-ax89x)
+	ucidef_set_led_netdev "aqr" "AQR" "white:aqr10g" "10g-copper"
+	ucidef_set_led_netdev "sfp" "SFP" "white:sfp" "10g-sfp"
+	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
+	;;
 dynalink,dl-wrx36)
 	ucidef_set_led_netdev "wan-port-link-green" "WAN-PORT-LINK-GREEN" "90000.mdio-1:1c:green:wan" "wan" "link_2500"
 	ucidef_set_led_netdev "wan-port-link-yellow" "WAN-PORT-LINK-YELLOW" "90000.mdio-1:1c:yellow:wan" "wan" "tx rx link_10 link_100 link_1000"
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
index 0bf224f380..f87dbdd2be 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
@@ -11,6 +11,9 @@ ipq807x_setup_interfaces()
 	local board="$1"
 
 	case "$board" in
+	asus,rt-ax89x)
+		ucidef_set_interfaces_lan_wan "10g-sfp 10g-copper lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8" "wan"
+		;;
 	arcadyan,aw1000|\
 	buffalo,wxr-5950ax12|\
 	dynalink,dl-wrx36|\
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata b/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
index 1170a35413..e413801ef9 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
@@ -9,6 +9,10 @@ board=$(board_name)
 case "$FIRMWARE" in
 "ath11k/IPQ8074/hw2.0/cal-ahb-c000000.wifi.bin")
 	case "$board" in
+	asus,rt-ax89x)
+		CI_UBIPART="UBI_DEV"
+		caldata_extract_ubi "Factory" 0x1000 0x20000
+		;;
 	arcadyan,aw1000|\
 	buffalo,wxr-5950ax12|\
 	cmcc,rm2-6|\
diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
index 5d89554133..f78a4b04f1 100644
--- a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
@@ -27,12 +27,23 @@ xiaomi_initramfs_prepare() {
 	ubiformat /dev/mtd$kern_mtdnum -y
 }
 
+asus_initial_setup() {
+	# Remove existing linux and jffs2 volumes
+	[ "$(rootfs_type)" = "tmpfs" ] || return 0
+
+	ubirmvol /dev/ubi0 -N linux
+	ubirmvol /dev/ubi0 -N jffs2
+}
+
 platform_check_image() {
 	return 0;
 }
 
 platform_pre_upgrade() {
 	case "$(board_name)" in
+	asus,rt-ax89x)
+		asus_initial_setup
+		;;
 	redmi,ax6|\
 	xiaomi,ax3600|\
 	xiaomi,ax9000)
@@ -56,6 +67,12 @@ platform_do_upgrade() {
 	netgear,wax630)
 		nand_do_upgrade "$1"
 		;;
+	asus,rt-ax89x)
+		CI_UBIPART="UBI_DEV"
+		CI_KERNPART="linux"
+		CI_ROOTPART="jffs2"
+		nand_do_upgrade "$1"
+		;;
 	buffalo,wxr-5950ax12)
 		CI_KERN_UBIPART="rootfs"
 		CI_ROOT_UBIPART="user_property"
diff --git a/target/linux/qualcommax/ipq807x/config-default b/target/linux/qualcommax/ipq807x/config-default
index 18483d05b4..f4942c32cc 100644
--- a/target/linux/qualcommax/ipq807x/config-default
+++ b/target/linux/qualcommax/ipq807x/config-default
@@ -1,15 +1,24 @@
 CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
 CONFIG_DT_IDLE_GENPD=y
+CONFIG_GRO_CELLS=y
 CONFIG_IPQ_GCC_8074=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_GPIO=y
 # CONFIG_MFD_HI6421_SPMI is not set
 CONFIG_MFD_SPMI_PMIC=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_QCA8K=y
+CONFIG_NET_DSA_TAG_QCA=y
 # CONFIG_NVMEM_SPMI_SDAM is not set
+CONFIG_PHYLINK=y
 CONFIG_PINCTRL_IPQ8074=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
 # CONFIG_PM8916_WATCHDOG is not set
 CONFIG_PM_GENERIC_DOMAINS=y
 CONFIG_PM_GENERIC_DOMAINS_OF=y
 # CONFIG_POWER_RESET_QCOM_PON is not set
+CONFIG_QCA83XX_PHY=y
 CONFIG_QCOM_APM=y
 # CONFIG_QCOM_COINCELL is not set
 CONFIG_QCOM_GDSC=y
@@ -23,6 +32,7 @@ CONFIG_REGULATOR_CPR4_APSS=y
 # CONFIG_REGULATOR_QCOM_LABIBB is not set
 CONFIG_REGULATOR_QCOM_SPMI=y
 # CONFIG_REGULATOR_QCOM_USB_VBUS is not set
+CONFIG_REGULATOR_USERSPACE_CONSUMER=y
 CONFIG_RTC_DRV_PM8XXX=y
 CONFIG_SPMI=y
 # CONFIG_SPMI_HISI3670 is not set
diff --git a/target/linux/qualcommax/patches-6.6/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch b/target/linux/qualcommax/patches-6.6/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch
index 6b305cc282..95c6c9505d 100644
--- a/target/linux/qualcommax/patches-6.6/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch
+++ b/target/linux/qualcommax/patches-6.6/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch
@@ -44,7 +44,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
  struct qcom_cpufreq_drv;
  
  struct qcom_cpufreq_match_data {
-@@ -203,6 +205,57 @@ len_error:
+@@ -207,6 +209,57 @@ len_error:
  	return ret;
  }
  
@@ -102,7 +102,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
  static const struct qcom_cpufreq_match_data match_data_kryo = {
  	.get_version = qcom_cpufreq_kryo_name_version,
  };
-@@ -217,6 +270,10 @@ static const struct qcom_cpufreq_match_d
+@@ -221,6 +274,10 @@ static const struct qcom_cpufreq_match_d
  	.genpd_names = qcs404_genpd_names,
  };
  
@@ -113,7 +113,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
  static int qcom_cpufreq_probe(struct platform_device *pdev)
  {
  	struct qcom_cpufreq_drv *drv;
-@@ -359,6 +416,7 @@ static const struct of_device_id qcom_cp
+@@ -353,6 +410,7 @@ static const struct of_device_id qcom_cp
  	{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
  	{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
  	{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
diff --git a/target/linux/qualcommax/patches-6.6/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch b/target/linux/qualcommax/patches-6.6/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch
index 8ff3b5f9b1..5640038404 100644
--- a/target/linux/qualcommax/patches-6.6/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch
+++ b/target/linux/qualcommax/patches-6.6/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch
@@ -47,7 +47,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
  struct qcom_cpufreq_drv;
  
  struct qcom_cpufreq_match_data {
-@@ -256,6 +261,44 @@ static int qcom_cpufreq_ipq6018_name_ver
+@@ -260,6 +265,44 @@ static int qcom_cpufreq_ipq6018_name_ver
  	return 0;
  }
  
@@ -92,7 +92,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
  static const struct qcom_cpufreq_match_data match_data_kryo = {
  	.get_version = qcom_cpufreq_kryo_name_version,
  };
-@@ -274,6 +317,10 @@ static const struct qcom_cpufreq_match_d
+@@ -278,6 +321,10 @@ static const struct qcom_cpufreq_match_d
  	.get_version = qcom_cpufreq_ipq6018_name_version,
  };
  
@@ -103,7 +103,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
  static int qcom_cpufreq_probe(struct platform_device *pdev)
  {
  	struct qcom_cpufreq_drv *drv;
-@@ -418,6 +465,7 @@ static const struct of_device_id qcom_cp
+@@ -412,6 +459,7 @@ static const struct of_device_id qcom_cp
  	{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
  	{ .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 },
  	{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
diff --git a/target/linux/qualcommax/patches-6.6/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch b/target/linux/qualcommax/patches-6.6/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch
index 7607bdad8b..6b7dd2f261 100644
--- a/target/linux/qualcommax/patches-6.6/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch
+++ b/target/linux/qualcommax/patches-6.6/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch
@@ -19,7 +19,7 @@ Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
 
 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -721,8 +721,8 @@
+@@ -723,8 +723,8 @@
  			compatible = "qcom,ipq8074-apcs-apps-global",
  				     "qcom,ipq6018-apcs-apps-global";
  			reg = <0x0b111000 0x1000>;
diff --git a/target/linux/qualcommax/patches-6.6/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch b/target/linux/qualcommax/patches-6.6/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch
index 3239404977..d407b9c5c4 100644
--- a/target/linux/qualcommax/patches-6.6/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch
+++ b/target/linux/qualcommax/patches-6.6/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch
@@ -22,7 +22,7 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -619,8 +619,8 @@
+@@ -620,8 +620,8 @@
  			compatible = "qcom,ipq6018-apcs-apps-global";
  			reg = <0x0 0x0b111000 0x0 0x1000>;
  			#clock-cells = <1>;
diff --git a/target/linux/qualcommax/patches-6.6/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch b/target/linux/qualcommax/patches-6.6/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch
index 8eb3915057..6559f3bbe9 100644
--- a/target/linux/qualcommax/patches-6.6/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch
+++ b/target/linux/qualcommax/patches-6.6/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch
@@ -79,7 +79,7 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  			power-domains = <&gcc USB0_GDSC>;
  
  			resets = <&gcc GCC_USB0_BCR>;
-@@ -674,6 +681,13 @@
+@@ -675,6 +682,13 @@
  						<133330000>,
  						<19200000>;
  
diff --git a/target/linux/qualcommax/patches-6.6/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch b/target/linux/qualcommax/patches-6.6/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch
index b8b623c8bc..7e8c84558e 100644
--- a/target/linux/qualcommax/patches-6.6/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch
+++ b/target/linux/qualcommax/patches-6.6/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch
@@ -55,7 +55,7 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  		};
  
  		L2_0: l2-cache {
-@@ -889,6 +894,122 @@
+@@ -890,6 +895,122 @@
  		};
  	};
  
diff --git a/target/linux/qualcommax/patches-6.6/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch b/target/linux/qualcommax/patches-6.6/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
index dc009cd414..fdf7f84b92 100644
--- a/target/linux/qualcommax/patches-6.6/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
+++ b/target/linux/qualcommax/patches-6.6/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
@@ -12,7 +12,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -755,7 +755,7 @@
+@@ -757,7 +757,7 @@
  			reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
  			ranges = <0 0xb00a000 0xffd>;
  
@@ -21,7 +21,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  				compatible = "arm,gic-v2m-frame";
  				msi-controller;
  				reg = <0x0 0xffd>;
-@@ -868,8 +868,7 @@
+@@ -870,8 +870,7 @@
  			ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>,   /* I/O */
  				 <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
  
@@ -31,7 +31,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  			#interrupt-cells = <1>;
  			interrupt-map-mask = <0 0 0 0x7>;
  			interrupt-map = <0 0 0 1 &intc 0 0 142
-@@ -930,8 +929,7 @@
+@@ -932,8 +931,7 @@
  			ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>,   /* I/O */
  				 <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
  
diff --git a/target/linux/qualcommax/patches-6.6/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch b/target/linux/qualcommax/patches-6.6/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
index 2ea9bcb9fc..07f5144108 100644
--- a/target/linux/qualcommax/patches-6.6/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
+++ b/target/linux/qualcommax/patches-6.6/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
@@ -61,7 +61,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  		spmi_bus: spmi@200f000 {
  			compatible = "qcom,spmi-pmic-arb";
  			reg = <0x0200f000 0x001000>,
-@@ -970,6 +1001,56 @@
+@@ -972,6 +1003,56 @@
  				      "axi_s_sticky";
  			status = "disabled";
  		};
diff --git a/target/linux/qualcommax/patches-6.6/0121-arm64-dts-ipq8074-Add-WLAN-node.patch b/target/linux/qualcommax/patches-6.6/0121-arm64-dts-ipq8074-Add-WLAN-node.patch
index 627b0711b7..ef34c50eca 100644
--- a/target/linux/qualcommax/patches-6.6/0121-arm64-dts-ipq8074-Add-WLAN-node.patch
+++ b/target/linux/qualcommax/patches-6.6/0121-arm64-dts-ipq8074-Add-WLAN-node.patch
@@ -15,7 +15,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -1051,6 +1051,117 @@
+@@ -1053,6 +1053,117 @@
  				};
  			};
  		};
diff --git a/target/linux/qualcommax/patches-6.6/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch b/target/linux/qualcommax/patches-6.6/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch
index 3e040cd2fd..f4968f1a4d 100644
--- a/target/linux/qualcommax/patches-6.6/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch
+++ b/target/linux/qualcommax/patches-6.6/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch
@@ -15,7 +15,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -808,6 +808,102 @@
+@@ -809,6 +809,102 @@
  			};
  		};
  
diff --git a/target/linux/qualcommax/patches-6.6/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch b/target/linux/qualcommax/patches-6.6/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch
index d1bca14063..094442a59b 100644
--- a/target/linux/qualcommax/patches-6.6/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch
+++ b/target/linux/qualcommax/patches-6.6/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch
@@ -15,7 +15,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -1156,6 +1156,7 @@
+@@ -1157,6 +1157,7 @@
  
  		wcss_smp2p_out: master-kernel {
  			qcom,entry-name = "master-kernel";
diff --git a/target/linux/qualcommax/patches-6.6/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch b/target/linux/qualcommax/patches-6.6/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch
index 3e0ac68f2b..a0528e7f50 100644
--- a/target/linux/qualcommax/patches-6.6/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch
+++ b/target/linux/qualcommax/patches-6.6/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch
@@ -13,7 +13,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -929,8 +929,8 @@
+@@ -930,8 +930,8 @@
  				      "wcss_reset",
  				      "wcss_q6_reset";
  
diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index a0429ade45..0e925b4dcc 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -32,6 +32,35 @@
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
+	mmc_clk: mmc-clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <48000000>;
+		clock-accuracy = <100>;
+	};
+
+	mmc_reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+
+		enable-active-high;
+
+		regulator-always-on;
+		regulator-max-microvolt = <1800000>;
+		regulator-min-microvolt = <1800000>;
+		regulator-name = "mmc_io";
+	};
+
+	mmc_reg_3v3: regulator-3v3 {
+		compatible = "regulator-fixed";
+
+		enable-active-high;
+
+		regulator-always-on;
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-name = "mmc_power";
+	};
+
 	palmbus: palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
@@ -493,15 +522,34 @@
 		interrupts = <17>;
 	};
 
-	sdhci: sdhci@10130000 {
-		compatible = "ralink,mt7620-sdhci";
+	sdhci: mmc@10130000 {
+		compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
 		reg = <0x10130000 0x4000>;
 
+		bus-width = <4>;
+
+		cap-mmc-highspeed;
+		cap-sd-highspeed;
+
+		clocks = <&mmc_clk>, <&mmc_clk>;
+		clock-names = "source", "hclk";
+
+		disable-wp;
+
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
-		pinctrl-names = "default";
+		max-frequency = <48000000>;
+
+		pinctrl-names = "default", "state_uhs";
 		pinctrl-0 = <&sdhci_pins>;
+		pinctrl-1 = <&sdhci_pins>;
+
+		resets = <&sysc 30>;
+		reset-names = "hrst";
+
+		vmmc-supply = <&mmc_reg_3v3>;
+		vqmmc-supply = <&mmc_reg_1v8>;
 
 		status = "disabled";
 	};
diff --git a/target/linux/ramips/dts/mt7620a_bolt_bl100.dts b/target/linux/ramips/dts/mt7620a_bolt_bl100.dts
index e4bc6e211b..cb1f3b8055 100644
--- a/target/linux/ramips/dts/mt7620a_bolt_bl100.dts
+++ b/target/linux/ramips/dts/mt7620a_bolt_bl100.dts
@@ -145,7 +145,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts b/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
index 7ea288615c..6ed3063ecb 100644
--- a/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
+++ b/target/linux/ramips/dts/mt7620a_dlink_dch-m225.dts
@@ -101,7 +101,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts b/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts
index 978de470f0..645030b5bb 100644
--- a/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts
+++ b/target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts
@@ -97,7 +97,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7620a_domywifi.dtsi b/target/linux/ramips/dts/mt7620a_domywifi.dtsi
index e2bd8e103b..844c1a4ee4 100644
--- a/target/linux/ramips/dts/mt7620a_domywifi.dtsi
+++ b/target/linux/ramips/dts/mt7620a_domywifi.dtsi
@@ -95,7 +95,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts b/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
index 83e5698d63..29aff9958a 100644
--- a/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
+++ b/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
@@ -51,12 +51,6 @@
 			gpio-export,output = <0>;
 			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		};
-
-		sdpower {
-			gpio-export,name = "sdpower";
-			gpio-export,output = <0>;
-			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
-		};
 	};
 };
 
@@ -94,6 +88,12 @@
 	mediatek,ephy-base = /bits/ 8 <12>;
 };
 
+&mmc_reg_3v3 {
+	/delete-property/ enable-active-high;
+
+	gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+};
+
 &pcie {
 	status = "okay";
 };
@@ -108,6 +108,10 @@
 	};
 };
 
+&sdhci {
+	max-frequency = <24000000>;
+};
+
 &wmac {
 	pinctrl-names = "default", "pa_gpio";
 	pinctrl-0 = <&pa_pins>;
diff --git a/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi b/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
index 7fcd68e6ba..6a602b8411 100644
--- a/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
+++ b/target/linux/ramips/dts/mt7620a_hiwifi_hc5x61.dtsi
@@ -31,7 +31,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_iodata_wn-ac733gr3.dts b/target/linux/ramips/dts/mt7620a_iodata_wn-ac733gr3.dts
index d95a4ad99d..19b1538241 100644
--- a/target/linux/ramips/dts/mt7620a_iodata_wn-ac733gr3.dts
+++ b/target/linux/ramips/dts/mt7620a_iodata_wn-ac733gr3.dts
@@ -77,7 +77,7 @@
 		compatible = "realtek,rtl8367b";
 		gpio-sda = <&gpio0 22 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio0 23 GPIO_ACTIVE_HIGH>;
-		realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <6 1 0 1 1 1 1 1 1 2>;
 	};
 };
 
diff --git a/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts b/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts
index 2e112c7179..439ad2a118 100644
--- a/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts
+++ b/target/linux/ramips/dts/mt7620a_netcore_nw5212.dts
@@ -75,7 +75,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi b/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi
index 4faa45933f..ce53781e60 100644
--- a/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi
+++ b/target/linux/ramips/dts/mt7620a_phicomm_k2x.dtsi
@@ -52,7 +52,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions: partitions {
diff --git a/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts b/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts
index c5c4d01835..b032cd9d4f 100644
--- a/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts
+++ b/target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts
@@ -55,7 +55,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi b/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi
index 8c565385e8..cedefe3c5e 100644
--- a/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi
+++ b/target/linux/ramips/dts/mt7620a_sercomm_cpj.dtsi
@@ -158,7 +158,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts
index 06f3eba37b..feb619a0c0 100644
--- a/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts
+++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts
@@ -55,7 +55,7 @@
 
 	rtl8367rb {
 		compatible = "realtek,rtl8367b";
-		realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <6 1 0 1 1 1 1 1 1 2>;
 		mii-bus = <&mdio0>;
 	};
 };
diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts
index 855e06e9f6..91b3a255c1 100644
--- a/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts
+++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts
@@ -74,7 +74,7 @@
 
 	rtl8367s {
 		compatible = "realtek,rtl8367b";
-		realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <7 1 0 1 1 1 1 1 1 2>;
 		mii-bus = <&mdio0>;
 		phy-id = <29>;
 	};
diff --git a/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts b/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts
index 7fc075aedd..a39455cf29 100644
--- a/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts
+++ b/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts
@@ -82,7 +82,7 @@
 
 	rtl8367s {
 		compatible = "realtek,rtl8367b";
-		realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <7 1 0 1 1 1 1 1 1 2>;
 		mii-bus = <&mdio0>;
 		phy-id = <29>;
 	};
diff --git a/target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts b/target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts
new file mode 100644
index 0000000000..1a12005c92
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620a_wavlink_wl-wn531g3-a2.dts
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "mt7620a.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "wavlink,wl-wn531g3", "ralink,mt7620a-soc";
+	model = "Wavlink WL-WN531G3";
+
+	aliases {
+		led-boot = &led_status_blue;
+		led-failsafe = &led_status_red;
+		led-running = &led_status_blue;
+		led-upgrade = &led_status_red;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		turbo {
+			label = "turbo";
+			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		touchlink {
+			label = "touchlink";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_blue: led_status_blue {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_BLUE>;
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_status_red: led_status_red {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_factory_28: macaddr@28 {
+						reg = <0x28 0x6>;
+					};
+
+					macaddr_factory_2e: macaddr@2e {
+						reg = <0x2e 0x6>;
+					};
+
+					eeprom_radio_0: eeprom@0 {
+						reg = <0x0 0x200>;
+					};
+
+					eeprom_radio_8000: eeprom@8000 {
+						reg = <0x8000 0x200>;
+					};
+				};
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins>, <&rgmii2_pins>, <&mdio_pins>;
+
+	nvmem-cells = <&macaddr_factory_28>;
+	nvmem-cell-names = "mac-address";
+
+	mediatek,portmap = "llllw";
+
+	port@4 {
+		status = "okay";
+		phy-handle = <&phy4>;
+		phy-mode = "rgmii";
+
+		nvmem-cells = <&macaddr_factory_2e>;
+		nvmem-cell-names = "mac-address";
+	};
+
+	port@5 {
+		status = "okay";
+		phy-handle = <&phy5>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy4: ethernet-phy@4 {
+			reg = <4>;
+			phy-mode = "rgmii";
+		};
+
+		phy5: ethernet-phy@5 {
+			reg = <5>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_radio_8000>;
+		nvmem-cell-names = "eeprom";
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&gsw {
+	mediatek,port4-gmac;
+};
+
+&wmac {
+	nvmem-cells = <&eeprom_radio_0>;
+	nvmem-cell-names = "eeprom";
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "uartf";
+		function = "gpio";
+	};
+};
diff --git a/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts b/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
index c0141b196d..41221891f7 100644
--- a/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
+++ b/target/linux/ramips/dts/mt7620a_xiaomi_miwifi-mini.dts
@@ -83,7 +83,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi
index 2f9920fc45..2ddb0d8408 100644
--- a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi
+++ b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi
@@ -63,7 +63,7 @@
 	flash0: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7620a_zyxel_keenetic-viva.dts b/target/linux/ramips/dts/mt7620a_zyxel_keenetic-viva.dts
index 0630e8a160..d095b45630 100644
--- a/target/linux/ramips/dts/mt7620a_zyxel_keenetic-viva.dts
+++ b/target/linux/ramips/dts/mt7620a_zyxel_keenetic-viva.dts
@@ -85,7 +85,7 @@
 
 	rtl8367rb {
 		compatible = "realtek,rtl8367b";
-		realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <7 1 0 1 1 1 1 1 1 2>;
 		mii-bus = <&mdio0>;
 	};
 };
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index 54fe13123d..da992bada4 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -42,6 +42,28 @@
 		bootargs = "console=ttyS0,57600";
 	};
 
+	mmc_reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+
+		enable-active-high;
+
+		regulator-always-on;
+		regulator-max-microvolt = <1800000>;
+		regulator-min-microvolt = <1800000>;
+		regulator-name = "mmc_io";
+	};
+
+	mmc_reg_3v3: regulator-3v3 {
+		compatible = "regulator-fixed";
+
+		enable-active-high;
+
+		regulator-always-on;
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-name = "mmc_power";
+	};
+
 	palmbus: palmbus@1e000000 {
 		compatible = "palmbus";
 		reg = <0x1e000000 0x100000>;
@@ -326,17 +348,36 @@
 		};
 	};
 
-	sdhci: sdhci@1e130000 {
-		status = "disabled";
-
-		compatible = "ralink,mt7620-sdhci";
+	sdhci: mmc@1e130000 {
+		compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
 		reg = <0x1e130000 0x4000>;
 
+		bus-width = <4>;
+
+		cap-mmc-highspeed;
+		cap-sd-highspeed;
+
+		clocks = <&sysc MT7621_CLK_SHXC>, <&sysc MT7621_CLK_SHXC>;
+		clock-names = "source", "hclk";
+
+		disable-wp;
+
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
 
-		pinctrl-names = "default";
+		max-frequency = <48000000>;
+
+		pinctrl-names = "default", "state_uhs";
 		pinctrl-0 = <&sdhci_pins>;
+		pinctrl-1 = <&sdhci_pins>;
+
+		resets = <&sysc MT7621_RST_SDXC>;
+		reset-names = "hrst";
+
+		vmmc-supply = <&mmc_reg_3v3>;
+		vqmmc-supply = <&mmc_reg_1v8>;
+
+		status = "disabled";
 	};
 
 	xhci: xhci@1e1c0000 {
diff --git a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
index 4a5194c363..6895052eb9 100644
--- a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
+++ b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts
@@ -97,7 +97,7 @@
 		compatible = "jedec,spi-nor";
 
 		reg = <0>;
-		spi-max-frequency = <70000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi
index 6bfdffefb7..24869f3d56 100644
--- a/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi
+++ b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi
@@ -68,7 +68,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts b/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts
index 548ab7ba59..f1c593ea83 100644
--- a/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts
+++ b/target/linux/ramips/dts/mt7621_jcg_jhr-ac876m.dts
@@ -65,7 +65,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_jcg_y2.dts b/target/linux/ramips/dts/mt7621_jcg_y2.dts
index 5012bc3d62..555beae04f 100644
--- a/target/linux/ramips/dts/mt7621_jcg_y2.dts
+++ b/target/linux/ramips/dts/mt7621_jcg_y2.dts
@@ -41,7 +41,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts b/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts
new file mode 100644
index 0000000000..5a647d75e8
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_keenetic_kn-3510.dts
@@ -0,0 +1,247 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "keenetic,kn-3510", "mediatek,mt7621-soc";
+	model = "Keenetic KN-3510";
+
+	aliases {
+		led-boot = &led_status_green;
+		led-failsafe = &led_status_green;
+		led-running = &led_status_green;
+		led-upgrade = &led_status_green;
+		label-mac-device = &gmac0;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_WPS;
+			color = <LED_COLOR_ID_AMBER>;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+		};
+
+		led_status_green: led-1 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		fn1 {
+			label = "fn1";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+		devices = <&firmware1 &storage1 &firmware2 &storage2>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "kernel";
+				reg = <0x0 0x400000>;
+			};
+
+			partition@400000 {
+				label = "ubi";
+				reg = <0x400000 0x0>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "jtag";
+		function = "gpio";
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "u-config";
+			reg = <0x80000 0x80000>;
+			read-only;
+		};
+
+		partition@100000 {
+			label = "rf-eeprom";
+			reg = <0x100000 0x80000>;
+			read-only;
+
+			nvmem-layout {
+				compatible = "fixed-layout";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				eeprom_factory_0: eeprom@0 {
+					reg = <0x0 0xe00>;
+				};
+
+				macaddr_factory_4: macaddr@4 {
+					reg = <0x4 0x6>;
+				};
+
+				macaddr_factory_a: macaddr@a {
+					reg = <0xa 0x6>;
+				};
+
+				precal_factory_e10: precal@e10 {
+					reg = <0xe10 0x19c10>;
+				};
+			};
+		};
+
+		firmware1: partition@180000 {
+			label = "firmware_1";
+			reg = <0x180000 0x1a40000>;
+		};
+
+		partition@1bc0000 {
+			label = "config_1";
+			reg = <0x1bc0000 0x20000>;
+			read-only;
+		};
+
+		partition@1dc0000 {
+			label = "storage_legacy";
+			reg = <0x1dc0000 0x20000>;
+			read-only;
+		};
+
+		partition@1fc0000 {
+			label = "dump";
+			reg = <0x1fc0000 0x40000>;
+			read-only;
+		};
+
+		storage1: partition@2000000 {
+			label = "storage_a";
+			reg = <0x2000000 0x1fc0000>;
+		};
+
+		partition@3fc0000 {
+			label = "u-state";
+			reg = <0x3fc0000 0x80000>;
+			read-only;
+		};
+
+		partition@4040000 {
+			label = "u-config_res";
+			reg = <0x4040000 0x80000>;
+			read-only;
+		};
+
+		partition@40c0000 {
+			label = "rf-eeprom_res";
+			reg = <0x40c0000 0x80000>;
+			read-only;
+		};
+
+		firmware2: partition@4140000 {
+			label = "firmware_2";
+			reg = <0x4140000 0x1a40000>;
+		};
+
+		partition@5b80000 {
+			label = "config_2";
+			reg = <0x5d00000 0x20000>;
+			read-only;
+		};
+
+		storage2: partition@5d80000 {
+			label = "storage_b";
+			reg = <0x5d80000 0x2200000>;
+		};
+	};
+};
+
+&ethphy0 {
+	/delete-property/ interrupts;
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&gmac1 {
+	status = "okay";
+	label = "wan";
+	phy-handle = <&ethphy0>;
+
+	nvmem-cells = <&macaddr_factory_a>;
+	nvmem-cell-names = "mac-address";
+};
+
+&switch0 {
+	ports {
+		port@3 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>;
+		nvmem-cell-names = "eeprom", "precal";
+		mediatek,disable-radar-background;
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
index 31f3eb8657..24303ec5b3 100644
--- a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
+++ b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
@@ -166,8 +166,18 @@
 	status = "okay";
 };
 
+&pcie_pins {
+	uart3 {
+		groups = "uart3";
+		function = "gpio";
+	};
+};
+
 &pcie {
 	status = "okay";
+
+	reset-gpios = <&gpio 8 GPIO_ACTIVE_LOW>,
+		      <&gpio 19 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {
diff --git a/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts b/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts
new file mode 100644
index 0000000000..a9597119fa
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_netgear_wax214v2.dts
@@ -0,0 +1,228 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "netgear,wax214v2", "mediatek,mt7621-soc";
+	model = "Netgear WAX214v2";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_amber;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_blue;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_green: power_green {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_blue: power_blue {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_BLUE>;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_amber: power_amber {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_AMBER>;
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		};
+
+		wifin_green {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0radio";
+		};
+
+		wifia_green {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1radio";
+		};
+	};
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "Bootloader";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "Config";
+			reg = <0x80000 0x80000>;
+		};
+
+		partition@100000 {
+			label = "Factory";
+			reg = <0x100000 0x80000>;
+			read-only;
+
+			nvmem-layout {
+				compatible = "fixed-layout";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				eeprom_factory_0: eeprom@0 {
+					reg = <0x0 0xe00>;
+				};
+
+				precal_factory_e10: precal@e10 {
+					reg = <0xe10 0x19c10>;
+				};
+			};
+		};
+
+		partition@180000 {
+			label = "firmware";
+			reg = <0x180000 0x2600000>;
+
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "kernel";
+				reg = <0x0 0x400000>;
+			};
+
+			partition@400000 {
+				label = "ubi";
+				reg = <0x400000 0x2200000>;
+			};
+		};
+
+		partition@2780000 {
+			label = "firmware_backup";
+			reg = <0x2780000 0x2600000>;
+			read-only;
+		};
+
+		partition@4d80000 {
+			label = "CFG";
+			reg = <0x4d80000 0x800000>;
+			read-only;
+		};
+
+		partition@5580000 {
+			label = "RAE";
+			reg = <0x5580000 0x400000>;
+			read-only;
+		};
+
+		partition@5980000 {
+			label = "POT";
+			reg = <0x5980000 0x100000>;
+			read-only;
+		};
+
+		partition@5a80000 {
+			label = "Language";
+			reg = <0x5a80000 0x400000>;
+			read-only;
+		};
+
+		partition@5e80000 {
+			label = "Traffic";
+			reg = <0x5e80000 0x200000>;
+			read-only;
+		};
+
+		partition@6080000 {
+			label = "Cert";
+			reg = <0x6080000 0x100000>;
+			read-only;
+		};
+
+		partition@6180000 {
+			label = "NTGRcryptK";
+			reg = <0x6180000 0x100000>;
+			read-only;
+		};
+
+		partition@6280000 {
+			label = "NTGRcryptD";
+			reg = <0x6280000 0x500000>;
+			read-only;
+		};
+
+		partition@6780000 {
+			label = "LOG";
+			reg = <0x6780000 0x100000>;
+			read-only;
+		};
+
+		partition@6880000 {
+			label = "User_data";
+			reg = <0x6880000 0x640000>;
+			read-only;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>;
+		nvmem-cell-names = "eeprom", "precal";
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "uart3", "uart2", "jtag";
+		function = "gpio";
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts b/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
index cd0e7465ff..8ee88b2609 100644
--- a/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
+++ b/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
@@ -53,7 +53,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <104000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts b/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
index de352741f8..4917ffc81e 100644
--- a/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
+++ b/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
@@ -102,7 +102,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts b/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts
index 234202ba87..165b48d209 100644
--- a/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts
+++ b/target/linux/ramips/dts/mt7621_tplink_mr600-v2-eu.dts
@@ -92,7 +92,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi b/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
index 3264a8673c..ff2c39d704 100644
--- a/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
+++ b/target/linux/ramips/dts/mt7621_wevo_w2914ns-v2.dtsi
@@ -44,7 +44,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts b/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts
index 7090869c4e..d40f56e1e9 100644
--- a/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts
+++ b/target/linux/ramips/dts/mt7621_winstars_ws-wn583a6.dts
@@ -67,7 +67,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <104000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts b/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts
new file mode 100644
index 0000000000..f16d27e8d7
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_wodesys_wd-r1802u.dts
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "wodesys,wd-r1802u", "mediatek,mt7621-soc";
+	model = "Wodesys WD-R1802U";
+
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_blue;
+		led-failsafe = &led_red;
+		led-running = &led_green;
+		led-upgrade = &led_blue;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		key-0 {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		led_green: led-0 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+		};
+
+		led_blue: led-1 {
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+
+		led_red: led-2 {
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+			panic-indicator;
+		};
+	};
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_factory_4 1>;
+	nvmem-cell-names = "mac-address";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>;
+		nvmem-cell-names = "eeprom", "precal";
+		mediatek,disable-radar-background;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x00000 0x30000>;
+				read-only;
+			};
+
+			/* 0x30000-0x4ffff are unused
+                           (flash contents is 0xff) */
+
+			partition@50000 {
+				label = "factory";
+				reg = <0x50000 0x40000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0xe00>;
+					};
+
+					macaddr_factory_4: macaddr@4 { // wifi 2.4
+						compatible = "mac-base";
+						reg = <0x4 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+
+					precal_factory_e10: precal@e10 {
+						reg = <0xe10 0x19c10>;
+					};
+				};
+			};
+
+			partition@90000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x90000 0xf70000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&switch0 {
+	ports {
+		port@4 {
+			status = "okay";
+			label = "lan";
+		};
+	};
+};
+
+&xhci {
+	status = "disabled";
+};
diff --git a/target/linux/ramips/dts/mt7621_yuncore_ax820.dts b/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
index 316c180098..51421aba6a 100644
--- a/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
+++ b/target/linux/ramips/dts/mt7621_yuncore_ax820.dts
@@ -87,7 +87,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
index 536b45e03f..5e18ded9b0 100644
--- a/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
+++ b/target/linux/ramips/dts/mt7621_yuncore_fap640.dts
@@ -100,7 +100,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_yuncore_fap690.dts b/target/linux/ramips/dts/mt7621_yuncore_fap690.dts
index 9f7ca43092..bb25ade1a8 100644
--- a/target/linux/ramips/dts/mt7621_yuncore_fap690.dts
+++ b/target/linux/ramips/dts/mt7621_yuncore_fap690.dts
@@ -69,7 +69,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts b/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts
index 7dfe9a7699..2b54faae9e 100644
--- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts
+++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts
@@ -1,7 +1,6 @@
-#include "mt7621.dtsi"
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "mt7621_zbtlink_zbt-wexx26.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-we1326", "mediatek,mt7621-soc";
@@ -10,167 +9,4 @@
 	aliases {
 		label-mac-device = &wifi1;
 	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	keys {
-		compatible = "gpio-keys";
-
-		reset {
-			label = "reset";
-			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&state_default {
-	gpio {
-		groups = "wdt";
-		function = "gpio";
-	};
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-
-				nvmem-layout {
-					compatible = "fixed-layout";
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					eeprom_factory_0: eeprom@0 {
-						reg = <0x0 0x400>;
-					};
-
-					eeprom_factory_8000: eeprom@8000 {
-						reg = <0x8000 0x200>;
-					};
-
-					macaddr_factory_e000: macaddr@e000 {
-						reg = <0xe000 0x6>;
-					};
-
-					macaddr_factory_e006: macaddr@e006 {
-						reg = <0xe006 0x6>;
-					};
-				};
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
-
-&gmac0 {
-	nvmem-cells = <&macaddr_factory_e000>;
-	nvmem-cell-names = "mac-address";
-};
-
-&gmac1 {
-	status = "okay";
-	label = "wan";
-	phy-handle = <&ethphy4>;
-
-	nvmem-cells = <&macaddr_factory_e006>;
-	nvmem-cell-names = "mac-address";
-};
-
-&ethphy4 {
-	/delete-property/ interrupts;
-};
-
-&switch0 {
-	ports {
-		port@0 {
-			status = "okay";
-			label = "lan1";
-		};
-
-		port@1 {
-			status = "okay";
-			label = "lan2";
-		};
-
-		port@2 {
-			status = "okay";
-			label = "lan3";
-		};
-
-		port@3 {
-			status = "okay";
-			label = "lan4";
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie1 {
-	wifi@0,0 {
-		compatible = "mediatek,mt76";
-		reg = <0x0000 0 0 0 0>;
-		nvmem-cells = <&eeprom_factory_8000>;
-		nvmem-cell-names = "eeprom";
-		ieee80211-freq-limit = <5000000 6000000>;
-
-		led {
-			led-sources = <2>;
-			led-active-low;
-		};
-	};
-};
-
-&pcie2 {
-	wifi1: wifi@0,0 {
-		compatible = "mediatek,mt76";
-		reg = <0x0000 0 0 0 0>;
-		nvmem-cells = <&eeprom_factory_0>;
-		nvmem-cell-names = "eeprom";
-		ieee80211-freq-limit = <2400000 2500000>;
-
-		led {
-			led-sources = <0>;
-			led-active-low;
-		};
-	};
-};
-
-&sdhci {
-	status = "okay";
 };
diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-we3526.dts b/target/linux/ramips/dts/mt7621_zbtlink_zbt-we3526.dts
index 31a4e4482a..4f40f2926c 100644
--- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-we3526.dts
+++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-we3526.dts
@@ -1,169 +1,8 @@
-#include "mt7621.dtsi"
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "mt7621_zbtlink_zbt-wexx26.dtsi"
 
 / {
 	compatible = "zbtlink,zbt-we3526", "mediatek,mt7621-soc";
 	model = "Zbtlink ZBT-WE3526";
-
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	keys {
-		compatible = "gpio-keys";
-
-		reset {
-			label = "reset";
-			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&i2c {
-	status = "okay";
-};
-
-&sdhci {
-	status = "okay";
-};
-
-&spi0 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x30000>;
-				read-only;
-			};
-
-			partition@30000 {
-				label = "u-boot-env";
-				reg = <0x30000 0x10000>;
-				read-only;
-			};
-
-			partition@40000 {
-				label = "factory";
-				reg = <0x40000 0x10000>;
-				read-only;
-
-				nvmem-layout {
-					compatible = "fixed-layout";
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					eeprom_factory_0: eeprom@0 {
-						reg = <0x0 0x400>;
-					};
-
-					eeprom_factory_8000: eeprom@8000 {
-						reg = <0x8000 0x200>;
-					};
-
-					macaddr_factory_e000: macaddr@e000 {
-						reg = <0xe000 0x6>;
-					};
-
-					macaddr_factory_e006: macaddr@e006 {
-						reg = <0xe006 0x6>;
-					};
-				};
-			};
-
-			partition@50000 {
-				compatible = "denx,uimage";
-				label = "firmware";
-				reg = <0x50000 0xfb0000>;
-			};
-		};
-	};
-};
-
-&pcie {
-	status = "okay";
-};
-
-&pcie0 {
-	wifi@0,0 {
-		compatible = "pci14c3,7662";
-		reg = <0x0000 0 0 0 0>;
-		nvmem-cells = <&eeprom_factory_8000>;
-		nvmem-cell-names = "eeprom";
-		ieee80211-freq-limit = <5000000 6000000>;
-
-		led {
-			led-sources = <2>;
-		};
-	};
-};
-
-&pcie1 {
-	wifi@0,0 {
-		compatible = "pci14c3,7603";
-		reg = <0x0000 0 0 0 0>;
-		nvmem-cells = <&eeprom_factory_0>;
-		nvmem-cell-names = "eeprom";
-	};
-};
-
-&gmac0 {
-	nvmem-cells = <&macaddr_factory_e000>;
-	nvmem-cell-names = "mac-address";
-};
-
-&gmac1 {
-	status = "okay";
-	label = "wan";
-	phy-handle = <&ethphy4>;
-
-	nvmem-cells = <&macaddr_factory_e006>;
-	nvmem-cell-names = "mac-address";
-};
-
-&ethphy4 {
-	/delete-property/ interrupts;
-};
-
-&switch0 {
-	ports {
-		port@0 {
-			status = "okay";
-			label = "lan1";
-		};
-
-		port@1 {
-			status = "okay";
-			label = "lan2";
-		};
-
-		port@2 {
-			status = "okay";
-			label = "lan3";
-		};
-
-		port@3 {
-			status = "okay";
-			label = "lan4";
-		};
-	};
-};
-
-&state_default {
-	gpio {
-		groups = "wdt";
-		function = "gpio";
-	};
 };
diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wexx26.dtsi b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wexx26.dtsi
new file mode 100644
index 0000000000..e1428b7148
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wexx26.dtsi
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&ethphy4 {
+	/delete-property/ interrupts;
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_factory_e000>;
+	nvmem-cell-names = "mac-address";
+};
+
+&gmac1 {
+	status = "okay";
+	label = "wan";
+	phy-handle = <&ethphy4>;
+
+	nvmem-cells = <&macaddr_factory_e006>;
+	nvmem-cell-names = "mac-address";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_8000>;
+		nvmem-cell-names = "eeprom";
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		led {
+			led-sources = <2>;
+			led-active-low;
+		};
+	};
+};
+
+&pcie2 {
+	wifi1: wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_0>;
+		nvmem-cell-names = "eeprom";
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		led {
+			led-sources = <0>;
+			led-active-low;
+		};
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x400>;
+					};
+
+					eeprom_factory_8000: eeprom@8000 {
+						reg = <0x8000 0x200>;
+					};
+
+					macaddr_factory_e000: macaddr@e000 {
+						reg = <0xe000 0x6>;
+					};
+
+					macaddr_factory_e006: macaddr@e006 {
+						reg = <0xe006 0x6>;
+					};
+				};
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "wdt";
+		function = "gpio";
+	};
+};
+
+&switch0 {
+	ports {
+		port@0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index be80c11d11..445c530815 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -30,6 +30,35 @@
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
+	mmc_clk: mmc-clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <48000000>;
+		clock-accuracy = <100>;
+	};
+
+	mmc_reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+
+		enable-active-high;
+
+		regulator-always-on;
+		regulator-max-microvolt = <1800000>;
+		regulator-min-microvolt = <1800000>;
+		regulator-name = "mmc_io";
+	};
+
+	mmc_reg_3v3: regulator-3v3 {
+		compatible = "regulator-fixed";
+
+		enable-active-high;
+
+		regulator-always-on;
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-name = "mmc_power";
+	};
+
 	palmbus: palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
@@ -355,15 +384,34 @@
 		reset-names = "host", "device";
 	};
 
-	sdhci: sdhci@10130000 {
-		compatible = "ralink,mt7620-sdhci";
+	sdhci: mmc@10130000 {
+		compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
 		reg = <0x10130000 0x4000>;
 
+		bus-width = <4>;
+
+		cap-mmc-highspeed;
+		cap-sd-highspeed;
+
+		clocks = <&mmc_clk>, <&mmc_clk>;
+		clock-names = "source", "hclk";
+
+		disable-wp;
+
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
-		pinctrl-names = "default";
+		max-frequency = <48000000>;
+
+		pinctrl-names = "default", "state_uhs";
 		pinctrl-0 = <&sdxc_pins>;
+		pinctrl-1 = <&sdxc_pins>;
+
+		resets = <&sysc 30>;
+		reset-names = "hrst";
+
+		vmmc-supply = <&mmc_reg_3v3>;
+		vqmmc-supply = <&mmc_reg_1v8>;
 
 		status = "disabled";
 	};
diff --git a/target/linux/ramips/dts/mt7628an_d-team_pbr-d1.dts b/target/linux/ramips/dts/mt7628an_d-team_pbr-d1.dts
index 940104d47e..bcd2cecb3a 100644
--- a/target/linux/ramips/dts/mt7628an_d-team_pbr-d1.dts
+++ b/target/linux/ramips/dts/mt7628an_d-team_pbr-d1.dts
@@ -171,5 +171,5 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-high;
+	cd-inverted;
 };
diff --git a/target/linux/ramips/dts/mt7628an_duzun_dm06.dts b/target/linux/ramips/dts/mt7628an_duzun_dm06.dts
index 59d411f88f..1c40c12caf 100644
--- a/target/linux/ramips/dts/mt7628an_duzun_dm06.dts
+++ b/target/linux/ramips/dts/mt7628an_duzun_dm06.dts
@@ -96,7 +96,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <60000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts b/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts
index 51731c3c64..c7e3640d88 100644
--- a/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts
+++ b/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts
@@ -55,16 +55,10 @@
 			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
 		};
 	};
+};
 
-	sdhci@10130000 {
-		compatible = "ralink,mt7620-sdhci";
-		reg = <0x10130000 4000>;
-
-		interrupt-parent = <&intc>;
-		interrupts = <14>;
-
-		status = "okay";
-	};
+&sdhci {
+	status = "okay";
 };
 
 &state_default {
diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi b/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
index 42bb804c65..4b114c9414 100644
--- a/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
+++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5x61a.dtsi
@@ -36,7 +36,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi b/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi
index 96d36f66e0..0aee4e408a 100644
--- a/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi
+++ b/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi
@@ -132,7 +132,6 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-low;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts b/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
index 37b4b9baa5..fdce5cbec5 100644
--- a/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
+++ b/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
@@ -167,7 +167,7 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-high;
+	cd-inverted;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_minew_g1-c.dts b/target/linux/ramips/dts/mt7628an_minew_g1-c.dts
index 3912f23a9e..603bc09fa6 100644
--- a/target/linux/ramips/dts/mt7628an_minew_g1-c.dts
+++ b/target/linux/ramips/dts/mt7628an_minew_g1-c.dts
@@ -151,5 +151,5 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-high;
+	cd-inverted;
 };
diff --git a/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts b/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts
index 1c57fce196..7b288701c9 100644
--- a/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts
+++ b/target/linux/ramips/dts/mt7628an_motorola_mwr03.dts
@@ -50,7 +50,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi b/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi
index 41e5fb7e4b..a8e7353967 100644
--- a/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi
+++ b/target/linux/ramips/dts/mt7628an_netgear_r6xxx.dtsi
@@ -70,7 +70,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <86000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions: partitions {
diff --git a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
index 983c7fc03e..d279cbcfb8 100644
--- a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
+++ b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
@@ -172,7 +172,6 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-low;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts b/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts
index 177cd4db8a..b6a5a61b7c 100644
--- a/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts
+++ b/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v5.dts
@@ -89,7 +89,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <104000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {
diff --git a/target/linux/ramips/dts/mt7628an_widora_neo.dtsi b/target/linux/ramips/dts/mt7628an_widora_neo.dtsi
index de3b7d625e..74df529bd2 100644
--- a/target/linux/ramips/dts/mt7628an_widora_neo.dtsi
+++ b/target/linux/ramips/dts/mt7628an_widora_neo.dtsi
@@ -175,7 +175,6 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-low;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts b/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts
index 429b00c5b5..5714aaedc3 100644
--- a/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts
+++ b/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts
@@ -168,7 +168,7 @@
 
 &sdhci {
 	status = "okay";
-	mediatek,cd-high;
+	cd-inverted;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_xiaomi_mi-router-4a-100m-intl-v2.dts b/target/linux/ramips/dts/mt7628an_xiaomi_mi-router-4a-100m-intl-v2.dts
new file mode 100644
index 0000000000..b12901bd5b
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_xiaomi_mi-router-4a-100m-intl-v2.dts
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/leds/common.h>
+
+#include "mt7628an_xiaomi_mi-router-4.dtsi"
+
+/ {
+	compatible = "xiaomi,mi-router-4a-100m-intl-v2", "mediatek,mt7628an-soc";
+	model = "Xiaomi Mi Router 4A (100M International Edition V2)";
+
+	aliases {
+		led-boot = &led_power_yellow;
+		led-failsafe = &led_power_yellow;
+		led-running = &led_power_blue;
+		led-upgrade = &led_power_yellow;
+		label-mac-device = &ethernet;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_blue: power_blue {
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_POWER;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_yellow: power_yellow {
+			color = <LED_COLOR_ID_YELLOW>;
+			function = LED_FUNCTION_POWER;
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_WAN;
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+};
+
+&partitions {
+	partition@60000 {
+		label = "overlay";
+		reg = <0x60000 0x100000>;
+		read-only;
+	};
+
+	partition@160000 {
+		label = "firmware";
+		reg = <0x160000 0xea0000>;
+		compatible = "denx,uimage";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&eeprom_factory_8000 {
+	/* MT7613 has different eeprom size '0x4da8'			*/
+	/* See https://github.com/openwrt/openwrt/pull/13587		*/
+	/* You can also see this in mt76/mt7615/eeprom.h:		*/
+	/* MT7615_EEPROM_FULL_SIZE = MT7615_EEPROM_TXDPD_OFFSET + \	*/
+	/*       MT7615_EEPROM_TXDPD_COUNT * MT7615_EEPROM_TXDPD_SIZE	*/
+	/* where MT7615_EEPROM_TXDPD_OFFSET is 1024 + 256 * 34 = 9728:	*/
+	/*   MT7615_EEPROM_SIZE(1024 defined in mt7615.h) + \		*/
+	/*   MT7615_EEPROM_DCOC_COUNT(34) * MT7615_EEPROM_DCOC_SIZE(256)*/
+	/* where MT7615_EEPROM_TXDPD_COUNT = 44 + 3 = 47		*/
+	/* and MT7615_EEPROM_TXDPD_SIZE = 216.				*/
+	/* Altogether it will be 19880 or 0x4da8.			*/
+	reg = <0x8000 0x4da8>;
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_8000>;
+		nvmem-cell-names = "eeprom";
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&ethernet {
+	nvmem-cells = <&macaddr_factory_4 (-1)>;
+	nvmem-cell-names = "mac-address";
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+	mediatek,portdisable = <0x2a>;
+};
diff --git a/target/linux/ramips/dts/mt7628an_yuncore_m300.dts b/target/linux/ramips/dts/mt7628an_yuncore_m300.dts
new file mode 100644
index 0000000000..7a28c66996
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_yuncore_m300.dts
@@ -0,0 +1,147 @@
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "yuncore,m300", "mediatek,mt7628an-soc";
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	aliases {
+		label-mac = &ethernet;
+		led-boot = &led_indicator;
+		led-failsafe = &led_indicator;
+		led-running = &led_indicator;
+		led-upgrade = &led_indicator;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_indicator: indicator {
+			function = LED_FUNCTION_INDICATOR;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		lan {
+			function = LED_FUNCTION_LAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	watchdog {
+		compatible = "linux,wdt-gpio";
+		gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+		hw_algo = "toggle";
+		hw_margin_ms = <20000>;
+		always-running;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x400>;
+					};
+
+					macaddr_factory_4: macaddr@4 {
+						reg = <0x4 0x6>;
+					};
+				};
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x7b0000>;
+			};
+		};
+	};
+};
+
+&ethernet {
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&wmac {
+	status = "okay";
+
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
+};
+
+&state_default {
+	gpio {
+		groups = "pwm1", "pwm0", "uart2", "uart1", "i2c", "refclk",
+			 "perst", "wdt", "sdmode", "i2s", "spi cs1", "spis",
+			 "gpio", "p0led_an", "p1led_an", "p2led_an", "p3led_an",
+			 "p4led_an", "wled_kn", "p0led_kn", "p1led_kn",
+			 "p2led_kn", "p3led_kn", "p4led_kn";
+		function = "gpio";
+	};
+
+	wlan {
+		groups = "wled_an";
+		function = "wled_an";
+	};
+};
diff --git a/target/linux/ramips/dts/rt3662_asus_rt-n56u.dts b/target/linux/ramips/dts/rt3662_asus_rt-n56u.dts
index 391076cee9..c381aa3e03 100644
--- a/target/linux/ramips/dts/rt3662_asus_rt-n56u.dts
+++ b/target/linux/ramips/dts/rt3662_asus_rt-n56u.dts
@@ -73,7 +73,7 @@
 		compatible = "realtek,rtl8367";
 		gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
-		realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <8 1 0 1 1 1 1 1 1 2>;
 	};
 
 	keys {
diff --git a/target/linux/ramips/dts/rt3662_dlink_dir-645.dts b/target/linux/ramips/dts/rt3662_dlink_dir-645.dts
index 3d6479f44f..8cfa48e195 100644
--- a/target/linux/ramips/dts/rt3662_dlink_dir-645.dts
+++ b/target/linux/ramips/dts/rt3662_dlink_dir-645.dts
@@ -19,7 +19,7 @@
 		compatible = "realtek,rtl8367b";
 		gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
-		realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <6 1 0 1 1 1 1 1 1 2>;
 	};
 
 	keys {
diff --git a/target/linux/ramips/dts/rt3662_edimax_br-6475nd.dts b/target/linux/ramips/dts/rt3662_edimax_br-6475nd.dts
index 051e28da8f..fbc795b24f 100644
--- a/target/linux/ramips/dts/rt3662_edimax_br-6475nd.dts
+++ b/target/linux/ramips/dts/rt3662_edimax_br-6475nd.dts
@@ -127,7 +127,7 @@
 		compatible = "realtek,rtl8367";
 		gpio-sda = <&gpio0 5 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio0 4 GPIO_ACTIVE_HIGH>;
-		realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <9 1 0 1 1 1 1 1 1 2>;
 	};
 
 	/*
diff --git a/target/linux/ramips/dts/rt3662_samsung_cy-swr1100.dts b/target/linux/ramips/dts/rt3662_samsung_cy-swr1100.dts
index 9964fcf600..bcc215c17a 100644
--- a/target/linux/ramips/dts/rt3662_samsung_cy-swr1100.dts
+++ b/target/linux/ramips/dts/rt3662_samsung_cy-swr1100.dts
@@ -81,7 +81,7 @@
 		compatible = "realtek,rtl8367";
 		gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
-		realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <9 1 0 1 1 1 1 1 1 2>;
 	};
 
 	keys {
diff --git a/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi b/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi
index a2d1906b89..4d60bb3c05 100644
--- a/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi
+++ b/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi
@@ -12,7 +12,7 @@
 		compatible = "realtek,rtl8367b";
 		gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
 		gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
-		realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
+		realtek,extif = <5 1 0 1 1 1 1 1 1 2>;
 	};
 };
 
diff --git a/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts b/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
index 7755b5dfef..658a71066a 100644
--- a/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
+++ b/target/linux/ramips/dts/rt5350_zyxel_keenetic-lite-b.dts
@@ -56,7 +56,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <60000000>;
+		spi-max-frequency = <50000000>;
 
 		partitions {
 			compatible = "fixed-partitions";
diff --git a/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c b/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
index 756a1c5b57..3a9c69cb37 100644
--- a/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
+++ b/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
@@ -2245,7 +2245,7 @@ static int msdc_drv_probe(struct platform_device *pdev)
 	//TODO: read this as bus-width from dt (via mmc_of_parse)
 	mmc->caps  |= MMC_CAP_4_BIT_DATA;
 
-	cd_active_low = !of_property_read_bool(pdev->dev.of_node, "mediatek,cd-high");
+	cd_active_low = !of_property_read_bool(pdev->dev.of_node, "cd-inverted");
 
 	if (of_property_read_bool(pdev->dev.of_node, "mediatek,cd-poll"))
 		mmc->caps |= MMC_CAP_NEEDS_POLL;
diff --git a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
index 89cc7e2624..880c8578bd 100644
--- a/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
+++ b/target/linux/ramips/files/drivers/mtd/nand/raw/mt7621_nand.c
@@ -1290,44 +1290,28 @@ static int mt7621_nfc_probe(struct platform_device *pdev)
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nfi");
 	nfc->nfi_base = res->start;
 	nfc->nfi_regs = devm_ioremap_resource(dev, res);
-	if (IS_ERR(nfc->nfi_regs)) {
-		ret = PTR_ERR(nfc->nfi_regs);
-		return ret;
-	}
+	if (IS_ERR(nfc->nfi_regs))
+		return PTR_ERR(nfc->nfi_regs);
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ecc");
 	nfc->ecc_regs = devm_ioremap_resource(dev, res);
-	if (IS_ERR(nfc->ecc_regs)) {
-		ret = PTR_ERR(nfc->ecc_regs);
-		return ret;
-	}
+	if (IS_ERR(nfc->ecc_regs))
+		return PTR_ERR(nfc->ecc_regs);
 
-	nfc->nfi_clk = devm_clk_get(dev, "nfi_clk");
-	if (IS_ERR(nfc->nfi_clk)) {
+	nfc->nfi_clk = devm_clk_get_optional_enabled(dev, "nfi_clk");
+	if (IS_ERR(nfc->nfi_clk))
+		return PTR_ERR(nfc->nfi_clk);
+
+	if (!nfc->nfi_clk)
 		dev_warn(dev, "nfi clk not provided\n");
-		nfc->nfi_clk = NULL;
-	} else {
-		ret = clk_prepare_enable(nfc->nfi_clk);
-		if (ret) {
-			dev_err(dev, "Failed to enable nfi core clock\n");
-			return ret;
-		}
-	}
 
 	platform_set_drvdata(pdev, nfc);
 
 	ret = mt7621_nfc_init_chip(nfc);
-	if (ret) {
-		dev_err(dev, "Failed to initialize nand chip\n");
-		goto clk_disable;
-	}
+	if (ret)
+		return dev_err_probe(dev, ret, "Failed to initialize nand chip\n");
 
 	return 0;
-
-clk_disable:
-	clk_disable_unprepare(nfc->nfi_clk);
-
-	return ret;
 }
 
 static int mt7621_nfc_remove(struct platform_device *pdev)
@@ -1339,7 +1323,6 @@ static int mt7621_nfc_remove(struct platform_device *pdev)
 	mtk_bmt_detach(mtd);
 	mtd_device_unregister(mtd);
 	nand_cleanup(nand);
-	clk_disable_unprepare(nfc->nfi_clk);
 
 	return 0;
 }
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
index dcaff04db1..5853df70c5 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c
@@ -245,7 +245,7 @@ int mtk_gsw_init(struct fe_priv *priv)
 	mt7620_ephy_init(gsw);
 
 	if (gsw->irq) {
-		ret = request_irq(gsw->irq, gsw_interrupt_mt7620, 0,
+		ret = devm_request_irq(&pdev->dev, gsw->irq, gsw_interrupt_mt7620, 0,
 				  "gsw", priv);
 		if (ret) {
 			dev_err(&pdev->dev, "Failed to request irq");
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
index c8afa4e3bb..e261d90924 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
@@ -1414,7 +1414,6 @@ static void fe_uninit(struct net_device *dev)
 	fe_mdio_cleanup(priv);
 
 	fe_reg_w32(0, FE_REG_FE_INT_ENABLE);
-	free_irq(dev->irq, dev);
 }
 
 static int fe_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
@@ -1480,7 +1479,7 @@ static const struct net_device_ops fe_netdev_ops = {
 	.ndo_start_xmit		= fe_start_xmit,
 	.ndo_set_mac_address	= fe_set_mac_address,
 	.ndo_validate_addr	= eth_validate_addr,
-	.ndo_do_ioctl		= fe_do_ioctl,
+	.ndo_eth_ioctl		= fe_do_ioctl,
 	.ndo_change_mtu		= fe_change_mtu,
 	.ndo_tx_timeout		= fe_tx_timeout,
 	.ndo_get_stats64        = fe_get_stats64,
diff --git a/target/linux/ramips/image/mt7620.mk b/target/linux/ramips/image/mt7620.mk
index cb41e9bb5a..51811a86ea 100644
--- a/target/linux/ramips/image/mt7620.mk
+++ b/target/linux/ramips/image/mt7620.mk
@@ -145,7 +145,7 @@ define Device/bdcom_wap2100-sk
   DEVICE_VENDOR := BDCOM
   DEVICE_MODEL := WAP2100-SK (ZTE ZXECS EBG3130)
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mt76x2 kmod-mt76x0e \
-	kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
+	kmod-mmc-mtk kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += bdcom_wap2100-sk
 
@@ -372,7 +372,7 @@ define Device/domywifi_dm202
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := DomyWifi
   DEVICE_MODEL := DM202
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-sdhci-mt7620 kmod-usb2 kmod-usb-ohci
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-mmc-mtk kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += domywifi_dm202
 
@@ -381,7 +381,7 @@ define Device/domywifi_dm203
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := DomyWifi
   DEVICE_MODEL := DM203
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-sdhci-mt7620 kmod-usb2 kmod-usb-ohci
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-mmc-mtk kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += domywifi_dm203
 
@@ -390,7 +390,7 @@ define Device/domywifi_dw22d
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := DomyWifi
   DEVICE_MODEL := DW22D
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-sdhci-mt7620 kmod-usb2 kmod-usb-ohci
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-mmc-mtk kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += domywifi_dw22d
 
@@ -557,7 +557,7 @@ define Device/head-weblink_hdrm200
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Head Weblink
   DEVICE_MODEL := HDRM2000
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-mmc-mtk \
 	uqmi kmod-usb-serial-option
 endef
 TARGET_DEVICES += head-weblink_hdrm200
@@ -567,7 +567,7 @@ define Device/hiwifi_hc5661
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5661
-  DEVICE_PACKAGES := kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-mmc-mtk
   SUPPORTED_DEVICES += hc5661
 endef
 TARGET_DEVICES += hiwifi_hc5661
@@ -577,7 +577,7 @@ define Device/hiwifi_hc5761
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5761
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci kmod-mmc-mtk \
 	kmod-usb-ledtrig-usbport
   SUPPORTED_DEVICES += hc5761
 endef
@@ -588,7 +588,7 @@ define Device/hiwifi_hc5861
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5861
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-mmc-mtk \
 	kmod-phy-realtek kmod-usb-ledtrig-usbport
   SUPPORTED_DEVICES += hc5861
 endef
@@ -599,7 +599,7 @@ define Device/hnet_c108
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := HNET
   DEVICE_MODEL := C108
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mmc-mtk
   SUPPORTED_DEVICES += c108
 endef
 TARGET_DEVICES += hnet_c108
@@ -1023,7 +1023,7 @@ define Device/planex_cs-qr10
   DEVICE_VENDOR := Planex
   DEVICE_MODEL := CS-QR10
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sound-core \
-	kmod-sound-mt7620 kmod-i2c-ralink kmod-sdhci-mt7620
+	kmod-sound-mt7620 kmod-i2c-ralink kmod-mmc-mtk
   SUPPORTED_DEVICES += cs-qr10
 endef
 TARGET_DEVICES += planex_cs-qr10
@@ -1139,7 +1139,7 @@ define Device/sanlinking_d240
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Sanlinking Technologies
   DEVICE_MODEL := D240
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-mmc-mtk
   SUPPORTED_DEVICES += d240
 endef
 TARGET_DEVICES += sanlinking_d240
@@ -1220,7 +1220,7 @@ define Device/tplink_archer-c2-v1
   DEVICE_MODEL := Archer C2
   DEVICE_VARIANT := v1
   DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
-	kmod-usb-ledtrig-usbport kmod-switch-rtl8366-smi kmod-switch-rtl8367b
+	kmod-usb-ledtrig-usbport kmod-switch-rtl8367b
 endef
 TARGET_DEVICES += tplink_archer-c2-v1
 
@@ -1349,6 +1349,16 @@ define Device/wavlink_wl-wn531g3
 endef
 TARGET_DEVICES += wavlink_wl-wn531g3
 
+
+define Device/wavlink_wl-wn531g3-a2
+  SOC := mt7620a
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Wavlink
+  DEVICE_MODEL := WL-WN531G3-A2
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-phy-realtek kmod-usb2 kmod-usb-ohci
+endef
+TARGET_DEVICES += wavlink_wl-wn531g3-a2
+
 define Device/wavlink_wl-wn535k1
   SOC := mt7620a
   IMAGE_SIZE := 7360k
@@ -1407,7 +1417,7 @@ define Device/youku_x2
   DEVICE_VENDOR := Youku
   DEVICE_MODEL := X2
   DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci \
-	kmod-sdhci-mt7620 kmod-usb-ledtrig-usbport
+	kmod-mmc-mtk kmod-usb-ledtrig-usbport
   UIMAGE_MAGIC := 0x12291000
   UIMAGE_NAME := 400000000000000000001000
 endef
@@ -1418,7 +1428,7 @@ define Device/youku_yk-l1
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := Youku
   DEVICE_MODEL := YK-L1
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mmc-mtk \
 	kmod-usb-ledtrig-usbport
   SUPPORTED_DEVICES += youku-yk1 youku,yk1
   UIMAGE_MAGIC := 0x12291000
@@ -1431,7 +1441,7 @@ define Device/youku_yk-l1c
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Youku
   DEVICE_MODEL := YK-L1c
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mmc-mtk \
 	kmod-usb-ledtrig-usbport
   UIMAGE_MAGIC := 0x12291000
   UIMAGE_NAME := 400000000000000000000000
@@ -1484,7 +1494,7 @@ define Device/zbtlink_zbt-we1026-5g-16m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WE1026-5G
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-mmc-mtk
   SUPPORTED_DEVICES += we1026-5g-16m zbtlink,we1026-5g-16m
 endef
 TARGET_DEVICES += zbtlink_zbt-we1026-5g-16m
@@ -1495,7 +1505,7 @@ define Device/zbtlink_zbt-we1026-h-32m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WE1026-H
   DEVICE_VARIANT := 32M
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mmc-mtk
 endef
 TARGET_DEVICES += zbtlink_zbt-we1026-h-32m
 
@@ -1514,7 +1524,7 @@ define Device/zbtlink_zbt-we826-16m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WE826
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-mmc-mtk
   SUPPORTED_DEVICES += zbt-we826 zbt-we826-16M
 endef
 TARGET_DEVICES += zbtlink_zbt-we826-16m
@@ -1525,7 +1535,7 @@ define Device/zbtlink_zbt-we826-32m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WE826
   DEVICE_VARIANT := 32M
-  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci kmod-mmc-mtk
   SUPPORTED_DEVICES += zbt-we826-32M
 endef
 TARGET_DEVICES += zbtlink_zbt-we826-32m
@@ -1535,7 +1545,7 @@ define Device/zbtlink_zbt-we826-e
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WE826-E
-  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-sdhci-mt7620 uqmi \
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mmc-mtk uqmi \
 	kmod-usb-serial-option
 endef
 TARGET_DEVICES += zbtlink_zbt-we826-e
@@ -1605,7 +1615,7 @@ define Device/zyxel_keenetic-viva
   DEVICE_VENDOR := ZyXEL
   DEVICE_MODEL := Keenetic Viva
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
-	kmod-switch-rtl8366-smi kmod-switch-rtl8367b
+	kmod-switch-rtl8367b
   IMAGES += factory.bin
   IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to 64k | check-size | \
 	zyimage -d 8997 -v "ZyXEL Keenetic Viva"
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 13b6a51966..5f6399eaed 100644
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -242,7 +242,7 @@ define Device/alfa-network_quad-e4g
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := ALFA Network
   DEVICE_MODEL := Quad-E4G
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-usb3 \
 	-wpad-basic-mbedtls
   SUPPORTED_DEVICES += quad-e4g
 endef
@@ -300,7 +300,7 @@ define Device/asiarf_ap7621-001
   IMAGE_SIZE := 16000k
   DEVICE_VENDOR := AsiaRF
   DEVICE_MODEL := AP7621-001
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt76x2 kmod-usb3 \
 	-wpad-basic-mbedtls -uboot-envtools
 endef
 TARGET_DEVICES += asiarf_ap7621-001
@@ -311,7 +311,7 @@ define Device/asiarf_ap7621-nv1
   IMAGE_SIZE := 16000k
   DEVICE_VENDOR := AsiaRF
   DEVICE_MODEL := AP7621-NV1
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt76x2 kmod-usb3 \
 	-wpad-basic-mbedtls -uboot-envtools
 endef
 TARGET_DEVICES += asiarf_ap7621-nv1
@@ -604,7 +604,7 @@ define Device/comfast_cf-e390ax
   $(Device/dsa-migration)
   $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 15808k
-  DEVICE_VENDOR := ComFast
+  DEVICE_VENDOR := COMFAST
   DEVICE_MODEL := CF-E390AX
   DEVICE_PACKAGES := kmod-mt7915-firmware -uboot-envtools
   IMAGES += factory.bin
@@ -618,7 +618,7 @@ define Device/comfast_cf-ew72-v2
     $(Device/dsa-migration)
     $(Device/uimage-lzma-loader)
     IMAGE_SIZE := 15808k
-    DEVICE_VENDOR := ComFast
+    DEVICE_VENDOR := COMFAST
     DEVICE_MODEL := CF-EW72 V2
     DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap \
         -uboot-envtools
@@ -961,7 +961,7 @@ define Device/dual-q_h721
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Dual-Q
   DEVICE_MODEL := H721
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-usb3 \
 	-wpad-basic-mbedtls -uboot-envtools
 endef
 TARGET_DEVICES += dual-q_h721
@@ -982,7 +982,7 @@ define Device/d-team_pbr-m1
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := PandoraBox
   DEVICE_MODEL := PBR-M1
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-mmc-mtk \
 	kmod-usb3 kmod-usb-ledtrig-usbport -uboot-envtools
   SUPPORTED_DEVICES += pbr-m1
 endef
@@ -1244,7 +1244,7 @@ define Device/gnubee_gb-pc1
   $(Device/uimage-lzma-loader)
   DEVICE_VENDOR := GnuBee
   DEVICE_MODEL := GB-PC1
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 kmod-mmc-mtk \
 	-wpad-basic-mbedtls -uboot-envtools
   IMAGE_SIZE := 32448k
 endef
@@ -1255,7 +1255,7 @@ define Device/gnubee_gb-pc2
   $(Device/uimage-lzma-loader)
   DEVICE_VENDOR := GnuBee
   DEVICE_MODEL := GB-PC2
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-usb3 kmod-mmc-mtk \
 	-wpad-basic-mbedtls -uboot-envtools
   IMAGE_SIZE := 32448k
 endef
@@ -1370,7 +1370,7 @@ define Device/huasifei_ws1208v2
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Huasifei
   DEVICE_MODEL := WS1208V2
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-mmc-mtk \
 	kmod-usb3 kmod-usb-net-cdc-mbim kmod-usb-net-qmi-wwan \
 	kmod-usb-serial-option -uboot-envtools
 endef
@@ -1632,7 +1632,7 @@ define Device/jdcloud_re-cp-02
   IMAGE_SIZE := 16000k
   DEVICE_VENDOR := JD-Cloud
   DEVICE_MODEL := RE-CP-02
-  DEVICE_PACKAGES := kmod-mt7915-firmware kmod-sdhci-mt7620
+  DEVICE_PACKAGES := kmod-mt7915-firmware kmod-mmc-mtk
 endef
 TARGET_DEVICES += jdcloud_re-cp-02
 
@@ -1650,13 +1650,26 @@ define Device/keenetic_kn-3010
 endef
 TARGET_DEVICES += keenetic_kn-3010
 
+define Device/keenetic_kn-3510
+  $(Device/nand)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 121088k
+  DEVICE_VENDOR := Keenetic
+  DEVICE_MODEL := KN-3510
+  DEVICE_PACKAGES := kmod-mt7915-firmware -uboot-envtools
+  IMAGES += factory.bin
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
+	check-size | zyimage -d 0x803510 -v "KN-3510"
+endef
+TARGET_DEVICES += keenetic_kn-3510
+
 define Device/lenovo_newifi-d1
   $(Device/dsa-migration)
   $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := Lenovo
   DEVICE_MODEL := Newifi D1
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-mmc-mtk \
 	kmod-usb-ledtrig-usbport -uboot-envtools
   SUPPORTED_DEVICES += newifi-d1
 endef
@@ -1770,7 +1783,7 @@ define Device/mediatek_ap-mt7621a-v60
   IMAGE_SIZE := 7872k
   DEVICE_VENDOR := Mediatek
   DEVICE_MODEL := AP-MT7621A-V60 EVB
-  DEVICE_PACKAGES := kmod-usb3 kmod-sdhci-mt7620 kmod-sound-mt7620 \
+  DEVICE_PACKAGES := kmod-usb3 kmod-mmc-mtk kmod-sound-mt7620 \
 	-wpad-basic-mbedtls -uboot-envtools
 endef
 TARGET_DEVICES += mediatek_ap-mt7621a-v60
@@ -1865,7 +1878,7 @@ define Device/mqmaker_witi
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := MQmaker
   DEVICE_MODEL := WiTi
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt76x2 kmod-sdhci-mt7620 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt76x2 kmod-mmc-mtk kmod-usb3 \
 	kmod-usb-ledtrig-usbport -uboot-envtools
   SUPPORTED_DEVICES += witi mqmaker,witi-256m mqmaker,witi-512m
 endef
@@ -1878,7 +1891,7 @@ define Device/mtc_wr1201
   DEVICE_VENDOR := MTC
   DEVICE_MODEL := Wireless Router WR1201
   KERNEL_INITRAMFS := $(KERNEL_DTB) | uImage lzma -n 'WR1201_8_128'
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt76x2 kmod-usb3 \
 	kmod-usb-ledtrig-usbport -uboot-envtools
 endef
 TARGET_DEVICES += mtc_wr1201
@@ -2113,6 +2126,24 @@ define Device/netgear_wax202
 endef
 TARGET_DEVICES += netgear_wax202
 
+define Device/netgear_wax214v2
+  $(Device/nand)
+  DEVICE_VENDOR := NETGEAR
+  DEVICE_MODEL := WAX214v2
+  DEVICE_PACKAGES := kmod-mt7915-firmware
+  NETGEAR_ENC_MODEL := WAX214v2
+  NETGEAR_ENC_REGION := US
+  IMAGE_SIZE := 38912k
+  KERNEL_LOADADDR := 0x82000000
+  KERNEL := kernel-bin | relocate-kernel 0x80001000 | lzma | \
+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb | \
+	append-squashfs4-fakeroot
+  IMAGES += factory.img
+  IMAGE/factory.img := append-kernel | pad-to $$(KERNEL_SIZE) | \
+	append-ubi | check-size | netgear-encrypted-factory
+endef
+TARGET_DEVICES += netgear_wax214v2
+
 define Device/netgear_wndr3700-v5
   $(Device/dsa-migration)
   $(Device/netgear_sercomm_nor)
@@ -2154,7 +2185,7 @@ define Device/openfi_5pro
   DEVICE_VENDOR := OpenFi
   DEVICE_MODEL := 5Pro 
   DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb3 \
-	kmod-sdhci-mt7620
+	kmod-mmc-mtk
 endef
 TARGET_DEVICES += openfi_5pro
 
@@ -2656,7 +2687,7 @@ TARGET_DEVICES += ubnt_edgerouter-x-sfp
 define Device/ubnt_unifi-6-lite
   $(Device/dsa-migration)
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 Lite
+  DEVICE_MODEL := UniFi U6 Lite
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS_LOADADDR := 0x87000000
   DEVICE_PACKAGES += kmod-mt7603 kmod-mt7915-firmware -uboot-envtools
@@ -2717,7 +2748,7 @@ define Device/unielec_u7621-06-16m
   DEVICE_VENDOR := UniElec
   DEVICE_MODEL := U7621-06
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-usb3 \
 	-wpad-basic-mbedtls -uboot-envtools
   SUPPORTED_DEVICES += u7621-06-256M-16M unielec,u7621-06-256m-16m
 endef
@@ -2730,7 +2761,7 @@ define Device/unielec_u7621-06-32m
   DEVICE_VENDOR := UniElec
   DEVICE_MODEL := U7621-06
   DEVICE_VARIANT := 32M
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-usb3 \
 	-wpad-basic-mbedtls -uboot-envtools
   SUPPORTED_DEVICES += unielec,u7621-06-32m
 endef
@@ -2743,7 +2774,7 @@ define Device/unielec_u7621-06-64m
   DEVICE_VENDOR := UniElec
   DEVICE_MODEL := U7621-06
   DEVICE_VARIANT := 64M
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-usb3 \
 	-wpad-basic-mbedtls -uboot-envtools
   SUPPORTED_DEVICES += unielec,u7621-06-512m-64m
 endef
@@ -2867,6 +2898,17 @@ define Device/winstars_ws-wn583a6
 endef
 TARGET_DEVICES += winstars_ws-wn583a6
 
+define Device/wodesys_wd-r1802u
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 15808k
+  DEVICE_VENDOR := Wodesys
+  DEVICE_MODEL := WD-R1802U
+  DEVICE_PACKAGES := kmod-mt7915-firmware -uboot-envtools
+  SUPPORTED_DEVICES += mt7621-rfb-ax-nor
+endef
+TARGET_DEVICES += wodesys_wd-r1802u
+
 define Device/xiaomi_nand_separate
   $(Device/nand)
   $(Device/uimage-lzma-loader)
@@ -3003,7 +3045,7 @@ define Device/xzwifi_creativebox-v1
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := CreativeBox
   DEVICE_MODEL := v1
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-mmc-mtk \
 	kmod-usb3 -wpad-basic-mbedtls -uboot-envtools
 endef
 TARGET_DEVICES += xzwifi_creativebox-v1
@@ -3092,7 +3134,7 @@ define Device/zbtlink_zbt-we1326
   DEVICE_MODEL := ZBT-WE1326
   DEVICE_ALT0_VENDOR := Wiflyer
   DEVICE_ALT0_MODEL := WF3526-P
-  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620 \
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-mmc-mtk \
 	-uboot-envtools
   SUPPORTED_DEVICES += zbt-we1326
 endef
@@ -3104,7 +3146,7 @@ define Device/zbtlink_zbt-we3526
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WE3526
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt7603 kmod-mt76x2 kmod-usb3 \
 	kmod-usb-ledtrig-usbport -uboot-envtools
 endef
 TARGET_DEVICES += zbtlink_zbt-we3526
@@ -3116,7 +3158,7 @@ define Device/zbtlink_zbt-wg1602-16m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG1602
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt7603 kmod-mt76x2 kmod-usb3 \
 	kmod-usb-ledtrig-usbport -uboot-envtools
 endef
 TARGET_DEVICES += zbtlink_zbt-wg1602-16m
@@ -3128,7 +3170,7 @@ define Device/zbtlink_zbt-wg1602-v04-16m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG1602-V04
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt7603 kmod-mt76x2 kmod-usb3 \
         kmod-usb-ledtrig-usbport -uboot-envtools
 endef
 TARGET_DEVICES += zbtlink_zbt-wg1602-v04-16m
@@ -3140,7 +3182,7 @@ define Device/zbtlink_zbt-wg1602-v04-32m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG1602-V04
   DEVICE_VARIANT := 32M
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt7603 kmod-mt76x2 kmod-usb3 \
         kmod-usb-ledtrig-usbport -uboot-envtools
 endef
 TARGET_DEVICES += zbtlink_zbt-wg1602-v04-32m
@@ -3152,7 +3194,7 @@ define Device/zbtlink_zbt-wg1608-16m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG1608
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt7615e \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt7603 kmod-mt7615e \
 	kmod-mt7663-firmware-ap kmod-usb3 kmod-usb-ledtrig-usbport \
 	-uboot-envtools
 endef
@@ -3165,7 +3207,7 @@ define Device/zbtlink_zbt-wg1608-32m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG1608
   DEVICE_VARIANT := 32M
-  DEVICE_PACKAGES := kmod-sdhci-mt7620 kmod-mt7603 kmod-mt7615e \
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt7603 kmod-mt7615e \
 	kmod-mt7663-firmware-ap kmod-usb3 kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += zbtlink_zbt-wg1608-32m
@@ -3176,7 +3218,7 @@ define Device/zbtlink_zbt-wg2626
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG2626
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-mt76x2 kmod-usb3 \
 	kmod-usb-ledtrig-usbport -uboot-envtools
   SUPPORTED_DEVICES += zbt-wg2626
 endef
@@ -3189,7 +3231,7 @@ define Device/zbtlink_zbt-wg3526-16m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG3526
   DEVICE_VARIANT := 16M
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-mt7603 kmod-mt76x2 \
 	kmod-usb3 kmod-usb-ledtrig-usbport -uboot-envtools
   SUPPORTED_DEVICES += zbt-wg3526 zbt-wg3526-16M
 endef
@@ -3202,7 +3244,7 @@ define Device/zbtlink_zbt-wg3526-32m
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-WG3526
   DEVICE_VARIANT := 32M
-  DEVICE_PACKAGES := kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \
+  DEVICE_PACKAGES := kmod-ata-ahci kmod-mmc-mtk kmod-mt7603 kmod-mt76x2 \
 	kmod-usb3 kmod-usb-ledtrig-usbport -uboot-envtools
   SUPPORTED_DEVICES += ac1200pro zbt-wg3526-32M
 endef
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index 07000a1a11..71f09f816f 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -135,7 +135,7 @@ TARGET_DEVICES += buffalo_wcr-1166ds
 define Device/comfast_cf-wr617ac
   IMAGE_SIZE := 7872k
   DTS := CF-WR617AC
-  DEVICE_VENDOR := Comfast
+  DEVICE_VENDOR := COMFAST
   DEVICE_MODEL := CF-WR617AC
   DEVICE_PACKAGES := kmod-mt76x2 kmod-rt2800-pci
 endef
@@ -406,7 +406,7 @@ define Device/mediatek_linkit-smart-7688
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := MediaTek
   DEVICE_MODEL := LinkIt Smart 7688
-  DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools kmod-sdhci-mt7620
+  DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools kmod-mmc-mtk
   SUPPORTED_DEVICES += linkits7688 linkits7688d
 endef
 TARGET_DEVICES += mediatek_linkit-smart-7688
@@ -499,7 +499,7 @@ define Device/onion_omega2p
   IMAGE_SIZE := 32448k
   DEVICE_VENDOR := Onion
   DEVICE_MODEL := Omega2+
-  DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools kmod-sdhci-mt7620
+  DEVICE_PACKAGES:= kmod-usb2 kmod-usb-ohci uboot-envtools kmod-mmc-mtk
   SUPPORTED_DEVICES += omega2p
 endef
 TARGET_DEVICES += onion_omega2p
@@ -526,7 +526,7 @@ define Device/ravpower_rp-wd009
   DEVICE_MODEL := RP-WD009
   UBOOT_PATH := $(STAGING_DIR_IMAGE)/mt7628_ravpower_rp-wd009-u-boot.bin
   DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci \
-	kmod-sdhci-mt7620 kmod-i2c-mt7628 ravpower-mcu
+	kmod-mmc-mtk kmod-i2c-mt7628 ravpower-mcu
   IMAGES += factory.bin
   IMAGE/factory.bin := $$(sysupgrade_bin) | ravpower-wd009-factory
 endef
@@ -954,7 +954,7 @@ define Device/vocore_vocore2
   DEVICE_VENDOR := VoCore
   DEVICE_MODEL := VoCore2
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
-	kmod-sdhci-mt7620
+	kmod-mmc-mtk
   SUPPORTED_DEVICES += vocore2
 endef
 TARGET_DEVICES += vocore_vocore2
@@ -964,7 +964,7 @@ define Device/vocore_vocore2-lite
   DEVICE_VENDOR := VoCore
   DEVICE_MODEL := VoCore2-Lite
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport \
-	kmod-sdhci-mt7620
+	kmod-mmc-mtk
   SUPPORTED_DEVICES += vocore2lite
 endef
 TARGET_DEVICES += vocore_vocore2-lite
@@ -1092,6 +1092,15 @@ define Device/xiaomi_mi-router-4a-100m-intl
 endef
 TARGET_DEVICES += xiaomi_mi-router-4a-100m-intl
 
+define Device/xiaomi_mi-router-4a-100m-intl-v2
+  IMAGE_SIZE := 14976k
+  DEVICE_VENDOR := Xiaomi
+  DEVICE_MODEL := Mi Router 4A
+  DEVICE_VARIANT := 100M International Edition V2
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap
+endef
+TARGET_DEVICES += xiaomi_mi-router-4a-100m-intl-v2
+
 define Device/xiaomi_mi-router-4c
   IMAGE_SIZE := 14976k
   DEVICE_VENDOR := Xiaomi
@@ -1127,6 +1136,13 @@ define Device/xiaomi_mi-ra75
 endef
 TARGET_DEVICES += xiaomi_mi-ra75
 
+define Device/yuncore_m300
+  IMAGE_SIZE := 7872k
+  DEVICE_VENDOR := Yuncore
+  DEVICE_MODEL := M300
+endef
+TARGET_DEVICES += yuncore_m300
+
 define Device/zbtlink_zbt-we1226
   IMAGE_SIZE := 7872k
   DEVICE_VENDOR := Zbtlink
diff --git a/target/linux/ramips/image/rt3883.mk b/target/linux/ramips/image/rt3883.mk
index 0430099296..1728f84444 100644
--- a/target/linux/ramips/image/rt3883.mk
+++ b/target/linux/ramips/image/rt3883.mk
@@ -8,7 +8,8 @@ endef
 define Device/asus_rt-n56u
   SOC := rt3662
   IMAGE_SIZE := 7872k
-  IMAGE/sysupgrade.bin += | mkrtn56uimg -s
+  IMAGE/sysupgrade.bin := $$(sysupgrade_bin) | check-size | \
+	mkrtn56uimg -s | append-metadata
   DEVICE_VENDOR := ASUS
   DEVICE_MODEL := RT-N56U
   DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2
diff --git a/target/linux/ramips/modules.mk b/target/linux/ramips/modules.mk
index f32b82aef8..ced479dc93 100644
--- a/target/linux/ramips/modules.mk
+++ b/target/linux/ramips/modules.mk
@@ -4,6 +4,27 @@
 
 OTHER_MENU:=Other modules
 
+define KernelPackage/mmc-mtk
+  SUBMENU:=Other modules
+  TITLE:=MediaTek SD/MMC Card Interface support
+  DEPENDS:=@(TARGET_ramips_mt7620||TARGET_ramips_mt76x8||TARGET_ramips_mt7621) +kmod-mmc
+  KCONFIG:= \
+	CONFIG_MMC \
+	CONFIG_MMC_MTK \
+	CONFIG_MMC_CQHCI
+  FILES:= \
+	$(LINUX_DIR)/drivers/mmc/host/cqhci.ko \
+	$(LINUX_DIR)/drivers/mmc/host/mtk-sd.ko
+  AUTOLOAD:=$(call AutoProbe,cqhci mtk-sd,1)
+endef
+
+define KernelPackage/mmc-mtk/description
+  MediaTek(R) Secure digital and Multimedia card Interface.
+  This is needed if support for any SD/SDIO/MMC devices is required.
+endef
+
+$(eval $(call KernelPackage,mmc-mtk))
+
 define KernelPackage/pwm-mediatek-ramips
   SUBMENU:=Other modules
   TITLE:=MT7628 PWM
diff --git a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network
index d23ec76327..577f77cb93 100644
--- a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network
@@ -257,6 +257,10 @@ ramips_setup_interfaces()
 		ucidef_add_switch "switch0" \
 			"0:lan:4" "1:lan:3" "2:lan:2" "5:lan:1" "4:wan" "6@eth0"
 		;;
+	wavlink,wl-wn531g3-a2)
+		ucidef_add_switch "switch0" \
+			"0:lan:4" "1:lan:3" "2:lan:2" "5:lan:1" "4:wan" "6@eth0"
+		;;
 	wavlink,wl-wn535k1)
 		ucidef_add_switch "switch0" \
 			"2:lan:2" "5:lan:1" "4:wan" "6@eth0"
@@ -431,6 +435,7 @@ ramips_setup_macs()
 		wan_mac=$(macaddr_add "$(mtd_get_mac_binary rom 0xf100)" 1)
 		;;
 	wavlink,wl-wn531g3|\
+	wavlink,wl-wn531g3-a2|\
 	zbtlink,zbt-we1026-5g-16m)
 		label_mac=$(mtd_get_mac_binary factory 0x4)
 		;;
diff --git a/target/linux/ramips/mt7620/config-6.6 b/target/linux/ramips/mt7620/config-6.6
index a142efd43b..20bba0c5a4 100644
--- a/target/linux/ramips/mt7620/config-6.6
+++ b/target/linux/ramips/mt7620/config-6.6
@@ -186,6 +186,8 @@ CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_SERIAL_8250_RT288X=y
 CONFIG_SERIAL_MCTRL_GPIO=y
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
index 386a3bb41d..b7e3a49b43 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
@@ -47,6 +47,7 @@ ramips_setup_interfaces()
 	mikrotik,routerboard-m11g|\
 	netgear,eax12|\
 	netgear,ex6150|\
+	netgear,wax214v2|\
 	sercomm,na502|\
 	sercomm,na502s|\
 	thunder,timecloud|\
@@ -60,12 +61,14 @@ ramips_setup_interfaces()
 	ubnt,unifi-nanohd|\
 	yuncore,fap690|\
 	wavlink,wl-wn573hx1|\
+	wodesys,wd-r1802u|\
 	zyxel,nwa50ax|\
 	zyxel,nwa55axe)
 		ucidef_set_interface_lan "lan"
 		;;
 	asiarf,ap7621-001|\
 	humax,e10|\
+	keenetic,kn-3510|\
 	openfi,5pro|\
 	wavlink,ws-wn572hp3-4g|\
 	winstars,ws-wn583a6)
@@ -325,6 +328,10 @@ ramips_setup_macs()
 		wan_mac=$(macaddr_add "$lan_mac" 1)
 		label_mac=$lan_mac
 		;;
+	netgear,wax214v2)
+		lan_mac=$(mtd_get_mac_ascii Config ethaddr)
+		label_mac=$lan_mac
+		;;
 	yuncore,ax820)
 		label_mac=$(mtd_get_mac_binary Factory 0x4)
 		;;
diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/05-wifi-migrate b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/05-wifi-migrate
index 6504dc81a5..0e7ff41453 100644
--- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/05-wifi-migrate
+++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/05-wifi-migrate
@@ -63,7 +63,8 @@ netgear,wac104|\
 netgear,wndr3700-v5)
 	migrate_radio '1e140000.pcie/pci0000:00/0000:00:01.0/0000:02:00.0' '1e140000.pcie/pci0000:00/0000:00:02.0/0000:02:00.0'
 	;;
-zbtlink,zbt-we1326)
+zbtlink,zbt-we1326|\
+zbtlink,zbt-we3526)
 	migrate_radio '1e140000.pcie/pci0000:00/0000:00:01.0/0000:02:00.0' '1e140000.pcie/pci0000:00/0000:00:02.0/0000:02:00.0'
 	migrate_radio '1e140000.pcie/pci0000:00/0000:00:00.0/0000:01:00.0' '1e140000.pcie/pci0000:00/0000:00:01.0/0000:01:00.0'
 	;;
diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
index 9350d67466..91c17f8a77 100644
--- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
+++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
@@ -126,6 +126,10 @@ case "$board" in
 		[ "$PHYNBR" = "1" ] && \
 			macaddr_setbit_la "$(mtd_get_mac_binary Factory 0x4)" > /sys${DEVPATH}/macaddress
 		;;
+	keenetic,kn-3510)
+		[ "$PHYNBR" = "1" ] && \
+			macaddr_setbit_la "$(mtd_get_mac_binary rf-eeprom 0x4)" > /sys${DEVPATH}/macaddress
+		;;
 	linksys,e5600|\
 	linksys,ea6350-v4|\
 	linksys,ea7300-v1|\
@@ -153,6 +157,11 @@ case "$board" in
 		[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
 		[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress
 		;;
+	netgear,wax214v2)
+		hw_mac_addr=$(mtd_get_mac_ascii Config ethaddr)
+		[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
+		[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress
+		;;
 	mercusys,mr70x-v1|\
 	tplink,archer-ax23-v1)
 		hw_mac_addr="$(mtd_get_mac_binary config 0x8)"
diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
index 32dad72944..bad7e30ca6 100755
--- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh
@@ -100,6 +100,7 @@ platform_do_upgrade() {
 	iptime,ax2004m|\
 	iptime,t5004|\
 	jcg,q20|\
+	keenetic,kn-3510|\
 	linksys,e5600|\
 	linksys,e7350|\
 	linksys,ea6350-v4|\
@@ -122,6 +123,7 @@ platform_do_upgrade() {
 	netgear,wac104|\
 	netgear,wac124|\
 	netgear,wax202|\
+	netgear,wax214v2|\
 	netis,wf2881|\
 	raisecom,msg1500-x-00|\
 	rostelecom,rt-fe-1a|\
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
index 3e0b70cc20..5a93761780 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
@@ -18,7 +18,8 @@ asus,rt-n11p-b1|\
 asus,rt-n12-vp-b1|\
 netgear,r6020|\
 netgear,r6080|\
-netgear,r6120)
+netgear,r6120|\
+yuncore,m300)
 	ucidef_set_led_switch "lan" "lan" "green:lan" "switch0" "0xf"
 	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
 	;;
@@ -171,7 +172,8 @@ wavlink,wl-wn578a2)
 	ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
 	;;
 xiaomi,mi-router-4a-100m|\
-xiaomi,mi-router-4a-100m-intl)
+xiaomi,mi-router-4a-100m-intl|\
+xiaomi,mi-router-4a-100m-intl-v2)
 	ucidef_set_led_switch "wan" "WAN" "blue:wan" "switch0" "0x01"
 	;;
 xiaomi,mi-router-4c)
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
index c44361a439..2989d36e9b 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
@@ -81,7 +81,8 @@ ramips_setup_interfaces()
 	buffalo,wcr-1166ds|\
 	elecom,wrc-1167fs|\
 	wavlink,wl-wn577a2|\
-	wavlink,wl-wn578a2)
+	wavlink,wl-wn578a2|\
+	yuncore,m300)
 		ucidef_add_switch "switch0" \
 			"3:lan" "4:wan" "6@eth0"
 		;;
@@ -186,7 +187,8 @@ ramips_setup_interfaces()
 			"0:wan" "3:lan" "4:lan" "6@eth0"
 		;;
 	xiaomi,mi-router-4a-100m|\
-	xiaomi,mi-router-4a-100m-intl)
+	xiaomi,mi-router-4a-100m-intl|\
+	xiaomi,mi-router-4a-100m-intl-v2)
 		ucidef_add_switch "switch0" \
 			"4:lan:1" "2:lan:2" "0:wan" "6@eth0"
 		;;
@@ -323,6 +325,7 @@ ramips_setup_macs()
 		;;
 	xiaomi,mi-router-4a-100m|\
 	xiaomi,mi-router-4a-100m-intl|\
+	xiaomi,mi-router-4a-100m-intl-v2|\
 	xiaomi,mi-router-4c)
 		wan_mac=$(mtd_get_mac_binary factory 0x4)
 		;;
diff --git a/target/linux/ramips/mt76x8/config-6.6 b/target/linux/ramips/mt76x8/config-6.6
index a2d7bc9866..b9dc8525df 100644
--- a/target/linux/ramips/mt76x8/config-6.6
+++ b/target/linux/ramips/mt76x8/config-6.6
@@ -84,6 +84,8 @@ CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_MT7621=y
 # CONFIG_GPIO_RALINK is not set
+CONFIG_GPIO_WATCHDOG=y
+# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
diff --git a/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
index 51f1a5ec5e..f87edd3e67 100644
--- a/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
+++ b/target/linux/ramips/patches-6.6/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
@@ -20,7 +20,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
-@@ -338,6 +338,14 @@ config MTD_NAND_QCOM
+@@ -337,6 +337,14 @@ config MTD_NAND_QCOM
  	  Enables support for NAND flash chips on SoCs containing the EBI2 NAND
  	  controller. This controller is found on IPQ806x SoC.
  
diff --git a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
index b58cb786ad..7e04c9b1bc 100644
--- a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
+++ b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/media/usb/uvc/uvc_driver.c
 +++ b/drivers/media/usb/uvc/uvc_driver.c
-@@ -3151,6 +3151,18 @@ static const struct usb_device_id uvc_id
+@@ -3173,6 +3173,18 @@ static const struct usb_device_id uvc_id
  	  .bInterfaceSubClass	= 1,
  	  .bInterfaceProtocol	= 0,
  	  .driver_info		= UVC_INFO_META(V4L2_META_FMT_D4XX) },
@@ -64,7 +64,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  #include <media/v4l2-common.h>
  
-@@ -1235,9 +1240,149 @@ static void uvc_video_decode_data(struct
+@@ -1246,9 +1251,149 @@ static void uvc_video_decode_data(struct
  	uvc_urb->async_operations++;
  }
  
@@ -214,7 +214,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	/* Mark the buffer as done if the EOF marker is set. */
  	if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) {
  		uvc_dbg(stream->dev, FRAME, "Frame complete (EOF found)\n");
-@@ -1819,6 +1964,8 @@ static int uvc_init_video_isoc(struct uv
+@@ -1830,6 +1975,8 @@ static int uvc_init_video_isoc(struct uv
  	if (npackets == 0)
  		return -ENOMEM;
  
@@ -225,16 +225,16 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	for_each_uvc_urb(uvc_urb, stream) {
 --- a/drivers/media/usb/uvc/uvcvideo.h
 +++ b/drivers/media/usb/uvc/uvcvideo.h
-@@ -74,6 +74,8 @@
- #define UVC_QUIRK_FORCE_BPP		0x00001000
- #define UVC_QUIRK_WAKE_AUTOSUSPEND	0x00002000
+@@ -76,6 +76,8 @@
  #define UVC_QUIRK_NO_RESET_RESUME	0x00004000
-+#define UVC_QUIRK_MOTION		0x00008000
-+#define UVC_QUIRK_SINGLE_ISO		0x00010000
+ #define UVC_QUIRK_DISABLE_AUTOSUSPEND	0x00008000
+ #define UVC_QUIRK_INVALID_DEVICE_SOF	0x00010000
++#define UVC_QUIRK_MOTION		0x00020000
++#define UVC_QUIRK_SINGLE_ISO		0x00040000
  
  /* Format flags */
  #define UVC_FMT_FLAG_COMPRESSED		0x00000001
-@@ -583,6 +585,7 @@ struct uvc_device {
+@@ -585,6 +587,7 @@ struct uvc_device {
  
  	struct input_dev *input;
  	char input_phys[64];
diff --git a/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch b/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
new file mode 100644
index 0000000000..1d5c6dcd40
--- /dev/null
+++ b/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
@@ -0,0 +1,39 @@
+From: Shiji Yang <yangshiji66@outlook.com>
+Date: Wed, 10 Jul 2024 12:18:52 +0800
+Subject: [PATCH] mmc: mtk-sd: initialize the pad and tune registers
+
+Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
+---
+
+--- a/drivers/mmc/host/mtk-sd.c
++++ b/drivers/mmc/host/mtk-sd.c
+@@ -75,8 +75,12 @@
+ #define MSDC_PATCH_BIT   0xb0
+ #define MSDC_PATCH_BIT1  0xb4
+ #define MSDC_PATCH_BIT2  0xb8
++#define MSDC_PAD_CTRL0   0xe0
++#define MSDC_PAD_CTRL1   0xe4
++#define MSDC_PAD_CTRL2   0xe8
+ #define MSDC_PAD_TUNE    0xec
+ #define MSDC_PAD_TUNE0   0xf0
++#define MSDC_PAD_TUNE1   0xf4
+ #define PAD_DS_TUNE      0x188
+ #define PAD_CMD_TUNE     0x18c
+ #define EMMC51_CFG0	 0x204
+@@ -1795,6 +1799,16 @@ static void msdc_init_hw(struct msdc_hos
+ 				     MSDC_PAD_TUNE_RXDLYSEL);
+ 	}
+ 
++	/* Set pins drive strength */
++	writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
++	writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
++	writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
++
++	/* Set pad delay */
++	writel(0x84101010, host->base + MSDC_PAD_TUNE);
++	writel(0x10101010, host->base + MSDC_PAD_TUNE0);
++	writel(0x10101010, host->base + MSDC_PAD_TUNE1);
++
+ 	if (mmc->caps2 & MMC_CAP2_NO_SDIO) {
+ 		sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO);
+ 		sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ);
diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
index ef89461056..6f6dfbf73e 100644
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
@@ -28,6 +28,11 @@ friendlyarm,nanopi-r5s)
 	ucidef_set_led_netdev "lan1" "LAN1" "green:lan-1" "eth1"
 	ucidef_set_led_netdev "lan2" "LAN2" "green:lan-2" "eth2"
 	;;
+friendlyarm,nanopi-r6s)
+	ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
+	ucidef_set_led_netdev "lan1" "LAN1" "lan1_led" "eth2"
+	ucidef_set_led_netdev "lan2" "LAN2" "lan2_led" "eth0"
+	;;
 esac
 
 board_config_flush
diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
index 8729bd52f2..506ef67245 100644
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
@@ -12,6 +12,7 @@ rockchip_setup_interfaces()
 	friendlyarm,nanopi-r2s|\
 	friendlyarm,nanopi-r4s|\
 	friendlyarm,nanopi-r4s-enterprise|\
+	radxa,rockpi-e|\
 	xunlong,orangepi-r1-plus|\
 	xunlong,orangepi-r1-plus-lts)
 		ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
@@ -23,6 +24,9 @@ rockchip_setup_interfaces()
 	friendlyarm,nanopi-r5s)
 		ucidef_set_interfaces_lan_wan 'eth1 eth2' 'eth0'
 		;;
+	friendlyarm,nanopi-r6s)
+		ucidef_set_interfaces_lan_wan 'eth0 eth2' 'eth1'
+		;;
 	sinovoip,rk3568-bpi-r2pro)
 		ucidef_set_interfaces_lan_wan 'lan0 lan1 lan2 lan3' 'eth0'
 		;;
@@ -56,7 +60,8 @@ rockchip_setup_macs()
 		wan_mac=$(get_mac_binary "/sys/bus/i2c/devices/2-0051/eeprom" 0xfa)
 		lan_mac=$(macaddr_setbit_la "$wan_mac")
 		;;
-	friendlyarm,nanopi-r5c)
+	friendlyarm,nanopi-r5c|\
+	friendlyarm,nanopi-r6s)
 		wan_mac=$(macaddr_generate_from_mmc_cid mmcblk*)
 		lan_mac=$(macaddr_add "$wan_mac" 1)
 		;;
diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
index 8bbce1c328..5716aaf496 100644
--- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
+++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
@@ -49,7 +49,8 @@ sinovoip,rk3568-bpi-r2pro)
 	set_interface_core 2 "eth0"
 	set_interface_core 4 "eth1"
 	;;
-friendlyarm,nanopi-r5s)
+friendlyarm,nanopi-r5s|\
+friendlyarm,nanopi-r6s)
 	set_interface_core 2 "eth0"
 	set_interface_core 4 "eth1"
 	set_interface_core 8 "eth2"
diff --git a/target/linux/rockchip/armv8/config-6.6 b/target/linux/rockchip/armv8/config-6.6
index fb57fc6260..be87f7e52c 100644
--- a/target/linux/rockchip/armv8/config-6.6
+++ b/target/linux/rockchip/armv8/config-6.6
@@ -24,11 +24,20 @@ CONFIG_ARM64=y
 CONFIG_ARM64_4K_PAGES=y
 CONFIG_ARM64_CNP=y
 CONFIG_ARM64_EPAN=y
+CONFIG_ARM64_ERRATUM_1024718=y
+CONFIG_ARM64_ERRATUM_1165522=y
+CONFIG_ARM64_ERRATUM_1286807=y
+CONFIG_ARM64_ERRATUM_1319367=y
+CONFIG_ARM64_ERRATUM_1463225=y
+CONFIG_ARM64_ERRATUM_1530923=y
 CONFIG_ARM64_ERRATUM_2051678=y
 CONFIG_ARM64_ERRATUM_2054223=y
 CONFIG_ARM64_ERRATUM_2067961=y
 CONFIG_ARM64_ERRATUM_2077057=y
+CONFIG_ARM64_ERRATUM_2441007=y
+CONFIG_ARM64_ERRATUM_2441009=y
 CONFIG_ARM64_ERRATUM_2658417=y
+CONFIG_ARM64_ERRATUM_3117295=y
 CONFIG_ARM64_ERRATUM_819472=y
 CONFIG_ARM64_ERRATUM_824069=y
 CONFIG_ARM64_ERRATUM_826319=y
@@ -52,6 +61,9 @@ CONFIG_ARM64_VA_BITS=48
 # CONFIG_ARM64_VA_BITS_39 is not set
 CONFIG_ARM64_VA_BITS_48=y
 CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
+CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
+CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
+CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD=y
 CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y
 CONFIG_ARM_AMBA=y
 CONFIG_ARM_ARCH_TIMER=y
@@ -163,6 +175,7 @@ CONFIG_CPU_IDLE_GOV_MENU=y
 CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
 CONFIG_CPU_ISOLATION=y
 CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_PM=y
 CONFIG_CPU_RMAP=y
 CONFIG_CPU_THERMAL=y
@@ -567,6 +580,7 @@ CONFIG_RELOCATABLE=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RESET_SCMI=y
 CONFIG_RFS_ACCEL=y
+CONFIG_ROCKCHIP_ERRATUM_3588001=y
 CONFIG_ROCKCHIP_GRF=y
 CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_ROCKCHIP_IOMMU=y
diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index df0ca6ffb5..b4404761bd 100644
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -81,6 +81,14 @@ define Device/friendlyarm_nanopi-r5s
 endef
 TARGET_DEVICES += friendlyarm_nanopi-r5s
 
+define Device/friendlyarm_nanopi-r6s
+  DEVICE_VENDOR := FriendlyARM
+  DEVICE_MODEL := NanoPi R6S
+  SOC := rk3588s
+  DEVICE_PACKAGES := kmod-r8169
+endef
+TARGET_DEVICES += friendlyarm_nanopi-r6s
+
 define Device/pine64_rock64
   DEVICE_VENDOR := Pine64
   DEVICE_MODEL := Rock64
@@ -109,11 +117,21 @@ define Device/radxa_e25
   DEVICE_MODEL := E25
   SOC := rk3568
   DEVICE_DTS := rockchip/rk3568-radxa-e25
+  BOOT_SCRIPT := radxa-e25
   UBOOT_DEVICE_NAME := radxa-e25-rk3568
-  DEVICE_PACKAGES := kmod-r8169 kmod-ata-ahci-platform
+  DEVICE_PACKAGES := kmod-r8169 kmod-ata-ahci-dwc
 endef
 TARGET_DEVICES += radxa_e25
 
+define Device/radxa_rock-3a
+  DEVICE_VENDOR := Radxa
+  DEVICE_MODEL := ROCK 3A
+  SOC := rk3568
+  SUPPORTED_DEVICES := radxa,rock3a
+  DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
+endef
+TARGET_DEVICES += radxa_rock-3a
+
 define Device/radxa_rock-pi-4a
   DEVICE_VENDOR := Radxa
   DEVICE_MODEL := ROCK Pi 4A
@@ -130,6 +148,25 @@ define Device/radxa_rock-pi-e
 endef
 TARGET_DEVICES += radxa_rock-pi-e
 
+define Device/radxa_rock-pi-e-v3
+  DEVICE_VENDOR := Radxa
+  DEVICE_MODEL := ROCK Pi E v3.0
+  SOC := rk3328
+  DEVICE_DTS := rockchip/rk3328-rock-pi-e
+  DEVICE_PACKAGES := kmod-rtw88-8723du kmod-usb-net-cdc-ncm kmod-usb-net-rndis wpad-basic-mbedtls
+endef
+TARGET_DEVICES += radxa_rock-pi-e-v3
+
+define Device/radxa_rock-pi-s
+  DEVICE_VENDOR := Radxa
+  DEVICE_MODEL := ROCK Pi S
+  SOC := rk3308
+  SUPPORTED_DEVICES := radxa,rockpis
+  BOOT_SCRIPT := rock-pi-s
+  DEVICE_PACKAGES := kmod-rtw88-8723ds kmod-usb-net-cdc-ncm kmod-usb-net-rndis wpad-basic-mbedtls
+endef
+TARGET_DEVICES += radxa_rock-pi-s
+
 define Device/sinovoip_bpi-r2-pro
   DEVICE_VENDOR := Sinovoip
   DEVICE_MODEL := Bananapi-R2 Pro
diff --git a/target/linux/rockchip/image/default.bootscript b/target/linux/rockchip/image/default.bootscript
index cca0b8d4ac..10ca93ceda 100644
--- a/target/linux/rockchip/image/default.bootscript
+++ b/target/linux/rockchip/image/default.bootscript
@@ -2,6 +2,8 @@ part uuid ${devtype} ${devnum}:2 uuid
 
 if test $stdout = 'serial@fe660000' ;
 then serial_addr=',0xfe660000';
+elif test $stdout = 'serial@feb50000' ;
+then serial_addr=',0xfeb50000';
 elif test $stdout = 'serial@ff130000' ;
 then serial_addr=',0xff130000';
 elif test $stdout = 'serial@ff1a0000' ;
diff --git a/target/linux/rockchip/image/radxa-e25.bootscript b/target/linux/rockchip/image/radxa-e25.bootscript
new file mode 100644
index 0000000000..c91319f7fc
--- /dev/null
+++ b/target/linux/rockchip/image/radxa-e25.bootscript
@@ -0,0 +1,7 @@
+part uuid ${devtype} ${devnum}:2 uuid
+
+setenv bootargs "console=ttyS2,115200 earlycon=uart8250,mmio32,0xfe660000 root=PARTUUID=${uuid} rw rootwait";
+
+load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
+
+bootm ${kernel_addr_r}
diff --git a/target/linux/rockchip/image/rock-pi-s.bootscript b/target/linux/rockchip/image/rock-pi-s.bootscript
new file mode 100644
index 0000000000..c968e53d81
--- /dev/null
+++ b/target/linux/rockchip/image/rock-pi-s.bootscript
@@ -0,0 +1,7 @@
+part uuid ${devtype} ${devnum}:2 uuid
+
+setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32,0xff0a0000 root=PARTUUID=${uuid} rw rootwait";
+
+load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
+
+bootm ${kernel_addr_r}
diff --git a/target/linux/rockchip/patches-6.6/010-next-soc-rockchip-io-domain-Add-RK3308-IO-voltage-domains.patch b/target/linux/rockchip/patches-6.6/010-next-soc-rockchip-io-domain-Add-RK3308-IO-voltage-domains.patch
new file mode 100644
index 0000000000..bb7f833977
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/010-next-soc-rockchip-io-domain-Add-RK3308-IO-voltage-domains.patch
@@ -0,0 +1,86 @@
+From 0536fa6e6fa3e48f4ca11855b586c277be524fbe Mon Sep 17 00:00:00 2001
+From: David Wu <david.wu@rock-chips.com>
+Date: Tue, 21 May 2024 21:10:13 +0000
+Subject: [PATCH] soc: rockchip: io-domain: Add RK3308 IO voltage domains
+
+Add IO voltage domains support for the RK3308 SoC.
+
+Signed-off-by: David Wu <david.wu@rock-chips.com>
+Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://lore.kernel.org/r/20240521211029.1236094-11-jonas@kwiboo.se
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ drivers/soc/rockchip/io-domain.c | 40 ++++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+--- a/drivers/soc/rockchip/io-domain.c
++++ b/drivers/soc/rockchip/io-domain.c
+@@ -39,6 +39,10 @@
+ #define RK3288_SOC_CON2_FLASH0		BIT(7)
+ #define RK3288_SOC_FLASH_SUPPLY_NUM	2
+ 
++#define RK3308_SOC_CON0			0x300
++#define RK3308_SOC_CON0_VCCIO3		BIT(8)
++#define RK3308_SOC_VCCIO3_SUPPLY_NUM	3
++
+ #define RK3328_SOC_CON4			0x410
+ #define RK3328_SOC_CON4_VCCIO2		BIT(7)
+ #define RK3328_SOC_VCCIO2_SUPPLY_NUM	1
+@@ -229,6 +233,25 @@ static void rk3288_iodomain_init(struct
+ 		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+ }
+ 
++static void rk3308_iodomain_init(struct rockchip_iodomain *iod)
++{
++	int ret;
++	u32 val;
++
++	/* if no vccio3 supply we should leave things alone */
++	if (!iod->supplies[RK3308_SOC_VCCIO3_SUPPLY_NUM].reg)
++		return;
++
++	/*
++	 * set vccio3 iodomain to also use this framework
++	 * instead of a special gpio.
++	 */
++	val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
++	ret = regmap_write(iod->grf, RK3308_SOC_CON0, val);
++	if (ret < 0)
++		dev_warn(iod->dev, "couldn't update vccio3 vsel ctrl\n");
++}
++
+ static void rk3328_iodomain_init(struct rockchip_iodomain *iod)
+ {
+ 	int ret;
+@@ -376,6 +399,19 @@ static const struct rockchip_iodomain_so
+ 	.init = rk3288_iodomain_init,
+ };
+ 
++static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
++	.grf_offset = 0x300,
++	.supply_names = {
++		"vccio0",
++		"vccio1",
++		"vccio2",
++		"vccio3",
++		"vccio4",
++		"vccio5",
++	},
++	.init = rk3308_iodomain_init,
++};
++
+ static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
+ 	.grf_offset = 0x410,
+ 	.supply_names = {
+@@ -529,6 +565,10 @@ static const struct of_device_id rockchi
+ 		.data = &soc_data_rk3288
+ 	},
+ 	{
++		.compatible = "rockchip,rk3308-io-voltage-domain",
++		.data = &soc_data_rk3308
++	},
++	{
+ 		.compatible = "rockchip,rk3328-io-voltage-domain",
+ 		.data = &soc_data_rk3328
+ 	},
diff --git a/target/linux/rockchip/patches-6.6/011-v6.11-arm64-dts-rockchip-Add-rk3308-IO-voltage-domains.patch b/target/linux/rockchip/patches-6.6/011-v6.11-arm64-dts-rockchip-Add-rk3308-IO-voltage-domains.patch
new file mode 100644
index 0000000000..3565acd2e4
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/011-v6.11-arm64-dts-rockchip-Add-rk3308-IO-voltage-domains.patch
@@ -0,0 +1,28 @@
+From d1829ba469d5743734e37d59fece73e3668ab084 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 21 May 2024 21:10:14 +0000
+Subject: [PATCH] arm64: dts: rockchip: Add rk3308 IO voltage domains
+
+Add a disabled RK3308 IO voltage domains node to SoC DT.
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://lore.kernel.org/r/20240521211029.1236094-12-jonas@kwiboo.se
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+@@ -168,6 +168,11 @@
+ 		compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
+ 		reg = <0x0 0xff000000 0x0 0x08000>;
+ 
++		io_domains: io-domains {
++			compatible = "rockchip,rk3308-io-voltage-domain";
++			status = "disabled";
++		};
++
+ 		reboot-mode {
+ 			compatible = "syscon-reboot-mode";
+ 			offset = <0x500>;
diff --git a/target/linux/rockchip/patches-6.6/031-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch b/target/linux/rockchip/patches-6.6/031-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch
new file mode 100644
index 0000000000..e5afbb4f40
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/031-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch
@@ -0,0 +1,792 @@
+From f1b11f43b3e983b26d8010fc43ba6c2b979826f2 Mon Sep 17 00:00:00 2001
+From: Muhammed Efe Cetin <efectn@protonmail.com>
+Date: Sat, 30 Dec 2023 14:18:00 +0300
+Subject: [PATCH] arm64: dts: rockchip: Add support for NanoPi R6S
+
+Add basic NanoPi R6S support that comes with USB2, PCIe, SD card, eMMC
+support.
+
+Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
+Link: https://lore.kernel.org/r/6db3b653efc6f0a2dca8e96fdd0503906db72fb6.1703934548.git.efectn@protonmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile         |   1 +
+ .../boot/dts/rockchip/rk3588s-nanopi-r6s.dts  | 764 ++++++++++++++++++
+ 2 files changed, 765 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -104,4 +104,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-na
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
+@@ -0,0 +1,764 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/pinctrl/rockchip.h>
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include "rk3588s.dtsi"
++
++/ {
++	model = "FriendlyElec NanoPi R6S";
++	compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588s";
++
++	aliases {
++		ethernet0 = &gmac1;
++		mmc0 = &sdmmc;
++		mmc1 = &sdhci;
++	};
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	adc-keys {
++		compatible = "adc-keys";
++		io-channels = <&saradc 0>;
++		io-channel-names = "buttons";
++		keyup-threshold-microvolt = <1800000>;
++		poll-interval = <100>;
++
++		button-maskrom {
++			label = "Maskrom";
++			linux,code = <KEY_VENDOR>;
++			press-threshold-microvolt = <1800>;
++		};
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		pinctrl-names = "default";
++		pinctrl-0 = <&key1_pin>;
++
++		button-user {
++			label = "User";
++			linux,code = <BTN_1>;
++			gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
++			debounce-interval = <50>;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		sys_led: led-0 {
++			label = "sys_led";
++			gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
++			linux,default-trigger = "heartbeat";
++			pinctrl-names = "default";
++			pinctrl-0 = <&sys_led_pin>;
++		};
++
++		wan_led: led-1 {
++			label = "wan_led";
++			gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&wan_led_pin>;
++		};
++
++		lan1_led: led-2 {
++			label = "lan1_led";
++			gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&lan1_led_pin>;
++		};
++
++		lan2_led: led-3 {
++			label = "lan2_led";
++			gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&lan2_led_pin>;
++		};
++	};
++
++	vcc5v0_sys: vcc5v0-sys-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_1v1_nldo_s3";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <1100000>;
++		regulator-max-microvolt = <1100000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	vcc_3v3_s0: vcc-3v3-s0-regulator {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-name = "vcc_3v3_s0";
++		vin-supply = <&vcc_3v3_s3>;
++	};
++
++	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&sd_s0_pwr>;
++		regulator-name = "vcc_3v3_sd_s0";
++		regulator-boot-on;
++		regulator-max-microvolt = <3000000>;
++		regulator-min-microvolt = <3000000>;
++		vin-supply = <&vcc_3v3_s3>;
++	};
++
++	vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_3v3_pcie20";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vcc_3v3_s3>;
++	};
++
++	vcc5v0_usb: vcc5v0-usb-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_usb";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&typec5v_pwren>;
++		regulator-name = "vcc5v0_usb_otg0";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_usb>;
++	};
++
++	vcc5v0_host_20: vcc5v0-host-20-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc5v0_host20_en>;
++		regulator-name = "vcc5v0_host_20";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_usb>;
++	};
++};
++
++&combphy0_ps {
++	status = "okay";
++};
++
++&combphy2_psu {
++	status = "okay";
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b2 {
++	cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_b3 {
++	cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&gmac1 {
++	clock_in_out = "output";
++	phy-handle = <&rgmii_phy1>;
++	phy-mode = "rgmii-rxid";
++	pinctrl-0 = <&gmac1_miim
++		     &gmac1_tx_bus2
++		     &gmac1_rx_bus2
++		     &gmac1_rgmii_clk
++		     &gmac1_rgmii_bus>;
++	pinctrl-names = "default";
++	tx_delay = <0x42>;
++	status = "okay";
++};
++
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0m2_xfer>;
++	status = "okay";
++
++	vdd_cpu_big0_s0: regulator@42 {
++		compatible = "rockchip,rk8602";
++		reg = <0x42>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu_big0_s0";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <550000>;
++		regulator-max-microvolt = <1050000>;
++		regulator-ramp-delay = <2300>;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_cpu_big1_s0: regulator@43 {
++		compatible = "rockchip,rk8603", "rockchip,rk8602";
++		reg = <0x43>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu_big1_s0";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <550000>;
++		regulator-max-microvolt = <1050000>;
++		regulator-ramp-delay = <2300>;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++};
++
++&i2c2 {
++	status = "okay";
++
++	vdd_npu_s0: regulator@42 {
++		compatible = "rockchip,rk8602";
++		reg = <0x42>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_npu_s0";
++		regulator-min-microvolt = <550000>;
++		regulator-max-microvolt = <950000>;
++		regulator-ramp-delay = <2300>;
++		regulator-boot-on;
++		regulator-always-on;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++};
++
++&i2c6 {
++	clock-frequency = <200000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c6m0_xfer>;
++	status = "okay";
++
++	hym8563: rtc@51 {
++		compatible = "haoyu,hym8563";
++		reg = <0x51>;
++		#clock-cells = <0>;
++		clock-output-names = "hym8563";
++		pinctrl-names = "default";
++		pinctrl-0 = <&rtc_int>;
++		interrupt-parent = <&gpio0>;
++		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
++		wakeup-source;
++	};
++};
++
++&mdio1 {
++	rgmii_phy1: ethernet-phy@1 {
++		compatible = "ethernet-phy-id001c.c916";
++		reg = <0x1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&rtl8211f_rst>;
++		reset-assert-us = <20000>;
++		reset-deassert-us = <100000>;
++		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++	};
++};
++
++&pcie2x1l1 {
++	reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
++	vpcie3v3-supply = <&vcc_3v3_pcie20>;
++	status = "okay";
++};
++
++&pcie2x1l2 {
++	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
++	vpcie3v3-supply = <&vcc_3v3_pcie20>;
++	status = "okay";
++};
++
++&pinctrl {
++	gpio-key {
++		key1_pin: key1-pin {
++			rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	gpio-leds {
++		sys_led_pin: sys-led-pin {
++			rockchip,pins =
++				<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		wan_led_pin: wan-led-pin {
++			rockchip,pins =
++				<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		lan1_led_pin: lan1-led-pin {
++			rockchip,pins =
++				<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		lan2_led_pin: lan2-led-pin {
++			rockchip,pins =
++				<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	hym8563 {
++		rtc_int: rtc-int {
++			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	sdmmc {
++		sd_s0_pwr: sd-s0-pwr {
++			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	usb {
++		typec5v_pwren: typec5v-pwren {
++			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		vcc5v0_host20_en: vcc5v0-host20-en {
++			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	rtl8211f {
++		rtl8211f_rst: rtl8211f-rst {
++			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++};
++
++&saradc {
++	vref-supply = <&avcc_1v8_s0>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	no-sdio;
++	no-sd;
++	non-removable;
++	mmc-hs200-1_8v;
++	status = "okay";
++};
++
++&sdmmc {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	disable-wp;
++	max-frequency = <150000000>;
++	no-mmc;
++	no-sdio;
++	sd-uhs-sdr104;
++	vmmc-supply = <&vcc_3v3_sd_s0>;
++	vqmmc-supply = <&vccio_sd_s0>;
++	status = "okay";
++};
++
++&spi2 {
++	status = "okay";
++	assigned-clocks = <&cru CLK_SPI2>;
++	assigned-clock-rates = <200000000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
++	num-cs = <1>;
++
++	pmic@0 {
++		compatible = "rockchip,rk806";
++		spi-max-frequency = <1000000>;
++		reg = <0x0>;
++
++		interrupt-parent = <&gpio0>;
++		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
++			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
++
++		system-power-controller;
++
++		vcc1-supply = <&vcc5v0_sys>;
++		vcc2-supply = <&vcc5v0_sys>;
++		vcc3-supply = <&vcc5v0_sys>;
++		vcc4-supply = <&vcc5v0_sys>;
++		vcc5-supply = <&vcc5v0_sys>;
++		vcc6-supply = <&vcc5v0_sys>;
++		vcc7-supply = <&vcc5v0_sys>;
++		vcc8-supply = <&vcc5v0_sys>;
++		vcc9-supply = <&vcc5v0_sys>;
++		vcc10-supply = <&vcc5v0_sys>;
++		vcc11-supply = <&vcc_2v0_pldo_s3>;
++		vcc12-supply = <&vcc5v0_sys>;
++		vcc13-supply = <&vcc_1v1_nldo_s3>;
++		vcc14-supply = <&vcc_1v1_nldo_s3>;
++		vcca-supply = <&vcc5v0_sys>;
++
++		gpio-controller;
++		#gpio-cells = <2>;
++
++		rk806_dvs1_null: dvs1-null-pins {
++			pins = "gpio_pwrctrl1";
++			function = "pin_fun0";
++		};
++
++		rk806_dvs2_null: dvs2-null-pins {
++			pins = "gpio_pwrctrl2";
++			function = "pin_fun0";
++		};
++
++		rk806_dvs3_null: dvs3-null-pins {
++			pins = "gpio_pwrctrl3";
++			function = "pin_fun0";
++		};
++
++		regulators {
++			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
++				regulator-boot-on;
++				regulator-min-microvolt = <550000>;
++				regulator-max-microvolt = <950000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_gpu_s0";
++				regulator-enable-ramp-delay = <400>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <550000>;
++				regulator-max-microvolt = <950000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_cpu_lit_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_log_s0: dcdc-reg3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <675000>;
++				regulator-max-microvolt = <750000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_log_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <750000>;
++				};
++			};
++
++			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <550000>;
++				regulator-max-microvolt = <950000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_vdenc_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_ddr_s0: dcdc-reg5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <675000>;
++				regulator-max-microvolt = <900000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_ddr_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <850000>;
++				};
++			};
++
++			vdd2_ddr_s3: dcdc-reg6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vdd2_ddr_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_2v0_pldo_s3: dcdc-reg7 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <2000000>;
++				regulator-max-microvolt = <2000000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vdd_2v0_pldo_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <2000000>;
++				};
++			};
++
++			vcc_3v3_s3: dcdc-reg8 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc_3v3_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vddq_ddr_s0: dcdc-reg9 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vddq_ddr_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v8_s3: dcdc-reg10 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_1v8_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			avcc_1v8_s0: pldo-reg1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "avcc_1v8_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_1v8_s0: pldo-reg2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_1v8_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			avdd_1v2_s0: pldo-reg3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <1200000>;
++				regulator-name = "avdd_1v2_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			avcc_3v3_s0: pldo-reg4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "avcc_3v3_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vccio_sd_s0: pldo-reg5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-ramp-delay = <12500>;
++				regulator-name = "vccio_sd_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			pldo6_s3: pldo-reg6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "pldo6_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vdd_0v75_s3: nldo-reg1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <750000>;
++				regulator-name = "vdd_0v75_s3";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <750000>;
++				};
++			};
++
++			avdd_ddr_pll_s0: nldo-reg2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <850000>;
++				regulator-max-microvolt = <850000>;
++				regulator-name = "avdd_ddr_pll_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <850000>;
++				};
++			};
++
++			avdd_0v75_s0: nldo-reg3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <750000>;
++				regulator-name = "avdd_0v75_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			avdd_0v85_s0: nldo-reg4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <850000>;
++				regulator-max-microvolt = <850000>;
++				regulator-name = "avdd_0v85_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_0v75_s0: nldo-reg5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <750000>;
++				regulator-name = "vdd_0v75_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++};
++
++&tsadc {
++	status = "okay";
++};
++
++&u2phy2 {
++	status = "okay";
++};
++
++&u2phy2_host {
++	phy-supply = <&vcc5v0_host_20>;
++	status = "okay";
++};
++
++&uart2 {
++	pinctrl-0 = <&uart2m0_xfer>;
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_host0_ohci {
++	status = "okay";
++};
diff --git a/target/linux/rockchip/patches-6.6/032-v6.8-arm64-dts-rockchip-move-rk3588-serial-aliases-to-soc-dtsi.patch b/target/linux/rockchip/patches-6.6/032-v6.8-arm64-dts-rockchip-move-rk3588-serial-aliases-to-soc-dtsi.patch
new file mode 100644
index 0000000000..88919893a3
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/032-v6.8-arm64-dts-rockchip-move-rk3588-serial-aliases-to-soc-dtsi.patch
@@ -0,0 +1,129 @@
+From 9918d10d16665527e59fdb87c5acac70cc1cfe8f Mon Sep 17 00:00:00 2001
+From: Heiko Stuebner <heiko.stuebner@cherry.de>
+Date: Tue, 5 Dec 2023 17:48:39 +0100
+Subject: [PATCH] arm64: dts: rockchip: move rk3588 serial aliases to soc dtsi
+
+The serial ports on rk3588 are named uart0 - uart9. Board schematics
+also use these exact numbers and we want those names to also reflect
+in the OS devices because everything else would just cause confusion.
+
+To prevent each board repeating their list of serial aliases, move them
+to the soc dtsi, as all previous Rockchip soc do already.
+
+Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
+Reviewed-by: Dragan Simic <dsimic@manjaro.org>
+Link: https://lore.kernel.org/r/20231205164842.556684-2-heiko@sntech.de
+---
+ .../boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts   |  4 ----
+ .../boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts   |  4 ----
+ arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts    |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts   |  1 -
+ .../boot/dts/rockchip/rk3588-orangepi-5-plus.dts    |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts     |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi |  2 --
+ .../boot/dts/rockchip/rk3588s-indiedroid-nova.dts   |  1 -
+ .../boot/dts/rockchip/rk3588s-khadas-edge2.dts      |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts    |  1 -
+ arch/arm64/boot/dts/rockchip/rk3588s.dtsi           | 13 +++++++++++++
+ 13 files changed, 13 insertions(+), 19 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
+@@ -12,10 +12,6 @@
+ 	compatible = "edgeble,neural-compute-module-6a-io",
+ 		     "edgeble,neural-compute-module-6a", "rockchip,rk3588";
+ 
+-	aliases {
+-		serial2 = &uart2;
+-	};
+-
+ 	chosen {
+ 		stdout-path = "serial2:1500000n8";
+ 	};
+--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
+@@ -12,10 +12,6 @@
+ 	compatible = "edgeble,neural-compute-module-6b-io",
+ 		     "edgeble,neural-compute-module-6b", "rockchip,rk3588";
+ 
+-	aliases {
+-		serial2 = &uart2;
+-	};
+-
+ 	chosen {
+ 		stdout-path = "serial2:1500000n8";
+ 	};
+--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+@@ -16,7 +16,6 @@
+ 
+ 	aliases {
+ 		mmc0 = &sdhci;
+-		serial2 = &uart2;
+ 	};
+ 
+ 	chosen {
+--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
+@@ -19,7 +19,6 @@
+ 	aliases {
+ 		mmc0 = &sdhci;
+ 		mmc1 = &sdmmc;
+-		serial2 = &uart2;
+ 	};
+ 
+ 	chosen {
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
+@@ -15,7 +15,6 @@
+ 		mmc0 = &sdhci;
+ 		mmc1 = &sdmmc;
+ 		mmc2 = &sdio;
+-		serial2 = &uart2;
+ 	};
+ 
+ 	chosen {
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+@@ -12,7 +12,6 @@
+ 
+ 	aliases {
+ 		mmc0 = &sdhci;
+-		serial2 = &uart2;
+ 	};
+ 
+ 	chosen {
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -14,7 +14,6 @@
+ 	aliases {
+ 		mmc0 = &sdhci;
+ 		mmc1 = &sdmmc;
+-		serial2 = &uart2;
+ 	};
+ 
+ 	analog-sound {
+--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+@@ -18,6 +18,19 @@
+ 	#address-cells = <2>;
+ 	#size-cells = <2>;
+ 
++	aliases {
++		serial0 = &uart0;
++		serial1 = &uart1;
++		serial2 = &uart2;
++		serial3 = &uart3;
++		serial4 = &uart4;
++		serial5 = &uart5;
++		serial6 = &uart6;
++		serial7 = &uart7;
++		serial8 = &uart8;
++		serial9 = &uart9;
++	};
++
+ 	cpus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
diff --git a/target/linux/rockchip/patches-6.6/033-v6.8-arm64-dts-rockchip-add-rk3588-i2c-aliases-to-soc-dtsi.patch b/target/linux/rockchip/patches-6.6/033-v6.8-arm64-dts-rockchip-add-rk3588-i2c-aliases-to-soc-dtsi.patch
new file mode 100644
index 0000000000..2daaec3953
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/033-v6.8-arm64-dts-rockchip-add-rk3588-i2c-aliases-to-soc-dtsi.patch
@@ -0,0 +1,38 @@
+From 328e901b7b03d292c1520ffb38e9164feef4f1ea Mon Sep 17 00:00:00 2001
+From: Heiko Stuebner <heiko.stuebner@cherry.de>
+Date: Tue, 5 Dec 2023 17:48:40 +0100
+Subject: [PATCH] arm64: dts: rockchip: add rk3588 i2c aliases to soc dtsi
+
+The i2c controllers on rk3588 are named i2c0 - i2c8. Board schematics
+also use these exact numbers and we want those names to also reflect
+in the OS devices because everything else would just cause confusion.
+Userspace i2c access is a thing afterall.
+
+To prevent each board repeating their list of i2c aliases, define them
+in the soc dtsi, as all previous Rockchip soc do already.
+
+Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
+Reviewed-by: Dragan Simic <dsimic@manjaro.org>
+Link: https://lore.kernel.org/r/20231205164842.556684-3-heiko@sntech.de
+---
+ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+@@ -19,6 +19,15 @@
+ 	#size-cells = <2>;
+ 
+ 	aliases {
++		i2c0 = &i2c0;
++		i2c1 = &i2c1;
++		i2c2 = &i2c2;
++		i2c3 = &i2c3;
++		i2c4 = &i2c4;
++		i2c5 = &i2c5;
++		i2c6 = &i2c6;
++		i2c7 = &i2c7;
++		i2c8 = &i2c8;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 		serial2 = &uart2;
diff --git a/target/linux/rockchip/patches-6.6/034-v6.8-arm64-dts-rockchip-add-rk3588-gpio-aliases-to-soc-dtsi.patch b/target/linux/rockchip/patches-6.6/034-v6.8-arm64-dts-rockchip-add-rk3588-gpio-aliases-to-soc-dtsi.patch
new file mode 100644
index 0000000000..19e6c6a4f5
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/034-v6.8-arm64-dts-rockchip-add-rk3588-gpio-aliases-to-soc-dtsi.patch
@@ -0,0 +1,34 @@
+From a024abedbca99a20aeb96f5beec9ded13c85dcb3 Mon Sep 17 00:00:00 2001
+From: Heiko Stuebner <heiko.stuebner@cherry.de>
+Date: Tue, 5 Dec 2023 17:48:41 +0100
+Subject: [PATCH] arm64: dts: rockchip: add rk3588 gpio aliases to soc dtsi
+
+The gpio controllers on rk3588 are named gpio0 - gpio4. Board schematics
+also use these exact numbers and we want those names to also reflect
+in the OS devices because everything else would just cause confusion.
+Userspace gpio access is a thing afterall.
+
+To prevent each board repeating their list of gpio aliases, define them
+in the soc dtsi, as previous Rockchip soc like the rk356x do already.
+
+Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
+Reviewed-by: Dragan Simic <dsimic@manjaro.org>
+Link: https://lore.kernel.org/r/20231205164842.556684-4-heiko@sntech.de
+---
+ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+@@ -19,6 +19,11 @@
+ 	#size-cells = <2>;
+ 
+ 	aliases {
++		gpio0 = &gpio0;
++		gpio1 = &gpio1;
++		gpio2 = &gpio2;
++		gpio3 = &gpio3;
++		gpio4 = &gpio4;
+ 		i2c0 = &i2c0;
+ 		i2c1 = &i2c1;
+ 		i2c2 = &i2c2;
diff --git a/target/linux/rockchip/patches-6.6/035-v6.8-arm64-dts-rockchip-add-rk3588-spi-aliases-to-soc-dtsi.patch b/target/linux/rockchip/patches-6.6/035-v6.8-arm64-dts-rockchip-add-rk3588-spi-aliases-to-soc-dtsi.patch
new file mode 100644
index 0000000000..6a66d99668
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/035-v6.8-arm64-dts-rockchip-add-rk3588-spi-aliases-to-soc-dtsi.patch
@@ -0,0 +1,34 @@
+From a86e88043de929da76f7f6cf0990ba92aed8391a Mon Sep 17 00:00:00 2001
+From: Heiko Stuebner <heiko.stuebner@cherry.de>
+Date: Tue, 5 Dec 2023 17:48:42 +0100
+Subject: [PATCH] arm64: dts: rockchip: add rk3588 spi aliases to soc dtsi
+
+The spi controllers on rk3588 are named spi0 - spi4. Board schematics
+also use these exact numbers and we want those names to also reflect
+in the OS devices because everything else would just cause confusion.
+Userspace spi access is a thing afterall.
+
+To prevent each board repeating their list of spi aliases, define them
+in the soc dtsi, as previous Rockchip soc like the rk356x do already.
+
+Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
+Reviewed-by: Dragan Simic <dsimic@manjaro.org>
+Link: https://lore.kernel.org/r/20231205164842.556684-5-heiko@sntech.de
+---
+ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+@@ -43,6 +43,11 @@
+ 		serial7 = &uart7;
+ 		serial8 = &uart8;
+ 		serial9 = &uart9;
++		spi0 = &spi0;
++		spi1 = &spi1;
++		spi2 = &spi2;
++		spi3 = &spi3;
++		spi4 = &spi4;
+ 	};
+ 
+ 	cpus {
diff --git a/target/linux/rockchip/patches-6.6/040-v6.8-arm64-dts-rockchip-add-gpio-line-names-to-rk3308-roc.patch b/target/linux/rockchip/patches-6.6/040-v6.8-arm64-dts-rockchip-add-gpio-line-names-to-rk3308-roc.patch
new file mode 100644
index 0000000000..83ebe67789
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/040-v6.8-arm64-dts-rockchip-add-gpio-line-names-to-rk3308-roc.patch
@@ -0,0 +1,84 @@
+From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001
+From: Trevor Woerner <twoerner@gmail.com>
+Date: Mon, 20 Nov 2023 11:22:32 -0500
+Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s
+
+Add names to the pins of the general-purpose expansion header as given in the
+Radxa GPIO page[1] following the conventions in the kernel documentation[2] to
+make it easier for users to correlate the pins with functions when using
+utilities such as gpioinfo.
+
+[1] https://wiki.radxa.com/RockpiS/hardware/gpio
+[2] Documentation/devicetree/bindings/gpio/gpio.txt
+
+Signed-off-by: Trevor Woerner <twoerner@gmail.com>
+Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3308-rock-pi-s.dts    | 58 +++++++++++++++++++
+ 1 file changed, 58 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -315,3 +315,61 @@
+ &wdt {
+ 	status = "okay";
+ };
++
++&gpio0 {
++	gpio-line-names =
++	/* GPIO0_A0 - A7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO0_B0 - B7 */
++	"", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
++	"", "", "header1-pin11 [GPIO0_B7]",
++	/* GPIO0_C0 - C7 */
++	"header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
++	"", "", "",
++	/* GPIO0_D0 - D8 */
++	"", "", "", "", "", "", "", "";
++};
++
++&gpio1 {
++	gpio-line-names =
++	/* GPIO1_A0 - A7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO1_B0 - B7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO1_C0 - C7 */
++	"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
++	"header1-pin19 [GPIO1_C7]",
++	/* GPIO1_D0 - D8 */
++	"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
++	"", "", "";
++};
++
++&gpio2 {
++	gpio-line-names =
++	/* GPIO2_A0 - A7 */
++	"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
++	"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
++	"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
++	/* GPIO2_B0 - B7 */
++	"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
++	"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
++	"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
++	"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
++	/* GPIO2_C0 - C7 */
++	"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
++	/* GPIO2_D0 - D8 */
++	"", "", "", "", "", "", "", "";
++};
++
++&gpio3 {
++	gpio-line-names =
++	/* GPIO3_A0 - A7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO3_B0 - B7 */
++	"", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
++	"header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
++	/* GPIO3_C0 - C7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO3_D0 - D8 */
++	"", "", "", "", "", "", "", "";
++};
diff --git a/target/linux/rockchip/patches-6.6/041-v6.8-arm64-dts-rockchip-rk3308-rock-pi-s-gpio-line-names-.patch b/target/linux/rockchip/patches-6.6/041-v6.8-arm64-dts-rockchip-rk3308-rock-pi-s-gpio-line-names-.patch
new file mode 100644
index 0000000000..994644e142
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/041-v6.8-arm64-dts-rockchip-rk3308-rock-pi-s-gpio-line-names-.patch
@@ -0,0 +1,152 @@
+From 085021cc825ed90a6ddc4406f608fb8a85745f81 Mon Sep 17 00:00:00 2001
+From: Trevor Woerner <twoerner@gmail.com>
+Date: Tue, 19 Dec 2023 12:38:13 -0500
+Subject: [PATCH] arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names
+ cleanup
+
+Perform the following cleanups on a previous patch:
+- indent lines after "gpio-line-names"
+- fix D0-D8 -> D0-D7
+- sort phandle references
+
+Fixes: c45de75d7a9a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s")
+Signed-off-by: Trevor Woerner <twoerner@gmail.com>
+Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3308-rock-pi-s.dts    | 120 +++++++++---------
+ 1 file changed, 62 insertions(+), 58 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -166,6 +166,68 @@
+ 	};
+ };
+ 
++&gpio0 {
++	gpio-line-names =
++		/* GPIO0_A0 - A7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO0_B0 - B7 */
++		"", "", "", "header1-pin3 [GPIO0_B3]",
++		"header1-pin5 [GPIO0_B4]", "", "",
++		"header1-pin11 [GPIO0_B7]",
++		/* GPIO0_C0 - C7 */
++		"header1-pin13 [GPIO0_C0]",
++		"header1-pin15 [GPIO0_C1]", "", "", "",
++		"", "", "",
++		/* GPIO0_D0 - D7 */
++		"", "", "", "", "", "", "", "";
++};
++
++&gpio1 {
++	gpio-line-names =
++		/* GPIO1_A0 - A7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO1_B0 - B7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO1_C0 - C7 */
++		"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
++		"header1-pin19 [GPIO1_C7]",
++		/* GPIO1_D0 - D7 */
++		"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]",
++		"", "", "", "", "", "";
++};
++
++&gpio2 {
++	gpio-line-names =
++		/* GPIO2_A0 - A7 */
++		"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]",
++		"", "",
++		"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
++		"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
++		/* GPIO2_B0 - B7 */
++		"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
++		"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
++		"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
++		"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
++		/* GPIO2_C0 - C7 */
++		"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
++		/* GPIO2_D0 - D7 */
++		"", "", "", "", "", "", "", "";
++};
++
++&gpio3 {
++	gpio-line-names =
++		/* GPIO3_A0 - A7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO3_B0 - B7 */
++		"", "", "header2-pin42 [GPIO3_B2]",
++		"header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]",
++		"header2-pin39 [GPIO3_B5]", "", "",
++		/* GPIO3_C0 - C7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO3_D0 - D7 */
++		"", "", "", "", "", "", "", "";
++};
++
+ &i2c1 {
+ 	status = "okay";
+ };
+@@ -315,61 +377,3 @@
+ &wdt {
+ 	status = "okay";
+ };
+-
+-&gpio0 {
+-	gpio-line-names =
+-	/* GPIO0_A0 - A7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO0_B0 - B7 */
+-	"", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
+-	"", "", "header1-pin11 [GPIO0_B7]",
+-	/* GPIO0_C0 - C7 */
+-	"header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
+-	"", "", "",
+-	/* GPIO0_D0 - D8 */
+-	"", "", "", "", "", "", "", "";
+-};
+-
+-&gpio1 {
+-	gpio-line-names =
+-	/* GPIO1_A0 - A7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO1_B0 - B7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO1_C0 - C7 */
+-	"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
+-	"header1-pin19 [GPIO1_C7]",
+-	/* GPIO1_D0 - D8 */
+-	"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
+-	"", "", "";
+-};
+-
+-&gpio2 {
+-	gpio-line-names =
+-	/* GPIO2_A0 - A7 */
+-	"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
+-	"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
+-	"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
+-	/* GPIO2_B0 - B7 */
+-	"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
+-	"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
+-	"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
+-	"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
+-	/* GPIO2_C0 - C7 */
+-	"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
+-	/* GPIO2_D0 - D8 */
+-	"", "", "", "", "", "", "", "";
+-};
+-
+-&gpio3 {
+-	gpio-line-names =
+-	/* GPIO3_A0 - A7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO3_B0 - B7 */
+-	"", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
+-	"header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
+-	/* GPIO3_C0 - C7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO3_D0 - D8 */
+-	"", "", "", "", "", "", "", "";
+-};
diff --git a/target/linux/rockchip/patches-6.6/047-v6.11-arm64-dts-rockchip-Add-io-domains-to-rk3308-rock-pi-.patch b/target/linux/rockchip/patches-6.6/047-v6.11-arm64-dts-rockchip-Add-io-domains-to-rk3308-rock-pi-.patch
new file mode 100644
index 0000000000..ad746df3b0
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/047-v6.11-arm64-dts-rockchip-Add-io-domains-to-rk3308-rock-pi-.patch
@@ -0,0 +1,35 @@
+From 100b3bdee6035192f6d4a1847970fe004bb505fb Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 21 May 2024 21:10:15 +0000
+Subject: [PATCH] arm64: dts: rockchip: Add io-domains to rk3308-rock-pi-s
+
+The VCCIO4 io-domain used for WiFi/BT is using 1v8 IO signal voltage.
+
+Add io-domains node with the VCCIO supplies connected on the board.
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://lore.kernel.org/r/20240521211029.1236094-13-jonas@kwiboo.se
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -232,6 +232,16 @@
+ 	status = "okay";
+ };
+ 
++&io_domains {
++	vccio0-supply = <&vcc_io>;
++	vccio1-supply = <&vcc_io>;
++	vccio2-supply = <&vcc_io>;
++	vccio3-supply = <&vcc_io>;
++	vccio4-supply = <&vcc_1v8>;
++	vccio5-supply = <&vcc_io>;
++	status = "okay";
++};
++
+ &pinctrl {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&rtc_32k>;
diff --git a/target/linux/rockchip/patches-6.6/112-radxa-e25-add-led-aliases.patch b/target/linux/rockchip/patches-6.6/112-radxa-e25-add-led-aliases-and-stop-heartbeat.patch
index 75038c7f39..6bcde5b8eb 100644
--- a/target/linux/rockchip/patches-6.6/112-radxa-e25-add-led-aliases.patch
+++ b/target/linux/rockchip/patches-6.6/112-radxa-e25-add-led-aliases-and-stop-heartbeat.patch
@@ -22,3 +22,14 @@ Signed-off-by: Marius Durbaca <mariusd84@gmail.com>
  	};
  
  	pwm-leds {
+--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
+@@ -23,7 +23,7 @@
+ 			gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ 			function = LED_FUNCTION_HEARTBEAT;
+ 			color = <LED_COLOR_ID_GREEN>;
+-			linux,default-trigger = "heartbeat";
++			default-state = "on";
+ 			pinctrl-names = "default";
+ 			pinctrl-0 = <&led_user_en>;
+ 		};
diff --git a/target/linux/rockchip/patches-6.6/113-rock-pi-s-add-led-aliases-and-stop-heartbeat.patch b/target/linux/rockchip/patches-6.6/113-rock-pi-s-add-led-aliases-and-stop-heartbeat.patch
new file mode 100644
index 0000000000..48a617b09a
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/113-rock-pi-s-add-led-aliases-and-stop-heartbeat.patch
@@ -0,0 +1,38 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -18,6 +18,10 @@
+ 		mmc0 = &emmc;
+ 		mmc1 = &sdmmc;
+ 		mmc2 = &sdio;
++		led-boot = &blue_led;
++		led-failsafe = &blue_led;
++		led-running = &blue_led;
++		led-upgrade = &blue_led;
+ 	};
+ 
+ 	chosen {
+@@ -29,22 +33,19 @@
+ 		pinctrl-names = "default";
+ 		pinctrl-0 = <&green_led>, <&heartbeat_led>;
+ 
+-		green-led {
++		led-0 {
+ 			color = <LED_COLOR_ID_GREEN>;
+ 			default-state = "on";
+ 			function = LED_FUNCTION_POWER;
+ 			gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+-			label = "rockpis:green:power";
+ 			linux,default-trigger = "default-on";
+ 		};
+ 
+-		blue-led {
++		blue_led: led-1 {
+ 			color = <LED_COLOR_ID_BLUE>;
+ 			default-state = "on";
+ 			function = LED_FUNCTION_HEARTBEAT;
+ 			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+-			label = "rockpis:blue:user";
+-			linux,default-trigger = "heartbeat";
+ 		};
+ 	};
+ 
diff --git a/target/linux/rockchip/patches-6.6/114-rock-pi-e-add-led-aliases-and-stop-heartbeat.patch b/target/linux/rockchip/patches-6.6/114-rock-pi-e-add-led-aliases-and-stop-heartbeat.patch
new file mode 100644
index 0000000000..e2ea7fdd63
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/114-rock-pi-e-add-led-aliases-and-stop-heartbeat.patch
@@ -0,0 +1,27 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
+@@ -23,6 +23,10 @@
+ 	aliases {
+ 		mmc0 = &sdmmc;
+ 		mmc1 = &emmc;
++		led-boot = &led_blue;
++		led-failsafe = &led_blue;
++		led-running = &led_blue;
++		led-upgrade = &led_blue;
+ 	};
+ 
+ 	chosen {
+@@ -55,10 +59,11 @@
+ 		pinctrl-0 = <&led_pin>;
+ 		pinctrl-names = "default";
+ 
+-		led-0 {
++		led_blue: led-0 {
+ 			color = <LED_COLOR_ID_BLUE>;
++			default-state = "on";
++			function = LED_FUNCTION_HEARTBEAT;
+ 			gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "heartbeat";
+ 		};
+ 	};
+ 
diff --git a/target/linux/rockchip/patches-6.6/115-rock-3a-add-led-aliases-and-stop-heartbeat.patch b/target/linux/rockchip/patches-6.6/115-rock-3a-add-led-aliases-and-stop-heartbeat.patch
new file mode 100644
index 0000000000..bdcc96ce83
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/115-rock-3a-add-led-aliases-and-stop-heartbeat.patch
@@ -0,0 +1,29 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+@@ -15,6 +15,10 @@
+ 		ethernet0 = &gmac1;
+ 		mmc0 = &sdhci;
+ 		mmc1 = &sdmmc0;
++		led-boot = &led_blue;
++		led-failsafe = &led_blue;
++		led-running = &led_blue;
++		led-upgrade = &led_blue;
+ 	};
+ 
+ 	chosen: chosen {
+@@ -42,11 +46,11 @@
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+-		led_user: led-0 {
+-			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+-			function = LED_FUNCTION_HEARTBEAT;
++		led_blue: led-0 {
+ 			color = <LED_COLOR_ID_BLUE>;
+-			linux,default-trigger = "heartbeat";
++			default-state = "on";
++			function = LED_FUNCTION_HEARTBEAT;
++			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ 			pinctrl-names = "default";
+ 			pinctrl-0 = <&led_user_en>;
+ 		};
diff --git a/target/linux/rockchip/patches-6.6/300-hwrng-add-Rockchip-SoC-hwrng-driver.patch b/target/linux/rockchip/patches-6.6/300-hwrng-add-hwrng-driver-for-Rockchip-RK3568-SoC.patch
index 0be9a7300b..683d1b1d5e 100644
--- a/target/linux/rockchip/patches-6.6/300-hwrng-add-Rockchip-SoC-hwrng-driver.patch
+++ b/target/linux/rockchip/patches-6.6/300-hwrng-add-hwrng-driver-for-Rockchip-RK3568-SoC.patch
@@ -1,56 +1,27 @@
-From patchwork Sat Nov 12 14:10:58 2022
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Aurelien Jarno <aurelien@aurel32.net>
-X-Patchwork-Id: 13041222
-Return-Path: 
- <linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org>
-X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on
-	aws-us-west-2-korg-lkml-1.web.codeaurora.org
+From cea47ad1fbd46d3096fcf5c6905db3d12b5da960 Mon Sep 17 00:00:00 2001
 From: Aurelien Jarno <aurelien@aurel32.net>
-To: Olivia Mackall <olivia@selenic.com>,
-	Herbert Xu <herbert@gondor.apana.org.au>,
-	Rob Herring <robh+dt@kernel.org>,
-	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
-	Heiko Stuebner <heiko@sntech.de>,
-	Philipp Zabel <p.zabel@pengutronix.de>,
-	Lin Jinhan <troy.lin@rock-chips.com>
-Cc: linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR
- CORE),
-	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
- BINDINGS),
-	linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC
- support),
-	linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support),
-	linux-kernel@vger.kernel.org (open list),
-	Aurelien Jarno <aurelien@aurel32.net>
-Subject: [PATCH v1 2/3] hwrng: add Rockchip SoC hwrng driver
-Date: Sat, 12 Nov 2022 15:10:58 +0100
-Message-Id: <20221112141059.3802506-3-aurelien@aurel32.net>
-In-Reply-To: <20221112141059.3802506-1-aurelien@aurel32.net>
-References: <20221112141059.3802506-1-aurelien@aurel32.net>
-MIME-Version: 1.0
-List-Id: <linux-arm-kernel.lists.infradead.org>
+Date: Sun, 21 Jul 2024 01:48:04 +0100
+Subject: [PATCH 2/3] hwrng: add hwrng driver for Rockchip RK3568 SoC
 
 Rockchip SoCs used to have a random number generator as part of their
 crypto device, and support for it has to be added to the corresponding
-driver. However newer Rockchip SoCs like the RK356x have an independent
+driver. However newer Rockchip SoCs like the RK3568 have an independent
 True Random Number Generator device. This patch adds a driver for it,
 greatly inspired from the downstream driver.
 
 The TRNG device does not seem to have a signal conditionner and the FIPS
 140-2 test returns a lot of failures. They can be reduced by increasing
-RK_RNG_SAMPLE_CNT, in a tradeoff between quality and speed. This value
-has been adjusted to get ~90% of successes and the quality value has
-been set accordingly.
+rockchip,sample-count in DT, in a tradeoff between quality and speed.
 
 Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
+[daniel@makrotpia.org: code style fixes, add DT properties]
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 ---
  drivers/char/hw_random/Kconfig        |  14 ++
  drivers/char/hw_random/Makefile       |   1 +
- drivers/char/hw_random/rockchip-rng.c | 251 ++++++++++++++++++++++++++
- 3 files changed, 266 insertions(+)
+ drivers/char/hw_random/rockchip-rng.c | 230 ++++++++++++++++++++++++++
+ 4 files changed, 246 insertions(+)
  create mode 100644 drivers/char/hw_random/rockchip-rng.c
 
 --- a/drivers/char/hw_random/Kconfig
@@ -60,18 +31,18 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  	  The module will be called jh7110-trng.
  
 +config HW_RANDOM_ROCKCHIP
-+        tristate "Rockchip True Random Number Generator"
-+        depends on HW_RANDOM && (ARCH_ROCKCHIP || COMPILE_TEST)
-+        depends on HAS_IOMEM
-+        default HW_RANDOM
-+        help
-+          This driver provides kernel-side support for the True Random Number
-+          Generator hardware found on some Rockchip SoC like RK3566 or RK3568.
++	tristate "Rockchip True Random Number Generator"
++	depends on HW_RANDOM && (ARCH_ROCKCHIP || COMPILE_TEST)
++	depends on HAS_IOMEM
++	default HW_RANDOM
++	help
++	  This driver provides kernel-side support for the True Random Number
++	  Generator hardware found on some Rockchip SoC like RK3566 or RK3568.
 +
-+          To compile this driver as a module, choose M here: the
-+          module will be called rockchip-rng.
++	  To compile this driver as a module, choose M here: the
++	  module will be called rockchip-rng.
 +
-+          If unsure, say Y.
++	  If unsure, say Y.
 +
  endif # HW_RANDOM
  
@@ -86,10 +57,10 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
  obj-$(CONFIG_HW_RANDOM_JH7110) += jh7110-trng.o
 --- /dev/null
 +++ b/drivers/char/hw_random/rockchip-rng.c
-@@ -0,0 +1,251 @@
+@@ -0,0 +1,230 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
-+ * rockchip-rng.c True Random Number Generator driver for Rockchip SoCs
++ * rockchip-rng.c True Random Number Generator driver for Rockchip RK3568 SoC
 + *
 + * Copyright (c) 2018, Fuzhou Rockchip Electronics Co., Ltd.
 + * Copyright (c) 2022, Aurelien Jarno
@@ -103,7 +74,8 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +#include <linux/iopoll.h>
 +#include <linux/kernel.h>
 +#include <linux/module.h>
-+#include <linux/of_platform.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
 +#include <linux/pm_runtime.h>
 +#include <linux/reset.h>
 +#include <linux/slab.h>
@@ -113,13 +85,6 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +#define RK_RNG_POLL_PERIOD_US		100
 +#define RK_RNG_POLL_TIMEOUT_US		10000
 +
-+/*
-+ * TRNG collects osc ring output bit every RK_RNG_SAMPLE_CNT time. The value is
-+ * a tradeoff between speed and quality and has been adjusted to get a quality
-+ * of ~900 (~90% of FIPS 140-2 successes).
-+ */
-+#define RK_RNG_SAMPLE_CNT		1000
-+
 +/* TRNG registers from RK3568 TRM-Part2, section 5.4.1 */
 +#define TRNG_RST_CTL			0x0004
 +#define TRNG_RNG_CTL			0x0400
@@ -131,17 +96,11 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +#define TRNG_RNG_CTL_OSC_RING_SPEED_1	(0x01 << 2)
 +#define TRNG_RNG_CTL_OSC_RING_SPEED_2	(0x02 << 2)
 +#define TRNG_RNG_CTL_OSC_RING_SPEED_3	(0x03 << 2)
++#define TRNG_RNG_CTL_MASK		GENMASK(15, 0)
 +#define TRNG_RNG_CTL_ENABLE		BIT(1)
 +#define TRNG_RNG_CTL_START		BIT(0)
 +#define TRNG_RNG_SAMPLE_CNT		0x0404
-+#define TRNG_RNG_DOUT_0			0x0410
-+#define TRNG_RNG_DOUT_1			0x0414
-+#define TRNG_RNG_DOUT_2			0x0418
-+#define TRNG_RNG_DOUT_3			0x041c
-+#define TRNG_RNG_DOUT_4			0x0420
-+#define TRNG_RNG_DOUT_5			0x0424
-+#define TRNG_RNG_DOUT_6			0x0428
-+#define TRNG_RNG_DOUT_7			0x042c
++#define TRNG_RNG_DOUT			0x0410
 +
 +struct rk_rng {
 +	struct hwrng rng;
@@ -149,18 +108,18 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +	struct reset_control *rst;
 +	int clk_num;
 +	struct clk_bulk_data *clk_bulks;
++	u32 sample_cnt;
 +};
 +
-+/* The mask determine the bits that are updated */
++/* The mask in the upper 16 bits determines the bits that are updated */
 +static void rk_rng_write_ctl(struct rk_rng *rng, u32 val, u32 mask)
 +{
-+	writel_relaxed((mask << 16) | val, rng->base + TRNG_RNG_CTL);
++	writel((mask << 16) | val, rng->base + TRNG_RNG_CTL);
 +}
 +
 +static int rk_rng_init(struct hwrng *rng)
 +{
 +	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
-+	u32 reg;
 +	int ret;
 +
 +	/* start clocks */
@@ -172,13 +131,13 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +	}
 +
 +	/* set the sample period */
-+	writel(RK_RNG_SAMPLE_CNT, rk_rng->base + TRNG_RNG_SAMPLE_CNT);
++	writel(rk_rng->sample_cnt, rk_rng->base + TRNG_RNG_SAMPLE_CNT);
 +
 +	/* set osc ring speed and enable it */
-+	reg = TRNG_RNG_CTL_LEN_256_BIT |
-+		   TRNG_RNG_CTL_OSC_RING_SPEED_0 |
-+		   TRNG_RNG_CTL_ENABLE;
-+	rk_rng_write_ctl(rk_rng, reg, 0xffff);
++	rk_rng_write_ctl(rk_rng, TRNG_RNG_CTL_LEN_256_BIT |
++				 TRNG_RNG_CTL_OSC_RING_SPEED_0 |
++				 TRNG_RNG_CTL_ENABLE,
++			 TRNG_RNG_CTL_MASK);
 +
 +	return 0;
 +}
@@ -186,11 +145,9 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +static void rk_rng_cleanup(struct hwrng *rng)
 +{
 +	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
-+	u32 reg;
 +
 +	/* stop TRNG */
-+	reg = 0;
-+	rk_rng_write_ctl(rk_rng, reg, 0xffff);
++	rk_rng_write_ctl(rk_rng, 0, TRNG_RNG_CTL_MASK);
 +
 +	/* stop clocks */
 +	clk_bulk_disable_unprepare(rk_rng->clk_num, rk_rng->clk_bulks);
@@ -199,15 +156,16 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +static int rk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
 +{
 +	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
++	size_t to_read = min_t(size_t, max, RK_RNG_MAX_BYTE);
 +	u32 reg;
 +	int ret = 0;
-+	int i;
 +
-+	pm_runtime_get_sync((struct device *) rk_rng->rng.priv);
++	ret = pm_runtime_resume_and_get((struct device *) rk_rng->rng.priv);
++	if (ret < 0)
++		return ret;
 +
 +	/* Start collecting random data */
-+	reg = TRNG_RNG_CTL_START;
-+	rk_rng_write_ctl(rk_rng, reg, reg);
++	rk_rng_write_ctl(rk_rng, TRNG_RNG_CTL_START, TRNG_RNG_CTL_START);
 +
 +	ret = readl_poll_timeout(rk_rng->base + TRNG_RNG_CTL, reg,
 +				 !(reg & TRNG_RNG_CTL_START),
@@ -216,27 +174,23 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +	if (ret < 0)
 +		goto out;
 +
-+	/* Read random data stored in big endian in the registers */
-+	ret = min_t(size_t, max, RK_RNG_MAX_BYTE);
-+	for (i = 0; i < ret; i += 4) {
-+		reg = readl_relaxed(rk_rng->base + TRNG_RNG_DOUT_0 + i);
-+		*(u32 *)(buf + i) = be32_to_cpu(reg);
-+	}
-+
++	/* Read random data stored in the registers */
++	memcpy_fromio(buf, rk_rng->base + TRNG_RNG_DOUT, to_read);
 +out:
 +	pm_runtime_mark_last_busy((struct device *) rk_rng->rng.priv);
 +	pm_runtime_put_sync_autosuspend((struct device *) rk_rng->rng.priv);
 +
-+	return ret;
++	return (ret < 0) ? ret : to_read;
 +}
 +
 +static int rk_rng_probe(struct platform_device *pdev)
 +{
 +	struct device *dev = &pdev->dev;
 +	struct rk_rng *rk_rng;
++	u32 quality;
 +	int ret;
 +
-+	rk_rng = devm_kzalloc(dev, sizeof(struct rk_rng), GFP_KERNEL);
++	rk_rng = devm_kzalloc(dev, sizeof(*rk_rng), GFP_KERNEL);
 +	if (!rk_rng)
 +		return -ENOMEM;
 +
@@ -249,11 +203,19 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +		return dev_err_probe(dev, rk_rng->clk_num,
 +				     "Failed to get clks property\n");
 +
-+	rk_rng->rst = devm_reset_control_array_get(&pdev->dev, false, false);
++	rk_rng->rst = devm_reset_control_array_get_exclusive(&pdev->dev);
 +	if (IS_ERR(rk_rng->rst))
 +		return dev_err_probe(dev, PTR_ERR(rk_rng->rst),
 +				     "Failed to get reset property\n");
 +
++	ret = of_property_read_u32(dev->of_node, "rockchip,sample-count", &rk_rng->sample_cnt);
++	if (ret)
++		return dev_err_probe(dev, ret, "Failed to get sample-count property\n");
++
++	ret = of_property_read_u32(dev->of_node, "quality", &quality);
++	if (ret || quality > 1024)
++		return dev_err_probe(dev, ret, "Failed to get quality property\n");
++
 +	reset_control_assert(rk_rng->rst);
 +	udelay(2);
 +	reset_control_deassert(rk_rng->rst);
@@ -261,36 +223,26 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +	platform_set_drvdata(pdev, rk_rng);
 +
 +	rk_rng->rng.name = dev_driver_string(dev);
-+#ifndef CONFIG_PM
-+	rk_rng->rng.init = rk_rng_init;
-+	rk_rng->rng.cleanup = rk_rng_cleanup;
-+#endif
++	if (!IS_ENABLED(CONFIG_PM)) {
++		rk_rng->rng.init = rk_rng_init;
++		rk_rng->rng.cleanup = rk_rng_cleanup;
++	}
 +	rk_rng->rng.read = rk_rng_read;
 +	rk_rng->rng.priv = (unsigned long) dev;
-+	rk_rng->rng.quality = 900;
++	rk_rng->rng.quality = quality;
 +
 +	pm_runtime_set_autosuspend_delay(dev, RK_RNG_AUTOSUSPEND_DELAY);
 +	pm_runtime_use_autosuspend(dev);
-+	pm_runtime_enable(dev);
++	devm_pm_runtime_enable(dev);
 +
 +	ret = devm_hwrng_register(dev, &rk_rng->rng);
 +	if (ret)
 +		return dev_err_probe(&pdev->dev, ret, "Failed to register Rockchip hwrng\n");
 +
-+	dev_info(&pdev->dev, "Registered Rockchip hwrng\n");
-+
-+	return 0;
-+}
-+
-+static int rk_rng_remove(struct platform_device *pdev)
-+{
-+	pm_runtime_disable(&pdev->dev);
-+
 +	return 0;
 +}
 +
-+#ifdef CONFIG_PM
-+static int rk_rng_runtime_suspend(struct device *dev)
++static int __maybe_unused rk_rng_runtime_suspend(struct device *dev)
 +{
 +	struct rk_rng *rk_rng = dev_get_drvdata(dev);
 +
@@ -299,13 +251,12 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +	return 0;
 +}
 +
-+static int rk_rng_runtime_resume(struct device *dev)
++static int __maybe_unused rk_rng_runtime_resume(struct device *dev)
 +{
 +	struct rk_rng *rk_rng = dev_get_drvdata(dev);
 +
 +	return rk_rng_init(&rk_rng->rng);
 +}
-+#endif
 +
 +static const struct dev_pm_ops rk_rng_pm_ops = {
 +	SET_RUNTIME_PM_OPS(rk_rng_runtime_suspend,
@@ -315,10 +266,8 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +};
 +
 +static const struct of_device_id rk_rng_dt_match[] = {
-+	{
-+		.compatible = "rockchip,rk3568-rng",
-+	},
-+	{},
++	{ .compatible = "rockchip,rk3568-rng", },
++	{ /* sentinel */ },
 +};
 +
 +MODULE_DEVICE_TABLE(of, rk_rng_dt_match);
@@ -330,11 +279,12 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 +		.of_match_table = rk_rng_dt_match,
 +	},
 +	.probe	= rk_rng_probe,
-+	.remove = rk_rng_remove,
 +};
 +
 +module_platform_driver(rk_rng_driver);
 +
-+MODULE_DESCRIPTION("Rockchip True Random Number Generator driver");
-+MODULE_AUTHOR("Lin Jinhan <troy.lin@rock-chips.com>, Aurelien Jarno <aurelien@aurel32.net>");
-+MODULE_LICENSE("GPL v2");
++MODULE_DESCRIPTION("Rockchip RK3568 True Random Number Generator driver");
++MODULE_AUTHOR("Lin Jinhan <troy.lin@rock-chips.com>");
++MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
++MODULE_AUTHOR("Daniel Golle <daniel@makrotopia.org>");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
new file mode 100644
index 0000000000..130bf6723c
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
@@ -0,0 +1,49 @@
+From 756e7d3251ad8f6c72e7bf4c476537a89f673e38 Mon Sep 17 00:00:00 2001
+From: Aurelien Jarno <aurelien@aurel32.net>
+Date: Sun, 21 Jul 2024 01:48:38 +0100
+Subject: [PATCH 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x
+
+Enable the just added Rockchip RNG driver for RK356x SoCs.
+
+Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ arch/arm64/boot/dts/rockchip/rk3568.dtsi |  7 +++++++
+ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++
+ 2 files changed, 17 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+@@ -257,6 +257,13 @@
+ 	};
+ };
+ 
++&rng {
++	rockchip,sample-count = <1000>;
++	quality = <900>;
++
++	status = "okay";
++};
++
+ &usb_host0_xhci {
+ 	phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
+ 	phy-names = "usb2-phy", "usb3-phy";
+--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+@@ -1106,6 +1106,16 @@
+ 		status = "disabled";
+ 	};
+ 
++	rng: rng@fe388000 {
++		compatible = "rockchip,rk3568-rng";
++		reg = <0x0 0xfe388000 0x0 0x4000>;
++		clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
++		clock-names = "core", "ahb";
++		resets = <&cru SRST_TRNG_NS>;
++		reset-names = "reset";
++		status = "disabled";
++	};
++
+ 	i2s0_8ch: i2s@fe400000 {
+ 		compatible = "rockchip,rk3568-i2s-tdm";
+ 		reg = <0x0 0xfe400000 0x0 0x1000>;
diff --git a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch
deleted file mode 100644
index 3e65de7a20..0000000000
--- a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From patchwork Sat Nov 12 14:10:59 2022
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Aurelien Jarno <aurelien@aurel32.net>
-X-Patchwork-Id: 13041221
-From: Aurelien Jarno <aurelien@aurel32.net>
-To: Olivia Mackall <olivia@selenic.com>,
-	Herbert Xu <herbert@gondor.apana.org.au>,
-	Rob Herring <robh+dt@kernel.org>,
-	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
-	Heiko Stuebner <heiko@sntech.de>,
-	Philipp Zabel <p.zabel@pengutronix.de>,
-	Lin Jinhan <troy.lin@rock-chips.com>
-Cc: linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR
- CORE),
-	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
- BINDINGS),
-	linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC
- support),
-	linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support),
-	linux-kernel@vger.kernel.org (open list),
-	Aurelien Jarno <aurelien@aurel32.net>
-Subject: [PATCH v1 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x
-Date: Sat, 12 Nov 2022 15:10:59 +0100
-Message-Id: <20221112141059.3802506-4-aurelien@aurel32.net>
-In-Reply-To: <20221112141059.3802506-1-aurelien@aurel32.net>
-References: <20221112141059.3802506-1-aurelien@aurel32.net>
-MIME-Version: 1.0
-List-Id: <linux-arm-kernel.lists.infradead.org>
-
-Enable the just added Rockchip RNG driver for RK356x SoCs.
-
-Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
----
- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
-@@ -1848,6 +1848,15 @@
- 		};
- 	};
- 
-+	rng: rng@fe388000 {
-+		compatible = "rockchip,rk3568-rng";
-+		reg = <0x0 0xfe388000 0x0 0x4000>;
-+		clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
-+		clock-names = "trng_clk", "trng_hclk";
-+		resets = <&cru SRST_TRNG_NS>;
-+		reset-names = "reset";
-+	};
-+
- 	pinctrl: pinctrl {
- 		compatible = "rockchip,rk3568-pinctrl";
- 		rockchip,grf = <&grf>;
diff --git a/target/linux/rockchip/patches-6.6/302-mmc-allow-probe-to-defer-if-clock-is-not-ready.patch b/target/linux/rockchip/patches-6.6/302-mmc-allow-probe-to-defer-if-clock-is-not-ready.patch
new file mode 100644
index 0000000000..468cc3a307
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/302-mmc-allow-probe-to-defer-if-clock-is-not-ready.patch
@@ -0,0 +1,25 @@
+--- a/drivers/mmc/host/dw_mmc.c
++++ b/drivers/mmc/host/dw_mmc.c
+@@ -3294,6 +3294,10 @@ int dw_mci_probe(struct dw_mci *host)
+ 	host->biu_clk = devm_clk_get(host->dev, "biu");
+ 	if (IS_ERR(host->biu_clk)) {
+ 		dev_dbg(host->dev, "biu clock not available\n");
++		ret = PTR_ERR(host->biu_clk);
++		if (ret == -EPROBE_DEFER) {
++			return ret;
++		}
+ 	} else {
+ 		ret = clk_prepare_enable(host->biu_clk);
+ 		if (ret) {
+@@ -3305,6 +3309,11 @@ int dw_mci_probe(struct dw_mci *host)
+ 	host->ciu_clk = devm_clk_get(host->dev, "ciu");
+ 	if (IS_ERR(host->ciu_clk)) {
+ 		dev_dbg(host->dev, "ciu clock not available\n");
++		ret = PTR_ERR(host->ciu_clk);
++		if (ret == -EPROBE_DEFER) {
++			goto err_clk_biu;
++		}
++
+ 		host->bus_hz = host->pdata->bus_hz;
+ 	} else {
+ 		ret = clk_prepare_enable(host->ciu_clk);
diff --git a/target/linux/sunxi/patches-6.6/017-v6.10-firmware-smccc-Export-revision-soc_id-function.patch b/target/linux/sunxi/patches-6.6/017-v6.10-firmware-smccc-Export-revision-soc_id-function.patch
new file mode 100644
index 0000000000..538484dd82
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/017-v6.10-firmware-smccc-Export-revision-soc_id-function.patch
@@ -0,0 +1,32 @@
+From 9cf3415ade2d7598d78d2ce6d35d6d6d06132201 Mon Sep 17 00:00:00 2001
+From: Martin Botka <martin.botka@somainline.org>
+Date: Thu, 18 Apr 2024 16:44:01 +0100
+Subject: [PATCH] firmware: smccc: Export revision soc_id function
+
+The "SoC ID revision" as provided via the SMCCC SOCID interface can be
+valuable information for drivers, when certain functionality depends
+on a die revision, for instance.
+One example is the sun50i-cpufreq-nvmem driver, which needs this
+information to determine the speed bin of the SoC.
+
+Export the arm_smccc_get_soc_id_revision() function so that it can be
+called by any driver.
+
+Signed-off-by: Martin Botka <martin.botka@somainline.org>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Acked-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/firmware/smccc/smccc.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/firmware/smccc/smccc.c
++++ b/drivers/firmware/smccc/smccc.c
+@@ -69,6 +69,7 @@ s32 arm_smccc_get_soc_id_revision(void)
+ {
+ 	return smccc_soc_id_revision;
+ }
++EXPORT_SYMBOL_GPL(arm_smccc_get_soc_id_revision);
+ 
+ static int __init smccc_devices_init(void)
+ {
diff --git a/target/linux/sunxi/patches-6.6/018-v6.10-cpufreq-dt-platdev-Blocklist-Allwinner-H616-618-SoCs.patch b/target/linux/sunxi/patches-6.6/018-v6.10-cpufreq-dt-platdev-Blocklist-Allwinner-H616-618-SoCs.patch
new file mode 100644
index 0000000000..d67b35ee71
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/018-v6.10-cpufreq-dt-platdev-Blocklist-Allwinner-H616-618-SoCs.patch
@@ -0,0 +1,29 @@
+From 6ae07744cf334b750762ba881492c0cfba524b38 Mon Sep 17 00:00:00 2001
+From: Martin Botka <martin.botka@somainline.org>
+Date: Thu, 18 Apr 2024 16:44:02 +0100
+Subject: [PATCH] cpufreq: dt-platdev: Blocklist Allwinner H616/618 SoCs
+
+The AllWinner H616 SoC will use the (extended) H6 OPP driver, so add
+them to the cpufreq-dt blocklist, to not create the device twice.
+This also affects the closely related sibling SoCs H618 and H700.
+
+Signed-off-by: Martin Botka <martin.botka@somainline.org>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/cpufreq-dt-platdev.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -104,6 +104,9 @@ static const struct of_device_id allowli
+  */
+ static const struct of_device_id blocklist[] __initconst = {
+ 	{ .compatible = "allwinner,sun50i-h6", },
++	{ .compatible = "allwinner,sun50i-h616", },
++	{ .compatible = "allwinner,sun50i-h618", },
++	{ .compatible = "allwinner,sun50i-h700", },
+ 
+ 	{ .compatible = "apple,arm-platform", },
+ 
diff --git a/target/linux/sunxi/patches-6.6/019-v6.10-cpufreq-sun50i-Refactor-speed-bin-decoding.patch b/target/linux/sunxi/patches-6.6/019-v6.10-cpufreq-sun50i-Refactor-speed-bin-decoding.patch
new file mode 100644
index 0000000000..9a81906996
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/019-v6.10-cpufreq-sun50i-Refactor-speed-bin-decoding.patch
@@ -0,0 +1,149 @@
+From 6cc4bcceff9af0e6be9738096d95e4ba75e75123 Mon Sep 17 00:00:00 2001
+From: Brandon Cheo Fusi <fusibrandon13@gmail.com>
+Date: Thu, 18 Apr 2024 16:44:04 +0100
+Subject: [PATCH] cpufreq: sun50i: Refactor speed bin decoding
+
+Make converting the speed bin value into a speed grade generic and
+determined by a platform specific callback. Also change the prototypes
+involved to encode the speed bin directly in the return value.
+
+This allows to extend the driver more easily to support more SoCs.
+
+Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
+[Andre: merge output into return value]
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/sun50i-cpufreq-nvmem.c | 74 +++++++++++++++++---------
+ 1 file changed, 49 insertions(+), 25 deletions(-)
+
+--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+@@ -25,19 +25,52 @@
+ 
+ static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
+ 
++struct sunxi_cpufreq_data {
++	u32 (*efuse_xlate)(u32 speedbin);
++};
++
++static u32 sun50i_h6_efuse_xlate(u32 speedbin)
++{
++	u32 efuse_value;
++
++	efuse_value = (speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
++
++	/*
++	 * We treat unexpected efuse values as if the SoC was from
++	 * the slowest bin. Expected efuse values are 1-3, slowest
++	 * to fastest.
++	 */
++	if (efuse_value >= 1 && efuse_value <= 3)
++		return efuse_value - 1;
++	else
++		return 0;
++}
++
++static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = {
++	.efuse_xlate = sun50i_h6_efuse_xlate,
++};
++
++static const struct of_device_id cpu_opp_match_list[] = {
++	{ .compatible = "allwinner,sun50i-h6-operating-points",
++	  .data = &sun50i_h6_cpufreq_data,
++	},
++	{}
++};
++
+ /**
+  * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
+- * @versions: Set to the value parsed from efuse
+  *
+- * Returns 0 if success.
++ * Returns non-negative speed bin index on success, a negative error
++ * value otherwise.
+  */
+-static int sun50i_cpufreq_get_efuse(u32 *versions)
++static int sun50i_cpufreq_get_efuse(void)
+ {
++	const struct sunxi_cpufreq_data *opp_data;
+ 	struct nvmem_cell *speedbin_nvmem;
++	const struct of_device_id *match;
+ 	struct device_node *np;
+ 	struct device *cpu_dev;
+-	u32 *speedbin, efuse_value;
+-	size_t len;
++	u32 *speedbin;
+ 	int ret;
+ 
+ 	cpu_dev = get_cpu_device(0);
+@@ -48,12 +81,12 @@ static int sun50i_cpufreq_get_efuse(u32
+ 	if (!np)
+ 		return -ENOENT;
+ 
+-	ret = of_device_is_compatible(np,
+-				      "allwinner,sun50i-h6-operating-points");
+-	if (!ret) {
++	match = of_match_node(cpu_opp_match_list, np);
++	if (!match) {
+ 		of_node_put(np);
+ 		return -ENOENT;
+ 	}
++	opp_data = match->data;
+ 
+ 	speedbin_nvmem = of_nvmem_cell_get(np, NULL);
+ 	of_node_put(np);
+@@ -61,25 +94,16 @@ static int sun50i_cpufreq_get_efuse(u32
+ 		return dev_err_probe(cpu_dev, PTR_ERR(speedbin_nvmem),
+ 				     "Could not get nvmem cell\n");
+ 
+-	speedbin = nvmem_cell_read(speedbin_nvmem, &len);
++	speedbin = nvmem_cell_read(speedbin_nvmem, NULL);
+ 	nvmem_cell_put(speedbin_nvmem);
+ 	if (IS_ERR(speedbin))
+ 		return PTR_ERR(speedbin);
+ 
+-	efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
+-
+-	/*
+-	 * We treat unexpected efuse values as if the SoC was from
+-	 * the slowest bin. Expected efuse values are 1-3, slowest
+-	 * to fastest.
+-	 */
+-	if (efuse_value >= 1 && efuse_value <= 3)
+-		*versions = efuse_value - 1;
+-	else
+-		*versions = 0;
++	ret = opp_data->efuse_xlate(*speedbin);
+ 
+ 	kfree(speedbin);
+-	return 0;
++
++	return ret;
+ };
+ 
+ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
+@@ -87,7 +111,7 @@ static int sun50i_cpufreq_nvmem_probe(st
+ 	int *opp_tokens;
+ 	char name[MAX_NAME_LEN];
+ 	unsigned int cpu;
+-	u32 speed = 0;
++	int speed;
+ 	int ret;
+ 
+ 	opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),
+@@ -95,10 +119,10 @@ static int sun50i_cpufreq_nvmem_probe(st
+ 	if (!opp_tokens)
+ 		return -ENOMEM;
+ 
+-	ret = sun50i_cpufreq_get_efuse(&speed);
+-	if (ret) {
++	speed = sun50i_cpufreq_get_efuse();
++	if (speed < 0) {
+ 		kfree(opp_tokens);
+-		return ret;
++		return speed;
+ 	}
+ 
+ 	snprintf(name, MAX_NAME_LEN, "speed%d", speed);
diff --git a/target/linux/sunxi/patches-6.6/020-v6.10-cpufreq-sun50i-Add-support-for-opp_supported_hw.patch b/target/linux/sunxi/patches-6.6/020-v6.10-cpufreq-sun50i-Add-support-for-opp_supported_hw.patch
new file mode 100644
index 0000000000..e0c68f9aad
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/020-v6.10-cpufreq-sun50i-Add-support-for-opp_supported_hw.patch
@@ -0,0 +1,132 @@
+From fa5aec9561cfc4f4370983ca5818c90227c9d90e Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Thu, 18 Apr 2024 16:44:05 +0100
+Subject: [PATCH] cpufreq: sun50i: Add support for opp_supported_hw
+
+The opp_supported_hw DT property allows the DT to specify a mask of chip
+revisions that a certain OPP is eligible for. This allows for easy
+limiting of maximum frequencies, for instance.
+
+Add support for that in the sun50i-cpufreq-nvmem driver. We support both
+the existing opp-microvolt suffix properties as well as the
+opp-supported-hw property, the generic code figures out which is needed
+automatically.
+However if none of the DT OPP nodes contain an opp-supported-hw
+property, the core code will ignore all OPPs and the driver will fail
+probing. So check the DT's eligibility first before using that feature.
+
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/sun50i-cpufreq-nvmem.c | 62 ++++++++++++++++++++++----
+ 1 file changed, 54 insertions(+), 8 deletions(-)
+
+--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+@@ -58,6 +58,41 @@ static const struct of_device_id cpu_opp
+ };
+ 
+ /**
++ * dt_has_supported_hw() - Check if any OPPs use opp-supported-hw
++ *
++ * If we ask the cpufreq framework to use the opp-supported-hw feature, it
++ * will ignore every OPP node without that DT property. If none of the OPPs
++ * have it, the driver will fail probing, due to the lack of OPPs.
++ *
++ * Returns true if we have at least one OPP with the opp-supported-hw property.
++ */
++static bool dt_has_supported_hw(void)
++{
++	bool has_opp_supported_hw = false;
++	struct device_node *np, *opp;
++	struct device *cpu_dev;
++
++	cpu_dev = get_cpu_device(0);
++	if (!cpu_dev)
++		return -ENODEV;
++
++	np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
++	if (!np)
++		return -ENOENT;
++
++	for_each_child_of_node(np, opp) {
++		if (of_find_property(opp, "opp-supported-hw", NULL)) {
++			has_opp_supported_hw = true;
++			break;
++		}
++	}
++
++	of_node_put(np);
++
++	return has_opp_supported_hw;
++}
++
++/**
+  * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
+  *
+  * Returns non-negative speed bin index on success, a negative error
+@@ -110,7 +145,8 @@ static int sun50i_cpufreq_nvmem_probe(st
+ {
+ 	int *opp_tokens;
+ 	char name[MAX_NAME_LEN];
+-	unsigned int cpu;
++	unsigned int cpu, supported_hw;
++	struct dev_pm_opp_config config = {};
+ 	int speed;
+ 	int ret;
+ 
+@@ -125,7 +161,18 @@ static int sun50i_cpufreq_nvmem_probe(st
+ 		return speed;
+ 	}
+ 
++	/*
++	 * We need at least one OPP with the "opp-supported-hw" property,
++	 * or else the upper layers will ignore every OPP and will bail out.
++	 */
++	if (dt_has_supported_hw()) {
++		supported_hw = 1U << speed;
++		config.supported_hw = &supported_hw;
++		config.supported_hw_count = 1;
++	}
++
+ 	snprintf(name, MAX_NAME_LEN, "speed%d", speed);
++	config.prop_name = name;
+ 
+ 	for_each_possible_cpu(cpu) {
+ 		struct device *cpu_dev = get_cpu_device(cpu);
+@@ -135,12 +182,11 @@ static int sun50i_cpufreq_nvmem_probe(st
+ 			goto free_opp;
+ 		}
+ 
+-		opp_tokens[cpu] = dev_pm_opp_set_prop_name(cpu_dev, name);
+-		if (opp_tokens[cpu] < 0) {
+-			ret = opp_tokens[cpu];
+-			pr_err("Failed to set prop name\n");
++		ret = dev_pm_opp_set_config(cpu_dev, &config);
++		if (ret < 0)
+ 			goto free_opp;
+-		}
++
++		opp_tokens[cpu] = ret;
+ 	}
+ 
+ 	cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
+@@ -155,7 +201,7 @@ static int sun50i_cpufreq_nvmem_probe(st
+ 
+ free_opp:
+ 	for_each_possible_cpu(cpu)
+-		dev_pm_opp_put_prop_name(opp_tokens[cpu]);
++		dev_pm_opp_clear_config(opp_tokens[cpu]);
+ 	kfree(opp_tokens);
+ 
+ 	return ret;
+@@ -169,7 +215,7 @@ static void sun50i_cpufreq_nvmem_remove(
+ 	platform_device_unregister(cpufreq_dt_pdev);
+ 
+ 	for_each_possible_cpu(cpu)
+-		dev_pm_opp_put_prop_name(opp_tokens[cpu]);
++		dev_pm_opp_clear_config(opp_tokens[cpu]);
+ 
+ 	kfree(opp_tokens);
+ }
diff --git a/target/linux/sunxi/patches-6.6/021-v6.10-cpufreq-sun50i-Add-H616-support.patch b/target/linux/sunxi/patches-6.6/021-v6.10-cpufreq-sun50i-Add-H616-support.patch
new file mode 100644
index 0000000000..c891f5722a
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/021-v6.10-cpufreq-sun50i-Add-H616-support.patch
@@ -0,0 +1,122 @@
+From e2e2dcd2e944fe6167cb731864f8a1343f1bbee7 Mon Sep 17 00:00:00 2001
+From: Martin Botka <martin.botka@somainline.org>
+Date: Thu, 18 Apr 2024 16:44:06 +0100
+Subject: [PATCH] cpufreq: sun50i: Add H616 support
+
+The Allwinner H616/H618 SoCs have different OPP tables per SoC version
+and die revision. The SoC version is stored in NVMEM, as before, though
+encoded differently. The die revision is in a different register, in the
+SRAM controller. Firmware already exports that value in a standardised
+way, through the SMCCC SoCID mechanism. We need both values, as some chips
+have the same SoC version, but they don't support the same frequencies and
+they get differentiated by the die revision.
+
+Add the new compatible string and tie the new translation function to
+it. This mechanism not only covers the original H616 SoC, but also its
+very close sibling SoCs H618 and H700, so add them to the list as well.
+
+Signed-off-by: Martin Botka <martin.botka@somainline.org>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/sun50i-cpufreq-nvmem.c | 67 ++++++++++++++++++++++++++
+ 1 file changed, 67 insertions(+)
+
+--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+@@ -10,6 +10,7 @@
+ 
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+ 
++#include <linux/arm-smccc.h>
+ #include <linux/cpu.h>
+ #include <linux/module.h>
+ #include <linux/nvmem-consumer.h>
+@@ -46,14 +47,77 @@ static u32 sun50i_h6_efuse_xlate(u32 spe
+ 		return 0;
+ }
+ 
++static int get_soc_id_revision(void)
++{
++#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY
++	return arm_smccc_get_soc_id_revision();
++#else
++	return SMCCC_RET_NOT_SUPPORTED;
++#endif
++}
++
++/*
++ * Judging by the OPP tables in the vendor BSP, the quality order of the
++ * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
++ * 0 and 2 seem identical from the OPP tables' point of view.
++ */
++static u32 sun50i_h616_efuse_xlate(u32 speedbin)
++{
++	int ver_bits = get_soc_id_revision();
++	u32 value = 0;
++
++	switch (speedbin & 0xffff) {
++	case 0x2000:
++		value = 0;
++		break;
++	case 0x2400:
++	case 0x7400:
++	case 0x2c00:
++	case 0x7c00:
++		if (ver_bits != SMCCC_RET_NOT_SUPPORTED && ver_bits <= 1) {
++			/* ic version A/B */
++			value = 1;
++		} else {
++			/* ic version C and later version */
++			value = 2;
++		}
++		break;
++	case 0x5000:
++	case 0x5400:
++	case 0x6000:
++		value = 3;
++		break;
++	case 0x5c00:
++		value = 4;
++		break;
++	case 0x5d00:
++		value = 0;
++		break;
++	default:
++		pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",
++			speedbin & 0xffff);
++		value = 0;
++		break;
++	}
++
++	return value;
++}
++
+ static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = {
+ 	.efuse_xlate = sun50i_h6_efuse_xlate,
+ };
+ 
++static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data = {
++	.efuse_xlate = sun50i_h616_efuse_xlate,
++};
++
+ static const struct of_device_id cpu_opp_match_list[] = {
+ 	{ .compatible = "allwinner,sun50i-h6-operating-points",
+ 	  .data = &sun50i_h6_cpufreq_data,
+ 	},
++	{ .compatible = "allwinner,sun50i-h616-operating-points",
++	  .data = &sun50i_h616_cpufreq_data,
++	},
+ 	{}
+ };
+ 
+@@ -230,6 +294,9 @@ static struct platform_driver sun50i_cpu
+ 
+ static const struct of_device_id sun50i_cpufreq_match_list[] = {
+ 	{ .compatible = "allwinner,sun50i-h6" },
++	{ .compatible = "allwinner,sun50i-h616" },
++	{ .compatible = "allwinner,sun50i-h618" },
++	{ .compatible = "allwinner,sun50i-h700" },
+ 	{}
+ };
+ MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
diff --git a/target/linux/sunxi/patches-6.6/022-v6.10-arm64-dts-allwinner-h616-Add-CPU-OPPs-table.patch b/target/linux/sunxi/patches-6.6/022-v6.10-arm64-dts-allwinner-h616-Add-CPU-OPPs-table.patch
new file mode 100644
index 0000000000..4665286d0f
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/022-v6.10-arm64-dts-allwinner-h616-Add-CPU-OPPs-table.patch
@@ -0,0 +1,188 @@
+From 3e057e05b3b281bcc29db573eb51f87ee6b5afc0 Mon Sep 17 00:00:00 2001
+From: Martin Botka <martin.botka@somainline.org>
+Date: Thu, 18 Apr 2024 16:44:07 +0100
+Subject: [PATCH] arm64: dts: allwinner: h616: Add CPU OPPs table
+
+Add an Operating Performance Points table for the CPU cores to enable
+Dynamic Voltage & Frequency Scaling (DVFS) on the H616.
+The values were taken from the BSP sources. There is a separate OPP set
+seen on some H700 devices, but they didn't really work out in testing, so
+they are not included for now.
+
+Also add the needed cpu_speed_grade nvmem cell and the cooling cells
+properties, to enable passive cooling.
+
+Signed-off-by: Martin Botka <martin.botka@somainline.org>
+[Andre: rework to minimise opp-microvolt properties]
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ .../dts/allwinner/sun50i-h616-cpu-opp.dtsi    | 115 ++++++++++++++++++
+ .../arm64/boot/dts/allwinner/sun50i-h616.dtsi |   8 ++
+ 2 files changed, 123 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
+
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
+@@ -0,0 +1,115 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++// Copyright (C) 2023 Martin Botka <martin@somainline.org>
++
++/ {
++	cpu_opp_table: opp-table-cpu {
++		compatible = "allwinner,sun50i-h616-operating-points";
++		nvmem-cells = <&cpu_speed_grade>;
++		opp-shared;
++
++		opp-480000000 {
++			opp-hz = /bits/ 64 <480000000>;
++			opp-microvolt = <900000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x1f>;
++		};
++
++		opp-600000000 {
++			opp-hz = /bits/ 64 <600000000>;
++			opp-microvolt = <900000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x12>;
++		};
++
++		opp-720000000 {
++			opp-hz = /bits/ 64 <720000000>;
++			opp-microvolt = <900000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x0d>;
++		};
++
++		opp-792000000 {
++			opp-hz = /bits/ 64 <792000000>;
++			opp-microvolt-speed1 = <900000>;
++			opp-microvolt-speed4 = <940000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x12>;
++		};
++
++		opp-936000000 {
++			opp-hz = /bits/ 64 <936000000>;
++			opp-microvolt = <900000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x0d>;
++		};
++
++		opp-1008000000 {
++			opp-hz = /bits/ 64 <1008000000>;
++			opp-microvolt-speed0 = <950000>;
++			opp-microvolt-speed1 = <940000>;
++			opp-microvolt-speed2 = <950000>;
++			opp-microvolt-speed3 = <950000>;
++			opp-microvolt-speed4 = <1020000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x1f>;
++		};
++
++		opp-1104000000 {
++			opp-hz = /bits/ 64 <1104000000>;
++			opp-microvolt-speed0 = <1000000>;
++			opp-microvolt-speed2 = <1000000>;
++			opp-microvolt-speed3 = <1000000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x0d>;
++		};
++
++		opp-1200000000 {
++			opp-hz = /bits/ 64 <1200000000>;
++			opp-microvolt-speed0 = <1050000>;
++			opp-microvolt-speed1 = <1020000>;
++			opp-microvolt-speed2 = <1050000>;
++			opp-microvolt-speed3 = <1050000>;
++			opp-microvolt-speed4 = <1100000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x1f>;
++		};
++
++		opp-1320000000 {
++			opp-hz = /bits/ 64 <1320000000>;
++			opp-microvolt = <1100000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x1d>;
++		};
++
++		opp-1416000000 {
++			opp-hz = /bits/ 64 <1416000000>;
++			opp-microvolt = <1100000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x0d>;
++		};
++
++		opp-1512000000 {
++			opp-hz = /bits/ 64 <1512000000>;
++			opp-microvolt-speed1 = <1100000>;
++			opp-microvolt-speed3 = <1100000>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-supported-hw = <0x0a>;
++		};
++	};
++};
++
++&cpu0 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
++
++&cpu1 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
++
++&cpu2 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
++
++&cpu3 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -26,6 +26,7 @@
+ 			reg = <0>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			#cooling-cells = <2>;
+ 		};
+ 
+ 		cpu1: cpu@1 {
+@@ -34,6 +35,7 @@
+ 			reg = <1>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			#cooling-cells = <2>;
+ 		};
+ 
+ 		cpu2: cpu@2 {
+@@ -42,6 +44,7 @@
+ 			reg = <2>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			#cooling-cells = <2>;
+ 		};
+ 
+ 		cpu3: cpu@3 {
+@@ -50,6 +53,7 @@
+ 			reg = <3>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			#cooling-cells = <2>;
+ 		};
+ 	};
+ 
+@@ -143,6 +147,10 @@
+ 			ths_calibration: thermal-sensor-calibration@14 {
+ 				reg = <0x14 0x8>;
+ 			};
++
++			cpu_speed_grade: cpu-speed-grade@0 {
++				reg = <0x0 2>;
++			};
+ 		};
+ 
+ 		watchdog: watchdog@30090a0 {
diff --git a/target/linux/sunxi/patches-6.6/023-v6.10-arm64-dts-allwinner-h616-enable-DVFS-for-all-boards.patch b/target/linux/sunxi/patches-6.6/023-v6.10-arm64-dts-allwinner-h616-enable-DVFS-for-all-boards.patch
new file mode 100644
index 0000000000..8c91184117
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/023-v6.10-arm64-dts-allwinner-h616-enable-DVFS-for-all-boards.patch
@@ -0,0 +1,86 @@
+From 09d0aaa0ae9c80ff9569393b206226c1008801b1 Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Thu, 18 Apr 2024 16:44:08 +0100
+Subject: [PATCH] arm64: dts: allwinner: h616: enable DVFS for all boards
+
+With the DT bindings now describing the format of the CPU OPP tables, we
+can include the OPP table in each board's .dts file, and specify the CPU
+power supply.
+This allows to enable DVFS, and get up to 50% of performance benefit in
+the highest OPP, or up to 60% power savings in the lowest OPP, compared
+to the fixed 1GHz @ 1.0V OPP we are running in by default at the moment.
+
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ .../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi      | 5 +++++
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +++++
+ arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts       | 5 +++++
+ .../boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi     | 5 +++++
+ .../arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts | 5 +++++
+ arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 5 +++++
+ .../boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts     | 5 +++++
+ 7 files changed, 35 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -6,12 +6,17 @@
+ /dts-v1/;
+ 
+ #include "sun50i-h616-orangepi-zero.dtsi"
++#include "sun50i-h616-cpu-opp.dtsi"
+ 
+ / {
+ 	model = "OrangePi Zero2";
+ 	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
+ };
+ 
++&cpu0 {
++	cpu-supply = <&reg_dcdca>;
++};
++
+ &emac0 {
+ 	allwinner,rx-delay-ps = <3100>;
+ 	allwinner,tx-delay-ps = <700>;
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
+@@ -6,6 +6,7 @@
+ /dts-v1/;
+ 
+ #include "sun50i-h616.dtsi"
++#include "sun50i-h616-cpu-opp.dtsi"
+ 
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+@@ -32,6 +33,10 @@
+ 	};
+ };
+ 
++&cpu0 {
++	cpu-supply = <&reg_dcdca>;
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
+@@ -6,12 +6,17 @@
+ /dts-v1/;
+ 
+ #include "sun50i-h616-orangepi-zero.dtsi"
++#include "sun50i-h616-cpu-opp.dtsi"
+ 
+ / {
+ 	model = "OrangePi Zero3";
+ 	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
+ };
+ 
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
++
+ &emac0 {
+ 	allwinner,tx-delay-ps = <700>;
+ 	phy-mode = "rgmii-rxid";
diff --git a/target/linux/sunxi/patches-6.6/024-v6.10-cpufreq-sun50i-Fix-build-warning-around-snprint.patch b/target/linux/sunxi/patches-6.6/024-v6.10-cpufreq-sun50i-Fix-build-warning-around-snprint.patch
new file mode 100644
index 0000000000..8bfd6c2d09
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/024-v6.10-cpufreq-sun50i-Fix-build-warning-around-snprint.patch
@@ -0,0 +1,51 @@
+From d2059d3b548409905b20b4f52495bffbd7c8da8b Mon Sep 17 00:00:00 2001
+From: Viresh Kumar <viresh.kumar@linaro.org>
+Date: Mon, 22 Apr 2024 08:58:51 +0530
+Subject: [PATCH] cpufreq: sun50i: Fix build warning around snprint()
+
+The Sun50i driver generates a warning with W=1:
+
+warning: '%d' directive output may be truncated writing between 1 and 10 bytes into a region of size 2 [-Wformat-truncation=]
+
+Fix it by allocating a big enough array to print an integer.
+
+Reported-by: kernel test robot <lkp@intel.com>
+Closes: https://lore.kernel.org/oe-kbuild-all/202404191715.LDwMm2gP-lkp@intel.com/
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+Acked-by: Chen-Yu Tsai <wens@csie.org>
+Reviewed-by: Andre Przywara <andre.przywara@arm.com>
+Tested-by: Andre Przywara <andre.przywara@arm.com>
+Reviewed-by: Julian Calaby <julian.calaby@gmail.com>
+---
+ drivers/cpufreq/sun50i-cpufreq-nvmem.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+@@ -19,8 +19,6 @@
+ #include <linux/pm_opp.h>
+ #include <linux/slab.h>
+ 
+-#define MAX_NAME_LEN	7
+-
+ #define NVMEM_MASK	0x7
+ #define NVMEM_SHIFT	5
+ 
+@@ -208,7 +206,7 @@ static int sun50i_cpufreq_get_efuse(void
+ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
+ {
+ 	int *opp_tokens;
+-	char name[MAX_NAME_LEN];
++	char name[] = "speedXXXXXXXXXXX"; /* Integers can take 11 chars max */
+ 	unsigned int cpu, supported_hw;
+ 	struct dev_pm_opp_config config = {};
+ 	int speed;
+@@ -235,7 +233,7 @@ static int sun50i_cpufreq_nvmem_probe(st
+ 		config.supported_hw_count = 1;
+ 	}
+ 
+-	snprintf(name, MAX_NAME_LEN, "speed%d", speed);
++	snprintf(name, sizeof(name), "speed%d", speed);
+ 	config.prop_name = name;
+ 
+ 	for_each_possible_cpu(cpu) {
diff --git a/target/linux/sunxi/patches-6.6/025-v6.10-cpufreq-sun50i-fix-error-returns-in-dt_has_supported_hw.patch b/target/linux/sunxi/patches-6.6/025-v6.10-cpufreq-sun50i-fix-error-returns-in-dt_has_supported_hw.patch
new file mode 100644
index 0000000000..2304a6af79
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/025-v6.10-cpufreq-sun50i-fix-error-returns-in-dt_has_supported_hw.patch
@@ -0,0 +1,34 @@
+From 76a6fc5644b2a1c70868bec24a078f784600ef2a Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@linaro.org>
+Date: Wed, 24 Apr 2024 14:40:11 +0300
+Subject: [PATCH] cpufreq: sun50i: fix error returns in dt_has_supported_hw()
+
+The dt_has_supported_hw() function returns type bool.  That means these
+negative error codes are cast to true but the function should return
+false instead.
+
+Fixes: fa5aec9561cf ("cpufreq: sun50i: Add support for opp_supported_hw")
+Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
+Reviewed-by: Andre Przywara <andre.przywara@arm.com>
+Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/sun50i-cpufreq-nvmem.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+@@ -136,11 +136,11 @@ static bool dt_has_supported_hw(void)
+ 
+ 	cpu_dev = get_cpu_device(0);
+ 	if (!cpu_dev)
+-		return -ENODEV;
++		return false;
+ 
+ 	np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
+ 	if (!np)
+-		return -ENOENT;
++		return false;
+ 
+ 	for_each_child_of_node(np, opp) {
+ 		if (of_find_property(opp, "opp-supported-hw", NULL)) {
diff --git a/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch b/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch
index 350d7f0403..f605292dcd 100644
--- a/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch
+++ b/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm/boot/dts/allwinner/Makefile
 +++ b/arch/arm/boot/dts/allwinner/Makefile
-@@ -280,6 +280,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
+@@ -219,6 +219,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
  	sun8i-a83t-cubietruck-plus.dtb \
  	sun8i-a83t-tbs-a711.dtb \
  	sun8i-h2-plus-bananapi-m2-zero.dtb \
diff --git a/target/linux/sunxi/patches-6.6/451-sunxi-add-csi-video-support-for-nanopi-neo-air.patch b/target/linux/sunxi/patches-6.6/451-sunxi-add-csi-video-support-for-nanopi-neo-air.patch
new file mode 100644
index 0000000000..c17d28c691
--- /dev/null
+++ b/target/linux/sunxi/patches-6.6/451-sunxi-add-csi-video-support-for-nanopi-neo-air.patch
@@ -0,0 +1,107 @@
+From 4c3a3af679bd59660ac80889b560bddaf475ba81 Mon Sep 17 00:00:00 2001
+From: Michel Promonet <michel.promonet@free.fr>
+Date: Sun, 21 Jul 2024 19:04:19 +0200
+Subject: [PATCH] sunxi: add csi video support for nanopi-neo-air
+
+---
+ .../dts/allwinner/sun8i-h3-nanopi-neo-air.dts | 85 +++++++++++++++++++
+ 1 file changed, 85 insertions(+)
+
+--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
++++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
+@@ -77,6 +77,39 @@
+ 		compatible = "mmc-pwrseq-simple";
+ 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ 	};
++
++        cam_xclk: cam-xclk {
++                #clock-cells = <0>;
++                compatible = "fixed-clock";
++                clock-frequency = <24000000>;
++                clock-output-names = "cam-xclk";
++        };
++
++        reg_cam_avdd: cam-avdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-avdd";
++                regulator-min-microvolt = <2800000>;
++                regulator-max-microvolt = <2800000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++        reg_cam_dovdd: cam-dovdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-dovdd";
++                regulator-min-microvolt = <1800000>;
++                regulator-max-microvolt = <1800000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++        reg_cam_dvdd: cam-dvdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-dvdd";
++                regulator-min-microvolt = <1500000>;
++                regulator-max-microvolt = <1500000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++
+ };
+ 
+ &mmc0 {
+@@ -141,3 +174,55 @@
+ 	/* USB VBUS is always on */
+ 	status = "okay";
+ };
++
++&csi {
++    status = "okay";
++
++    port {
++        #address-cells = <1>;
++        #size-cells = <0>;
++
++        /* Parallel bus endpoint */
++        csi_from_ov5640: endpoint {
++            remote-endpoint = <&ov5640_to_csi>;
++            bus-width = <8>;
++            data-shift = <2>;
++            hsync-active = <1>; /* Active high */
++            vsync-active = <0>; /* Active low */
++            data-active = <1>;  /* Active high */
++            pclk-sample = <1>;  /* Rising */
++        };
++    };
++};
++
++&i2c2 {
++   status = "okay";
++
++   ov5640: camera@3c {
++        compatible = "ovti,ov5640";
++        reg = <0x3c>;
++        clocks = <&cam_xclk>;
++        clock-names = "xclk";
++
++        reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
++        powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
++        AVDD-supply = <&reg_cam_avdd>;
++        DOVDD-supply = <&reg_cam_dovdd>;
++        DVDD-supply = <&reg_cam_dvdd>;
++
++        port {
++            ov5640_to_csi: endpoint {
++                remote-endpoint = <&csi_from_ov5640>;
++                bus-width = <8>;
++                data-shift = <2>;
++                hsync-active = <1>; /* Active high */
++                vsync-active = <0>; /* Active low */
++                data-active = <1>;  /* Active high */
++                pclk-sample = <1>;  /* Rising */
++            };
++        };
++    };
++};
++&i2c2_pins {
++   bias-pull-up;
++};
diff --git a/target/linux/tegra/Makefile b/target/linux/tegra/Makefile
index 3513e2751e..b917ea909d 100644
--- a/target/linux/tegra/Makefile
+++ b/target/linux/tegra/Makefile
@@ -12,8 +12,7 @@ CPU_TYPE := cortex-a9
 CPU_SUBTYPE := vfpv3-d16
 SUBTARGETS := generic
 
-KERNEL_PATCHVER := 5.15
-KERNEL_TESTING_PATCHVER := 6.6
+KERNEL_PATCHVER := 6.6
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/tegra/config-5.15 b/target/linux/tegra/config-5.15
deleted file mode 100644
index c143c3f5a9..0000000000
--- a/target/linux/tegra/config-5.15
+++ /dev/null
@@ -1,506 +0,0 @@
-CONFIG_AC97_BUS=y
-# CONFIG_AHCI_TEGRA is not set
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_32BIT_OFF_T=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_KEEP_MEMBLOCK=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y
-CONFIG_ARCH_NR_GPIO=1024
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_TEGRA=y
-# CONFIG_ARCH_TEGRA_114_SOC is not set
-# CONFIG_ARCH_TEGRA_124_SOC is not set
-CONFIG_ARCH_TEGRA_2x_SOC=y
-# CONFIG_ARCH_TEGRA_3x_SOC is not set
-CONFIG_ARM=y
-CONFIG_ARM_AMBA=y
-CONFIG_ARM_CPU_SUSPEND=y
-CONFIG_ARM_CRYPTO=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_ARM_ERRATA_754327=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_HEAVY_MB=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-CONFIG_ARM_PATCH_IDIV=y
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-# CONFIG_ARM_PL172_MPMC is not set
-# CONFIG_ARM_SMMU is not set
-# CONFIG_ARM_TEGRA124_CPUFREQ is not set
-CONFIG_ARM_TEGRA20_CPUFREQ=y
-CONFIG_ARM_TEGRA_CPUIDLE=y
-CONFIG_ARM_THUMB=y
-CONFIG_ARM_THUMBEE=y
-CONFIG_ARM_UNWIND=y
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ASN1=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
-CONFIG_BLK_DEV_BSG=y
-CONFIG_BLK_DEV_BSG_COMMON=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BLK_PM=y
-CONFIG_BOUNCE=y
-CONFIG_CACHE_L2X0=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CLZ_TAB=y
-CONFIG_CMA=y
-CONFIG_CMA_ALIGNMENT=8
-CONFIG_CMA_AREAS=7
-# CONFIG_CMA_DEBUG is not set
-# CONFIG_CMA_DEBUGFS is not set
-CONFIG_CMA_SIZE_MBYTES=16
-# CONFIG_CMA_SIZE_SEL_MAX is not set
-CONFIG_CMA_SIZE_SEL_MBYTES=y
-# CONFIG_CMA_SIZE_SEL_MIN is not set
-# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
-# CONFIG_CMA_SYSFS is not set
-CONFIG_COMMON_CLK=y
-CONFIG_COMPAT_32BIT_TIME=y
-CONFIG_CONTIG_ALLOC=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_CPUFREQ_DT_PLATDEV=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-CONFIG_CPU_FREQ_GOV_ATTR_SET=y
-CONFIG_CPU_FREQ_GOV_COMMON=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-# CONFIG_CPU_FREQ_STAT is not set
-CONFIG_CPU_HAS_ASID=y
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_PM=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_SPECTRE=y
-CONFIG_CPU_THUMB_CAPABLE=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-# CONFIG_CRC32_SARWATE is not set
-CONFIG_CRC32_SLICEBY8=y
-CONFIG_CROSS_MEMORY_ATTACH=y
-CONFIG_CRYPTO_AES_ARM=y
-CONFIG_CRYPTO_CRC32=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CRYPTD=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_DRBG=y
-CONFIG_CRYPTO_DRBG_HMAC=y
-CONFIG_CRYPTO_DRBG_MENU=y
-CONFIG_CRYPTO_ECHAINIV=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_JITTERENTROPY=y
-CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
-CONFIG_CRYPTO_LIB_SHA256=y
-CONFIG_CRYPTO_LZ4=y
-CONFIG_CRYPTO_LZ4HC=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_RNG=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_RNG_DEFAULT=y
-CONFIG_CRYPTO_RSA=y
-CONFIG_CRYPTO_SEQIV=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA1_ARM=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA256_ARM=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_SHA512_ARM=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_TWOFISH_COMMON=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_ALIGN_RODATA=y
-CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
-# CONFIG_DEVFREQ_GOV_PASSIVE is not set
-# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
-# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
-CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
-# CONFIG_DEVFREQ_GOV_USERSPACE is not set
-CONFIG_DEVFREQ_THERMAL=y
-# CONFIG_DEVPORT is not set
-CONFIG_DMADEVICES=y
-CONFIG_DMA_CMA=y
-CONFIG_DMA_ENGINE=y
-CONFIG_DMA_OF=y
-CONFIG_DMA_OPS=y
-CONFIG_DMA_REMAP=y
-CONFIG_DMA_SHARED_BUFFER=y
-CONFIG_DNOTIFY=y
-CONFIG_DRM=y
-CONFIG_DRM_BRIDGE=y
-CONFIG_DRM_DP_AUX_BUS=y
-CONFIG_DRM_FBDEV_EMULATION=y
-CONFIG_DRM_FBDEV_OVERALLOC=100
-CONFIG_DRM_KMS_HELPER=y
-CONFIG_DRM_MIPI_DSI=y
-CONFIG_DRM_PANEL=y
-CONFIG_DRM_PANEL_BRIDGE=y
-CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
-CONFIG_DRM_TEGRA=y
-# CONFIG_DRM_TEGRA_DEBUG is not set
-# CONFIG_DRM_TEGRA_STAGING is not set
-CONFIG_DTC=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EXT4_FS=y
-CONFIG_EXTCON=y
-CONFIG_F2FS_FS=y
-CONFIG_FB=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_CMDLINE=y
-CONFIG_FB_DEFERRED_IO=y
-CONFIG_FB_SYS_COPYAREA=y
-CONFIG_FB_SYS_FILLRECT=y
-CONFIG_FB_SYS_FOPS=y
-CONFIG_FB_SYS_IMAGEBLIT=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FS_IOMAP=y
-CONFIG_FS_MBCACHE=y
-CONFIG_FUNCTION_ALIGNMENT=0
-CONFIG_FW_LOADER_PAGED_BUF=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_ARCH_TOPOLOGY=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_CPU_VULNERABILITIES=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_GETTIMEOFDAY=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
-CONFIG_GENERIC_IRQ_MIGRATION=y
-CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
-CONFIG_GENERIC_MSI_IRQ=y
-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_PINCTRL_GROUPS=y
-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GENERIC_VDSO_32=y
-CONFIG_GLOB=y
-CONFIG_GPIOLIB_IRQCHIP=y
-CONFIG_GPIO_CDEV=y
-CONFIG_GPIO_TEGRA=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDEN_BRANCH_PREDICTOR=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-CONFIG_HAVE_SMP=y
-CONFIG_HDMI=y
-CONFIG_HID=y
-CONFIG_HIDRAW=y
-CONFIG_HID_GENERIC=y
-CONFIG_HIGHMEM=y
-CONFIG_HIGHPTE=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_HWMON=y
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_COMPAT=y
-CONFIG_I2C_TEGRA=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INPUT=y
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_INTERCONNECT=y
-CONFIG_IOMMU_API=y
-# CONFIG_IOMMU_DEBUGFS is not set
-CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
-CONFIG_IOMMU_IOVA=y
-# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
-# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
-CONFIG_IOMMU_SUPPORT=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_JBD2=y
-CONFIG_KCMP=y
-CONFIG_KEYBOARD_ATKBD=y
-CONFIG_KMAP_LOCAL=y
-CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_DEBUGGING_SUPPORT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LZ4HC_COMPRESS=y
-CONFIG_LZ4_COMPRESS=y
-CONFIG_LZ4_DECOMPRESS=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MEMFD_CREATE=y
-CONFIG_MEMORY=y
-CONFIG_MEMORY_ISOLATION=y
-# CONFIG_MFD_ACER_A500_EC is not set
-# CONFIG_MFD_NVEC is not set
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGRATION=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_CQHCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_IO_ACCESSORS=y
-# CONFIG_MMC_SDHCI_PCI is not set
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_TEGRA=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MPILIB=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-# CONFIG_NEON is not set
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NLS=y
-CONFIG_NR_CPUS=4
-CONFIG_NVMEM=y
-CONFIG_NVMEM_LAYOUTS=y
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IOMMU=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_KOBJ=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PADATA=y
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_PCI=y
-CONFIG_PCIEAER=y
-CONFIG_PCIEASPM=y
-CONFIG_PCIEASPM_DEFAULT=y
-# CONFIG_PCIEASPM_PERFORMANCE is not set
-# CONFIG_PCIEASPM_POWERSAVE is not set
-# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCIE_PME=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_MSI_IRQ_DOMAIN=y
-CONFIG_PCI_TEGRA=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHY_TEGRA_XUSB=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_TEGRA=y
-CONFIG_PINCTRL_TEGRA20=y
-CONFIG_PINCTRL_TEGRA_XUSB=y
-CONFIG_PL310_ERRATA_727915=y
-CONFIG_PL310_ERRATA_769419=y
-CONFIG_PL353_SMC=y
-CONFIG_PM=y
-CONFIG_PM_CLK=y
-CONFIG_PM_DEVFREQ=y
-# CONFIG_PM_DEVFREQ_EVENT is not set
-CONFIG_PM_GENERIC_DOMAINS=y
-CONFIG_PM_GENERIC_DOMAINS_OF=y
-CONFIG_PM_OPP=y
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_PROC_PAGE_MONITOR=y
-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
-CONFIG_PWM=y
-CONFIG_PWM_SYSFS=y
-CONFIG_PWM_TEGRA=y
-CONFIG_RAS=y
-CONFIG_RATIONAL=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_REGMAP_SPI=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_GPIO=y
-CONFIG_RESET_CONTROLLER=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_DRV_CMOS is not set
-CONFIG_RTC_DRV_TEGRA=y
-CONFIG_RTC_I2C_AND_SPI=y
-CONFIG_RTC_NVMEM=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_SCSI=y
-CONFIG_SCSI_COMMON=y
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_8250_TEGRA=y
-CONFIG_SERIAL_MCTRL_GPIO=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIAL_TEGRA=y
-CONFIG_SERIO=y
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SGL_ALLOC=y
-CONFIG_SG_POOL=y
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SND=y
-# CONFIG_SND_COMPRESS_OFFLOAD is not set
-CONFIG_SND_DMAENGINE_PCM=y
-# CONFIG_SND_HDA_TEGRA is not set
-CONFIG_SND_JACK=y
-CONFIG_SND_JACK_INPUT_DEV=y
-# CONFIG_SND_PCI is not set
-CONFIG_SND_PCM=y
-# CONFIG_SND_PROC_FS is not set
-CONFIG_SND_SIMPLE_CARD=y
-CONFIG_SND_SIMPLE_CARD_UTILS=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_AC97_BUS=y
-CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
-CONFIG_SND_SOC_I2C_AND_SPI=y
-CONFIG_SND_SOC_TEGRA=y
-# CONFIG_SND_SOC_TEGRA186_DSPK is not set
-CONFIG_SND_SOC_TEGRA20_AC97=y
-CONFIG_SND_SOC_TEGRA20_DAS=y
-CONFIG_SND_SOC_TEGRA20_I2S=y
-CONFIG_SND_SOC_TEGRA20_SPDIF=y
-# CONFIG_SND_SOC_TEGRA210_ADMAIF is not set
-# CONFIG_SND_SOC_TEGRA210_AHUB is not set
-# CONFIG_SND_SOC_TEGRA210_DMIC is not set
-# CONFIG_SND_SOC_TEGRA210_I2S is not set
-# CONFIG_SND_SOC_TEGRA30_AHUB is not set
-# CONFIG_SND_SOC_TEGRA30_I2S is not set
-# CONFIG_SND_SOC_TEGRA_ALC5632 is not set
-CONFIG_SND_SOC_TEGRA_MACHINE_DRV=y
-# CONFIG_SND_SOC_TEGRA_MAX98090 is not set
-# CONFIG_SND_SOC_TEGRA_RT5640 is not set
-# CONFIG_SND_SOC_TEGRA_RT5677 is not set
-# CONFIG_SND_SOC_TEGRA_SGTL5000 is not set
-CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
-# CONFIG_SND_SOC_TEGRA_WM8753 is not set
-# CONFIG_SND_SOC_TEGRA_WM8903 is not set
-# CONFIG_SND_SOC_TEGRA_WM9712 is not set
-CONFIG_SND_SOC_TLV320AIC23=y
-CONFIG_SND_SOC_TLV320AIC23_I2C=y
-# CONFIG_SND_USB is not set
-CONFIG_SOCK_RX_QUEUE_MAPPING=y
-CONFIG_SOC_BUS=y
-CONFIG_SOC_TEGRA20_VOLTAGE_COUPLER=y
-CONFIG_SOC_TEGRA_FLOWCTRL=y
-CONFIG_SOC_TEGRA_FUSE=y
-CONFIG_SOC_TEGRA_PMC=y
-CONFIG_SOUND=y
-CONFIG_SOUND_OSS_CORE=y
-CONFIG_SOUND_OSS_CORE_PRECLAIM=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_MEM=y
-# CONFIG_SPI_TEGRA114 is not set
-CONFIG_SPI_TEGRA20_SFLASH=y
-CONFIG_SPI_TEGRA20_SLINK=y
-# CONFIG_SPI_TEGRA210_QUAD is not set
-CONFIG_SRCU=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYNC_FILE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_TEGRA20_APB_DMA=y
-CONFIG_TEGRA20_EMC=y
-CONFIG_TEGRA_AHB=y
-CONFIG_TEGRA_GMI=y
-CONFIG_TEGRA_HOST1X=y
-CONFIG_TEGRA_HOST1X_FIREWALL=y
-CONFIG_TEGRA_IOMMU_GART=y
-# CONFIG_TEGRA_IOMMU_SMMU is not set
-# CONFIG_TEGRA_IVC is not set
-CONFIG_TEGRA_MC=y
-# CONFIG_TEGRA_SOCTHERM is not set
-CONFIG_TEGRA_TIMER=y
-CONFIG_TEGRA_WATCHDOG=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_OF=y
-CONFIG_TIMER_PROBE=y
-CONFIG_TREE_RCU=y
-CONFIG_TREE_SRCU=y
-# CONFIG_UACCE is not set
-# CONFIG_UCLAMP_TASK is not set
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_UNWINDER_ARM=y
-CONFIG_USB=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_CHIPIDEA_TEGRA=y
-CONFIG_USB_CHIPIDEA_UDC=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_CONN_GPIO=y
-CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_HCD_PLATFORM is not set
-CONFIG_USB_EHCI_TEGRA=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_HID=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB_PHY=y
-CONFIG_USB_ROLE_SWITCH=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USB_TEGRA_PHY=y
-# CONFIG_USB_TEGRA_XUDC is not set
-CONFIG_USB_ULPI=y
-CONFIG_USB_ULPI_BUS=y
-CONFIG_USB_ULPI_VIEWPORT=y
-# CONFIG_USB_XHCI_TEGRA is not set
-CONFIG_USE_OF=y
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_WATCHDOG_CORE=y
-# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_ZBOOT_ROM_TEXT=0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
diff --git a/target/linux/tegra/image/Makefile b/target/linux/tegra/image/Makefile
index 7103b6d36e..96b095e649 100644
--- a/target/linux/tegra/image/Makefile
+++ b/target/linux/tegra/image/Makefile
@@ -32,11 +32,7 @@ DEVICE_VARS += BOOT_SCRIPT UBOOT
 
 define Device/Default
   BOOT_SCRIPT := generic-bootscript
-ifeq ($(KERNEL),6.6)
   DEVICE_DTS_DIR := $$(DTS_DIR)/nvidia
-else
-  DEVICE_DTS_DIR := $$(DTS_DIR)
-endif
   IMAGES := sdcard.img.gz
   IMAGE/sdcard.img.gz := append-rootfs | pad-extra 128k | tegra-sdcard | gzip | append-metadata
   KERNEL_NAME := zImage
diff --git a/target/linux/tegra/patches-5.15/100-serial8250-on-tegra-hsuart-recover-from-spurious-interrupts-due-to-tegra2-silicon-bug.patch b/target/linux/tegra/patches-5.15/100-serial8250-on-tegra-hsuart-recover-from-spurious-interrupts-due-to-tegra2-silicon-bug.patch
deleted file mode 100644
index 8f01f73eb2..0000000000
--- a/target/linux/tegra/patches-5.15/100-serial8250-on-tegra-hsuart-recover-from-spurious-interrupts-due-to-tegra2-silicon-bug.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From patchwork Fri Jul 13 11:32:42 2018
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: serial8250 on tegra hsuart: recover from spurious interrupts due to
- tegra2 silicon bug
-X-Patchwork-Submitter: "David R. Piegdon" <lkml@p23q.org>
-X-Patchwork-Id: 943440
-Message-Id: <4676ea34-69ce-5422-1ded-94218b89f7d9@p23q.org>
-To: linux-tegra@vger.kernel.org
-Date: Fri, 13 Jul 2018 11:32:42 +0000
-From: "David R. Piegdon" <lkml@p23q.org>
-List-Id: <linux-tegra.vger.kernel.org>
-
-Hi,
-a while back I sent a few mails regarding spurious interrupts in the
-UARTA (hsuart) block of the Tegra2 SoC, when using the 8250 driver for
-it instead of the hsuart driver. After going down a pretty deep
-debugging/testing hole, I think I found a patch that fixes the issue. So
-far testing in a reboot-cycle suggests that the error frequency dropped
-from >3% of all reboots to at least <0.05% of all reboots. Tests
-continue to run over the weekend.
-
-The patch below already is a second iteration; the first did not reset
-the MCR or contain the lines below '// clear interrupts'. This resulted
-in no more spurious interrupts, but in a few % of spurious interrupts
-that were recovered the UART block did not receive any characters any
-more. So further resetting was required to fully reacquire operational
-state of the UART block.
-
-I'd love any comments/suggestions on this!
-
-Cheers,
-
-David
-
---- a/drivers/tty/serial/8250/8250_core.c
-+++ b/drivers/tty/serial/8250/8250_core.c
-@@ -134,6 +134,38 @@ static irqreturn_t serial8250_interrupt(
- 
- 		if (l == i->head && pass_counter++ > PASS_LIMIT)
- 			break;
-+
-+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
-+		if (!handled && (port->type == PORT_TEGRA)) {
-+			/*
-+			 * Fix Tegra 2 CPU silicon bug where sometimes
-+			 * "TX holding register empty" interrupts result in a
-+			 * bad (metastable?) state in Tegras HSUART IP core.
-+			 * Only way to recover seems to be to reset all
-+			 * interrupts as well as the TX queue and the MCR.
-+			 * But we don't want to loose any outgoing characters,
-+			 * so only do it if the RX and TX queues are empty.
-+			 */
-+			unsigned char lsr = port->serial_in(port, UART_LSR);
-+			const unsigned char fifo_empty_mask =
-+						(UART_LSR_TEMT | UART_LSR_THRE);
-+			if (((lsr & (UART_LSR_DR | fifo_empty_mask)) ==
-+							fifo_empty_mask)) {
-+				port->serial_out(port, UART_IER, 0);
-+				port->serial_out(port, UART_MCR, 0);
-+				serial8250_clear_and_reinit_fifos(up);
-+				port->serial_out(port, UART_MCR, up->mcr);
-+				port->serial_out(port, UART_IER, up->ier);
-+				// clear interrupts
-+				serial_port_in(port, UART_LSR);
-+				serial_port_in(port, UART_RX);
-+				serial_port_in(port, UART_IIR);
-+				serial_port_in(port, UART_MSR);
-+				up->lsr_saved_flags = 0;
-+				up->msr_saved_flags = 0;
-+			}
-+		}
-+#endif
- 	} while (l != end);
- 
- 	spin_unlock(&i->lock);
diff --git a/target/linux/tegra/patches-5.15/101-ARM-dtc-tegra-enable-front-panel-leds-in-TrimSlice.patch b/target/linux/tegra/patches-5.15/101-ARM-dtc-tegra-enable-front-panel-leds-in-TrimSlice.patch
deleted file mode 100644
index b1e210b212..0000000000
--- a/target/linux/tegra/patches-5.15/101-ARM-dtc-tegra-enable-front-panel-leds-in-TrimSlice.patch
+++ /dev/null
@@ -1,46 +0,0 @@
---- a/arch/arm/boot/dts/tegra20-trimslice.dts
-+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
-@@ -201,16 +201,17 @@
- 			conf_ata {
- 				nvidia,pins = "ata", "atc", "atd", "ate",
- 					"crtp", "dap2", "dap3", "dap4", "dta",
--					"dtb", "dtc", "dtd", "dte", "gmb",
--					"gme", "i2cp", "pta", "slxc", "slxd",
--					"spdi", "spdo", "uda";
-+					"dtb", "dtc", "dtd", "gmb", "gme",
-+					"i2cp", "pta", "slxc", "slxd", "spdi",
-+					"spdo", "uda";
- 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
- 			};
- 			conf_atb {
- 				nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
--					"gma", "gmc", "gmd", "gpu", "gpu7",
--					"gpv", "sdio1", "slxa", "slxk", "uac";
-+					"dte", "gma", "gmc", "gmd", "gpu",
-+					"gpu7", "gpv", "sdio1", "slxa", "slxk",
-+					"uac";
- 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
- 			};
-@@ -396,6 +397,20 @@
- 		};
- 	};
- 
-+	gpio-leds {
-+		compatible = "gpio-leds";
-+
-+		ds2 {
-+			label = "trimslice:green:right";
-+			gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_LOW>;
-+		};
-+
-+		ds3 {
-+			label = "trimslice:green:left";
-+			gpios = <&gpio TEGRA_GPIO(BB, 5) GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
- 	poweroff {
- 		compatible = "gpio-poweroff";
- 		gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
diff --git a/target/linux/x86/base-files/etc/board.d/02_network b/target/linux/x86/base-files/etc/board.d/02_network
index 5174906264..c4c2d3fa21 100644
--- a/target/linux/x86/base-files/etc/board.d/02_network
+++ b/target/linux/x86/base-files/etc/board.d/02_network
@@ -31,6 +31,9 @@ cisco-mx100-hw)
 	ucidef_set_network_device_path "eth11" "pci0000:00/0000:00:01.1/0000:02:00.2"
 	ucidef_set_interfaces_lan_wan "mgmt eth2 eth3 eth4 eth5 eth6 eth7 eth8 eth9 eth10 eth11" "wan"
 	;;
+dell-emc-edge620)
+	ucidef_set_interfaces_lan_wan "eth0 eth1 eth2 eth3 eth7" "eth6"
+	;;
 pc-engines-apu1|pc-engines-apu2|pc-engines-apu3)
 	ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0"
 	;;
diff --git a/target/linux/zynq/Makefile b/target/linux/zynq/Makefile
index 90e49df878..c570fae73b 100644
--- a/target/linux/zynq/Makefile
+++ b/target/linux/zynq/Makefile
@@ -18,7 +18,7 @@ define Target/Description
 	Build firmware image for Zynq 7000 SoC devices.
 endef
 
-KERNEL_PATCHVER:=6.1
+KERNEL_PATCHVER:=6.6
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/zynq/config-6.1 b/target/linux/zynq/config-6.6
index b6318a776c..15716a12cd 100644
--- a/target/linux/zynq/config-6.1
+++ b/target/linux/zynq/config-6.6
@@ -8,11 +8,11 @@ CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
 CONFIG_ARCH_MULTIPLATFORM=y
 CONFIG_ARCH_MULTI_V6_V7=y
 CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_NR_GPIO=1024
 CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
 CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_STACKWALK=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y
@@ -54,6 +54,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
 CONFIG_BLK_MQ_PCI=y
 CONFIG_BLK_PM=y
 CONFIG_BOUNCE=y
+CONFIG_BUFFER_HEAD=y
 CONFIG_CACHE_L2X0=y
 CONFIG_CADENCE_TTC_TIMER=y
 CONFIG_CADENCE_WATCHDOG=y
@@ -88,7 +89,6 @@ CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
 CONFIG_CONTIG_ALLOC=y
 CONFIG_COREDUMP=y
-# CONFIG_CPUFREQ_DT is not set
 CONFIG_CPU_32v6K=y
 CONFIG_CPU_32v7=y
 CONFIG_CPU_ABRT_EV7=y
@@ -113,6 +113,7 @@ CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_CPU_IDLE_GOV_MENU=y
 CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_PABRT_V7=y
 CONFIG_CPU_PM=y
 CONFIG_CPU_RMAP=y
@@ -129,9 +130,9 @@ CONFIG_CRYPTO_CRC32=y
 CONFIG_CRYPTO_CRC32C=y
 CONFIG_CRYPTO_HW=y
 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
 CONFIG_CRYPTO_LIB_SHA1=y
 CONFIG_CRYPTO_LIB_UTILS=y
-CONFIG_CRYPTO_RNG2=y
 CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
 CONFIG_DCACHE_WORD_ACCESS=y
 CONFIG_DEBUG_INFO=y
@@ -144,7 +145,6 @@ CONFIG_DMA_OPS=y
 CONFIG_DMA_SHARED_BUFFER=y
 CONFIG_DRM=y
 CONFIG_DRM_BRIDGE=y
-CONFIG_DRM_NOMODESET=y
 CONFIG_DRM_PANEL=y
 CONFIG_DRM_PANEL_BRIDGE=y
 CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
@@ -165,7 +165,8 @@ CONFIG_EXT4_FS=y
 CONFIG_EXTCON=y
 CONFIG_F2FS_FS=y
 CONFIG_FB=y
-CONFIG_FB_CMDLINE=y
+CONFIG_FB_CORE=y
+CONFIG_FB_IOMEM_FOPS=y
 # CONFIG_FB_XILINX is not set
 CONFIG_FHANDLE=y
 CONFIG_FIXED_PHY=y
@@ -176,6 +177,7 @@ CONFIG_FPGA_BRIDGE=y
 # CONFIG_FPGA_MGR_ALTERA_CVP is not set
 # CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set
 # CONFIG_FPGA_MGR_ICE40_SPI is not set
+# CONFIG_FPGA_MGR_LATTICE_SYSCONFIG_SPI is not set
 # CONFIG_FPGA_MGR_MACHXO2_SPI is not set
 # CONFIG_FPGA_MGR_MICROCHIP_SPI is not set
 # CONFIG_FPGA_MGR_XILINX_SPI is not set
@@ -184,12 +186,12 @@ CONFIG_FPGA_REGION=y
 CONFIG_FREEZER=y
 CONFIG_FS_IOMAP=y
 CONFIG_FS_MBCACHE=y
+CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
 CONFIG_FW_CACHE=y
 CONFIG_FW_LOADER_PAGED_BUF=y
 CONFIG_FW_LOADER_SYSFS=y
 CONFIG_GCC10_NO_ARRAY_BOUNDS=y
-CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
 CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_GENERIC_ARCH_TOPOLOGY=y
 CONFIG_GENERIC_BUG=y
@@ -207,7 +209,6 @@ CONFIG_GENERIC_IRQ_SHOW=y
 CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
 CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
 CONFIG_GENERIC_MSI_IRQ=y
-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
 CONFIG_GENERIC_PCI_IOMAP=y
 CONFIG_GENERIC_PINCONF=y
 CONFIG_GENERIC_SCHED_CLOCK=y
@@ -226,19 +227,18 @@ CONFIG_HARDEN_BRANCH_PREDICTOR=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
 CONFIG_HAVE_SMP=y
 CONFIG_HDMI=y
-CONFIG_HID=y
-CONFIG_HID_GENERIC=y
-CONFIG_HID_MICROSOFT=y
 CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
+CONFIG_HOTPLUG_CORE_SYNC=y
+CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
 CONFIG_HOTPLUG_CPU=y
 CONFIG_HWMON=y
 CONFIG_HW_CONSOLE=y
 CONFIG_HZ_FIXED=0
 CONFIG_I2C=y
-CONFIG_I2C_ALGOBIT=y
 CONFIG_I2C_BOARDINFO=y
 CONFIG_I2C_CADENCE=y
 CONFIG_I2C_CHARDEV=y
@@ -263,6 +263,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 CONFIG_INPUT_SPARSEKMAP=y
 CONFIG_INPUT_VIVALDIFMAP=y
+# CONFIG_IOMMUFD is not set
 # CONFIG_IOMMU_DEBUGFS is not set
 # CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
 # CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
@@ -293,7 +294,6 @@ CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_TRIGGER_BACKLIGHT=y
 CONFIG_LEDS_TRIGGER_CAMERA=y
 CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
 CONFIG_LEDS_TRIGGER_ONESHOT=y
 CONFIG_LEDS_TRIGGER_TRANSIENT=y
 CONFIG_LIBFDT=y
@@ -308,7 +308,6 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 # CONFIG_MDIO_GPIO is not set
-CONFIG_MEMFD_CREATE=y
 CONFIG_MEMORY=y
 CONFIG_MEMORY_ISOLATION=y
 CONFIG_MFD_CORE=y
@@ -323,6 +322,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_OF_ARASAN=y
 # CONFIG_MMC_SDHCI_PCI is not set
 CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_STRIPPED is not set
@@ -352,8 +352,11 @@ CONFIG_MTD_SPLIT_FIRMWARE=y
 # CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SRCU_NMI_SAFE=y
 CONFIG_NEON=y
+CONFIG_NET_EGRESS=y
 CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_INGRESS=y
 CONFIG_NET_PTP_CLASSIFY=y
 CONFIG_NET_SELFTESTS=y
 # CONFIG_NET_VENDOR_CIRRUS is not set
@@ -366,6 +369,7 @@ CONFIG_NET_SELFTESTS=y
 # CONFIG_NET_VENDOR_SMSC is not set
 # CONFIG_NET_VENDOR_STMICRO is not set
 # CONFIG_NET_VENDOR_VIA is not set
+CONFIG_NET_XGRESS=y
 CONFIG_NLS=y
 CONFIG_NLS_ASCII=y
 CONFIG_NLS_CODEPAGE_437=y
@@ -397,14 +401,12 @@ CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_PAGE_POOL=y
 CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
-CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_PCI=y
 CONFIG_PCIE_XILINX=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DOMAINS_GENERIC=y
 CONFIG_PCI_MSI=y
-CONFIG_PCI_MSI_IRQ_DOMAIN=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
@@ -434,6 +436,7 @@ CONFIG_PROC_EVENTS=y
 CONFIG_PTP_1588_CLOCK=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_R8169=y
+CONFIG_R8169_LEDS=y
 CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
@@ -478,9 +481,9 @@ CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
 CONFIG_SPI_XILINX=y
 CONFIG_SPI_ZYNQ_QSPI=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_SRAM=y
 CONFIG_SRAM_EXEC=y
-CONFIG_SRCU=y
 # CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
@@ -524,7 +527,6 @@ CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_XILINX=y
-CONFIG_USB_HID=y
 CONFIG_USB_NET_DRIVERS=y
 CONFIG_USB_OTG=y
 CONFIG_USB_OTG_FSM=y
@@ -540,6 +542,8 @@ CONFIG_VFP=y
 CONFIG_VFPv3=y
 CONFIG_VGA_ARB=y
 CONFIG_VGA_ARB_MAX_GPUS=16
+CONFIG_VIDEO_CMDLINE=y
+CONFIG_VIDEO_NOMODESET=y
 CONFIG_VITESSE_PHY=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_VT=y
diff --git a/target/linux/zynq/image/Makefile b/target/linux/zynq/image/Makefile
index 0931871624..4a9c2f047d 100644
--- a/target/linux/zynq/image/Makefile
+++ b/target/linux/zynq/image/Makefile
@@ -29,6 +29,7 @@ endef
 
 define Device/Default
 	PROFILES := Default
+	DTS_DIR := $(DTS_DIR)/xilinx
 	DEVICE_DTS := $(lastword $(subst _, ,$(1)))
 	KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
 	KERNEL_LOADADDR := 0x8000
diff --git a/toolchain/binutils/Config.in b/toolchain/binutils/Config.in
index caa9bcde8b..3e3a2b5509 100644
--- a/toolchain/binutils/Config.in
+++ b/toolchain/binutils/Config.in
@@ -29,6 +29,10 @@ choice
 	config BINUTILS_USE_VERSION_2_42
 		bool "Binutils 2.42"
 		select BINUTILS_VERSION_2_42
+
+	config BINUTILS_USE_VERSION_2_43
+		bool "Binutils 2.43"
+		select BINUTILS_VERSION_2_43
 endchoice
 
 config EXTRA_BINUTILS_CONFIG_OPTIONS
diff --git a/toolchain/binutils/Config.version b/toolchain/binutils/Config.version
index 81815ebed2..b2bf7f7d00 100644
--- a/toolchain/binutils/Config.version
+++ b/toolchain/binutils/Config.version
@@ -18,6 +18,9 @@ config BINUTILS_VERSION_2_42
 	default y if !TOOLCHAINOPTS
 	bool
 
+config BINUTILS_VERSION_2_43
+	bool
+
 config BINUTILS_VERSION
 	string
 	default "2.37"			if BINUTILS_VERSION_2_37
@@ -26,3 +29,4 @@ config BINUTILS_VERSION
 	default "2.40"			if BINUTILS_VERSION_2_40
 	default "2.41"			if BINUTILS_VERSION_2_41
 	default "2.42"			if BINUTILS_VERSION_2_42
+	default "2.43"			if BINUTILS_VERSION_2_43
diff --git a/toolchain/binutils/Makefile b/toolchain/binutils/Makefile
index 8635e9710a..1db64d058c 100644
--- a/toolchain/binutils/Makefile
+++ b/toolchain/binutils/Makefile
@@ -40,6 +40,10 @@ ifeq ($(PKG_VERSION),2.42)
   PKG_HASH:=f6e4d41fd5fc778b06b7891457b3620da5ecea1006c6a4a41ae998109f85a800
 endif
 
+ifeq ($(PKG_VERSION),2.43)
+  PKG_HASH:=b53606f443ac8f01d1d5fc9c39497f2af322d99e14cea5c0b4b124d630379365
+endif
+
 HOST_BUILD_PARALLEL:=1
 
 PATCH_DIR:=./patches/$(PKG_VERSION)
diff --git a/toolchain/binutils/patches/2.43/300-001_ld_makefile_patch.patch b/toolchain/binutils/patches/2.43/300-001_ld_makefile_patch.patch
new file mode 100644
index 0000000000..64dae55dd7
--- /dev/null
+++ b/toolchain/binutils/patches/2.43/300-001_ld_makefile_patch.patch
@@ -0,0 +1,22 @@
+--- a/ld/Makefile.am
++++ b/ld/Makefile.am
+@@ -50,7 +50,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CFLAGS)
+ # We put the scripts in the directory $(scriptdir)/ldscripts.
+ # We can't put the scripts in $(datadir) because the SEARCH_DIR
+ # directives need to be different for native and cross linkers.
+-scriptdir = $(tooldir)/lib
++scriptdir = $(libdir)
+ 
+ EMUL = @EMUL@
+ EMULATION_OFILES = @EMULATION_OFILES@
+--- a/ld/Makefile.in
++++ b/ld/Makefile.in
+@@ -583,7 +583,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CFLAGS)
+ # We put the scripts in the directory $(scriptdir)/ldscripts.
+ # We can't put the scripts in $(datadir) because the SEARCH_DIR
+ # directives need to be different for native and cross linkers.
+-scriptdir = $(tooldir)/lib
++scriptdir = $(libdir)
+ BASEDIR = $(srcdir)/..
+ BFDDIR = $(BASEDIR)/bfd
+ INCDIR = $(BASEDIR)/include
diff --git a/toolchain/binutils/patches/2.43/400-mips_no_dynamic_linking_sym.patch b/toolchain/binutils/patches/2.43/400-mips_no_dynamic_linking_sym.patch
new file mode 100644
index 0000000000..d0cc7ddc69
--- /dev/null
+++ b/toolchain/binutils/patches/2.43/400-mips_no_dynamic_linking_sym.patch
@@ -0,0 +1,18 @@
+--- a/bfd/elfxx-mips.c
++++ b/bfd/elfxx-mips.c
+@@ -8161,6 +8161,7 @@ _bfd_mips_elf_create_dynamic_sections (b
+ 
+       name = SGI_COMPAT (abfd) ? "_DYNAMIC_LINK" : "_DYNAMIC_LINKING";
+       bh = NULL;
++      if (0) {
+       if (!(_bfd_generic_link_add_one_symbol
+ 	    (info, abfd, name, BSF_GLOBAL, bfd_abs_section_ptr, 0,
+ 	     NULL, false, get_elf_backend_data (abfd)->collect, &bh)))
+@@ -8173,6 +8174,7 @@ _bfd_mips_elf_create_dynamic_sections (b
+ 
+       if (! bfd_elf_link_record_dynamic_symbol (info, h))
+ 	return false;
++      }
+ 
+       if (! mips_elf_hash_table (info)->use_rld_obj_head)
+ 	{
diff --git a/toolchain/binutils/patches/2.43/500-Change-default-emulation-for-mips64-linux.patch b/toolchain/binutils/patches/2.43/500-Change-default-emulation-for-mips64-linux.patch
new file mode 100644
index 0000000000..df38fcaba1
--- /dev/null
+++ b/toolchain/binutils/patches/2.43/500-Change-default-emulation-for-mips64-linux.patch
@@ -0,0 +1,48 @@
+--- a/bfd/config.bfd
++++ b/bfd/config.bfd
+@@ -962,8 +962,8 @@ case "${targ}" in
+     want64=true
+     ;;
+   mips64*el-*-linux*)
+-    targ_defvec=mips_elf32_ntrad_le_vec
+-    targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
++    targ_defvec=mips_elf64_trad_le_vec
++    targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_be_vec"
+     ;;
+   mips64*-*-linux*-gnuabi64)
+     targ_defvec=mips_elf64_trad_be_vec
+@@ -971,8 +971,8 @@ case "${targ}" in
+     want64=true
+     ;;
+   mips64*-*-linux*)
+-    targ_defvec=mips_elf32_ntrad_be_vec
+-    targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
++    targ_defvec=mips_elf64_trad_be_vec
++    targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+     ;;
+   mips*el-*-linux*)
+     targ_defvec=mips_elf32_trad_le_vec
+--- a/ld/configure.tgt
++++ b/ld/configure.tgt
+@@ -597,8 +597,8 @@ mips64*el-*-linux-gnuabi64)
+ 			targ_extra_emuls="elf64btsmip elf32ltsmipn32 elf32btsmipn32 elf32ltsmip elf32btsmip"
+ 			targ_extra_libpath=$targ_extra_emuls
+ 			;;
+-mips64*el-*-linux-*)	targ_emul=elf32ltsmipn32
+-			targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
++mips64*el-*-linux-*)	targ_emul=elf64ltsmip
++			targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ 			targ_extra_libpath=$targ_extra_emuls
+ 			;;
+ mips64*-*-linux-gnuabi64)
+@@ -606,8 +606,8 @@ mips64*-*-linux-gnuabi64)
+ 			targ_extra_emuls="elf64ltsmip elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip"
+ 			targ_extra_libpath=$targ_extra_emuls
+ 			;;
+-mips64*-*-linux-*)	targ_emul=elf32btsmipn32
+-			targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
++mips64*-*-linux-*)	targ_emul=elf64btsmip
++			targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ 			targ_extra_libpath=$targ_extra_emuls
+ 			;;
+ mips*el-*-linux-*)	targ_emul=elf32ltsmip
diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version
index dc2ff9bff0..49bb36865e 100644
--- a/toolchain/gcc/Config.version
+++ b/toolchain/gcc/Config.version
@@ -15,7 +15,7 @@ config GCC_VERSION
 	default EXTERNAL_GCC_VERSION	if EXTERNAL_TOOLCHAIN && !NATIVE_TOOLCHAIN
 	default "11.3.0"	if GCC_VERSION_11
 	default "12.3.0"	if GCC_VERSION_12
-	default "14.1.0"	if GCC_VERSION_14
+	default "14.2.0"	if GCC_VERSION_14
 	default "13.3.0"
 
 config GCC_USE_DEFAULT_VERSION
diff --git a/toolchain/gcc/common.mk b/toolchain/gcc/common.mk
index 2161ce72e4..0ccf55bd31 100644
--- a/toolchain/gcc/common.mk
+++ b/toolchain/gcc/common.mk
@@ -42,8 +42,8 @@ ifeq ($(PKG_VERSION),13.3.0)
   PKG_HASH:=0845e9621c9543a13f484e94584a49ffc0129970e9914624235fc1d061a0c083
 endif
 
-ifeq ($(PKG_VERSION),14.1.0)
-  PKG_HASH:=e283c654987afe3de9d8080bc0bd79534b5ca0d681a73a11ff2b5d3767426840
+ifeq ($(PKG_VERSION),14.2.0)
+  PKG_HASH:=a7b39bc69cbf9e25826c5a60ab26477001f7c08d85cec04bc0e29cabed6f3cc9
 endif
 
 PATCH_DIR=../patches-$(GCC_MAJOR_VERSION).x
diff --git a/toolchain/gcc/patches-14.x/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches-14.x/300-mips_Os_cpu_rtx_cost_model.patch
index 2d65ba1b1f..2cbffe4517 100644
--- a/toolchain/gcc/patches-14.x/300-mips_Os_cpu_rtx_cost_model.patch
+++ b/toolchain/gcc/patches-14.x/300-mips_Os_cpu_rtx_cost_model.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/gcc/config/mips/mips.cc
 +++ b/gcc/config/mips/mips.cc
-@@ -20444,7 +20444,7 @@ mips_option_override (void)
+@@ -20453,7 +20453,7 @@ mips_option_override (void)
      flag_pcc_struct_return = 0;
  
    /* Decide which rtx_costs structure to use.  */
diff --git a/tools/7z/Makefile b/tools/7z/Makefile
index 2d75d9059e..962fd5729c 100644
--- a/tools/7z/Makefile
+++ b/tools/7z/Makefile
@@ -1,33 +1,27 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=7z
-PKG_VERSION:=23.01
-PKG_SOURCE_VERSION:=2301
+PKG_VERSION:=24.05
 
-PKG_SOURCE:=$(PKG_NAME)$(PKG_SOURCE_VERSION)-src.tar.xz
+PKG_SOURCE:=$(PKG_NAME)$(subst .,,$(PKG_VERSION))-src.tar.xz
 PKG_SOURCE_URL:=https://7-zip.org/a/
-PKG_HASH:=356071007360e5a1824d9904993e8b2480b51b570e8c9faf7c0f58ebe4bf9f74
-PKG_CPE_ID:=cpe:/a:7-zip:7zip
+PKG_HASH:=63f341cf80b8d287c6e945519b3da0fa75553c85572a471b7fa6e68f9a90b790
+
+PKG_CPE_ID:=cpe:/a:7-zip:7-zip
 
 # This builds the 7zr variant which supports only 7z, so no non-LGPL code should be included
 PKG_LICENSE:=LGPL-2.1-or-later
 PKG_LICENSE_FILES:=DOC/License.txt DOC/copying.txt
 
-HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)
+HOST_MAKE_PATH:=CPP/7zip/Bundles/Alone7z
 
 include $(INCLUDE_DIR)/host-build.mk
 
-TAR_CMD=$(HOST_TAR) -C $(1) $(TAR_OPTIONS)
-
-ALONE_DIR=$(HOST_BUILD_DIR)/CPP/7zip/Bundles/Alone7z
-
-define Host/Compile
-	$(MAKE) -C $(ALONE_DIR) -f makefile.gcc
-endef
+TAR_OPTIONS := -C $(HOST_BUILD_DIR) $(TAR_OPTIONS)
+HOST_MAKE_FLAGS += -f makefile.gcc
 
 define Host/Install
-	$(INSTALL_DIR) $(STAGING_DIR_HOST)/bin
-	$(INSTALL_BIN) $(ALONE_DIR)/_o/7zr $(STAGING_DIR_HOST)/bin/7zr
+	$(INSTALL_BIN) $(HOST_BUILD_DIR)/$(HOST_MAKE_PATH)/_o/7zr $(STAGING_DIR_HOST)/bin/
 endef
 
 define Host/Clean
diff --git a/tools/7z/patches/7-zip-flags.patch b/tools/7z/patches/7-zip-flags.patch
index b9b2152f22..5c684b0689 100644
--- a/tools/7z/patches/7-zip-flags.patch
+++ b/tools/7z/patches/7-zip-flags.patch
@@ -9,12 +9,12 @@
  endif

  

  # for object file

-@@ -32,7 +32,7 @@ endif
- # -save-temps

- CFLAGS_BASE_LIST = -c

+@@ -50,7 +50,7 @@ endif
+ endif

+ 

  # CFLAGS_BASE_LIST = -S

 -CFLAGS_BASE = -O2 $(CFLAGS_BASE_LIST) $(CFLAGS_WARN_WALL) $(CFLAGS_WARN) \

 +CFLAGS_BASE = $(CFLAGS_BASE_LIST) $(CFLAGS_WARN_WALL) $(CFLAGS_WARN) -D_GNU_SOURCE \

-  -DNDEBUG -D_REENTRANT -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE \

+  $(CFLAGS_DEBUG) -D_REENTRANT -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE \

   -fPIC

  

diff --git a/tools/7z/patches/7-zip-musl.patch b/tools/7z/patches/7-zip-musl.patch
index e066cc8ec9..a08520a25f 100644
--- a/tools/7z/patches/7-zip-musl.patch
+++ b/tools/7z/patches/7-zip-musl.patch
@@ -1,14 +1,3 @@
---- a/C/CpuArch.c
-+++ b/C/CpuArch.c
-@@ -766,8 +766,6 @@ BoolInt CPU_IsSupported_AES (void) { ret
- 

- #ifdef USE_HWCAP

- 

--#include <asm/hwcap.h>

--

-   #define MY_HWCAP_CHECK_FUNC_2(name1, name2) \

-   BoolInt CPU_IsSupported_ ## name1() { return (getauxval(AT_HWCAP)  & (HWCAP_  ## name2)) ? 1 : 0; }

- 

 --- a/C/Threads.c
 +++ b/C/Threads.c
 @@ -265,7 +265,7 @@ WRes Thread_Create_With_CpuSet(CThread *
@@ -18,7 +7,7 @@
 -      pthread_attr_setaffinity_np(&attr, sizeof(*cpuSet), cpuSet);

 +      //pthread_attr_setaffinity_np(&attr, sizeof(*cpuSet), cpuSet);

        // if (ret2) ret = ret2;

-       #endif

+ #endif

      }

 @@ -275,14 +275,12 @@ WRes Thread_Create_With_CpuSet(CThread *
      if (!ret)

@@ -37,7 +26,7 @@
    // ret2 =

 --- a/C/Threads.h
 +++ b/C/Threads.h
-@@ -20,6 +20,7 @@
+@@ -29,6 +29,7 @@ Z7_DIAGNOSTIC_IGNORE_END_RESERVED_MACRO_
  #endif

  

  #include <pthread.h>

@@ -45,15 +34,3 @@
  

  #endif

  

---- a/CPP/Windows/SystemInfo.cpp
-+++ b/CPP/Windows/SystemInfo.cpp
-@@ -36,9 +36,6 @@
- #endif

- */

- 

--#ifdef MY_CPU_ARM_OR_ARM64

--#include <asm/hwcap.h>

--#endif

- #endif

- 

- #ifdef __linux__

diff --git a/tools/cmake/Makefile b/tools/cmake/Makefile
index 89194ac5d7..c612e7e405 100644
--- a/tools/cmake/Makefile
+++ b/tools/cmake/Makefile
@@ -7,7 +7,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=cmake
-PKG_VERSION:=3.29.5
+PKG_VERSION:=3.30.2
 PKG_VERSION_MAJOR:=$(word 1,$(subst ., ,$(PKG_VERSION))).$(word 2,$(subst ., ,$(PKG_VERSION)))
 PKG_RELEASE:=1
 PKG_CPE_ID:=cpe:/a:kitware:cmake
@@ -15,7 +15,7 @@ PKG_CPE_ID:=cpe:/a:kitware:cmake
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/Kitware/CMake/releases/download/v$(PKG_VERSION)/ \
 		https://cmake.org/files/v$(PKG_VERSION_MAJOR)/
-PKG_HASH:=dd63da7d763c0db455ca232f2c443f5234fe0b11f8bd6958a81d29cc987dfd6e
+PKG_HASH:=46074c781eccebc433e98f0bbfa265ca3fd4381f245ca3b140e7711531d60db2
 
 HOST_BUILD_PARALLEL:=1
 HOST_CONFIGURE_PARALLEL:=1
diff --git a/tools/cmake/patches/110-liblzma.patch b/tools/cmake/patches/110-liblzma.patch
index d7cbd434a1..4b8ec0d33f 100644
--- a/tools/cmake/patches/110-liblzma.patch
+++ b/tools/cmake/patches/110-liblzma.patch
@@ -1,8 +1,8 @@
 --- a/Modules/FindLibLZMA.cmake
 +++ b/Modules/FindLibLZMA.cmake
-@@ -58,7 +58,13 @@ The following variables are provided for
- 
- #]=======================================================================]
+@@ -61,7 +61,13 @@ The following variables are provided for
+ cmake_policy(PUSH)
+ cmake_policy(SET CMP0159 NEW) # file(STRINGS) with REGEX updates CMAKE_MATCH_<n>
  
 -find_path(LIBLZMA_INCLUDE_DIR lzma.h )
 +if(UNIX)
diff --git a/tools/cmake/patches/120-curl-fix-libressl-linking.patch b/tools/cmake/patches/120-curl-fix-libressl-linking.patch
index a46acd63da..19217343d1 100644
--- a/tools/cmake/patches/120-curl-fix-libressl-linking.patch
+++ b/tools/cmake/patches/120-curl-fix-libressl-linking.patch
@@ -20,7 +20,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
 ---
 --- a/Utilities/cmcurl/CMakeLists.txt
 +++ b/Utilities/cmcurl/CMakeLists.txt
-@@ -647,6 +647,14 @@ if(CURL_USE_OPENSSL)
+@@ -648,6 +648,14 @@ if(CURL_USE_OPENSSL)
    endif()
    set(SSL_ENABLED ON)
    set(USE_OPENSSL ON)
diff --git a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch
index ffe47f9901..a2a873fcea 100644
--- a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch
+++ b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch
@@ -1,6 +1,6 @@
 --- a/bootstrap
 +++ b/bootstrap
-@@ -1493,7 +1493,10 @@ int main(){ printf("1%c", (char)0x0a); r
+@@ -1509,7 +1509,10 @@ int main(){ printf("1%c", (char)0x0a); r
  ' > "test.c"
  cmake_original_make_flags="${cmake_make_flags}"
  if test "x${cmake_parallel_make}" != "x"; then
diff --git a/tools/cmake/patches/140-zlib.patch b/tools/cmake/patches/140-zlib.patch
index 8b7b7de1b0..17334a66e0 100644
--- a/tools/cmake/patches/140-zlib.patch
+++ b/tools/cmake/patches/140-zlib.patch
@@ -1,6 +1,6 @@
 --- a/Modules/FindZLIB.cmake
 +++ b/Modules/FindZLIB.cmake
-@@ -117,10 +117,13 @@ else()
+@@ -120,10 +120,13 @@ else()
    set(ZLIB_NAMES_DEBUG zd zlibd zdlld zlibd1 zlib1d zlibstaticd zlibwapid zlibvcd zlibstatd)
  endif()
  
diff --git a/tools/cmake/patches/160-disable_xcode_generator.patch b/tools/cmake/patches/160-disable_xcode_generator.patch
index 20d1086bd4..0e29dedd9b 100644
--- a/tools/cmake/patches/160-disable_xcode_generator.patch
+++ b/tools/cmake/patches/160-disable_xcode_generator.patch
@@ -1,6 +1,6 @@
 --- a/Source/CMakeLists.txt
 +++ b/Source/CMakeLists.txt
-@@ -846,7 +846,7 @@ if(CMake_USE_XCOFF_PARSER)
+@@ -858,7 +858,7 @@ if(CMake_USE_XCOFF_PARSER)
  endif()
  
  # Xcode only works on Apple
@@ -11,7 +11,7 @@
      PRIVATE
 --- a/Source/cmake.cxx
 +++ b/Source/cmake.cxx
-@@ -132,7 +132,7 @@
+@@ -134,7 +134,7 @@
  #  include "cmGlobalGhsMultiGenerator.h"
  #endif
  
diff --git a/tools/elfutils/Makefile b/tools/elfutils/Makefile
index 11a2ff7261..2836cadc87 100644
--- a/tools/elfutils/Makefile
+++ b/tools/elfutils/Makefile
@@ -15,12 +15,10 @@ PKG_LICENSE_FILES:=COPYING COPYING-GPLV2 COPYING-LGPLV3
 PKG_CPE_ID:=cpe:/a:elfutils_project:elfutils
 
 PKG_FIXUP:=autoreconf
-PKG_INSTALL:=1
 
 PKG_PROGRAMS:=elflint findtextrel elfcmp unstrip stack elfcompress elfclassify srcfiles
 
 PKG_SUBDIRS := \
-	libgnu \
 	config \
 	lib \
 	libelf \
@@ -36,8 +34,6 @@ PKG_GNULIB_BASE:=libgnu
 
 PKG_GNULIB_ARGS = \
 	--dir=$(HOST_BUILD_DIR) \
-	--local-dir=$(STAGING_DIR_HOST)/share/gnulib \
-	--source-base=$(PKG_GNULIB_BASE) \
 	--libtool \
 	--avoid=reallocarray \
 	--import
@@ -67,12 +63,13 @@ HOST_MAKE_FLAGS += \
 	REPLACE_FCNTL=0 REPLACE_FREE=0 REPLACE_FSTAT=0 REPLACE_OPEN=0 \
 	bin_PROGRAMS='$(PKG_PROGRAMS)' EXEEXT=
 
+HOST_CPPFLAGS += "'-I$$$$(top_srcdir)/lib'"
+
 ifeq ($(HOST_OS),Darwin)
   HOST_CFLAGS += -I/opt/homebrew/include
 endif
 
 HOST_CFLAGS += -Wno-error -fPIC
-HOST_CXXFLAGS += -O2
 
 HOST_CONFIGURE_ARGS += \
 	--without-libintl-prefix \
@@ -96,19 +93,8 @@ HOST_CONFIGURE_VARS += \
 	ac_cv_search__obstack_free=yes \
 	ac_cv_buildid=yes
 
-Hooks/HostConfigure/Pre := Host/Gnulib $(Hooks/HostConfigure/Pre)
-define Host/Gnulib
-	$(STAGING_DIR_HOST)/bin/gnulib-tool $(PKG_GNULIB_ARGS) $(PKG_GNULIB_MODS);
-	ln -sf ../lib/eu-config.h $(HOST_BUILD_DIR)/libgnu/;
-endef
-
-define Host/Compile
-	$(call Host/Compile/Default,SUBDIRS='$$$$(wildcard $(PKG_SUBDIRS))')
-endef
-
-define Host/Install
-	$(call Host/Compile/Default,install SUBDIRS='$$$$(wildcard $(PKG_SUBDIRS))')
-endef
+Hooks/HostConfigure/Pre := Host/Gnulib/Prepare $(Hooks/HostConfigure/Pre)
+Hooks/HostCompile/Pre := Host/Gnulib/Compile $(Hooks/HostCompile/Pre)
 
 define Host/Uninstall
 	-$(call Host/Compile/Default,uninstall)
diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile
index f5fdc76e0f..1fedee32a7 100644
--- a/tools/firmware-utils/Makefile
+++ b/tools/firmware-utils/Makefile
@@ -11,9 +11,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git
-PKG_SOURCE_DATE:=2024-06-20
-PKG_SOURCE_VERSION:=6ac44974185a3e7dc7848e97b964339948e817a7
-PKG_MIRROR_HASH:=ee5b29f45593750a6806cfa7cad3fd766b321b44107a6b481b890efe82a7dbf5
+PKG_SOURCE_DATE:=2024-08-09
+PKG_SOURCE_VERSION:=26c7f054b5fe8408d64ca7b06372b303cf888245
+PKG_MIRROR_HASH:=7fad7164ae09cc6f250f71f97c5d5f144d0edebe1c46f116ee5cfc7099d3903e
 
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/cmake.mk
diff --git a/tools/mold/Makefile b/tools/mold/Makefile
index 7a7e2321b1..28d760d8c3 100644
--- a/tools/mold/Makefile
+++ b/tools/mold/Makefile
@@ -3,12 +3,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=mold
-PKG_VERSION:=2.31.0
+PKG_VERSION:=2.33.0
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL_FILE:=v$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/rui314/mold/archive/refs/tags
-PKG_HASH:=3dc3af83a5d22a4b29971bfad17261851d426961c665480e2ca294e5c74aa1e5
+PKG_HASH:=37b3aacbd9b6accf581b92ba1a98ca418672ae330b78fe56ae542c2dcb10a155
 
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/cmake.mk
diff --git a/tools/util-linux/Makefile b/tools/util-linux/Makefile
index b4cc45efc8..f9aadba2c2 100644
--- a/tools/util-linux/Makefile
+++ b/tools/util-linux/Makefile
@@ -7,11 +7,11 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=util-linux
-PKG_VERSION:=2.40.1
+PKG_VERSION:=2.40.2
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.40
-PKG_HASH:=8e396eececae2b3b68db232c33b8810faa7c31f6df19f98f512739293d5829b7
+PKG_HASH:=d78b37a66f5922d70edf3bdfb01a6b33d34ed3c3cafd6628203b2a2b67c8e8b3
 PKG_CPE_ID:=cpe:/a:kernel:util-linux
 
 PKG_FIXUP:=autoreconf
@@ -23,6 +23,7 @@ include $(INCLUDE_DIR)/host-build.mk
 HOST_CONFIGURE_ARGS += \
 	--with-pic \
 	--disable-shared \
+	--disable-nls \
 	--disable-all-programs \
 	--enable-hexdump \
 	--enable-libuuid \
diff --git a/tools/util-linux/patches/0001-hexdump-allow-enabling-with-disable-all-programs.patch b/tools/util-linux/patches/0001-hexdump-allow-enabling-with-disable-all-programs.patch
index c0c1f04d06..a8f1b5eb24 100644
--- a/tools/util-linux/patches/0001-hexdump-allow-enabling-with-disable-all-programs.patch
+++ b/tools/util-linux/patches/0001-hexdump-allow-enabling-with-disable-all-programs.patch
@@ -13,7 +13,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/configure.ac
 +++ b/configure.ac
-@@ -2237,7 +2237,11 @@ UL_BUILD_INIT([column], [check])
+@@ -2240,7 +2240,11 @@ UL_BUILD_INIT([column], [check])
  UL_REQUIRES_BUILD([column], [libsmartcols])
  AM_CONDITIONAL([BUILD_COLUMN], [test "x$build_column" = xyes])