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authorStefan Reinauer <stepan@coresystems.de>2010-02-08 12:20:50 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-08 12:20:50 +0000
commit38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0 (patch)
treeecb680abac7c73798a4abf5f5733c6ad3e179bb4
parentd51eddbb6611965165ad72eb3fb04377a51ab64a (diff)
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janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/arch/i386/lib/console_print.c2
-rw-r--r--src/cpu/amd/dualcore/amd_sibling.c4
-rw-r--r--src/cpu/amd/model_10xxx/init_cpus.c2
-rw-r--r--src/cpu/amd/sc520/raminit.c2
-rw-r--r--src/mainboard/Makefile.k8_CAR.inc6
-rw-r--r--src/mainboard/Makefile.k8_ck804.inc6
-rw-r--r--src/mainboard/Makefile.romccboard.inc10
-rw-r--r--src/mainboard/a-trend/atc-6220/romstage.c (renamed from src/mainboard/a-trend/atc-6220/auto.c)0
-rw-r--r--src/mainboard/a-trend/atc-6240/romstage.c (renamed from src/mainboard/a-trend/atc-6240/auto.c)0
-rw-r--r--src/mainboard/abit/be6-ii_v2_0/romstage.c (renamed from src/mainboard/abit/be6-ii_v2_0/auto.c)0
-rw-r--r--src/mainboard/advantech/pcm-5820/romstage.c (renamed from src/mainboard/advantech/pcm-5820/auto.c)0
-rw-r--r--src/mainboard/amd/db800/Makefile.inc6
-rw-r--r--src/mainboard/amd/db800/romstage.c (renamed from src/mainboard/amd/db800/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/amd/dbm690t/Makefile.inc6
-rw-r--r--src/mainboard/amd/dbm690t/romstage.c (renamed from src/mainboard/amd/dbm690t/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/amd/norwich/Makefile.inc6
-rw-r--r--src/mainboard/amd/norwich/romstage.c (renamed from src/mainboard/amd/norwich/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/amd/pistachio/Makefile.inc6
-rw-r--r--src/mainboard/amd/pistachio/romstage.c (renamed from src/mainboard/amd/pistachio/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/amd/rumba/romstage.c (renamed from src/mainboard/amd/rumba/auto.c)0
-rw-r--r--src/mainboard/amd/serengeti_cheetah/Makefile.inc6
-rw-r--r--src/mainboard/amd/serengeti_cheetah/romstage.c (renamed from src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc6
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c (renamed from src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h2
-rw-r--r--src/mainboard/arima/hdama/romstage.c (renamed from src/mainboard/arima/hdama/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/artecgroup/dbe61/Makefile.inc6
-rw-r--r--src/mainboard/artecgroup/dbe61/romstage.c (renamed from src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/asi/mb_5blgp/romstage.c (renamed from src/mainboard/asi/mb_5blgp/auto.c)0
-rw-r--r--src/mainboard/asi/mb_5blmp/romstage.c (renamed from src/mainboard/asi/mb_5blmp/auto.c)0
-rw-r--r--src/mainboard/asus/a8n_e/Makefile.inc6
-rw-r--r--src/mainboard/asus/a8n_e/romstage.c (renamed from src/mainboard/asus/a8n_e/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/asus/a8v-e_se/Makefile.inc6
-rw-r--r--src/mainboard/asus/a8v-e_se/romstage.c (renamed from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/asus/m2v-mx_se/Makefile.inc6
-rw-r--r--src/mainboard/asus/m2v-mx_se/romstage.c (renamed from src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/asus/mew-am/romstage.c (renamed from src/mainboard/asus/mew-am/auto.c)0
-rw-r--r--src/mainboard/asus/mew-vm/romstage.c (renamed from src/mainboard/asus/mew-vm/auto.c)0
-rw-r--r--src/mainboard/asus/p2b-d/romstage.c (renamed from src/mainboard/asus/p2b-d/auto.c)0
-rw-r--r--src/mainboard/asus/p2b-ds/romstage.c (renamed from src/mainboard/asus/p2b-ds/auto.c)0
-rw-r--r--src/mainboard/asus/p2b-f/romstage.c (renamed from src/mainboard/asus/p2b-f/auto.c)0
-rw-r--r--src/mainboard/asus/p2b/romstage.c (renamed from src/mainboard/asus/p2b/auto.c)0
-rw-r--r--src/mainboard/asus/p3b-f/romstage.c (renamed from src/mainboard/asus/p3b-f/auto.c)0
-rw-r--r--src/mainboard/axus/tc320/romstage.c (renamed from src/mainboard/axus/tc320/auto.c)0
-rw-r--r--src/mainboard/azza/pt-6ibd/romstage.c (renamed from src/mainboard/azza/pt-6ibd/auto.c)0
-rw-r--r--src/mainboard/bcom/winnet100/romstage.c (renamed from src/mainboard/bcom/winnet100/auto.c)0
-rw-r--r--src/mainboard/bcom/winnetp680/Makefile.inc6
-rw-r--r--src/mainboard/bcom/winnetp680/romstage.c (renamed from src/mainboard/bcom/winnetp680/auto.c)4
-rw-r--r--src/mainboard/biostar/m6tba/romstage.c (renamed from src/mainboard/biostar/m6tba/auto.c)0
-rw-r--r--src/mainboard/broadcom/blast/romstage.c (renamed from src/mainboard/broadcom/blast/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/compaq/deskpro_en_sff_p600/romstage.c (renamed from src/mainboard/compaq/deskpro_en_sff_p600/auto.c)0
-rw-r--r--src/mainboard/dell/s1850/romstage.c (renamed from src/mainboard/dell/s1850/auto.c)0
-rw-r--r--src/mainboard/digitallogic/adl855pc/romstage.c (renamed from src/mainboard/digitallogic/adl855pc/auto.c)0
-rw-r--r--src/mainboard/digitallogic/msm586seg/romstage.c (renamed from src/mainboard/digitallogic/msm586seg/auto.c)0
-rw-r--r--src/mainboard/digitallogic/msm800sev/Makefile.inc6
-rw-r--r--src/mainboard/digitallogic/msm800sev/auto.c138
-rw-r--r--src/mainboard/digitallogic/msm800sev/romstage.c (renamed from src/mainboard/digitallogic/msm800sev/cache_as_ram_auto.c)2
-rw-r--r--src/mainboard/eaglelion/5bcm/romstage.c (renamed from src/mainboard/eaglelion/5bcm/auto.c)0
-rw-r--r--src/mainboard/emulation/qemu-x86/romstage.c (renamed from src/mainboard/emulation/qemu-x86/auto.c)0
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/romstage.c (renamed from src/mainboard/gigabyte/ga-6bxc/auto.c)0
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc12
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/romstage.c (renamed from src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/gigabyte/m57sli/Makefile.inc12
-rw-r--r--src/mainboard/gigabyte/m57sli/romstage.c (renamed from src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c (renamed from src/mainboard/hp/dl145_g3/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/hp/e_vectra_p2706t/romstage.c (renamed from src/mainboard/hp/e_vectra_p2706t/auto.c)0
-rw-r--r--src/mainboard/ibm/e325/romstage.c (renamed from src/mainboard/ibm/e325/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/ibm/e326/romstage.c (renamed from src/mainboard/ibm/e326/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/iei/juki-511p/romstage.c (renamed from src/mainboard/iei/juki-511p/auto.c)0
-rw-r--r--src/mainboard/iei/nova4899r/romstage.c (renamed from src/mainboard/iei/nova4899r/auto.c)0
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc6
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/romstage.c (renamed from src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/intel/d945gclf/Makefile.inc6
-rw-r--r--src/mainboard/intel/d945gclf/romstage.c (renamed from src/mainboard/intel/d945gclf/auto.c)0
-rw-r--r--src/mainboard/intel/eagleheights/Makefile.inc6
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c (renamed from src/mainboard/intel/eagleheights/auto.c)0
-rw-r--r--src/mainboard/intel/jarrell/romstage.c (renamed from src/mainboard/intel/jarrell/auto.c)0
-rw-r--r--src/mainboard/intel/mtarvon/romstage.c (renamed from src/mainboard/intel/mtarvon/auto.c)0
-rw-r--r--src/mainboard/intel/truxton/romstage.c (renamed from src/mainboard/intel/truxton/auto.c)0
-rw-r--r--src/mainboard/intel/xe7501devkit/romstage.c (renamed from src/mainboard/intel/xe7501devkit/auto.c)0
-rw-r--r--src/mainboard/iwill/dk8_htx/Makefile.inc6
-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c (renamed from src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c (renamed from src/mainboard/iwill/dk8s2/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/iwill/dk8x/romstage.c (renamed from src/mainboard/iwill/dk8x/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/jetway/j7f24/Makefile.inc6
-rw-r--r--src/mainboard/jetway/j7f24/romstage.c (renamed from src/mainboard/jetway/j7f24/auto.c)4
-rw-r--r--src/mainboard/kontron/986lcd-m/Makefile.inc6
-rw-r--r--src/mainboard/kontron/986lcd-m/romstage.c (renamed from src/mainboard/kontron/986lcd-m/auto.c)2
-rw-r--r--src/mainboard/kontron/kt690/Makefile.inc6
-rw-r--r--src/mainboard/kontron/kt690/romstage.c (renamed from src/mainboard/kontron/kt690/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/lippert/frontrunner/romstage.c (renamed from src/mainboard/lippert/frontrunner/auto.c)0
-rw-r--r--src/mainboard/lippert/roadrunner-lx/Makefile.inc6
-rw-r--r--src/mainboard/lippert/roadrunner-lx/romstage.c (renamed from src/mainboard/lippert/roadrunner-lx/cache_as_ram_auto.c)2
-rw-r--r--src/mainboard/lippert/spacerunner-lx/Makefile.inc6
-rw-r--r--src/mainboard/lippert/spacerunner-lx/romstage.c (renamed from src/mainboard/lippert/spacerunner-lx/cache_as_ram_auto.c)2
-rw-r--r--src/mainboard/mitac/6513wu/romstage.c (renamed from src/mainboard/mitac/6513wu/auto.c)0
-rw-r--r--src/mainboard/msi/ms6119/romstage.c (renamed from src/mainboard/msi/ms6119/auto.c)0
-rw-r--r--src/mainboard/msi/ms6147/romstage.c (renamed from src/mainboard/msi/ms6147/auto.c)0
-rw-r--r--src/mainboard/msi/ms6156/romstage.c (renamed from src/mainboard/msi/ms6156/auto.c)0
-rw-r--r--src/mainboard/msi/ms6178/romstage.c (renamed from src/mainboard/msi/ms6178/auto.c)0
-rw-r--r--src/mainboard/msi/ms7135/romstage.c (renamed from src/mainboard/msi/ms7135/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/msi/ms7260/Makefile.inc12
-rw-r--r--src/mainboard/msi/ms7260/romstage.c (renamed from src/mainboard/msi/ms7260/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/msi/ms9185/romstage.c (renamed from src/mainboard/msi/ms9185/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/msi/ms9282/Makefile.inc12
-rw-r--r--src/mainboard/msi/ms9282/romstage.c (renamed from src/mainboard/msi/ms9282/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/nec/powermate2000/romstage.c (renamed from src/mainboard/nec/powermate2000/auto.c)0
-rw-r--r--src/mainboard/newisys/khepri/romstage.c (renamed from src/mainboard/newisys/khepri/cache_as_ram_auto.c)2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/Makefile.inc12
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c (renamed from src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/olpc/btest/romstage.c (renamed from src/mainboard/olpc/btest/auto.c)0
-rw-r--r--src/mainboard/olpc/rev_a/romstage.c (renamed from src/mainboard/olpc/rev_a/auto.c)0
-rw-r--r--src/mainboard/pcengines/alix1c/Makefile.inc6
-rw-r--r--src/mainboard/pcengines/alix1c/romstage.c (renamed from src/mainboard/pcengines/alix1c/cache_as_ram_auto.c)2
-rw-r--r--src/mainboard/rca/rm4100/romstage.c (renamed from src/mainboard/rca/rm4100/auto.c)0
-rw-r--r--src/mainboard/roda/rk886ex/Makefile.inc6
-rw-r--r--src/mainboard/roda/rk886ex/romstage.c (renamed from src/mainboard/roda/rk886ex/auto.c)0
-rw-r--r--src/mainboard/soyo/sy-6ba-plus-iii/romstage.c (renamed from src/mainboard/soyo/sy-6ba-plus-iii/auto.c)0
-rw-r--r--src/mainboard/sunw/ultra40/romstage.c (renamed from src/mainboard/sunw/ultra40/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/supermicro/h8dme/Makefile.inc6
-rw-r--r--src/mainboard/supermicro/h8dme/romstage.c (renamed from src/mainboard/supermicro/h8dme/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/supermicro/h8dmr/Makefile.inc6
-rw-r--r--src/mainboard/supermicro/h8dmr/romstage.c (renamed from src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/Makefile.inc6
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c (renamed from src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/spd_addr.h2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/Makefile.inc6
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c (renamed from src/mainboard/supermicro/h8qme_fam10/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/spd_addr.h2
-rw-r--r--src/mainboard/supermicro/x6dai_g/romstage.c (renamed from src/mainboard/supermicro/x6dai_g/auto.c)0
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-rw-r--r--src/mainboard/supermicro/x6dhe_g2/romstage.c (renamed from src/mainboard/supermicro/x6dhe_g2/auto.c)0
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/romstage.c (renamed from src/mainboard/supermicro/x6dhr_ig/auto.c)0
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/romstage.c (renamed from src/mainboard/supermicro/x6dhr_ig2/auto.c)0
-rw-r--r--src/mainboard/technexion/tim5690/Makefile.inc6
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-rw-r--r--src/mainboard/technexion/tim8690/romstage.c (renamed from src/mainboard/technexion/tim8690/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/technologic/ts5300/romstage.c (renamed from src/mainboard/technologic/ts5300/auto.c)0
-rw-r--r--src/mainboard/televideo/tc7020/romstage.c (renamed from src/mainboard/televideo/tc7020/auto.c)0
-rw-r--r--src/mainboard/thomson/ip1000/romstage.c (renamed from src/mainboard/thomson/ip1000/auto.c)0
-rw-r--r--src/mainboard/tyan/s1846/romstage.c (renamed from src/mainboard/tyan/s1846/auto.c)0
-rw-r--r--src/mainboard/tyan/s2735/Makefile.inc6
-rw-r--r--src/mainboard/tyan/s2735/reset.c2
-rw-r--r--src/mainboard/tyan/s2735/romstage.c (renamed from src/mainboard/tyan/s2735/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2850/romstage.c (renamed from src/mainboard/tyan/s2850/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2875/romstage.c (renamed from src/mainboard/tyan/s2875/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2880/romstage.c (renamed from src/mainboard/tyan/s2880/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2881/romstage.c (renamed from src/mainboard/tyan/s2881/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2882/romstage.c (renamed from src/mainboard/tyan/s2882/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2885/romstage.c (renamed from src/mainboard/tyan/s2885/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2891/romstage.c (renamed from src/mainboard/tyan/s2891/cache_as_ram_auto.c)0
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-rw-r--r--src/mainboard/tyan/s2912/romstage.c (renamed from src/mainboard/tyan/s2912/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s2912_fam10/Makefile.inc12
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-rw-r--r--src/mainboard/tyan/s4880/romstage.c (renamed from src/mainboard/tyan/s4880/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/tyan/s4882/romstage.c (renamed from src/mainboard/tyan/s4882/cache_as_ram_auto.c)0
-rw-r--r--src/mainboard/via/epia-cn/romstage.c (renamed from src/mainboard/via/epia-cn/auto.c)4
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-rw-r--r--src/mainboard/via/epia-m700/Makefile.inc6
-rw-r--r--src/mainboard/via/epia-m700/romstage.c (renamed from src/mainboard/via/epia-m700/cache_as_ram_auto.c)2
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-rw-r--r--src/mainboard/via/epia-n/romstage.c (renamed from src/mainboard/via/epia-n/auto.c)4
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-rw-r--r--src/mainboard/via/epia/romstage.c (renamed from src/mainboard/via/epia/auto.c)0
-rw-r--r--src/mainboard/via/pc2500e/romstage.c (renamed from src/mainboard/via/pc2500e/auto.c)0
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-rw-r--r--src/northbridge/intel/i945/raminit.c2
-rw-r--r--src/northbridge/via/cx700/cx700_early_smbus.c2
-rw-r--r--src/northbridge/via/vx800/examples/romstage.c (renamed from src/northbridge/via/vx800/examples/cache_as_ram_auto.c)4
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h2
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_azalia.c4
-rw-r--r--src/southbridge/via/vt8231/vt8231_ide.c2
184 files changed, 198 insertions, 336 deletions
diff --git a/src/arch/i386/lib/console_print.c b/src/arch/i386/lib/console_print.c
index 661dc41dcbce..0aa540d15367 100644
--- a/src/arch/i386/lib/console_print.c
+++ b/src/arch/i386/lib/console_print.c
@@ -63,7 +63,7 @@ static void __console_tx_string(int loglevel, const char *str)
}
/* Actually this should say defined(__ROMCC__) but that define is explicitly
- * set in some auto.c files to trigger the simple device_t version to be used.
+ * set in some romstage.c files to trigger the simple device_t version to be used.
* So __GNUCC__ does the right thing here.
*/
#if defined (__ROMCC__)
diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c
index deaa78cef005..9001ec76a77a 100644
--- a/src/cpu/amd/dualcore/amd_sibling.c
+++ b/src/cpu/amd/dualcore/amd_sibling.c
@@ -78,7 +78,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
nb_cfg_54 = read_nb_cfg_54();
#if 0
- //it is for all e0 single core and nc_cfg_54 low is set, but in the auto.c stage we do not set that bit for it.
+ //it is for all e0 single core and nc_cfg_54 low is set, but in the romstage.c stage we do not set that bit for it.
if(nb_cfg_54 && (!disable_siblings) && (siblings == 0)) {
//we need to check if e0 single core is there
int i;
@@ -109,7 +109,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
if((apicid_base+ioapic_num-1)>0xf) {
// We need to enable APIC EXT ID
- printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n");
+ printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n");
enable_apic_ext_id(nodes);
}
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index defbce2571f2..822e362a742d 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -463,7 +463,7 @@ static void wait_all_core0_started(void)
* start the core0 in node, so it can generate HT packet to feature code.
*
* This function starts the AP nodes core0s. wait_all_core0_started() in
- * cache_as_ram_auto.c waits for all the AP to be finished before continuing
+ * romstage.c waits for all the AP to be finished before continuing
* system init.
*/
static void start_node(u8 node)
diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c
index d20280761d99..f52e8fe622e2 100644
--- a/src/cpu/amd/sc520/raminit.c
+++ b/src/cpu/amd/sc520/raminit.c
@@ -89,7 +89,7 @@ void setupsc520(void)
/* as per the book: */
/* PAR register setup */
/* set up the PAR registers as they are on the MSM586SEG */
- /* moved to auto.c by Stepan, Ron says: */
+ /* moved to romstage.c by Stepan, Ron says: */
/* NOTE: move this to mainboard.c ASAP */
setup_pars();
diff --git a/src/mainboard/Makefile.k8_CAR.inc b/src/mainboard/Makefile.k8_CAR.inc
index 35405f6f250d..3152504e43d8 100644
--- a/src/mainboard/Makefile.k8_CAR.inc
+++ b/src/mainboard/Makefile.k8_CAR.inc
@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/Makefile.k8_ck804.inc b/src/mainboard/Makefile.k8_ck804.inc
index 5c146b0ca0f6..9472cf262b3d 100644
--- a/src/mainboard/Makefile.k8_ck804.inc
+++ b/src/mainboard/Makefile.k8_ck804.inc
@@ -42,7 +42,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -60,8 +60,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/Makefile.romccboard.inc b/src/mainboard/Makefile.romccboard.inc
index c1462ae22eed..3d3bc24a6d31 100644
--- a/src/mainboard/Makefile.romccboard.inc
+++ b/src/mainboard/Makefile.romccboard.inc
@@ -42,7 +42,7 @@ endif
ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc
endif
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ifeq ($(CONFIG_SSE),y)
crt0s += $(src)/cpu/x86/sse_disable.inc
endif
@@ -75,11 +75,11 @@ $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib
$(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h $(obj)/build.h
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h $(obj)/build.h
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
else
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/build.h
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
endif
endif
diff --git a/src/mainboard/a-trend/atc-6220/auto.c b/src/mainboard/a-trend/atc-6220/romstage.c
index 5fe11bc1973c..5fe11bc1973c 100644
--- a/src/mainboard/a-trend/atc-6220/auto.c
+++ b/src/mainboard/a-trend/atc-6220/romstage.c
diff --git a/src/mainboard/a-trend/atc-6240/auto.c b/src/mainboard/a-trend/atc-6240/romstage.c
index 752f1a19d034..752f1a19d034 100644
--- a/src/mainboard/a-trend/atc-6240/auto.c
+++ b/src/mainboard/a-trend/atc-6240/romstage.c
diff --git a/src/mainboard/abit/be6-ii_v2_0/auto.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c
index bdd0ffee2fd7..bdd0ffee2fd7 100644
--- a/src/mainboard/abit/be6-ii_v2_0/auto.c
+++ b/src/mainboard/abit/be6-ii_v2_0/romstage.c
diff --git a/src/mainboard/advantech/pcm-5820/auto.c b/src/mainboard/advantech/pcm-5820/romstage.c
index 6c9abe2903ef..6c9abe2903ef 100644
--- a/src/mainboard/advantech/pcm-5820/auto.c
+++ b/src/mainboard/advantech/pcm-5820/romstage.c
diff --git a/src/mainboard/amd/db800/Makefile.inc b/src/mainboard/amd/db800/Makefile.inc
index e8ed490c33a5..fd5ffffa2db8 100644
--- a/src/mainboard/amd/db800/Makefile.inc
+++ b/src/mainboard/amd/db800/Makefile.inc
@@ -11,7 +11,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -21,8 +21,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/db800/cache_as_ram_auto.c b/src/mainboard/amd/db800/romstage.c
index c18b0bb154d3..c18b0bb154d3 100644
--- a/src/mainboard/amd/db800/cache_as_ram_auto.c
+++ b/src/mainboard/amd/db800/romstage.c
diff --git a/src/mainboard/amd/dbm690t/Makefile.inc b/src/mainboard/amd/dbm690t/Makefile.inc
index 968e4d64aa7c..7a4a1691e77a 100644
--- a/src/mainboard/amd/dbm690t/Makefile.inc
+++ b/src/mainboard/amd/dbm690t/Makefile.inc
@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/romstage.c
index c83759bbad4d..c83759bbad4d 100644
--- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
+++ b/src/mainboard/amd/dbm690t/romstage.c
diff --git a/src/mainboard/amd/norwich/Makefile.inc b/src/mainboard/amd/norwich/Makefile.inc
index f101f22d4ecb..0e4b263223b6 100644
--- a/src/mainboard/amd/norwich/Makefile.inc
+++ b/src/mainboard/amd/norwich/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/norwich/cache_as_ram_auto.c b/src/mainboard/amd/norwich/romstage.c
index fc7e96b34254..fc7e96b34254 100644
--- a/src/mainboard/amd/norwich/cache_as_ram_auto.c
+++ b/src/mainboard/amd/norwich/romstage.c
diff --git a/src/mainboard/amd/pistachio/Makefile.inc b/src/mainboard/amd/pistachio/Makefile.inc
index dda9ecf0441c..482dfff7248d 100644
--- a/src/mainboard/amd/pistachio/Makefile.inc
+++ b/src/mainboard/amd/pistachio/Makefile.inc
@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/romstage.c
index 2e5c4a0812e3..2e5c4a0812e3 100644
--- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c
+++ b/src/mainboard/amd/pistachio/romstage.c
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/romstage.c
index 1dce42548e36..1dce42548e36 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/romstage.c
diff --git a/src/mainboard/amd/serengeti_cheetah/Makefile.inc b/src/mainboard/amd/serengeti_cheetah/Makefile.inc
index e6f3488e8dc7..2a21650933ec 100644
--- a/src/mainboard/amd/serengeti_cheetah/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah/Makefile.inc
@@ -44,7 +44,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -76,8 +76,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index 2626f8012a2d..2626f8012a2d 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
index afc1da4d858b..619e53a1cc48 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -43,7 +43,7 @@ initobj-y += crt0.o
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -78,8 +78,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc
perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex
mv $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 0b136ec91003..0b136ec91003 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h b/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h
index 5f246ec3e88e..c0e552a3fcf0 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/arima/hdama/cache_as_ram_auto.c b/src/mainboard/arima/hdama/romstage.c
index 19c4c6bc3f30..19c4c6bc3f30 100644
--- a/src/mainboard/arima/hdama/cache_as_ram_auto.c
+++ b/src/mainboard/arima/hdama/romstage.c
diff --git a/src/mainboard/artecgroup/dbe61/Makefile.inc b/src/mainboard/artecgroup/dbe61/Makefile.inc
index 6f3a239f400a..843cf9a8ee49 100644
--- a/src/mainboard/artecgroup/dbe61/Makefile.inc
+++ b/src/mainboard/artecgroup/dbe61/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c b/src/mainboard/artecgroup/dbe61/romstage.c
index 0b3721a5b729..0b3721a5b729 100644
--- a/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
diff --git a/src/mainboard/asi/mb_5blgp/auto.c b/src/mainboard/asi/mb_5blgp/romstage.c
index b4b82fc65a59..b4b82fc65a59 100644
--- a/src/mainboard/asi/mb_5blgp/auto.c
+++ b/src/mainboard/asi/mb_5blgp/romstage.c
diff --git a/src/mainboard/asi/mb_5blmp/auto.c b/src/mainboard/asi/mb_5blmp/romstage.c
index 96e91c0fe26f..96e91c0fe26f 100644
--- a/src/mainboard/asi/mb_5blmp/auto.c
+++ b/src/mainboard/asi/mb_5blmp/romstage.c
diff --git a/src/mainboard/asus/a8n_e/Makefile.inc b/src/mainboard/asus/a8n_e/Makefile.inc
index bf0157620a02..8bcaea7ac4e8 100644
--- a/src/mainboard/asus/a8n_e/Makefile.inc
+++ b/src/mainboard/asus/a8n_e/Makefile.inc
@@ -35,7 +35,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -67,8 +67,8 @@ $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c b/src/mainboard/asus/a8n_e/romstage.c
index 8e0ba2925ecc..8e0ba2925ecc 100644
--- a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
+++ b/src/mainboard/asus/a8n_e/romstage.c
diff --git a/src/mainboard/asus/a8v-e_se/Makefile.inc b/src/mainboard/asus/a8v-e_se/Makefile.inc
index 8f829badfe2b..8900722a50c9 100644
--- a/src/mainboard/asus/a8v-e_se/Makefile.inc
+++ b/src/mainboard/asus/a8v-e_se/Makefile.inc
@@ -16,7 +16,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -34,8 +34,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 4ec3aee8134b..4ec3aee8134b 100644
--- a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
diff --git a/src/mainboard/asus/m2v-mx_se/Makefile.inc b/src/mainboard/asus/m2v-mx_se/Makefile.inc
index 8cd9af91a3b0..d703a3256ee4 100644
--- a/src/mainboard/asus/m2v-mx_se/Makefile.inc
+++ b/src/mainboard/asus/m2v-mx_se/Makefile.inc
@@ -32,7 +32,7 @@ initobj-y += crt0.o
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -46,8 +46,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 13101b021728..13101b021728 100644
--- a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
diff --git a/src/mainboard/asus/mew-am/auto.c b/src/mainboard/asus/mew-am/romstage.c
index a7f74c42f409..a7f74c42f409 100644
--- a/src/mainboard/asus/mew-am/auto.c
+++ b/src/mainboard/asus/mew-am/romstage.c
diff --git a/src/mainboard/asus/mew-vm/auto.c b/src/mainboard/asus/mew-vm/romstage.c
index d9473a5880bf..d9473a5880bf 100644
--- a/src/mainboard/asus/mew-vm/auto.c
+++ b/src/mainboard/asus/mew-vm/romstage.c
diff --git a/src/mainboard/asus/p2b-d/auto.c b/src/mainboard/asus/p2b-d/romstage.c
index 0d928fe7ecbf..0d928fe7ecbf 100644
--- a/src/mainboard/asus/p2b-d/auto.c
+++ b/src/mainboard/asus/p2b-d/romstage.c
diff --git a/src/mainboard/asus/p2b-ds/auto.c b/src/mainboard/asus/p2b-ds/romstage.c
index f01182472737..f01182472737 100644
--- a/src/mainboard/asus/p2b-ds/auto.c
+++ b/src/mainboard/asus/p2b-ds/romstage.c
diff --git a/src/mainboard/asus/p2b-f/auto.c b/src/mainboard/asus/p2b-f/romstage.c
index e9cede41f1ee..e9cede41f1ee 100644
--- a/src/mainboard/asus/p2b-f/auto.c
+++ b/src/mainboard/asus/p2b-f/romstage.c
diff --git a/src/mainboard/asus/p2b/auto.c b/src/mainboard/asus/p2b/romstage.c
index 62ac87381d17..62ac87381d17 100644
--- a/src/mainboard/asus/p2b/auto.c
+++ b/src/mainboard/asus/p2b/romstage.c
diff --git a/src/mainboard/asus/p3b-f/auto.c b/src/mainboard/asus/p3b-f/romstage.c
index 306b03f5bc65..306b03f5bc65 100644
--- a/src/mainboard/asus/p3b-f/auto.c
+++ b/src/mainboard/asus/p3b-f/romstage.c
diff --git a/src/mainboard/axus/tc320/auto.c b/src/mainboard/axus/tc320/romstage.c
index 9cbd13c4b3d4..9cbd13c4b3d4 100644
--- a/src/mainboard/axus/tc320/auto.c
+++ b/src/mainboard/axus/tc320/romstage.c
diff --git a/src/mainboard/azza/pt-6ibd/auto.c b/src/mainboard/azza/pt-6ibd/romstage.c
index 6f0b0581a996..6f0b0581a996 100644
--- a/src/mainboard/azza/pt-6ibd/auto.c
+++ b/src/mainboard/azza/pt-6ibd/romstage.c
diff --git a/src/mainboard/bcom/winnet100/auto.c b/src/mainboard/bcom/winnet100/romstage.c
index 5c4bbe2d37a9..5c4bbe2d37a9 100644
--- a/src/mainboard/bcom/winnet100/auto.c
+++ b/src/mainboard/bcom/winnet100/romstage.c
diff --git a/src/mainboard/bcom/winnetp680/Makefile.inc b/src/mainboard/bcom/winnetp680/Makefile.inc
index 1db65e26ed9a..5ae10f3276cc 100644
--- a/src/mainboard/bcom/winnetp680/Makefile.inc
+++ b/src/mainboard/bcom/winnetp680/Makefile.inc
@@ -39,7 +39,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -51,8 +51,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/bcom/winnetp680/auto.c b/src/mainboard/bcom/winnetp680/romstage.c
index 254b16845699..dd66d3025e12 100644
--- a/src/mainboard/bcom/winnetp680/auto.c
+++ b/src/mainboard/bcom/winnetp680/romstage.c
@@ -104,7 +104,7 @@ static void main(unsigned long bist)
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -124,5 +124,5 @@ static void main(unsigned long bist)
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/biostar/m6tba/auto.c b/src/mainboard/biostar/m6tba/romstage.c
index 8234df136fd7..8234df136fd7 100644
--- a/src/mainboard/biostar/m6tba/auto.c
+++ b/src/mainboard/biostar/m6tba/romstage.c
diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/romstage.c
index 6169841f69f4..6169841f69f4 100644
--- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c
+++ b/src/mainboard/broadcom/blast/romstage.c
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/auto.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
index c465c16781c7..c465c16781c7 100644
--- a/src/mainboard/compaq/deskpro_en_sff_p600/auto.c
+++ b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
diff --git a/src/mainboard/dell/s1850/auto.c b/src/mainboard/dell/s1850/romstage.c
index 5f62ce80a845..5f62ce80a845 100644
--- a/src/mainboard/dell/s1850/auto.c
+++ b/src/mainboard/dell/s1850/romstage.c
diff --git a/src/mainboard/digitallogic/adl855pc/auto.c b/src/mainboard/digitallogic/adl855pc/romstage.c
index cbd8bb048843..cbd8bb048843 100644
--- a/src/mainboard/digitallogic/adl855pc/auto.c
+++ b/src/mainboard/digitallogic/adl855pc/romstage.c
diff --git a/src/mainboard/digitallogic/msm586seg/auto.c b/src/mainboard/digitallogic/msm586seg/romstage.c
index 8f1756b99993..8f1756b99993 100644
--- a/src/mainboard/digitallogic/msm586seg/auto.c
+++ b/src/mainboard/digitallogic/msm586seg/romstage.c
diff --git a/src/mainboard/digitallogic/msm800sev/Makefile.inc b/src/mainboard/digitallogic/msm800sev/Makefile.inc
index f101f22d4ecb..0e4b263223b6 100644
--- a/src/mainboard/digitallogic/msm800sev/Makefile.inc
+++ b/src/mainboard/digitallogic/msm800sev/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/digitallogic/msm800sev/auto.c b/src/mainboard/digitallogic/msm800sev/auto.c
deleted file mode 100644
index 29a5661d85b9..000000000000
--- a/src/mainboard/digitallogic/msm800sev/auto.c
+++ /dev/null
@@ -1,138 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
-//#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/x86/bist.h"
-#include "cpu/x86/msr.h"
-#include <cpu/amd/lxdef.h>
-
-//#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
-#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
-#include "southbridge/amd/cs5536/cs5536_early_setup.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/amd/lx/raminit.h"
-
-static inline unsigned int fls(unsigned int x)
-{
- int r;
-
- __asm__("bsfl %1,%0\n\t"
- "jnz 1f\n\t"
- "movl $32,%0\n"
- "1:" : "=r" (r) : "g" (x));
- return r;
-}
-
-
-
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
-{
- /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
- * component Banks (byte 17) * module banks, side (byte 5) *
- * width in bits (byte 6,7)
- * = Density per side (byte 31) * number of sides (byte 5) */
- /* 1. Initialize GLMC registers base on SPD values, do one DIMM for now */
- msr_t msr;
- unsigned char module_banks, val;
-
-
- msr.hi = 0x10075012;
- msr.lo = 0x00000040;
-
- wrmsr(MC_CF07_DATA, msr); //GX3
-
- /* timing and mode ... */
-
- //msr = rdmsr(0x20000019);
-
- /* per standard bios settings */
-/*
- msr.hi = 0x18000108;
- msr.lo =
- (6<<28) | // cas_lat
- (10<<24)| // ref2act
- (7<<20)| // act2pre
- (3<<16)| // pre2act
- (3<<12)| // act2cmd
- (2<<8)| // act2act
- (2<<6)| // dplwr
- (2<<4)| // dplrd
- (3); // dal
- * the msr value reported by quanta is very, very different.
- * we will go with that value for now.
- *
- //msr.lo = 0x286332a3;
-*/
- //wrmsr(0x20000019, msr); //GX3
-
-}
-
-#include "northbridge/amd/lx/raminit.c"
-#include "lib/generic_sdram.c"
-
-/* CPU and GLIU mult/div */
-#define PLLMSRhi 0x0000039C
-/* Hold Count - how long we will sit in reset */
-#define PLLMSRlo 0x00DE0000
-
-#include "northbridge/amd/lx/pll_reset.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-static void msr_init(void)
-{
-
- __builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
- __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
-
- __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
- __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
-}
-
-
-static void main(unsigned long bist)
-{
- static const struct mem_controller memctrl [] = {
- {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
- };
-
- SystemPreInit(); //GX3 OK
-
- msr_init(); //GX3 OK
-
- cs5536_early_setup(); //GX3 OK
-
- /* NOTE: must do this AFTER the early_setup!
- * it is counting on some early MSR setup
- * for cs5536
- */
- cs5536_setup_onchipuart(); //GX3 OK
-
- uart_init(); //GX3 OK
- console_init(); //GX3 OK
-
- pll_reset(); //GX3 OK
-
- cpuRegInit(); //GX3 OK
-
- print_err("done cpuRegInit\n");
-
- sdram_initialize(1, memctrl); //GX3 OK almost
-
- /* Check all of memory */
- //ram_check(0x00000000, 640*1024);
-}
diff --git a/src/mainboard/digitallogic/msm800sev/cache_as_ram_auto.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index 70fa935a8dbd..03f9fae57b1f 100644
--- a/src/mainboard/digitallogic/msm800sev/cache_as_ram_auto.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -98,7 +98,7 @@ void cache_as_ram_main(void)
/* Switch from Cache as RAM to real RAM */
/* There are two ways we could think about this.
- 1. If we are using the auto.inc ROMCC way, the stack is going to be re-setup in the code following this code.
+ 1. If we are using the romstage.inc ROMCC way, the stack is going to be re-setup in the code following this code.
Just wbinvd the stack to clear the cache tags. We don't care where the stack used to be.
2. This file is built as a normal .c -> .o and linked in etc. The stack might be used to return etc.
That means we care about what is in the stack. If we are smart we set the CAR stack to the same location
diff --git a/src/mainboard/eaglelion/5bcm/auto.c b/src/mainboard/eaglelion/5bcm/romstage.c
index 22e73462769d..22e73462769d 100644
--- a/src/mainboard/eaglelion/5bcm/auto.c
+++ b/src/mainboard/eaglelion/5bcm/romstage.c
diff --git a/src/mainboard/emulation/qemu-x86/auto.c b/src/mainboard/emulation/qemu-x86/romstage.c
index 273f6b9d019f..273f6b9d019f 100644
--- a/src/mainboard/emulation/qemu-x86/auto.c
+++ b/src/mainboard/emulation/qemu-x86/romstage.c
diff --git a/src/mainboard/gigabyte/ga-6bxc/auto.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c
index 1b440a759e8b..1b440a759e8b 100644
--- a/src/mainboard/gigabyte/ga-6bxc/auto.c
+++ b/src/mainboard/gigabyte/ga-6bxc/romstage.c
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
index c6355e6907c8..5baea403437b 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
@@ -25,7 +25,7 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -35,7 +35,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -48,11 +48,11 @@ endif
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 69e06bc2e5cc..69e06bc2e5cc 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
diff --git a/src/mainboard/gigabyte/m57sli/Makefile.inc b/src/mainboard/gigabyte/m57sli/Makefile.inc
index 5aad212d72fe..0fb2cac3d481 100644
--- a/src/mainboard/gigabyte/m57sli/Makefile.inc
+++ b/src/mainboard/gigabyte/m57sli/Makefile.inc
@@ -25,7 +25,7 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.o
@@ -39,7 +39,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -60,11 +60,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/romstage.c
index ecc7827428a6..ecc7827428a6 100644
--- a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/romstage.c
index 525cb3e1029b..525cb3e1029b 100644
--- a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
diff --git a/src/mainboard/hp/e_vectra_p2706t/auto.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c
index 50d8c447b460..50d8c447b460 100644
--- a/src/mainboard/hp/e_vectra_p2706t/auto.c
+++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c
diff --git a/src/mainboard/ibm/e325/cache_as_ram_auto.c b/src/mainboard/ibm/e325/romstage.c
index 6621bf12720e..6621bf12720e 100644
--- a/src/mainboard/ibm/e325/cache_as_ram_auto.c
+++ b/src/mainboard/ibm/e325/romstage.c
diff --git a/src/mainboard/ibm/e326/cache_as_ram_auto.c b/src/mainboard/ibm/e326/romstage.c
index 0ec2c52f48a7..0ec2c52f48a7 100644
--- a/src/mainboard/ibm/e326/cache_as_ram_auto.c
+++ b/src/mainboard/ibm/e326/romstage.c
diff --git a/src/mainboard/iei/juki-511p/auto.c b/src/mainboard/iei/juki-511p/romstage.c
index 655959fac491..655959fac491 100644
--- a/src/mainboard/iei/juki-511p/auto.c
+++ b/src/mainboard/iei/juki-511p/romstage.c
diff --git a/src/mainboard/iei/nova4899r/auto.c b/src/mainboard/iei/nova4899r/romstage.c
index 0b15c3f40bba..0b15c3f40bba 100644
--- a/src/mainboard/iei/nova4899r/auto.c
+++ b/src/mainboard/iei/nova4899r/romstage.c
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc b/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
index f101f22d4ecb..0e4b263223b6 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index 24a350b92bb0..24a350b92bb0 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
diff --git a/src/mainboard/intel/d945gclf/Makefile.inc b/src/mainboard/intel/d945gclf/Makefile.inc
index 83e8f5cb43e0..944aa3d5f4dc 100644
--- a/src/mainboard/intel/d945gclf/Makefile.inc
+++ b/src/mainboard/intel/d945gclf/Makefile.inc
@@ -41,7 +41,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -59,8 +59,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/intel/d945gclf/auto.c b/src/mainboard/intel/d945gclf/romstage.c
index 8d1dc1681500..8d1dc1681500 100644
--- a/src/mainboard/intel/d945gclf/auto.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
diff --git a/src/mainboard/intel/eagleheights/Makefile.inc b/src/mainboard/intel/eagleheights/Makefile.inc
index 646693245308..af1b21750928 100644
--- a/src/mainboard/intel/eagleheights/Makefile.inc
+++ b/src/mainboard/intel/eagleheights/Makefile.inc
@@ -16,7 +16,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -33,8 +33,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/intel/eagleheights/auto.c b/src/mainboard/intel/eagleheights/romstage.c
index d928de5c56dc..d928de5c56dc 100644
--- a/src/mainboard/intel/eagleheights/auto.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
diff --git a/src/mainboard/intel/jarrell/auto.c b/src/mainboard/intel/jarrell/romstage.c
index 462bd8e25d8f..462bd8e25d8f 100644
--- a/src/mainboard/intel/jarrell/auto.c
+++ b/src/mainboard/intel/jarrell/romstage.c
diff --git a/src/mainboard/intel/mtarvon/auto.c b/src/mainboard/intel/mtarvon/romstage.c
index 6524ea217ca9..6524ea217ca9 100644
--- a/src/mainboard/intel/mtarvon/auto.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
diff --git a/src/mainboard/intel/truxton/auto.c b/src/mainboard/intel/truxton/romstage.c
index 834c53e53bed..834c53e53bed 100644
--- a/src/mainboard/intel/truxton/auto.c
+++ b/src/mainboard/intel/truxton/romstage.c
diff --git a/src/mainboard/intel/xe7501devkit/auto.c b/src/mainboard/intel/xe7501devkit/romstage.c
index 7269fa8d43a9..7269fa8d43a9 100644
--- a/src/mainboard/intel/xe7501devkit/auto.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
diff --git a/src/mainboard/iwill/dk8_htx/Makefile.inc b/src/mainboard/iwill/dk8_htx/Makefile.inc
index 1b991e89a7ca..95af1006cfda 100644
--- a/src/mainboard/iwill/dk8_htx/Makefile.inc
+++ b/src/mainboard/iwill/dk8_htx/Makefile.inc
@@ -44,7 +44,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -81,8 +81,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc
perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/pci5.hex
mv $(obj)/pci5.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/romstage.c
index cdfdfc09c54f..cdfdfc09c54f 100644
--- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/romstage.c
index 271ad6cc54dc..271ad6cc54dc 100644
--- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/romstage.c
index 271ad6cc54dc..271ad6cc54dc 100644
--- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
diff --git a/src/mainboard/jetway/j7f24/Makefile.inc b/src/mainboard/jetway/j7f24/Makefile.inc
index 2843b73ccfea..47e519a52c0a 100644
--- a/src/mainboard/jetway/j7f24/Makefile.inc
+++ b/src/mainboard/jetway/j7f24/Makefile.inc
@@ -35,13 +35,13 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/jetway/j7f24/auto.c b/src/mainboard/jetway/j7f24/romstage.c
index 050b40e9ccca..82a90dbb8a46 100644
--- a/src/mainboard/jetway/j7f24/auto.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -106,7 +106,7 @@ static void main(unsigned long bist)
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -126,5 +126,5 @@ static void main(unsigned long bist)
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/kontron/986lcd-m/Makefile.inc b/src/mainboard/kontron/986lcd-m/Makefile.inc
index bd0d7b9965ea..29f43797c02e 100644
--- a/src/mainboard/kontron/986lcd-m/Makefile.inc
+++ b/src/mainboard/kontron/986lcd-m/Makefile.inc
@@ -40,7 +40,7 @@ initobj-y += crt0.o
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/kontron/986lcd-m/auto.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 29d1d242fffb..e0943ab390fe 100644
--- a/src/mainboard/kontron/986lcd-m/auto.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -29,7 +29,7 @@
* However, the Kontron 986LCD-M does not like unused clock signals to
* be disabled. If other similar mainboard occur, it would make sense
* to make this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's auto.c main() function. For now a
+ * structure in the mainboard's romstage.c main() function. For now a
* #define will do.
*/
#define OVERRIDE_CLOCK_DISABLE 1
diff --git a/src/mainboard/kontron/kt690/Makefile.inc b/src/mainboard/kontron/kt690/Makefile.inc
index dda9ecf0441c..482dfff7248d 100644
--- a/src/mainboard/kontron/kt690/Makefile.inc
+++ b/src/mainboard/kontron/kt690/Makefile.inc
@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/kontron/kt690/cache_as_ram_auto.c b/src/mainboard/kontron/kt690/romstage.c
index 224f60365dc1..224f60365dc1 100644
--- a/src/mainboard/kontron/kt690/cache_as_ram_auto.c
+++ b/src/mainboard/kontron/kt690/romstage.c
diff --git a/src/mainboard/lippert/frontrunner/auto.c b/src/mainboard/lippert/frontrunner/romstage.c
index b0ffcc9d63d7..b0ffcc9d63d7 100644
--- a/src/mainboard/lippert/frontrunner/auto.c
+++ b/src/mainboard/lippert/frontrunner/romstage.c
diff --git a/src/mainboard/lippert/roadrunner-lx/Makefile.inc b/src/mainboard/lippert/roadrunner-lx/Makefile.inc
index f101f22d4ecb..0e4b263223b6 100644
--- a/src/mainboard/lippert/roadrunner-lx/Makefile.inc
+++ b/src/mainboard/lippert/roadrunner-lx/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/lippert/roadrunner-lx/cache_as_ram_auto.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index 3884a27eb642..e8cfee55bb8b 100644
--- a/src/mainboard/lippert/roadrunner-lx/cache_as_ram_auto.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Based on cache_as_ram_auto.c from AMD's DB800 and DBM690T mainboards. */
+/* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */
#define ASSEMBLY 1
#define __PRE_RAM__
diff --git a/src/mainboard/lippert/spacerunner-lx/Makefile.inc b/src/mainboard/lippert/spacerunner-lx/Makefile.inc
index f101f22d4ecb..0e4b263223b6 100644
--- a/src/mainboard/lippert/spacerunner-lx/Makefile.inc
+++ b/src/mainboard/lippert/spacerunner-lx/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/lippert/spacerunner-lx/cache_as_ram_auto.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index 9aeeb63bc68e..54d7113a5e29 100644
--- a/src/mainboard/lippert/spacerunner-lx/cache_as_ram_auto.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Based on cache_as_ram_auto.c from AMD's DB800 and DBM690T mainboards. */
+/* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */
#define ASSEMBLY 1
#define __PRE_RAM__
diff --git a/src/mainboard/mitac/6513wu/auto.c b/src/mainboard/mitac/6513wu/romstage.c
index 6222ea87210e..6222ea87210e 100644
--- a/src/mainboard/mitac/6513wu/auto.c
+++ b/src/mainboard/mitac/6513wu/romstage.c
diff --git a/src/mainboard/msi/ms6119/auto.c b/src/mainboard/msi/ms6119/romstage.c
index 942fdfb6d666..942fdfb6d666 100644
--- a/src/mainboard/msi/ms6119/auto.c
+++ b/src/mainboard/msi/ms6119/romstage.c
diff --git a/src/mainboard/msi/ms6147/auto.c b/src/mainboard/msi/ms6147/romstage.c
index 5aec34a96d3f..5aec34a96d3f 100644
--- a/src/mainboard/msi/ms6147/auto.c
+++ b/src/mainboard/msi/ms6147/romstage.c
diff --git a/src/mainboard/msi/ms6156/auto.c b/src/mainboard/msi/ms6156/romstage.c
index 78d133b5bf2f..78d133b5bf2f 100644
--- a/src/mainboard/msi/ms6156/auto.c
+++ b/src/mainboard/msi/ms6156/romstage.c
diff --git a/src/mainboard/msi/ms6178/auto.c b/src/mainboard/msi/ms6178/romstage.c
index a320dde7633d..a320dde7633d 100644
--- a/src/mainboard/msi/ms6178/auto.c
+++ b/src/mainboard/msi/ms6178/romstage.c
diff --git a/src/mainboard/msi/ms7135/cache_as_ram_auto.c b/src/mainboard/msi/ms7135/romstage.c
index 6616dc14442d..6616dc14442d 100644
--- a/src/mainboard/msi/ms7135/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7135/romstage.c
diff --git a/src/mainboard/msi/ms7260/Makefile.inc b/src/mainboard/msi/ms7260/Makefile.inc
index 6fec80a18b91..fa88bc0d9292 100644
--- a/src/mainboard/msi/ms7260/Makefile.inc
+++ b/src/mainboard/msi/ms7260/Makefile.inc
@@ -25,7 +25,7 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -35,7 +35,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,11 +55,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/romstage.c
index 7a8bf13a79e9..7a8bf13a79e9 100644
--- a/src/mainboard/msi/ms7260/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7260/romstage.c
diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/romstage.c
index 255815707aa3..255815707aa3 100644
--- a/src/mainboard/msi/ms9185/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9185/romstage.c
diff --git a/src/mainboard/msi/ms9282/Makefile.inc b/src/mainboard/msi/ms9282/Makefile.inc
index 9bffee7d8890..e46f01295ce2 100644
--- a/src/mainboard/msi/ms9282/Makefile.inc
+++ b/src/mainboard/msi/ms9282/Makefile.inc
@@ -27,7 +27,7 @@ driver-y += ../../../drivers/i2c/adm1027/adm1027.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -37,7 +37,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -57,11 +57,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/msi/ms9282/cache_as_ram_auto.c b/src/mainboard/msi/ms9282/romstage.c
index 11c92b81fae9..11c92b81fae9 100644
--- a/src/mainboard/msi/ms9282/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9282/romstage.c
diff --git a/src/mainboard/nec/powermate2000/auto.c b/src/mainboard/nec/powermate2000/romstage.c
index 701e312967b6..701e312967b6 100644
--- a/src/mainboard/nec/powermate2000/auto.c
+++ b/src/mainboard/nec/powermate2000/romstage.c
diff --git a/src/mainboard/newisys/khepri/cache_as_ram_auto.c b/src/mainboard/newisys/khepri/romstage.c
index efd2ea3a974d..e4c52d0843c5 100644
--- a/src/mainboard/newisys/khepri/cache_as_ram_auto.c
+++ b/src/mainboard/newisys/khepri/romstage.c
@@ -1,5 +1,5 @@
/*
- * This code is derived from the Tyan s2882 cache_as_ram_auto.c
+ * This code is derived from the Tyan s2882 romstage.c
* Adapted by Stefan Reinauer <stepan@coresystems.de>
* Additional (C) 2007 coresystems GmbH
*/
diff --git a/src/mainboard/nvidia/l1_2pvv/Makefile.inc b/src/mainboard/nvidia/l1_2pvv/Makefile.inc
index 7ca325a45070..dec2de56a367 100644
--- a/src/mainboard/nvidia/l1_2pvv/Makefile.inc
+++ b/src/mainboard/nvidia/l1_2pvv/Makefile.inc
@@ -25,7 +25,7 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -36,7 +36,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -50,11 +50,11 @@ endif
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index ab6941f22dbf..ab6941f22dbf 100644
--- a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
diff --git a/src/mainboard/olpc/btest/auto.c b/src/mainboard/olpc/btest/romstage.c
index 21363b719933..21363b719933 100644
--- a/src/mainboard/olpc/btest/auto.c
+++ b/src/mainboard/olpc/btest/romstage.c
diff --git a/src/mainboard/olpc/rev_a/auto.c b/src/mainboard/olpc/rev_a/romstage.c
index 21363b719933..21363b719933 100644
--- a/src/mainboard/olpc/rev_a/auto.c
+++ b/src/mainboard/olpc/rev_a/romstage.c
diff --git a/src/mainboard/pcengines/alix1c/Makefile.inc b/src/mainboard/pcengines/alix1c/Makefile.inc
index 6f3a239f400a..843cf9a8ee49 100644
--- a/src/mainboard/pcengines/alix1c/Makefile.inc
+++ b/src/mainboard/pcengines/alix1c/Makefile.inc
@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c b/src/mainboard/pcengines/alix1c/romstage.c
index e4828151ffaf..321426b210b3 100644
--- a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -181,7 +181,7 @@ void cache_as_ram_main(void)
*
* There are two ways we could think about this.
*
- * 1. If we are using the auto.inc ROMCC way, the stack is
+ * 1. If we are using the romstage.inc ROMCC way, the stack is
* going to be re-setup in the code following this code. Just
* wbinvd the stack to clear the cache tags. We don't care
* where the stack used to be.
diff --git a/src/mainboard/rca/rm4100/auto.c b/src/mainboard/rca/rm4100/romstage.c
index 2f3892e3a0e3..2f3892e3a0e3 100644
--- a/src/mainboard/rca/rm4100/auto.c
+++ b/src/mainboard/rca/rm4100/romstage.c
diff --git a/src/mainboard/roda/rk886ex/Makefile.inc b/src/mainboard/roda/rk886ex/Makefile.inc
index 41e5780a8c47..c943ae4c2978 100644
--- a/src/mainboard/roda/rk886ex/Makefile.inc
+++ b/src/mainboard/roda/rk886ex/Makefile.inc
@@ -45,7 +45,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -63,8 +63,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/roda/rk886ex/auto.c b/src/mainboard/roda/rk886ex/romstage.c
index 868d41edff86..868d41edff86 100644
--- a/src/mainboard/roda/rk886ex/auto.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/auto.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
index 48d18f666709..48d18f666709 100644
--- a/src/mainboard/soyo/sy-6ba-plus-iii/auto.c
+++ b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/romstage.c
index 9a3f94803616..9a3f94803616 100644
--- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
diff --git a/src/mainboard/supermicro/h8dme/Makefile.inc b/src/mainboard/supermicro/h8dme/Makefile.inc
index b878c05d2bd4..2d87c43ac0be 100644
--- a/src/mainboard/supermicro/h8dme/Makefile.inc
+++ b/src/mainboard/supermicro/h8dme/Makefile.inc
@@ -37,7 +37,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -70,8 +70,8 @@ $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/romstage.c
index 72d5809ea429..72d5809ea429 100644
--- a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
diff --git a/src/mainboard/supermicro/h8dmr/Makefile.inc b/src/mainboard/supermicro/h8dmr/Makefile.inc
index 7e8949c5994e..d280d6bfd2df 100644
--- a/src/mainboard/supermicro/h8dmr/Makefile.inc
+++ b/src/mainboard/supermicro/h8dmr/Makefile.inc
@@ -36,7 +36,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -69,8 +69,8 @@ $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 9c675274afc9..9c675274afc9 100644
--- a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
index d1e0ef6863c1..9d1b77116a11 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
+++ b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
@@ -32,7 +32,7 @@ initobj-y += crt0.o
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -62,8 +62,8 @@ $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $(obj)/ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 4ebc47f6a030..4ebc47f6a030 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
diff --git a/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h b/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h
index 915ee8bd7ca1..a8abf331ee1f 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h
+++ b/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/supermicro/h8qme_fam10/Makefile.inc b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
index d1e0ef6863c1..9d1b77116a11 100644
--- a/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
+++ b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
@@ -32,7 +32,7 @@ initobj-y += crt0.o
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -62,8 +62,8 @@ $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $(obj)/ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8qme_fam10/cache_as_ram_auto.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 4ebc47f6a030..4ebc47f6a030 100644
--- a/src/mainboard/supermicro/h8qme_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
diff --git a/src/mainboard/supermicro/h8qme_fam10/spd_addr.h b/src/mainboard/supermicro/h8qme_fam10/spd_addr.h
index b5994bf017be..5b32b4c2d68e 100644
--- a/src/mainboard/supermicro/h8qme_fam10/spd_addr.h
+++ b/src/mainboard/supermicro/h8qme_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/supermicro/x6dai_g/auto.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index c9289d96da24..c9289d96da24 100644
--- a/src/mainboard/supermicro/x6dai_g/auto.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
diff --git a/src/mainboard/supermicro/x6dhe_g/auto.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 086dd52b908b..086dd52b908b 100644
--- a/src/mainboard/supermicro/x6dhe_g/auto.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
diff --git a/src/mainboard/supermicro/x6dhe_g2/auto.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 4e9c1e270b70..4e9c1e270b70 100644
--- a/src/mainboard/supermicro/x6dhe_g2/auto.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
diff --git a/src/mainboard/supermicro/x6dhr_ig/auto.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 314cc7032502..314cc7032502 100644
--- a/src/mainboard/supermicro/x6dhr_ig/auto.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
diff --git a/src/mainboard/supermicro/x6dhr_ig2/auto.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 3cb41ad03746..3cb41ad03746 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/auto.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
diff --git a/src/mainboard/technexion/tim5690/Makefile.inc b/src/mainboard/technexion/tim5690/Makefile.inc
index fc725128dc06..25176c713354 100644
--- a/src/mainboard/technexion/tim5690/Makefile.inc
+++ b/src/mainboard/technexion/tim5690/Makefile.inc
@@ -44,7 +44,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -61,8 +61,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/technexion/tim5690/cache_as_ram_auto.c b/src/mainboard/technexion/tim5690/romstage.c
index 49190784243f..49190784243f 100644
--- a/src/mainboard/technexion/tim5690/cache_as_ram_auto.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
diff --git a/src/mainboard/technexion/tim8690/Makefile.inc b/src/mainboard/technexion/tim8690/Makefile.inc
index dda9ecf0441c..482dfff7248d 100644
--- a/src/mainboard/technexion/tim8690/Makefile.inc
+++ b/src/mainboard/technexion/tim8690/Makefile.inc
@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/romstage.c
index ff86ba37138f..ff86ba37138f 100644
--- a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
diff --git a/src/mainboard/technologic/ts5300/auto.c b/src/mainboard/technologic/ts5300/romstage.c
index 31a75183d70b..31a75183d70b 100644
--- a/src/mainboard/technologic/ts5300/auto.c
+++ b/src/mainboard/technologic/ts5300/romstage.c
diff --git a/src/mainboard/televideo/tc7020/auto.c b/src/mainboard/televideo/tc7020/romstage.c
index 5c4bbe2d37a9..5c4bbe2d37a9 100644
--- a/src/mainboard/televideo/tc7020/auto.c
+++ b/src/mainboard/televideo/tc7020/romstage.c
diff --git a/src/mainboard/thomson/ip1000/auto.c b/src/mainboard/thomson/ip1000/romstage.c
index 2f3892e3a0e3..2f3892e3a0e3 100644
--- a/src/mainboard/thomson/ip1000/auto.c
+++ b/src/mainboard/thomson/ip1000/romstage.c
diff --git a/src/mainboard/tyan/s1846/auto.c b/src/mainboard/tyan/s1846/romstage.c
index be6e43b0e65f..be6e43b0e65f 100644
--- a/src/mainboard/tyan/s1846/auto.c
+++ b/src/mainboard/tyan/s1846/romstage.c
diff --git a/src/mainboard/tyan/s2735/Makefile.inc b/src/mainboard/tyan/s2735/Makefile.inc
index 027dd1fd340e..27b522a01f95 100644
--- a/src/mainboard/tyan/s2735/Makefile.inc
+++ b/src/mainboard/tyan/s2735/Makefile.inc
@@ -40,7 +40,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -58,8 +58,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2735/reset.c b/src/mainboard/tyan/s2735/reset.c
index bffb0389a871..371920dca259 100644
--- a/src/mainboard/tyan/s2735/reset.c
+++ b/src/mainboard/tyan/s2735/reset.c
@@ -1,6 +1,6 @@
void i82801er_hard_reset(void);
-/* FIXME: There's another hard_reset() in cache_as_ram_auto.c. Why? */
+/* FIXME: There's another hard_reset() in romstage.c. Why? */
void hard_reset(void)
{
i82801er_hard_reset();
diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/romstage.c
index 99a38a9fb33b..99a38a9fb33b 100644
--- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2735/romstage.c
diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/romstage.c
index 352feadf703c..352feadf703c 100644
--- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2850/romstage.c
diff --git a/src/mainboard/tyan/s2875/cache_as_ram_auto.c b/src/mainboard/tyan/s2875/romstage.c
index 50b12f1ff6db..50b12f1ff6db 100644
--- a/src/mainboard/tyan/s2875/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2875/romstage.c
diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/romstage.c
index c97f3b770803..c97f3b770803 100644
--- a/src/mainboard/tyan/s2880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2880/romstage.c
diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/romstage.c
index 9d5edcb462a5..9d5edcb462a5 100644
--- a/src/mainboard/tyan/s2881/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2881/romstage.c
diff --git a/src/mainboard/tyan/s2882/cache_as_ram_auto.c b/src/mainboard/tyan/s2882/romstage.c
index cdea6933eddd..cdea6933eddd 100644
--- a/src/mainboard/tyan/s2882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2882/romstage.c
diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/romstage.c
index d561e033c691..d561e033c691 100644
--- a/src/mainboard/tyan/s2885/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2885/romstage.c
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/romstage.c
index 9ace5e30aeae..9ace5e30aeae 100644
--- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2891/romstage.c
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/romstage.c
index e94017e53260..e94017e53260 100644
--- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2892/romstage.c
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/romstage.c
index 78ddd1c6a315..78ddd1c6a315 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/romstage.c
diff --git a/src/mainboard/tyan/s2912/Makefile.inc b/src/mainboard/tyan/s2912/Makefile.inc
index 7ca52cccd323..4da637b84aa2 100644
--- a/src/mainboard/tyan/s2912/Makefile.inc
+++ b/src/mainboard/tyan/s2912/Makefile.inc
@@ -25,7 +25,7 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -36,7 +36,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -57,11 +57,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/romstage.c
index ce466306cea2..ce466306cea2 100644
--- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912/romstage.c
diff --git a/src/mainboard/tyan/s2912_fam10/Makefile.inc b/src/mainboard/tyan/s2912_fam10/Makefile.inc
index 9e6bad7132fe..8d0dfbe13a1f 100644
--- a/src/mainboard/tyan/s2912_fam10/Makefile.inc
+++ b/src/mainboard/tyan/s2912_fam10/Makefile.inc
@@ -25,14 +25,14 @@ driver-y += mainboard.o
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -50,11 +50,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 1216c298b998..1216c298b998 100644
--- a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
diff --git a/src/mainboard/tyan/s2912_fam10/spd_addr.h b/src/mainboard/tyan/s2912_fam10/spd_addr.h
index 915ee8bd7ca1..a8abf331ee1f 100644
--- a/src/mainboard/tyan/s2912_fam10/spd_addr.h
+++ b/src/mainboard/tyan/s2912_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/romstage.c
index 9f38ec199287..9f38ec199287 100644
--- a/src/mainboard/tyan/s4880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4880/romstage.c
diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/romstage.c
index 1c8d3b42fe0c..1c8d3b42fe0c 100644
--- a/src/mainboard/tyan/s4882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4882/romstage.c
diff --git a/src/mainboard/via/epia-cn/auto.c b/src/mainboard/via/epia-cn/romstage.c
index 4e60569f1d0f..c03cb1668981 100644
--- a/src/mainboard/via/epia-cn/auto.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -101,7 +101,7 @@ static void main(unsigned long bist)
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -121,5 +121,5 @@ static void main(unsigned long bist)
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/via/epia-m/Makefile.inc b/src/mainboard/via/epia-m/Makefile.inc
index 95364b5a5a4c..3c82c8513df4 100644
--- a/src/mainboard/via/epia-m/Makefile.inc
+++ b/src/mainboard/via/epia-m/Makefile.inc
@@ -41,7 +41,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/northbridge/via/vx800/romstrap.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -53,8 +53,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia-m/auto.c b/src/mainboard/via/epia-m/romstage.c
index 77cac78bd398..8b8a96aa9384 100644
--- a/src/mainboard/via/epia-m/auto.c
+++ b/src/mainboard/via/epia-m/romstage.c
@@ -105,7 +105,7 @@ static void main(unsigned long bist)
enable_smbus();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
@@ -150,5 +150,5 @@ static void main(unsigned long bist)
//dump_pci_devices();
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/via/epia-m700/Makefile.inc b/src/mainboard/via/epia-m700/Makefile.inc
index 880c22efb7aa..5202e44e8565 100644
--- a/src/mainboard/via/epia-m700/Makefile.inc
+++ b/src/mainboard/via/epia-m700/Makefile.inc
@@ -42,15 +42,15 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/northbridge/via/vx800/romstrap.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/via/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia-m700/cache_as_ram_auto.c b/src/mainboard/via/epia-m700/romstage.c
index 45e811861715..5da2dfe9b747 100644
--- a/src/mainboard/via/epia-m700/cache_as_ram_auto.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -710,7 +710,7 @@ void amd64_main(unsigned long bist)
#endif
/*
- * The following code is copied from tyan\s2735\cache_as_ram_auto.c.
+ * The following code is copied from tyan\s2735\romstage.c.
* Only the code around CLEAR_FIRST_1M_RAM is changed. Removed all the code
* around CLEAR_FIRST_1M_RAM and #include "cpu/x86/car/cache_as_ram_post.c".
* The CLEAR_FIRST_1M_RAM seems to make cpu/x86/car/cache_as_ram_post.c stop
diff --git a/src/mainboard/via/epia-n/Makefile.inc b/src/mainboard/via/epia-n/Makefile.inc
index 8914faa6e7ba..f8d0e6fd9c80 100644
--- a/src/mainboard/via/epia-n/Makefile.inc
+++ b/src/mainboard/via/epia-n/Makefile.inc
@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -50,8 +50,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia-n/auto.c b/src/mainboard/via/epia-n/romstage.c
index 8c871370c3ba..9f05325b2ab7 100644
--- a/src/mainboard/via/epia-n/auto.c
+++ b/src/mainboard/via/epia-n/romstage.c
@@ -128,7 +128,7 @@ static void main(unsigned long bist)
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -156,5 +156,5 @@ static void main(unsigned long bist)
//ram_check(0, 640 * 1024);
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/via/epia/Makefile.inc b/src/mainboard/via/epia/Makefile.inc
index 37e9ba6933ee..4be56312fd31 100644
--- a/src/mainboard/via/epia/Makefile.inc
+++ b/src/mainboard/via/epia/Makefile.inc
@@ -34,7 +34,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -46,8 +46,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/romstage.c
index a40a9b22f888..a40a9b22f888 100644
--- a/src/mainboard/via/epia/auto.c
+++ b/src/mainboard/via/epia/romstage.c
diff --git a/src/mainboard/via/pc2500e/auto.c b/src/mainboard/via/pc2500e/romstage.c
index 489730668cb4..489730668cb4 100644
--- a/src/mainboard/via/pc2500e/auto.c
+++ b/src/mainboard/via/pc2500e/romstage.c
diff --git a/src/mainboard/via/vt8454c/Makefile.inc b/src/mainboard/via/vt8454c/Makefile.inc
index 09de4d12324d..8f321c2e4b9d 100644
--- a/src/mainboard/via/vt8454c/Makefile.inc
+++ b/src/mainboard/via/vt8454c/Makefile.inc
@@ -32,7 +32,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/via/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -49,8 +49,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/vt8454c/auto.c b/src/mainboard/via/vt8454c/romstage.c
index e2065095c1c0..e2065095c1c0 100644
--- a/src/mainboard/via/vt8454c/auto.c
+++ b/src/mainboard/via/vt8454c/romstage.c
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index b0aee4bccc82..bb0f865a0033 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -18,7 +18,7 @@
*/
/*
- * Generic FAM10 debug code, used by mainboard specific car_auto.c
+ * Generic FAM10 debug code, used by mainboard specific romstage.c
*/
#include "amdfam10_pci.c"
diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c
index 55e232f95a9f..f9e9671a3e90 100644
--- a/src/northbridge/amd/amdk8/debug.c
+++ b/src/northbridge/amd/amdk8/debug.c
@@ -1,5 +1,5 @@
/*
- * generic K8 debug code, used by mainboard specific auto.c
+ * generic K8 debug code, used by mainboard specific romstage.c
*
*/
diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index e97930e97873..75ed33ea4072 100644
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -1,5 +1,5 @@
/*
- * generic debug code, used by mainboard specific auto.c
+ * generic debug code, used by mainboard specific romstage.c
*
*/
#if 1
diff --git a/src/northbridge/intel/i855gme/debug.c b/src/northbridge/intel/i855gme/debug.c
index 46d629b01ec9..4083add6f1b2 100644
--- a/src/northbridge/intel/i855gme/debug.c
+++ b/src/northbridge/intel/i855gme/debug.c
@@ -19,7 +19,7 @@
*/
/*
- * generic K8 debug code, used by mainboard specific auto.c
+ * generic K8 debug code, used by mainboard specific romstage.c
*
*/
#if 1
diff --git a/src/northbridge/intel/i855pm/debug.c b/src/northbridge/intel/i855pm/debug.c
index 67670f9844e4..7b854455a968 100644
--- a/src/northbridge/intel/i855pm/debug.c
+++ b/src/northbridge/intel/i855pm/debug.c
@@ -1,5 +1,5 @@
/*
- * generic K8 debug code, used by mainboard specific auto.c
+ * generic K8 debug code, used by mainboard specific romstage.c
*
*/
#if 1
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 4083cef2c1bd..124ef147c396 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2796,7 +2796,7 @@ static void sdram_enable_memory_clocks(struct sys_info *sysinfo)
* signals to be disabled.
* If other similar mainboard occur, it would make sense to make
* this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's auto.c main() function.
+ * structure in the mainboard's romstage.c main() function.
* For now an #ifdef will do.
*/
diff --git a/src/northbridge/via/cx700/cx700_early_smbus.c b/src/northbridge/via/cx700/cx700_early_smbus.c
index 218ae0a7a1ca..ed79744db4da 100644
--- a/src/northbridge/via/cx700/cx700_early_smbus.c
+++ b/src/northbridge/via/cx700/cx700_early_smbus.c
@@ -188,7 +188,7 @@ static unsigned int get_spd_data(const struct mem_controller *ctrl, unsigned int
smbus_wait_until_ready();
/* Fetch the SMBus address of the SPD ROM from
- * the ctrl struct in auto.c in case they are at
+ * the ctrl struct in romstage.c in case they are at
* non-standard positions.
* SMBus Address shifted by 1
*/
diff --git a/src/northbridge/via/vx800/examples/cache_as_ram_auto.c b/src/northbridge/via/vx800/examples/romstage.c
index fa8962b16842..c1de3f3dc287 100644
--- a/src/northbridge/via/vx800/examples/cache_as_ram_auto.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -559,13 +559,13 @@ g) Rx73h = 32h
}
#endif
/*
-the following code is copied from src\mainboard\tyan\s2735\cache_as_ram_auto.c
+the following code is copied from src/mainboard/tyan/s2735/romstage.c
Only the code around CLEAR_FIRST_1M_RAM is changed.
I remove all the code around CLEAR_FIRST_1M_RAM and #include "cpu/x86/car/cache_as_ram_post.c"
the CLEAR_FIRST_1M_RAM seems to make cpu/x86/car/cache_as_ram_post.c stop at somewhere,
and cpu/x86/car/cache_as_ram_post.c do not cache my $CONFIG_XIP_ROM_BASE+SIZE area.
-So,I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c have some diff withx86-version
+So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c have some diff with x86-version
*/
#if 1
{
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 8f62c1be2cf3..3fc1fa6ea786 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -40,7 +40,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-/* __ROMCC__ is set by auto.c to make sure
+/* __ROMCC__ is set by romstage.c to make sure
* none of the stage2 data structures are included.
*/
#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
diff --git a/src/southbridge/intel/i82801gx/i82801gx_azalia.c b/src/southbridge/intel/i82801gx/i82801gx_azalia.c
index 21973ce3d6b9..2b9b24579b31 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_azalia.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_azalia.c
@@ -265,7 +265,7 @@ static void azalia_init(struct device *dev)
pci_write_config8(dev, 0x3c, 0x0a); // unused?
// TODO Actually check if we're AC97 or HDA instead of hardcoding this
- // here, in Config.lb and/or auto.c.
+ // here, in devicetree.cb and/or romstage.c.
reg8 = pci_read_config8(dev, 0x40);
reg8 |= (1 << 3); // Clear Clock Detect Bit
pci_write_config8(dev, 0x40, reg8);
@@ -279,7 +279,7 @@ static void azalia_init(struct device *dev)
//
reg8 = pci_read_config8(dev, 0x40); // Audio Control
- reg8 |= 1; // Select Azalia mode. This needs to be controlled via Config.lb
+ reg8 |= 1; // Select Azalia mode. This needs to be controlled via devicetree.cb
pci_write_config8(dev, 0x40, reg8);
reg8 = pci_read_config8(dev, 0x4d); // Docking Status
diff --git a/src/southbridge/via/vt8231/vt8231_ide.c b/src/southbridge/via/vt8231/vt8231_ide.c
index c17ab2edd953..a151ca06c956 100644
--- a/src/southbridge/via/vt8231/vt8231_ide.c
+++ b/src/southbridge/via/vt8231/vt8231_ide.c
@@ -13,7 +13,7 @@ static void ide_init(struct device *dev)
if (!conf->enable_native_ide) {
// Run the IDE controller in 'compatiblity mode - i.e. don't use PCI
// interrupts. Using PCI ints confuses linux for some reason.
- /* Setting reg 0x42 here does not work. It is set in mainboard/auto.c
+ /* Setting reg 0x42 here does not work. It is set in mainboard/romstage.c
* It probably can only be changed while the IDE is disabled
* or it is possibly a timing issue. Ben Hewson 29 Apr 2007.
*/