summaryrefslogtreecommitdiffstats
path: root/src/soc/amd/picasso/early_fch.c
diff options
context:
space:
mode:
authorFelix Held <felix.held@amd.corp-partner.google.com>2021-09-08 00:37:30 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-09 14:20:35 +0000
commit7bbde76014a571cbe2344615f19b1e9bc905b84a (patch)
treeaf97dd4cea8ad4282d5339fe6923dc2e3251ef48 /src/soc/amd/picasso/early_fch.c
parentfd63e11f714eb1e908df2005d9becb492a5247e9 (diff)
downloadcoreboot-7bbde76014a571cbe2344615f19b1e9bc905b84a.tar.gz
coreboot-7bbde76014a571cbe2344615f19b1e9bc905b84a.tar.bz2
coreboot-7bbde76014a571cbe2344615f19b1e9bc905b84a.zip
soc/amd/common/block/include/i2c: introduce I2C_RESET_SCL_PIN macro
Add and use the I2C_RESET_SCL_PIN macro for populating the i2c_scl_pins array that is used for the sb_reset_i2c_peripherals call to bring the I2C buses into a defined state. TEST=Timeless build results in identical image for Mandolin. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ifedc09d0bf745545fa0510df7d5037f02b9012a6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/early_fch.c')
-rw-r--r--src/soc/amd/picasso/early_fch.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c
index 048ce12819cb..ae3aed2d98d7 100644
--- a/src/soc/amd/picasso/early_fch.c
+++ b/src/soc/amd/picasso/early_fch.c
@@ -17,8 +17,8 @@
/* Table to switch SCL pins to outputs to initially reset the I2C peripherals */
static const struct soc_i2c_scl_pin i2c_scl_pins[] = {
- { PAD_GPO(I2C2_SCL_PIN, HIGH), GPIO_I2C2_SCL },
- { PAD_GPO(I2C3_SCL_PIN, HIGH), GPIO_I2C3_SCL },
+ I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL),
+ I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL),
/* I2C4 is a peripheral device only */
};