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* commonlib: Add support for rational number approximationVinod Polimera2022-08-031-0/+22
* treewide: Unify Google brandingJon Murphy2022-07-041-5/+5
* soc/mediatek: pass access mode to the payloadWenbin Mei2022-06-121-1/+2
* commonlib: Clean up compiler.hJulius Werner2022-06-071-4/+0
* commonlib/timestamp_serialized.h: Fix typosElyes Haouas2022-05-281-6/+6
* Treewide: Remove doxygen config files and targetsMartin Roth2022-05-281-2/+1
* coreboot_tables: Add PCIe info to coreboot tableJianjun Wang2022-05-191-0/+9
* commonlib: Add timestamp IDs for Chrome OS hypervisorMattias Nissler2022-05-111-2/+24
* commonlib/coreboot_tables.h: Don't pack structsArthur Heymans2022-04-201-1/+1
* coreboot_tables: Replace 'struct lb_uint64' with lb_uint64_tJianjun Wang2022-04-141-39/+17
* util/cbmem: Add FlameGraph-compatible timestamps outputJakub Czapiga2022-03-311-128/+143
* commonlib/timestamp_serialized: Add timestamp enum to name mappingJakub Czapiga2022-03-301-132/+139
* coreboot_tables.c: Expose the ACPI RSDPArthur Heymans2022-03-091-0/+12
* timestamps: Rename timestamps to make names more consistentJakub Czapiga2022-03-081-132/+132
* console: Add loglevel marker codes to stored consolesJulius Werner2022-02-071-0/+14
* console: Add ANSI escape sequences for highlightingJulius Werner2022-02-071-0/+23
* console: Add loglevel prefix to interactive consolesJulius Werner2022-02-071-0/+23
* commonlib: Add new "CSME ROM started execution" TSBora Guvendik2022-01-211-1/+5
* timestamp: Allow timestamp_add to accept a negative numberBora Guvendik2022-01-211-1/+1
* commonlib: Add new TS for CSE firmware SyncSridhar Siricilla2021-12-201-2/+4
* cbfs: Remove deprecated APIsJulius Werner2021-12-061-75/+0
* region: Rename rdev_readat_full to rdev_read_fullJulius Werner2021-12-031-1/+1
* commonlib: Move commonlib/cbmem_id.h to commonlib/bsd/Jakub Czapiga2021-11-301-156/+0
* commonlib/cbmem_id.h: Add names for some IDsAngel Pons2021-11-251-0/+5
* commonlib/cbmem_id.h: Fix typo in macro nameAngel Pons2021-11-251-2/+2
* drivers/elog/elog: Add timestamps to elog_initRaul E Rangel2021-11-081-0/+4
* commonlib/mem_pool: Allow configuring the alignmentRaul E Rangel2021-11-041-5/+11
* commonlib/region: Add rdev_readat_full helper methodRaul E Rangel2021-11-011-0/+11
* commonlib: Add new TS for IA pre-cpu reset entitiesBora Guvendik2021-11-011-0/+10
* src/acpi to src/lib: Fix spelling errorsMartin Roth2021-10-051-2/+2
* driver/intel/pmc_mux/conn: Move typec_orientation enum to coreboot_tables.hNick Vaccaro2021-10-041-0/+10
* coreboot tables: Add type-c port info to coreboot tableNick Vaccaro2021-10-042-1/+21
* Move post_codes.h to commonlib/console/Ricardo Quesada2021-08-041-0/+433
* commonlib: Add timestamp strings for TS_FSP_MULTI_PHASE_SI_INIT_xSubrata Banik2021-07-291-0/+2
* commonlib/timestamp,amd/common/block/cpu: Add uCode timestampsRaul E Rangel2021-07-211-0/+4
* timestamp,vc/google/chromeos/cr50: Add timestamp for enable updateRaul E Rangel2021-07-051-0/+4
* commonlib: Add Intel-specific timestamps for before/after sending EOPTim Wawrzynczak2021-06-301-0/+4
* nvs: Add Chrome OS NVS (CNVS) information to coreboot tablesFurquan Shaikh2021-06-181-0/+1
* timestamp,amd/common/apob_cache: Add timestamps for APOBRaul E Rangel2021-06-161-2/+10
* ChromeOS: Separate NVS from global GNVSKyösti Mälkki2021-06-141-0/+2
* commonlib/timestamp: Clarify wording on TS_LOAD_PAYLOADRaul E Rangel2021-06-141-1/+1
* drivers/intel/fsp2_0: Add timestamps for loading FSPM & FSPSMartin Roth2021-06-101-0/+6
* src/intel/xeon_sp: add hardware error support (HEST)Rocky Phagura2021-06-041-0/+2
* commonlib/region: Turn addrspace_32bit into a more official APIJulius Werner2021-04-211-4/+9
* soc/mediatek: add new driver 'msdc' for eMMCWenbin Mei2021-04-091-0/+8
* mem_pool: Track the last two allocations (not just one)Julius Werner2021-04-061-11/+17
* cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS coreJulius Werner2021-03-081-5/+3
* acpi: Add support for reporting CrashLog in BERT tableFrancois Toguo2021-02-041-0/+6
* drivers/tpm: Implement full PPIPatrick Rudolph2020-12-212-0/+25
* coreboot tables: Add SPI flash memory map windows to coreboot tablesFurquan Shaikh2020-12-081-0/+14
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