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* i2c/drivers/generic: Add support for including a rotation matrixSean Rhodes2024-02-212-0/+32
| | | | | | | | | | | | | | | | | | | | | The Rotation Matrix allows the specification of a 3x3 matrix representing the orientation of devices, such as accelerometers. Each value in the matrix can be one of -1, 0, or 1, indicating the transformation applied to the device's axes. It is expected by Linux and required for the OS to interpret the data from the device correctly. It is used by various drivers, mainly in `iio/accel`. It was tested on Ubuntu, by rotating the device and verifying the orientation was correct. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id4a940d999a0e300a6fe21269f18bab6e3c0523c Reviewed-on: https://review.coreboot.org/c/coreboot/+/80179 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* drivers: Add SPDX license headers to Kconfig filesMartin Roth2024-02-1830-0/+60
| | | | | | | | Change-Id: Ib27894f0f1e03501583fffb2c759b493d6a7b945 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80588 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* device/device.h: Rename busses for clarityArthur Heymans2024-01-311-2/+2
| | | | | | | | | | This renames bus to upstream and link_list to downstream. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard2024-01-3130-30/+30
| | | | | | | | | | | | | | | | | | | | | | | Macros can be confusing on their own; hiding commas make things worse. This can sometimes be downright misleading. A "good" example would be the code in soc/intel/xeon_sp/spr/chip.c: CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev, This appears as CHIP_NAME() being some struct when in fact these are defining 2 separate members of the same struct. It was decided to remove this macro altogether, as it does not do anything special and incurs a maintenance burden. Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0 Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
* driver/i2c: Rename Makefiles from .inc to .mkMartin Roth2024-01-2433-0/+0
| | | | | | | | | | | | | | | | The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I358b878b97adfd9be156a5dd4a9cbaf9e81bca1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/80078 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
* security/tpm/: turn tis_{init,open} into tis_probeSergii Dmytruk2023-11-135-41/+20
| | | | | | | | | | | | | | | | | init() was always followed by open() and after successful initialization we only need send-receive function which is now returned by tis_probe() on success, thus further reducing number of functions to export from drivers. This also removes check for opening TIS twice that seems to have no value. Change-Id: I52ad8d69d50d449f031c36b15bf70ef07986946c Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76954 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/lenovo_serials: Use buildtime constantsArthur Heymans2023-11-082-6/+3
| | | | | | | | | | | | The coreboot_version global variable just gets filled with the COREBOOT_VERSION macro so there is no reason to use a runtime strconcat. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I3a2be7293d07ac591855ebd784bba350cdffa70f Reviewed-on: https://review.coreboot.org/c/coreboot/+/78945 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* drivers/tpm: Add return codes to TPM driverJon Murphy2023-09-282-10/+10
| | | | | | | | | | | | | | | | Add additional failure mode reporting to the TPM driver to provide additional visibility into what failures are occurring. BUG=b:296439237 TEST=Verify code paths on Skyrim, ensure behavior is unchanged. BRANCH=None Change-Id: I77a653201acf1bddc1ed1e2af701c8d3dd4f0606 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77491 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jan Samek <jan.samek@siemens.com>
* treewide: convert to tpm_result_tJon Murphy2023-09-285-113/+150
| | | | | | | | | | | | | | | | Convert TPM functions to return TPM error codes(referred to as tpm_result_t) values to match the TCG standard. BUG=b:296439237 TEST=build and boot to Skyrim BRANCH=None Change-Id: Ifdf9ff6c2a1f9b938dbb04d245799391115eb6b1 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77666 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* treewide: convert to %#x hex printsJon Murphy2023-09-283-3/+3
| | | | | | | | | | | | | | | Convert hex print values to use the %#x qualifier to print 0x{value}. BUG=b:296439237 TEST=build and boot to Skyrim BRANCH=None Change-Id: I0d1ac4b920530635fb758c5165a6a99c11b414c8 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78183 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/tpm: Make temp test value naming consistentJon Murphy2023-09-181-4/+4
| | | | | | | | | | | | | | | | Make naming convention consistent across all functions return values. BUG=b:296439237 TEST=Boot to OS on Skyrim BRANCH=None Change-Id: If86805b39048800276ab90b7687644ec2a0d4bee Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77536 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* arch to drivers/intel: Fix misspellings & capitalization issuesMartin Roth2023-09-085-7/+7
| | | | | | | | | Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ic52f01d1d5d86334e0fd639b968b5eed43a35f1d Reviewed-on: https://review.coreboot.org/c/coreboot/+/77633 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/sx9310: Set ACPI status to hidden (0xb)Matt DeVillier2023-08-111-1/+1
| | | | | | | | | | | | | | | | | Set the ACPI device status to hidden, since no driver is necessary or available under Windows. Linux is unaffected as it does not use the ACPI device status. TEST=build/boot Win11 on google/akemi Change-Id: Ib1e274084400fa47e483267d331e632ceb5be757 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75178 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers: Add SPDX license headers to MakefilesMartin Roth2023-08-0632-0/+64
| | | | | | | | | | | | | | | | | | | | | | To help identify the licenses of the various files contained in the coreboot source, we've added SPDX headers to the top of all of the .c and .h files. This extends that practice to Makefiles. Any file in the coreboot project without a specific license is bound to the license of the overall coreboot project, GPL Version 2. This patch adds the GPL V2 license identifier to the top of all makefiles in the drivers directory that don't already have an SPDX license line at the top. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8442bc18ce228eca88a084660be84bcd1c5de928 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68980 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tim Crawford <tcrawford@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
* drivers/i2c/generic: Add option to set ACPI subsystem IDMatt DeVillier2023-07-312-0/+3
| | | | | | | | | | Change-Id: I7c9c938bd20d36be8fdfb0d95bb58a7259650693 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* drivers/tpm: Move tis_plat_irq_status to cr50 driverGrzegorz Bernacki2023-07-061-17/+2
| | | | | | | | | | | | | | | | | tis_plat_irq_status() function is used only by Google TPM. It should be moved to drivers/tpm/cr50.c. The name of the function was changed to cr50_plat_irq_status(). BUG=b:277787305 TEST=Build all affected platforms Change-Id: I78dc39f2c7b44232b06947d3dfe6afa52807ced8 Signed-off-by: Grzegorz Bernacki <bernacki@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75917 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* drv/i2c/pi608gp: Fix styleJan Samek2023-06-151-5/+6
| | | | | | | | | | | | | | | | | | | | In commit e59f18bf29a8 ("drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)"), there were some suggestions after it's been already merged. This patch addresses the points regarding the code style and comments. BUG=none TEST=Build OK, no behavioral changes in the pi608gp driver, console logs without changes. Change-Id: I5fc54708e0085fea4bd1f2fbf2afb400d2ccbd46 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* drv/i2c/pi608gp: Fix typesJan Samek2023-06-152-5/+7
| | | | | | | | | | | | | | | | | | | | | | In commit e59f18bf29a8 ("drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)"), there were some suggestions after it's been already merged. This patch addresses the points regarding the number types - fix of the printk format strings, inclusion of 'stdint.h' and marking the set of allowed values as constant. BUG=none TEST=Build OK, no behavioral changes in the pi608gp driver, console logs without changes. Change-Id: I34c664f6a8a257b260facdbf9043825ff4a4c932 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75500 Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
* treewide: Remove 'extern' from functions declarationElyes Haouas2023-05-261-4/+3
| | | | | | | | | | | "extern" is automatically implied with function declaration. Change-Id: Ic40218acab5a009621b6882faacfcac800aaf0b9 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71890 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)Jan Samek2023-05-085-0/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds some of the variety of configuration options exported by the Pericom Inc. PI7C9X2G608GP PCIe switch over its SMBus interface. Currently implemented options are only used to adjust the switch upstream port amplitude and de-emphasis levels in millivolts. Only values specified in the switch datasheet (in tables 6-6 and 6-8) are allowed. Example of a devicetree.cb entry: chip drivers/i2c/pi608gp register "gen2_3p5_enable" = "true" register "gen2_3p5_amp" = "AMP_LVL_MV(425)" register "gen2_3p5_deemph" = \ "DEEMPH_LVL_MV(37, 5)" device i2c 0x6f on ops pi608gp_ops end end Link to the datasheet: https://web.archive.org/web/20210225074853/https://www.diodes.com/assets/Datasheets/PI7C9X2G608GP.pdf BUG=none TEST=Create devicetree.cb and Kconfig entries for this driver in a mainboard containing the switch and verify, that the values read out from the switch config space match the values programmed over the SMBus. Change-Id: Id191c4e97b99da58efd3ba38bf8cca3603ece4d5 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
* vc/google: Decouple DSM_CALIB from CHROMEOSMatt DeVillier2023-05-052-5/+5
| | | | | | | | | | | | | | | | | | | | | | | DSM (Dynamic Speaker Management) uses calibration parameters stored in a VPD (Vital Product Data) FMAP region to configure the audio output via an ACPI _DSD table. This has no dependency on a ChromeOS, and can be used by Linux/Windows drivers if appropriately configured. Remove the dependency of DSM_CALIB (and the calibration file) on CHROMEOS and replace it with VPD, so that non-CHROMEOS builds can utilize this feature as well. Move files from underneath vc/google/chromeos to underscore the point. TEST=build/boot google/nightfury, dump ACPI, verify DSM calibraton parameters present in _DSD table. Change-Id: I643b3581bcc662befc9e30736dae806f94b055af Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74812 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
* Convert literal uses of CONFIG_MAINBOARD_{VENDOR,PART_NUMBER}Kyösti Mälkki2023-05-051-2/+3
| | | | | | | | | | | | Only expand these strings in lib/identity.o. Change-Id: I8732bbeff8cf8a757bf32fdb615b1d0f97584585 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74907 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* treewide: Add missing include guards to chip.hJan Samek2023-04-2817-0/+85
| | | | | | | | | | | | | | Some of the chip.h files in the tree are missing the include guards. This patch adds them in order to avoid potential redefinions of symbols contained in these headers, when they are included multiple times in static.c generated by sconfig. Change-Id: I550a514e72a8dd4db602e7ceffccd81aa36446e3 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* drv/i2c/ptn3460: Add 'mainboard' prefix to mainboard-level callbacksJan Samek2023-03-032-9/+9
| | | | | | | | | | | | | | | | | | | | As discused earlier, the callback name 'mb_adjust_cfg' was considered too generic. The new naming is chosen to be consistent with other drivers' callback names designed to be used at mainboard level. Also other functions, namely 'mb_get_edid' and 'mb_select_edid_table' are renamed accordingly. BUG=none TEST=Builds for siemens/mc_apl{1,4,5,7} and siemens/mc_ehl boards complete successfully. Change-Id: I4cbec0e72e5f03e94df0faa36765d1a6cd873a7a Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* drivers/i2c/nau8825: Fix typo: deboune -> debounceMatt DeVillier2023-02-141-1/+1
| | | | | | | | | | | | Allows Windows/Linux driver to use the proper jack eject debounce time. Credit to coolstar for identifying the issue. Change-Id: I32b94b9285f7c85ff1d67b3d78c845835bbf90d7 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* drv/i2c/ptn3460: Use PTN_EDID_LEN instead of constantJan Samek2023-02-022-2/+2
| | | | | | | | | | | | | | | | | | Contents of the EDID are passed by a reference to an array of length 0x80, for which the macro 'PTN_EDID_LEN' has already been around. This patch makes use of this macro within the driver and mainboard implementation utilizing it. BUG=none TEST=A successful build of mc_apl{1,4,5,7} and mc_ehl3 mainboards. Change-Id: If7d254aaf45d717133bb426bd08f8f9fe5c05962 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72653 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
* drivers/i2c/ptn3460: Use cb_err in mb_adjust_cfgJan Samek2023-01-272-5/+4
| | | | | | | | | | | | | | | | Return generic coreboot error codes from the mb_adjust_cfg callback used in mainboards instead of '-1' constant and a driver-specific success-indicating define. BUG=none TEST=Boards siemens/mc_apl{1,4,5,7} and siemens/mc_ehl3 build correctly. Change-Id: I5e0d4e67703db518ed239a845f43047f569b94ec Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72071 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* drivers/i2c/generic: Drop 'disable_gpio_export_in_crs' flagMatt DeVillier2023-01-152-15/+2
| | | | | | | | | | | | | | | | | | | | | | | Exposing the GPIOs via an ACPI PowerResource and the _CRS results in the OS driver and ACPI thinking they own the GPIO. This can cause timing problems because it's not clear which system should be controlling the GPIO. Previously, we flagged as an error any device which set the 'has_power_resource' flag but did not set 'disable_gpio_export_in_crs.' There's no reason to require explicit disablement however, so drop the superfluous 'disable' flag, and change the _CRS generation to check if the GPIOs will be exported via the 'has_power_resource' flag instead. BUG=b:265055477 TEST=build/boot skyrim, dump SSDT and verify touchscreen GPIOs only listed under PRx, not under _CRS. Change-Id: I837ae6c6fe4b8e1c4e10686406cba06bdb7759d2 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
* drivers/i2c/pca9538/Makefile.inc: Remove unused pathElyes Haouas2023-01-131-4/+0
| | | | | | | | Change-Id: I435837381a966b61081d023447a6e7fdfd9a9348 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* Revert "security/tpm/: turn tis_{init,open} into tis_probe"Sergii Dmytruk2022-12-235-20/+44
| | | | | | | | | | | | | | | This reverts commit d43154486d27323f64334203e9bc8baf08af6845. From CB:68991: This causes CraterLake boot up process to die. Investigation in progress. Change-Id: I4a6c11b0e638a891108fe230bdaea92d5fbca020 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71205 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: siemens-bot Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* mb/siemens/mc_apl7: Init I2C controller before PTN3460 is initializedWerner Zeh2022-12-231-1/+4
| | | | | | | | | | | | | | | | | | | | | | When PTN3460_EARLY_INIT is selected, the PTN3460 (DP-2-LVDS-bridge) will be initialized before all devices are initialized. This is necessary to get a valid EDID data set into the PTN3460 before the graphic controller is initialized in order to be able to show a splash screen. For ptn3460_init() to work properly the I2C bus this bridge is connected to needs to be initialized. As this I2C bus initialization would be done too late in the normal flow, it needs to be called here explicitly before ptn3460_init() to initialize the I2C bus with the needed conditions. Otherwise the default I2C settings of the controller will be used which results in a clock rate too high for this mainboard. Test=Measure I2C bus signals and make sure that the clock is <= 400 kHz. Change-Id: I1775fb7c2d29f765224d0e7c7ff9fcd4dbf847c5 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71226 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* security/tpm/: turn tis_{init,open} into tis_probeSergii Dmytruk2022-12-215-44/+20
| | | | | | | | | | | | | Init was always followed by open and after successful initialization we need only send-receive function, which is now returned by tis_probe on success further reducing number of functions to export from drivers. Change-Id: Ib4ce35ada24e3959ea1a518c29d431b4ae123809 Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68991 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/tpm: splice tpm_vendor_specific structSergii Dmytruk2022-12-214-106/+92
| | | | | | | | | | | | Move `locality` field to `struct tpm_inf_dev` and put the rest directly into `tpm_chip`. Change-Id: Ic3644290963aca9f8dc7cd8ef754352865ef8d2c Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* drivers/i2c/designware: translate return type in dw_i2c_dev_transferFelix Held2022-12-161-1/+1
| | | | | | | | | | | | | | dw_i2c_transfer returns an enum cb_err type, but dw_i2c_dev_transfer returns an int, so explicitly translate between the types. Since dw_i2c_transfer only returns either CB_SUCCESS or CB_ERR which are defined as 0 and -1, this won't change behavior of dw_i2c_dev_transfer. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Iaf2cbcf6564035d5c0fc13f5d5e7ac0d0425e85d Reviewed-on: https://review.coreboot.org/c/coreboot/+/70831 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* drivers/i2c/designware/dw_i2c: handle bus < 0 in dw_i2c_dev_transferFelix Held2022-12-161-1/+6
| | | | | | | | | | | | | | | | dw_i2c_soc_dev_to_bus will return -1 if it failed to find an I2C bus number for a device. In this case return -1 instead of implicitly casting the -1 to an unsigned int and passing that as bus number to dw_i2c_transfer. The dw_i2c_base_address call inside _dw_i2c_transfer already ended up handling this error case correctly, but better handle the error more directly. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I06b6005cee0c5c43855cb5b388a9911fc286c984 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* security/tpm: remove tis_close()Sergii Dmytruk2022-12-055-26/+0
| | | | | | | | | | | | | | | | This function was never called from outside of drivers and src/drivers/pc80/tpm/tis.c was the only one doing it in a questionable way. tpm_vendor_cleanup() also isn't needed as one of tis_close() functions was its only caller. Change-Id: I9df76adfc21fca9fa1d1af7c40635ec0684ceb0f Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
* src/drivers: Remove unnecessary space after castsElyes Haouas2022-11-222-4/+4
| | | | | | | | Change-Id: I16689da893b5a0c3254364759d435281cb3e1caf Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69803 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/rx6110sa/chip.h: Remove confusing bus speed commentJan Samek2022-11-201-1/+1
| | | | | | | | | | | | | | | | | | | | | There is a note about the default I2C speed of this being 400 kHz despite the logic in rx6110sa.c sets the fallback (correctly) to 100 kHz. This information originally comes from the fact the dw_i2c bus controller default speed is 400 kHz. This is irrelevant to the default speed of this device as it can be used with any bus controller. BUG=none TEST=coreboot builds correctly (no functional changes). Change-Id: Ic0ffe5667574c59e1c1df952b84b8a3680b53341 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69545 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/rx6110sa/rx6110sa.c: Make log messages consistentJan Samek2022-11-181-1/+1
| | | | | | | | | | | | | Set the logging message prefix to the device name instead of the device path in order to make the output consistent with other logging messages in this and other drivers. Change-Id: Ib63b93d52aad220d17f1f4ee0d47a949933ec26d Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69718 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
* drivers/i2c/rv3028c7: Add ACPI generation callbacksJan Samek2022-11-183-0/+67
| | | | | | | | | | | | | | | | | | | | | Add ACPI generation callback to the driver after obtaining the ACPI HID "MCRY3028" for this device from Microcrystal AG (VID: "MCRY"). Also add I2C bus speed field to the device config structure, which is a required ACPI entry. BUG=none TEST=Disassemble the SSDT table and see whether the device entry "MC28" is generated correctly. Also check whether the RV3028 driver in Linux (drivers/rtc/rtc-rv-3028.c) is bound correctly after adding an ACPI match table to it containing the HID. A proper kernel patch is pending. Change-Id: I3b8cf5c8dc551439755992ff05b6693e91cc3f21 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* drivers/i2c/designware: Add 100 MHz controller base clockWerner Zeh2022-11-091-0/+7
| | | | | | | | | | | | There are SoCs (for instance Intel Elkhart Lake) that do use 100 MHz as the base clock for I2C controllers. To support them properly add a frequency setting for 100 MHz to the designware I2C controller driver. Change-Id: I9ea11c6a41fd3758b771a416251e108cbe722769 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
* drivers/i2c/sx9324: Add support for Linux's SX9324 driverVictor Ding2022-11-094-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SX9324 driver is updated per Linux's documentation found at https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml Supporting logic for the deprecated SX932x driver is hence guarded by DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER This patch by itself does not introduce functional changes to any board. The legacy SX932x Linux driver never reached upstream Linux and is only available in ChromeOS kernel fork of 4.4 and 5.4. Linux later accepted a different implementation named SX9324 and has been available since 5.4. Ideally all variants should adopt the new driver; however, during the transition phase, coreboot must support both drivers. It is better to have a single firmware build that can work with both Linux kernel drivers by specifying both sets of properties. Legacy driver support should be deleted once all variants finish migration. BUG=b:242662878 TEST=Dump ACPI SSDT then verify _DSD entries related to the legacy SX932x driver are identical w/ and w/o this patch (Tested on Craask and Nivviks) Change-Id: I42cd6841c3a270c242ed2e739db245e858eadb3b Signed-off-by: Victor Ding <victording@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69192 Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* drivers/i2c/generic: Print error when using _CRS and PowerResourceRaul E Rangel2022-11-051-0/+10
| | | | | | | | | | | | | | | | | | Exposing the GPIOs via an ACPI PowerResource and the _CRS results in the OS driver and ACPI thinking they own the GPIO. This can cause timing problems because it's not clear which system should be controlling the GPIO. I'm making this an error because we should really clean these up. BUG=b:210694108 TEST=Boot guybrush and see error: > I2C: 02:5d: ERROR: Exposing GPIOs in Power Resource and _CRS > \_SB.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ifcc42ed81fff295fb168a0b343e96b3a650b1c84 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Van Patten <timvp@google.com>
* drivers/i2c/generic: Tweak error text for missing HIDMatt DeVillier2022-11-031-1/+1
| | | | | | | | | | | | | - drop ERROR prefix since already provided by cbmem log - make error text more clear about cause of error BUG=none Change-Id: I1795aee240a5383b21108c697e930a2e4972a0b4 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69062 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/ptn3460: Add early init optionJan Samek2022-09-222-0/+52
| | | | | | | | | | | | | | | | | | | | Create Kconfig options and boot state machine callback in ramstage for an early initialization of the PTN3460 DP-to-LVDS bridge. This allows showing the bootsplash screen on mainboards utilizing this chip during the PCI device enumeration. BUG=none TEST=Select PTN3460_EARLY_INIT config switch in mainboard Kconfig and check the log for "Attempting PTN3460 early init" message. If the board (e.g. siemens/mc_apl7 in this case) is also configured for showing the bootsplash logo, it should be now visible. Change-Id: I5424d062b3fb63c78cfced3971376353be11c504 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67681 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/i2c/nau8825: Add ADCOUT IO drive strength controlEric Lai2022-09-162-0/+6
| | | | | | | | | | | | | Add a property to control the driving of ADCOUT. BUG=b:234789689 TEST= build passed. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ibbedd5838a795ee645a5458b960062c5530ff3b5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67659 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
* timer: Change timer util functions to 64-bitRob Barnes2022-09-141-2/+2
| | | | | | | | | | | | | | | | | | | | Since mono_time is now 64-bit, the utility functions interfacing with mono_time should also be 64-bit so precision isn't lost. Fixed build errors related to printing the now int64_t result of stopwatch_duration_[m|u]secs in various places. BUG=b:237082996 BRANCH=All TEST=Boot dewatt Change-Id: I169588f5e14285557f2d03270f58f4c07c0154d5 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66170 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
* drivers/i2c: Add a new RTC RV-3028-C7 from Micro CrystalWerner Zeh2022-09-075-0/+289
| | | | | | | | | | | | | | | This patch adds a driver for a new RTC from Micro Crystal. Supported features are: * configure backup voltage switchover via devicetree * configure backup capacitor charging mode via devicetree * set date if a voltage drop on backup voltage was detected to either a user definable (devicetree) or coreboot build date Change-Id: I37176ea726e50e4e74d409488981d7618ecff8bb Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
* drivers/i2c: add MAX98396 driverEric Lai2022-08-174-0/+131
| | | | | | | | | | | | | Add MAX98396 support. BUG=b:232606045 TEST=build passed. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I835b51ea1fcc9363992d43a625f80cb545802fc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66217 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* drivers: Add SPDX identifiers to files missing themMartin Roth2022-08-112-0/+4
| | | | | | | | | | | This adds SPDX identifiers to the remaining source files in the drivers directory that don't already have them. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I97f96de857515214069c3b77f3c781f7f0555c6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/66499 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-14 12:09:23 +0000