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path: root/src/mainboard/google/beltino/romstage.c
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* src: Use 'stdint.h' when appropriateElyes HAOUAS2022-01-011-1/+0
* nb/intel/haswell: Decouple mainboard USB config from MRCAngel Pons2021-03-251-2/+2
* nb/intel/haswell: Use unshifted SPD addresses in mainboardsAngel Pons2021-03-231-2/+2
* nb/intel/haswell: Consolidate memory-down SPD handlingAngel Pons2021-03-191-3/+3
* haswell boards: Correct USB config indentationAngel Pons2021-02-121-26/+26
* haswell: Drop `mainboard_fill_pei_data`Angel Pons2021-02-121-8/+2
* haswell: Move some MRC settings to devicetreeAngel Pons2020-07-121-4/+0
* haswell: Add function to retrieve SPD addressesAngel Pons2020-07-121-2/+7
* haswell: Automatically determine system typeAngel Pons2020-07-121-1/+0
* haswell: Introduce ENABLE_DDR_2X_REFRESH Kconfig optionAngel Pons2020-07-121-2/+0
* haswell boards: Drop unused romstage.c includesAngel Pons2020-07-121-3/+0
* haswell: Factor out `max_ddr3_freq`Angel Pons2020-07-121-1/+0
* haswell: Compute disabled channel masks at runtimeAngel Pons2020-07-121-8/+0
* mb/google/beltino: Factor out common MRC settingsAngel Pons2020-07-121-54/+46
* haswell: Relocate `mainboard_romstage_entry` to northbridgeAngel Pons2020-07-121-5/+3
* haswell boards: Fix writes to 16-bit DxxIR registersAngel Pons2020-07-121-8/+8
* haswell: Drop `struct romstage_params` typeAngel Pons2020-07-121-5/+1
* mb/google/beltino: Move Super I/O init to bootblockAngel Pons2020-07-111-12/+0
* haswell: Drop GPIO indirection layersAngel Pons2020-07-091-3/+0
* mb/google/beltino: Put GPIOs in a C fileAngel Pons2020-07-091-1/+2
* haswell: Turn RCBA configuration into a functionAngel Pons2020-07-091-23/+20
* sb/intel/lynxpoint: Factor out RCBA Function DisableAngel Pons2020-07-081-3/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* nb/intel/haswell: Deprecate WDB params in pei_dataAngel Pons2020-04-221-2/+0
* mb/google/beltino: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* mainboard/google: Remove copyright noticesPatrick Georgi2020-03-181-2/+0
* mainboard/google: Remove unused include <stdlib.h>Elyes HAOUAS2019-11-281-1/+0
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+1
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-2/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki2019-03-061-1/+1
* src: Remove unneeded include <cbfs.h>Elyes HAOUAS2018-11-161-1/+0
* mainboard: Remove unneeded include <console/console.h>Elyes HAOUAS2018-11-051-1/+0
* cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans2018-06-141-0/+1
* mb/superio: Rename global control devices as SUPERIO_DEVElyes HAOUAS2018-05-081-1/+1
* Add Haswell Chromeboxes/Chromebase using variant board schemeMatt DeVillier2016-11-241-0/+149
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