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* mb/siemens/mc_ehl: Remove spd.bin from CBFSWerner Zeh2022-10-2910-172/+1
* mb/siemens/mc_apl2: Enable early POST through NC_FPGAJan Samek2022-10-273-0/+28
* mb/siemens/mc_ehl1: Disable L1 prefetcherWerner Zeh2022-10-251-0/+3
* mb/siemens/mc_ehl: Add FIVR config to devicetree for all variantsWerner Zeh2022-10-222-0/+12
* mb/siemens/mc_apl*: Enable early PCI bridge before FSP-MAngel Pons2022-10-221-0/+23
* mb/siemens/mc_ehl2: Use preset driver strength for SD-CardMario Scheithauer2022-10-071-0/+8
* mb/siemens/mc_apl7: Enable libgfxinit for the boardJan Samek2022-09-223-0/+17
* mb/siemens/mc_apl7/Kconfig: Enable PTN3460 early initJan Samek2022-09-221-0/+4
* mb/siemens/mc_apl1: Do not wait for legacy devices on mc_apl7Werner Zeh2022-09-191-1/+1
* mb/siemens/mc_ehl2: Limit SD-Card speed modes to DDR50Werner Zeh2022-09-071-0/+24
* mb/siemens/mc_ehl2: Set I2C bus 1 speed to 100 kHzWerner Zeh2022-09-071-0/+3
* mb/siemens/mc_ehl2: Change to new RTC RV3028-C7Werner Zeh2022-09-072-10/+7
* mb/siemens/mc_ehl: Move RTC Kconfig option to variant levelWerner Zeh2022-09-073-1/+2
* mb/**/dsdt.asl: Drop misleading "OEM revision" commentAngel Pons2022-08-163-3/+3
* mb/**/dsdt.asl: Drop superfluous commentsAngel Pons2022-08-162-8/+0
* mb/siemens/mc_apl7: Disable VBOOT and TPMUwe Poeche2022-06-272-22/+2
* mb/siemens/mc_apl1: Add new mainboard variant mc_apl7Uwe Poeche2022-06-238-0/+683
* soc/intel/apollolake: Hook Up SataPortEnable to devicetreeSean Rhodes2022-06-206-0/+12
* soc/intel/cannonlake: Hook up FSP hyper-threading setting to option APIFelix Singer2022-05-261-2/+0
* mb/siemens/mc_ehl: Disable RAPLUwe Poeche2022-05-231-0/+1
* mb/siemens/mc_ehl2: Invert PHY IRQ from falling edge to rising edgeMario Scheithauer2022-05-211-0/+3
* mb/siemens/mc_ehl2: Quick fix for PSE TSN phy interface typeLean Sheng Tan2022-05-201-2/+0
* intel/common/block: Provide RAPL and min clock ratio switches in commonUwe Poeche2022-05-185-5/+5
* mainboard/**/devicetree.cb: Fix typoAngel Pons2022-05-172-2/+2
* soc/intel/elkhartlake: Enable SMBus depending on dev stateAngel Pons2022-05-172-2/+0
* mb/siemens/mc_ehl2: Disable PCI clock outputs on XIO bridgeMario Scheithauer2022-05-171-0/+8
* mb/siemens/mc_ehl2: Enable TSN GbE driverMario Scheithauer2022-05-161-0/+1
* mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetreeMario Scheithauer2022-05-161-1/+1
* mb/siemens/mc_ehl2: Adjust PSE TSN settings in devicetreeMario Scheithauer2022-05-161-0/+4
* tpm: Refactor TPM Kconfig dimensionsJes B. Klinke2022-04-216-6/+6
* mb/siemens/mc_ehl: Increase SPD buffer size to 512 bytesWerner Zeh2022-03-141-2/+2
* src: Make PCI ID define names shorterFelix Singer2022-03-077-17/+17
* mb/siemens/mc_ehl: Disable HS400 mode for eMMCWerner Zeh2022-03-022-2/+2
* mb/siemens/mc_apl2: Enable PCI device for I2C bus 0Werner Zeh2022-02-221-1/+1
* mb/siemens/mc_apl{2,4,5,6}: Enable recovery MRC cacheWerner Zeh2022-02-124-0/+4
* mb/siemens/mc_ehl2: Disable PCIe RPsMario Scheithauer2022-02-031-16/+4
* mb/siemens/mc_ehl2: Disable SATAMario Scheithauer2022-02-031-9/+1
* mb/siemens/{mc_apl1,...,mc_apl6}: Disable SATA ALPM supportMario Scheithauer2022-02-016-6/+18
* mb/siemens/mc_ehl: Prevent reset when TCO expiresWerner Zeh2022-01-251-0/+3
* soc/intel/ehl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik2022-01-212-6/+0
* src/mainboard/{siemens,starlabs}: Remove unused <console/console.h>Elyes HAOUAS2022-01-101-1/+0
* mb: Add space before closing comment block keywordPaul Menzel2021-12-231-1/+1
* mb/siemens/chili: Reuse options from Kconfig.nameFelix Singer2021-12-182-6/+2
* mb/siemens/mc_ehl: Enable TPM in bootblockWerner Zeh2021-12-101-0/+1
* mb/siemens/mc_ehl1: Send POST codes to NC FPGA via PCIWerner Zeh2021-11-173-0/+28
* mb/siemens/mc_ehl2: Adjust PCIe clock source settings in devicetreeMario Scheithauer2021-11-151-2/+2
* mb/siemens/mc_ehl: Disable HECI #2 deviceMario Scheithauer2021-11-152-2/+0
* treewide: Replace bad uses of `find_resource`Angel Pons2021-11-041-1/+1
* mb/siemens/mc_ehl: Disable PMC low power modesWerner Zeh2021-11-041-0/+5
* mb/siemens/mc_ehl: Disable all P-StatesWerner Zeh2021-11-041-0/+3
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