summaryrefslogtreecommitdiffstats
path: root/src/northbridge/intel/pineview/memmap.c
Commit message (Expand)AuthorAgeFilesLines
* cbmem_top_chipset: Change the return value to uintptr_tElyes Haouas2022-11-181-2/+2
* nb/intel: Add missing <types.h>Elyes HAOUAS2021-02-161-1/+1
* nb/intel/pineview: Define and use MMCONF_BUS_NUMBERAngel Pons2021-01-301-37/+0
* src/northbridge: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* nb/intel/pineview: Refactor `decode_pcie_bar`Angel Pons2020-08-041-9/+5
* nb/intel/pineview: Change signature of `decode_pciebar`Angel Pons2020-08-041-1/+1
* nb/intel/pineview: Use `MiB` definitionAngel Pons2020-08-041-4/+5
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-051-13/+2
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-2/+0
* nb/intel/pineview: Clean up code and commentsAngel Pons2020-03-151-22/+17
* src: capitalize 'RAM'Elyes HAOUAS2020-02-241-2/+2
* lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans2019-11-011-1/+1
* intel/smm/gen1: Use smm_subregion()Kyösti Mälkki2019-08-281-10/+6
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+0
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-1/+1
* intel/smm/gen1: Rename header fileKyösti Mälkki2019-08-151-1/+1
* arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki2019-08-151-7/+0
* cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki2019-08-151-15/+5
* northbridge/intel: Rename ram_calc.c to memmap.cKyösti Mälkki2019-08-071-0/+182
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-27 02:04:19 +0000