coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/common/include/espi: add more decode ranges	Felix Held	2022-08-17	1	-1/+9
*	mb/google/{zork,guybrush,skyrim},soc/amd/espi: Fix vw_irq_polarity	Raul E Rangel	2022-08-10	1	-7/+37
*	soc/amd/common/include/espi: reduce visibility of IO/MMIO decode defines	Felix Held	2022-05-06	1	-17/+1
*	soc/amd/common/include/espi: generalize IO/MMIO decode range macros	Felix Held	2022-05-06	1	-4/+4
*	soc/amd/common/block/include/espi: rename IO/MMIO base/size registers	Felix Held	2022-02-11	1	-14/+14
*	soc/amd/common/block/espi: use lower case hex digits in definitions	Felix Held	2022-01-07	1	-1/+1
*	soc/amd/common/lpc/espi_util: use enum cb_err type for return values	Felix Held	2021-12-20	1	-8/+4
*	soc/amd/common: move configure_espi_with_mb_hook implementation	Felix Held	2021-10-15	1	-5/+1
*	soc/amd: make configure_espi_with_mb_hook call conditional	Felix Held	2021-10-15	1	-6/+2
*	soc/amd/common/include/espi: rename configure_espi	Felix Held	2021-10-15	1	-1/+1
*	soc/amd/common/block/espi_util: Refactor eSPI Setup	Karthikeyan Ramasubramanian	2021-10-13	1	-0/+11
*	soc/amd/cezanne: Add call to mb to configure eSPI requirements	Martin Roth	2021-06-28	1	-0/+3
*	soc/amd/common/espi,mb/: Allow configuring open drain ALERT#	Raul E Rangel	2021-05-06	1	-1/+7
*	soc/amd/common: Add some ESPI register definitions	Martin Roth	2021-04-05	1	-5/+15
*	soc/amd: Make espi_clear_decodes private	Raul E Rangel	2021-04-05	1	-7/+0
*	soc/amd: Make espi_configure_decodes private	Raul E Rangel	2021-04-05	1	-6/+0
*	soc/amd/common: Add func to clear eSPI IO & memory decode ranges	Martin Roth	2021-04-05	1	-0/+7
*	soc/amd/common/block: drop double underscores from include guards	Felix Held	2020-11-16	1	-3/+3
*	soc/amd/common/block/include: make include guards more uniform	Felix Held	2020-11-13	1	-3/+3
*	soc/amd/common: fix eSPI virtual wire polarity encoding	Aaron Durbin	2020-07-03	1	-8/+5
*	soc/amd/common/block: Add support for configuring eSPI connection to slave	Furquan Shaikh	2020-05-13	1	-0/+61
*	Remove new additions of "this file is part of" lines	Furquan Shaikh	2020-05-13	1	-1/+0
*	soc/amd/common/block/lpc: Provide an option to use static eSPI BAR	Furquan Shaikh	2020-05-12	1	-0/+6
*	soc/amd/common/block/lpc: Add helpers for managing eSPI decode	Furquan Shaikh	2020-05-12	1	-0/+31
*	soc/amd/common/block: Add header file for eSPI register definitions	Furquan Shaikh	2020-05-12	1	-0/+27