| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | baytrail: Change all SoC headers to <soc/headername.h> system | Julius Werner | 2015-04-07 | 1 | -8/+8 |
| * | baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU | Kein Yuan | 2015-04-02 | 1 | -0/+9 |
| * | ACPI: Get S3 resume state from romstage_handoff | Kyösti Mälkki | 2015-03-10 | 1 | -2/+2 |
| * | rambi/baytrail: ACPI, GPIO, audio, misc updates | Shawn Nematbakhsh | 2014-09-18 | 1 | -9/+33 |
| * | baytrail: utilize reg_script_run_on_dev() | Aaron Durbin | 2014-05-10 | 1 | -7/+4 |
| * | baytrail: Fix XHCI problems and re-enable | Duncan Laurie | 2014-04-30 | 1 | -4/+7 |
| * | baytrail: Add XHCI initialization | Duncan Laurie | 2014-03-11 | 1 | -0/+226 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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