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path: root/src/soc/intel/common/block/spi
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya2021-01-221-0/+4
* soc/intel/common: Include Alder Lake device IDsSubrata Banik2020-08-051-0/+16
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath2020-02-251-4/+4
* soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng2020-01-221-0/+4
* soc/intel/common: Add PCI device IDs for CMP-HGaggery Tsai2019-12-131-0/+4
* soc/intel/common: Add Jasperlake Device IDsrkanabar2019-12-101-0/+4
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-051-0/+8
* soc/intel/skylake: Add Lewisburg family PCH supportMaxim Polyakov2019-09-061-0/+2
* soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan2019-07-171-0/+4
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* soc/intel/common: Include cometlake PCH IDsRonak Kanabar2019-02-261-0/+4
* soc/{amd,intel}: Remove needless '&' on function pointersElyes HAOUAS2019-01-231-4/+4
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+4
* soc/intel/common/block: Add option to have subsystem_id in common pci driverSubrata Banik2017-12-131-0/+1
* soc/intel/common/block: Add Intel common SPI supportSubrata Banik2017-11-113-0/+93
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