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path: root/src/soc/intel/icelake
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* soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner2021-10-171-0/+9
* soc/intel: implement ACPI timer disabling per SoC and drop common codeMichael Niewöhner2021-10-172-2/+1
* soc/intel: move disabling of PM Timer to SoC PMC codeMichael Niewöhner2021-10-172-9/+9
* soc/intel: deduplicate acpi_fill_soc_wakeMichael Niewöhner2021-10-171-15/+0
* soc/intel: replace dt option PmTimerDisabled by KconfigMichael Niewöhner2021-10-123-11/+4
* soc/intel/*/cpu.c: Add missing space in commentAngel Pons2021-10-121-1/+1
* soc/intel: Drop unnecessary `select REG_SCRIPT`Angel Pons2021-09-291-1/+0
* soc/intel/icelake: correct wrong gpio SMI register base offsetsMichael Niewöhner2021-09-231-2/+2
* soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registersMichael Niewöhner2021-09-232-0/+12
* soc/intel/icl: add missing gpio group to fix the group indexesMichael Niewöhner2021-09-232-41/+50
* soc/intel/icelake: Clear RTC_BATTERY_DEADTim Wawrzynczak2021-09-201-2/+18
* cpu/x86/tsc: Deduplicate Makefile logicAngel Pons2021-09-081-1/+0
* Move post_codes.h to commonlib/console/Ricardo Quesada2021-08-041-3/+3
* soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes2021-08-031-2/+5
* src/*: Specify type of `CBFS_SIZE` onceAngel Pons2021-07-261-1/+0
* soc/intel/icelake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik2021-07-172-2/+1
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* soc/intel: Refactor `xdci_can_enable()` functionAngel Pons2021-07-011-4/+1
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* soc/intel: Drop casts around `soc_read_pmc_base()`Angel Pons2021-06-281-2/+1
* soc/intel/icelake: Use devfn_disable() function for XDCISubrata Banik2021-06-231-4/+2
* soc/intel/icelake: Make use of is_devfn_enabled() functionSubrata Banik2021-06-232-43/+15
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* soc/intel: Drop unused lpss functionsFurquan Shaikh2021-06-071-22/+0
* cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans2021-05-181-1/+0
* src: Match array format in function declarations and definitionsPatrick Georgi2021-05-131-1/+1
* soc/intel: Replace open-coded buffer length calculationAngel Pons2021-04-211-4/+2
* soc/intel: Fix typo in commentAngel Pons2021-04-211-1/+1
* soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.cAngel Pons2021-04-213-18/+17
* soc/intel/{cannonlake,icelake}: Drop unhooked `SendVrMbxCmd`Angel Pons2021-04-081-7/+0
* soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPDAngel Pons2021-04-081-2/+2
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-272-1/+6
* soc/intel: Drop unused `GPIO_NUM_GROUPS` macroAngel Pons2021-03-201-1/+0
* soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner2021-03-121-34/+6
* soc/intel: Factor out common smmrelocate.cAngel Pons2021-03-033-251/+1
* soc/intel: Retype `CnviBtAudioOffload` devicetree optionAngel Pons2021-03-031-5/+1
* soc/intel: Backport SMRR locking supportAngel Pons2021-03-031-0/+17
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-014-21/+2
* soc/intel: Drop `romstage_pch_init()` functionAngel Pons2021-03-014-14/+3
* soc/intel/{skl,icl}: Move tco_configure() to bootblockAngel Pons2021-03-012-4/+4
* soc/intel/icelake: Rename `pch_init()` functionAngel Pons2021-03-016-6/+6
* soc/intel: Factor out common smbus.hAngel Pons2021-03-011-22/+3
* soc/intel: Factor out common gpe.hAngel Pons2021-03-011-114/+1
* soc/intel: Include gfx.asl from northbridgeAngel Pons2021-03-011-3/+0
* soc/intel/*/smmrelocate.c: Sync includesAngel Pons2021-02-241-8/+8
* soc/intel/*/smmrelocate.c: Uniformize cosmeticsAngel Pons2021-02-241-2/+1
* soc/intel/{cnl,icl}: Use matching type castAngel Pons2021-02-241-1/+1
* soc/intel/*/pmutil.c: Align cosmetics across platformsAngel Pons2021-02-241-8/+5
* vc/google/chromeos: Always use CHROMEOS_RAMOOPS_DYNAMICKyösti Mälkki2021-02-161-3/+0
* ACPI: Add acpi_reset_gnvs_for_wake()Kyösti Mälkki2021-02-161-3/+0
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