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path: root/src/soc/intel/tigerlake
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* arch/x86: factor out and commonize HPET_BASE_ADDRESS definitionFelix Held2022-02-251-2/+0
* drivers/fsp/fsp2_0: Rework FSP Notify Phase API configsSubrata Banik2022-02-181-1/+4
* soc/intel/*/pmc: Add `finalize` operation for pmcSubrata Banik2022-02-151-0/+17
* treewide: Remove "ERROR: "/"WARN: " prefixes from log messagesJulius Werner2022-02-071-1/+1
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-3/+0
* soc/intel/tigerlake: Use PMC IPC to disable HECI1Subrata Banik2022-02-023-15/+4
* soc/intel/common/cse: Rework heci_disable functionSubrata Banik2022-02-021-1/+1
* soc/intel: Abstract the common block API for TCSS registers accessJohn Zhao2022-01-281-0/+2
* soc/intel/common/cpu: Use SoC overrides to get CPU privilege levelSubrata Banik2022-01-192-1/+11
* soc/intel/tgl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik2022-01-142-9/+1
* soc/intel/tigerlake: add devicetree option PcieRpSlotImplementedMichael Niewöhner2022-01-142-0/+3
* soc/intel/tgl: deduplicate the PCIe root port mapMichael Niewöhner2022-01-141-17/+2
* soc/intel/tgl/pcie_rp: add TGL-H supportMichael Niewöhner2022-01-141-1/+18
* soc/intel/tigerlake: Implement function to map physical port to EC portjzhao802022-01-122-0/+33
* soc/intel/tgl/pcie_rp: correct root port mapMichael Niewöhner2022-01-121-2/+1
* src/soc/intel: Remove unused <console/console.h>Elyes HAOUAS2022-01-101-1/+0
* soc/intel/{icl,tgl,jsl,ehl}: enable ACPI CPPC entriesMichael Niewöhner2022-01-091-0/+1
* soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() functionTim Wawrzynczak2022-01-061-0/+21
* src/soc/intel: Remove unused <delay.h>Elyes HAOUAS2022-01-051-1/+0
* soc/intel: Remove unused <string.h>Elyes HAOUAS2022-01-051-1/+0
* soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_modeSubrata Banik2022-01-022-3/+3
* soc/intel/tigerlake/fsp_params.c: Use `is_dev_enabled()`Felix Singer2022-01-011-4/+1
* src: Drop duplicated includesElyes HAOUAS2022-01-012-3/+0
* soc/intel/common: Do not trigger crashlog on all resets by defaultCurtis Chen2021-12-201-7/+0
* soc/intel/tigerlake: Define soc_get_pcie_rp_typeTim Wawrzynczak2021-12-132-0/+52
* soc/intel/tigerlake: Hook up DPTF device to devicetreeFelix Singer2021-12-092-3/+1
* soc/intel/tigerlake: Drop unused SataEnable settingFelix Singer2021-12-091-1/+0
* soc/intel/tigerlake: Hook up SMBus device to devicetreeFelix Singer2021-12-092-4/+1
* soc/intel/{adl,ehl,jsl,tgl}: Remove unused header `thermal.h`Subrata Banik2021-11-221-1/+0
* soc/intel/tigerlake: Add config option for S3 ACPISean Rhodes2021-11-155-123/+186
* soc/intel/tigerlake/apci: Only use SCM for ChromeOSSean Rhodes2021-11-151-0/+7
* Rename ECAM-specific MMCONF KconfigsShelley Chen2021-11-102-2/+2
* soc/intel: drop Kconfig `PM_ACPI_TIMER_OPTIONAL`Michael Niewöhner2021-11-081-1/+0
* soc/intel: Update api name for getting spi destination idWonkyu Kim2021-10-262-12/+7
* cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held2021-10-261-1/+0
* cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held2021-10-251-1/+0
* arch/x86/ioapic: Select IOAPIC with SMPKyösti Mälkki2021-10-221-1/+0
* cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held2021-10-221-2/+2
* cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held2021-10-211-1/+2
* soc/intel: Constify `soc_get_cstate_map()`Angel Pons2021-10-191-1/+1
* soc/intel/*/acpi.c: Don't copy structs with `memcpy()`Angel Pons2021-10-191-1/+1
* intel/tigerlake: Add missing IRQ for CNViSean Rhodes2021-10-181-0/+1
* soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner2021-10-171-0/+9
* soc/intel: implement ACPI timer disabling per SoC and drop common codeMichael Niewöhner2021-10-172-2/+1
* soc/intel: move disabling of PM Timer to SoC PMC codeMichael Niewöhner2021-10-172-9/+9
* soc/intel: deduplicate acpi_fill_soc_wakeMichael Niewöhner2021-10-171-15/+0
* soc/intel: replace dt option PmTimerDisabled by KconfigMichael Niewöhner2021-10-123-10/+3
* soc/intel/*/cpu.c: Add missing space in commentAngel Pons2021-10-121-1/+1
* soc/intel/tigerlake: Add ACPI addition for USB4/TBT latency optimizationJohn Zhao2021-10-111-0/+59
* soc/intel/tigerlake: Hook up GMA ACPI brightness controlsTim Crawford2021-10-074-0/+28
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