index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
Commit message (
Expand
)
Author
Age
Files
Lines
*
intel/fsp_baytrail: Fix SPI debugging
David Imhoff
2015-05-04
1
-6
/
+6
*
intel: Correct MMIO related ACPI table settings
Dave Frodin
2015-05-01
3
-9
/
+12
*
intel/broadwell: Allow using non-fake IFD descriptor
Patrick Georgi
2015-04-30
1
-1
/
+1
*
intel/broadwell: bootstate mechanism only exists in ramstage
Patrick Georgi
2015-04-30
1
-0
/
+2
*
intel/broadwell: Don't select MONOTONIC_TIMER_MSR
Patrick Georgi
2015-04-30
1
-6
/
+0
*
intel/broadwell: Build monotonic timer driver for SMM
Patrick Georgi
2015-04-30
1
-0
/
+1
*
chromeos: Add missing headers
Patrick Georgi
2015-04-30
1
-0
/
+1
*
kbuild: Don't require intel/common changes for every soc
Stefan Reinauer
2015-04-30
4
-1
/
+8
*
kbuild: automatically include SOCs
Stefan Reinauer
2015-04-29
5
-5
/
+17
*
fsp platforms: consolidate FspNotify calls
Martin Roth
2015-04-28
1
-20
/
+0
*
intel/fsp_baytrail: Fix default SMM_TSEG_SIZE value
David Imhoff
2015-04-27
1
-1
/
+1
*
fsp: Move fsp to fsp1_0
Marc Jones
2015-04-24
8
-8
/
+8
*
intel/broadwell: guard CHROMEOS support better
Patrick Georgi
2015-04-22
1
-2
/
+2
*
coreboot: common stage cache
Aaron Durbin
2015-04-22
8
-125
/
+42
*
broadwell: Clear USB3.0 PORTSC status bits in sleep_prepare.
Todd Broch
2015-04-21
1
-0
/
+9
*
broadwell: indent xhci code
Patrick Georgi
2015-04-21
1
-17
/
+17
*
broadwell: Skip pre-graphics delay in resume path
Duncan Laurie
2015-04-21
1
-4
/
+7
*
broadwell: Implement Recovery Button
Ryan Lin
2015-04-21
1
-0
/
+4
*
broadwell: Set C9/C10 vccmin
Duncan Laurie
2015-04-18
2
-0
/
+25
*
broadwell: Disable XHCI compliance mode entry
Duncan Laurie
2015-04-18
1
-0
/
+19
*
soc/intel/common: Add common reset code
Lee Leahy
2015-04-18
3
-0
/
+60
*
soc/intel/common: Add function to protect MRC cache
Duncan Laurie
2015-04-18
4
-0
/
+75
*
broadwell: add ROM stage pre console init call back
Wenkai Du
2015-04-18
2
-0
/
+7
*
broadwell: Fixes for _SWS support
Duncan Laurie
2015-04-15
3
-23
/
+23
*
broadwell: Remove unused bootblock code
Duncan Laurie
2015-04-15
1
-15
/
+0
*
broadwell: Clean up ME device and add new ME10 flow
Duncan Laurie
2015-04-15
4
-148
/
+215
*
soc/baytrail: Use microcode from the blobs repository
Marc Jones
2015-04-15
3
-16322
/
+1
*
soc/broadwell: Use microcode from the blobs repository
Marc Jones
2015-04-15
6
-4254
/
+1
*
broadwell: Remove TPM device from lpc.asl
Duncan Laurie
2015-04-14
3
-26
/
+3
*
broadwell: Work around VBIOS framebuffer issue
Duncan Laurie
2015-04-13
1
-0
/
+9
*
broadwell: Fix incorrect SATA port map mask
Wenkai Du
2015-04-13
1
-3
/
+3
*
broadwell: Enable double self refresh by default
Duncan Laurie
2015-04-13
1
-0
/
+1
*
baytrail: correct NC pin to GPO pin according to BYT platform design guide
Kane Chen
2015-04-10
1
-1
/
+1
*
broadwell: Correct XHCI offset for USB 3.0 ports
Julius Werner
2015-04-10
1
-1
/
+1
*
broadwell: Set PCIe replay timeout to 0xD
Duncan Laurie
2015-04-10
1
-1
/
+1
*
baytrail: add code for supporting 2x ddr refresh rate
Kane Chen
2015-04-10
2
-0
/
+14
*
broadwell: Add configuration for tuning VR for C-state operations
Duncan Laurie
2015-04-10
2
-4
/
+38
*
broadwell: Preserve VbNv around cmos_init
Duncan Laurie
2015-04-10
1
-0
/
+27
*
broadwell: Add function to apply PRR to a range of SPI flash
Duncan Laurie
2015-04-10
3
-0
/
+50
*
broadwell: Turn off panel backlight in S5 SMI handler
Duncan Laurie
2015-04-10
1
-0
/
+43
*
broadwell: Skip steps when disabling PCIe port
Duncan Laurie
2015-04-10
1
-2
/
+2
*
broadwell: Remove XHCI workarounds on WPT
Duncan Laurie
2015-04-10
1
-22
/
+46
*
broadwell: Only do pre-graphics delay when running option rom
Duncan Laurie
2015-04-10
1
-0
/
+7
*
broadwell: Fix PCIe ports programming sequences to enable HSIOPC
Wenkai Du
2015-04-10
2
-5
/
+33
*
broadwell: Update SATA Gen3 TX adjustment registers
Duncan Laurie
2015-04-10
2
-6
/
+18
*
broadwell: Add a few bits to finalize step
Duncan Laurie
2015-04-10
1
-0
/
+3
*
baytrail: fix the coding error on PCIe L1 exit latency
Kevin L Lee
2015-04-10
1
-1
/
+1
*
Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 ms
Kevin Hsieh
2015-04-10
1
-1
/
+14
*
Broadwell: Set boot_mode of pei_data before running reference code
Kenji Chen
2015-04-10
1
-1
/
+4
*
broadwell: Increase I2C SDA hold timing to 300ns
Chiranjeevi Rapolu
2015-04-10
1
-4
/
+4
[next]