diff options
| author | Chao Li <lichao@loongson.cn> | 2024-01-03 10:27:56 +0800 |
|---|---|---|
| committer | Liming Gao <gaoliming@byosoft.com.cn> | 2024-02-06 23:51:47 +0800 |
| commit | e5b50731539a419421ffe330dc3222d6a1d73c3d (patch) | |
| tree | 1136977e0c7d399cd7773db33d166ef821149f79 | |
| parent | 9e1576bc10e6de364fbb285985cafc2ef403da74 (diff) | |
| download | edk2-e5b50731539a419421ffe330dc3222d6a1d73c3d.tar.gz edk2-e5b50731539a419421ffe330dc3222d6a1d73c3d.tar.bz2 edk2-e5b50731539a419421ffe330dc3222d6a1d73c3d.zip | |
MdePkg: Add LoongArch64 FPU function set into BaseCpuLib
Adding InitializeFloatingPointUnits, EnableFloatingPointUnits and
DisableFloatingPointUnits functions for LoongArch64.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
| -rw-r--r-- | MdePkg/Include/Library/CpuLib.h | 43 | ||||
| -rw-r--r-- | MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 | ||||
| -rw-r--r-- | MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S | 17 | ||||
| -rw-r--r-- | MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S | 17 | ||||
| -rw-r--r-- | MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S | 51 |
5 files changed, 128 insertions, 7 deletions
diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h index 3f29937dc7..27f3f82ab9 100644 --- a/MdePkg/Include/Library/CpuLib.h +++ b/MdePkg/Include/Library/CpuLib.h @@ -8,6 +8,7 @@ As a result, these services could not be defined in the Base Library.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -41,14 +42,16 @@ CpuFlushTlb ( VOID
);
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (MDE_CPU_LOONGARCH64)
/**
+ Initialize the CPU floating point units.
+
Initializes floating point units for requirement of UEFI specification.
- This function initializes floating-point control word to 0x027F (all exceptions
- masked,double-precision, round-to-nearest) and multimedia-extensions control word
- (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
- for masked underflow).
+ For IA32 and X64, this function initializes floating-point control word to 0x027F
+ (all exceptions masked,double-precision, round-to-nearest) and multimedia-extensions
+ control word (if supported) to 0x1F80 (all exceptions masked, round-to-nearest,
+ flush to zero for masked underflow).
**/
VOID
EFIAPI
@@ -56,6 +59,10 @@ InitializeFloatingPointUnits ( VOID
);
+#endif
+
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+
/**
Determine if the standard CPU signature is "AuthenticAMD".
@retval TRUE The CPU signature matches.
@@ -89,4 +96,30 @@ GetCpuSteppingId ( #endif
+#if defined (MDE_CPU_LOONGARCH64)
+
+/**
+ Enable the CPU floating point units.
+
+ Enable the CPU floating point units.
+**/
+VOID
+EFIAPI
+EnableFloatingPointUnits (
+ VOID
+ );
+
+/**
+ Disable the CPU floating point units.
+
+ Disable the CPU floating point units.
+**/
+VOID
+EFIAPI
+DisableFloatingPointUnits (
+ VOID
+ );
+
+#endif
+
#endif
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf index 9a162afe6d..89f6272f11 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -65,8 +65,11 @@ RiscV/Cpu.S
[Sources.LOONGARCH64]
- LoongArch/CpuFlushTlb.S | GCC
- LoongArch/CpuSleep.S | GCC
+ LoongArch/CpuFlushTlb.S | GCC
+ LoongArch/CpuSleep.S | GCC
+ LoongArch/InitializeFpu.S | GCC
+ LoongArch/EnableFpu.S | GCC
+ LoongArch/DisableFpu.S | GCC
[Packages]
MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S b/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S new file mode 100644 index 0000000000..33c6bf3411 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S @@ -0,0 +1,17 @@ +#------------------------------------------------------------------------------
+#
+# DisableFloatingPointUnits() for LoongArch64
+#
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(DisableFloatingPointUnits)
+
+ASM_PFX(DisableFloatingPointUnits):
+ li.w $t0, 0x1
+ csrxchg $zero, $t0, 0x2
+
+ jirl $zero, $ra, 0
+ .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S b/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S new file mode 100644 index 0000000000..3e4f7411f1 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S @@ -0,0 +1,17 @@ +#------------------------------------------------------------------------------
+#
+# EnableFloatingPointUnits() for LoongArch64
+#
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(EnableFloatingPointUnits)
+
+ASM_PFX(EnableFloatingPointUnits):
+ li.w $t0, 0x1
+ csrxchg $t0, $t0, 0x2
+
+ jirl $zero, $ra, 0
+ .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S b/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S new file mode 100644 index 0000000000..2cea5558a6 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S @@ -0,0 +1,51 @@ +#------------------------------------------------------------------------------
+#
+# InitializeFloatingPointUnits() for LoongArch64
+#
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
+
+ASM_PFX(InitializeFloatingPointUnits):
+ li.d $t0, 0x0 // RNE mode
+ movgr2fcsr $r0, $t0
+ li.d $t1, -1 // SNaN
+
+ movgr2fr.d $f0, $t1
+ movgr2fr.d $f1, $t1
+ movgr2fr.d $f2, $t1
+ movgr2fr.d $f3, $t1
+ movgr2fr.d $f4, $t1
+ movgr2fr.d $f5, $t1
+ movgr2fr.d $f6, $t1
+ movgr2fr.d $f7, $t1
+ movgr2fr.d $f8, $t1
+ movgr2fr.d $f9, $t1
+ movgr2fr.d $f10, $t1
+ movgr2fr.d $f11, $t1
+ movgr2fr.d $f12, $t1
+ movgr2fr.d $f13, $t1
+ movgr2fr.d $f14, $t1
+ movgr2fr.d $f15, $t1
+ movgr2fr.d $f16, $t1
+ movgr2fr.d $f17, $t1
+ movgr2fr.d $f18, $t1
+ movgr2fr.d $f19, $t1
+ movgr2fr.d $f20, $t1
+ movgr2fr.d $f21, $t1
+ movgr2fr.d $f22, $t1
+ movgr2fr.d $f23, $t1
+ movgr2fr.d $f24, $t1
+ movgr2fr.d $f25, $t1
+ movgr2fr.d $f26, $t1
+ movgr2fr.d $f27, $t1
+ movgr2fr.d $f28, $t1
+ movgr2fr.d $f29, $t1
+ movgr2fr.d $f30, $t1
+ movgr2fr.d $f31, $t1
+
+ jirl $zero, $ra, 0
+ .end
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