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| author | Rebecca Cran <rebecca@nuviainc.com> | 2021-02-07 17:52:41 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-02-08 19:35:23 +0000 |
| commit | 4f92cfa44d1141d9e57cceac0386c08b4be86d58 (patch) | |
| tree | 5f18ed9c4eff43c26da4d178428a37cb3be5eef9 /ArmPkg/Include | |
| parent | cd9fb745d7207802e1d0647278a132562638733e (diff) | |
| download | edk2-4f92cfa44d1141d9e57cceac0386c08b4be86d58.tar.gz edk2-4f92cfa44d1141d9e57cceac0386c08b4be86d58.tar.bz2 edk2-4f92cfa44d1141d9e57cceac0386c08b4be86d58.zip | |
ArmPkg: Add definition of the maximum cache level in ARMv8-A
The ARM Architecture Reference Manual for ARMv8-A defines up to
seven levels of cache, L1 through L7.
Define MAX_ARM_CACHE_LEVEL to be 7.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Diffstat (limited to 'ArmPkg/Include')
| -rw-r--r-- | ArmPkg/Include/Library/ArmLib.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 26cb05def0..fd4f06d242 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -109,6 +109,10 @@ typedef enum { #define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
+// The ARM Architecture Reference Manual for ARMv8-A defines up
+// to 7 levels of cache, L1 through L7.
+#define MAX_ARM_CACHE_LEVEL 7
+
UINTN
EFIAPI
ArmDataCacheLineLength (
|