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| author | Michael Kubacki <michael.kubacki@microsoft.com> | 2021-12-05 14:53:50 -0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-12-07 17:24:28 +0000 |
| commit | 429309e0c6b74792d679681a8edd0d5ae0ff850c (patch) | |
| tree | 9d26d88024790b459c60a44e14500b7c7076f0d1 /ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | |
| parent | 7c2a6033c149625482a18cd51b65513c8fb8fe15 (diff) | |
| download | edk2-429309e0c6b74792d679681a8edd0d5ae0ff850c.tar.gz edk2-429309e0c6b74792d679681a8edd0d5ae0ff850c.tar.bz2 edk2-429309e0c6b74792d679681a8edd0d5ae0ff850c.zip | |
ArmPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737
Apply uncrustify changes to .c/.h files in the ArmPkg package
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
Diffstat (limited to 'ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h')
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h index 5a92ade2b3..404ff92c4e 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h @@ -9,21 +9,23 @@ #ifndef ARM_V7_LIB_H_
#define ARM_V7_LIB_H_
-#define ID_MMFR0_SHARELVL_SHIFT 12
-#define ID_MMFR0_SHARELVL_MASK 0xf
-#define ID_MMFR0_SHARELVL_ONE 0
-#define ID_MMFR0_SHARELVL_TWO 1
-
-#define ID_MMFR0_INNERSHR_SHIFT 28
-#define ID_MMFR0_INNERSHR_MASK 0xf
-#define ID_MMFR0_OUTERSHR_SHIFT 8
-#define ID_MMFR0_OUTERSHR_MASK 0xf
-
-#define ID_MMFR0_SHR_IMP_UNCACHED 0
-#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
-#define ID_MMFR0_SHR_IGNORED 0xf
-
-typedef VOID (*ARM_V7_CACHE_OPERATION)(UINT32);
+#define ID_MMFR0_SHARELVL_SHIFT 12
+#define ID_MMFR0_SHARELVL_MASK 0xf
+#define ID_MMFR0_SHARELVL_ONE 0
+#define ID_MMFR0_SHARELVL_TWO 1
+
+#define ID_MMFR0_INNERSHR_SHIFT 28
+#define ID_MMFR0_INNERSHR_MASK 0xf
+#define ID_MMFR0_OUTERSHR_SHIFT 8
+#define ID_MMFR0_OUTERSHR_MASK 0xf
+
+#define ID_MMFR0_SHR_IMP_UNCACHED 0
+#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
+#define ID_MMFR0_SHR_IGNORED 0xf
+
+typedef VOID (*ARM_V7_CACHE_OPERATION)(
+ UINT32
+ );
VOID
ArmV7AllDataCachesOperation (
@@ -45,7 +47,7 @@ ArmCleanDataCacheEntryBySetWay ( VOID
EFIAPI
ArmCleanInvalidateDataCacheEntryBySetWay (
- IN UINTN SetWayFormat
+ IN UINTN SetWayFormat
);
/** Reads the ID_MMFR4 register.
@@ -65,4 +67,3 @@ ArmReadIdPfr1 ( );
#endif // ARM_V7_LIB_H_
-
|