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authorOlivier Martin <olivier.martin@arm.com>2014-03-01 10:58:46 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2014-03-01 10:58:46 +0000
commitf0247796cbc23568121463683fefe7a211d439e3 (patch)
tree4889038214cd8a93d1aae57bf1d4bb58260920c3 /ArmPkg/Library
parenteaa84fd553eb2288f1e192430a1800bf45e51c56 (diff)
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ArmPkg/ArmLib: ArmReadVBar implementation missing in AArch64
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15274 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library')
-rw-r--r--ArmPkg/Library/ArmLib/AArch64/AArch64Support.S11
1 files changed, 11 insertions, 0 deletions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 66c310bb31..211457bd75 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -45,6 +45,7 @@ GCC_ASM_EXPORT (ArmDataMemoryBarrier)
GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
GCC_ASM_EXPORT (ArmWriteVBar)
+GCC_ASM_EXPORT (ArmReadVBar)
GCC_ASM_EXPORT (ArmVFPImplemented)
GCC_ASM_EXPORT (ArmEnableVFP)
GCC_ASM_EXPORT (ArmCallWFI)
@@ -411,6 +412,16 @@ ASM_PFX(ArmWriteVBar):
4: isb
ret
+ASM_PFX(ArmReadVBar):
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, vbar_el1 // Set the Address of the EL1 Vector Table in the VBAR register
+ ret
+2: mrs x0, vbar_el2 // Set the Address of the EL2 Vector Table in the VBAR register
+ ret
+3: mrs x0, vbar_el3 // Set the Address of the EL3 Vector Table in the VBAR register
+ ret
+
+
ASM_PFX(ArmEnableVFP):
// Check whether floating-point is implemented in the processor.
mov x1, x30 // Save LR