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author | Leif Lindholm <leif.lindholm@linaro.org> | 2014-11-11 00:43:03 +0000 |
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committer | oliviermartin <oliviermartin@Edk2> | 2014-11-11 00:43:03 +0000 |
commit | bb5420bb2b5fa146de1ddf2da5932b214e5743a9 (patch) | |
tree | c13bc8704ee5bb4ccffd8531874136358271aad6 /ArmPlatformPkg/PrePeiCore/MainUniCore.c | |
parent | 2a7e98a8cceb4546c602e6e50bafacf8a0595d59 (diff) | |
download | edk2-bb5420bb2b5fa146de1ddf2da5932b214e5743a9.tar.gz edk2-bb5420bb2b5fa146de1ddf2da5932b214e5743a9.tar.bz2 edk2-bb5420bb2b5fa146de1ddf2da5932b214e5743a9.zip |
ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.
Some AArch64 platforms have RAM and flash devices >4GB.
Update some additional Pcd entries to 64-bit, and change
the corresponding PcdGet32 calls to PcdGet64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/PrePeiCore/MainUniCore.c')
-rw-r--r-- | ArmPlatformPkg/PrePeiCore/MainUniCore.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ArmPlatformPkg/PrePeiCore/MainUniCore.c b/ArmPlatformPkg/PrePeiCore/MainUniCore.c index b437ad6510..6317f178ca 100644 --- a/ArmPlatformPkg/PrePeiCore/MainUniCore.c +++ b/ArmPlatformPkg/PrePeiCore/MainUniCore.c @@ -40,7 +40,7 @@ PrimaryMain ( // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
// the base of the primary core stack
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
- TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+ TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
@@ -53,7 +53,7 @@ PrimaryMain ( // Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
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