IntelFsp2Pkg: PeiService pointer not reset to 0 in SecMain

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2018

Current FSP SEC_IDT_TABLE structure is not natural aligned:
  typedef struct _SEC_IDT_TABLE {
    EFI_PEI_SERVICES  *PeiService;
    UINT64            IdtTable[];
  } SEC_IDT_TABLE;
Compiler will insert DWORD padding between 2 elements and
GetPeiServicesTablePointer() in early phase then always
returns padding data from stack, which was not reset to 0
in SecMain.

Solution is to align FSP SEC_IDT_TABLE structure to UefiCpuPkg
to have UINT64 as PeiService field and reset it to 0.

Test: Verified on internal platform and booting successfully
      with FSP API mode.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c
index a63d1336e4..7169afc6c7 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.c
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
@@ -114,7 +114,7 @@ SecStartup (
   // |                   |

   // |                   |

   // |-------------------|---->  TempRamBase

-  IdtTableInStack.PeiService  = NULL;

+  IdtTableInStack.PeiService = 0;

   AsmReadIdtr (&IdtDescriptor);

   if (IdtDescriptor.Base == 0) {

     ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate);