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| author | Chasel Chiu <chasel.chiu@intel.com> | 2019-07-25 22:22:29 +0800 |
|---|---|---|
| committer | Chasel Chiu <chasel.chiu@intel.com> | 2019-07-26 09:47:27 +0800 |
| commit | 520a1e60de4341f55c59cf4680d6d0242a7f929f (patch) | |
| tree | 96c957ff4004e028e3ca609c2c559b797a54f324 /IntelFsp2Pkg | |
| parent | 0dd8d7d556df46c503254d37b22b2b34f6ad12f6 (diff) | |
| download | edk2-520a1e60de4341f55c59cf4680d6d0242a7f929f.tar.gz edk2-520a1e60de4341f55c59cf4680d6d0242a7f929f.tar.bz2 edk2-520a1e60de4341f55c59cf4680d6d0242a7f929f.zip | |
IntelFsp2Pkg: PeiService pointer not reset to 0 in SecMain
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2018
Current FSP SEC_IDT_TABLE structure is not natural aligned:
typedef struct _SEC_IDT_TABLE {
EFI_PEI_SERVICES *PeiService;
UINT64 IdtTable[];
} SEC_IDT_TABLE;
Compiler will insert DWORD padding between 2 elements and
GetPeiServicesTablePointer() in early phase then always
returns padding data from stack, which was not reset to 0
in SecMain.
Solution is to align FSP SEC_IDT_TABLE structure to UefiCpuPkg
to have UINT64 as PeiService field and reset it to 0.
Test: Verified on internal platform and booting successfully
with FSP API mode.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'IntelFsp2Pkg')
| -rw-r--r-- | IntelFsp2Pkg/FspSecCore/SecMain.c | 2 | ||||
| -rw-r--r-- | IntelFsp2Pkg/FspSecCore/SecMain.h | 10 |
2 files changed, 9 insertions, 3 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c index a63d1336e4..7169afc6c7 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -114,7 +114,7 @@ SecStartup ( // | |
// | |
// |-------------------|----> TempRamBase
- IdtTableInStack.PeiService = NULL;
+ IdtTableInStack.PeiService = 0;
AsmReadIdtr (&IdtDescriptor);
if (IdtDescriptor.Base == 0) {
ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate);
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h b/IntelFsp2Pkg/FspSecCore/SecMain.h index 6fb16febab..af7f387960 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.h +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -29,7 +29,13 @@ typedef VOID (*PEI_CORE_ENTRY) ( \ );
typedef struct _SEC_IDT_TABLE {
- EFI_PEI_SERVICES *PeiService;
+ //
+ // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base
+ // address should be 8-byte alignment.
+ // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store
+ // EFI_PEI_SERVICES**
+ //
+ UINT64 PeiService;
UINT64 IdtTable[FixedPcdGet8 (PcdFspMaxInterruptSupported)];
} SEC_IDT_TABLE;
|