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-rw-r--r--IntelFsp2Pkg/FspSecCore/SecMain.c2
-rw-r--r--IntelFsp2Pkg/FspSecCore/SecMain.h10
2 files changed, 9 insertions, 3 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c
index a63d1336e4..7169afc6c7 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.c
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
@@ -114,7 +114,7 @@ SecStartup (
// | |
// | |
// |-------------------|----> TempRamBase
- IdtTableInStack.PeiService = NULL;
+ IdtTableInStack.PeiService = 0;
AsmReadIdtr (&IdtDescriptor);
if (IdtDescriptor.Base == 0) {
ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate);
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h b/IntelFsp2Pkg/FspSecCore/SecMain.h
index 6fb16febab..af7f387960 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.h
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -29,7 +29,13 @@ typedef VOID (*PEI_CORE_ENTRY) ( \
);
typedef struct _SEC_IDT_TABLE {
- EFI_PEI_SERVICES *PeiService;
+ //
+ // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base
+ // address should be 8-byte alignment.
+ // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store
+ // EFI_PEI_SERVICES**
+ //
+ UINT64 PeiService;
UINT64 IdtTable[FixedPcdGet8 (PcdFspMaxInterruptSupported)];
} SEC_IDT_TABLE;