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authorChasel, Chiu <chasel.chiu@intel.com>2018-11-06 15:31:31 +0800
committerChasel, Chiu <chasel.chiu@intel.com>2018-11-20 12:03:52 +0800
commit115336ccaf0635c659996bc41a47914f9d837275 (patch)
tree14c87c3554826ea44725cf98c1de86762763f0e6 /IntelFsp2WrapperPkg/FspmWrapperPeim
parentde1e1195b34aad43fc85cdebf6d5b0b213eaa3d0 (diff)
downloadedk2-115336ccaf0635c659996bc41a47914f9d837275.tar.gz
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IntelFsp2WrapperPkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300 Provides PCD selection for FSP Wrapper to support Dispatch mode. Also PcdFspmBaseAddress should support Dynamic for recovery scenario (multiple FSP-M binary in flash) Test: Verified on internal platform and both API and DISPATCH modes booted successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Diffstat (limited to 'IntelFsp2WrapperPkg/FspmWrapperPeim')
-rw-r--r--IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c20
-rw-r--r--IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf3
2 files changed, 18 insertions, 5 deletions
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 7b7c5f5d86..e25854c080 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -3,7 +3,7 @@
register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
- Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -65,7 +65,7 @@ PeiFspMemoryInit (
FspHobListPtr = NULL;
FspmUpdDataPtr = NULL;
- FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
+ FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));
if (FspmHeaderPtr == NULL) {
return EFI_DEVICE_ERROR;
@@ -155,8 +155,20 @@ FspmWrapperInit (
{
EFI_STATUS Status;
- Status = PeiFspMemoryInit ();
- ASSERT_EFI_ERROR (Status);
+ Status = EFI_SUCCESS;
+
+ if (FixedPcdGet8 (PcdFspModeSelection) == 1) {
+ Status = PeiFspMemoryInit ();
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ PeiServicesInstallFvInfoPpi (
+ NULL,
+ (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress),
+ (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength,
+ NULL,
+ NULL
+ );
+ }
return Status;
}
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
index 542356b582..f4b7ef8db6 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
@@ -6,7 +6,7 @@
# register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
# notify to call FspSiliconInit API.
#
-# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -61,6 +61,7 @@
[Pcd]
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES
[Sources]
FspmWrapperPeim.c