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author | Laszlo Ersek <lersek@redhat.com> | 2019-05-29 11:49:07 +0200 |
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committer | Laszlo Ersek <lersek@redhat.com> | 2019-06-03 19:53:31 +0200 |
commit | 305cd4f783fe522230677677d17ae7adc85ebc4b (patch) | |
tree | 2ef19dfafbf925295aae4b154ee4e14adeb01bb9 /OvmfPkg/PlatformPei/Platform.h | |
parent | f03859ea6c8fddeaa3a5cc3d9a3461728ce538aa (diff) | |
download | edk2-305cd4f783fe522230677677d17ae7adc85ebc4b.tar.gz edk2-305cd4f783fe522230677677d17ae7adc85ebc4b.tar.bz2 edk2-305cd4f783fe522230677677d17ae7adc85ebc4b.zip |
Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many bits clear"
This reverts commit 39b9a5ffe6618b7870be2a54fe7725000249c33a.
The original fix for <https://bugzilla.tianocore.org/show_bug.cgi?id=1814>
triggered a bug / incorrect assumption in QEMU.
QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
it. When the firmware doesn't satisfy this assumption, QEMU generates an
\_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
32-bit MMIO BARs.
Working around the problem in the firmware looks less problematic than
fixing QEMU. Revert the original changes first, before implementing an
alternative fix.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Diffstat (limited to 'OvmfPkg/PlatformPei/Platform.h')
-rw-r--r-- | OvmfPkg/PlatformPei/Platform.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h index 4476ddd871..81af8b7148 100644 --- a/OvmfPkg/PlatformPei/Platform.h +++ b/OvmfPkg/PlatformPei/Platform.h @@ -114,6 +114,4 @@ extern UINT32 mMaxCpuCount; extern UINT16 mHostBridgeDevId;
-extern UINT32 mQemuUc32Base;
-
#endif // _PLATFORM_PEI_H_INCLUDED_
|