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| author | Laszlo Ersek <lersek@redhat.com> | 2019-01-22 20:37:31 +0100 |
|---|---|---|
| committer | Laszlo Ersek <lersek@redhat.com> | 2019-05-16 21:18:41 +0200 |
| commit | 60e95bf5094fbb9b728729ccfaf32184b3662317 (patch) | |
| tree | a66e91252228c6e54b2bbf8bcfaab1d2bb0025b2 /OvmfPkg/PlatformPei | |
| parent | 3b7a897cd8e3d70f5759ef5998be684d1eaa260f (diff) | |
| download | edk2-60e95bf5094fbb9b728729ccfaf32184b3662317.tar.gz edk2-60e95bf5094fbb9b728729ccfaf32184b3662317.tar.bz2 edk2-60e95bf5094fbb9b728729ccfaf32184b3662317.zip | |
OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly
In the MemMapInitialization() function, we currently have a common
PciSize assignment, shared between i440fx and q35. In order to simplify
the rest of this series, lift and duplicate the assignment identically to
both board-specific branches.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1814
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1666941
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1701710
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'OvmfPkg/PlatformPei')
| -rw-r--r-- | OvmfPkg/PlatformPei/Platform.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 0876316eef..5e0a154842 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -190,8 +190,10 @@ MemMapInitialization ( ASSERT (TopOfLowRam <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
+ PciSize = 0xFC000000 - PciBase;
} else {
PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
+ PciSize = 0xFC000000 - PciBase;
}
//
@@ -207,7 +209,6 @@ MemMapInitialization ( // 0xFED20000 gap 896 KB
// 0xFEE00000 LAPIC 1 MB
//
- PciSize = 0xFC000000 - PciBase;
AddIoMemoryBaseSizeHob (PciBase, PciSize);
PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
ASSERT_RETURN_ERROR (PcdStatus);
|