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authorLiming Gao <liming.gao@intel.com>2018-06-27 21:14:20 +0800
committerLiming Gao <liming.gao@intel.com>2018-06-28 11:19:53 +0800
commit7367cc6c24d01b400d2370ffd58ae02854a56b32 (patch)
treec5b8a758492e188fb3246eb8a72f07340cd80d44 /UefiCpuPkg/PiSmmCpuDxeSmm/Ia32
parent77695f4da3dc8eedb6fc7fc67f91ef6ccd22daee (diff)
downloadedk2-7367cc6c24d01b400d2370ffd58ae02854a56b32.tar.gz
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UefiCpuPkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/Ia32')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
index 4c1499939b..4f1f67fe4a 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
@@ -1,6 +1,6 @@
/** @file
SMM CPU misc functions for Ia32 arch specific.
-
+
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -43,7 +43,7 @@ InitializeIDTSmmStackGuard (
/**
Initialize Gdt for all processors.
-
+
@param[in] Cr3 CR3 value.
@param[out] GdtStepSize The step size for GDT table.
@@ -80,7 +80,7 @@ InitGdt (
//
// IA32 Stack Guard need use task switch to switch stack that need
// write GDT and TSS, so AllocateCodePages() could not be used here
- // as code pages will be set to RO.
+ // as code pages will be set to RO.
//
GdtTssTables = (UINT8*)AllocatePages (EFI_SIZE_TO_PAGES (mGdtBufferSize));
ASSERT (GdtTssTables != NULL);