UefiCpuPkg: Extend SMM CPU Service with rendezvous support.

REF? https://bugzilla.tianocore.org/show_bug.cgi?id=3815

This patch define a new Protocol with the new services
SmmWaitForAllProcessor(), which can be used by SMI handler
to optionally wait for other APs to complete SMM rendezvous in
relaxed AP mode.

A new library SmmCpuRendezvousLib is provided to abstract the service
into library API to simple SMI handler code.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Zhihao Li <zhihao.li@intel.com>

Signed-off-by: Zhihao Li <zhihao.li@intel.com>

1 files changed, 15 insertions, 5 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 882dee4fe2..13c2cb8da4 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1,7 +1,7 @@
 /** @file

 SMM MP service implementation

 

-Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>

 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>

 

 SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -293,10 +293,14 @@ SmmWaitForApArrival (
   // Sync with APs 1st timeout

   //

   for (Timer = StartSyncTimer ();

-       !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal) &&

-       !AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED);

+       !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal);

        )

   {

+    mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED);

+    if (mSmmMpSyncData->AllApArrivedWithException) {

+      break;

+    }

+

     CpuPause ();

   }

 

@@ -330,10 +334,14 @@ SmmWaitForApArrival (
     // Sync with APs 2nd timeout.

     //

     for (Timer = StartSyncTimer ();

-         !IsSyncTimerTimeout (Timer) &&

-         !AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED);

+         !IsSyncTimerTimeout (Timer);

          )

     {

+      mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED);

+      if (mSmmMpSyncData->AllApArrivedWithException) {

+        break;

+      }

+

       CpuPause ();

     }

   }

@@ -1887,6 +1895,8 @@ InitializeMpSyncData (
     *mSmmMpSyncData->InsideSmm     = FALSE;

     *mSmmMpSyncData->AllCpusInSync = FALSE;

 

+    mSmmMpSyncData->AllApArrivedWithException = FALSE;

+

     for (CpuIndex = 0; CpuIndex < gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus; CpuIndex++) {

       mSmmMpSyncData->CpuData[CpuIndex].Busy =

         (SPIN_LOCK *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Busy + mSemaphoreSize * CpuIndex);