1 files changed, 28 insertions, 15 deletions
diff --git a/MdePkg/Library/BaseLib/X64/GccInlinePriv.c b/MdePkg/Library/BaseLib/X64/GccInlinePriv.c
index 98be19b3c7..e4920f2116 100644
--- a/MdePkg/Library/BaseLib/X64/GccInlinePriv.c
+++ b/MdePkg/Library/BaseLib/X64/GccInlinePriv.c
@@ -2,7 +2,7 @@
   GCC inline implementation of BaseLib processor specific functions that use
   privlidged instructions.
 
-  Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -10,6 +10,7 @@
 
 
 #include "BaseLibInternals.h"
+#include <Library/RegisterFilterLib.h>
 
 /**
   Enables CPU interrupts.
@@ -64,13 +65,20 @@ AsmReadMsr64 (
 {
   UINT32 LowData;
   UINT32 HighData;
-
-  __asm__ __volatile__ (
-    "rdmsr"
-    : "=a" (LowData),   // %0
-      "=d" (HighData)   // %1
-    : "c"  (Index)      // %2
-    );
+  UINT64 Value;
+  BOOLEAN Flag;
+
+  Flag = FilterBeforeMsrRead (Index, &Value);
+  if (Flag) {
+    __asm__ __volatile__ (
+      "rdmsr"
+      : "=a" (LowData),   // %0
+        "=d" (HighData)   // %1
+      : "c"  (Index)      // %2
+      );
+    Value = (((UINT64)HighData) << 32) | LowData;
+  }
+  FilterAfterMsrRead (Index, &Value);
 
   return (((UINT64)HighData) << 32) | LowData;
 }
@@ -101,17 +109,22 @@ AsmWriteMsr64 (
 {
   UINT32 LowData;
   UINT32 HighData;
+  BOOLEAN Flag;
 
   LowData  = (UINT32)(Value);
   HighData = (UINT32)(Value >> 32);
 
-  __asm__ __volatile__ (
-    "wrmsr"
-    :
-    : "c" (Index),
-      "a" (LowData),
-      "d" (HighData)
-    );
+  Flag = FilterBeforeMsrWrite (Index, &Value);
+  if (Flag) {
+    __asm__ __volatile__ (
+      "wrmsr"
+      :
+      : "c" (Index),
+        "a" (LowData),
+        "d" (HighData)
+      );
+  }
+  FilterAfterMsrWrite (Index, &Value);
 
   return Value;
 }