diff options
Diffstat (limited to 'UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c')
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c index 80a7df2957..beda97e238 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c @@ -23,7 +23,7 @@ AesniGetConfigData ( IN UINTN NumberOfProcessors
)
{
- UINT64 *ConfigData;
+ UINT64 *ConfigData;
ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);
ASSERT (ConfigData != NULL);
@@ -54,14 +54,15 @@ AesniSupport ( IN VOID *ConfigData OPTIONAL
)
{
- MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
+ MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
if (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1) {
- MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
+ MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *)ConfigData;
ASSERT (MsrFeatureConfig != NULL);
MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
return TRUE;
}
+
return FALSE;
}
@@ -91,7 +92,7 @@ AesniInitialize ( IN BOOLEAN State
)
{
- MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
+ MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
//
// SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,
@@ -102,7 +103,7 @@ AesniInitialize ( // programming it.
//
if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
- MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
+ MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *)ConfigData;
ASSERT (MsrFeatureConfig != NULL);
if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
CPU_REGISTER_TABLE_WRITE_FIELD (
@@ -115,5 +116,6 @@ AesniInitialize ( );
}
}
+
return RETURN_SUCCESS;
}
|