summaryrefslogtreecommitdiffstats
path: root/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
diff options
context:
space:
mode:
Diffstat (limited to 'UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c')
-rw-r--r--UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c21
1 files changed, 13 insertions, 8 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index 0e78a0ce26..d8b070d9f1 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -102,6 +102,7 @@ McaSupport (
if (!MceSupport (ProcessorNumber, CpuInfo, ConfigData)) {
return FALSE;
}
+
return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCA == 1);
}
@@ -144,7 +145,8 @@ McaInitialize (
IS_SKYLAKE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
- IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
+ IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel))
+ {
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}
@@ -162,7 +164,7 @@ McaInitialize (
if (State) {
McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
- for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
+ for (BankIndex = 0; BankIndex < (UINT32)McgCap.Bits.Count; BankIndex++) {
CPU_REGISTER_TABLE_WRITE64 (
ProcessorNumber,
Msr,
@@ -172,7 +174,7 @@ McaInitialize (
}
if (PcdGetBool (PcdIsPowerOnReset)) {
- for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {
+ for (BankIndex = 0; BankIndex < (UINTN)McgCap.Bits.Count; BankIndex++) {
CPU_REGISTER_TABLE_WRITE64 (
ProcessorNumber,
Msr,
@@ -215,6 +217,7 @@ McgCtlSupport (
if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
return FALSE;
}
+
McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
return (McgCap.Bits.MCG_CTL_P == 1);
}
@@ -249,7 +252,7 @@ McgCtlInitialize (
ProcessorNumber,
Msr,
MSR_IA32_MCG_CTL,
- (State)? MAX_UINT64 : 0
+ (State) ? MAX_UINT64 : 0
);
return RETURN_SUCCESS;
}
@@ -279,7 +282,7 @@ LmceSupport (
IN VOID *ConfigData OPTIONAL
)
{
- MSR_IA32_MCG_CAP_REGISTER McgCap;
+ MSR_IA32_MCG_CAP_REGISTER McgCap;
if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
return FALSE;
@@ -287,9 +290,10 @@ LmceSupport (
McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
if (ProcessorNumber == 0) {
- DEBUG ((DEBUG_INFO, "LMCE enable = %x\n", (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0)));
+ DEBUG ((DEBUG_INFO, "LMCE enable = %x\n", (BOOLEAN)(McgCap.Bits.MCG_LMCE_P != 0)));
}
- return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0);
+
+ return (BOOLEAN)(McgCap.Bits.MCG_LMCE_P != 0);
}
/**
@@ -325,7 +329,8 @@ LmceInitialize (
//
if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
- IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
+ IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel))
+ {
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}