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* OvmfPkg/Tcg2ConfigPei: Update Depex for IA32 and X64Lendacky, Thomas2021-04-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345 The OVMF Tcg2Config PEIM adds the gOvmfTpmMmioAccessiblePpiGuid as a Depex for IA32 and X64 builds so that the MMIO range is properly mapped as unencrypted for an SEV-ES guest before the Tcg2Config PEIM is loaded. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: Stefan Berger <stefanb@linux.ibm.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <d6538e6c557173d260e272a0e5659683175e2e06.1619716333.git.thomas.lendacky@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/TpmMmioSevDecryptPei: Mark TPM MMIO range as unencrypted for SEV-ESLendacky, Thomas2021-04-3010-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345 During PEI, the MMIO range for the TPM is marked as encrypted when running as an SEV guest. While this isn't an issue for an SEV guest because of the way the nested page fault is handled, it does result in an SEV-ES guest terminating because of a mitigation check in the #VC handler to prevent MMIO to an encrypted address. For an SEV-ES guest, this range must be marked as unencrypted. Create a new x86 PEIM for TPM support that will map the TPM MMIO range as unencrypted when SEV-ES is active. The gOvmfTpmMmioAccessiblePpiGuid PPI will be unconditionally installed before exiting. The PEIM will exit with the EFI_ABORTED status so that the PEIM does not stay resident. This new PEIM will depend on the installation of the permanent PEI RAM, by PlatformPei, so that in case page table splitting is required during the clearing of the encryption bit, the new page table(s) will be allocated from permanent PEI RAM. Update all OVMF Ia32 and X64 build packages to include this new PEIM. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: Stefan Berger <stefanb@linux.ibm.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <42794cec1f9d5bc24cbfb9dcdbe5e281ef259ef5.1619716333.git.thomas.lendacky@amd.com> [lersek@redhat.com: refresh subject line] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg: Define a new PPI GUID to signal TPM MMIO accessabilityLendacky, Thomas2021-04-301-0/+4
| | | | | | | | | | | | | | | | | | | | Define a new PPI GUID that is to be used as a signal of when it is safe to access the TPM MMIO range. This is needed so that, when SEV is active, the MMIO range can be mapped unencrypted before it is accessed. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: Stefan Berger <stefanb@linux.ibm.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <03e292339273721724c8b14605cfe9d7bbe45a71.1619716333.git.thomas.lendacky@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/VmgExitLib: Add support for new MMIO MOV opcodesLendacky, Thomas2021-04-301-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345 Enabling TPM support results in guest termination of an SEV-ES guest because it uses MMIO opcodes that are not currently supported. Add support for the new MMIO opcodes (0xA0 - 0xA3), MOV instructions which use a memory offset directly encoded in the instruction. Also, add a DEBUG statement to identify an unsupported MMIO opcode being used. Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <2fdde57707b52ae39c49341c9d97053aaff56e4a.1619716333.git.thomas.lendacky@amd.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* OvfmPkg/VmgExitLib: Properly decode MMIO MOVZX and MOVSX opcodesLendacky, Thomas2021-04-301-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345 The MOVZX and MOVSX instructions use the ModRM byte in the instruction, but the instruction decoding support was not decoding it. This resulted in invalid decoding and failing of the MMIO operation. Also, when performing the zero-extend or sign-extend operation, the memory operation should be using the size, and not the size enumeration value. Add the ModRM byte decoding for the MOVZX and MOVSX opcodes and use the true data size to perform the extend operations. Additionally, add a DEBUG statement identifying the MMIO address being flagged as encrypted during the MMIO address validation. Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <5949d54cb2c9ab69256f67ed5654b32654c0501c.1619716333.git.thomas.lendacky@amd.com>
* BaseTools/Source/Python: New Target/ToolChain/Arch in DSC [BuildOptions]Michael D Kinney2021-04-295-96/+230
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3359 Update BaseTools to support new build targets, new tool chains, and new architectures declared in DSC file [BuildOptions] sections. * Do not expand * when tools_def.txt is parsed. Only expand when both tools_def.txt and DSC [BuilsOptions] sections have been parsed. This also requires more flexible matching of tool keys that contain * in tool key fields. * Pre-scan the platform DSC file for FAMILY and TOOLCHAIN declarations DSC in [BuildOptions] sections before the FAMILY and TOOLCHAIN need to be known. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* EmulatorPkg: Temp remove IA32 GCC CI buildsMichael D Kinney2021-04-291-53/+0
| | | | | | | | | | | | | | | | | | | EmulatorPkg IA32 GCC builds are not working due to a failure to install the i386 library dependencies in Ubuntu 18.04. Temporarily disable these specific CI tests until the issue can be resolved. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Yuwei Chen <yuwei.chen@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* AzurePipelines: Add support for ArmPlatformPkgPierre Gondois2021-04-281-2/+2
| | | | | | | | | | | | | | Add an entry to build the ArmPlatformPkg in the CI. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3349 Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* AzurePipelines: Add support for ArmPkgPierre Gondois2021-04-281-0/+3
| | | | | | | | | | | | | | Add an entry to build the ArmPkg in the CI. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3348 Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* .pytool: Document LicenseCheck and EccCheckPierre Gondois2021-04-281-0/+10
| | | | | | | | | | | | | | Add an entry in the documentation for the LicenseCheck and EccCheck plugins. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Acked-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* .pytool: Enable CI for ArmPlatformPkgPierre Gondois2021-04-282-1/+2
| | | | | | | | | | | | | Enable the CI for the ArmPlatformPkg. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* .pytool: Enable CI for ArmPkgPierre Gondois2021-04-282-2/+3
| | | | | | | | | | | | | Enable the CI for the ArmPkg. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPlatformPkg: Add ArmPlatformPkg.ci.yamlPierre Gondois2021-04-281-0/+100
| | | | | | | | | | | | | Add ArmPlatformPkg.ci.yaml to configure the CI for the ArmPlatformPkg. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add ArmPkg.ci.yamlPierre Gondois2021-04-281-0/+221
| | | | | | | | | | | | | Add ArmPkg.ci.yaml to configure the CI for the ArmPkg. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Correct small typosPierre Gondois2021-04-288-13/+13
| | | | | | | | | | | | | The 'cspell' CI test detected some small typos in ArmPkg. Correct them. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add OemMiscLibNull library to ArmPkg.dscPierre Gondois2021-04-281-0/+1
| | | | | | | | | | | | | | | | | | Add the OemMiscLibNull library to the [Components] section of ArmPkg.dsc, allowing to complete the 'DscCompleteCheck' CI test. According to .pytool/Readme about the 'DscCompleteCheck' test: The test considers it an error if any INF does not appear in the `Components` section of the package-level DSC. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Re-order libraries in ArmPkg.decPierre Gondois2021-04-281-33/+33
| | | | | | | | | | | | | This patch alphabetically orders libraries advertised in ArmPkg.dec. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* ArmPkg: Document libraries in ArmPkg.decPierre Gondois2021-04-281-0/+47
| | | | | | | | | | | | | This patch documents the libraries advertised in ArmPkg.dec. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* ArmPlatformPkg: Document libraries in ArmPlatformPkg.decPierre Gondois2021-04-281-1/+18
| | | | | | | | | | | | This patch documents the libraries advertised in ArmPlatformPkg.dec. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Add missing library headers to ArmPkg.decPierre Gondois2021-04-281-3/+9
| | | | | | | | | | | | | | | | | | | | | | | Some library headers are missing/incorrect in ArmPkg.dec. This makes the 'LibraryClassCheck' CI test fail. This patch adds/corrects them. According to .pytool/Readme about the 'LibraryClassCheck' test: This test scans at all library header files found in the `Library` folders in all of the package's declared include directories and ensures that all files have a matching LibraryClass declaration in the DEC file for the package. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3254 Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3258 Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 3002 in StandaloneMmMmuLibPierre Gondois2021-04-281-1/+1
| | | | | | | | | | | | | | This patch fixes the following Ecc reported error: Non-Boolean comparisons should use a compare operator (==, !=, >, < >=, <=) Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8003Pierre Gondois2021-04-2833-99/+99
| | | | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: The #ifndef at the start of an include file should have one postfix underscore, and no prefix underscore character Some include guards have been modified to match the name of the header file. Some comments have also been added on the closing '#endif'. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix typo of Manufacturer in comment in SmbiosMiscDxeRebecca Cran2021-04-271-1/+1
| | | | | | | | 'Manufacturer' was spelled wrongly in a comment in MiscChassisManufacturerData.c. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Fix calculation of offset of chassis SKU Number in SmbiosMiscDxeRebecca Cran2021-04-271-5/+7
| | | | | | | | | | | The calculation of the chassis SKU number field was being calculated incorrectly, forgetting that there's one element already present in the structure. Fix the calculation and improve code readability by introducing a SkuNumberField variable. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Allow platforms to report their boot status via OemMiscLib callRebecca Cran2021-04-273-0/+27
| | | | | | | | Add a new function to OemMiscLib to allow platforms to report their boot status into the Type32 SMBIOS table. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* ArmPkg: Allow platforms to supply more data for SMBIOS Type3 recordRebecca Cran2021-04-273-0/+152
| | | | | | | | | | | | | | | Add OemMiscLib calls to allow platforms to provide the following information about the chassis: o Bootup state o Power supply/supplies state o Thermal state o Security state o Chassis height (in RMU) o Number of power cords Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* BaseTools/GenMake: Sort generated makefile tool definitionsMichael D Kinney2021-04-271-4/+8
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3353 Sort the tool definition content of generated makefiles to help verify that makefile contents have not changed after BaseTools code changes. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
* SecurityPkg: Add constraints on PK strengthJiaqi Gao2021-04-262-30/+161
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3293 Add constraints on the key strength of enrolled platform key(PK), which must be greater than or equal to 2048 bit. PK key strength is required by Intel SDL and MSFT, etc. This limitation prevents user from using weak keys as PK. The original code to check the certificate file type is placed in a new function CheckX509Certificate(), which checks if the X.509 certificate meets the requirements of encode type, RSA-Key strengh, etc. Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com> Reviewed-by: Min Xu <min.m.xu@intel.com> Acked-by: Jiewen Yao <jiewen.yao@intel.com>
* BaseTools/Source/Python: Verify TAB_TOD_DEFINES_FAMILY key presentMichael D Kinney2021-04-232-5/+15
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3344 Veify that TAB_TOD_DEFINES_FAMILY key is present in ToolDef dictionary before access. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* Maintainers.txt: Add 'Erdem Aktas' to Confidential Computing reviewersErdem Aktas2021-04-231-0/+1
| | | | | | | | | | Add 'Erdem Aktas' as a reviewer for OvmfPkg/Confidential Computing. Signed-off-by: Erdem Aktas <erdemaktas@google.com> Message-Id: <a557b66c92d3e44dcd02db7ee3800d1f9fef81b4.1619102863.git.erdemaktas@google.com> Acked-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Min M Xu <min.m.xu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools: Add double quote around CLANG_BIN path stringShi, Steven2021-04-201-1/+1
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3341 Current CLANG_BIN env variable is set without double quote around the LLVM default installation path string in windows, which causes some CI build service cannot find the LLVM path in windows. This patch enhance it to add double quote around it. Signed-off-by: Steven Shi <steven.shi@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure.Jason2021-04-201-3/+11
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3309 Define new element(Hybird) in CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS (07h) data structure. Signed-off-by: Jason Lou <yun.lou@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: PiSmmCpuDxeSmm: Not to Change Bitwidth During Static PagingKun Qin2021-04-201-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3300 Current implementation of SetStaticPageTable routine in PiSmmCpuDxeSmm driver will check a global variable mPhysicalAddressBits, and eventually cap any value larger than 39 at 39. This global variable is used in ConvertMemoryPageAttributes, which backs SmmSetMemoryAttributes and SmmClearMemoryAttributes. Thus for a processor that supports more than 39 bits width, trying to mark page table regions higher than 39-bit will always return EFI_UNSUPPROTED. This change updated the interface of SetStaticPageTable function to take PhysicalAddressBits as an input parameter, in order to avoid changing/ accessing the global variable. Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Fixes: 4eee0cc7cc0db74489b99c19eba056b53eda6358 Signed-off-by: Kun Qin <kuqin12@gmail.com>
* BaseTools/Conf/tools_def.template: Remove redundant MAKE statementsMichael D Kinney2021-04-191-55/+0
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3337 Remove redundant MAKE_PATH and MAKE_FLAGS statements for VS20xx tool chains. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
* DynamicTablesPkg: Set the Access size for the DBG2 tableJoey Gouly2021-04-191-1/+23
| | | | | | | | | | | | | | | | The DBG2 table generator set the access size for the UART to DWORD (4 bytes) by default. However, according to Section B Generic UART, Arm Base System Architecture 1.0, Platform Design Document, a Generic UART can have BYTE, WORD or DWORD access sizes. To address this an AccessSize field has been introduced in CM_ARM_SERIAL_PORT_INFO object. This patch updates the DBG2 generator to setup the AccessSize field in the Generic Address Structure (GAS) for the UART in the DBG2 table with information provided by the platform. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Set the Access size for the SPCR tableJoey Gouly2021-04-191-1/+21
| | | | | | | | | | | | | | | | The SPCR table generator set the access size for the UART to DWORD (4 bytes) by default. However, according to Section B Generic UART, Arm Base System Architecture 1.0, Platform Design Document, a Generic UART can have BYTE, WORD or DWORD access sizes. To address this an AccessSize field has been introduced in CM_ARM_SERIAL_PORT_INFO object. This patch updates the SPCR generator to setup the AccessSize field in the Generic Address Structure (GAS) for the UART in the SPCR table with information provided by the platform. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add access size to CM_ARM_SERIAL_PORT_INFOJoey Gouly2021-04-191-0/+3
| | | | | | | | Add access size to CM_ARM_SERIAL_PORT_INFO so that this can be passed down to the Generic Address Structure. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ShellPkg: Rename Address Size to Access sizeJoey Gouly2021-04-191-2/+2
| | | | | | | | This matches the ACPI spec 6.3, table 5.1: Generic Address Structure. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* SecurityPkg/FvReportPei: remove redundant sizeofWenyi Xie2021-04-161-1/+1
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3333 In function InstallPreHashFvPpi, when calculating the size of struct HASH_INFO, sizeof is used twice. This bug does not lead to buffer overflow, "sizeof (HASH_INFO)" is 4, whereas "sizeof (sizeof (HASH_INFO))" is 4 or 8. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
* RedfishPkg: Add EDK2 Redfish Foundation diagramsAbner Chang2021-04-162-0/+1082
| | | | | | | | | | | | | | | | | | | | The Readme.md to delineate the EDK2 Redfish foundation driver stack diagrams. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ting Ye <ting.ye@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Cc: Andrew Fish <afish@apple.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_PERFORMANCEPierre Gondois2021-04-153-15/+15
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_CLOCK_RATE_FORMATPierre Gondois2021-04-153-11/+11
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_CLOCKPierre Gondois2021-04-152-10/+10
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_BASEPierre Gondois2021-04-152-11/+11
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_IDPierre Gondois2021-04-152-6/+6
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_STATUSPierre Gondois2021-04-152-12/+12
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_TYPEPierre Gondois2021-04-152-4/+4
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005 for SCMI_PROTOCOL_IDPierre Gondois2021-04-155-34/+34
| | | | | | | | | | | | This patch fixes the following Ecc reported error: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 8005/8007 in ArmDisassemblerLibPierre Gondois2021-04-152-154/+163
| | | | | | | | | | | | | | | | This patch fixes the following Ecc reported error: 8005: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' 8007: There should be no use of short (single character) variable names Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ArmPkg: Fix Ecc error 7008 for OPTEE_MESSAGE_PARAMPierre Gondois2021-04-151-4/+7
| | | | | | | | | | This patch fixes the following Ecc reported error: Complex types should be typedef-ed The error is due to the a nested structure declaration. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-10 16:07:52 +0000