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* ShellPkg/Type.c: Add value check before (LoopVar - 1)Zhichao Gao2019-07-191-11/+13
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1964 If the file begin with single line Feed ('\n'), then "AsciiChar == '\n' && ((CHAR8*)Buffer)[LoopVar-1] != '\r'" would cause a underflow. Add this condition "(AsciiChar == '\n' && LoopVar == 0)" before it to make sure (LoopVar - 1) would never encounter a underflow. Same change in Unicode section. Cc: Jaben Carsey <jaben.carsey@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Andrew Fish <afish@apple.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Andrew Fish <afish@apple.com>
* OvmfPkg: link SM3 support into Tcg2Pei and Tcg2DxeImran Desai2019-07-193-0/+6
| | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1781 GITHUB: https://github.com/idesai/edk2/tree/enable_sm3_measured_boot_v6 EDK2 Support for SM3 digest algorithm is needed to enable TPM with SM3 PCR banks. This digest algorithm is part of the China Crypto algorithm suite. This integration has dependency on the openssl_1_1_1b integration into edk2. This patch links SM3 support into Tcg2Pei and Tcg2Dxe. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: Stefan Berger <stefanb@linux.ibm.com> Signed-off-by: Imran Desai <imran.desai@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190718225326.40839-5-imran.desai@intel.com> Acked-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg: set SM3 bit in TPM 2.0 hash mask by defaultImran Desai2019-07-191-2/+3
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1781 GITHUB: https://github.com/idesai/edk2/tree/enable_sm3_measured_boot_v6 EDK2 Support for SM3 digest algorithm is needed to enable TPM with SM3 PCR banks. This digest algorithm is part of the China Crypto algorithm suite. This integration has dependency on the openssl_1_1_1b integration into edk2. This patch sets SM3 bit in TPM2.0 hash mask by default. Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian Wang <jian.j.wang@intel.com> Signed-off-by: Imran Desai <imran.desai@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Message-Id: <20190718225326.40839-4-imran.desai@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/HashLibBaseCryptoRouter: recognize the SM3 digest algorithmImran Desai2019-07-191-0/+1
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1781 GITHUB: https://github.com/idesai/edk2/tree/enable_sm3_measured_boot_v6 EDK2 Support for SM3 digest algorithm is needed to enable TPM with SM3 PCR banks. This digest algorithm is part of the China Crypto algorithm suite. This integration has dependency on the openssl_1_1_1b integration into edk2. This patch adds SM3 as an available digest algorithm to crypto router. Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian Wang <jian.j.wang@intel.com> Signed-off-by: Imran Desai <imran.desai@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Message-Id: <20190718225326.40839-3-imran.desai@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg: introduce the SM3 digest algorithmImran Desai2019-07-195-0/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1781 GITHUB: https://github.com/idesai/edk2/tree/enable_sm3_measured_boot_v6 EDK2 Support for SM3 digest algorithm is needed to enable TPM with SM3 PCR banks. This digest algorithm is part of the China Crypto algorithm suite. This integration has dependency on the openssl_1_1_1b integration into edk2. This patch add SM3 algorithm in the hashinstance library. Delta in v7: 1. Dropped 95a040cff from v6 to address https://edk2.groups.io/g/devel/topic/ 32454898?p=,,,20,0,0,0::Created,,sm3,20,2,0,32454898,ct=1&ct=1 2. Relocated SM3 GUID definition from MdePkg to SecurityPkg in 9728b54f4 Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian Wang <jian.j.wang@intel.com> Signed-off-by: Imran Desai <imran.desai@intel.com> Message-Id: <20190718225326.40839-2-imran.desai@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* Maintainers.txt: Fine-grained review ownership for MdeModulePkgHao A Wu2019-07-191-2/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit add the reviewers information for modules within MdeModulePkg. For now the modules list includes: ACPI ACPI S3 BDS Console and Graphics Core services (PEI, DXE and Runtime) Device and Peripheral Firmware Update HII and UI Management Mode (MM, SMM) Reset SMBIOS UEFI Variable Please note that, for MdeModulePkg components not included in the above list, the reviewers will fall back to the package maintainers. Cc: Andrew Fish <afish@apple.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* Maintainers.txt: split out section "OvmfPkg: CSM modules"Laszlo Ersek2019-07-181-2/+4
| | | | | | | | | | | | | | | | | | We ask contributors to copy David on patches that affect "CSM modules" under OvmfPkg. With the "GetMaintainer.py" script being introduced later, express this expectation in "Maintainers.txt" in machine-readable format. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: David Woodhouse <dwmw2@infradead.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* Maintainers.txt: split out section "OvmfPkg: TCG- and TPM2-related modules"Laszlo Ersek2019-07-181-4/+9
| | | | | | | | | | | | | | | | | | | | | We ask contributors to copy Marc-André and Stefan on patches that affect "TPM2 modules" under OvmfPkg. With the "GetMaintainer.py" script being introduced later, express this expectation in "Maintainers.txt" in machine-readable format. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Stefan Berger <stefanb@linux.ibm.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* Maintainers.txt: split out section "OvmfPkg: Xen-related modules"Laszlo Ersek2019-07-181-4/+24
| | | | | | | | | | | | | | | | | | | | We ask contributors to copy Anthony and Julien on patches that affect "Xen modules" under OvmfPkg. With the "GetMaintainer.py" script being introduced later, express this expectation in "Maintainers.txt" in machine-readable format. Cc: Andrew Fish <afish@apple.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien.grall@arm.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Julien Grall <julien.grall@arm.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* Maintainers.txt: split out section "ArmVirtPkg: modules used on Xen"Laszlo Ersek2019-07-181-2/+11
| | | | | | | | | | | | | | | | | We ask contributors to copy Julien on patches that affect "Xen modules" under ArmVirtPkg. With the "GetMaintainer.py" script being introduced later, express this expectation in "Maintainers.txt" in machine-readable format. Cc: Andrew Fish <afish@apple.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Julien Grall <julien.grall@arm.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* Maintainers.txt: add wildcard path association for Arm/AArch64Leif Lindholm2019-07-181-0/+8
| | | | | | | | | | | Add Ard and Leif as responsible for any path matching F: */Arm/ F: */AArch64/ Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Tested-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* Maintainers.txt: update for filesystem area descriptionsLeif Lindholm2019-07-181-0/+46
| | | | | | | | | | | | | | | | Add comment describing new F: and X: tags for associating maintainership sections with specific filesystem paths, including wildcards. Add global section associating *all* code with devel@edk2.groups.io, with a default '*' F: tag directing all modifications that do not hit a rule to the stewards. Also tag all files in top directory as maintained by the stewards. Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Tested-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/RegisterCpuFeaturesLib: avoid use dynamic PCD.Dong, Eric2019-07-183-102/+79
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1972 Function in this library may be used by APs. Assert will be trig if AP uses dynamic pcd. This patch enhance the current code, remove the unnecessary usage of dynamic PCD. This change try to avoid report this issue again later. Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Chandana Kumar <chandana.c.kumar@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiServices table.Eric Dong2019-07-182-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1972 AP calls CollectProcessorData() to collect processor info. CollectProcessorData function finally calls PcdGetSize function to get DynamicPCD PcdCpuFeaturesSetting value. PcdGetSize will use PeiServices table which caused below assert info: Processor Info: Package: 1, MaxCore : 4, MaxThread: 1 Package: 0, Valid Core : 4 ASSERT [CpuFeaturesPei] c:\projects\jsl\jsl_v1193\Edk2\MdePkg\Library \PeiServicesTablePointerLibIdt\PeiServicesTablePointer.c(48): PeiServices != ((void *) 0) This change uses saved global pcd size instead of calls PcdGetSize to fix this issue. Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Chandana Kumar <chandana.c.kumar@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* UefiCpuPkg DxeRegisterCpuFeaturesLib: Fix VS2012 build failureStar Zeng2019-07-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1968 The new VS2012 build failure is caused by 7a0df26. xxx\registercpufeatureslib\dxeregistercpufeatureslib.c(258) : warning C4701: potentially uninitialized local variable 'MpEvent' used It is a false positive alarm. MpEvent is assigned at line 238 and will be used at line 258, both lines are controlled by "if (CpuFeaturesData->NumberOfCpus > 1)". This patch initializes MpEvent to suppress incorrect compiler/analyzer warnings. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* MdePkg/BaseLib: Base64Decode(): don't declare variables in nested blocksLaszlo Ersek2019-07-171-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EDK II C Coding Standards Specification (v2.20) strongly discourages variable declarations in nested block scope: 5 Source Files 5.4 Code File Structure 5.4.1 Scoping Rules 5.4.1.1 Scope > Block (local) Scope > > [...] > > Data declarations may follow the opening brace of a compound statement, > regardless of nesting depth, and before any code generating statements > have been entered. Other than at the outermost block of a function body, > this type of declaration is strongly discouraged. Hoist such variable declarations in Base64Decode() to the outermost function scope. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Fixes: 35e242b698cdc6205e99a6d6a188bf27fecf9fb4 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1980 Reported-by: Zhichao Gao <zhichao.gao@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Tested-by: Philippe Mathieu-Daude <philmd@redhat.com>
* MdePkg/BaseLib: rewrite Base64Decode()Laszlo Ersek2019-07-161-2/+247
| | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite Base64Decode() from scratch, due to reasons listed in the second reference below. Implement Base64Decode() according to the specification added in the previous patch. The decoder scans the input buffer once, it has no inner loop(s), and it spills each output byte as soon as the output byte is complete. The intent is to only strengthen the checks (sanity and input) relative to the previous implementation, hence the MAX_ADDRESS checks are reinstated. Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1891 Ref: http://mid.mail-archive.com/c495bd0b-ea4d-7206-8a4f-a7149760d19a@redhat.com Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Tested-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> [lersek@redhat.com: add last para to commit msg per talks w/ Marvin & Phil]
* MdePkg/BaseLib: re-specify Base64Decode(), and add temporary stub implLaszlo Ersek2019-07-162-220/+172
| | | | | | | | | | | | | | | | | | | Rewrite Base64Decode() from scratch, due to reasons listed in the second reference below. As first step, redo the interface contract, and replace the current implementation with a stub that asserts FALSE, then fails. Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1891 Ref: http://mid.mail-archive.com/c495bd0b-ea4d-7206-8a4f-a7149760d19a@redhat.com Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg CpuCommonFeaturesLib: Enhance Ppin codeStar Zeng2019-07-163-12/+72
| | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1961 Enhance Ppin code to enable and unlock for TRUE State, and disable and lock for FALSE State. Note: enable and lock could not be set both. According to SDM, once Enable_PPIN is set, attempt to write 1 to LockOut will cause #GP, and writing 1 to LockOut is permitted only if Enable_PPIN is clear. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Chandana Kumar <chandana.c.kumar@intel.com> Cc: Kevin Li <kevin.y.li@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Enable MM MP ProtocolEric Dong2019-07-166-25/+1391
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1937 Add MM Mp Protocol in PiSmmCpuDxeSmm driver. Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg: Add new MM MP Protocol definition.Eric Dong2019-07-163-0/+352
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1937 EFI MM MP Protocol is defined in the PI 1.5 specification. The MM MP protocol provides a set of functions to allow execution of procedures on processors that have entered MM. This protocol has the following properties: 1. The caller can invoke execution of a procedure on a processor, other than the caller, that has also entered MM. Supports blocking and non-blocking modes of operation. 2. The caller can invoke a procedure on multiple processors. Supports blocking and non-blocking modes of operation. Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools: Fix python3.8 SyntaxWarningCole Robinson2019-07-151-1/+1
| | | | | | | | | | | | | | Building with python3.8 shows a warning like: SyntaxWarning: invalid escape sequence \( GuidName = re.compile("\(GUID=[-a-fA-F0-9]+") It seems harmless, but it's easy enough to fix: mark the string as raw with the 'r' prefix like is used elsewhere in the file Signed-off-by: Cole Robinson <crobinso@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* EmulatorPkg/Unix: Convert timezone from seconds to minutesJordan Justen2019-07-142-3/+4
| | | | | | | | | | | | Fixes and assert seen when running ls under the shell. It appears the assert was added in: commit 99849a906e15ea3a9a0330d69bbae0d21ff49808 ShellPkg/ls: Display the file time in local time. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* EmulatorPkg/build.sh: Fix missing usage of -b BUILDTARGET parameterJordan Justen2019-07-141-5/+5
| | | | | Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* EmulatorPkg: update HOST_TOOLS to xcode5Stephano Cetola2019-07-131-2/+2
| | | | | | | | | | | | | | The last compiler flag change was for Xcode 5.0, not Xcode 3.2. As such the HOST_TOOLS should be set to XCODE5. Also, fix a small typo. This fixes bug 447: https://bugzilla.tianocore.org/show_bug.cgi?id=447 Signed-off-by: Stephano Cetola <stephano.cetola@linux.intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* FmpDevicePkg: Fix various typosAntoine Cœur2019-07-122-2/+2
| | | | | | | Fix one typo in FmpDevicePkg. Signed-off-by: Cœur <coeur@gmx.fr> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Add HOST_APPLICATION module type.Jiewen Yao2019-07-128-23/+27
| | | | | | | | | | | It can be used to indicate a module can be build to run as OS application and run in OS environment. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Fixed the issue when ToolDefinitionFile is not generatedBob Feng2019-07-121-3/+6
| | | | | | | | | | | | ToolDefinitionFile is generated by PlatformAutoGen.ToolDefinition() Code assume ToolDefinition is always called before using ToolDefinitionFile, but in some cases, it's not true. This patch is to fix this issue. Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg/PiSmmCpu: ReclaimPages: fix incorrect operator bindingRay Ni2019-07-121-1/+1
| | | | | | | | | Fixes: 4eee0cc7c Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supportsRay Ni2019-07-125-300/+561
| | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1946 The patch changes SMM environment to use 5 level paging when CPU supports it. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> (cherry picked from commit 7365eb2c8cf1d7112330d09918c0c67e8d0b827a)
* MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level pagingRay Ni2019-07-121-1/+2
| | | | | | | | | | | | | | | | | 5-level paging is documented in white paper: https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf Commit f8113e25001e715390127f23e2197252cbd6d1a2 changed Cpuid.h already. This patch updates IA32_CR4 structure to include LA57 field. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> (cherry picked from commit 7c5010c7f88b790f4524c4a5311819e3af5e2752)
* Revert "MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging"Ray Ni2019-07-121-2/+1
| | | | | | | | | | | | | | This reverts commit 7c5010c7f88b790f4524c4a5311819e3af5e2752. Commit 7c5010c7f8 MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging technically breaks the EDKII development process documented in https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process and Maintainers.txt in EDKII repo root directory. The voilation is commit 7c5010c7f8 doesn't have a Reviewed-by or Acked-by from MdePkg maintainers. Signed-off-by: Ray Ni <ray.ni@intel.com>
* Revert "UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supports"Ray Ni2019-07-125-561/+300
| | | | | | | | | | | | | | | | | This reverts commit 7365eb2c8cf1d7112330d09918c0c67e8d0b827a. Commit 7c5010c7f8 MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging technically breaks the EDKII development process documented in https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process and Maintainers.txt in EDKII repo root directory. The voilation is commit 7c5010c7f8 doesn't have a Reviewed-by or Acked-by from MdePkg maintainers. In order to revert 7c5010c7f8, 7365eb2c8 needs to revert first otherwise simply reverting 7c5010c7f8 will cause build break. Signed-off-by: Ray Ni <ray.ni@intel.com>
* Maintainers.txt: Remove maintainer info for IntelFsp[Wrapper]PkgRay Ni2019-07-121-12/+0
| | | | | | | | | | | | | | We removed IntelFspPkg and IntelFspWrapperPkg for <https://bugzilla.tianocore.org/show_bug.cgi?id=1819>; now remove the dangling maintainer/reviewer assignments too. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Andrew Fish <afish@apple.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* IntelFsp2Pkg: Fix various typosAntoine Cœur2019-07-1118-52/+52
| | | | | | | | Fix various typos in IntelFsp2Pkg. Signed-off-by: Cœur <coeur@gmx.fr> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* Revert "FmpDevicePkg: Fix various typos"Antoine Cœur2019-07-1118-52/+52
| | | | | | | | This reverts commit f527942e6bdd9f198db90f2de99a0482e9be5b1b. Commit message was incorrect. Signed-off-by: Cœur <coeur@gmx.fr> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* UefiCpuPkg RegisterCpuFeaturesLib: Fix an ASSERTION issueStar Zeng2019-07-113-27/+37
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1968 We met assertion like below, it happens when there is only one processor. ASSERT_EFI_ERROR (Status = Not started) ASSERT [CpuFeaturesDxe] X:\XXX\XXX\RegisterCpuFeaturesLib\ DxeRegisterCpuFeaturesLib.c(149): !EFI_ERROR (Status) The code should not call StartupAllAPs when there is only one processor. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Chandana Kumar <chandana.c.kumar@intel.com> Cc: Kevin Li <kevin.y.li@intel.com> Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* Revert "BaseTools/BfmLib: Add a tool BfmLib"Liming Gao2019-07-118-5881/+0
| | | | | | | | | | | This reverts commit dc7b0dc8d662b3bedece2cf1015e2a94884cb111. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* Revert "BaseTools/FCE: Add a tool FCE"Liming Gao2019-07-1123-23443/+2
| | | | | | | | | | | This reverts commit 3c59d94637adbfdd497b5a2c16073c7dc62b669c. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* Revert "BaseTools/FMMT: Add a tool FMMT"Liming Gao2019-07-1111-9036/+0
| | | | | | | | | | | This reverts commit 080981d72dcbb782ad73716c439639324b0aa4dd. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* Revert "BaseTools: fix FCE build when edksetup not executed"Liming Gao2019-07-111-1/+1
| | | | | | | | | | | This reverts commit d031fc07eb83c9d13bff3ebac25da458d5a47917. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* Revert "BaseTools/FMMT: Change FMMT script type in PosixLike"Liming Gao2019-07-111-29/+29
| | | | | | | | | | | This reverts commit 2112fc71b1112554bcfb75a454002d2bbeed552f. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* Revert "BaseTools/BfmLib: Change BfmLib script type in PosixLike"Liming Gao2019-07-111-29/+29
| | | | | | | | | | | This reverts commit 556bf5b3570a2290ad82c1a027740e72230baa26. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* Revert "BaseTools/FCE: Change FCE script type in PosixLike"Liming Gao2019-07-111-29/+29
| | | | | | | | | | | This reverts commit 8a842b31b93323ee3dc7631059292d30f6179cd3. There are the concerns on code design and code quality, and request to rewrite FCE, BfmLib and FMMT for the review. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Feng Bob C <bob.c.feng@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
* ArmPlatformPkg: Actually disable PL031 interruptsAlexander Graf2019-07-101-2/+2
| | | | | | | | | | | | | | The PL031 interrupt mask register (IMSC) is not very clearly documented in the PL031 specification. However, bit 0 (RTCIMSC) indicates whether interrupts are enabled, not disabled. So before this commit, we were actually *enabling* interrupts for the RTC. This patch changes the logic to instead disable interrupts when they are not disabled already. Signed-off-by: Alexander Graf <graf@amazon.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supportsRay Ni2019-07-105-300/+561
| | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1946 The patch changes SMM environment to use 5 level paging when CPU supports it. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level pagingRay Ni2019-07-101-1/+2
| | | | | | | | | | | | | | | 5-level paging is documented in white paper: https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf Commit f8113e25001e715390127f23e2197252cbd6d1a2 changed Cpuid.h already. This patch updates IA32_CR4 structure to include LA57 field. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* UefiCpuPkg/PiSmmCpu: Change variable names and comments to follow SDMRay Ni2019-07-101-57/+57
| | | | | | | | | | | | | | | | | | | Per SDM, for IA-32e 4-KByte paging, there are four layers in the page table structure: 1. PML4 2. Page-Directory-Pointer Table (PDPT) 3. Page-Directory (PD) 4. Page Table (PT) The patch changes the local variable names and comments to use "PML4", "PDPT", "PD", "PT" to better align to terms used in SDM. There is no functionality impact for this change. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* MdeModulePkg/Setup: Check ConfigAccess protocol in case it's destroyedGregX Yeh2019-07-101-0/+34
| | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1920 Check ConfigAccess protocol is available before process user input. Signed-off-by: GregX Yeh <gregx.yeh@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Ted Kuo <ted.kuo@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
* BaseTools: Detect the change of env variable used in tooldef.txtFeng, Bob C2019-07-101-2/+5
| | | | | | | | | | | | | | | | | | BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1921 Add TOOLS_DEF.ARCH file to all workspace meta files list. TOOLS_DEF.ARCH include the evaluated Tool definition information which is filtered by current tool_chain. With this change, when the environment variable which is used in ToolDef.txt is changed, build tool will rebuild the platform. Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Steven Shi <steven.shi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-09 00:52:45 +0000