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* MdeModulePkg: SataControllerSupported checks DevicePath ProtocolPaul Chang2024-11-013-3/+31
| | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4858 Ph52a PCIE to SATA card inserted on Intel MTL/ARL causes system hanged. Root cause of this issue is because Ph52a's driver only uses DevicePath protocol alone and EDK2 driver only uses PciIo protocol alone. Both drivers start and try to manage SATA controller. Signed-off-by: Paul Chang <paulchang@ami.com>
* MdeModulePkg: Added PPI support in UFS PEI driver.INDIA\kanagavels2024-10-284-30/+231
| | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4490 Added PPI support in UFS PEI driver to link the platform specific code as same as UFS DXE driver. Signed-off-by: Kanagavel S <kanagavels@ami.com>
* MdeModulePkg/PciHostBridgeDxe: Add MemoryFence after write.joe2024-10-251-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On AARCH64, there is no ordering guarantee between configuration space (ECAM) writes and memory space reads (MMIO). ARM AMBA CHI only guarantees ordering for reads and writes within a single address region, however, on some systems MMIO and ECAM may be split into separateaddress regions. A problem may arise when an ECAM write is issued a completion before a subsequent MMIO read is issued and receives a completion. For example, a typical PCI software flow is the following: 1. ECAM write to device command register to enable memory space 2. MMIO read from device memory space for which access was enabled in step 1. There is no guarantee that step 2. will not begin before the completion of step 1. on systems where ECAM/MMIO are specified as separate address regions, even if both spaces have the memory attributes device-nGnRnE. - Add a barrier after the final PCI Configuration space write in RootBridgeIoPciAccess. Configuration space reads should not have side-efects. - When configuration space is strongly ordered, this ensures that program execution cannot continue until the completion is received for the previous Cfg-Write, which may have side-effects. - Risk of reading a "write-only" register and causing a CA which leaves the device unresponsive. The expectation based on the PCI Base Spec v6.1 section 7.4 is that all PCI Spec-defined registers will be readable, however, there may exist design-specific registers that fall into this category. Signed-off-by: Aaron Pop <aaronpop@microsoft.com> Co-authored-by: Ard Biesheuvel <ardb@kernel.org>
* MdeModulePkg UsbNetwork: Use USB class definition from MdePkgOleg Ilyasov2024-10-223-3/+3
| | | | | | | | | - Class specific types for interface and endpoint are generic - Definitions are in IndustryStandard/Usb.h - Remove type redefinitions - Update references to the descriptor types Signed-off-by: Oleg Ilyasov <olegi@ami.com>
* XhciDxe: Fail the start of malfunctioning XHCI controllersRebecca Cran2024-09-053-15/+45
| | | | | | Add missing error checking for malfunctioning XHCI controllers. Signed-off-by: Rebecca Cran <rebecca@os.amperecomputing.com>
* MdeModulePkg/Bus/Pci/NvmExpressDxe: Nvm Express Media Sanitize Protocol.Ray Robles2024-08-297-1/+2005
| | | | | | | | Implementation of MEDIA_SANITIZE_PROTOCOL for NIST purge/clear actions with mapping to NVM Express native commands. Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* MdeModulePkg NonDiscoverablePciDeviceIo: MMIO Memory XP By DefaultOliver Smith-Denny2024-08-291-2/+32
| | | | | | | | | | | | | When allocating memory for a non-discoverable PCI device's IO, the current core code removes the XP attribute, allowing code to execute from that region. This is a security vulnerability and unneeded. This change updates to mark the region as XP when allocating memory for the non-discoverable PCI device. These allocations in this function are limited to `EfiBootServicesData` and `EfiRuntimeServicesData`, which we expect to be XP. Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* MdeModulePkg: NvmExpressDxe: Add Timeout Status CodesSean Brogan2024-07-311-0/+2
| | | | | | | Add Report status code events to Nvme to trigger when timeouts occur. This improves traceability when critical errors happen. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* MdeModulePkg/UfsPassThruDxe: Migrate UFS Initial Completion Timeout to PCDJason1 Lin2024-07-303-7/+8
| | | | | | | - Remove the hardcoded definition (UFS_INIT_COMPLETION_TIMEOUT) - Migrate the UFS initial completion timeout into PCD value Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg/UfsBlockIoPei: Migrate UFS Initial Completion Timeout to PCDJason1 Lin2024-07-303-7/+7
| | | | | | | - Remove the hardcoded definition (UFS_INIT_COMPLETION_TIMEOUT) - Migrate the UFS initial completion timeout into PCD value Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg: Add NVMe Long Delay Time EventsSean Brogan2024-07-273-2/+15
| | | | | | | | Fire an event if a long delay occurs when starting an NVMe device. This can be used by platforms to draw pictures on the screen or take other actions to notify a user or move boot forward. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* MdeModulePkg/UfsBlockIoPei: Wait fDeviceInit Be Cleared by DevicesJason1 Lin2024-07-173-7/+105
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4655 [Feature Description] - UFS device would clear fDeviceInit flag once the device initialization is completed. - This change is polling to check the flag is cleared or not with specific timeout (UFS_INIT_COMPLETION_TIMEOUT - 600ms). - This behavior is the same as UfsPassThruDxe module. [Notes] - This change included as a partial of below SHA1-ID - 95ad8f7f6a6c84ef46a96a8ba852afed805d1ca3 - c5740f360636479fb91681093b1dee1cc366075c Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg/NvmExpressDxe: use format "0x%lx" for UINT64 values.Mike Maslenkin2024-07-041-3/+3
| | | | | Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg/NvmExpressDxe: fix format used for Eui64 conversionMike Maslenkin2024-07-041-1/+1
| | | | | | | | Eui64 is a 64 bit value, so the "L" or "l" is required for format specifier, otherwise only lower 32 bit will be converted. Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg/UsbBusDxe: USB issue fix when the port resetBritton Chesley2024-07-031-1/+26
| | | | | | | | | | | | | | | | BZ #4456 Fixed a bug which led to an ASSERT due to the USB device context being maintained after a port reset, but the underlying XHCI context was uninitialized. Specifically, Xhc->UsbDevContext is freed after a reset and only re-allocates the default [0] enpoint transfer ring. In order to avoid a memory leak, device enumeration is performed after freeing the necessary buffers. This allocates the Xhc->UsbDevContext for all endpoints of the USB device. Signed-off-by: Britton Chesley <Brit.Chesley@amd.com>
* MdeModulePkg: SpiHc: SpiHc DriversBrit Chesley2024-05-087-0/+514
| | | | | | | | | | | | | | Added SpiHc DXE and SMM drivers. This code receives bus transactions from the SpiBus layer and passes them onto the SpiHcPlatformLib Platform Initialization Spec 1.7 volume 5 section 18.1.7 Bugzilla #4753 Cc: Abner Chang <abner.chang@amd.com> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> Signed-off-by: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
* MdeModulePkg/Bus/Spi/SpiBus: Adding SpiBus DriversBrit Chesley2024-05-087-0/+1052
| | | | | | | | | | | | | | | | | Added SpiBus DXE and SMM drivers. This code translates SPI requests from the application layer into SPI Bus transactions on the SPI host controller. The code is responsible for checking if the transaction is valid, then setting up the SPI clock and chip select properly before passing the bus transaction to the host controller. Platform Initialization Spec 1.7 volume 5 section 18.1.6 Bugzilla #4753 Cc: Abner Chang <abner.chang@amd.com> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> Signed-off-by: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
* MdeModulePkg/XhciDxe: Add PCD for the delay of HCRSTXianglei Cai2024-05-073-1/+7
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4727 Recently some of XHCI host controllers require to have extra 1ms delay before accessing any MMIO register during reset. PHY transition from P3 to P0 can take around 1.3ms and the xHCI reset can take around 1.5ms. Add PCD to control the delay, the default is 2 ms. Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Cc: More Shih <more.shih@intel.com> Cc: Ian Chiu <ian.chiu@intel.com> Signed-off-by: Xianglei Cai <xianglei.cai@intel.com> Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/XhciDxe: Reset endpoint while USB Transaction errorXianglei Cai2024-05-073-2/+15
| | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4556 Based on XHCI spec 4.8.3, software should do the reset endpoint while USB Transaction occur. Add the error code for USB Transaction error since UEFI spec don't have the related definition. Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Cc: More Shih <more.shih@intel.com> Signed-off-by: Xianglei Cai <xianglei.cai@intel.com> Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/SpiNorFlashJedecSfdp: SPI NOR Flash JEDEC SFDPabnchang2024-04-2011-0/+4166
| | | | | | | | | | | | | BZ#: 4471 SPI NOR Flash JEDEC Serial Flash Discoverable Driver implementation. Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Abdul Lateef Attar <abdattar@amd.com> Cc: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg: Update the comments of ReadKeyStroke and ReadKeyStrokeExQingyu2024-04-034-1/+10
| | | | | | | | | | | Refer to Uefi spec 2.10 section 12.3.3, Add a new retval EFI_UNSUPPORTED to EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.ReadKeyStrokeEx and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.ReadKeyStroke(). Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Qingyu <qingyu.shang@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Xhci: Skip another size round up for TRB addressDat Mach2024-03-222-2/+2
| | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560 Commit f36e1ec1f0a5fd3be84913e09181d7813444b620 had fixed the DXE_ASSERT caused by the TRB size round up from 16 to 64 for most cases. However, there is a remaining case that the TRB size is also rounded up during setting TR dequeue pointer that would trigger DXE_ASSERT. This patch sets the alignment flag to FALSE in XhcSetTrDequeuePointer to fix this issue as well. Cc: Gao Cheng <gao.cheng@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Dat Mach <dmach@nvidia.com> Reviewed-by: Gao Cheng <gao.cheng@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg: Update ReceiveData and SendData function descriptionQingyu Shang2024-03-138-18/+54
| | | | | | | | | | | | AtaBusDxe, NvmExpressDxe, ScsiDiskDxe and EmmcDxe is used to back the EFI_STORAGE_SECURITY_COMMAND_PROTOCOL, update the parameter 'MediaId' description for the protocol function ReceiveData and SendData as described in UEFI Spec 2.10 section 13.14. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Qingyu Shang <qingyu.shang@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Bus/Usb/UsbNetwork: Check array index range before accessMichael Kubacki2024-02-263-3/+3
| | | | | | | | | | | | Checks that an offset used to access array elements is within the expected range before accessing the array item. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Ray Ni <ray.ni@intel.com> Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Richard Ho <richardho@ami.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/PciBusDxe: Add feedback status for PciIoMapSheng Wei2024-01-251-6/+6
| | | | | | | | | | | | PciIoMap () need to feedback the status of mIoMmuProtocol->SetAttribute () return value. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4652 Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Huang Jenny <jenny.huang@intel.com> Cc: Chiang Chris <chris.chiang@intel.com> Signed-off-by: Sheng Wei <w.sheng@intel.com>
* MdeModulePkg/Bus: Fix XhciDxe Linker IssuesNate DeSimone2023-12-061-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The DXE & MM standalone variant of AcpiTimerLib defines a global named mPerformanceCounterFrequency. A global with an identical name is also present in MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c Since XhciDxe has a dependency on TimerLib, this can cause link errors due to the same symbol being defined twice if the platform DSC chooses to use AcpiTimerLib as the TimerLib implementation for any given platform. To resolve this, I noted that some of the globals in Xhci.c are not used outside of the Xhci.c compilation unit: - mPerformanceCounterStartValue - mPerformanceCounterEndValue - mPerformanceCounterFrequency - mPerformanceCounterValuesCached I have changed the definition for all of these to static and added an Xhci prefix. Since they are not used outside of the Xhci.c compilation unit, there is no reason to have them exported as globals. Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
* MdeModulePkg: UsbRndis: get rid of magic valuesMike Maslenkin2023-10-161-21/+21
| | | | | | | | | | | Replace magic values used for checking Base Class, SubClass and Protocol fields of USB Interface Descriptor. Add definitions for Base Class EFh (Miscellaneous) and RNDIS subclass. These definitions were taken from https://www.usb.org/defined-class-codes Cc: Richard Ho <richardho@ami.com> Cc: Rebecca Cran <rebecca@bsdio.com> Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
* MdeModulePkg: UsbNetwork: fix Ethernet functional descriptor processingMike Maslenkin2023-10-164-5/+5
| | | | | | | | | | | | | | | | | | | | This patch fixes wrong condition because of UINT16 value to integer promotion. NumberMcFilters is UINT16 value, so when bitwise shift operator applied to small integer type, the operation is preceded by integral promotion. This is described in MISRA-C:2004 guideline as Rule 10.5: "If the bitwise operators ~ and << are applied to an operand of underlying type unsigned char or unsigned short, the result shall be immediately cast to the underlying type of the operand." A simple fix for this issue would be the following: if ((UINT16)(UsbEthFunDescriptor.NumberMcFilters << 1) == 0) But this patch proposes to use bitwise AND operation with a proper bit mask rather than shifting to prevent similar mistakes in future. Cc: Richard Ho <richardho@ami.com> Cc: Rebecca Cran <rebecca@bsdio.com> Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
* MdeModulePkg/Xhci: Skip size round up for TRB during address translationGao Cheng2023-09-286-63/+103
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560 TRB Template is 16 bytes. When boundary checking is 64 bytes for xHCI device/host memory address, it may exceed xHCI host memory pool and cause unwanted DXE_ASSERT. Introduce a new input parameter to indicate whether to enforce 64byte size alignment and round up. For TRB case, should set it to FALSE to skip the size round up. Signed-off-by: Gao Cheng <gao.cheng@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Abort the Address Device cmd when time outCai, Xianglei2023-09-251-0/+36
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4552 Following XHCI spec 4.6.1.2, software may abort the execution of Address Device Command when command failed due to timeout. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: More Shih <more.shih@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Signed-off-by: Xianglei Cai <xianglei.cai@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Use Performance Timer for XHCI TimeoutsHenz, Patrick2023-09-255-87/+204
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948 XhciDxe uses the timer functionality provided by the boot services table to detect timeout conditions. This breaks the driver's ExitBootServices call back, as CoreExitBootServices halts the timer before signaling the ExitBootServices event. If the host controller fails to halt in the call back, the timeout condition will never occur and the boot gets stuck in an indefinite spin loop. Use the free running timer provided by TimerLib to calculate timeouts, avoiding the potential hang. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Patrick Henz <patrick.henz@hpe.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Pci/UhciDxe: Fix FORWARD_NULL Coverity issuesRanbir Singh2023-09-221-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | The function UsbHcGetPciAddressForHostMem has ASSERT ((Block != NULL)); and and the function UsbHcFreeMem has ASSERT (Block != NULL); statement after for loop, but these are applicable only in DEBUG mode. In RELEASE mode, if for whatever reasons there is no match inside for loop and the loop exits because of Block != NULL; condition, then there is no "Block" NULL pointer check afterwards and the code proceeds to do dereferencing "Block" which will lead to CRASH. Hence, for safety add NULL pointer checks always. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4211 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Pci/UhciDxe: Fix BAD_SHIFT Coverity issueRanbir Singh2023-09-221-1/+9
| | | | | | | | | | | | | | | | | | | | The function UhciConvertPollRate has a check ASSERT (Interval != 0); but this comes into play only in DEBUG mode. In Release mode, there is no handling if the Interval parameter value is ZERO. To avoid shifting by a negative amount later in the code flow in this undesirable case, it is better to handle it as well by treating it same as if 1 is sent. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4211 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Pci/NvmExpressPei: Fix DEADCODE Coverity issueRanbir Singh2023-09-201-4/+0
| | | | | | | | | | | | | | | The code can reach line 65 only through the else path above at line 53. The else path already has the same NULL check at line 55 and hence the duplicate code lines are totally redundant which can be deleted. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4220 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Ata/AtaBusDxe: Fix SIGN_EXTENSION Coverity issueRanbir Singh2023-09-201-1/+1
| | | | | | | | | | | | | | | Line number 365 does contain a typecast with UINT32, but it is after all the operations (16-bit left shift followed by OR'ing) are over. To avoid any SIGN_EXTENSION, typecast the intermediate result after 16-bit left shift operation immediately with UINT32. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4209 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/PciBusDxe: Fix boot hang with faulty PCI Option ROMNhi Pham2023-08-301-2/+2
| | | | | | | | | | | | | | A faulty PCI device has the Option ROM image size set to 0. UEFI reads two headers PCI_EXPANSION_ROM_HEADER and PCI_DATA_STRUCTURE to get the Option ROM information. Because the image size is 0, the Option ROM header address never changes. As a result, UEFI keeps reading the same two headers definitely. This patch is intended to fix it. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg: Solve boot hang Xhci driver when use USB DVD with empty disklikun su2023-08-041-2/+5
| | | | | | | Signed-off-by: likun su <sulikun@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: lichao <lichao@loongson.cn> Acked-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Ata/AtaAtapiPassThru: Fix UNUSED_VALUE Coverity issueRanbir Singh2023-08-021-2/+10
| | | | | | | | | | | | | | | | | | | | The return value stored in Status after call to SetDriveParameters is not made of any use thereafter and hence it remains as UNUSED. Based on Hao's findings (https://edk2.groups.io/g/devel/message/106844), the successful execution of SetDriveParameters() is not mandatory for initializing IDE mode of a hard disk device. Hence remove the 'Status' assignment of the return value from SetDriveParameters() and instead add error checks & DEBUG_WARN level messages within SetDriveParameters() function after sending INIT_DRIVE_PARAM & SET_MULTIPLE_MODE ATA commands. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4204 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Ata/AtaAtapiPassThru: Fix SIGN_EXTENSION Coverity issueRanbir Singh2023-08-021-1/+1
| | | | | | | | | | | | | | | Line number 1348 does contain a typecast with UINT32, but it is after all the operations (16-bit left shift followed by OR'ing) are over. To avoid any SIGN_EXTENSION, typecast the intermediate result after 16-bit left shift operation immediately with UINT32. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4204 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Pci/EhciDxe: Fix FORWARD_NULL Coverity issuesRanbir Singh2023-07-171-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | The function UsbHcGetPciAddressForHostMem has ASSERT ((Block != NULL)); and the UsbHcFreeMem has ASSERT (Block != NULL); statement after for loop, but these are applicable only in DEBUG mode. In RELEASE mode, if for whatever reasons there is no match inside the for loop and the loop exits because of Block != NULL; condition, then there is no "Block" NULL pointer check afterwards and the code proceeds to do dereferencing "Block" which will lead to CRASH. Hence, for safety add NULL pointer checks always. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4210 Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Usb/UsbNetwork/UsbCdcNcm: Add USB Cdc NCM devices supportRichard Ho2023-07-135-0/+1929
| | | | | | | | | | | | | | | | | | This driver provides UEFI driver for USB CDC NCM device Signed-off-by: Richard Ho <richardho@ami.com> Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Tested-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com> Acked-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Tony Lo <tonylo@ami.com>
* MdeModulePkg/Bus/Usb/UsbNetwork/UsbCdcEcm: Add USB Cdc ECM devices supportRichard Ho2023-07-135-0/+1805
| | | | | | | | | | | | | | | | | | This driver provides UEFI driver for USB CDC ECM device Signed-off-by: Richard Ho <richardho@ami.com> Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Tested-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com> Acked-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Tony Lo <tonylo@ami.com>
* MdeModulePkg/Bus/Usb/UsbNetwork/UsbRndis: Add USB RNDIS devices supportRichard Ho2023-07-1310-0/+6384
| | | | | | | | | | | | | | | | | | This driver provides UEFI driver for USB RNDIS device Signed-off-by: Richard Ho <richardho@ami.com> Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Tested-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com> Acked-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Tony Lo <tonylo@ami.com>
* MdeModulePkg/Bus: Fix port multiplier port in AhciPei PEIMNeo Hsueh2023-06-071-0/+10
| | | | | | | | | | If there is no port multiplier, PortMultiplierPort should be converted to 0 to follow AHCI spec. The same logic already applied in AtaAtapiPassThruDxe driver. Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SataControllerDxe: Fix up ASSERTS (Private != NULL)Pedro Falcato2023-06-011-5/+4
| | | | | | | | | | | | | ASSERT (Private != NULL) (where Private = CR(...)) is ineffective as CR(Ptr, Type, Member, Sig) either returns Ptr - offsetof(Type, Member), or ASSERTS on the signature, so it's unlikely to ever return NULL (must be passed a pointer = member's offset, or in this case, 0x4). ASSERT on This != NULL instead. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SataControllerDxe: Remove useless null checkPedro Falcato2023-06-011-23/+21
| | | | | | | | | ASSERT (Private != NULL) already covers this check. See commit 81310a6. Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SataControllerDxe: Log expected errors at DEBUG_INFO levelPedro Falcato2023-06-011-2/+13
| | | | | | | | | | | | | | | | | | | | | When a UEFI_DRIVER attempts to open a protocol interface with BY_DRIVER attribute that it already has open with BY_DRIVER attribute, OpenProtocol() returns EFI_ALREADY_STARTED. This is not an error. The UEFI-2.7 spec currently says, > EFI_ALREADY_STARTED -- Attributes is BY_DRIVER and there is an item on > the open list with an attribute of BY_DRIVER > whose agent handle is the same as AgentHandle. Downgrade the log mask for this one condition to DEBUG_INFO, in SataControllerStart(). This will match the log mask of the other two informative messages in this function. (ported from commit 5dfba97) Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/SataControllerDxe: Clean up error handling in Start()Pedro Falcato2023-06-011-45/+35
| | | | | | | | | | Clean up error handling using cascading labels + goto. (port of commit 379b179 + bcab714) Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg SdMmcPciHcDxe: SD/MMC capability debug print is incorrectGiri Mudusuru2023-05-291-1/+1
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4394 Fix DumpCapabilityReg() debug log to print 64 bit capability instead of 32 bit pointer Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Andrew Fish <afish@apple.com> Signed-off-by: Giri Mudusuru <girim@apple.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* Add volatile keyword to NvmExpressPei's Passthru CQOliver Smith-Denny2023-05-081-3/+3
| | | | | | | | | | | | | | | This applies the volatile keyword and appropriate casts to the NvmExpressPei's Passthru CQ. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Acked-by: Michael Kubacki <michael.kubacki@microsoft.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-03 18:59:31 +0000