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* UefiPayloadPkg: Update ReadUnaligned64 in ACPI parsingAjan Zhong9 days1-1/+1
| | | | | | | | | | | | | | | According to ACPI Specification, 64 bit physical address of the XSDT provides indentical functionality to the RSDT but accommodates physical address of description headers that are larger than 32 bits. In this case physical address of XSDT table is 64 bit aligned, however size of ACPI description tabled header is not 64 bit aligned. It leads to the entry of other description headers are not 64 bit aligned. In AARCH64 architecture, deference non-aligned 64 bit address to fetch 64-bit data will trigger Alignment fault. Use ReadUnaligned64 method to fix this unaligned data access issue. Signed-off-by: Ajan Zhong <ajan.zhong@newfw.com>
* UefiPayloadPkg/UefiPayloadEntry: Fix PT protection in 5 level pagingedk2-stable202411Ning Feng2024-11-173-28/+34
| | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4873 Currently the function does not cover the 5 level paging case. it will casued pagetable protection region set incorrectly. This patch do the enhancemant and with the patch protection region has been set correctly. Signed-off-by: Ning Feng <ning.feng@intel.com> Cc: Ray Ni <ray.ni@intel.com>
* Set PcdSerialClockRate from SerialPortInfo in UefiPayloadEntryMatt DeVillier2024-09-202-0/+9
| | | | Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
* UefiPayloadPkg: Move FADT check to consumer coode.Chasel Chiu2024-09-161-9/+0
| | | | | | | | | | | | | | | | | | | ACPI FADT HW register interface fields are optional but current UPL common entry code made it as mandatory which caused compatibility issue on some platforms. Solution is to move those FADT HW register fields check code to consumer code so only ASSERT when those fields are consumed with error. Currently only AcpiTimerLib and ResetSystemLib consuming those register fields so if platforms configured UPL to different library instances the FADT HW register fields are not consumed thus will not cause ASSERT. Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
* UefiPayloadPkg: Add support for Root bridge parserDhaval2024-09-141-1/+1
| | | | | | | | | | | | | | | | | | | | | In order to properly enable multisegment RB, we need to grab ecam data from the FDT for each bridge. Current UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES struct from MdeModulePkg does not include definition for ecam. In order to maintain backward compatibility and also avoid diverging too much from core, we are going to define a new HOB for UPL segment information and pass it to GetPciSegmentInfo function. Ths function then grabs specifically ecam info from the segment hob along with other rb specific information to create final RB info required by multi segment PCI driver. Additionally we would like to support legacy implementations which rely on ACPIBoard HOB to fill up segment info. So if UplSegmentInfo Hob is not found we try and look for other hob. Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
* UefiPayloadPkg: Remove unnecessary ACPI checksDhaval2024-09-141-5/+5
| | | | | | | | | | We do not need to go deep into verifying all ACPI tables at this stage. TODO: Just a simple ACPI header signature check should be good enough. For now just commenting out asserts that mandate one to have various tables which is not applicable to all platforms. Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
* UefiPayloadPkg: Enable RiscV64 entry point to UPLDhaval2024-09-143-0/+112
| | | | | | | | As per specification we are going to accept only one argument at the entry point which is FDT pointer. Grab that and call the entry point. Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
* UniversalPayload: Add RISC-V support for UPL PCDsDhaval2024-09-141-1/+1
| | | | | | Expose UPL required PCDs for RISC-V Arch Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
* UefiPayloadPkg: Update UefiPayload driver for FDT support.Linus Liu2024-08-288-255/+300
| | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786 Add FDT detection and comsume FDT when needed. Move some x86 specific function in the x86 folder. Create HandOffHob via FDT memory node. Signed-off-by: Linus Liu <linus.liu@intel.com>
* UefiPayloadPkg: Update PayloadLoader to suport FDT.Linus Liu2024-08-282-0/+540
| | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786 Create FDT nodes (reserved-memory, serial, pci-rb, options) in FdtPpiNotifyCallback function right after gEfiEndOfPeiSignalPpiGuid. Signed-off-by: Linus Liu <linus.liu@intel.com>
* UefiPayloadPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-012-2/+2
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in UefiPayloadPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* UefiPayloadPkg/UefiPayloadEntry: Use HobPrintLib to dump HOBsWei6 Xu2024-07-073-326/+19
| | | | | | | | | | | | | Leverage generic HOB print code in MdeModulePkg/Library/HobPrintLib. Print UefiPayload specified GUID HOB info as custom HOB print handler when calling the PrintHobList() interface. Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
* UefiPayloadPkg: Fix LoadDxeCore for payload size > 16MBSebastian Witt2024-06-101-2/+3
| | | | | | | | | | | Fix calculation of first section in FileFindSection for FILE2 headers in UefiPayloadEntry module. Signed-off-by: Sebastian Witt <sebastian.witt@siemens.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com>
* UefiPayloadPkg: auto-generate SEC ProcessLibraryConstructorList() declLaszlo Ersek2024-03-084-13/+3
| | | | | | | | | | | | | | | | | | | | | | | Rely on AutoGen for declaring ProcessLibraryConstructorList(). Build-tested with: python UefiPayloadPkg/UniversalPayloadBuild.py -a X64 -b DEBUG -t GCC5 python UefiPayloadPkg/UniversalPayloadBuild.py -a X64 -b DEBUG -f \ -t GCC5 build -a X64 -b DEBUG -p UefiPayloadPkg/UefiPayloadPkg.dsc -t GCC5 \ -D BUILD_ARCH=X64 Cc: Gua Guo <gua.guo@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: James Lu <james.lu@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20240305113843.68812-11-lersek@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* UefiPayloadPkg/Hob: Integer Overflow in CreateHob()Gua Guo2024-01-162-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4166 Fix integer overflow in various CreateHob instances. Fixes: CVE-2022-36765 The CreateHob() function aligns the requested size to 8 performing the following operation: ``` HobLength = (UINT16)((HobLength + 0x7) & (~0x7)); ``` No checks are performed to ensure this value doesn't overflow, and could lead to CreateHob() returning a smaller HOB than requested, which could lead to OOB HOB accesses. Reported-by: Marc Beatove <mbeatove@google.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Cc: John Mathew <john.mathews@intel.com> Authored-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Gua Guo <gua.guo@intel.com>
* UefiPayloadPkg/UefiPayloadEntry: Remove SCI enabling checkGang Chen2024-01-101-38/+0
| | | | | | | | | | | It's too early to check the SCI enable status, which is set in the BDS phase ususally. Remove the check from UPL. Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Gang Chen <gang.c.chen@intel.com>
* UefiPayloadPkg: Add FIT supportBrucex.Wang2023-09-262-0/+751
| | | | | | | | | | | | | | Provide Fit format for UniversalPayload, developer can use argument "--Fit" to build UniversalPayload.fit Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: BruceX Wang <brucex.wang@intel.com>
* UefiPayloadPkg: Integrate UiApp and BootManagerMenuApp into MultiFvMarsX Lin2023-07-112-26/+1
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4347 To put UiApp.inf and BootManagerMenuApp.inf to proper FV(BDSFV) Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: MarsX Lin <marsx.lin@intel.com>
* UefiPayloadPkg: Always build MemoryTypeInformation HOB for DXE GCDBenjamin Doron2023-04-122-30/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MemoryType information assists GCD with defragmenting the memory map. When the DXE core starts, GCD adds memory descriptors for the resource descriptors HOBs. This allocates heap space which can be reused later as the bins by memory type. It seems memory allocation prefers low ranges. It seems "below 4G" is an artifact of this heap reuse. However, the memory type information determines the DXE core's `MinimalMemorySizeNeeded`, determining which system memory descriptor HOB may be used by DXE. Furthermore, it's important that the memory type information be correct, for an S4 memory map. Therefore, follow other bootloaders, such as [MinPlatform][1], and do this unconditionally. As of [edk2-stable202011][2], it was. [1]: https://github.com/tianocore/edk2-platforms/blob/b6f96743891be51541184bf61dd2970c008e2c43/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c#L164-L201 [2]: https://github.com/tianocore/edk2/blob/edk2-stable202011/UefiPayloadPkg/BlSupportPei/BlSupportPei.c#L462-L466 Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
* UefiPayloadPkg: Update code to be more C11 compliant by using __func__Rebecca Cran2023-04-101-1/+1
| | | | | | | | | | | | | | __FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout UefiPayloadPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: James Lu <james.lu@intel.com>
* UefiPayloadPkg: Add gUefiAcpiBoardInfoGuid supportGua Guo2023-03-271-3/+6
| | | | | | | | | | | | | if system both exist gUefiAcpiBoardInfoGuid and rsdp, we may need to use gUefiAcpiBoardInfoGuid as final config to have backward support. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: James Lu <james.lu@intel.com> Signed-off-by: Gua Guo <gua.guo@intel.com>
* UefiPayloadPkg: Remove UefiCpuLib from module INFs.Yu Pu2023-03-103-3/+0
| | | | | | | | | | | | | | | Because UefiCpuPkg/UefiCpuLib is merged to MdePkg/CpuLib, remove the dependency of UefiCpuLib. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yu Pu <yu.pu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Support multiple firmware volumeMarsX Lin2022-12-061-1/+15
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4164 To support multiple FVs provided by UPL Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: MarsX Lin <marsx.lin@intel.com>
* UefiPayloadPkg: Boot mode in PHIT HOB will not be updatedVictorX Hsu2022-11-041-1/+3
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4136 System will depend on Boot Mode value to do different behavior Update during Capsule Update process. So UPL need to support update boot mode. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: VictorX Hsu <victorx.hsu@intel.com>
* UefiPayloadPkg: Fix Coverity report defectJames Lu2022-08-231-2/+2
| | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4018 Coverity report FORWARD_NULL and OVERFLOW_BEFORE_WIDEN potential defect in UefiPayloadPkg. Signed-off-by: Gregx Yeh <gregx.yeh@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: James Lu <james.lu@intel.com>
* UefiPayloadPkg: Remove clearing CR0.WP when protecting pagetableDun Tan2022-08-151-6/+1
| | | | | | | | | | | | | | Remove clearing CR0.WP when marking the memory used for page table as read-only in the page table itself created by UefiPayloadEntry. This page table address is written to Cr3 after these protection steps. Till this, the memory used for page table is always RW. Signed-off-by: Dun Tan <dun.tan@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Always split page table entry to 4K if it covers stack.Liu, Zhiguang2022-06-201-10/+2
| | | | | | | | | | | | | | | | | | | | | | | We observed page fault in the following situation: 1.PayloadEntry uses 2M entry in page table to cover DXE stack range. 2.In DXE phase, image protection code needs to mark some sub-range in this 2M entry as readonly. So the the 2M page table entry is split to 512 4K entries, and some of the entries are marked as readonly. (the entries covering stack still remain R/W) 3.Page fault exception happens when trying to access stack. Always split the page table entry to 4K if it covers stack to avoid this issue. More discussion about this issue can be seen at below link https://edk2.groups.io/g/devel/topic/91446026 Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib.Yu Pu2022-05-063-0/+3
| | | | | | | | | | | | | | There are two libraries: MdePkg/CpuLib and UefiCpuPkg/UefiCpuLib and UefiCpuPkg/UefiCpuLib will be merged to MdePkg/CpuLib. To avoid build failure, add CpuLib dependency to all modules that depend on UefiCpuLib. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Yu Pu <yu.pu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Add build option for Above 4G MemorySean Rhodes2022-03-042-0/+46
| | | | | | | | | | | | | | | | | | When build option ABOVE_4G_MEMORY is set to true, nothing will change and EDKII will use all available memory. Setting it to false will create memory type information HOB in payload entry, so that EDKII will reserve enough memory below 4G for EDKII modules. This option is useful for bootloaders that are not fully 64-bit aware such as Qubes R4.0.4 bootloader, Zorin and Proxmox. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Skip ModuleInfo HOB in PayloadJiang, Guomin2021-12-081-1/+31
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3754 1. DxeCore will use ModuleInfo to install LoadedImage protocol for DxeCore. 2. DxeIpl will create the ModuleInfo of UniversalPayload. and UniversalPayload will create the ModuleInfo of DxeCore. 3. UniversalPayload should skip the ModuleInfo from the DxeIpl to avoid the mismatched ModuleInfo for DxeCore. Changes: 1. Use function IsHobNeed to check if the HOB should be added 2. Add the ModuleInfo check logic in IsHobNeed function Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/PayloadEntry: Inherit 4/5-level paging from bootloaderNi, Ray2021-12-083-51/+39
| | | | | | | | | | | | | | | | | The patch removes the dep on PcdUse5LevelPageTable. Now the payload inherits the 5-level paging setting from bootloader in IA-32e mode and uses 4-level paging in legacy protected mode. This fix the potential issue when bootloader enables 5-level paging but 64bit payload sets 4-level page table to CR3 resulting CPU exception because PcdUse5LevelPageTable is FALSE. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Apply uncrustify changesMichael Kubacki2021-12-0711-842/+913
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Remove SystemTableInfo GUID.Kesavan Balakrishnan, ThiyaguX2021-10-304-21/+10
| | | | | | | | | | | | | | | | SystemTableInfo GUID is not a Spec defined GUID. The latest SBL and CBL produces ACPI and SMBIOS table information. So removing the SystemTableInfo GUID implementation. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Thiyagu Kesavan Balakrishnan <thiyagux.kesavan.balakrishnan@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix the build failure for non-universal payloadGuo Dong2021-10-191-2/+2
| | | | | | | | | | | | Applied an old patch which caused non-universal payload build failed since that code was added after the old patch. This patch fixed the build failure. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Fix ECC reported issuesGuo Dong2021-10-195-14/+37
| | | | | | | | | | | | | | | V2: Fix more header files on #ifdef variable ECC reported some issues on UefiPayloadPkg, this patch fixed most of them except several files including ElfLib\Elf32.h, coreboot.h, CbParseLib.c, etc. It also removed unused functions in ResetSystemLib and Hob.c. Signed-off-by: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Replace MEMROY_ENTRY by MEMORY_ENTRYGuo Dong2021-10-191-1/+1
| | | | | | | | | | Fixes simple typo, no behavioral change. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix the build issue for corebootGuo Dong2021-10-151-1/+3
| | | | | | | | | | | | | V2: Fix GCC build issue. There is typo in previous change caused coreboot build failure. This patch fixed the build issue. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Add PCI root bridge info hob support for SBLMa, Maurice2021-10-131-0/+8
| | | | | | | | | | | | | | | | | | | | Current UefiPayloadPkg can suport PCI root bridge info HOB provided by bootloader. For UniversalPayload, bootloader can directly provide this HOB for payload consumption. However, for legacy UEFI payload, it is required to migrate the HOB information from bootloader HOB space to UEFI payload HOB space. This patch added the missing part for the bootloader ParseLib in order to support both legacy and universal UEFI payload. This patch was tested on Slim Bootloader with latest UEFI payload, and it worked as expected. Cc: Ray Ni <ray.ni@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Remove asm code and sharing librariesGuo Dong2021-09-306-104/+26
| | | | | | | | | | | | | | | | | Remove asm code used for payload entry. Use patchable PCD instead a fixed PCD PcdPayloadStackTop to avoid potential conflict. Based on the removal, use same HobLib regardless UNIVERSAL_PAYLOAD. Use same PlatformHookLib regardless UNIVERSAL_PAYLOAD. The original PlatformHookLib was removed and UniversalPayloadPlatformHookLib was rename to new PlatformHookLib. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Build a HOB from bootloader ACPI tableGuo Dong2021-09-296-173/+233
| | | | | | | | | | | | | | V2: Update BuildHobFromAcpi() to return a HOB pointer. For universal UEFI payload, build a HOB from the ACPI table, so that other modules could use this info from HOB at very early DXE phase. This code are shared by universal payload and non universal payload. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Dump hob info from gEdkiiBootManagerMenuFileGuidduntan2021-09-102-1/+26
| | | | | | | | | | | | | V1: Dump this hob infomation from gEdkiiBootManagerMenuFileGuid V2: Delete the duplicated assertions V3: Add input parameter in Comment Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiPayloadPkg: Fix the bug in dump guid HOB info functionsduntan2021-09-101-3/+7
| | | | | | | | | | | The input HobLength of PrintHandler should be data size instead of whole length of HOB Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiPayloadPkg/UefiPayloadEntry: Fix memory corruptionMarvin H?user2021-09-011-1/+1
| | | | | | | | | | | | | | UefiPayloadEntry's AllocatePool() applies the "sizeof" operator to HOB index rather than the HOB header structure. This yields 4 Bytes compared to the 8 Bytes the structure header requires. Fix the call to allocate the required space instead. Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Vitaly Cheptsov <vit9696@protonmail.com> Signed-off-by: Marvin H?user <mhaeuser@posteo.de>
* UefiPayloadPkg: Fix the non-ascii character in UniversalPayloadEntry.cedk2-stable202108-rc0DunTan2021-08-091-1/+1
| | | | | | | | | | | Fix the non-ascii character in UniversalPayloadEntry.c Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: DunTan <dun.tan@intel.com>
* UefiPayloadPkg: Dump hob information from boot loaderLiu, Zhiguang2021-07-133-0/+664
| | | | | | | | | | | | | | | | | | | | V1: Universal Payload will consume Hobs from boot loader. Dump all hobs in the Universal Payload entry. V2: Add function comments V3: minor change, for example Hobsize -> HobLength, SMBiosTable -> SmBiosTable Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Thiyagu Kesavan Balakrishnan <thiyagux.kesavan.balakrishnan@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg: Fix the build failureGuo Dong2021-07-012-5/+2
| | | | | | | | | | For non-universal payload, HandoffHobTable is used without initialization. This patch fixed this failure. Cc: Benjamin You <benjamin.you@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix up UPL Pcd databaseZhiguang Liu2021-06-244-7/+116
| | | | | | | | | | | | | | | Edk2 bootloader will pass the pei pcd database, and UPL also contain a PCD database. Dxe PCD driver has the assumption that the two PCD database can be catenated and the local token number should be successive。 This patch will manually fix up the UPL PCD database to meet that assumption. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Get and enter DxeCore for Universal PayloadZhiguang Liu2021-06-245-4/+104
| | | | | | | | | | | | | From gUniversalPayloadExtraDataGuid Guid Hob, get the Dxe FV information, and get the Dxe Core from the FV. Also, make sure if there are muliple FV hob, the FV hob pointing to this FV will be the first in the hob list. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Create separate Payload Entry for UniversalPayloadZhiguang Liu2021-06-242-0/+402
| | | | | | | | | | | | | | This patch create the UniversalPayload Entry based on the UefiPayload Entry. It implements the logic to find a proper memory range to create the new Hob and migrate the Hobs from Bootloader. To make the change history clear, the logic to get the DxeCore will be in the next patch. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Update the function definition of HobConstructorZhiguang Liu2021-06-242-12/+9
| | | | | | | | | | | Update the function defination of HobConstructor to align the Phit Hob structure. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 01:43:28 +0000