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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-11-15 09:34:14 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-11-16 09:05:59 +0100 |
| commit | 777bcc85e1fbadfea1927e828165102cf5050b53 (patch) | |
| tree | 4a7d33363ca6ff1d3421c2077435c599bfa47d5b /drivers/clk/renesas | |
| parent | b5f7c6a507718b45be0d71fcf7eaa933ee738a9e (diff) | |
| download | linux-stable-777bcc85e1fbadfea1927e828165102cf5050b53.tar.gz linux-stable-777bcc85e1fbadfea1927e828165102cf5050b53.tar.bz2 linux-stable-777bcc85e1fbadfea1927e828165102cf5050b53.zip | |
clk: renesas: r8a779f0: Fix Ethernet Switch clocks
The RSwitch2 and EtherTSN-IF clocks were accidentally mixed up.
While at it, rename them to better match the (future) documentation.
Fixes: a3b4137a4d4023e6 ("clk: renesas: r8a779f0: Add Ethernet Switch clocks")
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/99b8b41bd2c5043c9e457862ef4bc144869eca58.1668501212.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779f0-cpg-mssr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index 800fdc104edd..f721835c7e21 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -163,8 +163,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("cmt3", 913, R8A779F0_CLK_R), DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M), DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M), - DEF_MOD("tsn", 1505, R8A779F0_CLK_S0D2_HSC), - DEF_MOD("rsw", 1506, R8A779F0_CLK_RSW2), + DEF_MOD("rswitch2", 1505, R8A779F0_CLK_RSW2), + DEF_MOD("ether-serdes", 1506, R8A779F0_CLK_S0D2_HSC), DEF_MOD("ufs", 1514, R8A779F0_CLK_S0D4_HSC), }; |